diff --git a/firmware/ec/common/inc/ocmp_wrappers/ocmp_adt7481.h b/firmware/ec/common/inc/ocmp_wrappers/ocmp_adt7481.h index 387ae7220e..35cea72a0d 100644 --- a/firmware/ec/common/inc/ocmp_wrappers/ocmp_adt7481.h +++ b/firmware/ec/common/inc/ocmp_wrappers/ocmp_adt7481.h @@ -20,11 +20,7 @@ typedef union ADT7481_Config { int8_t limits[3]; } ADT7481_Config; -#ifdef UT_FRAMEWORK -extern const Driver_fxnTable ADT7481_fxnTable; -#else SCHEMA_IMPORT const Driver_fxnTable ADT7481_fxnTable; -#endif static const Driver ADT7481 = { .name = "ADT7481", diff --git a/firmware/ec/src/devices/eeprom.c b/firmware/ec/src/devices/eeprom.c index 2b477de504..f9ba117ad4 100644 --- a/firmware/ec/src/devices/eeprom.c +++ b/firmware/ec/src/devices/eeprom.c @@ -50,13 +50,16 @@ static ReturnStatus i2c_eeprom_read(I2C_Handle i2cHandle, *****************************************************************************/ bool eeprom_init(Eeprom_Cfg *cfg) { + if (cfg == NULL) { + return false; + } /* Configure our WP pin (if any) and set to be low (protected) by default */ if (cfg->pin_wp) { OcGpio_configure(cfg->pin_wp, OCGPIO_CFG_OUTPUT | OCGPIO_CFG_OUT_HIGH); } /* Test communication to the EEPROM */ - uint8_t test_byte; + uint16_t test_byte; if (eeprom_read(cfg, 0x00, &test_byte, sizeof(test_byte)) != RETURN_OK) { return false; } @@ -78,7 +81,10 @@ bool eeprom_init(Eeprom_Cfg *cfg) ReturnStatus eeprom_read(const Eeprom_Cfg *cfg, uint16_t address, void *buffer, size_t size) { - ReturnStatus status = RETURN_OK; + ReturnStatus status = RETURN_NOTOK; + if (cfg == NULL) { + return status; + } I2C_Handle eepromHandle = i2c_get_handle(cfg->i2c_dev.bus); if (!eepromHandle) { LOGGER_ERROR("EEPROM:ERROR:: Failed to get I2C Bus for " @@ -111,7 +117,10 @@ ReturnStatus eeprom_read(const Eeprom_Cfg *cfg, uint16_t address, void *buffer, ReturnStatus eeprom_write(const Eeprom_Cfg *cfg, uint16_t address, const void *buffer, size_t size) { - ReturnStatus status = RETURN_OK; + ReturnStatus status = RETURN_NOTOK; + if (cfg == NULL) { + return status; + } I2C_Handle eepromHandle = i2c_get_handle(cfg->i2c_dev.bus); if (!eepromHandle) { LOGGER_ERROR("EEPROM:ERROR:: Failed to get I2C Bus for " @@ -225,6 +234,9 @@ static ReturnStatus i2c_eeprom_read(I2C_Handle i2cHandle, uint16_t slaveAddress, *****************************************************************************/ ReturnStatus eeprom_disable_write(Eeprom_Cfg *cfg) { + if (cfg == NULL) { + return RETURN_NOTOK; + } if (cfg->pin_wp) { OcGpio_write(cfg->pin_wp, WP_ASSERT); } @@ -245,6 +257,9 @@ ReturnStatus eeprom_disable_write(Eeprom_Cfg *cfg) *****************************************************************************/ ReturnStatus eeprom_enable_write(Eeprom_Cfg *cfg) { + if (cfg == NULL) { + return RETURN_NOTOK; + } if (cfg->pin_wp) { OcGpio_write(cfg->pin_wp, WP_DEASSERT); } @@ -294,6 +309,9 @@ ReturnStatus eeprom_read_oc_info(uint8_t *oc_serial) ReturnStatus eeprom_read_board_info(const Eeprom_Cfg *cfg, uint8_t *rom_info) { ReturnStatus status = RETURN_NOTOK; + if (cfg == NULL) { + return status; + } uint8_t info_size = 0x00; uint16_t eepromOffset = 0x0000; switch (cfg->ss) { @@ -343,6 +361,9 @@ ReturnStatus eeprom_read_device_info_record(const Eeprom_Cfg *cfg, uint8_t recordNo, char *device_info) { ReturnStatus status = RETURN_NOTOK; + if (cfg == NULL) { + return status; + } uint8_t info_size = OC_DEVICE_INFO_SIZE; uint16_t eepromOffset = 0x0000; switch (cfg->ss) { @@ -390,6 +411,9 @@ ReturnStatus eeprom_write_device_info_record(Eeprom_Cfg *cfg, uint8_t recordNo, char *device_info) { ReturnStatus status = RETURN_NOTOK; + if (cfg == NULL) { + return status; + } uint8_t info_size = OC_DEVICE_INFO_SIZE; uint16_t eepromOffset = 0x0000; switch (cfg->ss) { diff --git a/firmware/ec/test/Makefile b/firmware/ec/test/Makefile index 3694270be0..e11cb067a6 100644 --- a/firmware/ec/test/Makefile +++ b/firmware/ec/test/Makefile @@ -142,7 +142,7 @@ $(PATHB)Test_ltc4015$(TARGET_EXTENSION): $(STD_FILES) $(TEST_LTC4015_SRC) $(INC_ TEST_powerSource_SRC=$(OCWARE_ROOT)/src/devices/powerSource.c $(OCWARE_ROOT)/src/drivers/GpioSX1509.c $(OCWARE_ROOT)/src/devices/sx1509.c $(OCWARE_ROOT)/src/helpers/memory.c $(OCWARE_ROOT)/src/devices/i2cbus.c fake/fake_GPIO.c fake/fake_I2C.c fake/fake_ThreadedISR.c stub/stub_GateMutex.c $(PATHB)Test_powerSource$(TARGET_EXTENSION): $(STD_FILES) $(TEST_powerSource_SRC) $(INC_M) -TEST_EEPROM_SRC=$(OCWARE_ROOT)/src/devices/eeprom.c $(OCWARE_ROOT)/src/drivers/GpioSX1509.c $(OCWARE_ROOT)/src/devices/sx1509.c $(OCWARE_ROOT)/src/helpers/memory.c $(OCWARE_ROOT)/src/devices/i2cbus.c fake/fake_GPIO.c fake/fake_I2C.c fake/fake_ThreadedISR.c stub/stub_GateMutex.c +TEST_EEPROM_SRC=$(OCWARE_ROOT)/src/devices/eeprom.c $(OCWARE_ROOT)/src/drivers/GpioSX1509.c $(OCWARE_ROOT)/src/devices/sx1509.c $(OCWARE_ROOT)/src/helpers/memory.c $(OCWARE_ROOT)/src/devices/i2cbus.c fake/fake_GPIO.c fake/fake_I2C.c fake/fake_ThreadedISR.c stub/stub_GateMutex.c fake/fake_SX1509_register.c fake/fake_eeprom.c $(OCWARE_ROOT)/platform/oc-sdr/cfg/OC_CONNECT_GBC.c $(OCWARE_ROOT)/platform/oc-sdr/cfg/OC_CONNECT_SDR.c $(OCWARE_ROOT)/platform/oc-sdr/cfg/OC_CONNECT_FE.c $(PATHB)Test_eeprom$(TARGET_EXTENSION): $(STD_FILES) $(TEST_EEPROM_SRC) $(INC_M) TEST_LTC4275_SRC=$(OCWARE_ROOT)/src/devices/ltc4275.c $(OCWARE_ROOT)/src/devices/i2cbus.c fake/fake_GPIO.c fake/fake_I2C.c fake/fake_ThreadedISR.c stub/stub_GateMutex.c diff --git a/firmware/ec/test/fake/fake_I2C.c b/firmware/ec/test/fake/fake_I2C.c index 2a4aed0972..334bd70470 100644 --- a/firmware/ec/test/fake/fake_I2C.c +++ b/firmware/ec/test/fake/fake_I2C.c @@ -180,6 +180,7 @@ bool I2C_transfer(I2C_Handle handle, I2C_Transaction *transaction) return false; } const Fake_I2C_Dev *dev = &dev_tbl[transaction->slaveAddress]; + transaction->readCount = dev->addr_size * transaction->readCount; /* The write buffer must have at least the address in it */ if (transaction->writeCount < dev->addr_size) { diff --git a/firmware/ec/test/fake/fake_eeprom.c b/firmware/ec/test/fake/fake_eeprom.c new file mode 100644 index 0000000000..ca0f643770 --- /dev/null +++ b/firmware/ec/test/fake/fake_eeprom.c @@ -0,0 +1,93 @@ +/** + * Copyright (c) 2017-present, Facebook, Inc. + * All rights reserved. + * + * This source code is licensed under the BSD-style license found in the + * LICENSE file in the root directory of this source tree. An additional grant + * of patent rights can be found in the PATENTS file in the same directory. + */ +#include "include/test_eeprom.h" +#include + +uint16_t EEPROM_regs[] = { + [EEPROM_REG_DEF_INIT] = 0x0000, [EEPROM_REG_DEVICE_INFO_1] = 0x0000, + [EEPROM_REG_DEVICE_INFO_2] = 0x0000, [EEPROM_REG_DEVICE_INFO_3] = 0x0000, + [EEPROM_REG_DEVICE_INFO_4] = 0x0000, [EEPROM_REG_DEVICE_INFO_5] = 0x0000, + [EEPROM_REG_DEVICE_INFO_6] = 0x0000, [EEPROM_REG_DEVICE_INFO_7] = 0x0000, + [EEPROM_REG_DEVICE_INFO_8] = 0x0000, [EEPROM_REG_DEVICE_INFO_9] = 0x0000, + [EEPROM_REG_BOARD_INFO_1] = 0x0000, [EEPROM_REG_BOARD_INFO_2] = 0x0000, + [EEPROM_REG_BOARD_INFO_3] = 0x0000, [EEPROM_REG_BOARD_INFO_4] = 0x0000, + [EEPROM_REG_BOARD_INFO_5] = 0x0000, [EEPROM_REG_BOARD_INFO_6] = 0x0000, + [EEPROM_REG_BOARD_INFO_7] = 0x0000, [EEPROM_REG_BOARD_INFO_8] = 0x0000, + [EEPROM_REG_BOARD_INFO_9] = 0x0000, [EEPROM_REG_BOARD_INFO_10] = 0x0000, + [EEPROM_REG_SERIAL_INFO_1] = 0x0000, [EEPROM_REG_SERIAL_INFO_2] = 0x0000, + [EEPROM_REG_SERIAL_INFO_3] = 0x0000, [EEPROM_REG_SERIAL_INFO_4] = 0x0000, + [EEPROM_REG_SERIAL_INFO_5] = 0x0000, [EEPROM_REG_SERIAL_INFO_6] = 0x0000, + [EEPROM_REG_SERIAL_INFO_7] = 0x0000, [EEPROM_REG_SERIAL_INFO_8] = 0x0000, + [EEPROM_REG_SERIAL_INFO_9] = 0x0000, [EEPROM_REG_SERIAL_INFO_10] = 0x0000, + [EEPROM_REG_FFFF] = 0x0000, [EEPROM_REG_END] = 0x0000, +}; + +Eeprom_Cfg e_invalid_dev = { + .i2c_dev = + { + .bus = 6, + .slave_addr = 0xFF, + }, +}; + +Eeprom_Cfg e_invalid_bus = { + .i2c_dev = + { + .bus = 0xFF, + .slave_addr = 0x50, + }, +}; + +Eeprom_Cfg *e_invalid_cfg = NULL; + +bool Eeprom_GpioPins[] = { + [0x01] = OCGPIO_CFG_INPUT, /* Pin = 1 */ + [0x02] = OCGPIO_CFG_INPUT, /* Pin = 2 */ +}; + +uint32_t Eeprom_GpioConfig[] = { + [0x01] = OCGPIO_CFG_INPUT, + [0x02] = OCGPIO_CFG_INPUT, +}; + +OcGpio_Port gbc_io_0 = { + .fn_table = &GpioSX1509_fnTable, + .cfg = + &(SX1509_Cfg){ + .i2c_dev = { 6, 0x45 }, + .pin_irq = NULL, + }, + .object_data = &(SX1509_Obj){}, +}; + +OcGpio_Port fe_ch1_lna_io = { + .fn_table = &GpioSX1509_fnTable, + .cfg = + &(SX1509_Cfg){ + .i2c_dev = { 6, 0x45 }, + .pin_irq = NULL, + }, + .object_data = &(SX1509_Obj){}, +}; + +static OcGpio_Pin pin_inven_eeprom_wp = { &gbc_io_0, 2, 32 }; + +Eeprom_Cfg enable_dev = { + .i2c_dev = { 6, 0x45 }, + .pin_wp = &pin_inven_eeprom_wp, + .type = { .page_size = 64, .mem_size = (256 / 8) }, + .ss = OC_SS_SYS, +}; + +Eeprom_Cfg e_invalid_ss_cfg = { + .i2c_dev = { 4, 0x50 }, + .pin_wp = &(OcGpio_Pin){ &gbc_io_0, 5 }, + .type = { .page_size = 64, .mem_size = (256 / 8) }, + .ss = OC_SS_PWR, +}; diff --git a/firmware/ec/test/include/test_eeprom.h b/firmware/ec/test/include/test_eeprom.h new file mode 100644 index 0000000000..63699067cb --- /dev/null +++ b/firmware/ec/test/include/test_eeprom.h @@ -0,0 +1,103 @@ +/** + * Copyright (c) 2017-present, Facebook, Inc. + * All rights reserved. + * + * This source code is licensed under the BSD-style license found in the + * LICENSE file in the root directory of this source tree. An additional grant + * of patent rights can be found in the PATENTS file in the same directory. + */ +#ifndef _TEST_EEPROM_1_H +#define _TEST_EEPROM_1_H + +#include "common/inc/global/ocmp_frame.h" +#include "drivers/GpioSX1509.h" +#include "drivers/OcGpio.h" +#include "fake/fake_GPIO.h" +#include "fake/fake_I2C.h" +#include "fake/fake_ThreadedISR.h" +#include "helpers/array.h" +#include "helpers/attribute.h" +#include "helpers/memory.h" +#include "inc/devices/eeprom.h" +#include "include/test_sx1509.h" +#include +#include +#include +#include "unity.h" + +#define EEPROM_ASCII_VAL_SA 0x4153 +#define EEPROM_ASCII_VAL_17 0x3731 +#define EEPROM_ASCII_VAL_18 0x3831 +#define EEPROM_ASCII_VAL_LI 0x494c +#define EEPROM_ASCII_VAL_FE 0x4546 +#define EEPROM_ASCII_VAL_3G 0x4733 +#define EEPROM_ASCII_VAL_BC 0x4342 +#define EEPROM_ASCII_VAL_00 0x3030 +#define EEPROM_ASCII_VAL_41 0x3134 +#define EEPROM_ASCII_VAL_3S 0x5333 +#define EEPROM_ASCII_VAL_DR 0x5244 +#define EEPROM_ASCII_VAL_32 0x3233 +#define EEPROM_ASCII_VAL_3F 0x4633 +#define EEPROM_ASCII_VAL_E0 0x3045 +#define EEPROM_ASCII_VAL_05 0x0035 +#define EEPROM_ASCII_VAL_C0 0x3043 +#define EEPROM_ASCII_VAL_45 0x3534 +#define EEPROM_ASCII_VAL_0A 0x4130 +#define EEPROM_ASCII_VAL_10 0x3031 +#define EEPROM_ASCII_VAL_04 0x3430 +#define EEPROM_ASCII_VAL_11 0x3131 +#define EEPROM_BIG_WRITE_SIZE 0xCA +#define EEPROM_BOARD_SIZE 36 +#define EEPROM_DEFUALT_VALUE_NULL 0x0000 +#define EEPROM_DEVICE_SIZE 10 +#define EEPROM_DISABLE 0x00 +#define EEPROM_DISABLE_WRITE 0xFF +#define EEPROM_ENABLE 0x01 +#define EEPROM_ENABLE_WRITE 0xFB +#define EEPROM_FE_BOARD_INFO "SA1718LIFE3FE0005" +#define EEPROM_FE_DEVICE_INFO "SA1718LIFE3FE000580256" +#define EEPROM_GBC_BOARD_INFO "SA1718LIFE3GBC0041" +#define EEPROM_GBC_DEVICE_INFO "SA1718LIFE3GBC004180256" +#define EEPROM_SDR_BOARD_INFO "SA1718LIFE3SDR0032" +#define EEPROM_SDR_DEVICE_INFO "SA1718LIFE3SDR003280256" +#define EEPROM_SERIAL_INFO "SA1718C0450A100411" +#define EEPROM_READ_WRITE_VALUE 0x0505 +#define EEPROM_WRITE_SIZE 0x0A + +/* ======================== Constants & variables =========================== */ +/* Enums are defined as per the code requirment */ +typedef enum EEPROMRegs { + EEPROM_REG_DEF_INIT = 0x000, + EEPROM_REG_DEVICE_INFO_1 = 0x0A01, + EEPROM_REG_DEVICE_INFO_2, + EEPROM_REG_DEVICE_INFO_3, + EEPROM_REG_DEVICE_INFO_4, + EEPROM_REG_DEVICE_INFO_5, + EEPROM_REG_DEVICE_INFO_6, + EEPROM_REG_DEVICE_INFO_7, + EEPROM_REG_DEVICE_INFO_8, + EEPROM_REG_DEVICE_INFO_9, + EEPROM_REG_BOARD_INFO_1 = 0xAC01, + EEPROM_REG_BOARD_INFO_2, + EEPROM_REG_BOARD_INFO_3, + EEPROM_REG_BOARD_INFO_4, + EEPROM_REG_BOARD_INFO_5, + EEPROM_REG_BOARD_INFO_6, + EEPROM_REG_BOARD_INFO_7, + EEPROM_REG_BOARD_INFO_8, + EEPROM_REG_BOARD_INFO_9, + EEPROM_REG_BOARD_INFO_10, + EEPROM_REG_SERIAL_INFO_1 = 0xC601, + EEPROM_REG_SERIAL_INFO_2, + EEPROM_REG_SERIAL_INFO_3, + EEPROM_REG_SERIAL_INFO_4, + EEPROM_REG_SERIAL_INFO_5, + EEPROM_REG_SERIAL_INFO_6, + EEPROM_REG_SERIAL_INFO_7, + EEPROM_REG_SERIAL_INFO_8, + EEPROM_REG_SERIAL_INFO_9, + EEPROM_REG_SERIAL_INFO_10, + EEPROM_REG_FFFF = 0xFFFF, + EEPROM_REG_END = 0x20000, +} EEPROMRegs; +#endif diff --git a/firmware/ec/test/suites/Doc/TestCaseList.xlsx b/firmware/ec/test/suites/Doc/TestCaseList.xlsx index f6cd0442f4..13b9edd318 100644 Binary files a/firmware/ec/test/suites/Doc/TestCaseList.xlsx and b/firmware/ec/test/suites/Doc/TestCaseList.xlsx differ diff --git a/firmware/ec/test/suites/Test_eeprom.c b/firmware/ec/test/suites/Test_eeprom.c index 958f99dbe0..1650ce5dcf 100644 --- a/firmware/ec/test/suites/Test_eeprom.c +++ b/firmware/ec/test/suites/Test_eeprom.c @@ -6,225 +6,24 @@ * LICENSE file in the root directory of this source tree. An additional grant * of patent rights can be found in the PATENTS file in the same directory. */ -#include "unity.h" -#include "inc/devices/eeprom.h" -#include "drivers/GpioSX1509.h" -#include -#include -#include "fake/fake_GPIO.h" -#include "fake/fake_I2C.h" -#include "fake/fake_ThreadedISR.h" -#include "helpers/attribute.h" -#include "helpers/memory.h" -#include "drivers/OcGpio.h" -#include "helpers/array.h" -#include - -/* ============================= Fake Functions ============================= */ - -#include -unsigned int s_task_sleep_ticks; -xdc_Void ti_sysbios_knl_Task_sleep__E(xdc_UInt32 nticks) -{ - s_task_sleep_ticks += nticks; -} - -/* ======================== Constants & variables =========================== */ - -static OcGpio_Port s_fake_io_port = { - .fn_table = &FakeGpio_fnTable, - .object_data = &(FakeGpio_Obj){}, -}; - -static const I2C_Dev I2C_DEV = { - .bus = 6, - .slave_addr = 0x50, -}; -static const I2C_Dev I2C_DEV_1 = { - .bus = 6, - .slave_addr = 0x51, -}; -static Eeprom_Cfg s_dev = { - .i2c_dev = - { - .bus = 6, - .slave_addr = 0x50, - }, -}; - -static uint16_t EEPROM_regs[] = { - [0x00] = 0x00, /* Init */ - [0xC601] = 0x00, /* SERIAL INFO */ - [0xAC01] = 0x00, /* BOARD INFO */ - [0x0A01] = 0x00, /* DEVICE INFO */ - [0x0A02] = 0x00, /* DEVICE INFO */ - -}; - -static uint8_t SX1509_regs[] = { - [0x00] = 0x00, /* Input buffer disable register B */ - [0x01] = 0x00, /* Input buffer disable register A */ - [0x02] = 0x00, /* Output buffer long slew register B */ - [0x03] = 0x00, /* Output buffer long slew register A */ - [0x04] = 0x00, /* Output buffer low drive register B */ - [0x05] = 0x00, /* Output buffer low drive register A */ - [0x06] = 0x00, /* Pull Up register B */ - [0x07] = 0x00, /* Pull Up register A */ - [0x08] = 0x00, /* Pull Down register B */ - [0x09] = 0x00, /* Pull Down register A */ - [0x0A] = 0x00, /* Open drain register B */ - [0x0B] = 0x00, /* Open drain register A */ - [0x0C] = 0x00, /* Polarity register B */ - [0x0D] = 0x00, /* Polarity register A */ - [0x0E] = 0x00, /* Direction register B */ - [0x0F] = 0x00, /* Direction register A */ - [0x10] = 0x00, /* Data register B */ - [0x11] = 0x00, /* Data register A */ - [0x12] = 0x00, /* Interrupt mask register B */ - [0x13] = 0x00, /* Interrupt mask register A */ - [0x14] = 0x00, /* Sense High register B */ - [0x15] = 0x00, /* Sense Low register B */ - [0x16] = 0x00, /* Sense High register A */ - [0x17] = 0x00, /* Sense Low register A */ - [0x18] = 0x00, /* Interrupt source register B */ - [0x19] = 0x00, /* Interrupt source register A */ - [0x1A] = 0x00, /* Event status register B */ - [0x1B] = 0x00, /* Event status register A */ - [0x1C] = 0x00, /* Level shifter register 1 */ - [0x1D] = 0x00, /* Level shifter register 2 */ - [0x1E] = 0x00, /* Clock management register */ - [0x1F] = 0x00, /* Miscellaneous device settings register */ - [0x20] = 0x00, /* LED driver enable register B */ - [0x21] = 0x00, /* LED driver enable register A */ - [0x22] = 0x00, /* Debounce configuration register */ - [0x23] = 0x00, /* Debounce enable register B */ - [0x24] = 0x00, /* Debounce enable register A */ - [0x25] = 0x00, /* Key scan configuration register 1 */ - [0x26] = 0x00, /* Key scan configuration register 2 */ - [0x27] = 0x00, /* Key value (column) 1 */ - [0x28] = 0x00, /* Key value (row) 2 */ - [0x29] = 0x00, /* ON time register I/O[0] */ - [0x2A] = 0x00, /* ON intensity register I/O[0] */ - [0x2B] = 0x00, /* OFF time/intensity register I/O[0] */ - [0x2C] = 0x00, /* ON time register I/O[1] */ - [0x2D] = 0x00, /* ON intensity register I/O[1] */ - [0x2E] = 0x00, /* OFF time/intensity register I/O[1] */ - [0x2F] = 0x00, /* ON time register I/O[2] */ - [0x30] = 0x00, /* ON intensity register I/O[2] */ - [0x31] = 0x00, /* OFF time/intensity register I/O[2] */ - [0x32] = 0x00, /* ON time register I/O[3] */ - [0x33] = 0x00, /* ON intensity register I/O[3] */ - [0x34] = 0x00, /* OFF time/intensity register I/O[3] */ - [0x35] = 0x00, /* ON time register I/O[4] */ - [0x36] = 0x00, /* ON intensity register I/O[4] */ - [0x37] = 0x00, /* OFF time/intensity register I/O[4] */ - [0x38] = 0x00, /* Fade in register I/O[4] */ - [0x39] = 0x00, /* Fade out register I/O[4] */ - [0x3A] = 0x00, /* ON time register I/O[5] */ - [0x3B] = 0x00, /* ON intensity register I/O[5] */ - [0x3C] = 0x00, /* OFF time/intensity register I/O[5] */ - [0x3D] = 0x00, /* Fade in register I/O[5] */ - [0x3E] = 0x00, /* Fade out register I/O[5] */ - [0x3F] = 0x00, /* ON time register I/O[6] */ - [0x40] = 0x00, /* ON intensity register I/O[6] */ - [0x41] = 0x00, /* OFF time/intensity register I/O[6] */ - [0x42] = 0x00, /* Fade in register I/O[6] */ - [0x43] = 0x00, /* Fade out register I/O[6] */ - [0x44] = 0x00, /* ON time register I/O[6] */ - [0x45] = 0x00, /* ON intensity register I/O[7] */ - [0x46] = 0x00, /* OFF time/intensity register I/O[7] */ - [0x47] = 0x00, /* Fade in register I/O[7] */ - [0x48] = 0x00, /* Fade out register I/O[7] */ - [0x49] = 0x00, /* ON time register I/O[8] */ - [0x4A] = 0x00, /* ON intensity register I/O[8] */ - [0x4B] = 0x00, /* OFF time/intensity register I/O[8] */ - [0x4C] = 0x00, /* ON time register I/O[9] */ - [0x4D] = 0x00, /* ON intensity register I/O[9] */ - [0x4E] = 0x00, /* OFF time/intensity register I/O[9] */ - [0x4F] = 0x00, /* ON time register I/O[10] */ - [0x50] = 0x00, /* ON intensity register I/O[10] */ - [0x51] = 0x00, /* OFF time/intensity register I/O[10] */ - [0x52] = 0x00, /* ON time register I/O[11] */ - [0x53] = 0x00, /* ON intensity register I/O[11] */ - [0x54] = 0x00, /* OFF time/intensity register I/O[11] */ - [0x55] = 0x00, /* ON time register I/O[12] */ - [0x56] = 0x00, /* ON intensity register I/O[12] */ - [0x57] = 0x00, /* OFF time/intensity register I/O[12] */ - [0x58] = 0x00, /* Fade in register I/O[12] */ - [0x59] = 0x00, /* Fade out register I/O[12] */ - [0x5A] = 0x00, /* ON time register I/O[13] */ - [0x5B] = 0x00, /* ON intensity register I/O[13] */ - [0x5C] = 0x00, /* OFF time/intensity register I/O[13] */ - [0x5D] = 0x00, /* Fade in register I/O[13] */ - [0x5E] = 0x00, /* Fade out register I/O[13] */ - [0x5F] = 0x00, /* ON time register I/O[14] */ - [0x60] = 0x00, /* ON intensity register I/O[14] */ - [0x61] = 0x00, /* OFF time/intensity register I/O[14] */ - [0x62] = 0x00, /* Fade in register I/O[14] */ - [0x63] = 0x00, /* Fade out register I/O[14] */ - [0x64] = 0x00, /* ON time register I/O[15] */ - [0x65] = 0x00, /* ON intensity register I/O[15] */ - [0x66] = 0x00, /* OFF time/intensity register I/O[15] */ - [0x67] = 0x00, /* Fade in register I/O[115] */ - [0x68] = 0x00, /* Fade out register I/O[15] */ - [0x69] = 0x00, /* */ - [0x6A] = 0x00, /* */ - [0x7D] = 0x00, /* */ - [0x7E] = 0x00, /* */ - [0x7F] = 0x00, /* */ -}; - -static bool Eeprom_GpioPins[] = { - [0x01] = 0x1, /* Pin = 1 */ - [0x02] = 0x1, /* Pin = 2 */ -}; - -static uint32_t Eeprom_GpioConfig[] = { - [0x01] = OCGPIO_CFG_INPUT, - [0x02] = OCGPIO_CFG_INPUT, -}; +#include "include/test_eeprom.h" +extern bool Eeprom_GpioPins[0x02]; extern const OcGpio_FnTable GpioSX1509_fnTable; - -OcGpio_Port s_fake_io_exp = { - .fn_table = &GpioSX1509_fnTable, - .cfg = - &(SX1509_Cfg){ - .i2c_dev = { 6, 0x45 }, - .pin_irq = NULL, - }, - .object_data = &(SX1509_Obj){}, -}; - -OcGpio_Pin pin_inven_eeprom_wp = { &s_fake_io_exp, 2, 32 }; - -Eeprom_Cfg eeprom_gbc_sid = { - .i2c_dev = { 6, 0x51 }, - .pin_wp = &(OcGpio_Pin){ &s_fake_io_port, 5 }, - .type = { 0, 0 }, - .ss = 0, -}; - -Eeprom_Cfg eeprom_gbc_inv = { - .i2c_dev = { 6, 0x50 }, - .pin_wp = &(OcGpio_Pin){ &s_fake_io_port, 5 }, - .type = { 0, 0 }, - .ss = 0, -}; - -Eeprom_Cfg eeprom_sdr_inv = { - .i2c_dev = { 3, 0x50 }, - .pin_wp = NULL, - .type = { 0, 0 }, - .ss = 0, -}; - -Eeprom_Cfg eeprom_fe_inv = { - .i2c_dev = { 4, 0x50 }, - .pin_wp = &(OcGpio_Pin){ &s_fake_io_port, 5 }, - .type = { 0, 0 }, - .ss = 8, -}; +extern Eeprom_Cfg e_invalid_bus; +extern Eeprom_Cfg *e_invalid_cfg; +extern Eeprom_Cfg e_invalid_dev; +extern Eeprom_Cfg e_invalid_ss_cfg; +extern Eeprom_Cfg enable_dev; +extern Eeprom_Cfg eeprom_fe_inv; +extern Eeprom_Cfg eeprom_gbc_inv; +extern Eeprom_Cfg eeprom_gbc_sid; +extern Eeprom_Cfg eeprom_sdr_inv; +extern OcGpio_Port fe_ch1_lna_io; +extern OcGpio_Port gbc_io_0; +extern uint8_t SX1509_regs[SX1509_REG_TEST_2]; +extern uint16_t EEPROM_regs[EEPROM_REG_END]; +extern uint32_t Eeprom_GpioConfig[0x02]; /* ============================= Boilerplate ================================ */ void suite_setUp(void) @@ -233,10 +32,20 @@ void suite_setUp(void) FakeGpio_registerDevSimple(Eeprom_GpioPins, Eeprom_GpioConfig); - fake_I2C_registerDevSimple(I2C_DEV.bus, I2C_DEV.slave_addr, EEPROM_regs, + fake_I2C_registerDevSimple(eeprom_gbc_sid.i2c_dev.bus, + eeprom_gbc_sid.i2c_dev.slave_addr, EEPROM_regs, sizeof(EEPROM_regs), sizeof(EEPROM_regs[0]), sizeof(uint16_t), FAKE_I2C_DEV_LITTLE_ENDIAN); - fake_I2C_registerDevSimple(I2C_DEV_1.bus, I2C_DEV_1.slave_addr, EEPROM_regs, + fake_I2C_registerDevSimple(eeprom_gbc_inv.i2c_dev.bus, + eeprom_gbc_inv.i2c_dev.slave_addr, EEPROM_regs, + sizeof(EEPROM_regs), sizeof(EEPROM_regs[0]), + sizeof(uint16_t), FAKE_I2C_DEV_LITTLE_ENDIAN); + fake_I2C_registerDevSimple(eeprom_sdr_inv.i2c_dev.bus, + eeprom_sdr_inv.i2c_dev.slave_addr, EEPROM_regs, + sizeof(EEPROM_regs), sizeof(EEPROM_regs[0]), + sizeof(uint16_t), FAKE_I2C_DEV_LITTLE_ENDIAN); + fake_I2C_registerDevSimple(eeprom_fe_inv.i2c_dev.bus, + eeprom_fe_inv.i2c_dev.slave_addr, EEPROM_regs, sizeof(EEPROM_regs), sizeof(EEPROM_regs[0]), sizeof(uint16_t), FAKE_I2C_DEV_LITTLE_ENDIAN); fake_I2C_registerDevSimple(6, 0x45, SX1509_regs, sizeof(SX1509_regs), @@ -248,9 +57,7 @@ void setUp(void) { memset(EEPROM_regs, 0, sizeof(EEPROM_regs)); - OcGpio_init(&s_fake_io_port); - - OcGpio_init(&s_fake_io_exp); + OcGpio_init(&gbc_io_0); } void tearDown(void) @@ -265,209 +72,214 @@ void suite_tearDown(void) /* ================================ Tests =================================== */ void test_eeprom_init(void) { - Eeprom_Cfg e_dev = { - .i2c_dev = s_dev.i2c_dev, - .pin_wp = &(OcGpio_Pin){ &s_fake_io_port, 2 }, - }; - - EEPROM_regs[0x00] = 0x0505; + EEPROM_regs[EEPROM_REG_DEF_INIT] = EEPROM_READ_WRITE_VALUE; Eeprom_GpioConfig[0x02] = OCGPIO_CFG_OUT_HIGH; - eeprom_init(&e_dev); - TEST_ASSERT_EQUAL(1, eeprom_init(&e_dev)); + TEST_ASSERT_EQUAL(true, eeprom_init(&eeprom_gbc_sid)); TEST_ASSERT_EQUAL(OCGPIO_CFG_OUTPUT | OCGPIO_CFG_OUT_HIGH, Eeprom_GpioConfig[0x02]); + + /* Checking for NULL cfg */ + TEST_ASSERT_EQUAL(false, eeprom_init(e_invalid_cfg)); + + /* Checking with invalid slave address */ + TEST_ASSERT_EQUAL(false, eeprom_init(&e_invalid_dev)); + + /* Checking with invalid bus address */ + TEST_ASSERT_EQUAL(false, eeprom_init(&e_invalid_bus)); } void test_eeprom_read(void) { uint16_t buffer; - EEPROM_regs[0xC601] = 0x0505; + EEPROM_regs[EEPROM_REG_SERIAL_INFO_1] = EEPROM_READ_WRITE_VALUE; TEST_ASSERT_EQUAL(RETURN_OK, - eeprom_read(&s_dev, 0x01C6, &buffer, sizeof(buffer))); - TEST_ASSERT_EQUAL_HEX8(0x0505, buffer); + eeprom_read(&eeprom_gbc_sid, OC_CONNECT1_SERIAL_INFO, + &buffer, sizeof(buffer))); + TEST_ASSERT_EQUAL_HEX(EEPROM_READ_WRITE_VALUE, buffer); + + /* Checking for NULL cfg */ + buffer = EEPROM_DEFUALT_VALUE_NULL; + EEPROM_regs[EEPROM_REG_SERIAL_INFO_1] = EEPROM_READ_WRITE_VALUE; + TEST_ASSERT_EQUAL(RETURN_NOTOK, + eeprom_read(e_invalid_cfg, OC_CONNECT1_SERIAL_INFO, + &buffer, sizeof(buffer))); + + /* Checking with invalid slave address */ + buffer = EEPROM_DEFUALT_VALUE_NULL; + EEPROM_regs[EEPROM_REG_SERIAL_INFO_1] = EEPROM_READ_WRITE_VALUE; + TEST_ASSERT_EQUAL(RETURN_NOTOK, + eeprom_read(&e_invalid_dev, OC_CONNECT1_SERIAL_INFO, + &buffer, sizeof(buffer))); + + /* Checking with invalid bus address */ + buffer = EEPROM_DEFUALT_VALUE_NULL; + EEPROM_regs[EEPROM_REG_SERIAL_INFO_1] = EEPROM_READ_WRITE_VALUE; + TEST_ASSERT_EQUAL(RETURN_NOTOK, + eeprom_read(&e_invalid_bus, OC_CONNECT1_SERIAL_INFO, + &buffer, sizeof(buffer))); + + /* Checking with 0xFFFF register */ + buffer = EEPROM_DEFUALT_VALUE_NULL; + EEPROM_regs[EEPROM_REG_FFFF] = EEPROM_READ_WRITE_VALUE; + TEST_ASSERT_EQUAL(RETURN_OK, eeprom_read(&eeprom_gbc_sid, EEPROM_REG_FFFF, + &buffer, sizeof(buffer))); + TEST_ASSERT_EQUAL_HEX16(EEPROM_READ_WRITE_VALUE, buffer); } void test_eeprom_write(void) { - Eeprom_Cfg p_dev = { - .i2c_dev = { 6, 0x50 }, - .pin_wp = NULL, - .type = { .page_size = 64, .mem_size = (256 / 8) }, - .ss = 0, - }; + uint16_t buffer = EEPROM_READ_WRITE_VALUE; + EEPROM_regs[EEPROM_REG_SERIAL_INFO_1] = EEPROM_DEFUALT_VALUE_NULL; - uint16_t buffer = 0x0505; - TEST_ASSERT_EQUAL(RETURN_OK, eeprom_write(&p_dev, 0x01C6, &buffer, 0x0A)); - TEST_ASSERT_EQUAL_HEX8(0x0505, EEPROM_regs[0xC601]); + TEST_ASSERT_EQUAL(RETURN_OK, + eeprom_write(&eeprom_gbc_inv, OC_CONNECT1_SERIAL_INFO, + &buffer, EEPROM_WRITE_SIZE)); + TEST_ASSERT_EQUAL_HEX16(EEPROM_READ_WRITE_VALUE, + EEPROM_regs[EEPROM_REG_SERIAL_INFO_1]); - TEST_ASSERT_EQUAL(RETURN_OK, eeprom_write(&p_dev, 0x01C6, &buffer, 0xCA)); - TEST_ASSERT_EQUAL_HEX8(0x05, EEPROM_regs[0xC601]); + /* Test with size > page_size */ + EEPROM_regs[EEPROM_REG_SERIAL_INFO_1] = EEPROM_DEFUALT_VALUE_NULL; + TEST_ASSERT_EQUAL(RETURN_OK, + eeprom_write(&eeprom_gbc_inv, OC_CONNECT1_SERIAL_INFO, + &buffer, EEPROM_BIG_WRITE_SIZE)); + TEST_ASSERT_EQUAL_HEX16(EEPROM_READ_WRITE_VALUE, + EEPROM_regs[EEPROM_REG_SERIAL_INFO_1]); + + /* Checking for NULL cfg */ + buffer = EEPROM_READ_WRITE_VALUE; + TEST_ASSERT_EQUAL(RETURN_NOTOK, + eeprom_write(e_invalid_cfg, OC_CONNECT1_SERIAL_INFO, + &buffer, EEPROM_WRITE_SIZE)); + + /* Checking with invalid slave address */ + buffer = EEPROM_READ_WRITE_VALUE; + TEST_ASSERT_EQUAL(RETURN_NOTOK, + eeprom_write(&e_invalid_dev, OC_CONNECT1_SERIAL_INFO, + &buffer, EEPROM_WRITE_SIZE)); + + /* Checking with invalid bus address */ + buffer = EEPROM_READ_WRITE_VALUE; + TEST_ASSERT_EQUAL(RETURN_NOTOK, + eeprom_write(&e_invalid_bus, OC_CONNECT1_SERIAL_INFO, + &buffer, EEPROM_WRITE_SIZE)); } void test_eeprom_disable_write(void) { - SX1509_regs[0x10] = 0x01; - SX1509_regs[0x11] = 0x01; + SX1509_regs[SX1509_REG_DATA_B] = EEPROM_ENABLE; + SX1509_regs[SX1509_REG_DATA_A] = EEPROM_ENABLE; - Eeprom_Cfg i_dev = { - .i2c_dev = { 6, 0x45 }, - .pin_wp = &pin_inven_eeprom_wp, - .type = { 0, 0 }, - .ss = 0, - }; + TEST_ASSERT_EQUAL(RETURN_OK, eeprom_disable_write(&enable_dev)); + TEST_ASSERT_EQUAL(EEPROM_DISABLE_WRITE, SX1509_regs[SX1509_REG_DATA_A]); - TEST_ASSERT_EQUAL(RETURN_OK, eeprom_disable_write(&i_dev)); - TEST_ASSERT_EQUAL(0xFF, SX1509_regs[0x11]); + /* Checking for NULL cfg */ + TEST_ASSERT_EQUAL(RETURN_NOTOK, eeprom_disable_write(e_invalid_cfg)); } void test_eeprom_enable_write(void) { - SX1509_regs[0x10] = 0x00; - SX1509_regs[0x11] = 0x00; + SX1509_regs[SX1509_REG_DATA_B] = EEPROM_DISABLE; + SX1509_regs[SX1509_REG_DATA_A] = EEPROM_DISABLE; - Eeprom_Cfg i_dev = { - .i2c_dev = { 6, 0x45 }, - .pin_wp = &pin_inven_eeprom_wp, - .type = { 0, 0 }, - .ss = 0, - }; - TEST_ASSERT_EQUAL(RETURN_OK, eeprom_enable_write(&i_dev)); - TEST_ASSERT_EQUAL(0xFB, SX1509_regs[0x11]); + TEST_ASSERT_EQUAL(RETURN_OK, eeprom_enable_write(&enable_dev)); + TEST_ASSERT_EQUAL(EEPROM_ENABLE_WRITE, SX1509_regs[SX1509_REG_DATA_A]); + + /* Checking for NULL cfg */ + TEST_ASSERT_EQUAL(RETURN_NOTOK, eeprom_enable_write(e_invalid_cfg)); } - +/* Values are taken as per GBCV1 test board */ void test_eeprom_read_board_info(void) { - uint8_t rominfo = 0xff; - EEPROM_regs[0xAC01] = 0x05; - Eeprom_Cfg b1_dev = { - .i2c_dev = { 6, 0x50 }, - .pin_wp = &(OcGpio_Pin){ &s_fake_io_port, 5 }, - .type = { 0, 0 }, - .ss = 0, - }; - TEST_ASSERT_EQUAL(RETURN_OK, eeprom_read_board_info(&b1_dev, &rominfo)); - TEST_ASSERT_EQUAL_HEX8(0x05, rominfo); + uint8_t *buffer = (uint8_t *)malloc(EEPROM_BOARD_SIZE); + EEPROM_regs[EEPROM_REG_BOARD_INFO_1] = EEPROM_ASCII_VAL_SA; + EEPROM_regs[EEPROM_REG_BOARD_INFO_2] = EEPROM_ASCII_VAL_17; + EEPROM_regs[EEPROM_REG_BOARD_INFO_3] = EEPROM_ASCII_VAL_18; + EEPROM_regs[EEPROM_REG_BOARD_INFO_4] = EEPROM_ASCII_VAL_LI; + EEPROM_regs[EEPROM_REG_BOARD_INFO_5] = EEPROM_ASCII_VAL_FE; + EEPROM_regs[EEPROM_REG_BOARD_INFO_6] = EEPROM_ASCII_VAL_3G; + EEPROM_regs[EEPROM_REG_BOARD_INFO_7] = EEPROM_ASCII_VAL_BC; + EEPROM_regs[EEPROM_REG_BOARD_INFO_8] = EEPROM_ASCII_VAL_00; + EEPROM_regs[EEPROM_REG_BOARD_INFO_9] = EEPROM_ASCII_VAL_41; + memset(buffer, EEPROM_DEFUALT_VALUE_NULL, EEPROM_BOARD_SIZE); - Eeprom_Cfg b2_dev = { - .i2c_dev = { 6, 0x50 }, - .pin_wp = &(OcGpio_Pin){ &s_fake_io_port, 5 }, - .type = { 0, 0 }, - .ss = 7, - }; - EEPROM_regs[0xAC01] = 0x06; - TEST_ASSERT_EQUAL(RETURN_OK, eeprom_read_board_info(&b2_dev, &rominfo)); - TEST_ASSERT_EQUAL_HEX8(0x06, rominfo); + TEST_ASSERT_EQUAL(RETURN_OK, + eeprom_read_board_info(&eeprom_gbc_inv, buffer)); + TEST_ASSERT_EQUAL_STRING(EEPROM_GBC_BOARD_INFO, buffer); - Eeprom_Cfg b3_dev = { - .i2c_dev = { 6, 0x50 }, - .pin_wp = &(OcGpio_Pin){ &s_fake_io_port, 5 }, - .type = { 0, 0 }, - .ss = 8, - }; - EEPROM_regs[0xAC01] = 0x07; - TEST_ASSERT_EQUAL(RETURN_OK, eeprom_read_board_info(&b3_dev, &rominfo)); - TEST_ASSERT_EQUAL_HEX8(0x07, rominfo); + EEPROM_regs[EEPROM_REG_BOARD_INFO_1] = EEPROM_ASCII_VAL_SA; + EEPROM_regs[EEPROM_REG_BOARD_INFO_2] = EEPROM_ASCII_VAL_17; + EEPROM_regs[EEPROM_REG_BOARD_INFO_3] = EEPROM_ASCII_VAL_18; + EEPROM_regs[EEPROM_REG_BOARD_INFO_4] = EEPROM_ASCII_VAL_LI; + EEPROM_regs[EEPROM_REG_BOARD_INFO_5] = EEPROM_ASCII_VAL_FE; + EEPROM_regs[EEPROM_REG_BOARD_INFO_6] = EEPROM_ASCII_VAL_3S; + EEPROM_regs[EEPROM_REG_BOARD_INFO_7] = EEPROM_ASCII_VAL_DR; + EEPROM_regs[EEPROM_REG_BOARD_INFO_8] = EEPROM_ASCII_VAL_00; + EEPROM_regs[EEPROM_REG_BOARD_INFO_9] = EEPROM_ASCII_VAL_32; + memset(buffer, EEPROM_DEFUALT_VALUE_NULL, EEPROM_BOARD_SIZE); + TEST_ASSERT_EQUAL(RETURN_OK, + eeprom_read_board_info(&eeprom_sdr_inv, buffer)); + TEST_ASSERT_EQUAL_STRING(EEPROM_SDR_BOARD_INFO, buffer); + + EEPROM_regs[EEPROM_REG_BOARD_INFO_1] = EEPROM_ASCII_VAL_SA; + EEPROM_regs[EEPROM_REG_BOARD_INFO_2] = EEPROM_ASCII_VAL_17; + EEPROM_regs[EEPROM_REG_BOARD_INFO_3] = EEPROM_ASCII_VAL_18; + EEPROM_regs[EEPROM_REG_BOARD_INFO_4] = EEPROM_ASCII_VAL_LI; + EEPROM_regs[EEPROM_REG_BOARD_INFO_5] = EEPROM_ASCII_VAL_FE; + EEPROM_regs[EEPROM_REG_BOARD_INFO_6] = EEPROM_ASCII_VAL_3F; + EEPROM_regs[EEPROM_REG_BOARD_INFO_7] = EEPROM_ASCII_VAL_E0; + EEPROM_regs[EEPROM_REG_BOARD_INFO_8] = EEPROM_ASCII_VAL_00; + EEPROM_regs[EEPROM_REG_BOARD_INFO_9] = EEPROM_ASCII_VAL_05; + memset(buffer, EEPROM_DEFUALT_VALUE_NULL, EEPROM_BOARD_SIZE); + TEST_ASSERT_EQUAL(RETURN_OK, + eeprom_read_board_info(&eeprom_fe_inv, buffer)); + TEST_ASSERT_EQUAL_STRING(EEPROM_FE_BOARD_INFO, buffer); + + /* Checking for invalid subsystem cfg */ + memset(buffer, EEPROM_DEFUALT_VALUE_NULL, EEPROM_BOARD_SIZE); + TEST_ASSERT_EQUAL(RETURN_NOTOK, + eeprom_read_board_info(&e_invalid_ss_cfg, buffer)); + TEST_ASSERT_EQUAL_STRING("\0", buffer); + + /* Checking for NULL cfg */ + memset(buffer, EEPROM_DEFUALT_VALUE_NULL, EEPROM_BOARD_SIZE); + TEST_ASSERT_EQUAL(RETURN_NOTOK, + eeprom_read_board_info(e_invalid_cfg, buffer)); + TEST_ASSERT_EQUAL_STRING("\0", buffer); + + /* Checking with invalid slave address */ + memset(buffer, EEPROM_DEFUALT_VALUE_NULL, EEPROM_BOARD_SIZE); + TEST_ASSERT_EQUAL(RETURN_NOTOK, + eeprom_read_board_info(&e_invalid_dev, buffer)); + TEST_ASSERT_EQUAL_STRING("\0", buffer); + + /* Checking with invalid bus address */ + memset(buffer, EEPROM_DEFUALT_VALUE_NULL, EEPROM_BOARD_SIZE); + TEST_ASSERT_EQUAL(RETURN_NOTOK, + eeprom_read_board_info(&e_invalid_bus, buffer)); + TEST_ASSERT_EQUAL_STRING("\0", buffer); } + void test_eeprom_read_oc_info(void) { - uint8_t ocserial = 0x00; - - EEPROM_regs[0xC601] = 0x05; - - TEST_ASSERT_EQUAL(RETURN_OK, eeprom_read_oc_info(&ocserial)); - - TEST_ASSERT_EQUAL(0x05, ocserial); + uint8_t *buffer = (uint8_t *)malloc(EEPROM_BOARD_SIZE); + EEPROM_regs[EEPROM_REG_SERIAL_INFO_1] = EEPROM_ASCII_VAL_SA; + EEPROM_regs[EEPROM_REG_SERIAL_INFO_2] = EEPROM_ASCII_VAL_17; + EEPROM_regs[EEPROM_REG_SERIAL_INFO_3] = EEPROM_ASCII_VAL_18; + EEPROM_regs[EEPROM_REG_SERIAL_INFO_4] = EEPROM_ASCII_VAL_C0; + EEPROM_regs[EEPROM_REG_SERIAL_INFO_5] = EEPROM_ASCII_VAL_45; + EEPROM_regs[EEPROM_REG_SERIAL_INFO_6] = EEPROM_ASCII_VAL_0A; + EEPROM_regs[EEPROM_REG_SERIAL_INFO_7] = EEPROM_ASCII_VAL_10; + EEPROM_regs[EEPROM_REG_SERIAL_INFO_8] = EEPROM_ASCII_VAL_04; + EEPROM_regs[EEPROM_REG_SERIAL_INFO_9] = EEPROM_ASCII_VAL_11; + memset(buffer, EEPROM_DEFUALT_VALUE_NULL, EEPROM_BOARD_SIZE); + TEST_ASSERT_EQUAL(RETURN_OK, eeprom_read_oc_info(buffer)); + TEST_ASSERT_EQUAL_STRING(EEPROM_SERIAL_INFO, buffer); } +/* Function eeprom_write_device_info_record and eeprom_read_device_info_record + * are only stack holder in the code. No Test case are required from them as of + * now */ -void test_eeprom_read_device_info_record(void) -{ - uint8_t recordno = 1; - EEPROM_regs[0x0A01] = 0x4153; - char *deviceinfo = (char *)malloc(10); - - Eeprom_Cfg c1_dev = { - .i2c_dev = { 6, 0x50 }, - .pin_wp = &(OcGpio_Pin){ &s_fake_io_port, 5 }, - .type = { 0, 0 }, - .ss = 0, - }; - memset(deviceinfo, 0, 10); - TEST_ASSERT_EQUAL(RETURN_OK, eeprom_read_device_info_record( - &c1_dev, recordno, deviceinfo)); - TEST_ASSERT_EQUAL_STRING("SA", deviceinfo); - - uint8_t recordno1 = 1; - EEPROM_regs[0x0A01] = 0x4153; - char *deviceinfo1 = (char *)malloc(10); - - Eeprom_Cfg c2_dev = { - .i2c_dev = { 6, 0x50 }, - .pin_wp = &(OcGpio_Pin){ &s_fake_io_port, 5 }, - .type = { 0, 0 }, - .ss = 7, - }; - memset(deviceinfo1, 0, 10); - TEST_ASSERT_EQUAL(RETURN_OK, eeprom_read_device_info_record( - &c2_dev, recordno1, deviceinfo1)); - TEST_ASSERT_EQUAL_STRING("SA", deviceinfo1); - - uint8_t recordno2 = 1; - EEPROM_regs[0x0A01] = 0x4153; - char *deviceinfo2 = (char *)malloc(10); - - Eeprom_Cfg c3_dev = { - .i2c_dev = { 6, 0x50 }, - .pin_wp = &(OcGpio_Pin){ &s_fake_io_port, 5 }, - .type = { 0, 0 }, - .ss = 8, - }; - memset(deviceinfo2, 0, 10); - TEST_ASSERT_EQUAL(RETURN_OK, eeprom_read_device_info_record( - &c3_dev, recordno2, deviceinfo2)); - TEST_ASSERT_EQUAL_STRING("SA", deviceinfo2); -} - -void test_eeprom_write_device_info_record(void) -{ - uint8_t recordno = 1; - char *deviceinfo = (char *)malloc(10); - memset(deviceinfo, 0, 10); - - strcpy(deviceinfo, "SA"); - - Eeprom_Cfg d1_dev = { - .i2c_dev = { 6, 0x51 }, - .pin_wp = &(OcGpio_Pin){ &s_fake_io_port, 5 }, - .type = { 0, 0 }, - .ss = 0, - }; - - TEST_ASSERT_EQUAL(RETURN_OK, eeprom_write_device_info_record( - &d1_dev, recordno, deviceinfo)); - TEST_ASSERT_EQUAL(0x4153, EEPROM_regs[0x0A01]); - strcpy(deviceinfo, "SB"); - - Eeprom_Cfg d2_dev = { - .i2c_dev = { 6, 0x51 }, - .pin_wp = &(OcGpio_Pin){ &s_fake_io_port, 5 }, - .type = { 0, 0 }, - .ss = 0, - }; - - TEST_ASSERT_EQUAL(RETURN_OK, eeprom_write_device_info_record( - &d2_dev, recordno, deviceinfo)); - TEST_ASSERT_EQUAL(0x4253, EEPROM_regs[0x0A01]); - - strcpy(deviceinfo, "SC"); - Eeprom_Cfg d3_dev = { - .i2c_dev = { 6, 0x51 }, - .pin_wp = &(OcGpio_Pin){ &s_fake_io_port, 5 }, - .type = { 0, 0 }, - .ss = 0, - }; - - TEST_ASSERT_EQUAL(RETURN_OK, eeprom_write_device_info_record( - &d3_dev, recordno, deviceinfo)); - TEST_ASSERT_EQUAL(0x4353, EEPROM_regs[0x0A01]); -} +/* No test case are created for function i2c_eeprom_write and i2c_eeprom_read as + * they are static function, Can not access them outside the file. Also they + * are already covered as part of eeprom_reab and eeprom_write.*/