--- /dev/null
+++ b/arch/arm/mach-iproc/include/mach/io_map.h
@@ -0,0 +1,86 @@
+/*
+ * Copyright (C) 2013, Broadcom Corporation. All Rights Reserved.
+ *
+ * Permission to use, copy, modify, and/or distribute this software for any
+ * purpose with or without fee is hereby granted, provided that the above
+ * copyright notice and this permission notice appear in all copies.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
+ * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
+ * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
+ * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+ */
+
+#ifndef __NORTHSTAR_IO_MAP_H
+#define __NORTHSTAR_IO_MAP_H
+
+#include <mach/memory.h>
+#include <asm/memory.h>
+#include <mach/iproc_regs.h>
+
+#define IPROC_CCA_CORE_REG_VA     HW_IO_PHYS_TO_VIRT(IPROC_CCA_REG_BASE)
+#define IPROC_CCA_UART0_REG_VA    HW_IO_PHYS_TO_VIRT(IPROC_CCA_UART0_REG_BASE)
+#define IPROC_CCB_GPIO_REG_VA     HW_IO_PHYS_TO_VIRT(IPROC_CCB_GPIO_REG_BASE)
+#define IPROC_CCB_PWM_REG_VA      HW_IO_PHYS_TO_VIRT(IPROC_CCB_PWM_REG_BASE)
+#define IPROC_CCB_MDIO_REG_VA     HW_IO_PHYS_TO_VIRT(IPROC_CCB_MDIO_REG_BASE)
+#define IPROC_CCB_RNG_REG_VA      HW_IO_PHYS_TO_VIRT(IPROC_CCB_RNG_REG_BASE)
+#define IPROC_CCB_TIM0_REG_VA     HW_IO_PHYS_TO_VIRT(IPROC_CCB_TIM0_REG_BASE)
+#define IPROC_CCB_TIM1_REG_VA     HW_IO_PHYS_TO_VIRT(IPROC_CCB_TIM1_REG_BASE)
+#define IPROC_CCB_SRAU_REG_VA     HW_IO_PHYS_TO_VIRT(IPROC_CCB_SRAU_REG_BASE)
+#define IPROC_CCB_UART0_REG_VA    HW_IO_PHYS_TO_VIRT(IPROC_CCB_UART0_REG_BASE)
+
+#define IPROC_DDRC_REG_VA         HW_IO_PHYS_TO_VIRT(IPROC_DDRC_REG_BASE)
+#define IPROC_DMAC_REG_VA         HW_IO_PHYS_TO_VIRT(IPROC_DMAC_REG_BASE)
+#define IPROC_PCIE_AXIB0_REG_VA   HW_IO_PHYS_TO_VIRT(IPROC_PCIE_AXIB0_REG_BASE)
+#define IPROC_PCIE_AXIB1_REG_VA   HW_IO_PHYS_TO_VIRT(IPROC_PCIE_AXIB1_REG_BASE)
+#define IPROC_PCIE_AXIB2_REG_VA   HW_IO_PHYS_TO_VIRT(IPROC_PCIE_AXIB2_REG_BASE)
+
+#define IPROC_SDIO3_REG_VA        HW_IO_PHYS_TO_VIRT(IPROC_SDIO3_REG_BASE)
+#define IPROC_USB20_REG_VA        HW_IO_PHYS_TO_VIRT(IPROC_USB20_REG_BASE)
+#define IPROC_USB30_REG_VA        HW_IO_PHYS_TO_VIRT(IPROC_USB30_REG_BASE)
+#define IPROC_USB20_PHY_REG_VA    HW_IO_PHYS_TO_VIRT(IPROC_USB20_PHY_REG_BASE)
+#define IPROC_GMAC0_REG_VA        HW_IO_PHYS_TO_VIRT(IPROC_GMAC0_REG_BASE)
+#define IPROC_GMAC1_REG_VA        HW_IO_PHYS_TO_VIRT(IPROC_GMAC1_REG_BASE)
+#define IPROC_GMAC2_REG_VA        HW_IO_PHYS_TO_VIRT(IPROC_GMAC2_REG_BASE)
+#define IPROC_GMAC3_REG_VA        HW_IO_PHYS_TO_VIRT(IPROC_GMAC3_REG_BASE)
+#define IPROC_DMU_BASE_VA         HW_IO_PHYS_TO_VIRT(IPROC_DMU_REG_BASE)
+#define IPROC_CRU_BASE_VA         HW_IO_PHYS_TO_VIRT(IPROC_CRU_REG_BASE)
+#define IPROC_IDM_REGISTER_VA     HW_IO_PHYS_TO_VIRT(IPROC_IDM_REG_BASE)
+#define IPROC_USB2D_REG_VA        HW_IO_PHYS_TO_VIRT(IPROC_USB2D_REG_BASE)
+
+#define IPROC_CTF_BASE_VA       HW_IO_PHYS_TO_VIRT(IPROC_CTF_REG_BASE)
+
+/* ARM9 Private memory region */
+#define PERIPH_BASE                    IPROC_PERIPH_BASE
+#define IPROC_PERIPH_VA                HW_IO_PHYS_TO_VIRT(IPROC_PERIPH_BASE)
+#define IPROC_PERIPH_SCU_REG_VA        HW_IO_PHYS_TO_VIRT(IPROC_PERIPH_BASE)
+#define IPROC_PERIPH_INT_CTRL_REG_VA   HW_IO_PHYS_TO_VIRT(PERIPH_BASE + 0x100)
+#define IPROC_PERIPH_GLB_TIM_REG_VA    HW_IO_PHYS_TO_VIRT(PERIPH_BASE + 0x200)
+#define IPROC_PERIPH_PVT_TIM_REG_VA    HW_IO_PHYS_TO_VIRT(PERIPH_BASE + 0x600)
+#define IPROC_PERIPH_PVT_WDT_REG_VA    HW_IO_PHYS_TO_VIRT(PERIPH_BASE + 0x620)
+#define IPROC_PERIPH_INT_DISTR_REG_VA  HW_IO_PHYS_TO_VIRT(PERIPH_BASE + 0x1000)
+#define IPROC_L2CC_REG_VA              HW_IO_PHYS_TO_VIRT(PERIPH_BASE + 0x2000)
+
+#define IPROC_ROOT_CLK_VA  HW_IO_PHYS_TO_VIRT(IPROC_CLK_WR_ACC_REG_BASE)
+#define IPROC_GICCPU_VA    HW_IO_PHYS_TO_VIRT(IPROC_GICCPU_CTL_REG_BASE)
+
+#define CCU_PROF_REG_BASE              IPROC_CCU_PROF_CTL_REG_BASE
+#define IPROC_CCU_PROF_CTL_REG_VA HW_IO_PHYS_TO_VIRT(CCU_PROF_REG_BASE)
+#define IPROC_CCU_PROF_SEL_REG_VA HW_IO_PHYS_TO_VIRT(CCU_PROF_REG_BASE + 0x004)
+#define IPROC_CCU_PROF_CNT_REG_VA HW_IO_PHYS_TO_VIRT(CCU_PROF_REG_BASE + 0x008)
+#define IPROC_CCU_PROF_DBG_REG_VA HW_IO_PHYS_TO_VIRT(CCU_PROF_REG_BASE + 0x00C)
+
+#ifdef CONFIG_MACH_CYGNUS
+        #define IPROC_UART_LLDEBUG_PA           IPROC_CCA_UART3_REG_BASE
+        #define IPROC_UART_LLDEBUG_VA           HW_IO_PHYS_TO_VIRT(IPROC_UART_LLDEBUG_PA)
+#else
+        #define IPROC_UART_LLDEBUG_PA           IPROC_CCA_UART0_REG_BASE
+        #define IPROC_UART_LLDEBUG_VA           IPROC_CCA_UART0_REG_VA
+#endif
+
+#define IPROC_I2S_REG_VA     HW_IO_PHYS_TO_VIRT(IPROC_I2S_REG_BASE)
+
+#endif /*__NORTHSTAR_IO_MAP_H */
diff --git a/arch/arm/mach-iproc/include/mach/iproc_regs.h b/arch/arm/mach-iproc/include/mach/iproc_regs.h
new file mode 100644
index 0000000..460c436
