--- a/arch/arm/mach-at91/at91rm9200_devices.c
+++ b/arch/arm/mach-at91/at91rm9200_devices.c
@@ -1001,7 +1001,15 @@ static inline void configure_usart0_pins
 		 *  We need to drive the pin manually.  Default is off (RTS is active low).
 		 */
 		at91_set_gpio_output(AT91_PIN_PA21, 1);
-	}
+		}
+	if (pins & ATMEL_UART_DTR)
+		at91_set_gpio_output(AT91_PIN_PB6, 1);  /* DTR0 */
+	if (pins & ATMEL_UART_RI)
+		at91_set_gpio_output(AT91_PIN_PB7, 1);  /* RI0 */
+	if (pins & ATMEL_UART_DCD) {
+		at91_set_gpio_input(AT91_PIN_PA19, 1);  /* DCD0 */
+		at91_set_deglitch(AT91_PIN_PA19, 1);
+		}
 }
 
 static struct resource uart1_resources[] = {
@@ -1139,6 +1147,14 @@ static inline void configure_usart3_pins
 		at91_set_B_periph(AT91_PIN_PB1, 0);	/* CTS3 */
 	if (pins & ATMEL_UART_RTS)
 		at91_set_B_periph(AT91_PIN_PB0, 0);	/* RTS3 */
+	if (pins & ATMEL_UART_DTR)
+		at91_set_gpio_output(AT91_PIN_PB29, 1); /* DTR0 */
+	if (pins & ATMEL_UART_RI)
+		at91_set_gpio_output(AT91_PIN_PB2, 1);  /* RI0 */
+	if (pins & ATMEL_UART_DCD) {
+		at91_set_gpio_input(AT91_PIN_PA24, 1);  /* DCD0 */
+		at91_set_deglitch(AT91_PIN_PA24, 1);
+		}
 }
 
 static struct platform_device *__initdata at91_uarts[ATMEL_MAX_UART];	/* the UARTs to use */
