From 63dd51cbc494089807eaddd471bf64fe73e746b6 Mon Sep 17 00:00:00 2001
From: Piotr Dymacz <pepe2k@gmail.com>
Date: Fri, 12 Jan 2024 07:55:18 +0100
Subject: [PATCH] ipq807x: v5.4: {e,o}ap102: add pin configs for USB and MCU

This adds configuration for pins connected with nRF52840 MCU (reset and
one apparently used by device vendor for DTM enable) and related to USB
(GL850G HUB reset and rear/side ports power) on the EdgeCore {E,O}AP102.

Signed-off-by: Piotr Dymacz <pepe2k@gmail.com>
---
 .../boot/dts/qcom/qcom-ipq807x-eap102.dts     | 42 +++++++++++++++++++
 .../boot/dts/qcom/qcom-ipq807x-oap102.dts     | 42 +++++++++++++++++++
 2 files changed, 84 insertions(+)

diff --git a/feeds/ipq807x_v5.4/ipq807x/files/arch/arm64/boot/dts/qcom/qcom-ipq807x-eap102.dts b/feeds/ipq807x_v5.4/ipq807x/files/arch/arm64/boot/dts/qcom/qcom-ipq807x-eap102.dts
index ddaef932..59d3209b 100644
--- a/feeds/ipq807x_v5.4/ipq807x/files/arch/arm64/boot/dts/qcom/qcom-ipq807x-eap102.dts
+++ b/feeds/ipq807x_v5.4/ipq807x/files/arch/arm64/boot/dts/qcom/qcom-ipq807x-eap102.dts
@@ -31,6 +31,48 @@
 
 	soc {
 		pinctrl@1000000 {
+			pinctrl-0 = <&mcu_rst &mcu_rsv &usb_rear_pwr &usb_side_pwr &usb_hub_rst>;
+			pinctrl-names = "default";
+
+			mcu_rst: mcu_rst_pins {
+				pins = "gpio54";
+				function = "gpio";
+				drive-strength = <8>;
+				bias-disable;
+				output-low;
+			};
+
+			mcu_rsv: mcu_rsv_pins {
+				pins = "gpio56";
+				function = "gpio";
+				drive-strength = <8>;
+				bias-disable;
+			};
+
+			usb_rear_pwr: usb_rear_pwr_pins {
+				pins = "gpio29";
+				function = "gpio";
+				drive-strength = <8>;
+				bias-disable;
+				output-high;
+			};
+
+			usb_side_pwr: usb_side_pwr_pins {
+				pins = "gpio30";
+				function = "gpio";
+				drive-strength = <8>;
+				bias-disable;
+				output-high;
+			};
+
+			usb_hub_rst: usb_hub_rst_pins {
+				pins = "gpio55";
+				function = "gpio";
+				drive-strength = <8>;
+				bias-disable;
+				output-high;
+			};
+
 			button_pins: button_pins {
 				reset_button {
 					pins = "gpio66";
diff --git a/feeds/ipq807x_v5.4/ipq807x/files/arch/arm64/boot/dts/qcom/qcom-ipq807x-oap102.dts b/feeds/ipq807x_v5.4/ipq807x/files/arch/arm64/boot/dts/qcom/qcom-ipq807x-oap102.dts
index 84f4ec3b..df133c97 100644
--- a/feeds/ipq807x_v5.4/ipq807x/files/arch/arm64/boot/dts/qcom/qcom-ipq807x-oap102.dts
+++ b/feeds/ipq807x_v5.4/ipq807x/files/arch/arm64/boot/dts/qcom/qcom-ipq807x-oap102.dts
@@ -31,6 +31,48 @@
 
 	soc {
 		pinctrl@1000000 {
+			pinctrl-0 = <&mcu_rst &mcu_rsv &usb_rear_pwr &usb_side_pwr &usb_hub_rst>;
+			pinctrl-names = "default";
+
+			mcu_rst: mcu_rst_pins {
+				pins = "gpio54";
+				function = "gpio";
+				drive-strength = <8>;
+				bias-disable;
+				output-low;
+			};
+
+			mcu_rsv: mcu_rsv_pins {
+				pins = "gpio56";
+				function = "gpio";
+				drive-strength = <8>;
+				bias-disable;
+			};
+
+			usb_rear_pwr: usb_rear_pwr_pins {
+				pins = "gpio29";
+				function = "gpio";
+				drive-strength = <8>;
+				bias-disable;
+				output-high;
+			};
+
+			usb_side_pwr: usb_side_pwr_pins {
+				pins = "gpio30";
+				function = "gpio";
+				drive-strength = <8>;
+				bias-disable;
+				output-high;
+			};
+
+			usb_hub_rst: usb_hub_rst_pins {
+				pins = "gpio55";
+				function = "gpio";
+				drive-strength = <8>;
+				bias-disable;
+				output-high;
+			};
+
 			button_pins: button_pins {
 				reset_button {
 					pins = "gpio66";