diff --git a/util/flash_ec b/util/flash_ec
index 4ccfa2d0fc..3f0a9174a2 100755
--- a/util/flash_ec
+++ b/util/flash_ec
@@ -85,6 +85,10 @@ BOARDS_NPCX=(
 	npcx_evb_arm
 )
 
+BOARDS_NRF51=(
+	hadoken
+)
+
 BOARDS_MEC1322=(
 	cyan
 	glados
@@ -403,6 +407,16 @@ function flash_lm4() {
 
 }
 
+function flash_nrf51() {
+	OCD_CHIP_CFG="nrf51_chip.cfg"
+	OCD_CMDS="init; flash_nrf51 ${IMG} ${FLAGS_offset}; exit_debug_mode_nrf51; shutdown;"
+
+	flash_openocd
+
+	# waiting 100us for the reset pulse is not necessary, it takes ~2.5ms
+	dut_control swd_reset:on swd_reset:off
+}
+
 function flash_npcx() {
 	IMG_PATH="${EC_DIR}/build/${BOARD}"
 	OCD_CHIP_CFG="npcx_chip.cfg"
@@ -486,6 +500,8 @@ elif $(in_array "${BOARDS_STM32_DFU[@]}" "${BOARD}"); then
 	CHIP="stm32_dfu"
 elif $(in_array "${BOARDS_NPCX[@]}" "${BOARD}"); then
 	CHIP="npcx"
+elif $(in_array "${BOARDS_NRF51[@]}" "${BOARD}"); then
+	CHIP="nrf51"
 elif $(in_array "${BOARDS_MEC1322[@]}" "${BOARD}"); then
 	CHIP="mec1322"
 elif [ -n "${FLAGS_chip}" ]; then
diff --git a/util/openocd/lm4_chip.cfg b/util/openocd/lm4_chip.cfg
index ec3bb4143c..3dffa2dc66 100644
--- a/util/openocd/lm4_chip.cfg
+++ b/util/openocd/lm4_chip.cfg
@@ -1,4 +1,11 @@
 
+ftdi_layout_init 0x0018 0x009b
+
+# open collector oe only
+ftdi_layout_signal nSRST -oe 0x0020
+
+reset_config trst_only
+
 source [find target/stellaris.cfg]
 source [find lm4x_cmds.tcl]
 
diff --git a/util/openocd/npcx_chip.cfg b/util/openocd/npcx_chip.cfg
index 8e137307e5..ddd01df5a4 100644
--- a/util/openocd/npcx_chip.cfg
+++ b/util/openocd/npcx_chip.cfg
@@ -2,3 +2,10 @@
 source [find npcx.cfg]
 source [find npcx_cmds.tcl]
 
+ftdi_layout_init 0x0018 0x009b
+
+# open collector oe only
+ftdi_layout_signal nSRST -oe 0x0020
+
+reset_config trst_only
+
diff --git a/util/openocd/nrf51_chip.cfg b/util/openocd/nrf51_chip.cfg
new file mode 100644
index 0000000000..f0e78897d6
--- /dev/null
+++ b/util/openocd/nrf51_chip.cfg
@@ -0,0 +1,14 @@
+
+#nRF51 uses SWD
+transport select swd
+# Since nTRST is repurposed, we need a different layout_init setting
+ftdi_layout_init 0x0008 0x009b
+
+ftdi_layout_signal SWDIO_OE -nalias nTRST
+ftdi_layout_signal SWD_EN -alias TMS
+
+#Disable fast flashing, it only works with ST-Link and CMSIS-DAP
+set WORKAREASIZE 0
+source [find target/nrf51.cfg]
+source [find nrf51_cmds.tcl]
+
diff --git a/util/openocd/nrf51_cmds.tcl b/util/openocd/nrf51_cmds.tcl
new file mode 100644
index 0000000000..711b27574d
--- /dev/null
+++ b/util/openocd/nrf51_cmds.tcl
@@ -0,0 +1,22 @@
+# Copyright 2015 The Chromium OS Authors. All rights reserved.
+# Use of this source code is governed by a BSD-style license that can be
+# found in the LICENSE file.
+#
+# Command automation for Nordic nRF51 chip
+
+proc flash_nrf51 {path offset} {
+	reset halt;
+	program $path $offset;
+}
+
+proc unprotect_nrf51 { } {
+	reset halt;
+	nrf51 mass_erase;
+}
+
+# enable reset by writing 1 to the RESET register
+# This will disconnect the debugger with the following message:
+# Polling target nrf51.cpu failed, trying to reexamine
+proc exit_debug_mode_nrf51 { } {
+	mww 0x40000544 1;
+}
diff --git a/util/openocd/servo.cfg b/util/openocd/servo.cfg
index 362e4f814d..8331a9bc08 100644
--- a/util/openocd/servo.cfg
+++ b/util/openocd/servo.cfg
@@ -6,7 +6,9 @@ gdb_flash_program enable
 interface ftdi
 # VID/PID for servo v2, servo v3
 ftdi_vid_pid 0x18d1 0x5002 0x18d1 0x5004 0x18d1 0x500d
-ftdi_layout_init 0x0c08 0x0f1b
-ftdi_layout_signal nTRST -data 0x0100 -noe 0x0400
-ftdi_layout_signal nSRST -data 0x0200 -noe 0x0800
+# Only initialize Port A
+ftdi_channel 0
+
+# unbuffered connection data == oe
+ftdi_layout_signal nTRST -data 0x0010 -oe 0x0010