diff --git a/board/reef/board.c b/board/reef/board.c index 350d22151f..e224732ea1 100644 --- a/board/reef/board.c +++ b/board/reef/board.c @@ -58,10 +58,16 @@ static void tcpc_alert_event(enum gpio_signal signal) { - if ((signal == GPIO_USB_C0_PD_INT) && - !gpio_get_level(GPIO_USB_PD_RST_ODL)) + if ((signal == GPIO_USB_C0_PD_INT_ODL) && + !gpio_get_level(GPIO_USB_C0_PD_RST_L)) return; +#if IS_PROTO == 0 + if ((signal == GPIO_USB_C1_PD_INT_ODL) && + !gpio_get_level(GPIO_USB_C1_PD_RST_ODL)) + return; +#endif + #ifdef HAS_TASK_PDCMD /* Exchange status with TCPCs */ host_command_pd_send_status(PD_CHARGE_NO_CHANGE); @@ -127,7 +133,11 @@ const struct i2c_port_t i2c_ports[] = { const unsigned int i2c_ports_used = ARRAY_SIZE(i2c_ports); const struct tcpc_config_t tcpc_config[CONFIG_USB_PD_PORT_COUNT] = { +#if IS_PROTO == 1 {NPCX_I2C_PORT0_0, 0x50, &anx74xx_tcpm_drv, TCPC_ALERT_ACTIVE_HIGH}, +#else + {NPCX_I2C_PORT0_0, 0x50, &anx74xx_tcpm_drv, TCPC_ALERT_ACTIVE_LOW}, +#endif {NPCX_I2C_PORT0_1, 0x16, &tcpci_tcpm_drv, TCPC_ALERT_ACTIVE_LOW}, }; @@ -135,7 +145,11 @@ uint16_t tcpc_get_alert_status(void) { uint16_t status = 0; - if (gpio_get_level(GPIO_USB_C0_PD_INT)) +#if IS_PROTO == 0 + if (!gpio_get_level(GPIO_USB_C0_PD_INT_ODL)) +#else + if (gpio_get_level(GPIO_USB_C0_PD_INT_ODL)) +#endif status |= PD_STATUS_TCPC_ALERT_0; if (!gpio_get_level(GPIO_USB_C1_PD_INT_ODL)) status |= PD_STATUS_TCPC_ALERT_1; @@ -182,20 +196,28 @@ void board_set_tcpc_power_mode(int port, int mode) */ void board_reset_pd_mcu(void) { - gpio_set_level(GPIO_USB_PD_RST_ODL, 0); +#if IS_PROTO == 0 + /* Assert reset to TCPC1 */ + gpio_set_level(GPIO_USB_C1_PD_RST_ODL, 0); +#endif + + /* Assert reset to TCPC0 */ + gpio_set_level(GPIO_USB_C0_PD_RST_L, 0); msleep(1); gpio_set_level(GPIO_EN_USB_TCPC_PWR, 0); + +#if IS_PROTO == 0 + /* Deassert reset to TCPC1 */ + gpio_set_level(GPIO_USB_C1_PD_RST_ODL, 1); +#endif + + /* TCPC0 requires 10ms reset/power down assertion */ msleep(10); + /* Deassert reset to TCPC0 */ gpio_set_level(GPIO_EN_USB_TCPC_PWR, 1); msleep(10); - gpio_set_level(GPIO_USB_PD_RST_ODL, 1); - /* - * ANX7688 needed 50ms to release RESET_N, but the ANX7428 datasheet - * does not indicate such a long delay is necessary. Leave it in due - * to paranoia. - */ - msleep(50); + gpio_set_level(GPIO_USB_C0_PD_RST_L, 1); } void board_tcpc_init(void) @@ -300,7 +322,7 @@ static void chipset_pre_init(void) #if 0 /* Enable PD interrupts */ - gpio_enable_interrupt(GPIO_USB_C0_PD_INT); + gpio_enable_interrupt(GPIO_USB_C0_PD_INT_ODL); gpio_enable_interrupt(GPIO_USB_C1_PD_INT_ODL); #endif } diff --git a/board/reef/gpio.inc b/board/reef/gpio.inc index 48f2f875d3..c46f1c579b 100644 --- a/board/reef/gpio.inc +++ b/board/reef/gpio.inc @@ -9,8 +9,13 @@ * Note: Those with interrupt handlers must be declared first. */ GPIO_INT(CHARGER_INT_L, PIN(3, 3), GPIO_INT_FALLING, bd99955_vbus_interrupt) /* CHARGER_EC_INT_ODL from BD99955 */ -GPIO_INT(USB_C0_PD_INT, PIN(3, 7), GPIO_INT_RISING, tcpc_alert_event) /* from Analogix TCPC */ +#if IS_PROTO == 1 +GPIO_INT(USB_C0_PD_INT_ODL, PIN(3, 7), GPIO_INT_RISING, tcpc_alert_event) /* from Analogix TCPC */ GPIO_INT(USB_C1_PD_INT_ODL, PIN(D, 2), GPIO_INT_FALLING, tcpc_alert_event) /* from Parade TCPC */ +#else +GPIO_INT(USB_C0_PD_INT_ODL, PIN(3, 7), GPIO_INT_FALLING, tcpc_alert_event) /* from Analogix TCPC */ +GPIO_INT(USB_C1_PD_INT_ODL, PIN(B, 1), GPIO_INT_FALLING, tcpc_alert_event) /* from Parade TCPC */ +#endif GPIO_INT(PCH_SLP_S4_L, PIN(8, 6), GPIO_INT_BOTH, power_signal_interrupt) /* SLP_S4_L */ GPIO_INT(PCH_SLP_S3_L, PIN(7, 3), GPIO_INT_BOTH, power_signal_interrupt) /* SLP_S3_L */ @@ -118,10 +123,26 @@ GPIO(PCH_RCIN_L, PIN(6, 1), GPIO_ODR_HIGH) /* SYS_RST_ODL */ GPIO(CHARGER_RST_ODL, PIN(C, 0), GPIO_ODR_HIGH) GPIO(USB_A_CHARGE_EN_L, PIN(4, 2), GPIO_OUT_HIGH) GPIO(EN_USB_TCPC_PWR, PIN(C, 3), GPIO_OUT_LOW) -GPIO(USB_PD_RST_ODL, PIN(0, 3), GPIO_ODR_LOW) GPIO(EN_USB_A_5V, PIN(4, 1), GPIO_OUT_LOW) -GPIO(USB_C0_5V_EN, PIN(D, 3), GPIO_OUT_LOW) /* EN_USB_CN_5V_OUT, Enable C0 */ +/* + * USB_C0_PD_RST_ODL is configured as push-pull to save power when the ANX TCPC + * is in low power mode. See chrome-os-partner:55165 for details. + */ +GPIO(USB_C0_PD_RST_L, PIN(0, 3), GPIO_OUT_LOW) /* USB_C0_PD_RST_ODL */ +#if IS_PROTO == 0 +GPIO(USB_C1_PD_RST_ODL, PIN(7, 4), GPIO_ODR_LOW) +#endif +#if IS_PROTO == 1 +GPIO(USB_C0_5V_EN, PIN(D, 3), GPIO_OUT_LOW) /* EN_USB_C0_5V_OUT, Enable C0 */ GPIO(USB_C1_5V_EN, PIN(B, 1), GPIO_OUT_LOW) /* EN_USB_C1_5V_OUT, Enable C1 */ +#else +/* + * Configure as input to enable @ 1.5A, output-low to turn off, or output-high + * to enable @ 3A. + */ +GPIO(USB_C0_5V_EN, PIN(D, 3), GPIO_OUT_LOW) /* EN_USB_C0_5V_OUT, Enable C0 */ +GPIO(USB_C1_5V_EN, PIN(D, 2), GPIO_OUT_LOW) /* EN_USB_C1_5V_OUT, Enable C1 */ +#endif /* Clear for non-HDI breakout, must be pulled high */ GPIO(NC1, PIN(8, 4), GPIO_INPUT | GPIO_PULL_UP | GPIO_SEL_1P8V)