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Merge pull request #332 from jcastillo-arm/jc/tf-issues/214

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Use uintptr_t as base address type in ARM driver APIs
This commit is contained in:
danh-arm
2015-07-17 10:10:53 +01:00
parent 7bcbb962fd 02462972c9
commit 1f06ca8a63
15 changed files with 146 additions and 140 deletions
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10
include/drivers/arm/arm_gic.h
View File

@@ -36,11 +36,11 @@
/*******************************************************************************
* Function declarations
******************************************************************************/
void arm_gic_init(unsigned int gicc_base,
unsigned int gicd_base,
unsigned long gicr_base,
const unsigned int *irq_sec_ptr,
unsigned int num_irqs);
void arm_gic_init(uintptr_t gicc_base,
uintptr_t gicd_base,
uintptr_t gicr_base,
const unsigned int *irq_sec_ptr,
unsigned int num_irqs);
void arm_gic_setup(void);
void arm_gic_cpuif_deactivate(void);
void arm_gic_cpuif_setup(void);

2
include/drivers/arm/cci.h
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@@ -146,7 +146,7 @@
* SLAVE_IF_UNUSED should be used in the map to represent no AMBA 4 master exists
* for that interface.
*/
void cci_init(unsigned long cci_base,
void cci_init(uintptr_t cci_base,
const int *map,
unsigned int num_cci_masters);

4
include/drivers/arm/cci400.h
View File

@@ -68,6 +68,8 @@
#ifndef __ASSEMBLY__
#include <stdint.h>
/* Function declarations */
/*
@@ -79,7 +81,7 @@
* affinity instance of the mpidr representing the cluster. A negative cluster
* index indicates that no cluster is present on that slave interface.
*/
void cci_init(unsigned long cci_base,
void cci_init(uintptr_t cci_base,
int slave_iface3_cluster_ix,
int slave_iface4_cluster_ix);

114
include/drivers/arm/gic_v2.h
View File

@@ -145,64 +145,64 @@
#ifndef __ASSEMBLY__
#include <mmio.h>
#include <stdint.h>
/*******************************************************************************
* GIC Distributor function prototypes
******************************************************************************/
unsigned int gicd_read_igroupr(unsigned int, unsigned int);
unsigned int gicd_read_isenabler(unsigned int, unsigned int);
unsigned int gicd_read_icenabler(unsigned int, unsigned int);
unsigned int gicd_read_ispendr(unsigned int, unsigned int);
unsigned int gicd_read_icpendr(unsigned int, unsigned int);
unsigned int gicd_read_isactiver(unsigned int, unsigned int);
unsigned int gicd_read_icactiver(unsigned int, unsigned int);
unsigned int gicd_read_ipriorityr(unsigned int, unsigned int);
unsigned int gicd_read_itargetsr(unsigned int, unsigned int);
unsigned int gicd_read_icfgr(unsigned int, unsigned int);
unsigned int gicd_read_cpendsgir(unsigned int, unsigned int);
unsigned int gicd_read_spendsgir(unsigned int, unsigned int);
void gicd_write_igroupr(unsigned int, unsigned int, unsigned int);
void gicd_write_isenabler(unsigned int, unsigned int, unsigned int);
void gicd_write_icenabler(unsigned int, unsigned int, unsigned int);
void gicd_write_ispendr(unsigned int, unsigned int, unsigned int);
void gicd_write_icpendr(unsigned int, unsigned int, unsigned int);
void gicd_write_isactiver(unsigned int, unsigned int, unsigned int);
void gicd_write_icactiver(unsigned int, unsigned int, unsigned int);
void gicd_write_ipriorityr(unsigned int, unsigned int, unsigned int);
void gicd_write_itargetsr(unsigned int, unsigned int, unsigned int);
void gicd_write_icfgr(unsigned int, unsigned int, unsigned int);
void gicd_write_cpendsgir(unsigned int, unsigned int, unsigned int);
void gicd_write_spendsgir(unsigned int, unsigned int, unsigned int);
unsigned int gicd_get_igroupr(unsigned int, unsigned int);
void gicd_set_igroupr(unsigned int, unsigned int);
void gicd_clr_igroupr(unsigned int, unsigned int);
void gicd_set_isenabler(unsigned int, unsigned int);
void gicd_set_icenabler(unsigned int, unsigned int);
void gicd_set_ispendr(unsigned int, unsigned int);
void gicd_set_icpendr(unsigned int, unsigned int);
void gicd_set_isactiver(unsigned int, unsigned int);
void gicd_set_icactiver(unsigned int, unsigned int);
void gicd_set_ipriorityr(unsigned int, unsigned int, unsigned int);
void gicd_set_itargetsr(unsigned int, unsigned int, unsigned int);
unsigned int gicd_read_igroupr(uintptr_t, unsigned int);
unsigned int gicd_read_isenabler(uintptr_t, unsigned int);
unsigned int gicd_read_icenabler(uintptr_t, unsigned int);
unsigned int gicd_read_ispendr(uintptr_t, unsigned int);
unsigned int gicd_read_icpendr(uintptr_t, unsigned int);
unsigned int gicd_read_isactiver(uintptr_t, unsigned int);
unsigned int gicd_read_icactiver(uintptr_t, unsigned int);
unsigned int gicd_read_ipriorityr(uintptr_t, unsigned int);
unsigned int gicd_read_itargetsr(uintptr_t, unsigned int);
unsigned int gicd_read_icfgr(uintptr_t, unsigned int);
unsigned int gicd_read_cpendsgir(uintptr_t, unsigned int);
unsigned int gicd_read_spendsgir(uintptr_t, unsigned int);
void gicd_write_igroupr(uintptr_t, unsigned int, unsigned int);
void gicd_write_isenabler(uintptr_t, unsigned int, unsigned int);
void gicd_write_icenabler(uintptr_t, unsigned int, unsigned int);
void gicd_write_ispendr(uintptr_t, unsigned int, unsigned int);
void gicd_write_icpendr(uintptr_t, unsigned int, unsigned int);
void gicd_write_isactiver(uintptr_t, unsigned int, unsigned int);
void gicd_write_icactiver(uintptr_t, unsigned int, unsigned int);
void gicd_write_ipriorityr(uintptr_t, unsigned int, unsigned int);
void gicd_write_itargetsr(uintptr_t, unsigned int, unsigned int);
void gicd_write_icfgr(uintptr_t, unsigned int, unsigned int);
void gicd_write_cpendsgir(uintptr_t, unsigned int, unsigned int);
void gicd_write_spendsgir(uintptr_t, unsigned int, unsigned int);
unsigned int gicd_get_igroupr(uintptr_t, unsigned int);
void gicd_set_igroupr(uintptr_t, unsigned int);
void gicd_clr_igroupr(uintptr_t, unsigned int);
void gicd_set_isenabler(uintptr_t, unsigned int);
void gicd_set_icenabler(uintptr_t, unsigned int);
void gicd_set_ispendr(uintptr_t, unsigned int);
void gicd_set_icpendr(uintptr_t, unsigned int);
void gicd_set_isactiver(uintptr_t, unsigned int);
void gicd_set_icactiver(uintptr_t, unsigned int);
void gicd_set_ipriorityr(uintptr_t, unsigned int, unsigned int);
void gicd_set_itargetsr(uintptr_t, unsigned int, unsigned int);
/*******************************************************************************
* GIC Distributor interface accessors for reading entire registers
******************************************************************************/
static inline unsigned int gicd_read_ctlr(unsigned int base)
static inline unsigned int gicd_read_ctlr(uintptr_t base)
{
return mmio_read_32(base + GICD_CTLR);
}
static inline unsigned int gicd_read_typer(unsigned int base)
static inline unsigned int gicd_read_typer(uintptr_t base)
{
return mmio_read_32(base + GICD_TYPER);
}
static inline unsigned int gicd_read_sgir(unsigned int base)
static inline unsigned int gicd_read_sgir(uintptr_t base)
{
return mmio_read_32(base + GICD_SGIR);
}
@@ -212,12 +212,12 @@ static inline unsigned int gicd_read_sgir(unsigned int base)
* GIC Distributor interface accessors for writing entire registers
******************************************************************************/
static inline void gicd_write_ctlr(unsigned int base, unsigned int val)
static inline void gicd_write_ctlr(uintptr_t base, unsigned int val)
{
mmio_write_32(base + GICD_CTLR, val);
}
static inline void gicd_write_sgir(unsigned int base, unsigned int val)
static inline void gicd_write_sgir(uintptr_t base, unsigned int val)
{
mmio_write_32(base + GICD_SGIR, val);
}
@@ -227,47 +227,47 @@ static inline void gicd_write_sgir(unsigned int base, unsigned int val)
* GIC CPU interface accessors for reading entire registers
******************************************************************************/
static inline unsigned int gicc_read_ctlr(unsigned int base)
static inline unsigned int gicc_read_ctlr(uintptr_t base)
{
return mmio_read_32(base + GICC_CTLR);
}
static inline unsigned int gicc_read_pmr(unsigned int base)
static inline unsigned int gicc_read_pmr(uintptr_t base)
{
return mmio_read_32(base + GICC_PMR);
}
static inline unsigned int gicc_read_BPR(unsigned int base)
static inline unsigned int gicc_read_BPR(uintptr_t base)
{
return mmio_read_32(base + GICC_BPR);
}
static inline unsigned int gicc_read_IAR(unsigned int base)
static inline unsigned int gicc_read_IAR(uintptr_t base)
{
return mmio_read_32(base + GICC_IAR);
}
static inline unsigned int gicc_read_EOIR(unsigned int base)
static inline unsigned int gicc_read_EOIR(uintptr_t base)
{
return mmio_read_32(base + GICC_EOIR);
}
static inline unsigned int gicc_read_hppir(unsigned int base)
static inline unsigned int gicc_read_hppir(uintptr_t base)
{
return mmio_read_32(base + GICC_HPPIR);
}
static inline unsigned int gicc_read_ahppir(unsigned int base)
static inline unsigned int gicc_read_ahppir(uintptr_t base)
{
return mmio_read_32(base + GICC_AHPPIR);
}
static inline unsigned int gicc_read_dir(unsigned int base)
static inline unsigned int gicc_read_dir(uintptr_t base)
{
return mmio_read_32(base + GICC_DIR);
}
static inline unsigned int gicc_read_iidr(unsigned int base)
static inline unsigned int gicc_read_iidr(uintptr_t base)
{
return mmio_read_32(base + GICC_IIDR);
}
@@ -277,38 +277,38 @@ static inline unsigned int gicc_read_iidr(unsigned int base)
* GIC CPU interface accessors for writing entire registers
******************************************************************************/
static inline void gicc_write_ctlr(unsigned int base, unsigned int val)
static inline void gicc_write_ctlr(uintptr_t base, unsigned int val)
{
mmio_write_32(base + GICC_CTLR, val);
}
static inline void gicc_write_pmr(unsigned int base, unsigned int val)
static inline void gicc_write_pmr(uintptr_t base, unsigned int val)
{
mmio_write_32(base + GICC_PMR, val);
}
static inline void gicc_write_BPR(unsigned int base, unsigned int val)
static inline void gicc_write_BPR(uintptr_t base, unsigned int val)
{
mmio_write_32(base + GICC_BPR, val);
}
static inline void gicc_write_IAR(unsigned int base, unsigned int val)
static inline void gicc_write_IAR(uintptr_t base, unsigned int val)
{
mmio_write_32(base + GICC_IAR, val);
}
static inline void gicc_write_EOIR(unsigned int base, unsigned int val)
static inline void gicc_write_EOIR(uintptr_t base, unsigned int val)
{
mmio_write_32(base + GICC_EOIR, val);
}
static inline void gicc_write_hppir(unsigned int base, unsigned int val)
static inline void gicc_write_hppir(uintptr_t base, unsigned int val)
{
mmio_write_32(base + GICC_HPPIR, val);
}
static inline void gicc_write_dir(unsigned int base, unsigned int val)
static inline void gicc_write_dir(uintptr_t base, unsigned int val)
{
mmio_write_32(base + GICC_DIR, val);
}

2
include/drivers/arm/tzc400.h
View File

@@ -189,7 +189,7 @@ typedef enum {
} tzc_region_attributes_t;
void tzc_init(uint64_t base);
void tzc_init(uintptr_t base);
void tzc_configure_region0(tzc_region_attributes_t sec_attr,
uint32_t ns_device_access);
void tzc_configure_region(uint32_t filters,

4
include/drivers/console.h
View File

@@ -31,7 +31,9 @@
#ifndef __CONSOLE_H__
#define __CONSOLE_H__
int console_init(unsigned long base_addr,
#include <stdint.h>
int console_init(uintptr_t base_addr,
unsigned int uart_clk, unsigned int baud_rate);
int console_putc(int c);
int console_getc(void);

9
include/plat/arm/common/arm_config.h
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@@ -30,6 +30,7 @@
#ifndef __ARM_CONFIG_H__
#define __ARM_CONFIG_H__
#include <stdint.h>
enum arm_config_flags {
/* Whether Base memory map is in use */
@@ -41,10 +42,10 @@ enum arm_config_flags {
};
typedef struct arm_config {
unsigned int gicd_base;
unsigned int gicc_base;
unsigned int gich_base;
unsigned int gicv_base;
uintptr_t gicd_base;
uintptr_t gicc_base;
uintptr_t gich_base;
uintptr_t gicv_base;
unsigned int max_aff0;
unsigned int max_aff1;
unsigned long flags;