From 269c330f0e32a2c26e03fc932f9b02426ee09b79 Mon Sep 17 00:00:00 2001 From: Divya Jyothi Date: Thu, 16 Apr 2015 15:20:34 -0700 Subject: [PATCH] mec1322: Add SPI flash layout for lfw / ro / rw architecture mec1322 bootloader looks for a CRC TAG at the xFF00 boundary of the flash before it loads the ec onto SRAM for execution. Code for EC will be packed to occupy the last 256k of Flash. That way the binay generation is independent of the flash size. The last 20000h is RO + lfw followed by 20000h space for RW. BUG=chromium:37510 TEST=make -j buildall BRANCH=None Change-Id: Ie75bd8a40826d630b3022b5b3ecb2d6ad3aa2471 Signed-off-by: Divya Jyothi Reviewed-on: https://chromium-review.googlesource.com/265885 Reviewed-by: Shawn N --- chip/mec1322/config_chip.h | 25 ++++++++++++++++++++++++- 1 file changed, 24 insertions(+), 1 deletion(-) diff --git a/chip/mec1322/config_chip.h b/chip/mec1322/config_chip.h index ecf2f5ade8..b02fdc2242 100644 --- a/chip/mec1322/config_chip.h +++ b/chip/mec1322/config_chip.h @@ -84,8 +84,31 @@ #define CONFIG_FW_RO_SIZE CONFIG_FW_IMAGE_SIZE #define CONFIG_FLASH_SIZE CONFIG_FLASH_PHYSICAL_SIZE +/****************************************************************************/ +/* SPI Flash Memory Mapping */ + /* - * TODO(crosbug.com/p/37510): Implement a loader to load either RO or RW at + * Size of total image used ( 256k = lfw + RSA Keys + RO + RW images) + * located at the end of the flash. + */ +#define CONFIG_FLASH_BASE_SPI (CONFIG_SPI_FLASH_SIZE - (0x40000)) + +#define CONFIG_RO_WP_SPI_OFF 0x20000 +#define CONFIG_RO_SPI_OFF 0x20000 +#define CONFIG_RW_SPI_OFF 0 +#define CONFIG_RO_IMAGE_FLASHADDR (CONFIG_FLASH_BASE_SPI + \ + CONFIG_RO_SPI_OFF) +#define CONFIG_RW_IMAGE_FLASHADDR (CONFIG_FLASH_BASE_SPI + \ + CONFIG_RW_SPI_OFF) +/* Memory Location shared between lfw and RO/RW image */ +/* + * TODO(crosbug.com/p/37510): Alter to the right value when lfw + Ro/RW + * architecture is enabled. + */ +#define SHARED_RAM_LFW_RORW 0 + +/* + * TODO(crosbug.com/p/37510): Implement a lfw to load either RO or RW at * runtime. Since this doesn't exist yet and we're running low on program * memory, only flash + load RW for now. */