From 290ae152c110d605f755cfd28eb4ad48ef2117e2 Mon Sep 17 00:00:00 2001 From: Kevin K Wong Date: Tue, 9 Feb 2016 16:57:26 -0800 Subject: [PATCH] apollolake: ignore PLTRST# from SOC unless RSMRST# to soc is deasserted signals output from SOC should be considered invalid until EC has de-asserted RSMRST# to SOC. BUG=none BRANCH=none TEST=make buildall, able to boot to OS on amenia Change-Id: I15aee314263e3f1b41c45fb719249cd2579a6bc7 Signed-off-by: Kevin K Wong Reviewed-on: https://chromium-review.googlesource.com/331654 Reviewed-by: Li1 Feng Reviewed-by: Shawn N --- chip/npcx/lpc.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/chip/npcx/lpc.c b/chip/npcx/lpc.c index 27cefcfce8..03cb684e5a 100644 --- a/chip/npcx/lpc.c +++ b/chip/npcx/lpc.c @@ -756,6 +756,14 @@ void lpc_lreset_pltrst_handler(void) /* Clear pending bit of WUI */ SET_BIT(NPCX_WKPCL(MIWU_TABLE_0 , MIWU_GROUP_5), 7); +#ifdef GPIO_PCH_RSMRST_L + /* Ignore PLTRST# from SOC unless RSMRST# to soc is deasserted */ + if (!gpio_get_level(GPIO_PCH_RSMRST_L)) + return; +#endif + + ccprintf("[%T PLTRST deasserted]\n"); + /* * Once LRESET is de-asserted (low -> high), we need to intialize lpc * settings once. If RSTCTL_LRESET_PLTRST_MODE is active, LPC registers