From 2dc7016541daf1bf7e9e96131eced09fe6a94776 Mon Sep 17 00:00:00 2001 From: Vincent Palatin Date: Mon, 17 Mar 2014 17:30:36 -0700 Subject: [PATCH] cortex-m0: add more thumb1 helpers Add other helpers for compact switch on ARMv6-M. Signed-off-by: Vincent Palatin BRANCH=none BUG=none TEST=none Change-Id: I711ee8361ff1545acd978974d9f9fc306ca43b78 Reviewed-on: https://chromium-review.googlesource.com/190711 Tested-by: Vincent Palatin Reviewed-by: Randall Spangler Commit-Queue: Vincent Palatin --- core/cortex-m0/thumb_case.S | 64 ++++++++++++++++++++++++++++++------- 1 file changed, 53 insertions(+), 11 deletions(-) diff --git a/core/cortex-m0/thumb_case.S b/core/cortex-m0/thumb_case.S index 1229988d9f..be6c02b764 100644 --- a/core/cortex-m0/thumb_case.S +++ b/core/cortex-m0/thumb_case.S @@ -13,10 +13,10 @@ .code 16 /* - * Helper for compact switch + * Helpers for compact switch * * r0: the table index - * lr: the table base address + * lr: the table base address (need to clear bit 0) * * r0 and lr must be PRESERVED. * r12 can be clobbered. @@ -24,12 +24,54 @@ .global __gnu_thumb1_case_uqi .thumb_func __gnu_thumb1_case_uqi: - push {r1} - mov r1, lr - lsrs r1, r1, #1 - lsls r1, r1, #1 - ldrb r1, [r1, r0] - lsls r1, r1, #1 - add lr, lr, r1 - pop {r1} - bx lr + mov r12, r1 + mov r1, lr + lsrs r1, r1, #1 + lsls r1, r1, #1 + ldrb r1, [r1, r0] + lsls r1, r1, #1 + add lr, lr, r1 + mov r1, r12 + bx lr + +.global __gnu_thumb1_case_sqi +.thumb_func +__gnu_thumb1_case_sqi: + mov r12, r1 + mov r1, lr + lsrs r1, r1, #1 + lsls r1, r1, #1 + ldrsb r1, [r1, r0] + lsls r1, r1, #1 + add lr, lr, r1 + mov r1, r12 + bx lr + +.global __gnu_thumb1_case_uhi +.thumb_func +__gnu_thumb1_case_uhi: + push {r0, r1} + mov r1, lr + lsrs r1, r1, #1 + lsls r0, r0, #1 + lsls r1, r1, #1 + ldrh r1, [r1, r0] + lsls r1, r1, #1 + add lr, lr, r1 + pop {r0, r1} + bx lr + + +.global __gnu_thumb1_case_shi +.thumb_func +__gnu_thumb1_case_shi: + push {r0, r1} + mov r1, lr + lsrs r1, r1, #1 + lsls r0, r0, #1 + lsls r1, r1, #1 + ldrsh r1, [r1, r0] + lsls r1, r1, #1 + add lr, lr, r1 + pop {r0, r1} + bx lr