From 33fe8c5b5fa371a334d0f5594413a2a4b959dfd0 Mon Sep 17 00:00:00 2001 From: Alec Berg Date: Mon, 22 Sep 2014 09:10:13 -0700 Subject: [PATCH] stm32f0: fix UART clock source for console on UART2 Bug fix. Recently changed to use HSI 8MHz clock as clock source for console UART, but the clock register was set incorrectly for the case that the console UART is UART2. BUG=chrome-os-partner:32170 BRANCH=none TEST=Tested on fruitpie which is using UART2 for console. Verified that console works. Change-Id: Ied629eb3828e5fab911acb6a8e5f4087563ddb32 Signed-off-by: Alec Berg Reviewed-on: https://chromium-review.googlesource.com/219312 Reviewed-by: Vic Yang --- chip/stm32/uart.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/chip/stm32/uart.c b/chip/stm32/uart.c index 6dec7e41e1..aa5ea2ffca 100644 --- a/chip/stm32/uart.c +++ b/chip/stm32/uart.c @@ -238,9 +238,9 @@ void uart_init(void) /* Enable USART clock */ #ifdef CHIP_FAMILY_STM32F0 #if (UARTN == 1) - STM32_RCC_CFGR3 |= 0x0003; /* USART1 clock source from HSI(8MHz) */ + STM32_RCC_CFGR3 |= 0x0003; /* USART1 clock source from HSI(8MHz) */ #elif (UARTN == 2) - STM32_RCC_CFGR3 |= 0x0300; /* USART2 clock source from HSI(8MHz) */ + STM32_RCC_CFGR3 |= 0x030000; /* USART2 clock source from HSI(8MHz) */ #endif /* UARTN */ #endif /* CHIP_FAMILY_STM32F0 */