From 3cb77ee041d3dbf9b27dc5baabcdf10b82914e48 Mon Sep 17 00:00:00 2001 From: CHLin Date: Thu, 7 Jul 2016 16:11:51 +0800 Subject: [PATCH] npcx: Clear IRQ11B bit when PM 1 is in enhanced mode The bit IRQ11B of register HIIRQC is meaningful only when PM Channel 1 is in PC87570-Compatible. In previous commit, we deprecate use of PC87570 mode but set the bit unintentionally. This will not cause any bug but may make confused when reading the code. Modified sources: 1. lpc.c: CLear IRQ11B in register HIIRQC. BUG=chrome-os-partner:34346 TEST=make buildall -j; verify on Wheatley BRANCH=none Signed-off-by: CHLin Change-Id: I594222c29557add847a1f689859fdf558d64fdd3 Reviewed-on: https://chromium-review.googlesource.com/358536 Commit-Ready: CH Lin Tested-by: CH Lin Reviewed-by: Mulin Chao Reviewed-by: Amit Maoz Reviewed-by: Shawn N --- chip/npcx/lpc.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/chip/npcx/lpc.c b/chip/npcx/lpc.c index f1c0dbde33..a8a10d0a9a 100644 --- a/chip/npcx/lpc.c +++ b/chip/npcx/lpc.c @@ -851,7 +851,7 @@ static void lpc_init(void) */ NPCX_HIPMCTL(PMC_ACPI) |= 0x83; /* Normally Polarity IRQ1,12 type (level + high) setting */ - NPCX_HIIRQC = 0x04; + NPCX_HIIRQC = 0x00; /* * Init PORT80