scottk/OpenCellular
1
0
Fork 0
mirror of https://github.com/Telecominfraproject/OpenCellular.git synced 2025-12-31 11:01:19 +00:00
Code Issues Packages Projects Releases Wiki Activity

stm32f0/i2c: adjust the 100kHz setting to never go above 100kHz

Browse Source 
STM32 seems to actually measure the rising and falling time of the I2C clock, so
if one uses a really small resistor the timing will go faster than with a bigger
resistor.

This commit makes it so the I2C frequency is limited to max 100kHz (respecting
the spec) no matter what size resistor (essentially we assume 0 rise and fall
times). While this will make stuff slower on boards with big resistors (where
they might have been under 100kHz anyway) this is the best compromise (since the
spec does not specify min frequency) without getting config defines for the
fall/rise times.

The TSCLH of some boards would be too short with the recommended timing
settings from spec, so increases the TSCLH would be better for everyone.

This patch does not touch the higher frequencies since the rise and fall times
do contribute a lot more to clocks, if the same method was used for those
frequencies, the speeds would have to be a lot slower.

BUG=chrome-os-partner:34375
BRANCH=None
TEST=on any EC, note how frequency does not go above 100kHz
TEST=As per tSCL = tSYNC1 + tSYNC2 + { [(SCLH+1) + (SCLL+1)] x
      (PRESC+1) x tI2CCLK } from datasheet

Change-Id: Ibbeecac7f3da1b22d2ba3bca29ee3c17bfe997f5
Signed-off-by: Chris Zhong <zyw@rock-chips.com>
Signed-off-by: Alexandru M Stan <amstan@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/234077
Reviewed-by: Randall Spangler <rspangler@chromium.org>
This commit is contained in:
Chris Zhong
2014-12-09 14:10:36 +08:00
committed by chrome-internal-fetch
parent ee5dbe94a0
commit 48b2edf031
1 changed files with 2 additions and 2 deletions
Download Patch File Download Diff File Expand all files Collapse all files

4
chip/stm32/i2c-stm32f0.c
View File

@@ -82,11 +82,11 @@ static void i2c_set_freq_port(const struct i2c_port_t *p)
STM32_I2C_TIMINGR(port) = 0x50330309;
break;
case 100:
STM32_I2C_TIMINGR(port) = 0xB0420F13;
STM32_I2C_TIMINGR(port) = 0xB0421214;
break;
default: /* unknown speed, defaults to 100kBps */
CPRINTS("I2C bad speed %d kBps", p->kbps);
STM32_I2C_TIMINGR(port) = 0xB0420F13;
STM32_I2C_TIMINGR(port) = 0xB0421214;
}
/* Enable port */
STM32_I2C_CR1(port) = STM32_I2C_CR1_PE;