diff --git a/board/npcx_evb_arm/board.h b/board/npcx_evb_arm/board.h
index 4678d86224..ca572b8a0b 100644
--- a/board/npcx_evb_arm/board.h
+++ b/board/npcx_evb_arm/board.h
@@ -11,7 +11,7 @@
 /* Optional modules */
 #define CONFIG_ADC
 #define CONFIG_PWM
-#define CONFIG_SHI /* Used in ARM-based platform for host interface */
+#define CONFIG_HOSTCMD_SPS /* Used in ARM-based platform for host interface */
 
 /* Optional features */
 #define CONFIG_SYSTEM_UNLOCKED /* Allow dangerous commands for testing */
diff --git a/chip/npcx/build.mk b/chip/npcx/build.mk
index 09f59e3710..8240634be6 100644
--- a/chip/npcx/build.mk
+++ b/chip/npcx/build.mk
@@ -21,7 +21,7 @@ chip-$(CONFIG_FLASH)+=flash.o
 chip-$(CONFIG_I2C)+=i2c.o
 chip-$(CONFIG_LPC)+=lpc.o
 chip-$(CONFIG_PECI)+=peci.o
-chip-$(CONFIG_SHI)+=shi.o
+chip-$(CONFIG_HOSTCMD_SPS)+=shi.o
 # pwm functions are implemented with the fan functions
 chip-$(CONFIG_PWM)+=pwm.o
 chip-$(CONFIG_SPI)+=spi.o
diff --git a/chip/npcx/gpio.c b/chip/npcx/gpio.c
index bd310b214f..9dae6d0f6f 100644
--- a/chip/npcx/gpio.c
+++ b/chip/npcx/gpio.c
@@ -679,7 +679,7 @@ void gpio_pre_init(void)
 #endif
 
 	/* Pin_Mux for LPC & SHI */
-#ifdef CONFIG_SHI
+#ifdef CONFIG_HOSTCMD_SPS
 	/* Switching to eSPI mode for SHI interface */
 	NPCX_DEVCNT |= 0x08;
 	/* Alternate Intel bus interface LPC/eSPI to GPIOs first */
diff --git a/chip/npcx/shi_chip.h b/chip/npcx/shi_chip.h
index 2edd513bfc..8aac7661a5 100644
--- a/chip/npcx/shi_chip.h
+++ b/chip/npcx/shi_chip.h
@@ -1,4 +1,4 @@
-/* Copyright (c) 2015 The Chromium OS Authors. All rights reserved.
+/* Copyright 2015 The Chromium OS Authors. All rights reserved.
  * Use of this source code is governed by a BSD-style license that can be
  * found in the LICENSE file.
  */
@@ -8,7 +8,7 @@
 #ifndef SHI_CHIP_H_
 #define SHI_CHIP_H_
 
-#ifdef CONFIG_SHI
+#ifdef CONFIG_HOSTCMD_SPS
 /**
  * Called when the NSS level changes, signalling the start of a SHI
  * transaction.