From da0af78aa230d3a873923e05643071f761f593e2 Mon Sep 17 00:00:00 2001 From: Dan Handley Date: Fri, 1 Aug 2014 17:58:27 +0100 Subject: [PATCH 1/2] Move TSP private declarations into separate header Move the TSP private declarations out of tsp.h and into a new header, tsp_private.h. This clarifies the TSP interface to the TSPD. Change-Id: I39af346eeba3350cadcac56c02d97a5cb978c28b --- bl32/tsp/aarch64/tsp_entrypoint.S | 1 + bl32/tsp/tsp_interrupt.c | 3 +- bl32/tsp/tsp_main.c | 1 + bl32/tsp/tsp_private.h | 133 ++++++++++++++++++++++++++++++ bl32/tsp/tsp_timer.c | 2 +- include/bl32/payloads/tsp.h | 89 +------------------- 6 files changed, 140 insertions(+), 89 deletions(-) create mode 100644 bl32/tsp/tsp_private.h diff --git a/bl32/tsp/aarch64/tsp_entrypoint.S b/bl32/tsp/aarch64/tsp_entrypoint.S index 75ee443497..555f120bae 100644 --- a/bl32/tsp/aarch64/tsp_entrypoint.S +++ b/bl32/tsp/aarch64/tsp_entrypoint.S @@ -32,6 +32,7 @@ #include #include #include +#include "../tsp_private.h" .globl tsp_entrypoint diff --git a/bl32/tsp/tsp_interrupt.c b/bl32/tsp/tsp_interrupt.c index 65c581f658..3ae54932c0 100644 --- a/bl32/tsp/tsp_interrupt.c +++ b/bl32/tsp/tsp_interrupt.c @@ -32,9 +32,10 @@ #include #include #include -#include #include #include +#include +#include "tsp_private.h" /******************************************************************************* * This function updates the TSP statistics for FIQs handled synchronously i.e diff --git a/bl32/tsp/tsp_main.c b/bl32/tsp/tsp_main.c index 982bab2fb4..31808fcfb1 100644 --- a/bl32/tsp/tsp_main.c +++ b/bl32/tsp/tsp_main.c @@ -35,6 +35,7 @@ #include #include #include +#include "tsp_private.h" /******************************************************************************* * Declarations of linker defined symbols which will help us find the layout diff --git a/bl32/tsp/tsp_private.h b/bl32/tsp/tsp_private.h new file mode 100644 index 0000000000..39fb5f663a --- /dev/null +++ b/bl32/tsp/tsp_private.h @@ -0,0 +1,133 @@ +/* + * Copyright (c) 2014, ARM Limited and Contributors. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * Neither the name of ARM nor the names of its contributors may be used + * to endorse or promote products derived from this software without specific + * prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef __TSP_PRIVATE_H__ +#define __TSP_PRIVATE_H__ + +/* Definitions to help the assembler access the SMC/ERET args structure */ +#define TSP_ARGS_SIZE 0x40 +#define TSP_ARG0 0x0 +#define TSP_ARG1 0x8 +#define TSP_ARG2 0x10 +#define TSP_ARG3 0x18 +#define TSP_ARG4 0x20 +#define TSP_ARG5 0x28 +#define TSP_ARG6 0x30 +#define TSP_ARG7 0x38 +#define TSP_ARGS_END 0x40 + + +#ifndef __ASSEMBLY__ + +#include +#include /* For CACHE_WRITEBACK_GRANULE */ +#include +#include +#include + + +typedef struct work_statistics { + uint32_t fiq_count; /* Number of FIQs on this cpu */ + uint32_t irq_count; /* Number of IRQs on this cpu */ + uint32_t sync_fiq_count; /* Number of sync. fiqs on this cpu */ + uint32_t sync_fiq_ret_count; /* Number of fiq returns on this cpu */ + uint32_t smc_count; /* Number of returns on this cpu */ + uint32_t eret_count; /* Number of entries on this cpu */ + uint32_t cpu_on_count; /* Number of cpu on requests */ + uint32_t cpu_off_count; /* Number of cpu off requests */ + uint32_t cpu_suspend_count; /* Number of cpu suspend requests */ + uint32_t cpu_resume_count; /* Number of cpu resume requests */ +} __aligned(CACHE_WRITEBACK_GRANULE) work_statistics_t; + +typedef struct tsp_args { + uint64_t _regs[TSP_ARGS_END >> 3]; +} __aligned(CACHE_WRITEBACK_GRANULE) tsp_args_t; + +/* Macros to access members of the above structure using their offsets */ +#define read_sp_arg(args, offset) ((args)->_regs[offset >> 3]) +#define write_sp_arg(args, offset, val) (((args)->_regs[offset >> 3]) \ + = val) +/* + * Ensure that the assembler's view of the size of the tsp_args is the + * same as the compilers + */ +CASSERT(TSP_ARGS_SIZE == sizeof(tsp_args_t), assert_sp_args_size_mismatch); + +void tsp_get_magic(uint64_t args[4]); + +tsp_args_t *tsp_cpu_resume_main(uint64_t arg0, + uint64_t arg1, + uint64_t arg2, + uint64_t arg3, + uint64_t arg4, + uint64_t arg5, + uint64_t arg6, + uint64_t arg7); +tsp_args_t *tsp_cpu_suspend_main(uint64_t arg0, + uint64_t arg1, + uint64_t arg2, + uint64_t arg3, + uint64_t arg4, + uint64_t arg5, + uint64_t arg6, + uint64_t arg7); +tsp_args_t *tsp_cpu_on_main(void); +tsp_args_t *tsp_cpu_off_main(uint64_t arg0, + uint64_t arg1, + uint64_t arg2, + uint64_t arg3, + uint64_t arg4, + uint64_t arg5, + uint64_t arg6, + uint64_t arg7); + +/* Generic Timer functions */ +void tsp_generic_timer_start(void); +void tsp_generic_timer_handler(void); +void tsp_generic_timer_stop(void); +void tsp_generic_timer_save(void); +void tsp_generic_timer_restore(void); + +/* FIQ management functions */ +void tsp_update_sync_fiq_stats(uint32_t type, uint64_t elr_el3); + + +/* Data structure to keep track of TSP statistics */ +extern spinlock_t console_lock; +extern work_statistics_t tsp_stats[PLATFORM_CORE_COUNT]; + +/* Vector table of jumps */ +extern tsp_vectors_t tsp_vector_table; + + +#endif /* __ASSEMBLY__ */ + +#endif /* __TSP_PRIVATE_H__ */ + diff --git a/bl32/tsp/tsp_timer.c b/bl32/tsp/tsp_timer.c index a7fdfdafce..d9460b69da 100644 --- a/bl32/tsp/tsp_timer.c +++ b/bl32/tsp/tsp_timer.c @@ -30,7 +30,7 @@ #include #include #include -#include +#include "tsp_private.h" /******************************************************************************* * Data structure to keep track of per-cpu secure generic timer context across diff --git a/include/bl32/payloads/tsp.h b/include/bl32/payloads/tsp.h index 2db3b34676..c0b191f79c 100644 --- a/include/bl32/payloads/tsp.h +++ b/include/bl32/payloads/tsp.h @@ -98,25 +98,12 @@ /* 0xbf00ff02 is reserved */ #define TOS_CALL_VERSION 0xbf00ff03 /* Trusted OS Call Version */ -/* Definitions to help the assembler access the SMC/ERET args structure */ -#define TSP_ARGS_SIZE 0x40 -#define TSP_ARG0 0x0 -#define TSP_ARG1 0x8 -#define TSP_ARG2 0x10 -#define TSP_ARG3 0x18 -#define TSP_ARG4 0x20 -#define TSP_ARG5 0x28 -#define TSP_ARG6 0x30 -#define TSP_ARG7 0x38 -#define TSP_ARGS_END 0x40 #ifndef __ASSEMBLY__ -#include -#include /* For CACHE_WRITEBACK_GRANULE */ -#include #include + typedef uint32_t tsp_vector_isn_t; typedef struct tsp_vectors { @@ -129,79 +116,7 @@ typedef struct tsp_vectors { tsp_vector_isn_t fiq_entry; } tsp_vectors_t; -typedef struct work_statistics { - uint32_t fiq_count; /* Number of FIQs on this cpu */ - uint32_t irq_count; /* Number of IRQs on this cpu */ - uint32_t sync_fiq_count; /* Number of sync. fiqs on this cpu */ - uint32_t sync_fiq_ret_count; /* Number of fiq returns on this cpu */ - uint32_t smc_count; /* Number of returns on this cpu */ - uint32_t eret_count; /* Number of entries on this cpu */ - uint32_t cpu_on_count; /* Number of cpu on requests */ - uint32_t cpu_off_count; /* Number of cpu off requests */ - uint32_t cpu_suspend_count; /* Number of cpu suspend requests */ - uint32_t cpu_resume_count; /* Number of cpu resume requests */ -} __aligned(CACHE_WRITEBACK_GRANULE) work_statistics_t; - -typedef struct tsp_args { - uint64_t _regs[TSP_ARGS_END >> 3]; -} __aligned(CACHE_WRITEBACK_GRANULE) tsp_args_t; - -/* Macros to access members of the above structure using their offsets */ -#define read_sp_arg(args, offset) ((args)->_regs[offset >> 3]) -#define write_sp_arg(args, offset, val) (((args)->_regs[offset >> 3]) \ - = val) - -/* - * Ensure that the assembler's view of the size of the tsp_args is the - * same as the compilers - */ -CASSERT(TSP_ARGS_SIZE == sizeof(tsp_args_t), assert_sp_args_size_mismatch); - -void tsp_get_magic(uint64_t args[4]); - -tsp_args_t *tsp_cpu_resume_main(uint64_t arg0, - uint64_t arg1, - uint64_t arg2, - uint64_t arg3, - uint64_t arg4, - uint64_t arg5, - uint64_t arg6, - uint64_t arg7); -tsp_args_t *tsp_cpu_suspend_main(uint64_t arg0, - uint64_t arg1, - uint64_t arg2, - uint64_t arg3, - uint64_t arg4, - uint64_t arg5, - uint64_t arg6, - uint64_t arg7); -tsp_args_t *tsp_cpu_on_main(void); -tsp_args_t *tsp_cpu_off_main(uint64_t arg0, - uint64_t arg1, - uint64_t arg2, - uint64_t arg3, - uint64_t arg4, - uint64_t arg5, - uint64_t arg6, - uint64_t arg7); - -/* Generic Timer functions */ -void tsp_generic_timer_start(void); -void tsp_generic_timer_handler(void); -void tsp_generic_timer_stop(void); -void tsp_generic_timer_save(void); -void tsp_generic_timer_restore(void); - -/* FIQ management functions */ -void tsp_update_sync_fiq_stats(uint32_t type, uint64_t elr_el3); - -/* Data structure to keep track of TSP statistics */ -extern spinlock_t console_lock; -extern work_statistics_t tsp_stats[PLATFORM_CORE_COUNT]; - -/* Vector table of jumps */ -extern tsp_vectors_t tsp_vector_table; #endif /* __ASSEMBLY__ */ -#endif /* __BL2_H__ */ +#endif /* __TSP_H__ */ From 5a06bb7e0b3ec6c98857423f52a1f98b54e46303 Mon Sep 17 00:00:00 2001 From: Dan Handley Date: Mon, 4 Aug 2014 11:41:20 +0100 Subject: [PATCH 2/2] Clarify platform porting interface to TSP * Move TSP platform porting functions to new file: include/bl32/tsp/platform_tsp.h. * Create new TSP_IRQ_SEC_PHY_TIMER definition for use by the generic TSP interrupt handling code, instead of depending on the FVP specific definition IRQ_SEC_PHY_TIMER. * Rename TSP platform porting functions from bl32_* to tsp_*, and definitions from BL32_* to TSP_*. * Update generic TSP code to use new platform porting function names and definitions. * Update FVP port accordingly and move all TSP source files to: plat/fvp/tsp/. * Update porting guide with above changes. Note: THIS CHANGE REQUIRES ALL PLATFORM PORTS OF THE TSP TO BE UPDATED Fixes ARM-software/tf-issues#167 Change-Id: Ic0ff8caf72aebb378d378193d2f017599fc6b78f --- Makefile | 2 - bl32/tsp/aarch64/tsp_entrypoint.S | 4 +- bl32/tsp/tsp.ld.S | 4 +- bl32/tsp/tsp.mk | 4 +- bl32/tsp/tsp_interrupt.c | 4 +- bl32/tsp/tsp_main.c | 3 +- docs/porting-guide.md | 44 ++++++++++++------- include/bl32/tsp/platform_tsp.h | 44 +++++++++++++++++++ include/bl32/{payloads => tsp}/tsp.h | 0 include/plat/common/platform.h | 7 +-- plat/fvp/aarch64/fvp_helpers.S | 2 +- plat/fvp/include/platform_def.h | 14 +++--- {bl32 => plat/fvp}/tsp/tsp-fvp.mk | 2 +- .../{bl32_fvp_setup.c => tsp/tsp_fvp_setup.c} | 12 ++--- services/spd/tspd/tspd.mk | 2 +- 15 files changed, 101 insertions(+), 47 deletions(-) create mode 100644 include/bl32/tsp/platform_tsp.h rename include/bl32/{payloads => tsp}/tsp.h (100%) rename {bl32 => plat/fvp}/tsp/tsp-fvp.mk (98%) rename plat/fvp/{bl32_fvp_setup.c => tsp/tsp_fvp_setup.c} (95%) diff --git a/Makefile b/Makefile index 89e882a6fd..520a0d7e39 100644 --- a/Makefile +++ b/Makefile @@ -174,8 +174,6 @@ endif INCLUDES += -Iinclude/bl31 \ -Iinclude/bl31/services \ - -Iinclude/bl32 \ - -Iinclude/bl32/payloads \ -Iinclude/common \ -Iinclude/drivers \ -Iinclude/drivers/arm \ diff --git a/bl32/tsp/aarch64/tsp_entrypoint.S b/bl32/tsp/aarch64/tsp_entrypoint.S index 555f120bae..1838d5a8d4 100644 --- a/bl32/tsp/aarch64/tsp_entrypoint.S +++ b/bl32/tsp/aarch64/tsp_entrypoint.S @@ -120,8 +120,8 @@ func tsp_entrypoint * specific early arch. setup e.g. mmu setup * --------------------------------------------- */ - bl bl32_early_platform_setup - bl bl32_plat_arch_setup + bl tsp_early_platform_setup + bl tsp_plat_arch_setup /* --------------------------------------------- * Jump to main function. diff --git a/bl32/tsp/tsp.ld.S b/bl32/tsp/tsp.ld.S index 5807141f1e..5d7ffa1193 100644 --- a/bl32/tsp/tsp.ld.S +++ b/bl32/tsp/tsp.ld.S @@ -68,8 +68,8 @@ SECTIONS __DATA_END__ = .; } >RAM -#ifdef BL32_PROGBITS_LIMIT - ASSERT(. <= BL32_PROGBITS_LIMIT, "BL3-2 progbits has exceeded its limit.") +#ifdef TSP_PROGBITS_LIMIT + ASSERT(. <= TSP_PROGBITS_LIMIT, "TSP progbits has exceeded its limit.") #endif stacks (NOLOAD) : { diff --git a/bl32/tsp/tsp.mk b/bl32/tsp/tsp.mk index 02cc13d321..f17ef1e15c 100644 --- a/bl32/tsp/tsp.mk +++ b/bl32/tsp/tsp.mk @@ -28,6 +28,8 @@ # POSSIBILITY OF SUCH DAMAGE. # +INCLUDES += -Iinclude/bl32/tsp + BL32_SOURCES += bl32/tsp/tsp_main.c \ bl32/tsp/aarch64/tsp_entrypoint.S \ bl32/tsp/aarch64/tsp_exceptions.S \ @@ -50,7 +52,7 @@ $(eval $(call add_define,TSP_INIT_ASYNC)) # Include the platform-specific TSP Makefile # If no platform-specific TSP Makefile exists, it means TSP is not supported # on this platform. -TSP_PLAT_MAKEFILE := bl32/tsp/tsp-${PLAT}.mk +TSP_PLAT_MAKEFILE := plat/${PLAT}/tsp/tsp-${PLAT}.mk ifeq (,$(wildcard ${TSP_PLAT_MAKEFILE})) $(error TSP is not supported on platform ${PLAT}) else diff --git a/bl32/tsp/tsp_interrupt.c b/bl32/tsp/tsp_interrupt.c index 3ae54932c0..7163badd9f 100644 --- a/bl32/tsp/tsp_interrupt.c +++ b/bl32/tsp/tsp_interrupt.c @@ -88,7 +88,7 @@ int32_t tsp_fiq_handler(void) id = plat_ic_get_pending_interrupt_id(); /* TSP can only handle the secure physical timer interrupt */ - if (id != IRQ_SEC_PHY_TIMER) + if (id != TSP_IRQ_SEC_PHY_TIMER) return TSP_EL3_FIQ; /* @@ -96,7 +96,7 @@ int32_t tsp_fiq_handler(void) * another secure interrupt through an assertion. */ id = plat_ic_acknowledge_interrupt(); - assert(id == IRQ_SEC_PHY_TIMER); + assert(id == TSP_IRQ_SEC_PHY_TIMER); tsp_generic_timer_handler(); plat_ic_end_of_interrupt(id); diff --git a/bl32/tsp/tsp_main.c b/bl32/tsp/tsp_main.c index 31808fcfb1..08d89c3dae 100644 --- a/bl32/tsp/tsp_main.c +++ b/bl32/tsp/tsp_main.c @@ -33,6 +33,7 @@ #include #include #include +#include #include #include #include "tsp_private.h" @@ -116,7 +117,7 @@ uint64_t tsp_main(void) uint32_t linear_id = platform_get_core_pos(mpidr); /* Initialize the platform */ - bl32_platform_setup(); + tsp_platform_setup(); /* Initialize secure/applications state here */ tsp_generic_timer_start(); diff --git a/docs/porting-guide.md b/docs/porting-guide.md index 3070775ae4..62ea6a0c17 100644 --- a/docs/porting-guide.md +++ b/docs/porting-guide.md @@ -193,30 +193,42 @@ file is found in [plat/fvp/include/platform_def.h]. Defines the base address in non-secure DRAM where BL2 loads the BL3-3 binary image. Must be aligned on a page-size boundary. -If the BL3-2 image is supported by the platform, the following constants must -be defined as well: +If a BL3-2 image is supported by the platform, the following constants must +also be defined: -* **#define : TSP_SEC_MEM_BASE** +* **#define : BL32_IMAGE_NAME** - Defines the base address of the secure memory used by the BL3-2 image on the - platform. - -* **#define : TSP_SEC_MEM_SIZE** - - Defines the size of the secure memory used by the BL3-2 image on the - platform. + Name of the BL3-2 binary image on the host file-system. This name is used by + BL2 to load BL3-2 into secure memory from platform storage. * **#define : BL32_BASE** Defines the base address in secure memory where BL2 loads the BL3-2 binary - image. Must be inside the secure memory identified by `TSP_SEC_MEM_BASE` and - `TSP_SEC_MEM_SIZE` constants. Must also be aligned on a page-size boundary. + image. Must be aligned on a page-size boundary. * **#define : BL32_LIMIT** - Defines the maximum address that the BL3-2 image can occupy. Must be inside - the secure memory identified by `TSP_SEC_MEM_BASE` and `TSP_SEC_MEM_SIZE` - constants. + Defines the maximum address that the BL3-2 image can occupy. + +If the Test Secure-EL1 Payload (TSP) instantiation of BL3-2 is supported by the +platform, the following constants must also be defined: + +* **#define : TSP_SEC_MEM_BASE** + + Defines the base address of the secure memory used by the TSP image on the + platform. This must be at the same address or below `BL32_BASE`. + +* **#define : TSP_SEC_MEM_SIZE** + + Defines the size of the secure memory used by the BL3-2 image on the + platform. `TSP_SEC_MEM_BASE` and `TSP_SEC_MEM_SIZE` must fully accomodate + the memory required by the BL3-2 image, defined by `BL32_BASE` and + `BL32_LIMIT`. + +* **#define : TSP_IRQ_SEC_PHY_TIMER** + + Defines the ID of the secure physical generic timer interrupt used by the + TSP's interrupt handling code. If the platform port uses the IO storage framework, the following constants must also be defined: @@ -241,7 +253,7 @@ memory layout implies some image overlaying like on FVP. Defines the maximum address in secure RAM that the BL3-1's progbits sections can occupy. -* **#define : BL32_PROGBITS_LIMIT** +* **#define : TSP_PROGBITS_LIMIT** Defines the maximum address that the TSP's progbits sections can occupy. diff --git a/include/bl32/tsp/platform_tsp.h b/include/bl32/tsp/platform_tsp.h new file mode 100644 index 0000000000..f6f73911ec --- /dev/null +++ b/include/bl32/tsp/platform_tsp.h @@ -0,0 +1,44 @@ +/* + * Copyright (c) 2014, ARM Limited and Contributors. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * Neither the name of ARM nor the names of its contributors may be used + * to endorse or promote products derived from this software without specific + * prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef __PLATFORM_TSP_H__ + + +/******************************************************************************* + * Mandatory TSP functions (only if platform contains a TSP) + ******************************************************************************/ +void tsp_early_platform_setup(void); +void tsp_plat_arch_setup(void); +void tsp_platform_setup(void); + + +#define __PLATFORM_H__ + +#endif diff --git a/include/bl32/payloads/tsp.h b/include/bl32/tsp/tsp.h similarity index 100% rename from include/bl32/payloads/tsp.h rename to include/bl32/tsp/tsp.h diff --git a/include/plat/common/platform.h b/include/plat/common/platform.h index ab93123c5b..8e038aa7f2 100644 --- a/include/plat/common/platform.h +++ b/include/plat/common/platform.h @@ -78,6 +78,7 @@ int plat_crash_console_putc(int c); /******************************************************************************* * Mandatory BL1 functions ******************************************************************************/ +void bl1_early_platform_setup(void); void bl1_plat_arch_setup(void); void bl1_platform_setup(void); struct meminfo *bl1_plat_sec_mem_layout(void); @@ -98,6 +99,7 @@ void bl1_init_bl2_mem_layout(const struct meminfo *bl1_mem_layout, /******************************************************************************* * Mandatory BL2 functions ******************************************************************************/ +void bl2_early_platform_setup(struct meminfo *mem_layout); void bl2_plat_arch_setup(void); void bl2_platform_setup(void); struct meminfo *bl2_plat_sec_mem_layout(void); @@ -184,11 +186,6 @@ unsigned int plat_get_aff_state(unsigned int, unsigned long); ******************************************************************************/ void bl31_plat_enable_mmu(uint32_t flags); -/******************************************************************************* - * Mandatory BL3-2 functions (only if platform contains a BL3-2) - ******************************************************************************/ -void bl32_platform_setup(void); - /******************************************************************************* * Optional BL3-2 functions (may be overridden) ******************************************************************************/ diff --git a/plat/fvp/aarch64/fvp_helpers.S b/plat/fvp/aarch64/fvp_helpers.S index 922329c159..94f15c029f 100644 --- a/plat/fvp/aarch64/fvp_helpers.S +++ b/plat/fvp/aarch64/fvp_helpers.S @@ -32,9 +32,9 @@ #include #include #include +#include #include #include "../drivers/pwrc/fvp_pwrc.h" -#include "platform_def.h" .globl platform_get_entrypoint .globl plat_secondary_cold_boot_setup diff --git a/plat/fvp/include/platform_def.h b/plat/fvp/include/platform_def.h index c87ba547ec..32f070ff64 100644 --- a/plat/fvp/include/platform_def.h +++ b/plat/fvp/include/platform_def.h @@ -32,7 +32,7 @@ #define __PLATFORM_DEF_H__ #include -#include <../fvp_def.h> +#include "../fvp_def.h" /******************************************************************************* @@ -131,8 +131,8 @@ #if FVP_TSP_RAM_LOCATION_ID == FVP_IN_TRUSTED_SRAM # define TSP_SEC_MEM_BASE FVP_TRUSTED_SRAM_BASE # define TSP_SEC_MEM_SIZE FVP_TRUSTED_SRAM_SIZE +# define TSP_PROGBITS_LIMIT BL2_BASE # define BL32_BASE FVP_TRUSTED_SRAM_BASE -# define BL32_PROGBITS_LIMIT BL2_BASE # define BL32_LIMIT BL31_BASE #elif FVP_TSP_RAM_LOCATION_ID == FVP_IN_TRUSTED_DRAM # define TSP_SEC_MEM_BASE FVP_TRUSTED_DRAM_BASE @@ -144,6 +144,11 @@ # error "Unsupported FVP_TSP_RAM_LOCATION_ID value" #endif +/* + * ID of the secure physical generic timer interrupt used by the TSP. + */ +#define TSP_IRQ_SEC_PHY_TIMER IRQ_SEC_PHY_TIMER + /******************************************************************************* * Platform specific page table and MMU setup constants ******************************************************************************/ @@ -151,11 +156,6 @@ #define MAX_XLAT_TABLES 2 #define MAX_MMAP_REGIONS 16 -/******************************************************************************* - * ID of the secure physical generic timer interrupt. - ******************************************************************************/ -#define IRQ_SEC_PHY_TIMER 29 - /******************************************************************************* * Declarations and constants to access the mailboxes safely. Each mailbox is * aligned on the biggest cache line size in the platform. This is known only diff --git a/bl32/tsp/tsp-fvp.mk b/plat/fvp/tsp/tsp-fvp.mk similarity index 98% rename from bl32/tsp/tsp-fvp.mk rename to plat/fvp/tsp/tsp-fvp.mk index 3220c08ff4..d2e112a387 100644 --- a/bl32/tsp/tsp-fvp.mk +++ b/plat/fvp/tsp/tsp-fvp.mk @@ -35,4 +35,4 @@ BL32_SOURCES += drivers/arm/gic/arm_gic.c \ plat/common/plat_gic.c \ plat/fvp/aarch64/fvp_common.c \ plat/fvp/aarch64/fvp_helpers.S \ - plat/fvp/bl32_fvp_setup.c + plat/fvp/tsp/tsp_fvp_setup.c diff --git a/plat/fvp/bl32_fvp_setup.c b/plat/fvp/tsp/tsp_fvp_setup.c similarity index 95% rename from plat/fvp/bl32_fvp_setup.c rename to plat/fvp/tsp/tsp_fvp_setup.c index aa49ff3c5e..ae63a7d377 100644 --- a/plat/fvp/bl32_fvp_setup.c +++ b/plat/fvp/tsp/tsp_fvp_setup.c @@ -30,9 +30,9 @@ #include #include -#include -#include "fvp_def.h" -#include "fvp_private.h" +#include +#include "../fvp_def.h" +#include "../fvp_private.h" /******************************************************************************* * Declarations of linker defined symbols which will help us find the layout @@ -66,7 +66,7 @@ extern unsigned long __COHERENT_RAM_END__; /******************************************************************************* * Initialize the UART ******************************************************************************/ -void bl32_early_platform_setup(void) +void tsp_early_platform_setup(void) { /* * Initialize a different console than already in use to display @@ -81,7 +81,7 @@ void bl32_early_platform_setup(void) /******************************************************************************* * Perform platform specific setup placeholder ******************************************************************************/ -void bl32_platform_setup(void) +void tsp_platform_setup(void) { fvp_gic_init(); } @@ -90,7 +90,7 @@ void bl32_platform_setup(void) * Perform the very early platform specific architectural setup here. At the * moment this is only intializes the MMU ******************************************************************************/ -void bl32_plat_arch_setup(void) +void tsp_plat_arch_setup(void) { fvp_configure_mmu_el1(BL32_RO_BASE, (BL32_COHERENT_RAM_LIMIT - BL32_RO_BASE), diff --git a/services/spd/tspd/tspd.mk b/services/spd/tspd/tspd.mk index a32f4c4383..cd4b45a816 100644 --- a/services/spd/tspd/tspd.mk +++ b/services/spd/tspd/tspd.mk @@ -29,7 +29,7 @@ # TSPD_DIR := services/spd/tspd -SPD_INCLUDES := -Iinclude/bl32/payloads +SPD_INCLUDES := -Iinclude/bl32/tsp SPD_SOURCES := services/spd/tspd/tspd_common.c \ services/spd/tspd/tspd_helpers.S \