From 59602b41e834155cb79125063dc41c7e1e259986 Mon Sep 17 00:00:00 2001 From: Randall Spangler Date: Tue, 7 Jan 2014 09:24:34 -0800 Subject: [PATCH] rambi: Remove duplicate EC_PWROK workaround for proto 1.5 After this change, only Rambi 2.0 boards will boot properly. This cleanup is necessary before supporting other Baytrail systems. BUG=chrome-os-partner:24414 BRANCH=rambi TEST=as soon as I get a 2.0 board Change-Id: Ic9e3afcee9dae5c0b7f31a7aa4500b2572ba92c6 Signed-off-by: Randall Spangler Reviewed-on: https://chromium-review.googlesource.com/181754 Reviewed-by: Aaron Durbin --- board/rambi/board.c | 7 +------ board/rambi/board.h | 1 - power/baytrail.c | 10 ---------- 3 files changed, 1 insertion(+), 17 deletions(-) diff --git a/board/rambi/board.c b/board/rambi/board.c index 5b1b295de7..99624197fc 100644 --- a/board/rambi/board.c +++ b/board/rambi/board.c @@ -89,12 +89,7 @@ const struct gpio_info gpio_list[] = { {"PCH_RSMRST_L", LM4_GPIO_F, (1<<1), GPIO_OUT_LOW, NULL}, {"PCH_SMI_L", LM4_GPIO_F, (1<<4), GPIO_ODR_HIGH, NULL}, {"PCH_SOC_OVERRIDE", LM4_GPIO_G, (1<<1), GPIO_OUT_LOW, NULL}, - /* - * TODO(crosbug.com/p/24424): Remove old assignment and remove _NEW - * from the new one when we deprecate the 1.5 boards. - */ - {"PCH_SYS_PWROK", LM4_GPIO_H, (1<<2), GPIO_OUT_LOW, NULL}, - {"PCH_SYS_PWROK_NEW", LM4_GPIO_J, (1<<1), GPIO_OUT_LOW, NULL}, + {"PCH_SYS_PWROK", LM4_GPIO_J, (1<<1), GPIO_OUT_LOW, NULL}, {"PCH_WAKE_L", LM4_GPIO_F, (1<<0), GPIO_ODR_HIGH, NULL}, {"PP1350_EN", LM4_GPIO_H, (1<<5), GPIO_OUT_LOW, NULL}, {"PP3300_DX_EN", LM4_GPIO_J, (1<<2), GPIO_OUT_LOW, NULL}, diff --git a/board/rambi/board.h b/board/rambi/board.h index 73c9a503fb..06b0c897ce 100644 --- a/board/rambi/board.h +++ b/board/rambi/board.h @@ -106,7 +106,6 @@ enum gpio_signal { * from the new one when we deprecate the 1.5 boards. */ GPIO_PCH_SYS_PWROK, /* EC thinks everything is up and ready */ - GPIO_PCH_SYS_PWROK_NEW, /* Duplicate of SYS_PWROK for 2.0 boards */ GPIO_PCH_WAKE_L, /* Wake signal from EC to PCH */ GPIO_PP1350_EN, /* Enable 1.35V supply */ GPIO_PP3300_DX_EN, /* Enable power to lots of peripherals */ diff --git a/power/baytrail.c b/power/baytrail.c index fff9ae33ca..b8144b717d 100644 --- a/power/baytrail.c +++ b/power/baytrail.c @@ -60,11 +60,6 @@ void chipset_force_shutdown(void) * transitions to G3. */ gpio_set_level(GPIO_PCH_SYS_PWROK, 0); - /* - * TODO(crosbug.com/p/24424): Remove duplicate SYS_PWROK output when we - * finish transitioning from proto 1.5 to proto 2.0. - */ - gpio_set_level(GPIO_PCH_SYS_PWROK_NEW, 0); gpio_set_level(GPIO_PCH_RSMRST_L, 0); } @@ -86,10 +81,8 @@ void chipset_reset(int cold_reset) /* PWROK must deassert for at least 3 RTC clocks = 91 us */ gpio_set_level(GPIO_PCH_SYS_PWROK, 0); - gpio_set_level(GPIO_PCH_SYS_PWROK_NEW, 0); udelay(100); gpio_set_level(GPIO_PCH_SYS_PWROK, 1); - gpio_set_level(GPIO_PCH_SYS_PWROK_NEW, 1); } else { /* @@ -135,7 +128,6 @@ enum x86_state x86_chipset_init(void) gpio_set_level(GPIO_PP5000_EN, 0); gpio_set_level(GPIO_PCH_RSMRST_L, 0); gpio_set_level(GPIO_PCH_SYS_PWROK, 0); - gpio_set_level(GPIO_PCH_SYS_PWROK_NEW, 0); wireless_enable(0); } } @@ -283,7 +275,6 @@ enum x86_state x86_handle_state(enum x86_state state) /* Set SYS and CORE PWROK */ gpio_set_level(GPIO_PCH_SYS_PWROK, 1); - gpio_set_level(GPIO_PCH_SYS_PWROK_NEW, 1); gpio_set_level(GPIO_PCH_CORE_PWROK, 1); return X86_S0; @@ -293,7 +284,6 @@ enum x86_state x86_handle_state(enum x86_state state) /* Clear SYS and CORE PWROK */ gpio_set_level(GPIO_PCH_SYS_PWROK, 0); - gpio_set_level(GPIO_PCH_SYS_PWROK_NEW, 0); gpio_set_level(GPIO_PCH_CORE_PWROK, 0); /* Wait 40ns */