diff --git a/octal/cavium_env/rf_card_cal_tip/._cal_instructions_v10.docx b/octal/cavium_env/rf_card_cal_tip/._cal_instructions_v10.docx
new file mode 100644
index 0000000000..9cc2284b5f
Binary files /dev/null and b/octal/cavium_env/rf_card_cal_tip/._cal_instructions_v10.docx differ
diff --git a/octal/cavium_env/rf_card_cal_tip/.idea/misc.xml b/octal/cavium_env/rf_card_cal_tip/.idea/misc.xml
new file mode 100644
index 0000000000..7ba73c25da
--- /dev/null
+++ b/octal/cavium_env/rf_card_cal_tip/.idea/misc.xml
@@ -0,0 +1,4 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<project version="4">
+  <component name="ProjectRootManager" version="2" project-jdk-name="Python 2.7" project-jdk-type="Python SDK" />
+</project>
\ No newline at end of file
diff --git a/octal/cavium_env/rf_card_cal_tip/.idea/modules.xml b/octal/cavium_env/rf_card_cal_tip/.idea/modules.xml
new file mode 100644
index 0000000000..1bc9da6652
--- /dev/null
+++ b/octal/cavium_env/rf_card_cal_tip/.idea/modules.xml
@@ -0,0 +1,8 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<project version="4">
+  <component name="ProjectModuleManager">
+    <modules>
+      <module fileurl="file://$PROJECT_DIR$/.idea/rf_card_cal_tip.iml" filepath="$PROJECT_DIR$/.idea/rf_card_cal_tip.iml" />
+    </modules>
+  </component>
+</project>
\ No newline at end of file
diff --git a/octal/cavium_env/rf_card_cal_tip/.idea/rf_card_cal_tip.iml b/octal/cavium_env/rf_card_cal_tip/.idea/rf_card_cal_tip.iml
new file mode 100644
index 0000000000..6711606311
--- /dev/null
+++ b/octal/cavium_env/rf_card_cal_tip/.idea/rf_card_cal_tip.iml
@@ -0,0 +1,11 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<module type="PYTHON_MODULE" version="4">
+  <component name="NewModuleRootManager">
+    <content url="file://$MODULE_DIR$" />
+    <orderEntry type="inheritedJdk" />
+    <orderEntry type="sourceFolder" forTests="false" />
+  </component>
+  <component name="TestRunnerService">
+    <option name="PROJECT_TEST_RUNNER" value="Unittests" />
+  </component>
+</module>
\ No newline at end of file
diff --git a/octal/cavium_env/rf_card_cal_tip/.idea/workspace.xml b/octal/cavium_env/rf_card_cal_tip/.idea/workspace.xml
new file mode 100644
index 0000000000..9d29608e4a
--- /dev/null
+++ b/octal/cavium_env/rf_card_cal_tip/.idea/workspace.xml
@@ -0,0 +1,213 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<project version="4">
+  <component name="ChangeListManager">
+    <list default="true" id="f1eaeb0a-de90-4189-a620-a276a80d83d2" name="Default Changelist" comment="" />
+    <option name="EXCLUDED_CONVERTED_TO_IGNORED" value="true" />
+    <option name="SHOW_DIALOG" value="false" />
+    <option name="HIGHLIGHT_CONFLICTS" value="true" />
+    <option name="HIGHLIGHT_NON_ACTIVE_CHANGELIST" value="false" />
+    <option name="LAST_RESOLUTION" value="IGNORE" />
+  </component>
+  <component name="FUSProjectUsageTrigger">
+    <session id="-1060803192">
+      <usages-collector id="statistics.lifecycle.project">
+        <counts>
+          <entry key="project.open.time.0" value="1" />
+          <entry key="project.opened" value="1" />
+        </counts>
+      </usages-collector>
+      <usages-collector id="statistics.file.extensions.open">
+        <counts>
+          <entry key="py" value="4" />
+          <entry key="txt" value="1" />
+        </counts>
+      </usages-collector>
+      <usages-collector id="statistics.file.types.open">
+        <counts>
+          <entry key="PLAIN_TEXT" value="1" />
+          <entry key="Python" value="4" />
+        </counts>
+      </usages-collector>
+    </session>
+  </component>
+  <component name="FileEditorManager">
+    <leaf>
+      <file pinned="false" current-in-tab="false">
+        <entry file="file://$PROJECT_DIR$/main.py">
+          <provider selected="true" editor-type-id="text-editor">
+            <state relative-caret-position="-1880">
+              <caret line="627" column="48" lean-forward="true" selection-start-line="627" selection-start-column="48" selection-end-line="627" selection-end-column="48" />
+            </state>
+          </provider>
+        </entry>
+      </file>
+      <file pinned="false" current-in-tab="true">
+        <entry file="file://$PROJECT_DIR$/test_config.txt">
+          <provider selected="true" editor-type-id="text-editor">
+            <state relative-caret-position="357">
+              <caret line="21" column="49" lean-forward="true" selection-start-line="21" selection-start-column="49" selection-end-line="21" selection-end-column="49" />
+            </state>
+          </provider>
+        </entry>
+      </file>
+      <file pinned="false" current-in-tab="false">
+        <entry file="file://$PROJECT_DIR$/cal_tx_pwr.py">
+          <provider selected="true" editor-type-id="text-editor">
+            <state relative-caret-position="-3553">
+              <caret line="26" column="8" selection-start-line="26" selection-start-column="8" selection-end-line="26" selection-end-column="52" />
+            </state>
+          </provider>
+        </entry>
+      </file>
+      <file pinned="false" current-in-tab="false">
+        <entry file="file://$PROJECT_DIR$/cal_ref_clk_dac.py">
+          <provider selected="true" editor-type-id="text-editor">
+            <state relative-caret-position="36">
+              <caret line="90" column="17" lean-forward="true" selection-start-line="90" selection-start-column="17" selection-end-line="90" selection-end-column="17" />
+            </state>
+          </provider>
+        </entry>
+      </file>
+      <file pinned="false" current-in-tab="false">
+        <entry file="file://$PROJECT_DIR$/bb_eeprom.py">
+          <provider selected="true" editor-type-id="text-editor">
+            <state relative-caret-position="365">
+              <caret line="195" column="73" lean-forward="true" selection-start-line="195" selection-start-column="73" selection-end-line="195" selection-end-column="73" />
+            </state>
+          </provider>
+        </entry>
+      </file>
+    </leaf>
+  </component>
+  <component name="FindInProjectRecents">
+    <findStrings>
+      <find>write_bb_eeprom</find>
+      <find>cal_ref_clk_dac</find>
+      <find>CalRefClk</find>
+      <find>do_tx</find>
+    </findStrings>
+  </component>
+  <component name="IdeDocumentHistory">
+    <option name="CHANGED_PATHS">
+      <list>
+        <option value="$PROJECT_DIR$/main.py" />
+      </list>
+    </option>
+  </component>
+  <component name="ProjectFrameBounds" extendedState="1">
+    <option name="x" value="85" />
+    <option name="y" value="114" />
+    <option name="width" value="1842" />
+    <option name="height" value="900" />
+  </component>
+  <component name="ProjectView">
+    <navigator proportions="" version="1">
+      <foldersAlwaysOnTop value="true" />
+    </navigator>
+    <panes>
+      <pane id="ProjectPane">
+        <subPane>
+          <expand>
+            <path>
+              <item name="rf_card_cal_tip" type="b2602c69:ProjectViewProjectNode" />
+              <item name="rf_card_cal_tip" type="462c0819:PsiDirectoryNode" />
+            </path>
+          </expand>
+          <select />
+        </subPane>
+      </pane>
+      <pane id="Scope" />
+    </panes>
+  </component>
+  <component name="PropertiesComponent">
+    <property name="last_opened_file_path" value="$PROJECT_DIR$/../../cavium_env_5calib" />
+  </component>
+  <component name="RunDashboard">
+    <option name="ruleStates">
+      <list>
+        <RuleState>
+          <option name="name" value="ConfigurationTypeDashboardGroupingRule" />
+        </RuleState>
+        <RuleState>
+          <option name="name" value="StatusDashboardGroupingRule" />
+        </RuleState>
+      </list>
+    </option>
+  </component>
+  <component name="SvnConfiguration">
+    <configuration />
+  </component>
+  <component name="TaskManager">
+    <task active="true" id="Default" summary="Default task">
+      <changelist id="f1eaeb0a-de90-4189-a620-a276a80d83d2" name="Default Changelist" comment="" />
+      <created>1540235473732</created>
+      <option name="number" value="Default" />
+      <option name="presentableId" value="Default" />
+      <updated>1540235473732</updated>
+    </task>
+    <servers />
+  </component>
+  <component name="ToolWindowManager">
+    <frame x="85" y="114" width="1842" height="900" extended-state="1" />
+    <editor active="true" />
+    <layout>
+      <window_info id="Favorites" side_tool="true" />
+      <window_info active="true" content_ui="combo" id="Project" order="0" visible="true" weight="0.25" />
+      <window_info id="Structure" order="1" side_tool="true" weight="0.25" />
+      <window_info anchor="bottom" id="Version Control" show_stripe_button="false" />
+      <window_info anchor="bottom" id="Python Console" />
+      <window_info anchor="bottom" id="Terminal" />
+      <window_info anchor="bottom" id="Event Log" side_tool="true" />
+      <window_info anchor="bottom" id="Message" order="0" />
+      <window_info anchor="bottom" id="Find" order="1" />
+      <window_info anchor="bottom" id="Run" order="2" />
+      <window_info anchor="bottom" id="Debug" order="3" weight="0.4" />
+      <window_info anchor="bottom" id="Cvs" order="4" weight="0.25" />
+      <window_info anchor="bottom" id="Inspection" order="5" weight="0.4" />
+      <window_info anchor="bottom" id="TODO" order="6" />
+      <window_info anchor="right" id="Commander" internal_type="SLIDING" order="0" type="SLIDING" weight="0.4" />
+      <window_info anchor="right" id="Ant Build" order="1" weight="0.25" />
+      <window_info anchor="right" content_ui="combo" id="Hierarchy" order="2" weight="0.25" />
+    </layout>
+  </component>
+  <component name="VcsContentAnnotationSettings">
+    <option name="myLimit" value="2678400000" />
+  </component>
+  <component name="editorHistoryManager">
+    <entry file="file://$PROJECT_DIR$/cal_ref_clk_dac.py">
+      <provider selected="true" editor-type-id="text-editor">
+        <state relative-caret-position="36">
+          <caret line="90" column="17" lean-forward="true" selection-start-line="90" selection-start-column="17" selection-end-line="90" selection-end-column="17" />
+        </state>
+      </provider>
+    </entry>
+    <entry file="file://$PROJECT_DIR$/bb_eeprom.py">
+      <provider selected="true" editor-type-id="text-editor">
+        <state relative-caret-position="365">
+          <caret line="195" column="73" lean-forward="true" selection-start-line="195" selection-start-column="73" selection-end-line="195" selection-end-column="73" />
+        </state>
+      </provider>
+    </entry>
+    <entry file="file://$PROJECT_DIR$/main.py">
+      <provider selected="true" editor-type-id="text-editor">
+        <state relative-caret-position="-1880">
+          <caret line="627" column="48" lean-forward="true" selection-start-line="627" selection-start-column="48" selection-end-line="627" selection-end-column="48" />
+        </state>
+      </provider>
+    </entry>
+    <entry file="file://$PROJECT_DIR$/cal_tx_pwr.py">
+      <provider selected="true" editor-type-id="text-editor">
+        <state relative-caret-position="-3553">
+          <caret line="26" column="8" selection-start-line="26" selection-start-column="8" selection-end-line="26" selection-end-column="52" />
+        </state>
+      </provider>
+    </entry>
+    <entry file="file://$PROJECT_DIR$/test_config.txt">
+      <provider selected="true" editor-type-id="text-editor">
+        <state relative-caret-position="357">
+          <caret line="21" column="49" lean-forward="true" selection-start-line="21" selection-start-column="49" selection-end-line="21" selection-end-column="49" />
+        </state>
+      </provider>
+    </entry>
+  </component>
+</project>
\ No newline at end of file
diff --git a/octal/cavium_env/rf_card_cal_tip/bb_eeprom.py b/octal/cavium_env/rf_card_cal_tip/bb_eeprom.py
new file mode 100644
index 0000000000..4558c246ea
--- /dev/null
+++ b/octal/cavium_env/rf_card_cal_tip/bb_eeprom.py
@@ -0,0 +1,225 @@
+#!/usr/bin/python
+
+import sys
+import os.path
+import test_config
+from time import sleep
+from im_calibration import Calibration
+
+
+class BBEepromAccess(Calibration):
+    
+    def __init__(self):
+        
+        self.cfg = test_config.EnbConfig()
+        self.cfg_file = 'bb_eeprom.txt'
+        
+        self.SerialNum = '12345678'     # 12 bytes
+        self.boardname = 'zen'          # ('refkit1', 'zen') default 'zen'
+        self.boardversion = 7           # (1 to 254)
+        self.NumETHPort = 1             # (1 or 2) default 1
+        self.ExtPTPHWPresent = 1        # (0 not present, 1 present)
+        self.ExtPTPHWUARTPort = 'ttyS1' # (port name) default 'ttyS1'
+        self.ExtPTPHWUARTBaud = 6       # (1: 4800 2: 9600 3: 19200 4: 38400 5: 57600 
+                                        # 6: 115200 7: 230400); default 6
+        self.ExtPTPHWUARTEcho = 0       # (0 disable, 1 enable) default 0
+        self.ExtGPSHWPresent = 0        # (0 not present, 1 present)
+        self.ExtGPSHWUARTPort = 'ttyS1' # (port name) default 'ttyS1'
+        self.ExtGPSHWUARTBaud = 6       # (1: 4800 2: 9600 3: 19200 4: 38400 5: 57600 
+                                        # 6: 115200 7: 230400); default 6
+        self.ExtGPSHWUARTEcho = 0       # (0 disable, 1 enable) default 0
+        self.SimCardPresent = 0         # (0 not present, 1 present)
+        self.SDCardPresent = 0          # (0 not present, 1 present)
+        self.USBPortPresent = 0         # (0 not present, 1 present)
+        self.PCIEPresent = 0            # (0 not present, 1 present)
+        self.EthSwitchPresent = 0       # (0 not present, 1 present)
+        
+        self.PtpVcoDriftPresent = 0     # (0 not present, 1 present)
+        self.PtpVcoDriftValue = 0       # signed integer
+        
+        self.read_bb_config_file()
+        
+    def start_enodeb(self):
+        
+        type(self).enb.enb_login()
+        type(self).enb.enb_cd_usr_bin()
+        #type(self).enb.enb_load_rf_driver()
+        
+    def read_line(self, strline):
+        param = ""
+        value = ""
+        sn = strline
+        
+        if ((sn[0] != '#') and (sn[0] != ' ') and 
+            (sn[0] != '\n') and (sn[0] != '\r') and
+            (sn[0] != '\t')):
+            result = sn.split('=')
+            param = result[0]
+            value = result[1]
+            for i in range(len(value)):
+                if ((value[i] == '\n') or (value[i] == '\r')):
+                    value = value[:i]
+                    break
+                elif ((value[i] == " ") or (value[i] == "#") or (value[i] == '\t')):
+                        value = value[:i]
+                        break
+            value = value.strip("\'")
+            #print("read_line(): param=%s, value=%s" % (param, value))
+            
+        return param, value
+        
+    def read_bb_config_file(self):
+        
+        #if not os.path.isfile(self.cfg_file):
+        #    print 'error, bb_eeprom.txt not exists'
+        #    exit(-1)
+        
+        cfgfile = open(self.cfg_file, 'r')
+        cfgln = cfgfile.readlines()
+        cfgfile.close()
+        
+        for cl in cfgln:
+            par, val = self.read_line(cl)
+            if (par == 'SerialNum'):
+                self.SerialNum = val
+            elif (par == 'boardname'):
+                self.boardname = val
+            elif (par == 'boardversion'):
+                self.boardversion = int(val)
+            elif (par == 'NumETHPort'):
+                self.NumETHPort = int(val)
+            elif (par == 'ExtPTPHWUARTPort'):
+                self.ExtPTPHWUARTPort = val
+            elif (par == 'ExtGPSHWUARTPort'):
+                self.ExtGPSHWUARTPort = val
+            elif (par == 'ExtPTPHWPresent'):
+                self.ExtPTPHWPresent = int(val)
+            elif (par == 'ExtPTPHWUARTBaud'):
+                self.ExtPTPHWUARTBaud = int(val)
+            elif (par == 'ExtPTPHWUARTEcho'):
+                self.ExtPTPHWUARTEcho = int(val)
+            elif (par == 'ExtGPSHWPresent'):
+                self.ExtGPSHWPresent = int(val)
+            elif (par == 'ExtGPSHWUARTBaud'):
+                self.ExtGPSHWUARTBaud = int(val)
+            elif (par == 'ExtGPSHWUARTEcho'):
+                self.ExtGPSHWUARTEcho = int(val)
+            elif (par == 'SimCardPresent'):
+                self.SimCardPresent = int(val)
+            elif (par == 'SDCardPresent'):
+                self.SDCardPresent = int(val)
+            elif (par == 'USBPortPresent'):
+                self.USBPortPresent = int(val)
+            elif (par == 'PCIEPresent'):
+                self.PCIEPresent = int(val)
+            elif (par == 'EthSwitchPresent'):
+                self.EthSwitchPresent = int(val)
+            elif (par == 'PtpVcoDriftPresent'):
+                self.PtpVcoDriftPresent = int(val)
+            elif (par == 'PtpVcoDriftValue'):
+                self.PtpVcoDriftValue = int(val)
+            elif (par == ''):
+                continue
+            else:
+                pass
+
+    def read_bb_eeprom(self):
+        
+        _ = self.enb.tn.read_until('login'.encode("ascii"), 5)
+        print ''
+        print 'Serial Number: ' + self.do_driver_reading('rsn')
+        print 'Board Name: ' + self.do_driver_reading('rbn')
+        print 'Board Version: ' + self.do_driver_reading('rbv')
+        print 'Number ETH Port: ' + self.do_driver_reading('rne')
+        print 'EXT PTP Present: ' + self.do_driver_reading('rpp')
+        print 'EXT PTP UART Port: ' + self.do_driver_reading('rpo')
+        print 'EXT PTP UART Baud: ' + self.do_driver_reading('rpb')
+        print 'EXT PTP UART Echo: ' + self.do_driver_reading('rpe')
+        print 'EXT GPS Present: ' + self.do_driver_reading('rgp')
+        print 'EXT GPS UART Port: ' + self.do_driver_reading('rgo')
+        print 'EXT GPS UART Baud: ' + self.do_driver_reading('rgb')
+        print 'EXT GPS UART Echo: ' + self.do_driver_reading('rge')
+        print 'SimCard Present: ' + self.do_driver_reading('rsp')
+        print 'SD Card Present: ' + self.do_driver_reading('rdp')
+        print 'USB Port Present: ' + self.do_driver_reading('rup')
+        print 'PCIE Present: ' + self.do_driver_reading('rcp')
+        print 'ETH Switch Present: ' + self.do_driver_reading('rwp')
+        print 'PTP VCO Drift Present: ' + self.do_driver_reading('rvp')
+        print 'PTP VCO Drift Value: ' + self.do_driver_reading('rvv')
+        print ''
+    
+    def convert_baud_rate(self, baudNum):
+        
+        res = 0
+        
+        if baudNum == 1:
+            res = 4800
+        elif baudNum == 2:
+            res = 9600
+        elif baudNum == 3:
+            res = 19200
+        elif baudNum == 4:
+            res = 38400
+        elif baudNum == 5:
+            res = 57600
+        elif baudNum == 6:
+            res = 115200
+        elif baudNum == 7:
+            res = 230400
+        else:
+            res = -1
+            
+        return str(res).encode('ascii')
+    
+    def do_driver_reading(self, cmd):
+        
+        self.enb.tn_write('Option', "oncpu 0 /usr/bin/" + self.cfg.rf_driver)
+        self.enb.tn_write('option', "be")
+        self.enb.tn_write(':', cmd)
+        res = self.enb.tn.read_until('*'.encode("ascii"), 5)
+        self.enb.tn_write('/usr/bin', "q")
+        #print 'get:' + res + ':got'
+        start = 0
+        start = res.find("= ".encode("ascii"), start)
+        start += len("= ")
+        data = res[start:res.find('*'.encode("ascii"), start)].strip()
+        return data
+
+    def write_bb_serial_number(self, serialNum):
+        
+        self.enb.enb_bb_eeprom_edit_record('wsn', serialNum)
+
+    def write_bb_eeprom(self):
+        
+        #self.enb.enb_bb_eeprom_edit_record('wsn', self.SerialNum)
+        self.enb.enb_bb_eeprom_edit_record('wbn', self.boardname)
+        self.enb.enb_bb_eeprom_edit_record('wbv', str(self.boardversion))
+        self.enb.enb_bb_eeprom_edit_record('wne', str(self.NumETHPort))
+        self.enb.enb_bb_eeprom_edit_record('wpp', str(self.ExtPTPHWPresent))
+        self.enb.enb_bb_eeprom_edit_record('wpo', self.ExtPTPHWUARTPort)
+        self.enb.enb_bb_eeprom_edit_record('wpb', str(self.ExtPTPHWUARTBaud))
+        self.enb.enb_bb_eeprom_edit_record('wpe', str(self.ExtPTPHWUARTEcho))
+        self.enb.enb_bb_eeprom_edit_record('wgp', str(self.ExtGPSHWPresent))
+        self.enb.enb_bb_eeprom_edit_record('wgo', self.ExtGPSHWUARTPort)
+        self.enb.enb_bb_eeprom_edit_record('wgb', str(self.ExtGPSHWUARTBaud))
+        self.enb.enb_bb_eeprom_edit_record('wge', str(self.ExtGPSHWUARTEcho))
+        self.enb.enb_bb_eeprom_edit_record('wsp', str(self.SimCardPresent))
+        self.enb.enb_bb_eeprom_edit_record('wdp', str(self.SDCardPresent))
+        self.enb.enb_bb_eeprom_edit_record('wup', str(self.USBPortPresent))
+        self.enb.enb_bb_eeprom_edit_record('wcp', str(self.PCIEPresent))
+        self.enb.enb_bb_eeprom_edit_record('wwp', str(self.EthSwitchPresent))
+        self.enb.enb_bb_eeprom_edit_record('wvp', str(self.PtpVcoDriftPresent))
+        self.enb.enb_bb_eeprom_edit_record('wvv', str(self.PtpVcoDriftValue))
+        
+    def erase_bb_eeprom(self):
+        
+        answer = raw_input("Are you sure erase EEPROM?(y or n):")
+        
+        if (answer == 'y') or (answer == 'Y'):
+            print 'earsing baseboard EEPROM...'
+            self.enb.tn_write('Option', "oncpu 0 /usr/bin/" + self.cfg.rf_driver)
+            self.enb.tn_write('option', "be")
+            self.enb.tn_write(':', 'eei')
+            self.enb.tn_write('option', 'y', 60)
+            self.enb.tn_write('/usr/bin', "q", 3)
+            print 'erase done'
diff --git a/octal/cavium_env/rf_card_cal_tip/bb_eeprom.pyc b/octal/cavium_env/rf_card_cal_tip/bb_eeprom.pyc
new file mode 100644
index 0000000000..cd1fbd52bc
Binary files /dev/null and b/octal/cavium_env/rf_card_cal_tip/bb_eeprom.pyc differ
diff --git a/octal/cavium_env/rf_card_cal_tip/bb_eeprom.txt b/octal/cavium_env/rf_card_cal_tip/bb_eeprom.txt
new file mode 100644
index 0000000000..7f98788dd4
--- /dev/null
+++ b/octal/cavium_env/rf_card_cal_tip/bb_eeprom.txt
@@ -0,0 +1,23 @@
+# Baseboard EEPROM Data
+
+boardname='zen'             # ('refkit1', 'zen') default 'zen'
+boardversion=10              # (1 to 254)
+NumETHPort=1                # (1 or 2) default 1
+ExtPTPHWPresent=1           # (0 not present, 1 present)
+ExtPTPHWUARTPort='ttyS1'    # (port name) default 'ttyS1'
+ExtPTPHWUARTBaud=6          # (1: 4800 2: 9600 3: 19200 4: 38400 5: 57600 
+                            # 6: 115200 7: 230400); default 6
+ExtPTPHWUARTEcho=0          # (0 disable, 1 enable) default 0
+ExtGPSHWPresent=1           # (0 not present, 1 present)
+ExtGPSHWUARTPort='ttyS1'    # (port name) default 'ttyS1'
+ExtGPSHWUARTBaud=6          # (1: 4800 2: 9600 3: 19200 4: 38400 5: 57600 
+                            # 6: 115200 7: 230400); default 6
+ExtGPSHWUARTEcho=0          # (0 disable, 1 enable) default 0
+SimCardPresent=0            # (0 not present, 1 present)
+SDCardPresent=0             # (0 not present, 1 present)
+USBPortPresent=0            # (0 not present, 1 present)
+PCIEPresent=0               # (0 not present, 1 present)
+EthSwitchPresent=0          # (0 not present, 1 present)
+
+PTPVcoDriftPresent=0        # (0 not present, 1 present)
+PTPVcoDriftValue=0          # signed integer
diff --git a/octal/cavium_env/rf_card_cal_tip/bb_testterm.py b/octal/cavium_env/rf_card_cal_tip/bb_testterm.py
new file mode 100644
index 0000000000..81a1483a80
--- /dev/null
+++ b/octal/cavium_env/rf_card_cal_tip/bb_testterm.py
@@ -0,0 +1,492 @@
+#!/usr/bin/python
+
+# Very simple serial terminal
+# (C)2002-2004 Chris Liechti <cliecht@gmx.net>
+
+import test_config
+#weison import sys, os, serial, threading, getopt
+import sys, os, threading, getopt
+#weison import enhancedserial
+from time import sleep
+from im_calibration import Calibration
+
+EXITCHARCTER = '\x04'   #ctrl+D
+FUNCCHARCTER = '\x01'   #ctrl+A
+CONVERT_CRLF = 2
+CONVERT_CR   = 1
+CONVERT_LF   = 0
+
+if os.name == 'nt':
+    print "OS = Windows"
+    import msvcrt
+elif os.name == 'posix':
+    print "OS = Linux"
+    import termios
+else:
+    raise "Sorry no implementation for your platform (%s) available." % sys.platform
+        
+class TestTerm(Calibration):
+
+    def __init__(self, osname):
+
+        #initialize with defaults
+        #self.port  = 'COM11' #'/dev/ttyUSB0'
+        #self.baudrate = 115200
+        #self.pingip = '10.18.104.189'   #'192.168.166.202' #'10.102.81.5'
+        self.port = type(self).cfg.bb_port
+        self.baudrate = type(self).cfg.bb_baudrate
+        self.pingip = type(self).cfg.bb_pingip
+        self.echo = 0
+        self.convert_outgoing = CONVERT_CR
+        self.newline = '';
+        self.rtscts = 0
+        self.xonxoff = 0
+        self.repr_mode = 0
+        self.os_name = osname
+    
+    def getkey(self):
+        
+        return raw_input()
+    
+    def getkey_org(self):
+        
+        if self.os_name == 'nt':
+            
+            while True:
+                if self.echo:
+                    z = msvcrt.getche()
+                else:
+                    z = msvcrt.getch()
+                    
+                if z == '\0' or z == '\xe0':    #functions keys
+                    msvcrt.getch()
+                else:
+                    if z == '\r':
+                        return '\n'
+                    return z
+                
+        elif self.os_name == 'posix':
+            
+            fd = sys.stdin.fileno()
+            old = termios.tcgetattr(fd)
+            new = termios.tcgetattr(fd)
+            new[3] = new[3] & ~termios.ICANON & ~termios.ECHO
+            new[6][termios.VMIN] = 1
+            new[6][termios.VTIME] = 0
+            termios.tcsetattr(fd, termios.TCSANOW, new)
+            self.ts = ''    # We'll save the characters typed and add them to the pool.
+    
+        def clenaup_console():
+            
+            if self.os_name == 'posix':
+                termios.tcsetattr(fd, termios.TCSAFLUSH, old)
+    
+    def reader(self):
+        """loop forever and copy serial->console"""
+        
+        while 1:
+            try:
+                data = self.ts.read()
+            except:
+                e = sys.exc_info()[0]
+                print "--- Exception ignored: ", sys.exc_info()[0]
+    
+            if self.repr_mode:
+                sys.stdout.write(repr(data)[1:-1])
+            else:
+                sys.stdout.write(data)
+                
+            sys.stdout.flush()
+    
+    def writer(self):
+        """loop and copy console->serial until EOF character is found"""
+        
+        c = FUNCCHARCTER
+        while True:
+            if c == EXITCHARCTER:
+                break                       #exit app
+            elif c == FUNCCHARCTER:
+                self.menu()
+                return
+            elif c == '\n':
+                self.ts.write(self.newline)
+            else:
+                self.ts.write(c)                  #send character
+                
+            c = self.getkey()
+            #print(":".join(a.encode('hex') for a in c))
+    
+    def menu(self):
+        
+        ret=' ';
+        while True:
+            print("--- Starting a new test...")
+            print("--- Reset Zen to initial test procedure...")
+            self.ts.wait_until("Clearing DRAM......", timeout=0);
+            self.ts.write(self.newline + self.newline);
+            self.ts.wait_until("Octeon zen=>","Octeon titan_cnf7130=>", timeout=0);
+            
+            ret = self.uboot_menu(ret)
+            if 1 == ret: return;
+            self.ts.wait_until("LSM login:", timeout=0);
+            self.ts.write('root' + self.newline);
+            
+            ret = self.kernel_menu(ret)
+            if 1 == ret: return;
+    
+    def kernel_menu(self, batch_cmd = ' '):
+        
+        sleep(0.1)
+        bac=batch_cmd;
+        
+        while 1:
+            print("\n")
+            print("---  1. Network: Ping "+self.pingip)
+            print("---  2. GPIO LED: blink(GPIO 0, 6, 7)")
+            print("---  3. Flash write/read test(/dev/mtdblock7)")
+            #print("---  4. SD/MMC write/read test(/dev/mmcblk0)")
+            print("---  4. GPS query test")
+            print("---  r. Restart test")
+            print("---  q. Quit")
+            print("--- Please select function:")
+            
+            if len(bac) > 1:
+                c = bac[0]
+                bac = bac[1:]
+            else: 
+                c = self.getkey()
+            
+            #c = self.getkey()
+             
+            if c == '1' :
+                
+                print("\n--- Starting Ping test...")
+                self.ts.write(self.newline+'ping -c3 -q '+self.pingip+self.newline);
+                ret=self.ts.wait_until("0 received","1 received","2 received","3 received",timeout=5);
+                sleep(0.1)
+                
+                if ret > 0 : 
+                    print("\n\n--- RESULT : Ping test PASSED\n")
+                else:
+                    print("\n\n--- RESULT : Ping test FAILED!!\n")
+                    bac=' '
+                    
+            elif c == '2':
+                
+                for a in [0,6,7]:
+                    print("\n--- GPIO LED %d blink test..."%a)
+                    self.ts.write(self.newline+'toggle 1 %d '%a+self.newline);
+                    sleep(0.1)
+                    print("--- Please check if GPIO %d LED are blinking..."%a)
+                    print("--- Press Y/y if the LED is blinking, others mean failed...")
+                    c = self.getkey()
+                    
+                    if c == 'y' or c == 'Y':
+                        print("\n\n--- RESULT: LED %d test PASSED"%a)
+                    else:
+                        print("\n\n--- RESULT: LED %d test FAILED"%a)
+                        self.ts.write('\x03');
+                        
+            elif c == '3':
+                
+                print("\n--- Starting flash test...")
+                self.ts.write(self.newline + 
+                              'DEV=/dev/mtdblock7; dd if=/dev/urandom of=test bs=1M count=1; \
+                              dd if=test of=$DEV bs=1M count=1; dd if=$DEV of=test1 bs=1M count=1;\
+                               cmp test test1 && echo Files are the same!!;' + self.newline);
+                ret = self.ts.wait_until("Files are the same!!","differ:",timeout=30);
+                sleep(0.1)
+                
+                if ret == 0: 
+                    print ("\n\n--- RESULT : flash test PASSED\n")
+                else:
+                    print("\n\n--- RESULT : flash test FAILED\n")
+                    bac=' '
+                    
+            elif c == '4':
+                
+                print("\n--- Starting GPS query test...")
+                self.ts.write(self.newline+' cat > /gps_test.sh << EOF'+self.newline+
+                '#!/bin/sh'+self.newline+
+                'i=0'+self.newline+
+                'cat /dev/ttyS1 |grep -a -m 1 "GP" > /tmp/gps_result &'+self.newline+
+                'while true'+self.newline+
+                'do'+self.newline+
+                '    sleep 1'+self.newline+
+                '    result=\`cat /tmp/gps_result\`'+self.newline+
+                '        if [ -z "\$result" ]; then '+self.newline+
+                '            if [ "\$i" -ge "5" ];then echo "gps module test is failed!!"; break; fi '+self.newline+
+                '            '+self.newline+
+                '        else'+self.newline+
+                '            echo "gps module test is passed!!";'+self.newline+
+                '            break;'+self.newline+
+                '        fi'+self.newline+
+                '        true \$(( i++ ))'+self.newline+
+                'done'+self.newline+
+                'exit 0'+self.newline+
+                'EOF'+self.newline);
+                ret=self.ts.wait_until("EOF");
+                ret=self.ts.wait_until("EOF");
+                self.ts.write('sh /gps_test.sh'+self.newline);
+                ret=self.ts.wait_until("gps module test is failed","gps module test is passed");
+                sleep(0.1)
+                
+                if ret == 1: print ("\n\n--- RESULT : GPS query test PASSED!\n")
+                elif ret == 0: print("\n\n--- RESULT : GPS query test FAILED\n")
+                else:
+                    print("\n\n--- RESULT : GPS query test FAILED (timeout) \n")
+                    bac=' '
+                    
+            elif c == 'r' or c == 'R':
+                print("--- Restarting test!!")
+                return ' '
+            
+            elif c == 'q' or c == 'Q':
+                print("--- Quit test mode!!")
+                return 1
+            
+            else:
+                print("--- Error: unknown function!!")
+                
+        return ' '
+    
+    def uboot_menu(self, batch_cmd = ' '):
+        
+        sleep(0.1)
+        bac = batch_cmd;
+        
+        while 1:
+            print("\n\n")
+            print("---  1. Run all the tests")
+            print("---  2. Reset button")
+            print("---  3. Memory: u-boot mtest")
+            print("---  4. BB/RF Temperature sensor test")
+            print("---  5. BB EEPROM test")
+            print("---  6. RF EEPROM test")
+            print("---  7. DSP test")
+            print("---  k. Boot to kernel")
+            print("---  r. Reset u-boot environment variables")
+            print("---  q. Quit")
+            print("--- Please select function:")
+            
+            if len(bac) > 1:
+                c = bac[0]
+                bac = bac[1:]
+            else: 
+                c = self.getkey()
+            
+            print "selection = " + c
+            
+            if c == '1' :
+                print("\n--- Run all the tests")
+                #bac='234567k1234r '
+                bac='234567k1234 '
+                
+            elif c == '2':
+                print("\n--- Starting Reset button test...\n")
+                print("Please press reset button in 10 seconds...\n")
+                ret=self.ts.wait_until("Clearing DRAM......",timeout=20);
+                if ret>=0 :
+                    self.ts.write(self.newline+self.newline);
+                    ret=self.ts.wait_until("Octeon zen=>","Octeon titan_cnf7130=>", timeout=10);
+                    if ret<0 : print("\n\n--- RESULT : Reset button test FAILED (for wait timeout)\n")
+                    else : print("\n\n--- RESULT : Reset button test PASSED\n")
+                    
+            elif c == '3':
+                print("\n--- Starting memroy test...")
+                self.ts.write('echo '+self.newline+'mtest 80100000 80ffffff 5a5aa5a5 a'+self.newline);
+                ret=self.ts.wait_until("0 errors","errors",timeout=15);
+                sleep(0.1)
+                if ret==0 : print("\n\n--- RESULT : Memory test PASSED\n")
+                elif ret==1 : print("\n\n--- RESULT : Memory test FAILED\n")
+                elif ret<0 : print("\n\n--- RESULT : Memory test FAILED (for wait timeout)\n")
+                
+            elif c == '4':
+                print("\n--- Starting BB/RF Temperature sensor test...\n")
+                self.ts.write('echo '+self.newline+'dtt'+self.newline);
+                ret=self.ts.wait_until("DTT0: Failed init!", "DTT1: Failed init!", "C")
+                sleep(0.5)
+                
+                if ret==2 : print("\n\n--- RESULT : BB/RF Temperature sensor test PASSED\n")
+                elif ret>=0 : print("\n\n--- RESULT : BB/RF Temperature sensor test FAILED\n")
+                else : print("\n\n--- RESULT : BB/RF Temperature sensor test FAILED (for wait timeout)\n")
+                
+            elif c == '5':
+                print("\n--- Starting BB EEPROM test...\n")
+                self.ts.write('echo '+self.newline+'i2c md 50 0.2 0x100'+self.newline);
+                ret=self.ts.wait_until("00f0:","Error");
+                sleep(0.1)
+                
+                if ret==0 : print("\n\n--- RESULT : BB EEPROM test PASSED\n")
+                elif ret==1 : print("\n\n--- RESULT : BB EEPROM test FAILED\n")
+                elif ret<0 : print("\n\n--- RESULT : BB EEPROM test FAILED (for wait timeout)\n")
+                
+            elif c == '6':
+                print("\n--- Starting RF EEPROM test...\n")
+                self.ts.write('echo '+self.newline+'i2c md 51 0.2 0x100'+self.newline);
+                ret=self.ts.wait_until("00f0:","Error");
+                sleep(0.1)
+                
+                if ret==0 : print("\n\n--- RESULT : RF EEPROM test PASSED\n")
+                elif ret==1 : print("\n\n--- RESULT : RF EEPROM test FAILED\n")
+                elif ret<0 : print("\n\n--- RESULT : RF EEPROM test FAILED (for wait timeout)\n")
+                
+            elif c == '7':
+                print("\n--- Starting DSP query test...\n")
+                self.ts.write('echo '+self.newline+'echo CVMX_EOI_CTL_STA; md64 0x0001180013000000 1;'+self.newline);
+                ret=self.ts.wait_until("8001180013000000:");
+                
+                if ret < 0 :
+                    print("\n\n--- RESULT : DSP query test for reading CVMX_EOI_CTL_STA FAILED (for wait timeout)\n")
+                    break
+                    sleep(0.1)
+                    self.ts.write('echo '+self.newline+'mw64 0x0001180013000000 0x800 1;echo CVMX_EOI_CTL_STA; md64 0x0001180013000000 1;'+self.newline);
+                    ret=self.ts.wait_until("8001180013000000: 0000000000000800");
+                    
+                if ret < 0 :
+                    print("\n\n--- RESULT : DSP query test for writing CVMX_EOI_CTL_STA FAILED 1 (for wait timeout)\n")
+                    break
+                    sleep(0.1)
+                    self.ts.write('echo '+self.newline+'mw64 0x0001180013000000 0x802 1;echo CVMX_EOI_CTL_STA; md64 0x0001180013000000 1;'+self.newline);
+                    ret=self.ts.wait_until("8001180013000000: 0000000000000802");
+                    
+                if ret < 0 :
+                    print("\n\n--- RESULT : DSP query test for writing CVMX_EOI_CTL_STA FAILED 2 (for wait timeout)\n")
+                    break
+                    sleep(0.1)
+                    self.ts.write('echo '+self.newline+'echo BBP_RSTCLK_CLKENB1_STATE 0x00010F0000844430; read64l 0x00010F0000844430;'+self.newline);
+                    ret=self.ts.wait_until("0x80010f0000844430:");
+                    
+                if ret < 0 :
+                    print("\n\n--- RESULT : DSP query test for reading BBP_RSTCLK_CLKENB1_STATE FAILED (for wait timeout)\n")
+                    break
+                    sleep(0.1)
+                    self.ts.write('echo '+self.newline+'write64l 0x00010F0000844438 0xff; echo BBP_RSTCLK_CLKENB1_STATE 0x00010F0000844430; read64l 0x00010F0000844430;'+self.newline);
+                    ret=self.ts.wait_until("0x80010f0000844430: 0x0");
+                    
+                if ret < 0 :
+                    print("\n\n--- RESULT : DSP query test for clearing BBP_RSTCLK_CLKENB1_STATE FAILED (for wait timeout)\n")
+                    break
+                    sleep(0.1)
+                    self.ts.write('echo '+self.newline+'write64l 0x00010F0000844434 0xff; echo BBP_RSTCLK_CLKENB1_STATE 0x00010F0000844430; read64l 0x00010F0000844430;'+self.newline);
+                    ret=self.ts.wait_until("0x80010f0000844430: 0xff");
+                    
+                if ret < 0 :
+                    print("\n\n--- RESULT : DSP query test for setting BBP_RSTCLK_CLKENB1_STATE FAILED (for wait timeout)\n")
+                    break
+                    sleep(0.1)
+                    print("\n\n--- RESULT : DSP query test PASSED\n")
+                    
+            elif c == 'k':
+                print("\n--- Running bootcmd...\n")
+                self.ts.write('echo '+self.newline+'run bootcmd'+self.newline);
+                return bac;
+            
+            elif c == 'r':
+                print("\n--- Resetting u-boot environment variables...")
+                self.ts.write('echo '+self.newline+'setenv blabla xxx; savenv'+self.newline);
+                
+            elif c == 'q' or c == 'Q':
+                print("--- Quit test mode!!")
+                return 1
+            
+            else:
+                print("--- Error: unknown function!!")
+                
+        return 0
+    
+    
+    #print a short help message
+    def usage(self):
+        
+        sys.stderr.write("""USAGE: %s [options]
+        Miniterm - A simple terminal program for the serial port.
+    
+        options:
+        -p, --port=PORT: port, a number, default = 0 or a device name
+        -b, --baud=BAUD: baudrate, default 9600
+        -r, --rtscts:    enable RTS/CTS flow control (default off)
+        -x, --xonxoff:   enable software flow control (default off)
+        -e, --echo:      enable local echo (default off)
+        -c, --cr:        do not send CR+LF, send CR only
+        -n, --newline:   do not send CR+LF, send LF only
+        -D, --debug:     debug received data (escape nonprintable chars)
+    
+        """ % (sys.argv[0], ))
+
+    def run(self):
+        
+        #parse command line options
+        try:
+            opts, args = getopt.getopt(sys.argv[1:],
+                "hp:b:rxecnD",
+                ["help", "port=", "baud=", "rtscts", "xonxoff", "echo",
+                "cr", "newline", "debug"]
+            )
+        except getopt.GetoptError:
+            # print help information and exit:
+            self.usage()
+            sys.exit(2)
+        
+        for o, a in opts:
+            if o in ("-h", "--help"):       #help text
+                self.usage()
+                sys.exit()
+            elif o in ("-p", "--port"):     #specified port
+                try:
+                    self.port = int(a)
+                except ValueError:
+                    self.port = a
+            elif o in ("-b", "--baud"):     #specified baudrate
+                try:
+                    self.baudrate = int(a)
+                except ValueError:
+                    raise ValueError, "Baudrate must be a integer number, not %r" % a
+            elif o in ("-r", "--rtscts"):
+                self.rtscts = 1
+            elif o in ("-x", "--xonxoff"):
+                self.xonxoff = 1
+            elif o in ("-e", "--echo"):
+                self.echo = 1
+            elif o in ("-c", "--cr"):
+                self.convert_outgoing = CONVERT_CR
+            elif o in ("-n", "--newline"):
+                self.convert_outgoing = CONVERT_LF
+            elif o in ("-D", "--debug"):
+                self.repr_mode = 1
+    
+        if self.convert_outgoing == CONVERT_CRLF:
+            self.newline = '\r\n'         #make it a CR+LF
+        elif self.convert_outgoing == CONVERT_CR:
+            self.newline = '\r'           #make it a CR
+        elif self.convert_outgoing == CONVERT_LF:
+            self.newline = '\n'           #make it a LF
+    
+        #open the port
+        try:
+            self.ts = enhancedserial.EnhancedSerial(self.port, self.baudrate, 
+                                                    rtscts=self.rtscts, xonxoff=self.xonxoff)
+        except:
+            sys.stderr.write("Could not open port %s \n"%self.port)
+            sys.exit(1)
+            
+        #sys.stderr.write("--- type Ctrl-D or Ctrl-C to quit\n")
+        #sys.stderr.write("--- type Ctrl-A to enter test mode\n")
+        
+        #start serial->console thread
+        r = threading.Thread(target=self.reader)
+        r.setDaemon(True)
+        r.start()
+        #and enter console->serial loop
+        self.writer()
+        r.join(0)
+        #sys.stderr.write("\n--- exit ---\n")
+
+def main():
+
+    tt = TestTerm(os.name)
+    tt.run()
+
+if __name__ == '__main__':
+    main()
+
diff --git a/octal/cavium_env/rf_card_cal_tip/bb_testterm.pyc b/octal/cavium_env/rf_card_cal_tip/bb_testterm.pyc
new file mode 100644
index 0000000000..b013305d9c
Binary files /dev/null and b/octal/cavium_env/rf_card_cal_tip/bb_testterm.pyc differ
diff --git a/octal/cavium_env/rf_card_cal_tip/cal_freq_err_pwm.py b/octal/cavium_env/rf_card_cal_tip/cal_freq_err_pwm.py
new file mode 100644
index 0000000000..934e67432b
--- /dev/null
+++ b/octal/cavium_env/rf_card_cal_tip/cal_freq_err_pwm.py
@@ -0,0 +1,240 @@
+#!/usr/bin/python
+
+"""
+Setup:
+1. Agilent MXA, connect cable to one of the antenna port of enodeB
+2. Set TFTP server, address and port as test_config
+"""
+
+import test_config
+import im_calibration
+from time import sleep
+from im_calibration import Calibration
+
+class CalFreqErr(Calibration):
+    
+    def __init__(self, rpt_hndl, rec_num):
+        
+        self.rpt = rpt_hndl
+        self.rn = rec_num
+        self.dif_freq = 0
+        self.pwm_ini = 0x5000
+        self.pwm_cur = 0x5000
+        self.pwm_val = 0x5000
+        self.pwm_lo_val = 0x9200
+        self.limit_cal = 10
+        self.dif_factor = 1
+        self.got_ref = False
+        self.narrow_span = False
+        self.ref_freq = test_config.dl_freq * 1000000
+        self.input_power = 0    # input power in dBm
+        self.signal_bw = 10     # input signal bandwidth
+        
+    def mxa_setup(self):
+        
+        type(self).mxa.send_msg_to_server('*RST')
+        type(self).mxa.send_msg_to_server('*IDN?')
+        in_msg = type(self).mxa.recv_msg_frm_server()
+        print('recv ' + type(self).cfg.mxa_ipaddr + '= ' + in_msg)
+        
+        type(self).mxa.send_msg_to_server(':INIT:CONT ON')
+        type(self).mxa.send_msg_to_server(':INST:SEL SA')
+        type(self).mxa.send_msg_to_server(':CONF:SAN:NDEF')
+        type(self).mxa.send_msg_to_server(':FREQ:CENT ' + str(self.ref_freq) + ' Hz')
+        type(self).mxa.send_msg_to_server(':FREQ:SPAN 50 KHz')
+        #type(self).mxa.send_msg_to_server(':BAND 100 Hz')
+        type(self).mxa.send_msg_to_server(':DISP:WIND:TRAC:Y:RLEV 10 dBm')
+        type(self).mxa.send_msg_to_server(':POW:ATT 20')
+        
+    def mt8870a_setup(self, freq_center):
+        
+        print 'Start VSA...'
+        type(self).mt8870a.send_msg_to_server(':BATC:BAND:FREQ:CENT ' + str(freq_center) + 'MHZ')
+        type(self).mt8870a.send_msg_to_server(':BATC:BAND:POW:RANG:ILEV ' + str(self.input_power))
+        type(self).mt8870a.send_msg_to_server(':BATC:CC:RAD:CBAN ' + str(self.signal_bw))
+        type(self).mt8870a.send_msg_to_server(':BATC:CC:RAD:TMOD TM1_1')
+        
+        type(self).mt8870a.send_msg_to_server(':TRIG:STAT OFF')
+        type(self).mt8870a.send_msg_to_server(':TRIG:SOUR IMM')
+        
+        type(self).mt8870a.send_msg_to_server(':BATC:CAPT:TIME:STAR 0')
+        type(self).mt8870a.send_msg_to_server(':BATC:CAPT:TIME:LENG 1')
+        
+        type(self).mt8870a.send_msg_to_server(':BATC:CAPT:TIME:UWEM:STAR 0')
+        type(self).mt8870a.send_msg_to_server(':BATC:CAPT:TIME:UWEM:LENG 140')
+        type(self).mt8870a.send_msg_to_server(':BATC:CC:PDCC:SYMB:NUMB 2')
+        
+        type(self).mt8870a.send_msg_to_server(':BATC:EVM ON')
+        type(self).mt8870a.send_msg_to_server('*WAI')
+
+    def cmw500_setup(self, freq_center):
+        
+        print 'Start VSA...'
+        #if test_config.band > 32:
+        #    type(self).cmw500.send_msg_to_server("CONF:LTE:MEAS:ENB:DMOD TDD")
+        #else:
+        #    type(self).cmw500.send_msg_to_server("CONF:LTE:MEAS:ENB:DMOD FDD")
+        type(self).cmw500.send_msg_to_server("CONF:LTE:MEAS:ENB:DMOD FDD")    
+        type(self).cmw500.send_msg_to_server("ROUTe:LTE:MEAS:ENB:SCENario:SALone RFAC, RX1")
+            
+        type(self).cmw500.send_msg_to_server("CONF:LTE:MEAS:ENB:RFS:FREQ " + str(freq_center) + " MHz")
+        type(self).cmw500.send_msg_to_server("CONF:LTE:MEAS:ENB:RFS:ENP 35")
+        type(self).cmw500.send_msg_to_server("CONF:LTE:MEAS:ENB:RFS:UMAR 0")
+        
+        if (self.signal_bw == 5):
+            type(self).cmw500.send_msg_to_server("CONF:LTE:MEAS:ENB:MEV:CBAN B050")
+        elif (self.signal_bw == 10):
+            type(self).cmw500.send_msg_to_server("CONF:LTE:MEAS:ENB:MEV:CBAN B100")
+        elif (self.signal_bw == 15):
+            type(self).cmw500.send_msg_to_server("CONF:LTE:MEAS:ENB:MEV:CBAN B150")
+        elif (self.signal_bw == 20):
+            type(self).cmw500.send_msg_to_server("CONF:LTE:MEAS:ENB:MEV:CBAN B200")
+        type(self).cmw500.send_msg_to_server("CONF:LTE:MEAS:ENB:MEV:RES:ALL ON,OFF,OFF,OFF,OFF,OFF,ON,OFF,OFF")
+        type(self).cmw500.send_msg_to_server("CONF:LTE:MEAS:ENB:MEV:SCO:MOD 10")
+        type(self).cmw500.send_msg_to_server("CONF:LTE:MEAS:ENB:MEV:MOEX ON")
+        type(self).cmw500.send_msg_to_server("CONF:LTE:MEAS:ENB:MEV:REP SING")
+        type(self).cmw500.send_msg_to_server("CONF:LTE:MEAS:ENB:MEV:ETES ETM11")
+        type(self).cmw500.send_msg_to_server("CONF:LTE:MEAS:ENB:MEV:PLC 1")
+        type(self).cmw500.send_msg_to_server("TRIG:LTE:MEAS:ENB:MEV:SOUR 'Free Run (Fast Sync)'")
+
+        
+     
+        
+    def start_enodeb(self):
+        
+        type(self).enb.enb_login()
+        type(self).enb.enb_cd_usr_bin()
+        
+        # default is PWM control in booting
+        if (type(self).cfg.tcxo_ctrl == "dax"):
+            print("load ext dac clock control")
+            type(self).enb.enb_load_dax()   # do ext DAC control
+    
+        if test_config.band > 32:
+            type(self).enb.enb_set_zen_tdd_tx()
+            
+        type(self).enb.enb_cd_tmpfs()
+        type(self).enb.enb_run_dsp_app_dl()
+        
+    def do_refclk_cal(self):
+        
+        type(self).enb.enb_pwm_ctrl_call_cmd('l ' + str(self.pwm_lo_val) +
+                                             ' h ' + str(self.pwm_ini) + ' e q')
+        
+        for rn in range(50):
+            print("\ncalibration round: " + str(rn+1))
+            self.check_freq_err()
+            
+            if rn > 30:
+                self.limit_cal = 50;
+            
+            if (abs(self.dif_freq) >= self.limit_cal):
+                self.calc_pwm_value()
+            else:
+                self.got_ref = True
+                print("\nGot target reference frequency,")
+                print("    PWM_high value= " + str(self.pwm_val))
+                print("    PWM_low value= " + str(self.pwm_lo_val))
+                if (type(self).cfg.test_report == True) and (im_calibration.is_test_all == True):
+                    self.rpt.write('\nReference Clock Calibration:\n')
+                    self.rpt.write('Frequency = ' + str(self.ref_freq) + '\n')
+                    self.rpt.write('PWM_high value = ' + str(self.pwm_val) + '\n')
+                    self.rpt.write('PWM_low value = ' + str(self.pwm_lo_val) + '\n')
+                break
+            
+            type(self).enb.enb_pwm_ctrl_call_cmd('h ' + str(self.pwm_val) + ' q')
+            sleep(3)
+        
+        if (not self.got_ref):
+            print("Reference clock calibration failed")
+        else:
+            
+            # pwmreg0 for high pwm, pwmreg1 for low pwm
+            if test_config.wr_var_to_uboot == True:
+                print("fsetenv pwm_offset " + str(self.pwm_val))
+                type(self).enb.tn_write(im_calibration.pp_base, \
+                                "fsetenv pwmreglow " + str(self.pwm_lo_val), 3)
+                type(self).enb.tn_write(im_calibration.pp_base, \
+                                "fsetenv pwmreghigh " + str(self.pwm_val), 3)
+            
+            if (type(self).cfg.en_eeprom_write == True):
+                if (im_calibration.is_test_all == True):
+                    self.write_pwmclk_to_eeprom()
+                else:
+                    se = raw_input("Write result to EEPROM?(y/n):")
+                    if (se == 'y') or (se == 'Y'):
+                        self.write_pwmclk_to_eeprom()
+                        
+                    se = raw_input("Write result to uboot?(y/n):")
+                    if (se == 'y') or (se == 'Y'):
+                        print("fsetenv pwm_offset " + str(self.pwm_val))
+                        type(self).enb.tn_write(im_calibration.pp_base, \
+                                                "fsetenv pwmreglow " \
+                                                + str(self.pwm_lo_val), 3)
+                        type(self).enb.tn_write(im_calibration.pp_base, \
+                                                "fsetenv pwmreghigh " \
+                                                + str(self.pwm_val), 3)
+            
+    def write_pwmclk_to_eeprom(self):
+        
+        type(self).enb.enb_cd_usr_bin()
+        
+        print "edit EEPROM record"
+        type(self).enb.enb_eeprom_edit_record('wrh', self.rn, str(self.pwm_val))
+        type(self).enb.enb_eeprom_edit_record('wrl', self.rn, str(self.pwm_lo_val))
+        sleep(0.5)    # wait EEPROM data wrote
+     
+    def check_freq_err(self):
+        
+        if (type(self).cfg.test_set == 'anritsu'):
+            
+            type(self).mt8870a.send_msg_to_server(':INIT:MODE:SING')
+            type(self).mt8870a.send_msg_to_server('*WAI')
+            type(self).mt8870a.send_msg_to_server(':FETC:BATC1?')
+            type(self).mt8870a.send_msg_to_server('*WAI')
+            #sleep(3)
+            in_msg = type(self).mt8870a.recv_msg_frm_server()
+            #print in_msg
+            line = in_msg.split(',')
+            self.dif_freq = int(float(line[1]))
+            print "frequency error = " + str(self.dif_freq) + " Hz"
+            
+        elif (type(self).cfg.test_set == 'rs'):
+        	  
+        	  type(self).cmw500.send_msg_to_server('INIT:LTE:MEAS:ENB:MEV')
+        	  type(self).cmw500.send_msg_to_server('*WAI')
+        	  type(self).cmw500.send_msg_to_server('FETC:LTE:MEAS:ENB:MEV:MOD:AVER?')
+        	  in_msg = type(self).cmw500.recv_msg_frm_server()
+        	  line = in_msg.split(',')
+        	  if (int(line[0]) != 0):
+        	      print in_msg
+        	  self.dif_freq = int(float(line[15]))
+        	  print "frequency error = " + str(self.dif_freq) + " Hz"
+    
+    def calc_pwm_value(self):
+        
+        if (abs(self.dif_freq) > 10000):
+            self.pwm_val = self.pwm_cur + 1000
+            print("pwm_val=" + str(self.pwm_cur) + " diff=" + str(self.dif_freq) 
+                  + " new_val=" + str(self.pwm_val))
+        else:
+            self.pwm_val = self.pwm_cur - self.dif_freq * self.dif_factor
+            print("pwm_val=" + str(self.pwm_cur) + " diff=" + str(self.dif_freq) 
+                  + " new_val=" + str(self.pwm_val))
+            
+        self.pwm_cur = self.pwm_val  
+        
+    def run(self):
+        
+        self.start_enodeb()
+        sleep(3)    # wait spectrum comes out
+        
+        if (type(self).cfg.test_set == 'agilent'):
+            self.mxa_setup()
+        elif (type(self).cfg.test_set == 'anritsu'):
+            self.mt8870a_setup(test_config.dl_freq)
+        elif (type(self).cfg.test_set == 'rs'):
+        	  self.cmw500_setup(test_config.dl_freq)
+            
+        self.do_refclk_cal()
+        
\ No newline at end of file
diff --git a/octal/cavium_env/rf_card_cal_tip/cal_freq_err_pwm.pyc b/octal/cavium_env/rf_card_cal_tip/cal_freq_err_pwm.pyc
new file mode 100644
index 0000000000..750f1b983c
Binary files /dev/null and b/octal/cavium_env/rf_card_cal_tip/cal_freq_err_pwm.pyc differ
diff --git a/octal/cavium_env/rf_card_cal_tip/cal_instructions_v10.docx b/octal/cavium_env/rf_card_cal_tip/cal_instructions_v10.docx
new file mode 100644
index 0000000000..bafda08e21
Binary files /dev/null and b/octal/cavium_env/rf_card_cal_tip/cal_instructions_v10.docx differ
diff --git a/octal/cavium_env/rf_card_cal_tip/cal_iq_offset.py b/octal/cavium_env/rf_card_cal_tip/cal_iq_offset.py
new file mode 100644
index 0000000000..f7be1eb51f
--- /dev/null
+++ b/octal/cavium_env/rf_card_cal_tip/cal_iq_offset.py
@@ -0,0 +1,264 @@
+#!/usr/bin/python
+
+"""
+Setup:
+1. Agilent MXA, connect to primary antenna port of enodeB
+2. Set TFTP server, address and port as test_config
+"""
+
+import operator
+import test_config
+import im_calibration
+from time import sleep
+from im_calibration import Calibration
+
+class CalIQOffset(Calibration):
+    
+    def __init__(self, rpt_hndl, rec_num):
+        
+        self.rpt = rpt_hndl
+        self.rn = rec_num
+        self.iq_step = 5 #3
+        self.local_freq_tolerance = 50000 # tolerance of local frequency deviation
+        self.offs_low = 0xF0    # IQ offset lower limit #0xC0
+        self.offs_up = 0xFF     # IQ offset upper limit
+        
+        self.reg_tx1_i = 0x92
+        self.reg_tx1_q = 0x93
+        self.reg_tx2_i = 0x94
+        self.reg_tx2_q = 0x95
+        self.reg_en_offset = 0x9F #0x9A
+        
+        self.results = {}
+        self.offsets = []
+        
+    def mxa_setup(self):
+        
+        type(self).mxa.send_msg_to_server('*RST')
+        #type(self).mxa.send_msg_to_server('*IDN?')
+        #in_msg = type(self).mxa.recv_msg_frm_server()
+        #print('recv ' + type(self).cfg.mxa_ipaddr + '= ' + in_msg)
+        
+        type(self).mxa.send_msg_to_server(':INIT:CONT ON')
+        type(self).mxa.send_msg_to_server(':INST:SEL SA')
+        type(self).mxa.send_msg_to_server(':FREQ:CENT ' + str(test_config.dl_freq) + ' MHz')
+        type(self).mxa.send_msg_to_server(':FREQ:SPAN 300 kHz')
+        type(self).mxa.send_msg_to_server(':BAND 100 Hz')
+        type(self).mxa.send_msg_to_server(':POW:ATT 38')
+        type(self).mxa.send_msg_to_server(':DISP:WIND:TRAC:Y:RLEV 20 dBm')
+        
+    def start_enodeb_tx(self):
+        
+        type(self).enb.enb_login()
+        
+        # default is PWM control in booting
+        if (type(self).cfg.tcxo_ctrl == "dax"):
+            print("load ext dac clock control")
+            type(self).enb.enb_cd_usr_bin()
+            type(self).enb.enb_load_dax()   # do ext DAC control
+    
+        if test_config.band > 32:
+            type(self).enb.enb_cd_usr_bin()
+            type(self).enb.enb_set_zen_tdd_tx()
+            
+        type(self).enb.enb_cd_tmpfs()
+        type(self).enb.enb_run_dsp_app_dl()
+            
+    def do_iq_offset_cal(self):
+        
+        self.reg_tx_i = self.reg_tx1_i
+        self.reg_tx_q = self.reg_tx1_q
+        
+        type(self).enb.enb_cd_usr_bin()
+        
+        if (type(self).cfg.cal_bandwidth >= 15):
+            cmd = "w 0x02 0x4e q"
+        else:
+            cmd = "w 0x02 0x5e q"
+            
+        type(self).enb.enb_rf_drv_call_cmd(cmd)
+        sleep(2)
+        
+        type(self).enb.enb_adi_write_reg(str(hex(self.reg_en_offset)), str(hex(0x0C)))
+        
+        try:
+            for ant in range(2):
+                print('')
+                print("Testing antenna port " + str(ant+1))
+                
+                if (ant == 1):
+                    self.reg_tx_i = self.reg_tx2_i
+                    self.reg_tx_q = self.reg_tx2_q
+                    type(self).enb.enb_disable_TX1()
+                else:
+                    type(self).enb.enb_disable_TX2()
+                    
+                # 1. fix Q offset to zero
+                print("\n1. fix Q offset to initial value")
+                type(self).enb.enb_adi_write_reg(str(hex(self.reg_tx_q)), str(hex(0xC0)))
+                
+                # 2. optimize I offset
+                print("\n2. optimize I offset")
+                self.results = {}
+                for offs in xrange(self.offs_low, self.offs_up + 1, self.iq_step):
+                    type(self).enb.enb_adi_write_reg(str(hex(self.reg_tx_i)), str(hex(offs)))
+                    #sleep(self.delay)    # wait for average
+                    lopwr = self.get_local_leakage_power()
+                    if (lopwr == 0):
+                        print 'IQ offset test error'
+                        return -1
+                    self.results[str(hex(offs))] = lopwr
+                    print('I offset ' + str(hex(offs)) + ' power ' + str(lopwr) + ' dBm')
+                    
+                sort_res = sorted(self.results.iteritems(), key=operator.itemgetter(1))
+                try:
+                    self.offsets.append(sort_res[0][0])
+                except:
+                    print("error")
+                    
+                # 3. fix I offset to new value
+                print("\n3. fix I offset to new value")
+                type(self).enb.enb_adi_write_reg(str(hex(self.reg_tx_i)), str(sort_res[0][0]))
+                
+                # 4. optimize Q offset
+                print("\n4. optimize Q offset")
+                self.results = {}
+                for offs in xrange(self.offs_low, self.offs_up + 1, self.iq_step):
+                    type(self).enb.enb_adi_write_reg(str(hex(self.reg_tx_q)), str(hex(offs)))
+                    #sleep(self.delay)    # wait for average
+                    lopwr = self.get_local_leakage_power()
+                    self.results[str(hex(offs))] = lopwr
+                    print('Q offset ' + str(hex(offs)) + ' power ' + str(lopwr) + ' dBm')
+                    
+                sort_res = sorted(self.results.iteritems(), key=operator.itemgetter(1))
+                self.offsets.append(sort_res[0][0])
+                
+                # 5. fix Q offset to new value
+                print("\n5. fix Q offset to new value")
+                type(self).enb.enb_adi_write_reg(str(hex(self.reg_tx_q)), str(sort_res[0][0]))
+                
+                # 6. optimize I offset
+                print("\n6. optimize I offset")
+                self.results = {}
+                for offs in xrange(self.offs_low, self.offs_up + 1, self.iq_step):
+                    type(self).enb.enb_adi_write_reg(str(hex(self.reg_tx_i)), str(hex(offs)))
+                    #sleep(self.delay)    # wait for average
+                    lopwr = self.get_local_leakage_power()
+                    self.results[str(hex(offs))] = lopwr
+                    print('I offset ' + str(hex(offs)) + ' power ' + str(lopwr) + ' dBm')
+                    
+                sort_res = sorted(self.results.iteritems(), key=operator.itemgetter(1))
+                self.offsets.append(sort_res[0][0])
+                
+                # 7. fix I offset to new value
+                print("\n7. fix I offset to new value")
+                type(self).enb.enb_adi_write_reg(str(hex(self.reg_tx_i)), str(sort_res[0][0]))
+        
+        except:
+            #print Exception, e
+            print("\n8. save dummy offset results")
+            self.offsets.append(hex(255))
+            self.offsets.append(hex(255))
+            self.offsets.append(hex(255))
+            self.offsets.append(hex(255))
+            self.offsets.append(hex(255))
+            self.offsets.append(hex(255))
+        else:    
+            # 8. save offset results
+            print('\nIQ Offset Calibration Results:\n')
+            print('tx1_i_offset = ' + str(self.offsets[2]))
+            print('tx1_q_offset = ' + str(self.offsets[1]))
+            print('tx2_i_offset = ' + str(self.offsets[5]))
+            print('tx2_q_offset = ' + str(self.offsets[4]))
+            print("\n8. save offset results")
+            
+        
+        if test_config.wr_var_to_uboot == True:
+            type(self).enb.tn_write(im_calibration.pp_base, "fsetenv tx1_q_offset " \
+                                    + str(self.offsets[1]), 3)
+            print("fsetenv TX1_Q_OFFSET " + str(self.offsets[1]))
+            type(self).enb.tn_write(im_calibration.pp_base, "fsetenv tx1_i_offset " \
+                                    + str(self.offsets[2]), 3)
+            print("fsetenv TX1_I_OFFSET " + str(self.offsets[2]))
+            type(self).enb.tn_write(im_calibration.pp_base, "fsetenv tx2_q_offset " \
+                                    + str(self.offsets[4]), 3)
+            print("fsetenv TX2_Q_OFFSET " + str(self.offsets[4]))
+            type(self).enb.tn_write(im_calibration.pp_base, "fsetenv tx2_i_offset " \
+                                    + str(self.offsets[5]), 3)
+            print("fsetenv TX2_I_OFFSET " + str(self.offsets[5]))
+        
+        if (type(self).cfg.test_report == True) and (im_calibration.is_test_all == True):
+            self.rpt.write('\nIQ Offset Calibration:\n')
+            self.rpt.write('tx1_i_offset = ' + str(self.offsets[2]) + '\n')
+            self.rpt.write('tx1_q_offset = ' + str(self.offsets[1]) + '\n')
+            self.rpt.write('tx2_i_offset = ' + str(self.offsets[5]) + '\n')
+            self.rpt.write('tx2_q_offset = ' + str(self.offsets[4]) + '\n')
+            
+        if (type(self).cfg.en_eeprom_write == True):
+            self.enb.editUbootenv('TX1_I_OFFSET', str(self.offsets[2]))
+            self.enb.editUbootenv('TX1_Q_OFFSET', str(self.offsets[1]))
+            self.enb.editUbootenv('TX2_I_OFFSET', str(self.offsets[5]))
+            self.enb.editUbootenv('TX2_Q_OFFSET', str(self.offsets[4]))
+
+            if (im_calibration.is_test_all == True):
+                self.write_iqoffset_to_eeprom()
+            else:
+                se = raw_input("Write result to EEPROM?(y/n):")
+                if (se == 'y') or (se == 'Y'):
+                    self.write_iqoffset_to_eeprom()
+            
+        # stop transmit
+        #type(self).enb.enb_cd_tmpfs()
+        #type(self).enb.enb_stop_transmit()
+        return 0
+        
+        
+    def write_iqoffset_to_eeprom(self):
+        
+        type(self).enb.enb_cd_usr_bin()
+        
+        print "edit EEPROM record"
+        type(self).enb.enb_eeprom_edit_record('wiop', self.rn, str(self.offsets[2]))
+        type(self).enb.enb_eeprom_edit_record('wqop', self.rn, str(self.offsets[1]))
+        type(self).enb.enb_eeprom_edit_record('wios', self.rn, str(self.offsets[5]))
+        type(self).enb.enb_eeprom_edit_record('wqos', self.rn, str(self.offsets[4]))
+        sleep(0.5)    # wait EEPROM data wrote
+        
+    def get_local_leakage_power(self):
+        
+        type(self).mxa.send_msg_to_server(':FREQ:CENT ' + str(test_config.dl_freq) + ' MHz')
+        type(self).mxa.send_msg_to_server(':CALC:MARK1:CPS ON')    # mark peak
+        
+        if (self.is_peak_at_local() == False):
+            print "local leakage not detected"
+            return 0
+            
+        type(self).mxa.send_msg_to_server(':CALC:MARK1:Y?')        # get power
+        in_msg = type(self).mxa.recv_msg_frm_server()
+        cur_pwr = round(float(in_msg), 2)
+        #print('recv ' + type(self).cfg.mxa_ipaddr + '= ' + in_msg)
+        
+        return cur_pwr
+    
+    def is_peak_at_local(self):
+        
+        type(self).mxa.send_msg_to_server(':CALC:MARK1:X?')        # get mark frequency
+        in_msg = type(self).mxa.recv_msg_frm_server()
+        fpeak = float(in_msg)
+        #print('recv ' + type(self).cfg.mxa_ipaddr + '= ' + in_msg)
+        diff = abs(test_config.dl_freq*1000000 - fpeak)
+        
+        if (diff < self.local_freq_tolerance):
+            return True
+        else:
+            return False
+        
+        
+    def run(self):
+        
+        self.mxa_setup()
+        self.start_enodeb_tx()
+        sleep(8)    # wait for leakage appears
+        
+        res = self.do_iq_offset_cal()
+        return res
diff --git a/octal/cavium_env/rf_card_cal_tip/cal_iq_offset.pyc b/octal/cavium_env/rf_card_cal_tip/cal_iq_offset.pyc
new file mode 100644
index 0000000000..4f153da61a
Binary files /dev/null and b/octal/cavium_env/rf_card_cal_tip/cal_iq_offset.pyc differ
diff --git a/octal/cavium_env/rf_card_cal_tip/cal_iq_offset_cmw500.py b/octal/cavium_env/rf_card_cal_tip/cal_iq_offset_cmw500.py
new file mode 100644
index 0000000000..df74cafe8b
--- /dev/null
+++ b/octal/cavium_env/rf_card_cal_tip/cal_iq_offset_cmw500.py
@@ -0,0 +1,260 @@
+#!/usr/bin/python
+
+"""
+Setup:
+1. RS CMW500, connect to primary antenna port of enodeB
+2. Set TFTP server, address and port as test_config
+"""
+
+import operator
+import test_config
+import im_calibration
+from time import sleep
+from im_calibration import Calibration
+
+class CalIQOffsetCMW500(Calibration):
+    
+    def __init__(self, rpt_hndl, rec_num):
+        
+        self.rpt = rpt_hndl
+        self.rn = rec_num
+        self.iq_step = 3
+        self.local_freq_tolerance = 10000 # tolerance of local frequency deviation
+        self.offs_low = 0xF0    # IQ offset lower limit
+        self.offs_up = 0xFF     # IQ offset upper limit
+        
+        self.reg_tx1_i = 0x92
+        self.reg_tx1_q = 0x93
+        self.reg_tx2_i = 0x94
+        self.reg_tx2_q = 0x95
+        self.reg_en_offset = 0x9F #0x9A
+        
+        self.results = {}
+        self.offsets = []
+        
+    def cmw500_setup(self):
+        
+        type(self).cmw500.send_msg_to_server("CONF:GPRF:MEAS:SPEC:FREQ:CENT " + str(test_config.dl_freq*1000000))
+        type(self).cmw500.send_msg_to_server("CONF:GPRF:MEAS:SPEC:FREQ:SPAN 300000")
+        type(self).cmw500.send_msg_to_server("CONF:GPRF:MEAS:SPEC:REP SING")
+        type(self).cmw500.send_msg_to_server("CONF:GPRF:MEAS:SPEC:SCO 10")
+        type(self).cmw500.send_msg_to_server('CONF:GPRF:MEAS:RFS:ENP 30')
+        type(self).cmw500.send_msg_to_server('CONF:GPRF:MEAS:RFS:UMAR 0')
+      
+        
+        
+    def start_enodeb_tx(self):
+        
+        type(self).enb.enb_login()
+        
+        # default is PWM control in booting
+        if (type(self).cfg.tcxo_ctrl == "dax"):
+            print("load ext dac clock control")
+            type(self).enb.enb_cd_usr_bin()
+            type(self).enb.enb_load_dax()   # do ext DAC control
+    
+        if test_config.band > 32:
+            type(self).enb.enb_cd_usr_bin()
+            type(self).enb.enb_set_zen_tdd_tx()
+            
+        type(self).enb.enb_cd_tmpfs()
+        type(self).enb.enb_run_dsp_app_dl()
+            
+    def do_iq_offset_cal(self):
+        
+        self.reg_tx_i = self.reg_tx1_i
+        self.reg_tx_q = self.reg_tx1_q
+        
+        type(self).enb.enb_cd_usr_bin()
+        type(self).enb.enb_adi_write_reg(str(hex(self.reg_en_offset)), str(hex(0x0C)))
+        
+        try:
+            for ant in range(2):
+                print('')
+                print("Testing antenna port " + str(ant+1))
+                
+                if (ant == 1):
+                    self.reg_tx_i = self.reg_tx2_i
+                    self.reg_tx_q = self.reg_tx2_q
+                    type(self).enb.enb_disable_TX1()
+                    if (type(self).cfg.test_set == 'rs'):
+                        type(self).cmw500.send_msg_to_server("ROUTe:GPRF:MEASurement:SCENario:SALone RFBC, RX1")
+                else:
+                    type(self).enb.enb_disable_TX2()
+                    if (type(self).cfg.test_set == 'rs'):
+                        type(self).cmw500.send_msg_to_server("ROUTe:GPRF:MEASurement:SCENario:SALone RFAC, RX1")
+                    
+                # 1. fix Q offset to zero
+                print("\n1. fix Q offset to initial value")
+                type(self).enb.enb_adi_write_reg(str(hex(self.reg_tx_q)), str(hex(0xC0)))
+                
+                # 2. optimize I offset
+                print("\n2. optimize I offset")
+                self.results = {}
+                for offs in xrange(self.offs_low, self.offs_up + 1, self.iq_step):
+                    type(self).enb.enb_adi_write_reg(str(hex(self.reg_tx_i)), str(hex(offs)))
+                    #sleep(self.delay)    # wait for average
+                    lopwr = self.get_local_leakage_power()
+                    if (lopwr == 0):
+                        print 'IQ offset test error'
+                        return -1
+                    self.results[str(hex(offs))] = lopwr
+                    print('I offset ' + str(hex(offs)) + ' power ' + str(lopwr) + ' dBm')
+                    
+                sort_res = sorted(self.results.iteritems(), key=operator.itemgetter(1))
+                try:
+                    self.offsets.append(sort_res[0][0])
+                except:
+                    print("error")
+                    
+                # 3. fix I offset to new value
+                print("\n3. fix I offset to new value")
+                type(self).enb.enb_adi_write_reg(str(hex(self.reg_tx_i)), str(sort_res[0][0]))
+                
+                # 4. optimize Q offset
+                print("\n4. optimize Q offset")
+                self.results = {}
+                for offs in xrange(self.offs_low, self.offs_up + 1, self.iq_step):
+                    type(self).enb.enb_adi_write_reg(str(hex(self.reg_tx_q)), str(hex(offs)))
+                    #sleep(self.delay)    # wait for average
+                    lopwr = self.get_local_leakage_power()
+                    self.results[str(hex(offs))] = lopwr
+                    print('Q offset ' + str(hex(offs)) + ' power ' + str(lopwr) + ' dBm')
+                    
+                sort_res = sorted(self.results.iteritems(), key=operator.itemgetter(1))
+                self.offsets.append(sort_res[0][0])
+                
+                # 5. fix Q offset to new value
+                print("\n5. fix Q offset to new value")
+                type(self).enb.enb_adi_write_reg(str(hex(self.reg_tx_q)), str(sort_res[0][0]))
+                
+                # 6. optimize I offset
+                print("\n6. optimize I offset")
+                self.results = {}
+                for offs in xrange(self.offs_low, self.offs_up + 1, self.iq_step):
+                    type(self).enb.enb_adi_write_reg(str(hex(self.reg_tx_i)), str(hex(offs)))
+                    #sleep(self.delay)    # wait for average
+                    lopwr = self.get_local_leakage_power()
+                    self.results[str(hex(offs))] = lopwr
+                    print('I offset ' + str(hex(offs)) + ' power ' + str(lopwr) + ' dBm')
+                    
+                sort_res = sorted(self.results.iteritems(), key=operator.itemgetter(1))
+                self.offsets.append(sort_res[0][0])
+                
+                # 7. fix I offset to new value
+                print("\n7. fix I offset to new value")
+                type(self).enb.enb_adi_write_reg(str(hex(self.reg_tx_i)), str(sort_res[0][0]))
+        
+        except:
+            #print Exception, e
+            print("\n8. save dummy offset results")
+            self.offsets.append(hex(255))
+            self.offsets.append(hex(255))
+            self.offsets.append(hex(255))
+            self.offsets.append(hex(255))
+            self.offsets.append(hex(255))
+            self.offsets.append(hex(255))
+        else:    
+            # 8. save offset results
+            print('\nIQ Offset Calibration Results:\n')
+            print('tx1_i_offset = ' + str(self.offsets[2]))
+            print('tx1_q_offset = ' + str(self.offsets[1]))
+            print('tx2_i_offset = ' + str(self.offsets[5]))
+            print('tx2_q_offset = ' + str(self.offsets[4]))
+            print("\n8. save offset results")
+        
+        if test_config.wr_var_to_uboot == True:
+            type(self).enb.tn_write(im_calibration.pp_base, "fsetenv tx1_q_offset " \
+                                    + str(self.offsets[1]), 3)
+            print("fsetenv TX1_Q_OFFSET " + str(self.offsets[1]))
+            type(self).enb.tn_write(im_calibration.pp_base, "fsetenv tx1_i_offset " \
+                                     + str(self.offsets[2]), 3)
+            print("fsetenv TX1_I_OFFSET " + str(self.offsets[2]))
+            type(self).enb.tn_write(im_calibration.pp_base, "fsetenv tx2_q_offset " \
+                                    + str(self.offsets[4]), 3)
+            print("fsetenv TX2_Q_OFFSET " + str(self.offsets[4]))
+            type(self).enb.tn_write(im_calibration.pp_base, "fsetenv tx2_i_offset " \
+                                    + str(self.offsets[5]), 3)
+            print("fsetenv TX2_I_OFFSET " + str(self.offsets[5]))
+        
+        if (type(self).cfg.test_report == True) and (im_calibration.is_test_all == True):
+            self.rpt.write('\nIQ Offset Calibration:\n')
+            self.rpt.write('tx1_i_offset = ' + str(self.offsets[2]) + '\n')
+            self.rpt.write('tx1_q_offset = ' + str(self.offsets[1]) + '\n')
+            self.rpt.write('tx2_i_offset = ' + str(self.offsets[5]) + '\n')
+            self.rpt.write('tx2_q_offset = ' + str(self.offsets[4]) + '\n')
+            
+        if (type(self).cfg.en_eeprom_write == True):
+            self.enb.editUbootenv('TX1_I_OFFSET', str(self.offsets[2]))
+            self.enb.editUbootenv('TX1_Q_OFFSET', str(self.offsets[1]))
+            self.enb.editUbootenv('TX2_I_OFFSET', str(self.offsets[5]))
+            self.enb.editUbootenv('TX2_Q_OFFSET', str(self.offsets[4]))
+            
+            if (im_calibration.is_test_all == True):
+                self.write_iqoffset_to_eeprom()
+            else:
+                se = raw_input("Write result to EEPROM?(y/n):")
+                if (se == 'y') or (se == 'Y'):
+                    self.write_iqoffset_to_eeprom()
+            
+        # stop transmit
+        #type(self).enb.enb_cd_tmpfs()
+        #type(self).enb.enb_stop_transmit()
+        return 0
+        
+    def write_iqoffset_to_eeprom(self):
+        
+        type(self).enb.enb_cd_usr_bin()
+        
+        print "edit EEPROM record"
+        type(self).enb.enb_eeprom_edit_record('wiop', self.rn, str(self.offsets[2]))
+        type(self).enb.enb_eeprom_edit_record('wqop', self.rn, str(self.offsets[1]))
+        type(self).enb.enb_eeprom_edit_record('wios', self.rn, str(self.offsets[5]))
+        type(self).enb.enb_eeprom_edit_record('wqos', self.rn, str(self.offsets[4]))
+        sleep(0.5)    # wait EEPROM data wrote
+        
+    def get_local_leakage_power(self):
+        
+        type(self).cmw500.send_msg_to_server("INIT:GPRF:MEAS:SPEC")    
+        type(self).cmw500.send_msg_to_server("*WAI")
+        #sleep(1)
+        
+        if (self.is_peak_at_local() == False):
+            print "local leakage not detected"
+            return 0
+            
+        type(self).cmw500.send_msg_to_server("FETC:GPRF:MEAS:SPEC:REFM:SPE? AVER,CURR")        # get power
+        in_msg = type(self).cmw500.recv_msg_frm_server()
+        line = in_msg.split(',')
+        if (int(line[0]) != 0):
+            print in_msg
+        cur_pwr = round(float(line[2]), 2)
+        #print('recv ' + type(self).cfg.cmw500_ipaddr + '= ' + in_msg)
+        
+        return cur_pwr
+    
+    def is_peak_at_local(self):
+        
+        type(self).cmw500.send_msg_to_server("FETC:GPRF:MEAS:SPEC:REFM:SPE? AVER,CURR")       # get mark frequency
+        in_msg = type(self).cmw500.recv_msg_frm_server()
+        line = in_msg.split(',')
+        if (int(line[0]) != 0):
+            print in_msg
+        fpeak = float(line[1])
+        #print('recv ' + type(self).cfg.cmw500_ipaddr + '= ' + in_msg)
+        diff = abs(test_config.dl_freq*1000000 - fpeak)
+        
+        if (diff < self.local_freq_tolerance):
+            return True
+        else:
+            return False
+        
+        
+    def run(self):
+        
+        self.start_enodeb_tx()
+        self.cmw500_setup()
+        
+        sleep(2)    # wait for leakage appears
+        res = self.do_iq_offset_cal()
+        return res
diff --git a/octal/cavium_env/rf_card_cal_tip/cal_iq_offset_cmw500.pyc b/octal/cavium_env/rf_card_cal_tip/cal_iq_offset_cmw500.pyc
new file mode 100644
index 0000000000..e157ddd800
Binary files /dev/null and b/octal/cavium_env/rf_card_cal_tip/cal_iq_offset_cmw500.pyc differ
diff --git a/octal/cavium_env/rf_card_cal_tip/cal_iq_offset_ms8870a.py b/octal/cavium_env/rf_card_cal_tip/cal_iq_offset_ms8870a.py
new file mode 100644
index 0000000000..9b8d93f381
--- /dev/null
+++ b/octal/cavium_env/rf_card_cal_tip/cal_iq_offset_ms8870a.py
@@ -0,0 +1,254 @@
+#!/usr/bin/python
+
+"""
+Setup:
+1. Agilent mt8870a, connect to primary antenna port of enodeB
+2. Set TFTP server, address and port as test_config
+"""
+
+import operator
+import test_config
+import im_calibration
+from time import sleep
+from im_calibration import Calibration
+
+class CalIQOffsetMT8870A(Calibration):
+    
+    def __init__(self, rpt_hndl, rec_num):
+        
+        self.rpt = rpt_hndl
+        self.rn = rec_num
+        self.iq_step = 3
+        self.local_freq_tolerance = 10000 # tolerance of local frequency deviation
+        self.offs_low = 0xF0    # IQ offset lower limit
+        self.offs_up = 0xFF     # IQ offset upper limit
+        
+        self.reg_tx1_i = 0x92
+        self.reg_tx1_q = 0x93
+        self.reg_tx2_i = 0x94
+        self.reg_tx2_q = 0x95
+        self.reg_en_offset = 0x9F #0x9A
+        
+        self.results = {}
+        self.offsets = []
+        
+    def mt8870a_setup(self):
+        
+        type(self).mt8870a.send_msg_to_server('*RST')
+        type(self).mt8870a.send_msg_to_server('*IDN?')
+        in_msg = type(self).mt8870a.recv_msg_frm_server()
+        print('recv ' + type(self).cfg.mt8870a_ipaddr + '= ' + in_msg)
+        
+        #type(self).mt8870a.send_msg_to_server('SYST:LANG SCPI')
+        #type(self).mt8870a.send_msg_to_server('ROUT:PORT:CONN:DIR PORT1,PORT3')
+        type(self).mt8870a.send_msg_to_server('INST CELLULAR')
+        type(self).mt8870a.send_msg_to_server('CONF:CELL:MEAS:STAN COMMON')
+        type(self).mt8870a.send_msg_to_server('CONF:CELL:MEAS:SEL SPMON')
+        type(self).mt8870a.send_msg_to_server('CONF:CELL:MEAS:RFS:FREQ ' + str(test_config.dl_freq*1000000))
+        type(self).mt8870a.send_msg_to_server('CONF:CELL:COMM:SPM:SPAN 1MHZ')
+        type(self).mt8870a.send_msg_to_server('CONF:CELL:COMM:SPM:RBW 100HZ')
+        type(self).mt8870a.send_msg_to_server('CONF:CELL:COMM:SPM:MARK:PEAK:RANG 0.002')
+        type(self).mt8870a.send_msg_to_server('CONF:CELL:MEAS:RFS:LEV 10')
+        
+    def start_enodeb_tx(self):
+        
+        type(self).enb.enb_login()
+        
+        # default is PWM control in booting
+        if (type(self).cfg.tcxo_ctrl == "dax"):
+            print("load ext dac clock control")
+            type(self).enb.enb_cd_usr_bin()
+            type(self).enb.enb_load_dax()   # do ext DAC control
+    
+        if test_config.band > 32:
+            type(self).enb.enb_cd_usr_bin()
+            type(self).enb.enb_set_zen_tdd_tx()
+            
+        type(self).enb.enb_cd_tmpfs()
+        type(self).enb.enb_run_dsp_app_dl()
+            
+    def do_iq_offset_cal(self):
+        
+        self.reg_tx_i = self.reg_tx1_i
+        self.reg_tx_q = self.reg_tx1_q
+        
+        type(self).enb.enb_cd_usr_bin()
+        type(self).enb.enb_adi_write_reg(str(hex(self.reg_en_offset)), str(hex(0x0C)))
+        
+        try:
+            for ant in range(2):
+                print('')
+                print("Testing antenna port " + str(ant+1))
+                
+                if (ant == 1):
+                    self.reg_tx_i = self.reg_tx2_i
+                    self.reg_tx_q = self.reg_tx2_q
+                    type(self).enb.enb_disable_TX1()
+                else:
+                    type(self).enb.enb_disable_TX2()
+                    
+                # 1. fix Q offset to zero
+                print("\n1. fix Q offset to initial value")
+                type(self).enb.enb_adi_write_reg(str(hex(self.reg_tx_q)), str(hex(0xC0)))
+                
+                # 2. optimize I offset
+                print("\n2. optimize I offset")
+                self.results = {}
+                for offs in xrange(self.offs_low, self.offs_up + 1, self.iq_step):
+                    type(self).enb.enb_adi_write_reg(str(hex(self.reg_tx_i)), str(hex(offs)))
+                    #sleep(self.delay)    # wait for average
+                    lopwr = self.get_local_leakage_power()
+                    self.results[str(hex(offs))] = lopwr
+                    print('I offset ' + str(hex(offs)) + ' power ' + str(lopwr) + ' dBm')
+                    
+                sort_res = sorted(self.results.iteritems(), key=operator.itemgetter(1))
+                try:
+                    self.offsets.append(sort_res[0][0])
+                except:
+                    print("error")
+                    
+                # 3. fix I offset to new value
+                print("\n3. fix I offset to new value")
+                type(self).enb.enb_adi_write_reg(str(hex(self.reg_tx_i)), str(sort_res[0][0]))
+                
+                # 4. optimize Q offset
+                print("\n4. optimize Q offset")
+                self.results = {}
+                for offs in xrange(self.offs_low, self.offs_up + 1, self.iq_step):
+                    type(self).enb.enb_adi_write_reg(str(hex(self.reg_tx_q)), str(hex(offs)))
+                    #sleep(self.delay)    # wait for average
+                    lopwr = self.get_local_leakage_power()
+                    self.results[str(hex(offs))] = lopwr
+                    print('Q offset ' + str(hex(offs)) + ' power ' + str(lopwr) + ' dBm')
+                    
+                sort_res = sorted(self.results.iteritems(), key=operator.itemgetter(1))
+                self.offsets.append(sort_res[0][0])
+                
+                # 5. fix Q offset to new value
+                print("\n5. fix Q offset to new value")
+                type(self).enb.enb_adi_write_reg(str(hex(self.reg_tx_q)), str(sort_res[0][0]))
+                
+                # 6. optimize I offset
+                print("\n6. optimize I offset")
+                self.results = {}
+                for offs in xrange(self.offs_low, self.offs_up + 1, self.iq_step):
+                    type(self).enb.enb_adi_write_reg(str(hex(self.reg_tx_i)), str(hex(offs)))
+                    #sleep(self.delay)    # wait for average
+                    lopwr = self.get_local_leakage_power()
+                    self.results[str(hex(offs))] = lopwr
+                    print('I offset ' + str(hex(offs)) + ' power ' + str(lopwr) + ' dBm')
+                    
+                sort_res = sorted(self.results.iteritems(), key=operator.itemgetter(1))
+                self.offsets.append(sort_res[0][0])
+                
+                # 7. fix I offset to new value
+                print("\n7. fix I offset to new value")
+                type(self).enb.enb_adi_write_reg(str(hex(self.reg_tx_i)), str(sort_res[0][0]))
+        
+        except:
+            #print Exception, e
+            print("\n8. save dummy offset results")
+            self.offsets.append(hex(255))
+            self.offsets.append(hex(255))
+            self.offsets.append(hex(255))
+            self.offsets.append(hex(255))
+            self.offsets.append(hex(255))
+            self.offsets.append(hex(255))
+        else:    
+            # 8. save offset results
+            print('\nIQ Offset Calibration Results:\n')
+            print('tx1_i_offset = ' + str(self.offsets[2]))
+            print('tx1_q_offset = ' + str(self.offsets[1]))
+            print('tx2_i_offset = ' + str(self.offsets[5]))
+            print('tx2_q_offset = ' + str(self.offsets[4]))
+            print("\n8. save offset results")
+        
+        if test_config.wr_var_to_uboot == True:
+            type(self).enb.tn_write(im_calibration.pp_base, "fsetenv tx1_q_offset " \
+                                    + str(self.offsets[1]), 3)
+            print("fsetenv TX1_Q_OFFSET " + str(self.offsets[1]))
+            type(self).enb.tn_write(im_calibration.pp_base, "fsetenv tx1_i_offset " \
+                                     + str(self.offsets[2]), 3)
+            print("fsetenv TX1_I_OFFSET " + str(self.offsets[2]))
+            type(self).enb.tn_write(im_calibration.pp_base, "fsetenv tx2_q_offset " \
+                                    + str(self.offsets[4]), 3)
+            print("fsetenv TX2_Q_OFFSET " + str(self.offsets[4]))
+            type(self).enb.tn_write(im_calibration.pp_base, "fsetenv tx2_i_offset " \
+                                    + str(self.offsets[5]), 3)
+            print("fsetenv TX2_I_OFFSET " + str(self.offsets[5]))
+        
+        if (type(self).cfg.test_report == True) and (im_calibration.is_test_all == True):
+            self.rpt.write('\nIQ Offset Calibration:\n')
+            self.rpt.write('tx1_i_offset = ' + str(self.offsets[2]) + '\n')
+            self.rpt.write('tx1_q_offset = ' + str(self.offsets[1]) + '\n')
+            self.rpt.write('tx2_i_offset = ' + str(self.offsets[5]) + '\n')
+            self.rpt.write('tx2_q_offset = ' + str(self.offsets[4]) + '\n')
+            
+        if (type(self).cfg.en_eeprom_write == True):
+            self.enb.editUbootenv('TX1_I_OFFSET', str(self.offsets[2]))
+            self.enb.editUbootenv('TX1_Q_OFFSET', str(self.offsets[1]))
+            self.enb.editUbootenv('TX2_I_OFFSET', str(self.offsets[5]))
+            self.enb.editUbootenv('TX2_Q_OFFSET', str(self.offsets[4]))
+            
+            if (im_calibration.is_test_all == True):
+                self.write_iqoffset_to_eeprom()
+            else:
+                se = raw_input("Write result to EEPROM?(y/n):")
+                if (se == 'y') or (se == 'Y'):
+                    self.write_iqoffset_to_eeprom()
+            
+        # stop transmit
+        #type(self).enb.enb_cd_tmpfs()
+        #type(self).enb.enb_stop_transmit()
+        return 0
+        
+    def write_iqoffset_to_eeprom(self):
+        
+        type(self).enb.enb_cd_usr_bin()
+        
+        print "edit EEPROM record"
+        type(self).enb.enb_eeprom_edit_record('wiop', self.rn, str(self.offsets[2]))
+        type(self).enb.enb_eeprom_edit_record('wqop', self.rn, str(self.offsets[1]))
+        type(self).enb.enb_eeprom_edit_record('wios', self.rn, str(self.offsets[5]))
+        type(self).enb.enb_eeprom_edit_record('wqos', self.rn, str(self.offsets[4]))
+        sleep(0.5)    # wait EEPROM data wrote
+        
+    def get_local_leakage_power(self):
+        
+        type(self).mt8870a.send_msg_to_server('CONF:CELL:MEAS:RFS:FREQ ' + str(test_config.dl_freq*1000000))
+        type(self).mt8870a.send_msg_to_server('INIT:CELL:MEAS:SING')    # mark peak
+        type(self).mt8870a.send_msg_to_server('*WAI')
+       
+        if (self.is_peak_at_local() == False):
+            print "local leakage not detected"
+            return 0
+            
+        type(self).mt8870a.send_msg_to_server('FETC:CELL:COMM:SPM:MARK:LEV?')        # get power
+        in_msg = type(self).mt8870a.recv_msg_frm_server()
+        cur_pwr = round(float(in_msg), 2)
+        #print('recv ' + type(self).cfg.mt8870a_ipaddr + '= ' + in_msg)
+        
+        return cur_pwr
+    
+    def is_peak_at_local(self):
+        
+        type(self).mt8870a.send_msg_to_server('FETC:CELL:COMM:SPM:MARK:FREQ?')        # get mark frequency
+        in_msg = type(self).mt8870a.recv_msg_frm_server()
+        fpeak = float(in_msg)
+        #print('recv ' + type(self).cfg.mt8870a_ipaddr + '= ' + in_msg)
+        diff = abs(test_config.dl_freq*1000000 - fpeak)
+        
+        if (diff < self.local_freq_tolerance):
+            return True
+        else:
+            return False
+        
+        
+    def run(self):
+        
+        self.start_enodeb_tx()
+        self.mt8870a_setup()
+        
+        sleep(2)    # wait for leakage appears
+        res = self.do_iq_offset_cal()
+        return res
diff --git a/octal/cavium_env/rf_card_cal_tip/cal_iq_offset_ms8870a.pyc b/octal/cavium_env/rf_card_cal_tip/cal_iq_offset_ms8870a.pyc
new file mode 100644
index 0000000000..95742326a2
Binary files /dev/null and b/octal/cavium_env/rf_card_cal_tip/cal_iq_offset_ms8870a.pyc differ
diff --git a/octal/cavium_env/rf_card_cal_tip/cal_ref_clk_dac.py b/octal/cavium_env/rf_card_cal_tip/cal_ref_clk_dac.py
new file mode 100644
index 0000000000..8273d9020c
--- /dev/null
+++ b/octal/cavium_env/rf_card_cal_tip/cal_ref_clk_dac.py
@@ -0,0 +1,155 @@
+#!/usr/bin/python
+
+"""
+Setup:
+1. Agilent MXA, connect cable to one of the antenna port of enodeB
+2. Set TFTP server, address and port as test_config
+"""
+
+import test_config
+import im_calibration
+from time import sleep
+from im_calibration import Calibration
+
+class CalRefClk(Calibration):
+    
+    def __init__(self, rpt_hndl, rec_num):
+        
+        self.rpt = rpt_hndl
+        self.rn = rec_num
+        self.cur_freq = 0.0
+        self.ref_freq = 30720000
+        self.dif_freq = 0
+        self.dac_cur = 0x0
+        self.dac_val = 0x0
+        self.limit_cal = 1
+        self.got_ref = False
+        self.narrow_span = False
+        
+    def mxa_setup(self):
+        
+        type(self).mxa.send_msg_to_server('*RST')
+        type(self).mxa.send_msg_to_server('*IDN?')
+        in_msg = type(self).mxa.recv_msg_frm_server()
+        print('recv ' + type(self).cfg.mxa_ipaddr + '= ' + in_msg)
+        
+        type(self).mxa.send_msg_to_server(':INIT:CONT ON')
+        type(self).mxa.send_msg_to_server(':INST:SEL SA')
+        type(self).mxa.send_msg_to_server(':CONF:SAN:NDEF')
+        type(self).mxa.send_msg_to_server(':FREQ:CENT ' + str(self.ref_freq) + ' Hz')
+        type(self).mxa.send_msg_to_server(':FREQ:SPAN 1 KHz')
+        type(self).mxa.send_msg_to_server(':DISP:WIND:TRAC:Y:RLEV -50 dBm')
+        type(self).mxa.send_msg_to_server(':POW:ATT 10')
+        
+    def start_enodeb(self):
+        
+        type(self).enb.enb_login()
+        print 'enb get mac address'
+        type(self).enb.get_macaddr()
+        print 'enb set 1pps'
+        type(self).enb.enb_set_1pps('tx')
+
+        print 'enb cd usr bin'
+        type(self).enb.enb_cd_usr_bin()
+        print 'enb load rf drv'
+        type(self).enb.enb_load_rf_drv()
+        print 'env load rf init'
+        type(self).enb.enb_load_rf_init()
+        type(self).enb.enb_set_rf_drv_rf_card()
+        
+        if test_config.band > 32:
+            type(self).enb.enb_set_zen_tdd_tx()
+        
+        if im_calibration.is_dsp_running:
+            type(self).enb.enb_cd_tmpfs()
+            type(self).enb.enb_stop_transmit()
+        
+    def do_refclk_cal_dac(self):
+        
+        type(self).enb.enb_rf_drv_call()
+        type(self).enb.tn_write("Value", "C")   # select clock cal
+        type(self).enb.tn_write("clock", str(self.dac_val))
+        type(self).mxa.send_msg_to_server(':CALC:MARK1:CPS ON')    # mark peak
+        sleep(3)    # wait for frequency stable
+        
+        for rn in range(50):
+            print("\ncalibration round: " + str(rn+1))
+            self.check_curr_freq()
+            
+            self.dif_freq = int(round(self.ref_freq - self.cur_freq))
+            
+            if rn > 30:
+                self.limit_cal = 5;
+            
+            if (abs(self.dif_freq) < 10) and (not self.narrow_span):
+                type(self).mxa.send_msg_to_server(':FREQ:SPAN 100 Hz')
+                self.narrow_span = True
+                sleep(3)
+                continue
+            elif (abs(self.dif_freq) >= self.limit_cal):
+                self.calc_dac_value()
+            else:
+                self.got_ref = True
+                tmp = hex(self.dac_val)
+                self.dac_val = tmp
+                print("Got target reference frequency, DAC value= " + str(self.dac_val))
+                if (type(self).cfg.test_report == True) and (im_calibration.is_test_all == True):
+                    self.rpt.write('\nReference Clock Calibration:\n')
+                    self.rpt.write('Frequency = ' + str(self.ref_freq) + '\n')
+                    self.rpt.write('dac_offset = ' + str(self.dac_val) + '\n')
+                break
+                
+            type(self).enb.tn_write("Value", "n")
+            type(self).enb.tn_write("clock", str(hex(self.dac_val)))
+            
+            if self.narrow_span:
+                sleep(2)
+            else:
+                sleep(1)
+        
+        if (self.got_ref):
+            type(self).enb.tn_write("calibration", "y")
+            #type(self).enb.tn_write("Option", "y") # y, fsetenv dac_offset
+            type(self).enb.tn.write("q\n".encode("ascii"))
+        else:
+            print("Reference clock calibration failed")
+          
+        if test_config.wr_var_to_uboot == True:
+            print("fsetenv dac_offset " + str(self.dac_val))
+            type(self).enb.tn_write(im_calibration.pp_base, "fsetenv dac_offset " \
+                                    + str(self.dac_val), 3)
+        
+        
+    def check_curr_freq(self):
+        
+        type(self).mxa.send_msg_to_server(':CALC:MARK1:X?')
+        in_msg = type(self).mxa.recv_msg_frm_server()
+        self.cur_freq = float(in_msg)
+        print('recv ' + type(self).cfg.mxa_ipaddr + '= ' + in_msg)        
+        
+    def calc_dac_value(self):
+
+        self.dac_val = self.dac_cur + self.dif_freq*2
+        
+        print("cur_val=" + str(hex(self.dac_cur)) + " diff=" + str(self.dif_freq) 
+              + " dac_val=" + str(hex(self.dac_val)))
+        self.dac_cur = self.dac_val    
+    
+    def write_cal_temp_to_eeprom(self, cal_temp):
+        
+        cal_temp = type(self).enb.enb_get_temperature()
+        
+        type(self).enb.enb_cd_usr_bin()
+        num_rec = type(self).enb.enb_eeprom_get_record_num()
+        
+        print "record calibration temperature in EEPROM"
+        type(self).enb.enb_eeprom_edit_record('wct', num_rec, hex(cal_temp))
+        
+    def run(self):
+        
+        self.mxa_setup()
+        self.start_enodeb()
+        self.do_refclk_cal_dac()
+        
+        #if (type(self).cfg.eeprom_new_rec == True):
+        #    self.write_cal_temp_to_eeprom()
\ No newline at end of file
diff --git a/octal/cavium_env/rf_card_cal_tip/cal_ref_clk_dac.pyc b/octal/cavium_env/rf_card_cal_tip/cal_ref_clk_dac.pyc
new file mode 100644
index 0000000000..4896a39b90
Binary files /dev/null and b/octal/cavium_env/rf_card_cal_tip/cal_ref_clk_dac.pyc differ
diff --git a/octal/cavium_env/rf_card_cal_tip/cal_ref_clk_dax.py b/octal/cavium_env/rf_card_cal_tip/cal_ref_clk_dax.py
new file mode 100644
index 0000000000..59f277fa37
--- /dev/null
+++ b/octal/cavium_env/rf_card_cal_tip/cal_ref_clk_dax.py
@@ -0,0 +1,159 @@
+#!/usr/bin/python
+
+"""
+Setup:
+1. Agilent MXA, connect cable to one of the antenna port of enodeB
+2. Set TFTP server, address and port as test_config
+"""
+
+import test_config
+import im_calibration
+from time import sleep
+from im_calibration import Calibration
+
+class CalRefClkDax(Calibration):
+    
+    def __init__(self, rpt_hndl, rec_num):
+        
+        self.rpt = rpt_hndl
+        self.rn = rec_num
+        self.cur_freq = 0.0
+        self.dif_freq = 0
+        self.dax_cur = 0x4000
+        self.dax_val = 0x4000
+        self.dax_lo_val = 0x9200
+        self.limit_cal = 3
+        self.dif_factor = 1
+        self.got_ref = False
+        self.narrow_span = False
+        self.ref_freq = test_config.dl_freq * 1000000
+        
+    def mxa_setup(self):
+        
+        type(self).mxa.send_msg_to_server('*RST')
+        type(self).mxa.send_msg_to_server('*IDN?')
+        in_msg = type(self).mxa.recv_msg_frm_server()
+        print('recv ' + type(self).cfg.mxa_ipaddr + '= ' + in_msg)
+        
+        type(self).mxa.send_msg_to_server(':INIT:CONT ON')
+        type(self).mxa.send_msg_to_server(':INST:SEL SA')
+        type(self).mxa.send_msg_to_server(':CONF:SAN:NDEF')
+        type(self).mxa.send_msg_to_server(':FREQ:CENT ' + str(self.ref_freq) + ' Hz')
+        type(self).mxa.send_msg_to_server(':FREQ:SPAN 50 KHz')
+        #type(self).mxa.send_msg_to_server(':BAND 100 Hz')
+        type(self).mxa.send_msg_to_server(':DISP:WIND:TRAC:Y:RLEV 10 dBm')
+        type(self).mxa.send_msg_to_server(':POW:ATT 20')
+        
+    def start_enodeb(self):
+        
+        type(self).enb.enb_login()
+        #type(self).enb.get_macaddr()
+        type(self).enb.enb_set_1pps('tx')
+
+        type(self).enb.enb_cd_usr_bin()
+        print 'enb load rf drv'
+        type(self).enb.enb_load_rf_drv()
+        print 'enb load rf init'
+        type(self).enb.enb_load_rf_init()
+        type(self).enb.enb_set_rf_drv_rf_card()
+    
+        if test_config.band > 32:
+            type(self).enb.enb_set_zen_tdd_tx()
+        
+        if im_calibration.is_dsp_running:
+            type(self).enb.enb_cd_tmpfs()
+            type(self).enb.enb_stop_transmit()
+        
+    def do_refclk_cal(self):
+        
+        type(self).enb.enb_dax_ctrl_call_cmd('0x3000 q')
+
+        type(self).mxa.send_msg_to_server(':CALC:MARK1:CPS ON')    # mark peak
+        sleep(3)    # wait for frequency stable
+        
+        for rn in range(50):
+            print("\ncalibration round: " + str(rn+1))
+            self.check_curr_freq()
+            
+            self.dif_freq = int(round(self.ref_freq - self.cur_freq))
+            
+            if rn > 30:
+                self.limit_cal = 10;
+            
+            if (abs(self.dif_freq) < 50) and (not self.narrow_span):
+                type(self).mxa.send_msg_to_server(':FREQ:SPAN 1000 Hz')
+                #type(self).mxa.send_msg_to_server(':BAND 1 Hz')
+                self.narrow_span = True
+                sleep(3)
+                continue
+            elif (abs(self.dif_freq) >= self.limit_cal):
+                self.calc_dax_value()
+            else:
+                self.got_ref = True
+                print("Got target reference frequency,")
+                print("    PWM_high value= " + str(self.dax_val))
+                print("    PWM_low value= " + str(self.dax_lo_val))
+                if (type(self).cfg.test_report == True) and (im_calibration.is_test_all == True):
+                    self.rpt.write('\nReference Clock Calibration:\n')
+                    self.rpt.write('Frequency = ' + str(self.ref_freq) + '\n')
+                    self.rpt.write('PWM_high value = ' + str(self.dax_val) + '\n')
+                    self.rpt.write('PWM_low value = ' + str(self.dax_lo_val) + '\n')
+                break
+            
+            type(self).enb.enb_dax_ctrl_call_cmd(str(self.dax_val) + ' q')
+            sleep(2)
+        
+        if (not self.got_ref):
+            print("Reference clock calibration failed")
+        else:
+            
+            # pwmreg0 for dax
+            if test_config.wr_var_to_uboot == True:
+                print("fsetenv dax_offset " + str(self.dax_val))
+                type(self).enb.tn_write(im_calibration.pp_base, "fsetenv pwmreglow " \
+                                        + str(self.dax_lo_val), 3)
+                type(self).enb.tn_write(im_calibration.pp_base, "fsetenv pwmreghigh " \
+                                        + str(self.dax_val), 3)
+            
+            if (type(self).cfg.en_eeprom_write == True):
+                if (im_calibration.is_test_all == True):
+                    self.enb.editUbootenv('PWMREGHIGH', str(self.dax_val))
+                    self.enb.editUbootenv('PWMREGLOW', str(self.dax_lo_val))
+                    self.write_daxclk_to_eeprom()
+                else:
+                    se = raw_input("Write result to EEPROM?(y/n):")
+                    if (se == 'y') or (se == 'Y'):
+                        self.enb.editUbootenv('PWMREGHIGH', str(self.dax_val))
+                        self.enb.editUbootenv('PWMREGLOW', str(self.dax_lo_val))
+                        self.write_daxclk_to_eeprom()
+            
+    def write_daxclk_to_eeprom(self):
+        
+        type(self).enb.enb_cd_usr_bin()
+        
+        print "edit EEPROM record"
+        type(self).enb.enb_eeprom_edit_record('wrh', self.rn, str(self.dax_val))
+        type(self).enb.enb_eeprom_edit_record('wrl', self.rn, str(self.dax_lo_val))
+        sleep(0.5)    # wait EEPROM data wrote
+        
+    def check_curr_freq(self):
+        
+        type(self).mxa.send_msg_to_server(':CALC:MARK1:X?')
+        in_msg = type(self).mxa.recv_msg_frm_server()
+        self.cur_freq = float(in_msg)
+        print('recv ' + type(self).cfg.mxa_ipaddr + '= ' + in_msg)        
+        
+    def calc_dax_value(self):
+
+        self.dax_val = self.dax_cur + self.dif_freq * self.dif_factor
+        
+        print("dax_val=" + str(self.dax_cur) + " diff=" + str(self.dif_freq) 
+              + " new_val=" + str(self.dax_val))
+        self.dax_cur = self.dax_val  
+        
+    def run(self):
+        
+        self.mxa_setup()
+        self.start_enodeb()
+        self.do_refclk_cal()
+        
diff --git a/octal/cavium_env/rf_card_cal_tip/cal_ref_clk_dax.pyc b/octal/cavium_env/rf_card_cal_tip/cal_ref_clk_dax.pyc
new file mode 100644
index 0000000000..8d3707a2f1
Binary files /dev/null and b/octal/cavium_env/rf_card_cal_tip/cal_ref_clk_dax.pyc differ
diff --git a/octal/cavium_env/rf_card_cal_tip/cal_ref_clk_pwm.py b/octal/cavium_env/rf_card_cal_tip/cal_ref_clk_pwm.py
new file mode 100644
index 0000000000..45be33ed76
--- /dev/null
+++ b/octal/cavium_env/rf_card_cal_tip/cal_ref_clk_pwm.py
@@ -0,0 +1,166 @@
+#!/usr/bin/python
+
+"""
+Setup:
+1. Agilent MXA, connect cable to one of the antenna port of enodeB
+2. Set TFTP server, address and port as test_config
+"""
+
+import test_config
+import im_calibration
+from time import sleep
+from im_calibration import Calibration
+from cmd import PROMPT
+
+class CalRefClk(Calibration):
+    
+    def __init__(self, rpt_hndl, rec_num):
+        
+        self.rpt = rpt_hndl
+        self.rn = rec_num
+        self.cur_freq = 0.0
+        self.dif_freq = 0
+        self.pwm_cur = 0x6F50
+        self.pwm_val = 0x6F50
+        self.pwm_lo_val = 0x9200
+        self.limit_cal = 10 #3 #frequency offset limit
+        self.dif_factor = 1
+        self.got_ref = False
+        self.narrow_span = False
+        self.ref_freq = test_config.dl_freq * 1000000
+        
+    def mxa_setup(self):
+        
+        type(self).mxa.send_msg_to_server('*RST')
+        type(self).mxa.send_msg_to_server('*IDN?')
+        in_msg = type(self).mxa.recv_msg_frm_server()
+        print('recv ' + type(self).cfg.mxa_ipaddr + '= ' + in_msg)
+        
+        type(self).mxa.send_msg_to_server(':INIT:CONT ON')
+        type(self).mxa.send_msg_to_server(':INST:SEL SA')
+        type(self).mxa.send_msg_to_server(':CONF:SAN:NDEF')
+        type(self).mxa.send_msg_to_server(':FREQ:CENT ' + str(self.ref_freq) + ' Hz')
+        type(self).mxa.send_msg_to_server(':FREQ:SPAN 50 KHz')
+        #type(self).mxa.send_msg_to_server(':BAND 100 Hz')
+        type(self).mxa.send_msg_to_server(':DISP:WIND:TRAC:Y:RLEV 10 dBm')
+        type(self).mxa.send_msg_to_server(':POW:ATT 20')
+        
+    def start_enodeb(self):
+        
+        type(self).enb.enb_login()
+        type(self).enb.enb_cd_usr_bin()
+        
+        # default is PWM control in booting
+        if (type(self).cfg.tcxo_ctrl == "dax"):
+            print("load ext dac clock control")
+            type(self).enb.enb_load_dax()   # do ext DAC control
+    
+        if test_config.band > 32:
+            type(self).enb.enb_set_zen_tdd_tx()
+        """
+        if im_calibration.is_dsp_running:
+            type(self).enb.enb_cd_tmpfs()
+            type(self).enb.enb_stop_transmit()
+        """
+    def do_refclk_cal(self):
+        
+        # set initial local frequency
+        type(self).enb.enb_pwm_ctrl_call_cmd('l ' + str(self.pwm_lo_val) + 
+                                             ' h ' + str(self.pwm_val) + ' e q')
+
+        type(self).mxa.send_msg_to_server(':CALC:MARK1:CPS ON')    # mark peak
+        sleep(3)    # wait for frequency stable
+        
+        for rn in range(80):
+            print("\ncalibration round: " + str(rn+1))
+            self.check_curr_freq()
+            
+            self.dif_freq = int(round(self.ref_freq - self.cur_freq))
+            
+            if rn > 30:
+                self.limit_cal = 20 #20;
+            
+            if (abs(self.dif_freq) < 60) and (not self.narrow_span):
+                type(self).mxa.send_msg_to_server(':FREQ:SPAN 1000 Hz')
+                #type(self).mxa.send_msg_to_server(':BAND 1 Hz')
+                self.narrow_span = True
+                sleep(1) #(3)
+                continue
+            elif (abs(self.dif_freq) >= self.limit_cal):
+                self.calc_pwm_value()
+            else:
+                #print "freq_diff=" + str(abs(self.dif_freq)) + ", limit_cal=" + str(self.limit_cal)
+                self.got_ref = True
+                print("Got target reference frequency,")
+                print("    PWM_high value= " + str(self.pwm_val))
+                print("    PWM_low value= " + str(self.pwm_lo_val))
+                if (type(self).cfg.test_report == True) and (im_calibration.is_test_all == True):
+                    self.rpt.write('\nReference Clock Calibration:\n')
+                    self.rpt.write('Frequency = ' + str(self.ref_freq) + '\n')
+                    self.rpt.write('PWM_high value = ' + str(self.pwm_val) + '\n')
+                    self.rpt.write('PWM_low value = ' + str(self.pwm_lo_val) + '\n')
+                break
+            
+            type(self).enb.enb_pwm_ctrl_call_cmd('h ' + str(self.pwm_val) + ' q')
+            sleep(1) #(2)
+        
+        if (not self.got_ref):
+            print("Reference clock calibration failed")
+        else:
+            
+            # pwmreg0 for high pwm, pwmreg1 for low pwm
+            if test_config.wr_var_to_uboot == True:
+                #print("fsetenv pwm_offset " + str(self.pwm_val))
+                type(self).enb.tn_write(im_calibration.pp_base, "fsetenv pwmreglow " \
+                                        + str(self.pwm_lo_val), 3)
+                type(self).enb.tn_write(im_calibration.pp_base, "fsetenv pwmreghigh " \
+                                        + str(self.pwm_val), 3)
+            
+            if (type(self).cfg.en_eeprom_write == True):
+                self.enb.editUbootenv('PWMREGHIGH', str(self.pwm_val))
+                self.enb.editUbootenv('PWMREGLOW', str(self.pwm_lo_val))
+                
+                if (im_calibration.is_test_all == True):
+                    self.write_pwmclk_to_eeprom()
+                else:
+                    se = raw_input("Write result to EEPROM?(y/n):")
+                    if (se == 'y') or (se == 'Y'):
+                        
+                        print("fsetenv pwm_offset " + str(self.pwm_val))
+                        type(self).enb.tn_write(im_calibration.pp_base, "fsetenv pwmreglow " \
+                                                + str(self.pwm_lo_val), 3)
+                        type(self).enb.tn_write(im_calibration.pp_base, "fsetenv pwmreghigh " \
+                                                + str(self.pwm_val), 3)
+                        
+                        self.write_pwmclk_to_eeprom()
+            
+    def write_pwmclk_to_eeprom(self):
+        
+        type(self).enb.enb_cd_usr_bin()
+        
+        print "edit EEPROM record"
+        type(self).enb.enb_eeprom_edit_record('wrh', self.rn, str(self.pwm_val))
+        type(self).enb.enb_eeprom_edit_record('wrl', self.rn, str(self.pwm_lo_val))
+        sleep(0.5)    # wait EEPROM data wrote
+        
+    def check_curr_freq(self):
+        
+        type(self).mxa.send_msg_to_server(':CALC:MARK1:X?')
+        in_msg = type(self).mxa.recv_msg_frm_server()
+        self.cur_freq = float(in_msg)
+        print('recv ' + type(self).cfg.mxa_ipaddr + '= ' + in_msg)        
+        
+    def calc_pwm_value(self):
+
+        self.pwm_val = self.pwm_cur + self.dif_freq * self.dif_factor
+        
+        print("pwm_val=" + str(self.pwm_cur) + " diff=" + str(self.dif_freq) 
+              + " new_val=" + str(self.pwm_val))
+        self.pwm_cur = self.pwm_val  
+        
+    def run(self):
+        
+        self.mxa_setup()
+        self.start_enodeb()
+        self.do_refclk_cal()
+        
diff --git a/octal/cavium_env/rf_card_cal_tip/cal_ref_clk_pwm.pyc b/octal/cavium_env/rf_card_cal_tip/cal_ref_clk_pwm.pyc
new file mode 100644
index 0000000000..dd8f19db22
Binary files /dev/null and b/octal/cavium_env/rf_card_cal_tip/cal_ref_clk_pwm.pyc differ
diff --git a/octal/cavium_env/rf_card_cal_tip/cal_rx_rssi.py b/octal/cavium_env/rf_card_cal_tip/cal_rx_rssi.py
new file mode 100644
index 0000000000..045ae96875
--- /dev/null
+++ b/octal/cavium_env/rf_card_cal_tip/cal_rx_rssi.py
@@ -0,0 +1,261 @@
+#!/usr/bin/python
+
+"""
+Setup:
+1. Agilent EXG, connect to primary antenna port of enodeB
+2. Set TFTP server, address and port as test_config
+"""
+
+import sys
+import test_config
+import im_calibration
+from time import sleep
+from im_calibration import Calibration
+#from win32con import RES_CURSOR
+
+class CalRxRssi(Calibration):
+    
+    def __init__(self, rpt_hndl, rec_num):
+        
+        self.rpt = rpt_hndl
+        self.rn = rec_num
+        self.slope_1 = ''
+        self.offset_1 = ''
+        self.slope_2 = ''
+        self.offset_2 = ''
+        self.init_pow = -30
+        
+    def exg_setup(self):
+        
+        type(self).exg.send_msg_to_server(':RAD:ARB ON')
+        type(self).exg.send_msg_to_server(':RAD:ARB:WAV ' + type(self).cfg.exg_waveform)
+        #type(self).exg.send_msg_to_server(':MMEM:DATA ' + type(self).cfg.exg_waveform)
+        print("EXG waveform is " + type(self).cfg.exg_waveform)
+        type(self).exg.send_msg_to_server(':FREQ ' + str(test_config.ul_freq) + ' MHz')
+        type(self).exg.send_msg_to_server(':POW ' + str(self.init_pow) + ' dBm')
+        type(self).exg.send_msg_to_server(':OUTP:MOD ON')
+        type(self).exg.send_msg_to_server(':OUTP ON')
+        
+    def mt8870a_setup(self, freq_center):
+        
+        Waveform = "'E-TM_1-1_10M'"
+        print 'VSG Setup...'
+        type(self).mt8870a.send_msg_to_server('SOUR:GPRF:GEN:MODE NORMAL\n')
+        type(self).mt8870a.send_msg_to_server('SOUR:GPRF:GEN:BBM ARB \n')
+        type(self).mt8870a.send_msg_to_server(':SOUR:GPRF:GEN:ARB:FILE:LOAD ' + Waveform)
+        type(self).mt8870a.send_msg_to_server('*WAI\n')
+        type(self).mt8870a.send_msg_to_server('*WAI\n')
+        type(self).mt8870a.send_msg_to_server(':SOUR:GPRF:GEN:RFS:LEV -100\n')
+        print 'Loading waveform...'
+        type(self).mt8870a.send_msg_to_server('SOUR:GPRF:GEN:ARB:WAV:PATT:SEL ' + Waveform + ',1,1\n')
+        type(self).mt8870a.send_msg_to_server('*WAI\n')
+        print 'Start VSG...'
+        type(self).mt8870a.send_msg_to_server('SOUR:GPRF:GEN:RFS:FREQ ' + str(freq_center * 1000000) + '\n')
+        type(self).mt8870a.send_msg_to_server('SOUR:GPRF:GEN:RFS:LEV ' + str(self.init_pow) + '\n')
+        type(self).mt8870a.send_msg_to_server('SOUR:GPRF:GEN:STAT ON\n')
+        
+    def cmw500_setup(self, freq_center):
+        
+        if self.cfg.cal_bandwidth == 20:
+        	  sync_delay = "0"
+        	  Waveform = "'D:\Rohde-Schwarz\CMW\Data\Waveform\CaviumFRC_20MHz.wv'"
+        elif self.cfg.cal_bandwidth == 15:
+        	  sync_delay = "0"
+        	  Waveform = "'D:\Rohde-Schwarz\CMW\Data\Waveform\CaviumFRC_15MHz.wv'"
+        elif self.cfg.cal_bandwidth == 10:
+        	  sync_delay = "0"
+        	  Waveform = "'D:\Rohde-Schwarz\CMW\Data\Waveform\CaviumFRC_10MHz.wv'"
+        elif self.cfg.cal_bandwidth == 5:
+        	  sync_delay = "0"
+        	  Waveform = "'D:\Rohde-Schwarz\CMW\Data\Waveform\CaviumFRC_5MHz.wv'"
+        
+        print "VSG Setup..."
+        type(self).cmw500.send_msg_to_server("SOUR:GPRF:GEN:BBM ARB")
+        type(self).cmw500.send_msg_to_server("SOUR:GPRF:GEN:ARB:FILE " + Waveform)
+        type(self).cmw500.send_msg_to_server("SOUR:GPRF:GEN:ARB:REP CONT")
+        type(self).cmw500.send_msg_to_server("SOUR:GPRF:GEN:LIST OFF")
+        type(self).cmw500.send_msg_to_server("TRIG:GPRF:GEN:ARB:SOUR 'Manual'")
+        type(self).cmw500.send_msg_to_server("TRIG:GPRF:GEN:ARB:RETR ON")
+        type(self).cmw500.send_msg_to_server("TRIG:GPRF:GEN:ARB:AUT ON")
+        print "Start VSG..."
+        type(self).cmw500.send_msg_to_server("SOUR:GPRF:GEN:RFS:FREQ " + str(freq_center * 1000000))
+        type(self).cmw500.send_msg_to_server("SOUR:GPRF:GEN:RFS:LEV " + str(self.init_pow))
+        type(self).cmw500.send_msg_to_server("SOUR:GPRF:GEN:STAT ON")
+        type(self).cmw500.send_msg_to_server("*WAI")
+        type(self).cmw500.send_msg_to_server("SOURce:GPRF:GEN:STATe?")
+        in_msg = type(self).cmw500.recv_msg_frm_server()
+        line = in_msg.split('\n')
+        if (line[0] == "ON"):
+            print "VSG turn on"
+        else:
+            print "VSG can not turn on"
+            sys.exit()
+                                  
+               
+    def start_enodb(self):
+        
+        type(self).enb.enb_login()
+        type(self).enb.enb_cd_usr_bin()
+        
+        # default is PWM control in booting
+        if (type(self).cfg.tcxo_ctrl == "dax"):
+            print("load ext dac clock control")
+            type(self).enb.enb_load_dax()   # do ext DAC control
+    
+        if test_config.band > 32:
+            type(self).enb.enb_set_zen_tdd_rx()
+            
+        """
+        if im_calibration.is_dsp_running:
+            type(self).enb.enb_cd_tmpfs()
+            type(self).enb.enb_stop_transmit()
+        """
+        
+    def do_rssi_cal(self):
+    
+        #type(self).enb.enb_disable_all_TX()
+        type(self).enb.enb_rf_drv_call()
+        
+        type(self).enb.tn_write("loss", "S")   # select rssi cal
+        type(self).enb.tn_write("antenna", str(type(self).cfg.rssi_cable_loss))   # cable loss
+        
+        for ant in range(2):
+            print('')
+            print("Testing antenna port " + str(ant+1))
+            type(self).enb.tn.write("\n")          # connect ant
+            if (ant == 0):
+                if (type(self).cfg.test_set == 'rs'):
+                    type(self).cmw500.send_msg_to_server("ROUTe:GPRF:GENerator:SCENario:SALone RFAC, TX1")
+            else:
+                if (type(self).cfg.test_set == 'rs'):
+                    type(self).cmw500.send_msg_to_server("ROUTe:GPRF:GENerator:SCENario:SALone RFBC, TX1")
+            
+            sleep(1)
+            for cnt in range(0,4):
+                type(self).enb.tn.read_until("press Enter")
+                power = self.init_pow - 10*cnt
+                print("EXG power = " + str(power) + ' dBm')
+                
+                if (type(self).cfg.test_set == 'agilent'):
+                    type(self).exg.send_msg_to_server(':POW ' + str(power) + ' dBm')
+                elif (type(self).cfg.test_set == 'anritsu'):
+                    type(self).mt8870a.send_msg_to_server('SOUR:GPRF:GEN:RFS:LEV ' + str(power) + '\n')
+                elif (type(self).cfg.test_set == 'rs'):
+                    type(self).cmw500.send_msg_to_server('SOUR:GPRF:GEN:RFS:LEV ' + str(power))
+                                
+                sleep(0.5)    # wait RF power stable
+                type(self).enb.tn.write("\n")
+                
+        try:
+            res = type(self).enb.tn.read_until("calibration".encode("ascii"), 5)
+            type(self).enb.tn_write("Option:", "n")
+            type(self).enb.tn.write("q\n".encode("ascii"))
+            
+            start = 0
+            while True:
+                start = res.find("slope_1=".encode("ascii"), start)
+                if (start == -1): break
+                start += len("slope_1=")
+                self.slope_1 = res[start:res.find(", ".encode("ascii"), start)]
+                
+                start = res.find("offset_1=".encode("ascii"), start)
+                if (start == -1): break
+                start += len("offset_1=")
+                self.offset_1 = res[start:res.find('\n'.encode("ascii"), start)]
+                
+                start = res.find("slope_2=".encode("ascii"), start)
+                if (start == -1): break
+                start += len("slope_2=")
+                self.slope_2 = res[start:res.find(", ".encode("ascii"), start)]
+                
+                start = res.find("offset_2=".encode("ascii"), start)
+                if (start == -1): break
+                start += len("offset_2=")
+                self.offset_2 = res[start:res.find('\n'.encode("ascii"), start)]
+                
+                print("slope_1=" + self.slope_1 + ", offset_1=" + self.offset_1)
+                print("slope_2=" + self.slope_2 + ", offset_2=" + self.offset_2)
+                
+                if (type(self).cfg.test_report == True) and (im_calibration.is_test_all == True):
+                    self.rpt.write('\nRSSI Calibration:\n')
+                    self.rpt.write("slope_1=" + self.slope_1 + ", offset_1=" + self.offset_1 + '\n')
+                    self.rpt.write("slope_2=" + self.slope_2 + ", offset_2=" + self.offset_2 + '\n')
+                
+                break
+            
+            if (test_config.wr_var_to_uboot == True):
+                type(self).enb.tn_write(im_calibration.pp_base, "fsetenv rssi_slope_prim " \
+                                        + str(self.slope_1), 3)
+                type(self).enb.tn_write(im_calibration.pp_base, "fsetenv rssi_offset_prim " \
+                                        + str(self.offset_1), 3)
+                type(self).enb.tn_write(im_calibration.pp_base, "fsetenv rssi_slope_sec " \
+                                        + str(self.slope_2), 3)
+                type(self).enb.tn_write(im_calibration.pp_base, "fsetenv rssi_offset_sec " \
+                                        + str(self.offset_2), 3)
+            
+            if (type(self).cfg.en_eeprom_write == True):
+                self.enb.editUbootenv('RSSI_SLOPE_PRIM', str(self.slope_1))
+                self.enb.editUbootenv('RSSI_OFFSET_PRIM', str(self.offset_1))
+                self.enb.editUbootenv('RSSI_SLOPE_SEC', str(self.slope_2))
+                self.enb.editUbootenv('RSSI_OFFSET_SEC', str(self.offset_2))
+                
+                if (im_calibration.is_test_all == True):
+                    self.write_rssi_to_eeprom()
+                else:
+                    se = raw_input("Write result to EEPROM?(y/n):")
+                    if (se == 'y') or (se == 'Y'):
+                        self.write_rssi_to_eeprom()
+            
+        except:
+            print "Unexpected error:", sys.exc_info()[0]
+        
+        
+    def write_rssi_to_eeprom(self):
+        
+        type(self).enb.enb_cd_usr_bin()
+        
+        print "edit EEPROM record"
+        type(self).enb.enb_eeprom_edit_record('wrsp', self.rn, self.slope_1)
+        type(self).enb.enb_eeprom_edit_record('wrop', self.rn, self.offset_1)
+        type(self).enb.enb_eeprom_edit_record('wrss', self.rn, self.slope_2)
+        type(self).enb.enb_eeprom_edit_record('wros', self.rn, self.offset_2)
+        sleep(0.5)    # wait EEPROM data wrote
+        
+    def exg_turn_off(self):
+        
+        type(self).exg.send_msg_to_server(':OUTP OFF')
+        type(self).exg.send_msg_to_server(':OUTP:MOD OFF')
+        
+    def mt8870a_turn_off(self):
+        
+        type(self).mt8870a.send_msg_to_server('SOUR:GPRF:GEN:STAT OFF\n')
+
+    def cmw500_turn_off(self):
+        
+        type(self).cmw500.send_msg_to_server('SOUR:GPRF:GEN:STAT OFF')
+        
+    def run(self):
+
+        if (type(self).cfg.test_set == 'agilent'):
+            self.exg_setup()
+        elif (type(self).cfg.test_set == 'anritsu'):
+            self.mt8870a_setup(test_config.ul_freq)
+        elif (type(self).cfg.test_set == 'rs'):
+            self.cmw500_setup(test_config.ul_freq)
+	      
+        
+        self.start_enodb()
+        print("**** enb started")
+        self.do_rssi_cal()        
+        
+        print("**** rssi measure done")
+        
+        if (type(self).cfg.test_set == 'agilent'):
+            self.exg_turn_off()
+        elif (type(self).cfg.test_set == 'anritsu'):
+            self.mt8870a_turn_off()
+        elif (type(self).cfg.test_set == 'rs'):
+            self.cmw500_turn_off()
+	
+        print ""
+        
diff --git a/octal/cavium_env/rf_card_cal_tip/cal_rx_rssi.pyc b/octal/cavium_env/rf_card_cal_tip/cal_rx_rssi.pyc
new file mode 100644
index 0000000000..34745422bc
Binary files /dev/null and b/octal/cavium_env/rf_card_cal_tip/cal_rx_rssi.pyc differ
diff --git a/octal/cavium_env/rf_card_cal_tip/cal_tx_pwr.py b/octal/cavium_env/rf_card_cal_tip/cal_tx_pwr.py
new file mode 100644
index 0000000000..693c787f66
--- /dev/null
+++ b/octal/cavium_env/rf_card_cal_tip/cal_tx_pwr.py
@@ -0,0 +1,391 @@
+#!/usr/bin/python
+
+"""
+Setup:
+1. Agilent MXA / Angritsu MT8870A, connect to primary antenna port of enodeB
+2. Set TFTP server, address and port as test_config
+"""
+
+import sys
+import test_config
+import im_calibration
+from time import sleep
+from im_calibration import Calibration
+#import common
+
+class CalTxPwr(Calibration):
+    
+    def __init__(self, rpt_hndl, rec_num):
+        
+        self.rpt = rpt_hndl
+        self.rn = rec_num
+        self.slope_1 = ''
+        self.offset_1 = ''
+        self.slope_2 = ''
+        self.offset_2 = ''
+        self.attn_gain_val = []
+        self.input_power = -20  # input power in dBm
+        self.signal_bw = type(self).cfg.cal_bandwidth
+        
+        if (self.cfg.cal_bandwidth == 5):
+            self.intbw = '4.5'
+            self.spabw = '10'
+        elif (self.cfg.cal_bandwidth == 10):
+            self.intbw = '9'
+            self.spabw = '20'
+        elif (self.cfg.cal_bandwidth == 15):
+            self.intbw = '13.5'
+            self.spabw = '25'
+        elif (self.cfg.cal_bandwidth == 20):
+            self.intbw = '18'
+            self.spabw = '30'
+        
+    def mxa_setup(self):
+        
+        type(self).mxa.send_msg_to_server(':INIT:CONT ON')
+        type(self).mxa.send_msg_to_server(':INST:SEL SA')
+        type(self).mxa.send_msg_to_server(':FREQ:CENT ' + str(test_config.dl_freq) + ' MHz')
+        type(self).mxa.send_msg_to_server(':CONF:CHP')
+        type(self).mxa.send_msg_to_server(':POW:ATT 30')
+        type(self).mxa.send_msg_to_server(':DISP:CHP:VIEW:WIND:TRAC:Y:RLEV 20 dBm')
+        type(self).mxa.send_msg_to_server(':CHP:BAND:INT ' + self.intbw + ' MHz')
+        type(self).mxa.send_msg_to_server(':CHP:FREQ:SPAN ' + self.spabw + ' MHz')
+        type(self).mxa.send_msg_to_server(':CHP:AVER:COUN 25')
+        type(self).mxa.send_msg_to_server(':CHP:AVER ON')
+        
+    def mt8870a_setup(self, freq_center):
+        
+        print 'Start VSA...'
+        type(self).mt8870a.send_msg_to_server('*RST')
+        type(self).mt8870a.send_msg_to_server('*IDN?')
+        in_msg = type(self).mt8870a.recv_msg_frm_server()
+        print('recv ' + type(self).cfg.mt8870a_ipaddr + '= ' + in_msg)
+        
+        type(self).mt8870a.send_msg_to_server('INST SMALLCELL')
+        type(self).mt8870a.send_msg_to_server('INST:SYST 3GLTE_DL,ACT')
+        type(self).mt8870a.send_msg_to_server(':ROUT:PORT:CONN:DIR PORT3,PORT4')
+        
+        type(self).mt8870a.send_msg_to_server(':BATC:BAND:FREQ:CENT ' + str(freq_center) + 'MHZ')
+        type(self).mt8870a.send_msg_to_server(':BATC:BAND:POW:RANG:ILEV ' + str(self.input_power))
+        type(self).mt8870a.send_msg_to_server(':BATC:CC:RAD:CBAN ' + str(self.signal_bw))
+        type(self).mt8870a.send_msg_to_server(':BATC:CC:RAD:TMOD TM1_1')
+        
+        type(self).mt8870a.send_msg_to_server(':TRIG:STAT OFF')
+        type(self).mt8870a.send_msg_to_server(':TRIG:SOUR IMM')
+        
+        type(self).mt8870a.send_msg_to_server(':BATC:CAPT:TIME:STAR 0')
+        type(self).mt8870a.send_msg_to_server(':BATC:CAPT:TIME:LENG 1')
+        
+        type(self).mt8870a.send_msg_to_server(':BATC:CAPT:TIME:UWEM:STAR 0')
+        type(self).mt8870a.send_msg_to_server(':BATC:CAPT:TIME:UWEM:LENG 140')
+        type(self).mt8870a.send_msg_to_server(':BATC:CC:PDCC:SYMB:NUMB 2')
+        
+        type(self).mt8870a.send_msg_to_server(':BATC:EVM ON')
+        type(self).mt8870a.send_msg_to_server('*WAI')
+        
+    def cmw500_setup(self, freq_center):
+        
+        print 'Start VSA...'
+        #if test_config.band > 32:
+        #    type(self).cmw500.send_msg_to_server("CONF:LTE:MEAS:ENB:DMOD TDD")
+        #else:
+        #	  type(self).cmw500.send_msg_to_server("CONF:LTE:MEAS:ENB:DMOD FDD")
+        type(self).cmw500.send_msg_to_server("CONF:LTE:MEAS:ENB:DMOD FDD")	  
+        type(self).cmw500.send_msg_to_server("CONF:LTE:MEAS:ENB:RFS:FREQ " + str(freq_center) + " MHz")
+        type(self).cmw500.send_msg_to_server("CONF:LTE:MEAS:ENB:RFS:ENP 35")
+        type(self).cmw500.send_msg_to_server("CONF:LTE:MEAS:ENB:RFS:UMAR 0")
+        
+        if (self.cfg.cal_bandwidth == 5):
+            type(self).cmw500.send_msg_to_server("CONF:LTE:MEAS:ENB:MEV:CBAN B050")
+        elif (self.cfg.cal_bandwidth == 10):
+            type(self).cmw500.send_msg_to_server("CONF:LTE:MEAS:ENB:MEV:CBAN B100")
+        elif (self.cfg.cal_bandwidth == 15):
+            type(self).cmw500.send_msg_to_server("CONF:LTE:MEAS:ENB:MEV:CBAN B150")
+        elif (self.cfg.cal_bandwidth == 20):
+            type(self).cmw500.send_msg_to_server("CONF:LTE:MEAS:ENB:MEV:CBAN B200")
+        
+        type(self).cmw500.send_msg_to_server("CONF:LTE:MEAS:ENB:MEV:RES:ALL ON,OFF,OFF,OFF,OFF,OFF,ON,OFF,OFF")
+        type(self).cmw500.send_msg_to_server("CONF:LTE:MEAS:ENB:MEV:SCO:MOD 10")
+        type(self).cmw500.send_msg_to_server("CONF:LTE:MEAS:ENB:MEV:MOEX ON")
+        type(self).cmw500.send_msg_to_server("CONF:LTE:MEAS:ENB:MEV:REP SING")
+        type(self).cmw500.send_msg_to_server("CONF:LTE:MEAS:ENB:MEV:ETES ETM11")
+        type(self).cmw500.send_msg_to_server("CONF:LTE:MEAS:ENB:MEV:PLC 1")
+        type(self).cmw500.send_msg_to_server("TRIG:LTE:MEAS:ENB:MEV:SOUR 'Free Run (Fast Sync)'")
+        
+    def start_enodeb_tx(self):
+        
+        type(self).enb.enb_login()
+        
+        # default is PWM control in booting
+        if (type(self).cfg.tcxo_ctrl == "dax"):
+            print("load ext dac clock control")
+            type(self).enb.enb_cd_usr_bin()
+            type(self).enb.enb_load_dax()   # do ext DAC control
+    
+        if test_config.band > 32:
+            type(self).enb.enb_cd_usr_bin()
+            type(self).enb.enb_set_zen_tdd_tx()
+            
+        type(self).enb.enb_cd_tmpfs()
+        type(self).enb.enb_run_dsp_app_dl()
+            
+    def do_txpwr_cal(self):
+        
+        type(self).enb.enb_cd_usr_bin()
+        
+        #cmd = "a 1 " + str(type(self).cfg.attn1) + " q"
+        #type(self).enb.enb_rf_drv_call_cmd(cmd)
+        #sleep(2)
+        
+        type(self).enb.enb_rf_drv_call()
+        type(self).enb.tn_write("loss", "T")   # select tx cal
+        type(self).enb.tn_write("antenna", str(type(self).cfg.txpwr_cable_loss))
+        sleep(2)
+        
+        if (type(self).cfg.test_report == True) and (im_calibration.is_test_all == True):
+            self.rpt.write('\nTX Power Calibration:\n')
+        
+        for ant in range(2):
+            
+            # the RF driver already switch the TX ports
+            print('')
+            print("Testing antenna port " + str(ant+1))
+            type(self).enb.tn.write("\n")          # connect ant
+            sleep(2)    # wait for second round stable
+            
+            if (ant == 0):
+                if (type(self).cfg.test_set == 'rs'):
+                    type(self).cmw500.send_msg_to_server("ROUTe:LTE:MEAS:ENB:SCENario:SALone RFAC, RX1")
+            else:
+                if (type(self).cfg.test_set == 'rs'):
+                    type(self).cmw500.send_msg_to_server("ROUTe:LTE:MEAS:ENB:SCENario:SALone RFBC, RX1")
+                    
+            
+            for st in range(0,3):
+                
+                res = type(self).enb.tn.read_until(" ".encode("ascii"))
+                
+                # measure channel power
+                if (type(self).cfg.test_set == 'agilent'):
+                    
+                    sleep(1) #(5)    # wait for average
+                    type(self).mxa.send_msg_to_server(':FETC:CHP:CHP?')
+                    in_msg = type(self).mxa.recv_msg_frm_server()
+                    chpwr = str(round(float(in_msg), 2))
+                    print('recv ' + type(self).cfg.mxa_ipaddr + '= ' + chpwr)
+                    
+                elif (type(self).cfg.test_set == 'anritsu'):
+                    
+                    sleep(3)    # wait for average
+                    self.input_power = self.input_power + 10*st
+                    type(self).mt8870a.send_msg_to_server(':BATC:BAND:POW:RANG:ILEV ' + str(self.input_power))
+                    type(self).mt8870a.send_msg_to_server(':INIT:MODE:SING')
+                    type(self).mt8870a.send_msg_to_server('*WAI')
+                    type(self).mt8870a.send_msg_to_server(':FETC:BATC1?')
+                    type(self).mt8870a.send_msg_to_server('*WAI')
+                    in_msg = type(self).mt8870a.recv_msg_frm_server()
+                    #print in_msg
+                    line = in_msg.split(',')
+                    chpwr = str(round(float(line[5]), 2))
+                    print "Tx Power (Average) = " + chpwr + " dBm"
+                    
+                elif (type(self).cfg.test_set == 'rs'):
+                    
+                    if (st == 0):
+                        self.input_power = 5
+                        
+                    self.input_power = self.input_power + 10
+                    type(self).cmw500.send_msg_to_server("CONF:LTE:MEAS:ENB:RFS:ENP " + str(self.input_power))
+                    type(self).cmw500.send_msg_to_server("INIT:LTE:MEAS:ENB:MEV")
+                    type(self).cmw500.send_msg_to_server("*WAI")
+                    type(self).cmw500.send_msg_to_server("FETC:LTE:MEAS:ENB:MEV:MOD:AVER?")
+                    in_msg = type(self).cmw500.recv_msg_frm_server()
+                    line = in_msg.split(',')
+                    if (int(line[0]) != 0):
+                        print in_msg
+                    chpwr = str(round(float(line[17]), 2))
+                    print "Tx Power (Average) = " + chpwr + " dBm"
+                    
+                type(self).enb.tn.write((chpwr+'\n').encode("ascii"))
+                sleep(3)    # wait for second round stable
+                
+        try:
+            res = type(self).enb.tn.read_until("calibration", 5)
+            #type(self).enb.tn_write("Option:", "y") # fsetenv variables
+            type(self).enb.tn.write("q\n".encode("ascii"))
+            
+            start = 0
+            while (True):
+                start = res.find("slope_1=".encode("ascii"), start)
+                if (start == -1): break
+                start += len("slope_1=")
+                self.slope_1 = res[start:res.find(", ".encode("ascii"), start)]
+                
+                start = res.find("offset_1=".encode("ascii"), start)
+                if (start == -1): break
+                start += len("offset_1=")
+                self.offset_1 = res[start:res.find('\n'.encode("ascii"), start)]
+                
+                start = res.find("slope_2=".encode("ascii"), start)
+                if (start == -1): break
+                start += len("slope_2=")
+                self.slope_2 = res[start:res.find(", ".encode("ascii"), start)]
+                
+                start = res.find("offset_2=".encode("ascii"), start)
+                if (start == -1): break
+                start += len("offset_2=")
+                self.offset_2 = res[start:res.find('\n'.encode("ascii"), start)]
+                
+                print ""
+                print("slope_1=" + self.slope_1 + ", offset_1=" + self.offset_1)
+                print("slope_2=" + self.slope_2 + ", offset_2=" + self.offset_2)
+                print ""
+                
+                if (type(self).cfg.test_report == True) and (im_calibration.is_test_all == True):
+                    self.rpt.write("slope_1=" + self.slope_1 + ", offset_1=" + self.offset_1 + '\n')
+                    self.rpt.write("slope_2=" + self.slope_2 + ", offset_2=" + self.offset_2 + '\n')
+                    
+                break
+            
+            if test_config.wr_var_to_uboot == True:
+                type(self).enb.tn_write(im_calibration.pp_base, "fsetenv tx_slope_prim " \
+                                        + str(self.slope_1), 3)
+                type(self).enb.tn_write(im_calibration.pp_base, "fsetenv tx_offset_prim " \
+                                        + str(self.offset_1), 3)
+                type(self).enb.tn_write(im_calibration.pp_base, "fsetenv tx_slope_sec " \
+                                        + str(self.slope_2), 3)
+                type(self).enb.tn_write(im_calibration.pp_base, "fsetenv tx_offset_sec " \
+                                        + str(self.offset_2), 3)
+            
+            if (type(self).cfg.en_eeprom_write == True):
+                self.enb.editUbootenv('TX_SLOPE_PRIM', str(self.slope_1))
+                self.enb.editUbootenv('TX_OFFSET_PRIM', str(self.offset_1))
+                self.enb.editUbootenv('TX_SLOPE_SEC', str(self.slope_2))
+                self.enb.editUbootenv('TX_OFFSET_SEC', str(self.offset_2))
+                
+                if (im_calibration.is_test_all == True):
+                    sleep(2)
+                    self.write_txpwr_to_eeprom()
+                else:
+                    se = raw_input("Write result to EEPROM?(y/n):")
+                    if (se == 'y') or (se == 'Y'):
+                        self.write_txpwr_to_eeprom()
+            
+        except:
+            print "Unexpected error:", sys.exc_info()[0]
+            
+        # stop transmit
+        #type(self).enb.enb_cd_tmpfs()
+        #type(self).enb.enb_stop_transmit()
+        
+    def write_txpwr_to_eeprom(self):
+        
+        type(self).enb.enb_cd_usr_bin()
+
+        print "edit EEPROM record"
+        type(self).enb.enb_eeprom_edit_record('wtsp', self.rn, self.slope_1)
+        type(self).enb.enb_eeprom_edit_record('wtop', self.rn, self.offset_1)
+        type(self).enb.enb_eeprom_edit_record('wtss', self.rn, self.slope_2)
+        type(self).enb.enb_eeprom_edit_record('wtos', self.rn, self.offset_2)   
+        sleep(0.5)    # wait EEPROM data wrote
+        
+    def run(self):
+        
+        if (type(self).cfg.test_set == 'agilent'):
+            self.mxa_setup()
+        elif (type(self).cfg.test_set == 'anritsu'):
+            self.mt8870a_setup(test_config.dl_freq)
+        elif (type(self).cfg.test_set == 'rs'):
+            self.cmw500_setup(test_config.dl_freq)
+            
+        self.start_enodeb_tx()
+        sleep(3)    # wait spectrum comes out
+        
+        self.do_txpwr_cal()
+
+    def get_attenuation_gain_value(self):
+        
+        self.attn_gain_val = []
+        type(self).enb.enb_cd_usr_bin()
+        type(self).enb.tn.write("oncpu 0 /usr/bin/" + self.cfg.rf_driver + '\n')
+        _ = type(self).enb.tn.read_until("Option:".encode("ascii"), 5)
+        
+        sleep(2) # prevent the rag command send too fast
+        type(self).enb.tn.write("rag\n".encode("ascii"))
+        res = type(self).enb.tn.read_until("gain1".encode("ascii"), 5)
+        type(self).enb.tn.write("q\n".encode("ascii"))
+        self.attn_gain_val.append(self.parse_attn_gain(res, 'attn1 '))
+        self.attn_gain_val.append(self.parse_attn_gain(res, 'attn2 '))
+
+    def parse_attn_gain(self, message, headstr):
+        
+        start = 0
+        while (True):
+            start = message.find(headstr, start)
+            if (start == -1): break
+            start += len(headstr)
+            res = message[start:message.find(" dB".encode("ascii"), start)]
+            return int(res)
+
+    def set_attenuation(self, ch):
+        
+        self.get_attenuation_gain_value()
+        
+        if  (ch == 1):
+            if  (len(self.attn_gain_val) == 2):
+                print "Current primary attenuation = " + \
+                        str(self.attn_gain_val[0])
+            self.att = raw_input("TX1 power attenuation(5-45 dB): ")
+            cmd = "a 1 " + str(self.att) + " q"
+            type(self).enb.enb_rf_drv_call_cmd(cmd)
+            
+        else:
+            if  (len(self.attn_gain_val) == 2):
+                print "Current secondary attenuation = " + \
+                        str(self.attn_gain_val[1])
+            self.att = raw_input("TX2 power attenuation(5-45 dB): ")
+            cmd = " a 2 " + str(self.att) + " q"
+            type(self).enb.enb_rf_drv_call_cmd(cmd)
+            
+    def tx_test(self):
+        
+        self.start_enodeb_tx()
+        sleep(3)    # wait spectrum comes out
+        
+        if (type(self).cfg.test_set == 'agilent'):
+            self.mxa_setup()
+        elif (type(self).cfg.test_set == 'anritsu'):
+            self.mt8870a_setup(test_config.dl_freq)
+        elif (type(self).cfg.test_set == 'rs'):
+            self.cmw500_setup(test_config.dl_freq)
+        
+        while (True):
+            print("(1) Primary port only")
+            print("(2) Second port only")
+            print("(3) All ports turn on")
+            print("(q) Quit")
+            
+            self.mod = raw_input("Select: ")
+            
+            if (self.mod == '1'):
+                type(self).enb.enb_disable_TX2()
+                self.set_attenuation(1)
+            
+            elif (self.mod == '2'):
+                type(self).enb.enb_disable_TX1()
+                self.set_attenuation(2)
+                
+            elif (self.mod == '3'):
+                type(self).enb.enb_enable_all_TX()
+                self.set_attenuation(1)
+                self.set_attenuation(2)
+            
+            elif (self.mod == 'q') or (self.mod == 'Q'):
+                break
+            
+            else:
+                print "unknown option"
+                continue
+                
+        type(self).enb.enb_stop_transmit()
+        
\ No newline at end of file
diff --git a/octal/cavium_env/rf_card_cal_tip/cal_tx_pwr.pyc b/octal/cavium_env/rf_card_cal_tip/cal_tx_pwr.pyc
new file mode 100644
index 0000000000..b950e86dad
Binary files /dev/null and b/octal/cavium_env/rf_card_cal_tip/cal_tx_pwr.pyc differ
diff --git a/octal/cavium_env/rf_card_cal_tip/cavium_rftest_band3_zen.docx b/octal/cavium_env/rf_card_cal_tip/cavium_rftest_band3_zen.docx
new file mode 100644
index 0000000000..a2e2587058
Binary files /dev/null and b/octal/cavium_env/rf_card_cal_tip/cavium_rftest_band3_zen.docx differ
diff --git a/octal/cavium_env/rf_card_cal_tip/common.py b/octal/cavium_env/rf_card_cal_tip/common.py
new file mode 100644
index 0000000000..533d702657
--- /dev/null
+++ b/octal/cavium_env/rf_card_cal_tip/common.py
@@ -0,0 +1,12 @@
+
+
+def hit_continue(Prompt = 'Hit Enter key to continue'):
+    raw_input(Prompt)
+    
+def disp_test_title(title):
+    length = len(title)
+    print ""
+    print "*" * (length + 4)
+    print "* " + title + " *"
+    print "*" * (length + 4)
+    print ""
\ No newline at end of file
diff --git a/octal/cavium_env/rf_card_cal_tip/common.pyc b/octal/cavium_env/rf_card_cal_tip/common.pyc
new file mode 100644
index 0000000000..171b022cf4
Binary files /dev/null and b/octal/cavium_env/rf_card_cal_tip/common.pyc differ
diff --git a/octal/cavium_env/rf_card_cal_tip/enhancedserial.py b/octal/cavium_env/rf_card_cal_tip/enhancedserial.py
new file mode 100644
index 0000000000..a8f5b50351
--- /dev/null
+++ b/octal/cavium_env/rf_card_cal_tip/enhancedserial.py
@@ -0,0 +1,95 @@
+#!/usr/bin/env python
+"""Enhanced Serial Port class
+part of pyserial (http://pyserial.sf.net)  (C)2002 cliechti@gmx.net
+
+another implementation of the readline and readlines method.
+this one should be more efficient because a bunch of characters are read
+on each access, but the drawback is that a timeout must be specified to
+make it work (enforced by the class __init__).
+
+this class could be enhanced with a read_until() method and more
+like found in the telnetlib.
+"""
+
+from serial import Serial
+from time import sleep
+
+class EnhancedSerial(Serial):
+    def __init__(self, *args, **kwargs):
+        #ensure that a reasonable timeout is set
+        timeout = kwargs.get('timeout',0.01)
+        if timeout < 0.01: timeout = 0.01
+        kwargs['timeout'] = timeout
+        Serial.__init__(self, *args, **kwargs)
+        self.buf = ''
+        self.last = ''
+        
+    def read(self, *args, **kwargs):
+        ret = Serial.read(self, *args, **kwargs)
+        #TODO: only store when there's someone called wait_until?
+        self.last += ret
+        return ret
+
+    def wait_until(self, *args, **kwargs):
+        timeout = kwargs.get('timeout',10)
+        tries=0
+        while 1:
+            if (timeout > 0) and (tries*self.timeout > timeout):
+                return -1
+            i = 0
+            for s in args:
+                if isinstance(s, str):
+                    pos = self.last.find(s)
+                    if pos >= 0:
+                        self.last = self.last[pos+1:]
+                        #print("matched"+ str(len(self.last)))
+                        return i
+                else: break
+                i+=1
+            #if pattern not found, remove the found part in lines
+            pos = self.last.rfind('\n')
+            if pos >= 0 :
+                self.last = self.last[pos+1:]
+            sleep(self.timeout)
+            tries += 1
+
+
+
+    def readline(self, maxsize=None, timeout=1):
+        """maxsize is ignored, timeout in seconds is the max time that is way for a complete line"""
+        tries = 0
+        while 1:
+            self.buf += self.read(512)
+            pos = self.buf.find('\n')
+            if pos >= 0:
+                line, self.buf = self.buf[:pos+1], self.buf[pos+1:]
+                return line
+            tries += 1
+            if tries * self.timeout > timeout:
+                break
+        line, self.buf = self.buf, ''
+        return line
+
+    def readlines(self, sizehint=None, timeout=1):
+        """read all lines that are available. abort after timout when no more data arrives."""
+        lines = []
+        while 1:
+            line = self.readline(timeout=timeout)
+            if line:
+                lines.append(line)
+            if not line or line[-1:] != '\n':
+                break
+        return lines
+
+if __name__=='__main__':
+    #do some simple tests with a Loopback HW (see test.py for details)
+    
+    PORT = 0
+    #test, only with Loopback HW (shortcut RX/TX pins (3+4 on DSUB 9 and 25) )
+    s = EnhancedSerial(PORT)
+    #write out some test data lines
+    s.write('\n'.join("hello how are you".split()))
+    #and read them back
+    print s.readlines()
+    #this one should print an empty list
+    print s.readlines(timeout=0.4)
diff --git a/octal/cavium_env/rf_card_cal_tip/enodeb_ctrl.py b/octal/cavium_env/rf_card_cal_tip/enodeb_ctrl.py
new file mode 100644
index 0000000000..2a41ecec09
--- /dev/null
+++ b/octal/cavium_env/rf_card_cal_tip/enodeb_ctrl.py
@@ -0,0 +1,1173 @@
+#!/usr/bin/env python
+
+import re
+import socket
+import os.path
+import test_config
+from time import sleep
+from telnetlib import Telnet
+
+from tempfile import mkstemp
+from shutil import move
+from os import remove, close
+
+class enodeB_Ctrl():
+    
+    def __init__(self):
+        
+        self.cfg = test_config.EnbConfig()
+        self.tn = Telnet()
+        self.rfif_hab_driver = "oct-linux-memory"
+        self.cfg.board_typ = "zen_ad"
+        self.rfic = " adi"
+        self.edit_ubootenv = "edit_ubootenv.sh"
+        self.uboot_file = "/mnt/app/ubootenv"
+        
+        self.pp_base = "/usr/bin"
+        self.pp_home = "~"
+        self.pp_root = "~"
+        self.pp_etc = "/etc"
+        self.pp_tmpfs = "/tmpfs"
+        self.pp_usrbin = "/usr/bin"
+        self.pp_lsmsdc1 = "LSMSDC1"
+
+    def start_telnet_session(self):
+        res = 0
+        print ""
+        print(self.cfg.enb_ipaddr + " start telnet session")
+        
+        try:
+            self.tn.open(self.cfg.enb_ipaddr, self.cfg.enb_tn_port, 10)
+            self.telnet_response(self.cfg.enb_ipaddr + " telnet start")
+        except socket.error, err:
+            print "telnet connection not ready"
+            res = -1
+        finally:
+            return res
+        
+    def telnet_response(self, message, timeout = 3):
+        
+        if (timeout == 0):
+            result = self.tn.read_until(self.pp_home.encode("ascii"))
+            if (result):
+                print (message + " ok")
+            else:
+                print (message + " fail")
+        else:
+            result = self.tn.read_until("# ".encode("ascii"), timeout)
+            if (result):
+                print (message + " ok")
+            else:
+                print (message + " fail")
+                
+        return result
+
+    def end_telnet_session(self):
+        
+        try:
+            self.tn.close()
+            print(self.cfg.enb_ipaddr + " close telnet session")
+            return True
+        except:
+            print(self.cfg.enb_ipaddr + " close telnet error!")
+        else:
+            return False
+
+    def get_macaddr(self):
+        
+        mac_addr = ""
+        ip_addr = ""
+        start = 0
+        
+        self.tn.write("ifconfig\n".encode("ascii"))
+        s = self.tn.read_until((self.pp_home).encode("ascii"))
+        
+        while(True):
+            start = s.find("inet addr:".encode("ascii"), start)
+            if(start == -1): break
+
+            start += len("inet addr:")
+            ip_addr = s[start:s.find(" ".encode("ascii"), start)]
+            print("ip_addr: " + ip_addr)
+            
+            if (ip_addr == (self.cfg.enb_ipaddr).encode("ascii")):
+                start = s.rfind("HWaddr ".encode("ascii"), 0, start)
+                start += len("HWaddr ")
+                mac_addr = s[start:s.find(" ".encode("ascii"), start)]
+                print("mac_addr: " + mac_addr)
+                break
+
+        return mac_addr
+    
+    def tn_write(self, prompt, message, timeout=None):
+        
+        #timeout = 3 #3 #improve enb.enb_eeprom_get_record_num() to speed up
+        if (timeout == None):
+            timeout = 1
+        
+        self.tn.write((message + "\n").encode("ascii"))
+        try:
+            res = self.tn.read_until((prompt).encode("ascii"), timeout)
+            return res
+        except:
+            print "telnet response failed"
+        
+    def enb_check_connection(self):
+        
+        enbok = 0
+        start = 0
+        self.tn.write("ls /etc")
+        res = self.tn.read_until("#".encode("ascii"), 3)
+        start = res.find("usr".encode("ascii"), start)
+        if (start == -1):
+            print 'telnet connection failed'
+            enbok = -1
+        else:
+            print 'telnet connection ok'
+            
+        return enbok
+        
+    def enb_cd_usr_bin(self):
+        self.tn_write(self.pp_usrbin, "cd /usr/bin")
+
+    def enb_cd_tmpfs(self):
+        self.tn_write(self.pp_tmpfs, "cd /tmpfs")
+
+    def enb_cd_etc(self):
+        self.tn_write(self.pp_etc, "cd /etc")
+
+    # in CLI
+    def enb_reboot_in_dsp_run(self):
+        
+        self.tn.write('reboot\n')
+        
+    # in CLI
+    def enb_reboot_in_dsp_run2(self):
+        
+        self.tn.write("exit\n")
+        self.tn.write('reboot\n')
+        
+    def enb_login(self):
+        
+        try:
+            self.tn.read_until("LSM login:".encode("ascii"), 3)
+            self.tn_write("Password:", "root")
+            self.tn_write(self.pp_home, self.cfg.login_pwd)
+            print(self.cfg.enb_ipaddr + " enodeB login ok")
+            return True
+        except:
+            return False
+
+    def enb_cleanup_tmpfs_partition(self):
+        
+        self.tn_write(self.pp_root, "cd /")
+        self.tn_write(self.pp_root, "rm -rf /tmpfs/*")
+        self.tn_write(self.pp_root, "umount -l /tmpfs")
+        self.tn_write(self.pp_root, "mount -t tmpfs -o size=256M /dev/shm /tmpfs")
+        self.tn_write(self.pp_tmpfs, "cd /tmpfs")
+        
+    # in /usr/bin
+    def enb_run_lsmLogDisp(self):
+        
+        binName = "/usr/bin/lsmLogDisp_pltD "     # lsmLogDisp
+        #self.tn_write(self.pp_usrbin, "tftp -g -r " + binName + self.cfg.tftp_server_ip)
+        #self.tn_write(self.pp_usrbin, "chmod +x " + binName)
+        self.tn_write(self.pp_usrbin, "oncpu 0 " + binName + " -p " +
+                      str(self.cfg.my_udp_port) + " -a " + self.cfg.my_udp_ipaddr + " &")
+    
+    # in root home
+    def enb_set_1pps(self, rfdir):
+        
+        if (rfdir == 'tx'):
+            clkcomp = '0x208d555555'
+        else:
+            if (self.cfg.cal_bandwidth == 20):
+                clkcomp = '0x1046AAAAAA'
+            elif (self.cfg.cal_bandwidth == 15):
+                clkcomp = '0x1046AAAAAA' #'0x208d555555'
+            elif (self.cfg.cal_bandwidth == 10):
+                clkcomp = '0x208d555555'
+            elif (self.cfg.cal_bandwidth == 5):
+                clkcomp = '0x411AAAAAAA'
+            else:
+                clkcomp = '0x208d555555'
+        
+        self.tn_write(self.pp_home, "oct-linux-csr MIO_PTP_CLOCK_CFG 0x540003763")
+        self.tn_write(self.pp_home, "oct-linux-csr MIO_PTP_PPS_THRESH_LO 0")
+        self.tn_write(self.pp_home, "oct-linux-csr MIO_PTP_PPS_THRESH_HI 0")
+        self.tn_write(self.pp_home, "oct-linux-csr MIO_PTP_PPS_LO_INCR 0x1dcd650000000000")
+        self.tn_write(self.pp_home, "oct-linux-csr MIO_PTP_PPS_HI_INCR 0x1dcd650000000000")
+        self.tn_write(self.pp_home, "oct-linux-csr MIO_PTP_CLOCK_COMP " + clkcomp)
+        self.tn_write(self.pp_home, "oct-linux-csr MIO_PTP_PHY_1PPS_IN 0x18")
+        self.tn_write(self.pp_home, "oct-linux-csr GPIO_BIT_CFG5 0x1")
+
+    # in root home
+    def enb_reset_rfic(self):
+        
+        self.tn_write(self.pp_home, "/usr/bin/oct-linux-csr GPIO_XBIT_CFG17 0x0")
+        sleep(0.5)
+        self.tn_write(self.pp_home, "/usr/bin/oct-linux-csr GPIO_XBIT_CFG17 0x1")
+
+    # in /tmpfs
+    def enb_load_file_in_tmpfs(self, file_name):
+        
+        self.tn_write(self.pp_tmpfs, "tftp -r " + file_name + " -g " +
+                       self.cfg.tftp_server_ip)
+        self.tn_write(self.pp_tmpfs, "chmod +x " + file_name)
+
+    # in /
+    def enb_load_lfmsoft(self):
+        
+        self.tn_write(self.pp_root, "cd /")
+        #self.tn_write(self.pp_root, "tftp -r LFMSOFT_OCT_D.tgz -g " +
+        #               self.cfg.tftp_server_ip)
+        self.tn_write(self.pp_root, "tar -xvzf LFMSOFT_OCT_D.tgz")
+        #self.tn_write(self.pp_root, "export LD_LIBRARY_PATH=/lib/")
+
+    # in /usr/bin
+    def enb_set_rfif_hab(self, rfdir):
+        
+        self.tn.write("export OCTEON_REMOTE_PROTOCOL=linux\n")
+        # RF initialize form DDR. Write 0x0xEABE1234 to take the value from DDR, 
+        # write 0 for disabling this option: default 10MHz will be configured for
+        self.remote_memory_32bit_set(100, "0x83000000", "0xeabe1234")
+        # RF Board Type
+        self.remote_memory_32bit_set(100, "0x83000004", "0x1")
+        # Rx Offset
+        self.remote_memory_32bit_set(100, "0x83000008", "0x4")
+        # Rx Lead
+        self.remote_memory_32bit_set(100, "0x8300000c", "0x64")
+        # Rx Lag
+        self.remote_memory_32bit_set(100, "0x83000010", "0x0")
+        
+        # Tx Offset
+        if (rfdir == 'tx'):
+            self.remote_memory_32bit_set(100, "0x83000014", "0x648")
+        else:
+            if (self.cfg.cal_bandwidth == 20):
+                self.remote_memory_32bit_set(100, "0x83000014", "0x288")
+            elif (self.cfg.cal_bandwidth == 15):
+                self.remote_memory_32bit_set(100, "0x83000014", "0x288")
+            elif (self.cfg.cal_bandwidth == 10):
+                self.remote_memory_32bit_set(100, "0x83000014", "0x7784")
+            elif (self.cfg.cal_bandwidth == 5):
+                self.remote_memory_32bit_set(100, "0x83000014", "0x3BC4")
+            else:
+                self.remote_memory_32bit_set(100, "0x83000014", "0x7784")
+                
+        # Tx Lead
+        self.remote_memory_32bit_set(100, "0x83000018", "0x8c")
+        # Tx Lag
+        self.remote_memory_32bit_set(100, "0x8300001c", "0x3c")
+        # 1:MIMO 0:SISO
+        self.remote_memory_32bit_set(100, "0x83000020", "0x1")
+        # 1:Dual Port 0:single port Should not be changed
+        self.remote_memory_32bit_set(100, "0x83000024", "0x1")
+        # SPI  not used now
+        self.remote_memory_32bit_set(100, "0x83000028", "0x0")
+        # SPI Device 0 : not used now
+        self.remote_memory_32bit_set(100, "0x8300002c", "0x0")
+        # 0:FDD 1:TDD 
+        self.remote_memory_32bit_set(100, "0x83000030", "0x0")
+        
+        # Bandwidth 0:20MHz 1:15MHz 2:10Mhz 3:5MHz
+        if (self.cfg.cal_bandwidth == 5):
+            self.remote_memory_32bit_set(100, "0x83000034", "0x3")
+        elif (self.cfg.cal_bandwidth == 10):
+            self.remote_memory_32bit_set(100, "0x83000034", "0x2")
+        elif (self.cfg.cal_bandwidth == 15):
+            self.remote_memory_32bit_set(100, "0x83000034", "0x0") #0x01
+        elif (self.cfg.cal_bandwidth == 20):
+            self.remote_memory_32bit_set(100, "0x83000034", "0x0")
+        else:
+            self.remote_memory_32bit_set(100, "0x83000034", "0x2")
+            
+        # MAX sample Adjustment Should not be changed
+        self.remote_memory_32bit_set(100, "0x83000038", "0x2")
+        # MIN sample Adjustment Should not be changed
+        self.remote_memory_32bit_set(100, "0x8300003c", "0x2")
+        # Sample Add and drop at end of frame Should not be changed
+        self.remote_memory_32bit_set(100, "0x83000040", "0x0")
+        
+        # sample at which rx sample counter adjustment Should not be changed
+        if (self.cfg.cal_bandwidth == 20):
+            self.remote_memory_32bit_set(100, "0x83000044", "0x7800")
+        elif (self.cfg.cal_bandwidth == 15):
+            self.remote_memory_32bit_set(100, "0x83000044", "0x7800") #"0x3C00"
+        elif (self.cfg.cal_bandwidth == 10):
+            self.remote_memory_32bit_set(100, "0x83000044", "0x3C00")
+        elif (self.cfg.cal_bandwidth == 5):
+            self.remote_memory_32bit_set(100, "0x83000044", "0x1E00")
+        else:
+            self.remote_memory_32bit_set(100, "0x83000044", "0x3C00")
+            
+        # sample at which tx sample counter adjustment Should not be changed
+        if (self.cfg.cal_bandwidth == 20):
+            self.remote_memory_32bit_set(100, "0x83000048", "0x7800")
+        elif (self.cfg.cal_bandwidth == 15):
+            self.remote_memory_32bit_set(100, "0x83000048", "0x7800") #"0x3C00"
+        elif (self.cfg.cal_bandwidth == 10):
+            self.remote_memory_32bit_set(100, "0x83000048", "0x3C00")
+        elif (self.cfg.cal_bandwidth == 5):
+            self.remote_memory_32bit_set(100, "0x83000048", "0x1E00")
+        else:
+            self.remote_memory_32bit_set(100, "0x83000048", "0x3C00")
+        
+        # rx correct adjustment Should not be changed
+        self.remote_memory_32bit_set(100, "0x8300004c", "0x5")
+        # tx correct adjustment Should not be changed
+        self.remote_memory_32bit_set(100, "0x83000050", "0x8")
+        
+    def remote_memory_32bit_set(self, val_c, address, value):
+        # oct-linux-memory
+        self.tn_write(self.pp_usrbin, "/usr/bin/" + self.rfif_hab_driver + 
+                          " -w 4 -c " + str(val_c) + " " + address + " " + value)
+
+    def enb_get_delay_sync_value(self):
+        
+        self.tn.write('/usr/bin/oct-linux-memory -w 4 -c 120 0x10f00009a2040')
+        res = self.tn.read_until(self.pp_tmpfs, 3)
+        print "********"
+        print res
+        print "********"
+        
+    # in /usr/bin
+    def enb_load_rf_init(self, rfInitName):
+        
+        self.tn_write(self.pp_usrbin, "tftp -gr " + rfInitName \
+                      + " " + self.cfg.tftp_server_ip)
+        #if not os.path.isfile(rfInitName):
+        #    return False
+        
+        if self.cfg.rf_drv_init != "rf_init.txt":
+            self.tn_write(self.pp_usrbin, "cp " + rfInitName + "rf_init.txt")
+                            
+        self.tn_write(self.pp_usrbin, "chmod +r rf_init.txt")
+        return True
+        
+    # in /usr/bin
+    def enb_set_rf_drv_rf_card(self):
+        
+        self.tn_write(self.pp_usrbin, "cp " + self.cfg.rf_drv_init + " rf_init.txt")
+        self.tn_write(self.pp_usrbin, "chmod +r rf_init.txt")
+        self.tn_write(self.pp_base, "oncpu 0 /usr/bin/" + self.cfg.rf_driver + 
+                      self.rfic + " <<  EOF")
+        self.tn_write(self.pp_base, "i d " + str(test_config.dl_freq) + " u " + 
+                      str(test_config.ul_freq) + " a 1 " + str(self.cfg.attn1) + 
+                      " a 2 " + str(self.cfg.attn2) + " g 1 " + 
+                      str(self.cfg.gain1) + " g 2 " + 
+                      str(self.cfg.gain2) + " q")
+        self.tn_write(self.pp_base, "EOF")
+        
+        #self.enb_set_adi_register27()
+        
+    def rx_set_rf_drv_rf_card(self):
+    
+        self.tn_write(self.pp_base, "oncpu 0 /usr/bin/" + self.cfg.rf_driver + 
+                      self.rfic + " <<  EOF")
+        self.tn_write(self.pp_base, "a 1 " + str(self.cfg.attn1) + 
+                      " a 2 " + str(self.cfg.attn2) + " g 1 " + 
+                      str(self.cfg.rx_gain) + " g 2 " + 
+                      str(self.cfg.rx_gain) + " q")
+        self.tn_write(self.pp_base, "EOF")
+        sleep(3)
+        """
+        self.tn_write(self.pp_base, "oncpu 0 /usr/bin/" + self.cfg.rf_driver + 
+                      self.rfic + " <<  EOF")
+        self.tn_write(self.pp_base, "w 6 8 gpio 8 q")
+        self.tn_write(self.pp_base, "EOF")
+        
+        self.enb_set_adi_register27()
+        """
+        
+    # in /usr/bin
+    def enb_soft_reset(self):
+    
+        self.tn_write(self.pp_base, "oncpu 0 /usr/bin/" + self.cfg.rf_driver + 
+                      self.rfic + " <<  EOF")
+        self.tn_write(self.pp_base, "rst q")
+        self.tn_write(self.pp_base, "EOF")
+    
+    def enb_set_zen_tdd_rx(self):
+    
+        self.tn_write(self.pp_base, "oncpu 0 /usr/bin/" + self.cfg.rf_driver + 
+                      self.rfic + " <<  EOF")
+        self.tn_write(self.pp_base, "w 27 0x40 q")
+        self.tn_write(self.pp_base, "EOF")
+        
+    def enb_set_zen_tdd_tx(self):
+    
+        self.tn_write(self.pp_base, "oncpu 0 /usr/bin/" + self.cfg.rf_driver + 
+                      self.rfic + " <<  EOF")
+        self.tn_write(self.pp_base, "w 27 0x90 q")
+        self.tn_write(self.pp_base, "EOF")
+        
+    # in /usr/bin
+    def enb_enable_all_TX(self):
+    
+        #print "enable all TX ports"
+        self.tn_write(self.pp_base, "oncpu 0 /usr/bin/" + self.cfg.rf_driver + 
+                      self.rfic + " <<  EOF")
+        if (self.cfg.cal_bandwidth >= 15):
+            self.tn_write(self.pp_base, "w 2 0xCE q")
+        else:
+            self.tn_write(self.pp_base, "w 2 0xDE q")
+        self.tn_write(self.pp_base, "EOF")
+        
+    # in /usr/bin
+    def enb_disable_all_TX(self):
+    
+        print "disable all TX ports"
+        self.tn_write(self.pp_base, "oncpu 0 /usr/bin/" + self.cfg.rf_driver + 
+                      self.rfic + " <<  EOF")
+        if (self.cfg.cal_bandwidth >= 15):
+            self.tn_write(self.pp_base, "w 2 0x0E q")
+        else:
+            self.tn_write(self.pp_base, "w 2 0x1E q")
+            
+        self.tn_write(self.pp_base, "EOF")
+        
+    # in /usr/bin
+    def enb_disable_TX1(self):
+    
+        print "disable primary TX"
+        self.tn_write(self.pp_base, "oncpu 0 /usr/bin/" + self.cfg.rf_driver + 
+                      self.rfic + " <<  EOF")
+        if (self.cfg.cal_bandwidth >= 15):
+            self.tn_write(self.pp_base, "w 2 0x8E q")
+        else:
+            self.tn_write(self.pp_base, "w 2 0x9E q")
+        self.tn_write(self.pp_base, "EOF")
+    
+    # in /usr/bin
+    def enb_disable_TX2(self):
+    
+        print "disable second TX"
+        self.tn_write(self.pp_base, "oncpu 0 /usr/bin/" + self.cfg.rf_driver + 
+                      self.rfic + " <<  EOF")
+        if (self.cfg.cal_bandwidth >= 15):
+            self.tn_write(self.pp_base, "w 2 0x4E q")
+        else:
+            self.tn_write(self.pp_base, "w 2 0x5E q")
+        self.tn_write(self.pp_base, "EOF")
+    
+    # in /usr/bin
+    def enb_enable_all_RX(self):
+    
+        print "enable all RX ports"
+        self.tn_write(self.pp_base, "oncpu 0 /usr/bin/" + self.cfg.rf_driver + 
+                      self.rfic + " <<  EOF")
+        self.tn_write(self.pp_base, "w 3 0xDE q")
+        self.tn_write(self.pp_base, "EOF")
+    
+    # in /usr/bin
+    def enb_disable_all_RX(self):
+    
+        print "disable all RX ports"
+        self.tn_write(self.pp_base, "oncpu 0 /usr/bin/" + self.cfg.rf_driver + 
+                      self.rfic + " <<  EOF")
+        self.tn_write(self.pp_base, "w 3 0x1E q")
+        self.tn_write(self.pp_base, "EOF")
+    
+    # in /usr/bin
+    def enb_disable_RX1(self):
+    
+        print "disable primary RX"
+        self.tn_write(self.pp_base, "oncpu 0 /usr/bin/" + self.cfg.rf_driver + 
+                      self.rfic + " <<  EOF")
+        
+        self.tn_write(self.pp_base, "g 1 5 g 2 60 q")
+        """
+        if (self.cfg.cal_bandwidth >= 15) and (test_config.band > 32):
+            self.tn_write(self.pp_base, "w 3 0x9E q")
+        else:
+            self.tn_write(self.pp_base, "g 1 5 g 2 60 q")
+        """
+        self.tn_write(self.pp_base, "EOF")
+    
+    # in /usr/bin
+    def enb_disable_RX2(self):
+    
+        print "disable second RX"
+        self.tn_write(self.pp_usrbin, "oncpu 0 /usr/bin/" + self.cfg.rf_driver + 
+                      self.rfic + " <<  EOF")
+        
+        self.tn_write(self.pp_usrbin, "g 1 60 g 2 5 q")
+        """
+        if (self.cfg.cal_bandwidth >= 15) and (test_config.band > 32):
+            self.tn_write(self.pp_base, "w 3 0x5E q")
+        else:
+            self.tn_write(self.pp_usrbin, "g 1 60 g 2 5 q")
+        """
+        self.tn_write(self.pp_usrbin, "EOF")
+    
+    def enb_pwm_ctrl_call_cmd(self, cmd):
+        
+        self.tn_write(self.pp_usrbin, "oncpu 0 /usr/bin/" + 
+                      self.cfg.rf_driver + self.rfic + " <<  EOF")
+        self.tn_write(self.pp_usrbin, "pwm " + cmd)
+        self.tn_write(self.pp_usrbin, "EOF")
+    
+    def enb_dax_ctrl_call_cmd(self, cmd):
+   
+        self.tn_write(self.pp_base, "oncpu 0 /usr/bin/" + 
+                      self.cfg.rf_driver + self.rfic + " <<  EOF")
+        self.tn_write(self.pp_base, "dax " + cmd)
+        self.tn_write(self.pp_base, "EOF")
+    
+    def enb_rf_drv_call(self):
+        
+        if (self.cfg.cal_bandwidth >= 15):
+            self.tn_write("Option:", "oncpu 0 /usr/bin/" + 
+                          self.cfg.rf_driver + self.rfic + " 26")
+        else:
+            self.tn_write("Option:", "oncpu 0 /usr/bin/" + 
+                          self.cfg.rf_driver + self.rfic + " 16")
+        
+    def enb_rf_drv_call_cmd(self, cmd):
+    
+        self.tn_write(self.pp_base, "oncpu 0 /usr/bin/" + 
+                      self.cfg.rf_driver + self.rfic + " <<  EOF")
+        self.tn_write(self.pp_base, cmd)
+        self.tn_write(self.pp_base, "EOF")
+
+    # in /usr/bin
+    def enb_load_rf_driver(self):
+        
+        self.tn_write(self.pp_base, "tftp -gr " + self.cfg.rf_driver + " " +
+                      self.cfg.tftp_server_ip)  
+
+    # in /usr/bin
+    def enb_load_dac(self):
+        
+        self.tn_write(self.pp_base, "oncpu 0 /usr/bin/" + self.cfg.rf_driver + 
+                      self.rfic + " <<  EOF")
+        self.tn_write(self.pp_base, "dac " + "`fprintenv dac_offset -r`" + " q")
+        self.tn_write(self.pp_base, "EOF")     
+
+    def enb_load_pwm(self):
+        
+        self.tn_write(self.pp_base, "oncpu 0 " + self.cfg.rf_driver + 
+                      self.rfic + " << EOF")
+        self.tn_write(self.pp_base, 
+                      "pwm e h `fprintenv pwmreghigh -r` l `fprintenv pwmreglow -r`" + 
+                      " q")
+        self.tn_write(self.pp_base, "EOF")
+        
+    def enb_load_dax(self):
+        
+        self.tn_write(self.pp_base, "oncpu 0 " + self.cfg.rf_driver + self.rfic + 
+                      " << EOF")
+        self.tn_write(self.pp_base, "dax `fprintenv pwmreghigh -r`" + " q")
+        self.tn_write(self.pp_base, "EOF")
+        
+    def enb_load_iq_offset(self):
+        reg_en_offset = 0x9f
+        reg_tx1_i = 0x92
+        reg_tx1_q = 0x93
+        reg_tx2_i = 0x94
+        reg_tx2_q = 0x95
+
+        self.enb_adi_write_reg(str(hex(reg_tx1_i)), "`fprintenv tx1_i_offset -r`")
+        self.enb_adi_write_reg(str(hex(reg_tx1_q)), "`fprintenv tx1_q_offset -r`")
+        self.enb_adi_write_reg(str(hex(reg_tx2_i)), "`fprintenv tx2_i_offset -r`")
+        self.enb_adi_write_reg(str(hex(reg_tx2_q)), "`fprintenv tx2_q_offset -r`")
+        self.enb_adi_write_reg(str(hex(reg_en_offset)), str(hex(0x0C)))
+        
+    # in /etc
+    def enb_load_dsp_to_etc(self):
+        self.tn_write(self.pp_etc, "tftp -g -r dsp.tgz " + str(self.cfg.tftp_server_ip))
+        self.tn_write(self.pp_etc, "tar -zxvf dsp.tgz")
+        
+    # in /tmpfs
+    def enb_load_dsp_to_tmpfs(self):
+        self.tn_write(self.pp_tmpfs, "tftp -g -r dsp.tgz " + str(self.cfg.tftp_server_ip))
+        self.tn_write(self.pp_tmpfs, "tar xzf dsp.tgz")
+        
+    # in /usr/bin
+    # set flag for MAC to get triggered
+    def enb_set_7ffeff00(self):
+        #self.tn_write(self.pp_base, "ms 7ffeff00 6 -w")
+        self.tn.write("/usr/bin/oct-linux-memory -w 4 -c 8 0x7ffeff00 6\n")
+        
+    # in /tmpfs
+    def enb_etm_test_vector(self):
+        
+        #self.tn_write(self.pp_tmpfs, "rm -rf /tmpfs/*")
+        #sleep(2)
+        
+        self.tn_write(self.pp_tmpfs, "tftp -g -r " + self.cfg.dl_etm_test_vector + 
+                      " " + str(self.cfg.tftp_server_ip))
+        self.tn_write(self.pp_tmpfs, "tar -zxvf " + self.cfg.dl_etm_test_vector)
+        self.tn_write(self.pp_tmpfs, "rm " + self.cfg.dl_etm_test_vector)
+        
+    # in /tmpfs
+    def enb_load_LSM_X_TV_0_wk21_00_ETM(self):
+        
+        print 'loading ' + self.cfg.dl_etm_test_vector
+        self.tn_write(self.pp_tmpfs, "tftp -g -r " + self.cfg.dl_etm_test_vector + 
+                      " " + str(self.cfg.tftp_server_ip))
+        self.tn_write(self.pp_tmpfs, "tar -xvf " + self.cfg.dl_etm_test_vector)
+        self.tn_write(self.pp_tmpfs, "rm " + self.cfg.dl_etm_test_vector)
+        
+    # in /tmpfs
+    def enb_load_LSM_X_L1_0_SoC_11_wk37_00(self):
+        
+        self.tn_write(self.pp_tmpfs, "tftp -g -r LSM_X_L1_0_SoC_11_wk37_00.tgz " + 
+                      str(self.cfg.tftp_server_ip))
+        self.tn_write(self.pp_tmpfs, "tar -zxvf LSM_X_L1_0_SoC_11_wk37_00.tgz ")
+        self.tn_write(self.pp_tmpfs, "rm LSM_X_L1_0_SoC_11_wk37_00.tgz ")
+        
+    # in /tmpfs
+    def enb_load_ul_test_vector(self):
+        
+        self.tn_write(self.pp_tmpfs, "tftp -g -r TV.tgz " + 
+                      str(self.cfg.tftp_server_ip))
+        self.tn_write(self.pp_tmpfs, "tar -xvf TV.tgz ")
+        self.tn_write(self.pp_tmpfs, "rm TV.tgz ")
+        
+    # in /usr/bin
+    def enb_set_dsp_app_dl(self):
+        
+        #self.tn_write(self.pp_base, "gzip -d ./pltD.gz")
+        self.tn_write(self.pp_tmpfs, "tftp -gr pltD-0619 " + str(self.cfg.tftp_server_ip))
+        self.tn_write(self.pp_base, "mv ./pltD-0619 ./pltD")
+        
+        self.tn_write(self.pp_base, "chmod +x ./pltD")
+        self.tn_write(self.pp_base, "oncpu 0 ./pltD -ld normal -stall 2")
+        
+    # in /usr/bin
+    def enb_run_dsp_app_dl(self):
+        
+        """
+        print "oncpu 0 /usr/bin/pltD -drv dl -bw " \
+                      + str(self.cfg.cal_bandwidth) \
+                      + " -tc 0001 -etm 1 -ant 2 -c 1 &"
+        """
+        self.tn_write(self.pp_base, "oncpu 0 /usr/bin/pltD -drv dl -bw " \
+                      + str(self.cfg.cal_bandwidth) \
+                      + " -tc 0001 -etm 1 -ant 2 -c 1 &")
+        
+    # in /tmpfs
+    def enb_run_dsp_app_dl_15mhz(self):
+        
+        self.tn_write(self.pp_tmpfs, "oncpu 0 ./pltD -drv dl -bw 20 " \
+                      + " -tc 0001 -etm 1 -ant 2 -c 1 &")
+        
+    # in /tmpfs
+    def enb_stop_transmit(self):
+        
+        self.tn_write(self.pp_tmpfs, '\x1d')
+        self.tn_write(self.pp_tmpfs, "oncpu 0 ./pltD -drv stop")
+        
+    # in /usr/bin
+    def enb_adi_write_reg(self, addr, val):
+
+        self.tn_write(self.pp_base, "oncpu 0 /usr/bin/" + self.cfg.rf_driver + 
+                      self.rfic + " <<  EOF")
+        self.tn_write(self.pp_base, "w " + str(addr) + " " + str(val) + " q")
+        self.tn_write(self.pp_base, "EOF")
+        
+    # in /usr/bin
+    def enb_adi_read_reg(self, addr, val):
+
+        self.tn_write(self.pp_base, "oncpu 0 /usr/bin/" + self.cfg.rf_driver + 
+                      self.rfic + " <<  EOF")
+        self.tn_write(self.pp_base, "r " + str(addr) + " q")
+        self.tn_write(self.pp_base, "EOF")
+    
+    # in /usr/bin
+    def enb_eeprom_get_record_num(self):
+        
+        num_records = '-1'
+        sleep(5)
+        try:
+            self.tn_write('Option', "oncpu 0 /usr/bin/" + \
+                          self.cfg.rf_driver + self.rfic, 3)
+            self.tn_write('option', "e", 3)
+            self.tn_write(':', "rnr", 3)
+            res = self.tn.read_until(')'.encode("ascii"), 5)
+            #self.tn_write('/usr/bin>', "q")
+            self.tn_write(self.pp_base, "q", 3)
+            
+            start = 0
+            start = res.find("num_records = ".encode("ascii"), start)
+            start += len("num_records = ")
+            num_records = res[start:res.find('('.encode("ascii"), start)]
+        except:
+            print 'fail to get eeprom record number'
+            
+        return num_records
+    
+    # in /usr/bin
+    def enb_eeprom_get_serial_num(self):
+        
+        self.tn_write('Option', "oncpu 0 /usr/bin/" + self.cfg.rf_driver + self.rfic)
+        self.tn_write('option', "e")
+        self.tn_write(':', "rsn")
+        res = self.tn.read_until(')'.encode("ascii"), 15)
+        self.tn_write('/usr/bin>', "q")
+        
+        start = 0
+        start = res.find("serialno = ".encode("ascii"), start)
+        start += len("serialno = ")
+        serial_num = res[start:res.find('\n'.encode("ascii"), start)]
+        return serial_num
+    
+    # in /usr/bin
+    def enb_eeprom_get_earfcn_dl(self):
+        
+        self.tn_write('Option', "oncpu 0 /usr/bin/" + self.cfg.rf_driver + self.rfic)
+        self.tn_write('option', "e")
+        self.tn_write(':', "lre")
+        res = self.tn.read_until('*'.encode("ascii"), 15)
+        self.tn_write('/usr/bin>', "q")
+        
+        start = 0
+        self.records = []
+        
+        while(True):
+            start = res.find("record: ".encode("ascii"), start)
+            if (start == -1): break
+            start += len("record: ")
+            rec_num = res[start:res.find('earfcn: '.encode("ascii"), start)]
+            start = res.find("earfcn: ".encode("ascii"), start)
+            start += len("earfcn: ")
+            earfcn = res[start:res.find('\n'.encode("ascii"), start)]
+            
+            self.records.append([rec_num, earfcn])
+            print "record: " + rec_num + " earfcn: " + earfcn
+        
+        return self.records
+    
+    # in /usr/bin
+    def enb_bb_eeprom_get_serial_number(self):
+        
+        _ = self.tn.read_until('login'.encode("ascii"), 5)
+        print ''
+        self.tn_write('Option', "oncpu 0 /usr/bin/" + self.cfg.rf_driver)
+        self.tn_write('option', "be")
+        self.tn_write(':', "rsn")
+        res = self.tn.read_until('*'.encode("ascii"), 5)
+        self.tn_write('/usr/bin', "q")
+        
+        start = 0
+        start = res.find("= ".encode("ascii"), start)
+        start += len("= ")
+        serialNum = res[start:res.find('*'.encode("ascii"), start)].strip()
+        return serialNum
+    
+    # in /usr/bin
+    def enb_eeprom_to_uboot(self):
+        
+        print "\nEERPOM content:"
+        records = self.enb_eeprom_get_earfcn_dl()
+        efn_num = int(raw_input("input record earfcn: "))
+        
+        self.got_earfcn_rec = False
+        for rn in records:
+            if (efn_num == int(rn[1])):
+                self.got_earfcn_rec = True
+                break
+        
+        if (self.got_earfcn_rec == False):
+            print "no available record for earfcn " + str(efn_num)
+            return
+        
+        self.tn_write('Option', "oncpu 0 /usr/bin/" + self.cfg.rf_driver + self.rfic)
+        self.tn_write('option', "e")
+        self.tn_write('number', "lod")
+        self.tn_write(':', str(efn_num))
+        self.tn_write('/usr/bin>', "q")
+        
+        print "writing uboot environment variables..."
+        while (True):
+            res = self.tn.read_until('='.encode("ascii"), 60)
+            if (res.find("tx_max_pwr_sec".encode("ascii")) == -1):
+                print "done"
+                break
+            else:
+                continue
+    
+    # in /usr/bin
+    def enb_eeprom_edit_header(self, cmd, val):
+        
+        self.tn_write(self.pp_base, "oncpu 0 /usr/bin/" + self.cfg.rf_driver + 
+                      self.rfic + " <<  EOF")
+        self.tn_write(self.pp_base, "e")
+        self.tn_write(self.pp_base, cmd + " " + val)
+        self.tn_write(self.pp_base, "q")
+        self.tn_write(self.pp_base, "EOF")
+    
+    # in /usr/bin
+    def enb_eeprom_edit_rec_num(self, cmd, val):
+        
+        self.tn_write(self.pp_base, "oncpu 0 /usr/bin/" + self.cfg.rf_driver + 
+                      self.rfic + " <<  EOF")
+        self.tn_write(self.pp_base, "e")
+        self.tn_write(self.pp_base, cmd + " " + str(val))
+        self.tn_write(self.pp_base, "q")
+        self.tn_write(self.pp_base, "EOF")
+    
+    # in /usr/bin
+    def enb_eeprom_edit_record(self, cmd, rec_num, val):
+        
+        self.tn_write(self.pp_base, "oncpu 0 /usr/bin/" + self.cfg.rf_driver + 
+                      self.rfic + " <<  EOF")
+        self.tn_write(self.pp_base, "e")
+        self.tn_write(self.pp_base, "wrc " + str(rec_num) + " " + cmd + " " + val)
+        self.tn_write(self.pp_base, "q")
+        self.tn_write(self.pp_base, "EOF")
+
+    # in /usr/bin
+    def enb_bb_eeprom_edit_record(self, cmd, val):
+        
+        self.tn_write(self.pp_base, "oncpu 0 /usr/bin/" + self.cfg.rf_driver + 
+                      self.rfic + " <<  EOF")
+        self.tn_write(self.pp_base, "be")
+        self.tn_write(self.pp_base, cmd + " " + val)
+        self.tn_write(self.pp_base, "q")
+        self.tn_write(self.pp_base, "EOF")
+
+    # in /usr/bin
+    def enb_eeprom_append_record(self, cmd, rec_ver, val):
+        
+        self.tn_write(self.pp_base, "oncpu 0 /usr/bin/" + self.cfg.rf_driver + 
+                      self.rfic + " <<  EOF")
+        self.tn_write(self.pp_base, "e")
+        self.tn_write(self.pp_base, "arc " + str(rec_ver) + " " + cmd + " " + val)
+        self.tn_write(self.pp_base, "q")
+        self.tn_write(self.pp_base, "EOF")
+
+    # in /usr/bin
+    def enb_get_temperature(self):
+        
+        self.tn_write('Option', "oncpu 0 /usr/bin/" + self.cfg.rf_driver + self.rfic)
+        self.tn_write(':', "mr")
+        res = self.tn.read_until(')'.encode("ascii"), 5)
+        self.tn_write('/usr/bin>', "q")
+        #print "res = " + res
+        
+        start = 0
+        start = res.find("temperature= ".encode("ascii"), start)
+        start += len("temperature= ")
+        temperature = res[start:res.find('('.encode("ascii"), start)]
+        return temperature
+        
+    # in /usr/bin
+    def enb_set_adi_register27(self):
+        
+        self.reg27 = '0x80'
+        self.tn_write(self.pp_base, "oncpu 0 /usr/bin/" + self.cfg.rf_driver + 
+                      self.rfic + " <<  EOF")
+        self.tn_write(self.pp_base, "w 27 " + self.reg27 + " q")
+        self.tn_write(self.pp_base, "EOF")
+        #print "ADI register 27 set to " + self.reg27
+        
+    # in /usr/bin
+    def rx_load_test_vector(self):
+        #self.tn_write(self.pp_tmpfs, "rm CAL_UL_TV_" + str(self.cfg.cal_bandwidth) + "Mhz.tgz")
+        #self.tn_write(self.pp_tmpfs, "rm CAL_ETM_TV_" + str(self.cfg.cal_bandwidth) + "Mhz.tgz")
+        #self.tn_write(self.pp_tmpfs, "rm -rf TV")
+        #sleep(1)
+        testVector = ''
+        if (self.cfg.cal_bandwidth == 5):
+            testVector = 'CAL_UL_TV_5Mhz.tgz'
+        elif (self.cfg.cal_bandwidth == 10):
+            testVector = 'CAL_UL_TV_10Mhz.tgz'
+        elif (self.cfg.cal_bandwidth == 20):
+            testVector = 'CAL_UL_TV_20Mhz.tgz'
+        
+        self.tn_write(self.pp_base, "tftp -g -r " + testVector + " " + str(self.cfg.tftp_server_ip))
+        self.tn_write(self.pp_base, "tar xzvf " + testVector)
+        self.tn_write(self.pp_base, "rm " + testVector)
+    
+    """
+    # in /tmpfs
+    def rx_load_test_vector(self):
+        
+        self.tn_write(self.pp_tmpfs, "tftp -g -r " + self.cfg.rx_test_vector + 
+                      " " + str(self.cfg.tftp_server_ip))
+        self.tn_write(self.pp_tmpfs, "tar xzf " + self.cfg.rx_test_vector)
+        self.tn_write(self.pp_tmpfs, "rm " + self.cfg.rx_test_vector)
+    """
+    
+    # in /tmpfs
+    def rx_load_patch_vector(self):
+        
+        self.tn.write(("cd /tmpfs/TV/UL/" + 
+                       str(self.cfg.cal_bandwidth) + "m").encode("ascii"))
+        self.tn_write(self.pp_tmpfs, "tftp -g -r " + self.cfg.rx_patch_vector + 
+                      " " + str(self.cfg.tftp_server_ip))
+        self.tn_write(self.pp_tmpfs, "tar xzf " + self.cfg.rx_patch_vector)
+        self.tn_write(self.pp_tmpfs, "rm " + self.cfg.rx_patch_vector)
+
+    # in /tmpfs
+    def rx_run_dsp_app(self):
+
+        self.tn_write(self.pp_tmpfs, "oncpu 0 /usr/bin/pltD -drv ul -bw " +
+                        str(self.cfg.cal_bandwidth) + " -tc " + 
+                        self.cfg.tcid + " -c 1 &")
+
+    # in CLI
+    def rx_display_bler(self):
+        
+        self.tn.write("ccli << EOF\n")
+        self.tn.write("drvCmd -u mask 800\n")
+        self.tn.write("exit\n")
+        self.tn.write("EOF\n")
+    
+    # in /usr/bin
+    def get_delay_sync_value(self):
+        
+        self.tn.write("cd /usr/bin\n")
+        self.tn.read_until(self.pp_usrbin, 5)
+        self.tn.write("export OCTEON_REMOTE_PROTOCOL=linux\n")
+        
+        self.tn.write("/usr/bin/oct-linux-memory -w 4 -c 120 0x10f00009a2040\n")
+        self.tn.read_until('10f00009a2060'.encode("ascii"), 5)
+        sleep(5)
+        
+        self.tn.write("/usr/bin/oct-linux-memory -w 4 -c 120 0x10f00009673ec 4096\n")
+        self.tn.read_until('10f0000a2b7f0'.encode("ascii"), 5)
+        sleep(5)
+        
+        self.tn.write("/usr/bin/oct-linux-memory -w 4 -c 120 0x10f00009a2040\n")
+        res = self.tn.read_until('10f00009a2060'.encode("ascii"), 5)
+        #print res
+        start = res.find("10f00009a2040 : ".encode("ascii"), 0)
+        start += len("10f00009a2040 : ")
+        sync_val = res[start:res.find(" ".encode("ascii"), start)]
+        #print 'sync_val = ' + sync_val
+        
+        if (sync_val != ""):
+            print 'sync_val = ' + sync_val
+            sync_val = '0x' + sync_val
+            
+            try:
+                tohex = int(sync_val, 16) 
+                tohex = 0 #TODO: fix
+            except:
+                tohex = 0
+            
+            if (tohex < 255) and (tohex >= 0):
+                print 'tohex = ' + str(tohex)
+            else:
+                tohex = -1    
+        else:
+            tohex = 0
+            
+        self.tn.write("/usr/bin/oct-linux-memory -w 4 -c 120 0x10f0000a2b7d0\n")
+        sleep(2)
+        self.tn.write("/usr/bin/oct-linux-memory -w 4 -c 120 0x10f0000a2b7d0\n")
+            
+        return tohex
+        
+    # in /usr/bin
+    def calc_rf_eeprom_md5(self):
+        
+        self.tn_write(self.pp_base, \
+            '/usr/bin/get_eeprom_config.sh /tmp/rf.conf -rf -updmd5', 3)
+        _ = self.tn.read_until('get_eeprom_config'.encode("ascii"), 3)
+        res = self.tn.read_until('#'.encode("ascii"), 3)
+        #print res
+        start = res.find("writing".encode("ascii"), 0)
+        if (start == -1): return 'non'
+        start += len("writing: ")
+        val_md5 = res[start:res.find('\n'.encode("ascii"), start)]
+        #print 'MD5 = ' + str(val_md5)
+        return str(val_md5)
+        
+    # in /usr/bin
+    def wr_ubootenv_bw(self, bw):
+        """
+        cmd1 = 'sh /mnt/app/' + self.edit_ubootenv + ' BW ' + str(bw)
+        self.tn_write(self.pp_base, 'tftp -gr ' + self.edit_ubootenv + ' ' \
+                      + self.cfg.tftp_server_ip, 3)
+        self.tn_write(self.pp_base, cmd1)
+        """
+        self.editUbootenv('BW', str(bw))
+        
+    # in /usr/bin
+    def wr_ubootenv_freq(self, dl_freq, ul_freq):
+        """
+        cmd1 = 'sh /mnt/app/' + self.edit_ubootenv + ' TXFREQ ' + str(dl_freq)
+        cmd2 = 'sh /mnt/app/' + self.edit_ubootenv + ' RXFREQ ' + str(ul_freq)
+        
+        self.tn_write(self.pp_base, 'tftp -gr ' + self.edit_ubootenv + ' ' \
+                      + self.cfg.tftp_server_ip, 3)
+        self.tn_write(self.pp_base, 'chmod +x ' + self.edit_ubootenv)
+        self.tn_write(self.pp_base, cmd1)
+        self.tn_write(self.pp_base, cmd2)
+        """
+        self.editUbootenv('TXFREQ', str(dl_freq))
+        self.editUbootenv('RXFREQ', str(ul_freq))
+        
+    # in /usr/bin
+    def wr_ubootenv_gain(self, gain1, gain2):
+        """
+        cmd1 = 'sh /mnt/app/' + self.edit_ubootenv + ' GAIN1 ' + str(gain1)
+        cmd2 = 'sh /mnt/app/' + self.edit_ubootenv + ' GAIN2 ' + str(gain2)
+        
+        self.tn_write(self.pp_base, 'tftp -gr ' + self.edit_ubootenv + ' ' \
+                      + self.cfg.tftp_server_ip, 3)
+        self.tn_write(self.pp_base, 'chmod +x ' + self.edit_ubootenv)
+        self.tn_write(self.pp_base, cmd1)
+        self.tn_write(self.pp_base, cmd2)
+        """
+        self.editUbootenv('GAIN1', str(gain1))
+        self.editUbootenv('GAIN2', str(gain2))
+        
+    # in /usr/bin
+    def wr_ubootenv_atten(self, attn1, attn2):
+        """
+        cmd1 = 'sh /mnt/app/' + self.edit_ubootenv + ' ATTEN1 ' + str(attn1)
+        cmd2 = 'sh /mnt/app/' + self.edit_ubootenv + ' ATTEN2 ' + str(attn2)
+        
+        self.tn_write(self.pp_base, 'tftp -gr ' + self.edit_ubootenv + ' ' \
+                      + self.cfg.tftp_server_ip, 3)
+        self.tn_write(self.pp_base, 'chmod +x ' + self.edit_ubootenv)
+        self.tn_write(self.pp_base, cmd1)
+        self.tn_write(self.pp_base, cmd2)
+        """
+        self.editUbootenv('ATTEN1', str(attn1))
+        self.editUbootenv('ATTEN2', str(attn2))
+        
+    def editUbootenv(self, param, newval):
+        
+        cmd = 'sed -i \"s/^' + param \
+                + '.*/' + param + '=\\\"' + newval \
+                + '\\\"/\" /mnt/app/ubootenv'
+        
+        self.tn_write(self.pp_base, cmd.encode('ascii'))
+    
+    def killPltD(self):
+        
+        cmd = 'ps -e | grep pltD'
+        stdin, stdout, stderr = self.sh.exec_command(cmd)
+        gr = stdout.read()
+        print gr
+        print ""
+        
+        self.rlist = []
+        if (len(gr) > 0) and (gr[0] != ' '):
+            self.rlst = re.findall(r'^(.*)\s\?', gr, re.M|re.I)
+        else:
+            self.rlst = re.findall(r'^\s+(.*)\s\?', gr, re.M|re.I)
+            
+        for rt in self.rlst:
+            pid = rt.split(' ')
+            if pid[0] != '':
+                print 'kill pltD, pid=' + pid[0]
+                stdin, stdout, stderr = self.sh.exec_command('kill ' + pid[0])
+                stdin, stdout, stderr = self.sh.exec_command('kill ' + pid[0])
+        
+        if (len(gr) > 0) and (gr[0] != ' '):
+            self.rlst = re.findall(r'^(.*)\spts', gr, re.M|re.I)
+        else:
+            self.plst = re.findall(r'^\s+(.*)\spts', gr, re.M|re.I)
+        
+        for rt in self.rlst:
+            pid = rt.split(' ')
+            if pid[0] != '':
+                print 'kill iperf, pid=' + pid[0]
+                stdin, stdout, stderr = self.sh.exec_command('kill ' + pid[0])
+                stdin, stdout, stderr = self.sh.exec_command('kill ' + pid[0])
+        
+    
+    """
+    def checkUbootenvFile(self):
+        
+        self.tn_write(self.pp_base, 'cd /usr/bin')
+        self.tn_write(self.pp_base, 'ls /mnt/app/* | grep ubootenv')
+        res = self.tn.read_until('#'.encode("ascii"), 3)
+        #print res
+        start = res.find("/mnt/app/ubootenv".encode("ascii"), 0)
+        
+        if (start >= 0):
+            print 'found uboot env file'
+        else:
+            print 'create initial uboot env file'
+            self.tn_write(self.pp_base, 'touch ' + self.uboot_file)
+            self.tn_write(self.pp_base, 'chmod 777 ' + self.uboot_file)
+            self.setUbootenvParameters()
+            self.tn_write(self.pp_base, 'fsetenv mk_ubootenv 1', 3)
+            
+    def setUbootenvParameters(self):
+        
+        self.tn_write(self.pp_base, 'touch ' + self.uboot_file)
+        self.wrUbootenvLine('ATTEN1', str(self.cfg.attn1))
+        self.wrUbootenvLine('ATTEN2', str(self.cfg.attn2))
+        self.wrUbootenvLine('BW', str(self.cfg.cal_bandwidth))
+        self.wrUbootenvLine('EARFCN', '0')
+        self.wrUbootenvLine('GAIN1', str(self.cfg.gain1))
+        self.wrUbootenvLine('GAIN2', str(self.cfg.gain2))
+        self.wrUbootenvLine('LOGDISPEN', '2')
+        self.wrUbootenvLine('LOGDISPPORT', str(self.cfg.my_udp_port))
+        self.wrUbootenvLine('LOGPARSERIP', str(self.cfg.my_udp_ipaddr))
+        self.wrUbootenvLine('MODE', 'pltd')
+        self.wrUbootenvLine('OVRDRFDSP', '1')
+        self.wrUbootenvLine('PWMREGHIGH', '23456')
+        self.wrUbootenvLine('PWMREGLOW', '37376')
+        self.wrUbootenvLine('RFTARGET', 'zen')
+        self.wrUbootenvLine('RSSI_OFFSET_PRIM', '0')
+        self.wrUbootenvLine('RSSI_OFFSET_SEC', '0')
+        self.wrUbootenvLine('RSSI_SLOPE_PRIM', '0')
+        self.wrUbootenvLine('RSSI_SLOPE_SEC', '0')
+        self.wrUbootenvLine('RXFREQ', str(test_config.ul_freq))
+        self.wrUbootenvLine('SEBYPASS', '0')
+        self.wrUbootenvLine('STARTAPP', '0')
+        self.wrUbootenvLine('TCXO', 'pwm')
+        self.wrUbootenvLine('TXFREQ', str(test_config.dl_freq))
+        self.wrUbootenvLine('TX1_I_OFFSET', '0')
+        self.wrUbootenvLine('TX1_Q_OFFSET', '0')
+        self.wrUbootenvLine('TX2_I_OFFSET', '0')
+        self.wrUbootenvLine('TX2_Q_OFFSET', '0')
+        self.wrUbootenvLine('TX_OFFSET_PRIM', '0')
+        self.wrUbootenvLine('TX_OFFSET_SEC', '0')
+        self.wrUbootenvLine('TX_SLOPE_PRIM', '0')
+        self.wrUbootenvLine('TX_SLOPE_SEC', '0')
+        
+    def wrUbootenvLine(self, param, value):
+        
+        self.tn_write(self.pp_base, 'echo \'' + param + '=\"' \
+                      + value + '\"\' >> ' + self.uboot_file)
+    """
+    
+def main():
+
+    enb = enodeB_Ctrl()
+    
+    enb.start_telnet_session()
+    enb.enb_login()
+    enb.get_macaddr()
+    enb.enb_set_1pps()
+    
+    enb.enb_cd_usr_bin()
+    enb.enb_load_rf_drv()
+    enb.enb_load_rf_init()
+    
+    #temp = enb.enb_get_temperature()
+    #print "temp = " + temp
+    
+    enb.enb_set_rf_drv_big_rf_board()
+    
+    enb.enb_cd_etc()
+    enb.enb_load_dsp_to_etc()
+    
+    enb.enb_cd_tmpfs()
+    enb.enb_load_LSM_X_L1_0_July10()
+    enb.enb_set_dsp_app_dl()
+    enb.enb_set_7ffeff00()
+    
+    enb.enb_cleanup_tmpfs_partition()
+    enb.enb_cd_tmpfs()
+    enb.enb_load_LSM_X_TV_0_wk21_00_ETM()
+    enb.enb_run_dsp_app_dl()
+    sleep(3)
+    
+    enb.end_telnet_session()
+    return 0
+    
+if (__name__ == "__main__"):
+    main()
diff --git a/octal/cavium_env/rf_card_cal_tip/enodeb_ctrl.pyc b/octal/cavium_env/rf_card_cal_tip/enodeb_ctrl.pyc
new file mode 100644
index 0000000000..fe54135d7e
Binary files /dev/null and b/octal/cavium_env/rf_card_cal_tip/enodeb_ctrl.pyc differ
diff --git a/octal/cavium_env/rf_card_cal_tip/eutra_bands.py b/octal/cavium_env/rf_card_cal_tip/eutra_bands.py
new file mode 100644
index 0000000000..0bda04cfec
--- /dev/null
+++ b/octal/cavium_env/rf_card_cal_tip/eutra_bands.py
@@ -0,0 +1,169 @@
+#!/usr/bin/env python
+
+from types import TypeType
+
+class Band(object):
+    @staticmethod
+    def containsBand(eutra_band):
+        return 0
+    def dl_freq(self):
+        return (0, 0, 0)    # (low, middle, high)
+    def ul_freq(self):
+        return (0, 0, 0)
+    
+class Band_1(Band):
+    @staticmethod
+    def containsBand(eutra_band):
+        return eutra_band in ["band1", 1]
+    def dl_freq(self):
+        return (2110, 2140, 2170)
+    def ul_freq(self):
+        return (1920, 1950, 1980)
+        
+class Band_3(Band):
+    @staticmethod
+    def containsBand(eutra_band):
+        return eutra_band in ["band3", 3]
+    def dl_freq(self):
+        return (1805, 1842.5, 1880) # 1850, 1755
+    def ul_freq(self):
+        return (1710, 1747.5, 1785)
+        
+class Band_4(Band):
+    @staticmethod
+    def containsBand(eutra_band):
+        return eutra_band in ["band4", 4]
+    def dl_freq(self):
+        return (2110, 2132.5, 2155)
+    def ul_freq(self):
+        return (1710, 1732.5, 1755)
+    
+class Band_7(Band):
+    @staticmethod
+    def containsBand(eutra_band):
+        return eutra_band in ["band7", 7]
+    def dl_freq(self):
+        return (2620, 2655, 2690)
+    def ul_freq(self):
+        return (2500, 2535, 2570)
+    
+class Band_8(Band):
+    @staticmethod
+    def containsBand(eutra_band):
+        return eutra_band in ["band8", 8]
+    def dl_freq(self):
+        return (925, 942.5, 960)
+    def ul_freq(self):
+        return (880, 897.5, 915)
+    
+class Band_13(Band):
+    @staticmethod
+    def containsBand(eutra_band):
+        return eutra_band in ["band13", 13]
+    def dl_freq(self):
+        return (746, 751, 756)
+    def ul_freq(self):
+        return (777, 782, 787)
+    
+class Band_14(Band):
+    @staticmethod
+    def containsBand(eutra_band):
+        return eutra_band in ["band14", 14]
+    def dl_freq(self):
+        return (758, 763, 768)
+    def ul_freq(self):
+        return (788, 793, 798)
+    
+class Band_17(Band):
+    @staticmethod
+    def containsBand(eutra_band):
+        return eutra_band in ["band17", 17]
+    def dl_freq(self):
+        return (734, 740, 746)
+    def ul_freq(self):
+        return (704, 710, 716)
+
+class Band_25(Band):
+    @staticmethod
+    def containsBand(eutra_band):
+        return eutra_band in ["band25", 25]
+    def dl_freq(self):
+        return (1930, 1962, 1995)
+    def ul_freq(self):
+        return (1850, 1882, 1915)
+
+class Band_28(Band):
+    @staticmethod
+    def containsBand(eutra_band):
+        return eutra_band in ["band28", 28]
+    def dl_freq(self):
+        return (758, 780.5, 803)
+    def ul_freq(self):
+        return (703, 725.5, 748)
+
+class Band_38(Band):
+    @staticmethod
+    def containsBand(eutra_band):
+        return eutra_band in ["band38", 38]
+    def dl_freq(self):
+        return (2570, 2595, 2620) #2583, 2609, 2595
+    def ul_freq(self):
+        return (2570, 2595, 2620)
+
+class Band_40(Band):
+    @staticmethod
+    def containsBand(eutra_band):
+        return eutra_band in ["band40", 40]
+    def dl_freq(self):
+        return (2300, 2350, 2400)
+    def ul_freq(self):
+        return (2300, 2350, 2400)
+        
+class Band_41(Band):
+    @staticmethod
+    def containsBand(eutra_band):
+        return eutra_band in ["band41", 41]
+    def dl_freq(self):
+        return (2496, 2593, 2690)
+    def ul_freq(self):
+        return (2496, 2593, 2690)
+        
+class Band_42(Band):
+    @staticmethod
+    def containsBand(eutra_band):
+        return eutra_band in ["band42", 42]
+    def dl_freq(self):
+        return (3400, 3500, 3600)
+    def ul_freq(self):
+        return (3400, 3500, 3600)
+
+class Band_43(Band):
+    @staticmethod
+    def containsBand(eutra_band):
+        return eutra_band in ["band43", 43]
+    def dl_freq(self):
+        return (3600, 3650, 3800)
+    def ul_freq(self):
+        return (3600, 3650, 3800)
+   
+class BandFactory(object):
+    @staticmethod
+    def newBand(eutra_band):
+        # walk through all Band classes
+        bandClasses = [j for (i, j) in globals().iteritems() if isinstance(j, TypeType) and issubclass(j, Band)]
+        for bandClass in bandClasses :
+            if bandClass.containsBand(eutra_band):
+                return bandClass()
+        #if research was unsuccessful, raise an error
+        raise ValueError('No E-UTRA band containing "%s".' % eutra_band)
+    
+def main():
+    band = 4
+    mb = BandFactory().newBand(band)
+    dl_freq = mb.dl_freq()
+    ul_freq = mb.ul_freq()
+    print("Band=" + str(band) + " downlink=" + str(dl_freq[1]) + " uplink=" + str(ul_freq[1]))
+    
+if __name__ == "__main__":
+    main()
+    
diff --git a/octal/cavium_env/rf_card_cal_tip/eutra_bands.pyc b/octal/cavium_env/rf_card_cal_tip/eutra_bands.pyc
new file mode 100644
index 0000000000..aff45f2957
Binary files /dev/null and b/octal/cavium_env/rf_card_cal_tip/eutra_bands.pyc differ
diff --git a/octal/cavium_env/rf_card_cal_tip/eutra_earfcn.py b/octal/cavium_env/rf_card_cal_tip/eutra_earfcn.py
new file mode 100644
index 0000000000..3f260ad19f
--- /dev/null
+++ b/octal/cavium_env/rf_card_cal_tip/eutra_earfcn.py
@@ -0,0 +1,163 @@
+#!/usr/bin/python
+
+"""
+Fdownlink = FDL_Low + 0.1 (NDL - NDL_Offset) 
+Fuplink = FUL_Low + 0.1 (NUL - NUL_Offset) 
+
+where:
+NDL is downlink EARFCN
+NUL is uplink EARFCN
+NDL_Offset is offset used to calculate downlink EARFCN
+NUL_Offset is offset used to calculate uplink EARFCN
+"""
+class EutraEarfcn():
+    
+    def __init__(self):
+        
+        self.eutra_arr = {1:[2110, 2140, 2170, 0, 1920, 1950, 1980, 18000], 
+                          2:[1930, 1960, 1990, 600, 1850, 1880, 1910, 18600], 
+                          3:[1805, 1842.5, 1880, 1200, 1710, 1747.5, 1785, 19200], 
+                          4:[2110, 2132.5, 2155, 1950, 1710, 1732.5, 1755, 19950], 
+                          5:[869, 881.5, 894, 2400, 824, 836.5, 849, 20400], 
+                          6:[875, 880, 885, 2650, 830, 835, 840, 20650], 
+                          7:[2620, 2655, 2690, 2750, 2500, 2535, 2570, 20750], 
+                          8:[925, 942.5, 960, 3450, 880, 897.5, 915, 21450], 
+                          9:[1844.9, 1862.4, 1879.9, 3800, 1749.9, 1767.4, 1784.9, 21800],
+                          10:[2110, 2140, 2170, 4150, 1710, 1740, 1770, 22150], 
+                          11:[1475.9, 1485.9, 1495.9, 4750, 1427.9, 1437.9, 1447.9, 22750], 
+                          12:[729, 737.5, 746, 5010, 699, 707.5, 716, 23010], 
+                          13:[746, 751, 756, 5180, 777, 782, 787, 23180], 
+                          14:[758, 763, 768, 5280, 788, 793, 798, 23280], 
+                          17:[734, 740, 746, 5730, 704, 710, 716, 23730], 
+                          18:[860, 867.5, 875, 5850, 815, 822.5, 830, 23850],
+                          19:[875, 882.5, 890, 6000, 830, 837.5, 845, 24000], 
+                          20:[791, 806, 821, 6150, 832, 847, 862, 24150], 
+                          21:[1495.9, 1503.4, 1510.9, 6450, 1447.9, 1455.4, 1462.9, 24450], 
+                          22:[3510, 3550, 3590, 6600, 3410, 3450, 3490, 24600], 
+                          23:[2180, 2190, 2200, 7500, 2000, 2010, 2020, 25500], 
+                          24:[1525, 1542, 1559, 7700, 1626.5, 1643.5, 1660,5, 25700], 
+                          25:[1930, 1962.5, 1995, 8040, 1850, 1882.5, 1915, 26040],
+                          26:[859, 876.5, 894, 8690, 814, 831.5, 849, 26690], 
+                          27:[852, 860.5, 869, 9040, 807, 815.5, 824, 27040], 
+                          28:[758, 780.5, 803, 9210, 703, 725.5, 748, 27210], 
+                          30:[2350, 2355, 2360, 9770, 2305, 2310, 2315, 27660], 
+                          31:[462.5, 465, 467.5, 9870, 452.5, 455, 457.5, 27760], 
+                          33:[1900, 1910, 1920, 36000, 1900, 1910, 1920, 36000], 
+                          34:[2010, 2017.5, 2025, 36200, 2010, 2017.5, 2025, 36200], 
+                          35:[1850, 1880, 1910, 36350, 1850, 1880, 1910, 36350], 
+                          36:[1930, 1960, 1990, 36950, 1930, 1960, 1990, 36950], 
+                          37:[1910, 1920, 1930, 37550, 1910, 1920, 1930, 37550], 
+                          38:[2570, 2595, 2620, 37750, 2570, 2595, 2620, 37750],
+                          39:[1880, 1900, 1920, 38250, 1880, 1900, 1920, 38250], 
+                          40:[2300, 2350, 2400, 38650, 2300, 2350, 2400, 38650], 
+                          41:[2496, 2593, 2690, 39650, 2496, 2593, 2690, 39650], 
+                          42:[3400, 3500, 3600, 41590, 3400, 3500, 3600, 41590], 
+                          43:[3600, 3700, 3800, 43590, 3600, 3700, 3800, 43590], 
+                          44:[703, 753, 803, 45590, 703, 753, 803, 45590]}
+        
+    
+    def dl_freq2earfcn(self, band, freq):
+        
+        earfcn = -1
+        binf = self.eutra_arr[int(band)]
+        
+        fmin = binf[0]
+        fmax = binf[2]
+        if (float(freq) < fmin) or (float(freq) > fmax):
+            print "frequency not in this band"
+            #print "band=" + str(band) + " fmin=" + str(fmin) + " fmax=" + str(fmax)
+        else:
+            earfcn = int(10*(float(freq) - binf[0]) + binf[3])
+    
+        return earfcn
+    
+    def ul_freq2earfcn(self, band, freq):
+        
+        earfcn = -1
+        binf = self.eutra_arr.get(int(band))
+        
+        fmin = binf[4]
+        fmax = binf[6]
+        if (float(freq) < fmin) or (float(freq) > fmax):
+            print "frequency not in this band"
+        else:
+            earfcn = int(10*(float(freq) - binf[4]) + binf[7])
+            
+        return earfcn
+    
+    def dl_earfcn2freq(self, earfcn):
+    
+        freq = 0
+        for _, elem in self.eutra_arr.items():
+            
+            emin = elem[3]
+            emax = elem[3] + 10*(elem[2] - elem[0]) - 1
+            
+            if (int(earfcn) > emin) and (int(earfcn) < emax):
+                freq = elem[0] + 0.1*(int(earfcn) - elem[3])
+            
+        return freq
+    
+    def ul_earfcn2freq(self, earfcn):
+    
+        freq = 0
+        for _, elem in self.eutra_arr.items():
+            
+            emin = elem[7]
+            emax = elem[7] + 10*(elem[6] - elem[4]) - 1
+            
+            if (int(earfcn) > emin) and (int(earfcn) < emax):
+                freq = elem[4] + 0.1*(int(earfcn) - elem[7])
+            
+        return freq
+    
+    def get_middle_dl_earfcn(self, band):
+        
+        binf = self.eutra_arr[int(band)]
+        earfcn = 5*(binf[2] - binf[0]) + binf[3]
+        return earfcn
+    
+    def get_middle_ul_earfcn(self, band):
+        
+        binf = self.eutra_arr[int(band)]
+        earfcn = 5*(binf[6] - binf[4]) + binf[7]
+        return earfcn
+    
+def main():
+    
+    en = EutraEarfcn()
+    
+    while (True):
+        
+        print "1. DL freq to earfcn"
+        print "2. UL freq to earfcn"
+        print "3. DL earfcn to freq"
+        print "4. UL earfcn to freq"
+        print "q. Quit"
+        
+        op = raw_input("Select Calibration Option:")
+        
+        if (op == '1'):
+            band = raw_input("band:")
+            freq = raw_input("freq:")
+            print str(en.dl_freq2earfcn(band, freq))
+        elif (op == '2'):
+            band = raw_input("band:")
+            freq = raw_input("freq:")
+            print str(en.ul_freq2earfcn(band, freq))
+        elif (op == '3'):
+            earfcn = raw_input("earfcn:")
+            print str(en.dl_earfcn2freq(earfcn))
+        elif (op == '4'):
+            earfcn = raw_input("earfcn:")
+            print str(en.ul_earfcn2freq(earfcn)) 
+        elif (op == 'q'):
+            break
+        else:
+            break
+        
+    print "bye bye"
+
+if __name__ == "__main__":
+    main()
+    
\ No newline at end of file
diff --git a/octal/cavium_env/rf_card_cal_tip/eutra_earfcn.pyc b/octal/cavium_env/rf_card_cal_tip/eutra_earfcn.pyc
new file mode 100644
index 0000000000..88db884316
Binary files /dev/null and b/octal/cavium_env/rf_card_cal_tip/eutra_earfcn.pyc differ
diff --git a/octal/cavium_env/rf_card_cal_tip/im_calibration.py b/octal/cavium_env/rf_card_cal_tip/im_calibration.py
new file mode 100644
index 0000000000..b09f33e377
--- /dev/null
+++ b/octal/cavium_env/rf_card_cal_tip/im_calibration.py
@@ -0,0 +1,183 @@
+#!/usr/bin/python
+
+import tcp_client
+import enodeb_ctrl
+import test_config
+from time import sleep
+
+# global variable
+is_dsp_running = False              # DSP running indicator
+is_test_all = False                 # test all items
+pp_base = '>'   # prompt base for tn_write
+
+class Calibration(object):
+    
+    cfg = test_config.EnbConfig()
+    enb = enodeb_ctrl.enodeB_Ctrl()
+    
+    if (cfg.test_set == 'agilent'):
+        mxa = tcp_client.TcpClient(cfg.mxa_ipaddr, cfg.mxa_tcp_port)
+        exg = tcp_client.TcpClient(cfg.exg_ipaddr, cfg.exg_tcp_port)
+    elif (cfg.test_set == 'anritsu'):
+        mt8870a = tcp_client.TcpClient(cfg.mt8870a_ipaddr, cfg.mt8870a_tcp_port)
+    elif (cfg.test_set == 'rs'):
+        cmw500 = tcp_client.TcpClient(cfg.cmw500_ipaddr, cfg.cmw500_tcp_port)
+    
+    dl_freq = test_config.dl_freq
+    ul_freq = test_config.ul_freq
+    
+    def __init__(self, rpt_hndl, rec_num):
+        
+        self.rpt = rpt_hndl
+        self.rn = rec_num
+    
+    def exg_connect(self):
+
+        type(self).exg.tcp_connect()
+        sleep(1)
+    
+    def exg_init(self):
+        
+        type(self).exg.send_msg_to_server('*IDN?')
+        in_msg = type(self).exg.recv_msg_frm_server()
+        print('recv ' + type(self).cfg.exg_ipaddr + '= ' + in_msg)
+    
+    def exg_setup(self):
+        pass
+    
+    def mxa_connect(self):
+        
+        type(self).mxa.tcp_connect()
+        sleep(1)
+        
+    def mxa_init(self):
+        
+        if (type(self).cfg.instr_disp == True):
+            type(self).mxa.send_msg_to_server(":DISPlay:ENABle ON")
+        else: 
+            type(self).mxa.send_msg_to_server(":DISPlay:ENABle OFF")
+
+        type(self).mxa.send_msg_to_server('*RST')
+        type(self).mxa.send_msg_to_server('*IDN?')
+        in_msg = type(self).mxa.recv_msg_frm_server()
+        print('Instrument ID: ' + in_msg)     
+        
+    def mxa_pre_setup(self):
+        pass
+        
+    def mxa_setup(self, freq_center):
+        
+        type(self).mxa.send_msg_to_server(':INIT:CONT ON')
+        type(self).mxa.send_msg_to_server(':INST:SEL SA')
+        type(self).mxa.send_msg_to_server(':FREQ:CENT ' + 
+                                str(freq_center) + ' MHz')
+        type(self).mxa.send_msg_to_server(':FREQ:SPAN ' +
+                                str(type(self).cfg.cal_bandwidth+10) + ' MHz')
+        type(self).mxa.send_msg_to_server(':POW:ATT 30')
+        
+    def mt8870a_connect(self):
+
+        type(self).mt8870a.tcp_connect()
+        sleep(1)
+    
+    def mt8870a_init(self):
+        
+        type(self).mt8870a.send_msg_to_server('*IDN?')
+        in_msg = type(self).mt8870a.recv_msg_frm_server()
+        print('Instrument ID: ' + in_msg)
+        
+        print 'Instrument Setup...\n'
+        type(self).mt8870a.send_msg_to_server('SYST:LANG SCPI')
+        type(self).mt8870a.send_msg_to_server('INST SMALLCELL')
+        type(self).mt8870a.send_msg_to_server('INST:SYST 3GLTE_DL,ACT')
+        type(self).mt8870a.send_msg_to_server(':ROUT:PORT:CONN:DIR PORT3,PORT4')
+        
+    def mt8870a_pre_setup(self):
+        pass
+        
+    def mt8870a_setup(self, freq_center):
+        pass
+        
+    def cmw500_connect(self):
+        
+        type(self).cmw500.tcp_connect()
+        sleep(1)
+        
+    def cmw500_init(self):
+        type(self).cmw500.send_msg_to_server("*RST")
+        type(self).cmw500.send_msg_to_server("*IDN?")
+        in_msg = type(self).cmw500.recv_msg_frm_server()
+        print('Instrument ID: ' + in_msg)
+        
+        print 'Instrument Setup...\n'
+        if (type(self).cfg.instr_disp == True):
+            type(self).cmw500.send_msg_to_server("SYSTem:DISPlay:UPDate ON")
+            type(self).cmw500.send_msg_to_server("*GTL")
+        else: 
+            type(self).cmw500.send_msg_to_server("SYSTem:DISPlay:UPDate OFF")
+            type(self).cmw500.send_msg_to_server("*GTL")
+            
+        type(self).cmw500.send_msg_to_server("ROUTe:GPRF:GENerator:SCENario:SALone RFAC, TX1")
+        type(self).cmw500.send_msg_to_server("ROUTe:GPRF:MEASurement:SCENario:SALone RFAC, RX1")
+        type(self).cmw500.send_msg_to_server("ROUTe:LTE:MEAS:ENB:SCENario:SALone RFAC, RX1")
+        
+    def cmw500_pre_setup(self):
+        pass
+        
+    def cmw500_setup(self, freq_center):
+        pass
+        
+    def start_enodeb_tx(self):
+        # start enodeB
+        type(self).enb.start_telnet_session()
+        type(self).enb.enb_login()
+        type(self).enb.get_macaddr()
+        type(self).enb.enb_set_1pps()
+
+        type(self).enb.enb_cd_usr_bin()
+        type(self).enb.enb_load_rf_drv()
+        type(self).enb.enb_load_rf_init()
+
+        type(self).enb.enb_set_rf_drv_rf_card(test_config.dl_freq[0], test_config.ul_freq[0])
+        
+        if (type(self).cfg.board_typ == "zen_ad"):
+            print "load pwm clock control"
+            type(self).enb.enb_load_pwm()
+        else:
+            print "load dac clock control"
+            type(self).enb.enb_load_dac()      # do DAC control
+            
+        if test_config.band > 32:
+            type(self).enb.enb_set_zen_tdd_tx()
+            
+        type(self).enb.enb_cd_etc()
+        type(self).enb.enb_load_cazac()
+        type(self).enb.enb_load_calgrant()
+        
+        type(self).enb.enb_cd_tmpfs()
+        type(self).enb.enb_load_LSM_X_L1_0_July10()
+        type(self).enb.enb_load_dsp_app_dl()
+        type(self).enb.enb_set_dsp_app_dl()
+        type(self).enb.enb_set_7ffeff00()
+        
+        type(self).enb.enb_cleanup_tmpfs_partition()
+        type(self).enb.enb_cd_tmpfs()
+        type(self).enb.enb_load_dsp_app_dl()
+        type(self).enb.enb_load_LSM_X_TV_0_wk21_00_ETM()
+        type(self).enb.enb_run_dsp_app_etm1p1()
+        
+    def end_sys(self):
+        
+        print("")
+        #type(self).mxa.send_msg_to_server(":DISPlay:ENABle ON")       # turn on display
+        
+        if (self.cfg.test_set == 'agilent'):
+            type(self).exg.tcp_close()
+            type(self).mxa.tcp_close()
+        elif (self.cfg.test_set == 'anritsu'):
+            type(self).mt8870a.tcp_close()
+        elif (self.cfg.test_set == 'rs'):
+            type(self).cmw500.tcp_close()
+            
+        #type(self).enb.end_telnet_session()
+        
\ No newline at end of file
diff --git a/octal/cavium_env/rf_card_cal_tip/im_calibration.pyc b/octal/cavium_env/rf_card_cal_tip/im_calibration.pyc
new file mode 100644
index 0000000000..7b46289e71
Binary files /dev/null and b/octal/cavium_env/rf_card_cal_tip/im_calibration.pyc differ
diff --git a/octal/cavium_env/rf_card_cal_tip/main.py b/octal/cavium_env/rf_card_cal_tip/main.py
new file mode 100644
index 0000000000..7a75644dc3
--- /dev/null
+++ b/octal/cavium_env/rf_card_cal_tip/main.py
@@ -0,0 +1,1086 @@
+#!/usr/bin/python
+
+import os
+import sys
+import time
+import common
+import threading
+import cal_rx_rssi
+import cal_tx_pwr
+import cal_ref_clk_dac
+import cal_ref_clk_pwm
+import cal_ref_clk_dax
+import cal_freq_err_pwm
+import test_tx_evm
+import test_tx_cw
+import test_flatness
+import test_tx_cfr
+import cal_iq_offset
+import test_config
+import enodeb_ctrl
+import eutra_bands
+import eutra_earfcn
+import im_calibration
+import test_rx_sensitivity
+import cal_iq_offset_ms8870a
+import cal_iq_offset_cmw500
+import bb_testterm
+import bb_eeprom
+#from subprocess import Popen, PIPE, STDOUT
+
+if os.name == "nt":
+    import msvcrt
+else:
+    from select import select
+
+def input_with_timeout_sane(prompt, timeout, default):
+    """Read an input from the user or timeout"""
+    print prompt,
+    sys.stdout.flush()
+    rlist, _, _ = select([sys.stdin], [], [], timeout)
+    if rlist:
+        s = sys.stdin.readline().replace('\n','')
+    else:
+        s = default
+        print s
+    return s
+
+# msvcrt.getche not working in eclipse
+def input_with_timeout_windows(prompt, timeout, default): 
+    
+    start_time = time.time()
+    print prompt,
+    sys.stdout.flush()
+    input = ''
+    read_f = msvcrt.getche
+    input_check = msvcrt.kbhit
+    
+    if not sys.stdin.isatty( ):
+        read_f = lambda:sys.stdin.read(1)
+        input_check = lambda:True
+    
+    print 'time=' + str(time.time()) + ', start=' + str(start_time)
+    while True:
+        if input_check():
+            chr_or_str = read_f()
+            try:
+                if ord(chr_or_str) == 13: # enter_key
+                    break
+                elif ord(chr_or_str) >= 32: #space_char
+                    input += chr_or_str
+            except:
+                input = chr_or_str
+                break #read line,not char...    
+                
+        if len(input) == 0 and (time.time() - start_time) > timeout:
+            break
+        
+    if len(input) > 0:
+        return input
+    else:
+        return default
+
+class rfCardCal():
+    
+    def __init__(self):
+        
+        self.version = '2015.10.06'
+        self.dir_report = 'test_report'
+        self.default_sn = 'test'
+        self.mod = ''
+        self.earfcn_dl = 0
+        self.num_rec = 0
+        self.curr_rec_num = 0
+        self.ee_records = []
+        self.rec_exists = False
+        self.start_time = 0
+        self.elapsed_time = 0
+        self.report_name = ''
+        self.report_hndl = 0
+        self.retest_num = 3
+        self.telnet_retry = 20
+        self.cfg = test_config.EnbConfig()
+        self.enb = enodeb_ctrl.enodeB_Ctrl()
+    
+    def create_new_eeprom_record(self):
+        
+        self.enb.enb_cd_usr_bin()
+        
+        if (int(self.num_rec) == 0) or (int(self.num_rec) == 255):
+            self.enb.enb_eeprom_edit_header('wsn', self.sn)
+            self.enb.enb_eeprom_edit_header('wbt', str(self.cfg.eeprom_board_type))
+            self.enb.enb_eeprom_edit_header('wrt', str(self.cfg.eeprom_rfic_type))
+        
+        if (int(self.curr_rec_num) == 1) and \
+            ((int(self.num_rec) > 0) and (int(self.num_rec) < 255)):
+            pass
+        else:
+            self.enb.enb_eeprom_edit_rec_num('wnr', int(self.num_rec) + 1)
+        
+        self.enb.enb_eeprom_edit_record('wrv', self.curr_rec_num, '1') # record version
+        time.sleep(0.5)
+        print "write EEPROM EARFCN = " + str(self.earfcn_dl)
+        self.enb.enb_eeprom_edit_record('wed', self.curr_rec_num, str(self.earfcn_dl))
+        time.sleep(0.5)
+        
+        self.enb.enb_eeprom_edit_record('wtc', self.curr_rec_num, str(self.cfg.eeprom_tcxo_ctrl))
+        
+        #print "write EEPROM gain prim = " + str(self.cfg.gain1)
+        self.enb.enb_eeprom_edit_record('wrgp', self.curr_rec_num, str(self.cfg.gain1))
+        #print "write EEPROM gain sec = " + str(self.cfg.gain2)
+        self.enb.enb_eeprom_edit_record('wrgs', self.curr_rec_num, str(self.cfg.gain2))
+        #print "write EEPROM attn prim = " + str(self.cfg.attn1)
+        self.enb.enb_eeprom_edit_record('wtap', self.curr_rec_num, str(self.cfg.attn1))
+        #print "write EEPROM attn sec = " + str(self.cfg.attn2)
+        self.enb.enb_eeprom_edit_record('wtas', self.curr_rec_num, str(self.cfg.attn2))
+        time.sleep(0.5)
+                
+    def open_test_report(self, mydir):
+        
+        if (self.cfg.test_report == True) and \
+        ((self.cfg.board_typ == 'zen_ad') or (self.cfg.board_typ == 'zen_ak')):
+            """
+            if self.is_empty_eeprom() == False:
+                self.enb.enb_cd_usr_bin()
+                self.sn = self.enb.enb_eeprom_get_serial_num()
+                self.sn = self.sn.strip()
+                print "RF serial number: " + self.sn
+            else:
+                self.sn = raw_input("input RF card serial number: ")
+            """
+            
+            self.sn = self.default_sn
+            
+            self.report_name = self.sn.strip() + '_' + time.strftime("%Y%m%d") + '_' + time.strftime("%H%M%S") + '.txt'
+            self.report_name = './' + mydir + '/' + self.report_name
+            
+            self.report_hndl = open(self.report_name, "wb")
+            self.report_hndl.write(self.report_name + '\n')
+            self.report_hndl.write(time.strftime("%d/%m/%Y") + ' ' + time.strftime("%H:%M:%S") + '\n')
+            #self.report_hndl.write('bandwidth = ' + str(self.cfg.cal_bandwidth) + '\n')
+        
+    def close_test_report(self):
+        
+        if self.cfg.test_report == True:
+            self.report_hndl.close()
+        
+    def write_uboot_cal_variables(self):
+        
+        self.enb.enb_cd_usr_bin()
+        
+        """
+        self.enb.wr_ubootenv_bw(str(self.cfg.cal_bandwidth))
+        self.enb.wr_ubootenv_freq(str(test_config.dl_freq), \
+                                  str(test_config.ul_freq))
+        self.enb.wr_ubootenv_gain(str(self.cfg.gain1), str(self.cfg.gain2))
+        self.enb.wr_ubootenv_atten(str(self.cfg.attn1), str(self.cfg.attn2))
+        """
+        """
+        self.enb.tn_write(im_calibration.pp_base, "fsetenv mode pltd", 3)
+        self.enb.tn_write(im_calibration.pp_base, "fsetenv bootby tftp", 3)
+        self.enb.tn_write(im_calibration.pp_base, "fsetenv sebypass 0", 3)
+        self.enb.tn_write(im_calibration.pp_base, "fsetenv startapp 0", 3)
+        self.enb.tn_write(im_calibration.pp_base, "fsetenv ptpenable 0", 3)
+        self.enb.tn_write(im_calibration.pp_base, "fsetenv gpsenable 0", 3)
+        self.enb.tn_write(im_calibration.pp_base, "fsetenv swloadby tftp", 3)
+        """
+        print "set calibration variables..."
+        self.enb.tn_write(im_calibration.pp_base, "fsetenv mk_ubootenv 1", 3)
+        self.enb.tn_write(im_calibration.pp_base, "fsetenv bw " \
+                          + str(self.cfg.cal_bandwidth), 3)
+        self.enb.tn_write(im_calibration.pp_base, "fsetenv gain1 " \
+                          + str(self.cfg.gain1), 3)
+        self.enb.tn_write(im_calibration.pp_base, "fsetenv gain2 " \
+                          + str(self.cfg.gain2), 3)
+        self.enb.tn_write(im_calibration.pp_base, "fsetenv atten1 " \
+                          + str(self.cfg.attn1), 3)
+        self.enb.tn_write(im_calibration.pp_base, "fsetenv atten2 " \
+                          + str(self.cfg.attn2), 3)
+        self.enb.tn_write(im_calibration.pp_base, "fsetenv txfreq " \
+                          + str(test_config.dl_freq), 3)
+        self.enb.tn_write(im_calibration.pp_base, "fsetenv rxfreq " \
+                          + str(test_config.ul_freq), 3)
+        #self.enb.tn_write(im_calibration.pp_base, "fsetenv pwmreghigh 23456", 3)
+        #self.enb.tn_write(im_calibration.pp_base, "fsetenv pwmreglow 37376", 3)
+        
+        #self.enb.tn_write(im_calibration.pp_base, "fsetenv logdispen 2", 3)
+        #self.enb.tn_write(im_calibration.pp_base, "fsetenv logdispport " \
+        #                  + str(self.cfg.my_udp_port), 3)
+        #self.enb.tn_write(im_calibration.pp_base, "fsetenv logparserip " \
+        #                  + str(self.cfg.my_udp_ipaddr), 3)
+        """
+        self.enb.tn_write(im_calibration.pp_base, "fsetenv RSSI_OFFSET_PRIM 0", 3)
+        self.enb.tn_write(im_calibration.pp_base, "fsetenv RSSI_OFFSET_SEC 0", 3)
+        self.enb.tn_write(im_calibration.pp_base, "fsetenv RSSI_SLOPE_PRIM 0", 3)
+        self.enb.tn_write(im_calibration.pp_base, "fsetenv RSSI_SLOPE_SEC 0", 3)
+        
+        self.enb.tn_write(im_calibration.pp_base, "fsetenv TX1_I_OFFSET 0", 3)
+        self.enb.tn_write(im_calibration.pp_base, "fsetenv TX1_Q_OFFSET 0", 3)
+        self.enb.tn_write(im_calibration.pp_base, "fsetenv TX2_I_OFFSET 0", 3)
+        self.enb.tn_write(im_calibration.pp_base, "fsetenv TX2_Q_OFFSET 0", 3)
+        
+        self.enb.tn_write(im_calibration.pp_base, "fsetenv TX_OFFSET_PRIM 0", 3)
+        self.enb.tn_write(im_calibration.pp_base, "fsetenv TX_OFFSET_SEC 0", 3)
+        self.enb.tn_write(im_calibration.pp_base, "fsetenv TX_SLOPE_PRIM 0", 3)
+        self.enb.tn_write(im_calibration.pp_base, "fsetenv TX_SLOPE_SEC 0", 3)
+        """
+    def write_temp_ox_slope(self):
+        
+        if (test_config.band == 7) or (test_config.band == 38):
+            self.enb.enb_eeprom_edit_record('wtsx', self.curr_rec_num, "2.5")
+        elif (test_config.band == 4):
+            self.enb.enb_eeprom_edit_record('wtsx', self.curr_rec_num, "5")
+        else:
+            self.enb.enb_eeprom_edit_record('wtsx', self.curr_rec_num, "2.5")
+    
+    def write_reserved_eeprom_data(self):
+        
+        self.enb.enb_eeprom_edit_record('wtst', self.curr_rec_num, "0")
+        self.enb.enb_eeprom_edit_record('wtsr', self.curr_rec_num, "0")
+        self.enb.enb_eeprom_edit_record('wrtr', self.curr_rec_num, "0")
+        self.enb.enb_eeprom_edit_record('wtm', self.curr_rec_num, "0")
+            
+    def calibration_all(self):
+        
+        self.start_time = time.time()
+        
+        if (self.cfg.manual_switch_instr == True):
+            if (self.cfg.test_set == "agilent"):
+                common.hit_continue("Connect cable to EXG")
+            else:
+                common.hit_continue("Connect cable to MT8870A output port")
+        
+        # RSSI calibration
+        om = cal_rx_rssi.CalRxRssi(self.report_hndl, self.curr_rec_num)
+        om.enb.start_telnet_session()
+        om.run()
+        om.enb.end_telnet_session()
+        del om
+        
+        if (self.cfg.manual_switch_instr == True):
+            if (self.cfg.test_set == "agilent"):
+                common.hit_continue("Connect cable to MXA")
+            else:
+                common.hit_continue("Connect cable to MT8807A input port")
+        else:
+            time.sleep(2)   # avoid system exception error
+        
+        # Reference clock calibration
+        if (self.cfg.test_set == "agilent"):
+            if (self.cfg.board_typ == "refkit1"):
+                om = cal_ref_clk_dac.CalRefClk(self.report_hndl, self.curr_rec_num)
+            elif (self.cfg.board_typ == "zen_ad"):
+                if (self.cfg.tcxo_ctrl == "pwm"):
+                    om = cal_ref_clk_pwm.CalRefClk(self.report_hndl, self.curr_rec_num)
+                elif (self.cfg.tcxo_ctrl == "dax"):
+                    om = cal_ref_clk_dax.CalRefClkDax(self.report_hndl, self.curr_rec_num)
+            else:
+                print "board not supported"
+        else:
+            om = cal_freq_err_pwm.CalFreqErr(self.report_hndl, self.curr_rec_num)
+        
+        om.enb.start_telnet_session()
+        om.run()
+        om.enb.end_telnet_session()
+        del om
+        
+        # IQ DC offset calibration
+        if (self.cfg.test_set == 'agilent'):
+            om = cal_iq_offset.CalIQOffset(self.report_hndl, self.curr_rec_num)
+        elif (self.cfg.test_set == 'anritsu'):
+            om = cal_iq_offset_ms8870a.CalIQOffsetMT8870A(self.report_hndl, self.curr_rec_num)
+        elif (self.cfg.test_set == 'rs'):
+            om = cal_iq_offset_cmw500.CalIQOffsetCMW500(self.report_hndl, self.curr_rec_num)
+        
+        om.enb.start_telnet_session()
+        #time.sleep(2) #(5)
+        om.run()
+        om.enb.end_telnet_session()
+        
+        # TX output power calibration
+        om = cal_tx_pwr.CalTxPwr(self.report_hndl, self.curr_rec_num)
+        om.enb.start_telnet_session()
+        #time.sleep(2) #(5)
+        om.run()
+        om.enb.end_telnet_session()
+        
+        # TX EVM optimization
+        om = test_tx_evm.TestTxEvm(self.report_hndl, self.curr_rec_num)
+        om.enb.start_telnet_session()
+        #time.sleep(2) #(5)
+        om.run()
+        
+        # System reboot
+        om.enb.enb_reboot_in_dsp_run()
+        print "rebooting enodeB..."
+        im_calibration.is_dsp_running = False
+        time.sleep(2)
+        om.enb.end_telnet_session()
+        del om
+        
+        if self.cfg.do_sens_test_in_opt1 == True:
+            time.sleep(10)
+            om = test_rx_sensitivity.RxSens(self.report_hndl)
+            
+            for cnt in range(self.telnet_retry):
+                if (om.enb.start_telnet_session() == -1):
+                    #print "retry connect, count " + str(cnt + 1)
+                    time.sleep(5) #(10)
+                else:
+                    break
+                if (cnt == (self.telnet_retry - 1)):
+                    print "telnet connection fail"
+                    sys.exit()
+        
+        # RX sensitivity test
+        if (self.cfg.do_sens_test_in_opt1 == True):
+            
+            time.sleep(20)
+            if (self.cfg.manual_switch_instr == True):
+                if (self.cfg.test_set == "agilent"):
+                    common.hit_continue("Connect cable to EXG")
+                else:
+                    common.hit_continue("Connect cable to MT8870A output port")
+            
+            #om = test_rx_sensitivity.RxSens(self.report_hndl)
+            
+            om.enb.start_telnet_session() # for testing
+            
+            time.sleep(20) #5
+            om.run_limit_test()
+            #om.run()
+            
+            # System reboot
+            om.enb.enb_reboot_in_dsp_run2()
+            print "rebooting enodeB..."
+            im_calibration.is_dsp_running = False
+            time.sleep(2)
+        
+            om.enb.end_telnet_session()
+            #del om
+            time.sleep(5) #(20)
+        
+        self.elapsed_time = float(time.time() - self.start_time)
+        print "End of calibration test"
+        print "Elapsed time = %.2f [sec]" % self.elapsed_time
+        print ""
+        
+    def load_original_environment(self):
+        
+        self.enb.get_macaddr()
+        self.enb.enb_cd_usr_bin()
+        self.write_uboot_cal_variables()
+        
+    def is_ascii(self, mystring):
+        
+        try:
+            mystring.decode('ascii')
+        except UnicodeDecodeError:
+            return False
+        else:
+            return True
+        
+    def do_bb_eeprom_record_not_found(self, om):
+        
+        print ''
+        print 'baseboard serial number no found'
+        sn = raw_input("enter a serial number:")
+        om.enb.enb_bb_eeprom_edit_record('wsn', sn)
+        
+        answer = raw_input("write baseboard parameters from bb_eeprom?(y or n):")
+        if (answer == 'y') or (answer == 'Y'):
+            
+            print 'write data into baseboard...'
+            om.write_bb_eeprom()
+        else:
+            print 'skip writing other baseboard data'
+        
+    def check_bb_eeprom_record(self):
+        
+        self.enb.end_telnet_session()
+        time.sleep(2)
+        om = bb_eeprom.BBEepromAccess()
+        om.enb.start_telnet_session()
+        om.start_enodeb()
+        bbSerialNum = om.enb.enb_bb_eeprom_get_serial_number()
+        
+        if len(bbSerialNum) == 0:
+            self.do_bb_eeprom_record_not_found(om)
+        elif self.is_ascii(bbSerialNum[0]):
+            print 'baseboard serial number: ' + bbSerialNum
+        else:
+            self.do_bb_eeprom_record_not_found(om)
+        
+        om.enb.end_telnet_session()
+        time.sleep(2)
+        self.enb.start_telnet_session()
+        self.enb.enb_login()
+        
+    def get_eeprom_earfcn_list(self):
+        """
+        if self.cfg.en_eeprom_write == True:
+
+            self.num_rec = int(self.enb.enb_eeprom_get_record_num())
+            
+            if (self.num_rec > 0) and (self.num_rec < 255):
+                return self.enb.enb_eeprom_get_earfcn_dl()
+        """
+        pass
+        
+    def set_initial_frequency(self):
+        
+        if (self.cfg.cal_freq_arr[0][0] == 0) and (self.cfg.cal_freq_arr[0][1] == 0):
+            mb = eutra_bands.BandFactory.newBand(test_config.band)
+            test_config.dl_freq = mb.dl_freq()[1]
+            test_config.ul_freq = mb.ul_freq()[1]
+        else:
+            test_config.dl_freq = self.cfg.cal_freq_arr[0][0]
+            test_config.ul_freq = self.cfg.cal_freq_arr[0][1]
+        
+        print "DL freq. " + str(test_config.dl_freq) + " MHz"
+        print "UL freq. " + str(test_config.ul_freq) + " MHz"
+        print ""
+        
+    def is_empty_eeprom(self):
+        
+        res = False
+        if (self.num_rec == 0) or (self.num_rec == 255):
+            res = True
+        return res
+        
+    def is_dl_center_freq(self, band, dl_freq):
+        
+        res = False
+        ee = eutra_earfcn.EutraEarfcn()
+        earfcn_mid = ee.get_middle_dl_earfcn(test_config.band)
+        self.earfcn_dl = ee.dl_freq2earfcn(band, dl_freq)
+        print "current downlink EARFCN = " + str(self.earfcn_dl)
+        
+        if (earfcn_mid == self.earfcn_dl): res = True
+        return res
+        
+    def get_dl_center_freq(self, band):
+        
+        ee = eutra_earfcn.EutraEarfcn()
+        return ee.get_middle_dl_earfcn(band)
+        
+    def get_ul_center_freq(self, band):
+        
+        ee = eutra_earfcn.EutraEarfcn()
+        return ee.get_middle_ul_earfcn(band)
+        
+    def is_earfcn_record_exists_in_eeprom(self, band, dl_freq):
+        
+        self.rec_exists = False
+        rec_size = len(self.ee_records)
+        ee = eutra_earfcn.EutraEarfcn()
+        dl_earfcn = ee.dl_freq2earfcn(band, dl_freq)
+        
+        for cn in range(rec_size):
+            if (int(self.ee_records[cn][1]) == dl_earfcn):
+                self.rec_exists = True
+                self.curr_rec_num = cn + 1
+                break
+        
+        return self.rec_exists
+                        
+    def prepare_eeprom_record(self, band, dl_freq):
+        
+        if self.is_empty_eeprom() == True:
+            
+            # if not center channel, put a dummy record in 1st position
+            self.earfcn_dl = self.get_dl_center_freq(band)
+            self.curr_rec_num = 1
+            self.create_new_eeprom_record()
+            self.write_temp_ox_slope()
+            self.write_reserved_eeprom_data()
+            self.num_rec = 1
+                
+            if self.is_dl_center_freq(band, dl_freq) == False:
+                # custom DL/UL frequency
+                self.curr_rec_num = 2
+                self.create_new_eeprom_record()
+                self.write_temp_ox_slope()
+                self.write_reserved_eeprom_data()
+        else:
+            
+            if self.is_earfcn_record_exists_in_eeprom(band, dl_freq) == False:
+                
+                if self.is_dl_center_freq(band, dl_freq) == True:
+                    self.curr_rec_num = 1
+                    print "record one"
+                else:   # custom DL/UL frequency
+                    self.curr_rec_num = int(self.num_rec) + 1
+                    print "create a new EEPROM record"
+                    self.create_new_eeprom_record()
+                    self.write_temp_ox_slope()
+                    self.write_reserved_eeprom_data()
+            else:
+                # overwrite record
+                print "existing earfcn record"
+        
+    def find_eeprom_record(self):
+        
+        self.enb.start_telnet_session()
+        self.enb.enb_login()
+        self.enb.enb_cd_usr_bin()
+        self.ee_records = self.get_eeprom_earfcn_list()
+        self.prepare_eeprom_record(test_config.band, test_config.dl_freq)
+        self.enb.end_telnet_session()
+    
+        
+    def reboot_in_main_loop(self):
+        
+        self.enb.enb_reboot_in_dsp_run()
+        time.sleep(2)
+        self.enb.end_telnet_session()
+        time.sleep(20)
+        
+        for cnt in range(self.telnet_retry):
+            if (self.enb.start_telnet_session() == -1):
+                #print "count " + str(cnt + 1)
+                time.sleep(10)
+            else:
+                break
+            if (cnt == (self.telnet_retry - 1)):
+                print "telnet connection fail"
+                sys.exit()
+                
+        self.enb.enb_login()
+        
+    def run(self):
+        
+        self.enb.start_telnet_session()
+        self.enb.enb_login()
+        
+        """
+        # set up initial environment variables
+        print ''
+        prompt = 'set uboot from test_config?[y/n]:(n)'
+        timeout = 5
+        default = 'n'
+        
+        if os.name == 'posix':
+            wr_init_uboot_var = input_with_timeout_sane(prompt, timeout, default)
+        else:
+            ##wr_init_uboot_var = input_with_timeout_windows(prompt, timeout, default)
+            wr_init_uboot_var = raw_input("set uboot from test_config?(y/n):")
+            
+            #print prompt
+            #time.sleep(1)
+            #wr_init_uboot_var = 'y'
+            
+        if (wr_init_uboot_var == 'y') or (wr_init_uboot_var == 'Y'):
+            print "\nwrite initial uboot variables\n"
+            self.set_initial_frequency()
+            self.load_original_environment()
+            print "rebooting system..."
+            self.reboot_in_main_loop()
+        """ 
+        # check baseboard EEPROM record
+        #self.check_bb_eeprom_record()
+            
+        ## start calibraiton
+        #self.ee_records = self.get_eeprom_earfcn_list()
+        
+        # create report
+        if (not os.path.exists(self.dir_report)):
+            print("create report directory: " + self.dir_report)
+            os.system("mkdir " + self.dir_report)
+        
+        self.open_test_report(self.dir_report)
+        self.enb.end_telnet_session()
+        self.set_initial_frequency()    # for non-testall items
+            
+        # connect instruments
+        ic = im_calibration.Calibration(self.report_hndl, self.curr_rec_num)
+        try:
+            if (self.cfg.test_set == 'agilent'):
+                print "connecting agilent test set"
+                ic.exg_connect()
+                ic.exg_init()
+                ic.mxa_connect()
+                ic.mxa_init()
+                ic.mxa_setup(test_config.dl_freq)
+                
+            elif (self.cfg.test_set == 'anritsu'):
+                print "connecting anritsu test set"
+                ic.mt8870a_connect()
+                ic.mt8870a_init()
+                
+            elif (self.cfg.test_set == 'rs'):
+                print "connecting rs test set"
+                ic.cmw500_connect()
+                ic.cmw500_init()
+        except:
+            print "test equipment is not connected"
+        
+        while (True):
+            common.disp_test_title("Calibration Suite ver." + self.version)
+            
+            print("(1) Calibrate All Items")
+            print("(2) RX RSSI Calibration")
+            print("(3) Reference Clock Calibration")
+            print("(4) IQ Offset Calibration")
+            print("(5) TX Power Calibration")
+            print("(6) TX Power Optimization")
+            
+            if (self.cfg.test_set == 'agilent'):
+                print("(7) TX Transmit Test")
+                print("(8) TX CW Test")
+                
+            print("(9) RX Sensitivity Test")
+            print("(19) RX Continuous Test")
+            print("(10)Flatness Test")
+            print("(11)Baseboard Test")
+            print("(12)Load RF EEPROM to uboot")
+            print("(13)CFR Test")
+            print("(21)Read Baseboard EEPROM Data")
+            print("(22)Write Baseboard EEPROM Data")
+            print("(23)Erase Baseboard EEPROM Data")
+            print("(Q) Quit")
+            
+            self.mod = raw_input("Select Calibration Option:")
+            
+            if (self.mod == '1'):
+                
+                im_calibration.is_test_all = True
+                    
+                for ch in range(self.cfg.num_cal_channel):
+                    # change flag for u-boot writing
+                    if ch == 0:
+                        test_config.wr_var_to_uboot = True
+                    else:
+                        test_config.wr_var_to_uboot = False
+                    
+                    # assign current test frequencies
+                    if (ch != 0):
+                        test_config.dl_freq = self.cfg.cal_freq_arr[ch][0]
+                        test_config.ul_freq = self.cfg.cal_freq_arr[ch][1]
+                    
+                    self.report_hndl.write('\n*** Calibration #' + str(ch+1) + ' ***\n\n')
+                    self.report_hndl.write('DL Freq.' + str(test_config.dl_freq) + ' MHz\n')
+                    self.report_hndl.write('UL Freq.' + str(test_config.ul_freq) + ' MHz\n')
+                    
+                    # create or overwrite eeprom record
+                    self.enb.start_telnet_session()
+                    self.enb.enb_login()
+                    self.load_original_environment()
+                    self.enb.enb_cd_usr_bin()
+                    self.ee_records = self.get_eeprom_earfcn_list()
+                    self.prepare_eeprom_record(test_config.band, test_config.dl_freq)
+                    self.enb.end_telnet_session()
+                    
+                    # do calibration
+                    print "start calibration..."
+                    self.calibration_all()
+                    print ""
+                    
+                    if (self.report_hndl != None): 
+                        self.report_hndl.flush()
+                    
+                im_calibration.is_dsp_running = False
+                im_calibration.is_test_all = False
+
+            elif (self.mod == '2'):
+                
+                self.find_eeprom_record();
+                om = cal_rx_rssi.CalRxRssi(self.report_hndl, self.curr_rec_num)
+                om.enb.start_telnet_session()
+                om.run()
+                time.sleep(2)
+                
+                om.enb.enb_reboot_in_dsp_run()
+                print "rebooting enodeB..."
+                im_calibration.is_dsp_running = False
+                time.sleep(2)
+                
+                om.enb.end_telnet_session()
+                print "End of RSSI calibration"
+                #del om
+                
+            elif (self.mod == '3'):        
+                        
+                self.find_eeprom_record();
+                if (self.cfg.test_set == 'agilent'):
+
+                    if (self.cfg.board_typ == "refkit1"):
+                        om = cal_ref_clk_dac.CalRefClk(self.report_hndl, self.curr_rec_num)
+                    elif (self.cfg.board_typ == "zen_ad"):
+                        if (self.cfg.tcxo_ctrl == "pwm"):
+                            om = cal_ref_clk_pwm.CalRefClk(self.report_hndl, self.curr_rec_num)
+                        elif (self.cfg.tcxo_ctrl == "dax"):
+                            om = cal_ref_clk_dax.CalRefClkDax(self.report_hndl, self.curr_rec_num)
+                    else:
+                        print "board not supported"
+                        continue
+                    
+                elif (self.cfg.test_set == 'anritsu'):
+                    om = cal_freq_err_pwm.CalFreqErr(self.report_hndl, self.curr_rec_num)
+                elif (self.cfg.test_set == 'rs'):
+                    om = cal_freq_err_pwm.CalFreqErr(self.report_hndl, self.curr_rec_num)
+                    
+                om.enb.start_telnet_session()
+                om.run()
+                """
+                om.enb.enb_reboot_in_dsp_run()
+                print "rebooting enodeB..."
+                im_calibration.is_dsp_running = False
+                time.sleep(2)
+                om.enb.end_telnet_session()
+                print "End of Reference Clock calibration"
+                #del om
+                """
+            elif (self.mod == '4'):
+                
+                self.find_eeprom_record();
+                if (self.cfg.test_set == 'agilent'):
+                    om = cal_iq_offset.CalIQOffset(self.report_hndl, self.curr_rec_num)
+                elif (self.cfg.test_set == 'anritsu'):
+                    om = cal_iq_offset_ms8870a.CalIQOffsetMT8870A(self.report_hndl, self.curr_rec_num)
+                elif (self.cfg.test_set == 'rs'):
+                    om = cal_iq_offset_cmw500.CalIQOffsetCMW500(self.report_hndl, self.curr_rec_num)
+                
+                om.enb.start_telnet_session()
+                om.run()
+                
+                om.enb.enb_reboot_in_dsp_run()
+                print "rebooting enodeB..."
+                im_calibration.is_dsp_running = False
+                time.sleep(2)
+                om.enb.end_telnet_session()
+                print "End of IQ Offset calibration"
+                #del om
+                
+            elif (self.mod == '5'):
+                
+                self.find_eeprom_record();
+                om = cal_tx_pwr.CalTxPwr(self.report_hndl, self.curr_rec_num)
+                om.enb.start_telnet_session()
+                om.run()
+                
+                om.enb.enb_reboot_in_dsp_run()
+                print "rebooting enodeB..."
+                im_calibration.is_dsp_running = False
+                time.sleep(2)
+                om.enb.end_telnet_session()
+                print "End of TX Power calibration"
+                #del om
+                
+            elif (self.mod == '6'):
+                
+                self.find_eeprom_record();
+                om = test_tx_evm.TestTxEvm(self.report_hndl, self.curr_rec_num)
+                om.enb.start_telnet_session()
+                om.run()
+                
+                om.enb.enb_reboot_in_dsp_run()
+                print "rebooting enodeB..."
+                im_calibration.is_dsp_running = False
+                time.sleep(2)
+                om.enb.end_telnet_session()
+                print "End of TX power optimization"
+                #del om
+                
+            elif (self.mod == '7'):
+                
+                om = cal_tx_pwr.CalTxPwr(self.report_hndl, self.curr_rec_num)
+                om.enb.start_telnet_session()
+                om.tx_test()
+                
+                om.enb.enb_reboot_in_dsp_run()
+                print "rebooting enodeB..."
+                im_calibration.is_dsp_running = False
+                
+                time.sleep(2)
+                om.enb.end_telnet_session()
+                
+                print "End of TX Power Test"
+                #del om
+                
+            elif (self.mod == '8'):
+                
+                om = test_tx_cw.TestTxCw(self.report_hndl)
+                om.enb.start_telnet_session()
+                om.run()
+                
+                om.enb.enb_reboot_in_dsp_run()
+                print "rebooting enodeB..."
+                im_calibration.is_dsp_running = False
+                time.sleep(2)
+                om.enb.end_telnet_session()
+                print "End of TX CW Test"
+                #del om
+                
+            elif (self.mod == '9'):
+                
+                self.start_time = time.time()
+                om = test_rx_sensitivity.RxSens(self.report_hndl)
+                
+                om.enb.start_telnet_session()
+                om.run()
+                #om.run_limit_test()
+                
+                self.elapsed_time = float(time.time() - self.start_time)
+                print "End of RX Sensitivity Test"
+                print "Elapsed time = %.2f [sec]" % self.elapsed_time
+                print ""
+                
+                om.enb.enb_reboot_in_dsp_run2()
+                #print "rebooting enodeB..."
+                im_calibration.is_dsp_running = False
+                time.sleep(2)
+                om.enb.end_telnet_session()
+                #del om
+                
+            elif (self.mod == '19'):
+                
+                self.start_time = time.time()
+                om = test_rx_sensitivity.RxSens(self.report_hndl)
+                
+                om.enb.start_telnet_session()
+                om.run_continuous()
+                
+                self.elapsed_time = float(time.time() - self.start_time)
+                print "End of RX Continues Test"
+                print "Elapsed time = %.2f [sec]" % self.elapsed_time
+                print ""
+                
+                om.enb.enb_reboot_in_dsp_run2()
+                #print "rebooting enodeB..."
+                im_calibration.is_dsp_running = False
+                time.sleep(2)
+                om.enb.end_telnet_session()
+                #del om
+                
+            elif (self.mod == '10'):
+                
+                self.flatness_dl_freq = 0
+                self.flatness_dl_freq = 0
+                flatness_bw = [5, 10, 20]; # wanted testing bandwidth
+                self.start_time = time.time()
+                mb = eutra_bands.BandFactory.newBand(test_config.band)
+                
+                for bw in flatness_bw:
+                    
+                    for ft in range(0, 3):
+                        
+                        if (self.report_hndl != None):
+                            print '\nBandwidth ' + str(bw) + ' MHz, test ' + str(ft+1) + '\n'
+                            self.report_hndl.write('\n*** Bandwidth ' + str(bw) + 
+                                                   ' MHz, test ' + str(ft+1) + ' ***\n\n')
+                        
+                        
+                        #TODO: duplicate code in this section
+                        om = test_flatness.TestFlatness(self.report_hndl, bw,
+                                                        self.flatness_dl_freq)
+                            
+                        for cnt in range(self.telnet_retry):
+                            if (om.enb.start_telnet_session() == -1):
+                                time.sleep(10)
+                            else:
+                                break
+                            if (cnt == (self.telnet_retry - 1)):
+                                print "telnet connection no ready"
+                                sys.exit()
+                        time.sleep(15) # time from connect to login
+                        om.enb.enb_login()
+                        #End
+                        
+                        # Write uboot variables
+                        if (ft == 0):
+                            self.flatness_dl_freq = mb.dl_freq()[ft] + bw/2
+                            self.flatness_ul_freq = mb.ul_freq()[ft] + bw/2
+                        elif (ft == 2):
+                            self.flatness_dl_freq = mb.dl_freq()[ft] - bw/2
+                            self.flatness_ul_freq = mb.ul_freq()[ft] - bw/2
+                        else:
+                            self.flatness_dl_freq = mb.dl_freq()[ft]
+                            self.flatness_ul_freq = mb.ul_freq()[ft]
+                        
+                        print "\nwrite current testing variable...\n"
+                        om.enb.wr_ubootenv_bw(bw)
+                        om.enb.wr_ubootenv_freq(self.flatness_dl_freq, \
+                                                self.flatness_ul_freq)
+                        
+                        """
+                        om.enb.tn_write(im_calibration.pp_base, "fsetenv bw " \
+                                        + str(bw), 3)
+                        om.enb.tn_write(im_calibration.pp_base, "fsetenv txfreq " \
+                                        + str(self.flatness_dl_freq), 3)
+                        om.enb.tn_write(im_calibration.pp_base, "fsetenv rxfreq " \
+                                        + str(self.flatness_ul_freq), 3)
+                        """
+                        
+                        # System reboot
+                        time.sleep(2) # wait for writing uboot
+                        om.enb.enb_reboot_in_dsp_run()
+                        print "rebooting enodeB..."
+                        #im_calibration.is_dsp_running = False
+                        time.sleep(2)
+                        om.enb.end_telnet_session()
+                        del om
+                        
+                        om = test_flatness.TestFlatness(self.report_hndl, bw,
+                                                        self.flatness_dl_freq)
+                            
+                        for cnt in range(self.telnet_retry):
+                            if (om.enb.start_telnet_session() == -1):
+                                time.sleep(10)
+                            else:
+                                break
+                            if (cnt == (self.telnet_retry - 1)):
+                                print "telnet connection no ready"
+                                sys.exit()
+                        time.sleep(20) # time from connet to login
+                        om.run()
+                        
+                        om.enb.enb_reboot_in_dsp_run()
+                        print "rebooting enodeB..."
+                        #im_calibration.is_dsp_running = False
+                        time.sleep(2)
+                        om.enb.end_telnet_session()
+                        del om
+                        
+                self.elapsed_time = float(time.time() - self.start_time)
+                print "End of Transmit Flatness Test"
+                print "Elapsed time = %.2f [sec]" % self.elapsed_time
+                print ""
+                
+            elif (self.mod == '11'):
+                
+                if os.name == 'nt':
+                    print "OS = Windows"
+                elif os.name == 'posix':
+                    print "OS = Linux"
+                else:
+                    raise "Sorry no implementation for your platform (%s) available." % sys.platform
+                
+                common.hit_continue("please close serial comm program (ie. minicom)")
+                tt = bb_testterm.TestTerm(os.name)
+                tt.run()
+                del tt
+                print "End of baseboard Test"
+                
+            elif (self.mod == '12'):
+                
+                self.enb.start_telnet_session()
+                self.enb.enb_login()
+                self.enb.enb_cd_usr_bin()
+                #print "load RF driver"
+                #self.enb.enb_load_rf_drv()
+
+                self.enb.enb_eeprom_to_uboot()
+                
+                self.enb.enb_reboot_in_dsp_run()
+                print "rebooting enodeB..."
+                time.sleep(2)
+                self.enb.end_telnet_session()
+                
+            elif (self.mod == '13'):
+                # add CFR parameters here
+                self.ch_gain_val = ['0x1', '0x0']
+                self.rf_gain_val = ['0x20002000', '0x00220033']
+                self.rf_shift_sat_val = ['0x00440033', '0x20002000', '0x1D001D00']
+                
+                if (self.report_hndl != None):
+                    print '\nCFR Test'
+                    self.report_hndl.write('\n*** CFR Test ***\n')
+                    self.report_hndl.write('\n*** Bandwidth ' + \
+                            str(self.cfg.cal_bandwidth) + ' MHz+ ***\n\n')
+                else:
+                    print 'file open error'
+                    sys.exit()
+                
+                self.start_time = time.time()
+                
+                for cg in self.ch_gain_val:
+                    for rg in self.rf_gain_val:
+                        for rs in self.rf_shift_sat_val:
+                            
+                            om = test_tx_cfr.TestTxCfr(self.report_hndl, cg, rg, rs)
+                            for cnt in range(self.telnet_retry):
+                                if (om.enb.start_telnet_session() == -1):
+                                    time.sleep(10)
+                                else:
+                                    break
+                                if (cnt == (self.telnet_retry - 1)):
+                                    print "telnet connection no ready"
+                                    sys.exit()
+                            time.sleep(15) # time from connect to login
+                            #om.enb.enb_login()
+                            om.run()
+                            
+                            # System reboot
+                            time.sleep(2) # wait for writing uboot
+                            om.enb.enb_reboot_in_dsp_run()
+                            print "rebooting enodeB..."
+                            #im_calibration.is_dsp_running = False
+                            time.sleep(2)
+                            om.enb.end_telnet_session()
+                            del om
+                
+                self.elapsed_time = float(time.time() - self.start_time)
+                print "End of Transmit CFR Test"
+                print "Elapsed time = %.2f [sec]" % self.elapsed_time
+                print ""
+                
+            elif (self.mod == '21'):
+                
+                print 'read baseboard data'
+                om = bb_eeprom.BBEepromAccess()
+                om.enb.start_telnet_session()
+                om.start_enodeb()
+                om.read_bb_eeprom()
+                om.enb.end_telnet_session()
+                
+            elif (self.mod == '22'):
+                
+                print 'write baseboard data'
+                om = bb_eeprom.BBEepromAccess()
+                om.enb.start_telnet_session()
+                om.start_enodeb()
+                om.write_bb_eeprom()
+                om.enb.end_telnet_session()
+                
+            elif (self.mod == '23'):
+                
+                om = bb_eeprom.BBEepromAccess()
+                om.enb.start_telnet_session()
+                om.start_enodeb()
+                om.erase_bb_eeprom()
+                om.enb.end_telnet_session()
+                
+            elif (self.mod == 'q') or (self.mod == 'Q'):
+                break
+            
+            else:
+                print "unknown option"
+                continue
+        
+        if (self.report_hndl != None): 
+            self.report_hndl.flush()
+            self.close_test_report()
+            
+        #ic.end_sys()
+        
+    def do_test(self, o_item):
+        
+        o_item.enb.start_telnet_session()
+        o_item.run()
+        
+        o_item.enb.enb_reboot_in_dsp_run()
+        time.sleep(2)
+        o_item.enb.end_telnet_session()
+        print "rebooting enodeB..."
+        time.sleep(self.reboot_wait)
+                
+def main():
+
+    mn = rfCardCal()
+    mn.run()
+    print "\nEnd of RF Card Calibration"
+    sys.exit()
+
+if (__name__ == "__main__"):
+    main()
diff --git a/octal/cavium_env/rf_card_cal_tip/tcp_client.py b/octal/cavium_env/rf_card_cal_tip/tcp_client.py
new file mode 100644
index 0000000000..6ca005c679
--- /dev/null
+++ b/octal/cavium_env/rf_card_cal_tip/tcp_client.py
@@ -0,0 +1,86 @@
+#!/usr/bin/env python
+
+import sys
+import socket
+from time import sleep
+
+
+class TcpClient():
+
+    def __init__(self, host_ip, host_port):
+        
+        self.host_ip = host_ip
+        self.host_port = host_port
+        self.in_msg = ""
+        self.out_msg = ""
+        self.sock = None
+        self.recv_buf_size = 2048
+        
+        try:
+            self.sock = socket.socket(socket.AF_INET, socket.SOCK_STREAM)
+            self.sock.setsockopt(socket.SOL_SOCKET, socket.SO_REUSEADDR, 1)
+            self.sock.settimeout(10)
+            print("tcp socket ok")
+        except socket.error, msg:
+            sys.stderr.write("[ERROR] %s\n" % msg[1])
+            raise
+        
+    def tcp_connect(self):
+        
+        if (self.sock != None):
+            try:
+                self.sock.connect((self.host_ip, self.host_port))
+                print("tcp connect ok")
+            except socket.error, msg:
+                sys.stderr.write("[ERROR] %s\n" % msg[1])
+                raise
+        else:
+            print(self.host_ip + ": " + "skip tcp connect")
+        
+    def send_msg_to_server(self, message):
+        self.out_msg = message
+        nsend = self.sock.send(self.out_msg + '\n')
+        if (nsend > 0):
+            #print('sent '+ self.host_ip + '= ' + self.out_msg)
+            pass
+        
+    def recv_msg_frm_server(self):
+        self.in_msg = ""
+        self.in_msg = self.sock.recv(self.recv_buf_size)
+        
+        return self.in_msg
+
+    def tcp_close(self):
+        self.sock.close()
+        print(self.host_ip + " close tcp socket")
+        
+def main():
+    # test exg
+    HOST = '192.168.51.204'
+    PORT = 5025
+    
+    MSG1 = '*IDN?'
+    MSG2 = ':FREQ:CENT 2125 MHz'
+    MSG3A = ':POW -'
+    MSG3B = ' dBm'
+    
+    tcpc = TcpClient(HOST, PORT)
+    tcpc.tcp_connect()
+    sleep(1)
+    tcpc.send_msg_to_server(MSG1)
+    in_msg = tcpc.recv_msg_frm_server()
+    print('recv ' + tcpc.host_ip + '= ' + in_msg)
+    
+    tcpc.send_msg_to_server(MSG2)
+    
+    for cnt in range(5):
+        tcpc.send_msg_to_server(MSG3A + str(cnt*10 + 20) + MSG3B)
+        sleep(2)
+    
+    tcpc.tcp_close()
+    print("\nend of tcp_client")
+    
+    return 0
+    
+if (__name__ == "__main__"):
+    main()
diff --git a/octal/cavium_env/rf_card_cal_tip/tcp_client.pyc b/octal/cavium_env/rf_card_cal_tip/tcp_client.pyc
new file mode 100644
index 0000000000..9d805c197a
Binary files /dev/null and b/octal/cavium_env/rf_card_cal_tip/tcp_client.pyc differ
diff --git a/octal/cavium_env/rf_card_cal_tip/test_config.py b/octal/cavium_env/rf_card_cal_tip/test_config.py
new file mode 100644
index 0000000000..e14af49322
--- /dev/null
+++ b/octal/cavium_env/rf_card_cal_tip/test_config.py
@@ -0,0 +1,371 @@
+#!/usr/bin/env python
+
+"""
+description: test configuration
+"""
+
+import os
+import sys
+
+# band, frequency setting:
+# keep zero if select band later and use middle channel to test
+# fill target band and frequency for custom setting
+band = 0                            # DUT band
+dl_freq = 0                         # current downlink frequency
+ul_freq = 0                         # current uplink frequency
+wr_var_to_uboot = False             # T: write variable to uboot; F: don't write
+
+class EnbConfig():
+    
+    def __init__(self):
+        
+        self.num_cal_channel = 0    # number of calibration channels
+        self.dl_freq_arr = []       # list of downlink frequencies
+        self.ul_freq_arr = []       # list of uplink frequencies
+        self.cal_freq_arr = []      # list of calibration freq pair
+        
+        self.cfg_file = 'test_config.txt'
+        
+        self.board_typ = 'zen_ad'   # board type [refkit1, zen_ad, zen_ak]
+        self.cal_bandwidth = 20     # calibration bandwidth in mhz [10, 20]
+        self.tcxo_ctrl = 'pwm'      # tcxo control type [pwm, dac, dax]
+        
+        self.attn1 = 13             # port 1 attenuation
+        self.attn2 = 13             # port 2 attenuation
+        self.gain1 = 35             # port 1 gain [dB]
+        self.gain2 = 35             # port 2 gain [dB]
+        
+        self.login_pwd = ''         # root login password
+        self.enb_ipaddr = '10.18.104.61' #'192.168.166.61'      # enodeB IP address
+        self.enb_tn_port = 23                   # enodeB telnet port
+        self.tftp_server_ip = '10.18.104.240'   #'192.168.166.202' # tftp server IP address
+        self.rssi_cable_loss = 5                # cable loss for RSSI test
+        self.txpwr_cable_loss = 5               # cable loss for TX test
+        self.manual_switch_instr = True         # enable/disable wait for switch cable
+        
+        self.test_set='rs'          # test set type [agilent, anritsu, rs]
+        
+        # agilent test set
+        self.exg_ipaddr = '192.168.166.201'     # EXG IP address
+        self.exg_tcp_port = 5025                # EXG TCP port
+        self.mxa_ipaddr = '192.168.166.203'      # MXA IP address
+        self.mxa_tcp_port = 5025                # MXA TCP port
+        
+        # anritsu test set
+        self.mt8870a_ipaddr = '192.168.166.201'
+        self.mt8870a_tcp_port = 56001
+        
+        # r&s test set
+        self.cmw500_ipaddr = '192.168.166.69'
+        self.cmw500_tcp_port = 5025
+        
+        # test files
+        self.rf_driver = 'cn_rfdriver'
+        self.rf_drv_init = 'rf_init.txt'
+        self.dsp_app_dl = 'pltD-dl'
+        self.dl_etm_test_vector = 'CAL_ETM_TV_20Mhz.tgz'
+        self.exg_waveform = '"ESG_TC0301_10M_LOW.DAT"'
+
+        # test criteria
+        self.max_atten = 25         # make the lowest TX power to start TX power test; 5 ~ 45
+        self.cr_txpwr_min = 11      # minimum TX output power limit
+        self.cr_txpwr_max = 22      # maximum TX output power limit
+        self.cr_txevm_max = 3.5     # maximum TX EVM limit
+        
+        # system variables
+        self.en_eeprom_write = True # disable when refkit1
+        self.eeprom_record_ver = 1  # EEPROM record version
+        self.test_report = True     # T: enable test report; F: disable
+        self.instr_disp = True      # T: enable instrument screen display
+        
+        self.eeprom_board_type = 1
+        self.eeprom_rfic_type = 1
+        self.eeprom_tcxo_ctrl = 1   # tcxo control type
+        
+        # RX sensitivity test
+        self.do_sens_test_in_opt1 = True        # do test in option 1 calibration
+        self.my_udp_ipaddr = '10.102.81.151'    # UDP IP address for sensitivity test
+        self.my_udp_port = 9991                 # UDP port for sensitivity test
+        self.rx_test_vector = 'TV_Low_120627.tgz'   # for old DSP
+        self.rx_patch_vector = 'tc0301_low.tgz'     # for old DSP
+        self.tcid = '901'                       # RX test case ID
+        self.rx_gain = 60                       # RX gain for sensitivity test
+        self.bler_limit = 5                     # percentage of BLER pass criteria
+        self.sens_pass_limit = -96              # sensitivity pass limit
+        
+        # Baseboard test variables
+        self.bb_port = 'COM11'  #'/dev/ttyUSB0'
+        self.bb_baudrate = 115200
+        self.bb_pingip = '10.18.104.240'
+        
+        if self.check_cfg_file() < 0: sys.exit()
+        if self.read_cal_channel() < 0: sys.exit()
+        
+        self.read_config()
+        self.select_rf_drv_init()
+        self.select_dl_etm_test_vector()
+        self.select_ul_exg_waveform()
+        
+    def check_cfg_file(self):
+        
+        cfgfile = open(self.cfg_file, "r")
+        
+        if (os.path.isfile(self.cfg_file) == False):
+            print self.cfg_file + " file doesn't exist"
+            return -1
+        else:
+            self.cfgln = cfgfile.readlines()
+            cfgfile.close()
+            return 0
+        
+    def read_cal_channel(self):
+        
+        for cl in self.cfgln:
+            par, val = self.read_line(cl)
+            
+            if (par == "band"):
+                global band
+                band = int(val)
+            elif (par == "num_cal_channel"):
+                self.num_cal_channel = int(val)
+            elif (par == "dl_freq"):
+                self.dl_freq_arr.append(float(val))
+            elif (par == "ul_freq"):
+                self.ul_freq_arr.append(float(val))
+                        
+        if (len(self.dl_freq_arr) != len(self.ul_freq_arr)):
+            print "number of downlink and uplink frequencies mismatch"
+            return -1
+        
+        if (len(self.dl_freq_arr) != self.num_cal_channel):
+            print "num_cal_channel value mismatch with DL/UL frequencies"
+            return -1 
+        
+        for i in range(self.num_cal_channel):
+            self.cal_freq_arr.append([self.dl_freq_arr[i], self.ul_freq_arr[i]])
+            #print "dl_freq_arr " + str(self.dl_freq_arr[i]) + " ul_freq_arr " + str(self.ul_freq_arr[i])
+         
+        return 0
+                        
+    def get_cal_freq_arr(self):
+        
+        return self.cal_freq_arr
+        
+    def select_dl_etm_test_vector(self):
+        
+        if (self.cal_bandwidth == 5):
+            self.dl_etm_test_vector = 'CAL_ETM_TV_5Mhz.tgz'
+        elif (self.cal_bandwidth == 10):
+            self.dl_etm_test_vector = 'CAL_ETM_TV_10Mhz.tgz'
+        elif (self.cal_bandwidth == 15):
+            self.dl_etm_test_vector = 'CAL_ETM_TV_15Mhz.tgz'
+        elif (self.cal_bandwidth == 20):
+            self.dl_etm_test_vector = 'CAL_ETM_TV_20Mhz.tgz'
+        else:
+            self.dl_etm_test_vector = 'CAL_ETM_TV_20Mhz.tgz'
+                
+    def select_ul_exg_waveform(self):
+        
+        if (self.cal_bandwidth == 5):
+            if (self.tcid == '901'):
+                self.exg_waveform = '"5MHz_FRCA13_RO_0"'
+            elif (self.tcid == '307'):
+                self.exg_waveform = '"5mhz__pusch_15rb_frca3_4_tc0307.wfm"'
+            elif (self.tcid == '308'):
+                self.exg_waveform = '"5mhz__pusch_25rb_frca4_5_tc0308.wfm"'
+            elif (self.tcid == '309'):
+                self.exg_waveform = '"5mhz__pusch_25rb_frca5_4_tc0309.wfm"'
+            else:
+                self.exg_waveform = '"5mhz__pusch_15rb_frca1_2_tc0306.wfm"'
+        elif (self.cal_bandwidth == 10):
+            if (self.tcid == '901'):
+                #self.exg_waveform = '"10mhz__pusch_25rb_frca1_3_tc0901.wfm"'
+                self.exg_waveform = '"10MHz_FRCA13_RO_0"'
+            elif (self.tcid == '902'):
+                self.exg_waveform = '"10mhz__pusch_50rb_frca3_5_tc0902.wfm"'
+            elif (self.tcid == '903'):
+                self.exg_waveform = '"10mhz__pusch_50rb_frca4_6_tc0903.wfm"'
+            elif (self.tcid == '904'):
+                self.exg_waveform = '"10mhz__pusch_50rb_frca5_5_tc0904.wfm"'
+            else:
+                self.exg_waveform = '"10mhz__pusch_25rb_frca1_3_tc0901.wfm"'
+        elif (self.cal_bandwidth == 15):
+            if (self.tcid == '901'):
+                self.exg_waveform = '"15MHZ_FRCA13_RO_0"'
+        elif (self.cal_bandwidth == 20):
+            if (self.tcid == '901'):
+                #self.exg_waveform = '"20mhz__pusch_25rb_frca1_3_tc0901.wfm"'
+                self.exg_waveform = '"20MHz_FRCA13_RO_0"'
+            elif (self.tcid == '902'):
+                self.exg_waveform = '"20mhz__pusch_100rb_frca3_7_tc0902.wfm"'
+            elif (self.tcid == '903'):
+                self.exg_waveform = '"20mhz__pusch_100rb_frca4_8_tc0903.wfm"'
+            elif (self.tcid == '904'):
+                self.exg_waveform = '"20mhz__pusch_100rb_frca5_7_tc0904.wfm"'
+            else:
+                self.exg_waveform = '"20mhz__pusch_25rb_frca1_3_tc0901.wfm"'
+        else:
+            self.exg_waveform = '"10mhz__pusch_25rb_frca1_3_tc0901.wfm"'
+
+    def select_rf_drv_init(self):
+        
+        if (self.cal_bandwidth == 5):
+            self.rf_drv_init = 'ad9362_init_zen5Mhz.txt'
+        elif (self.cal_bandwidth == 10):
+            self.rf_drv_init = 'ad9362_init_zen10Mhz.txt'
+        elif (self.cal_bandwidth == 15):
+            self.rf_drv_init = 'ad9362_init_zen15Mhz.txt'
+        elif (self.cal_bandwidth == 20):
+            self.rf_drv_init = 'ad9362_init_zen20Mhz.txt'
+        else:
+            self.rf_drv_init = 'ad9362_init_zen20Mhz.txt'
+            
+                
+    def read_config(self):
+        
+        cfgfile = open(self.cfg_file, "r")
+        cfgln = cfgfile.readlines()
+        cfgfile.close()
+        
+        for cl in cfgln:
+            par, val = self.read_line(cl)
+            if (par == "board_typ"):
+                self.board_typ = val
+            elif (par == "cal_bandwidth"):
+                self.cal_bandwidth = int(val)
+            elif (par == "tcxo_ctrl"):
+                self.tcxo_ctrl = val
+            elif (par == "test_set"):
+                self.test_set = val
+            elif (par == "attn1"):
+                self.attn1 = val
+            elif (par == "attn2"):
+                self.attn2 = val
+            elif (par == "gain1"):
+                self.gain1 = val
+            elif (par == "gain2"):
+                self.gain2 = val
+            elif (par == "login_pwd"):
+                self.login_pwd = val
+            elif (par == "enb_ipaddr"):
+                self.enb_ipaddr = val
+            elif (par == "enb_tn_port"):
+                self.enb_tn_port = int(val)
+            elif (par == "tftp_server_ip"):
+                self.tftp_server_ip = val
+            elif (par == "exg_ipaddr"):
+                self.exg_ipaddr = val
+            elif (par == "exg_tcp_port"):
+                self.exg_tcp_port = int(val)
+            elif (par == "mxa_ipaddr"):
+                self.mxa_ipaddr = val
+            elif (par == "mxa_tcp_port"):
+                self.mxa_tcp_port = int(val)
+            elif (par == "mt8870a_ipaddr"):
+                self.mt8870a_ipaddr = val
+            elif (par == "mt8870a_tcp_port"):
+                self.mt8870a_tcp_port = int(val) 
+            elif (par == "cmw500_ipaddr"):
+                self.cmw500_ipaddr = val
+            elif (par == "cmw500_tcp_port"):
+                self.cmw500_tcp_port = int(val) 
+            elif (par == "rssi_cable_loss"):
+                self.rssi_cable_loss = float(val)
+            elif (par == "txpwr_cable_loss"):
+                self.txpwr_cable_loss = float(val)
+            elif (par == "manual_switch_instr"):
+                self.manual_switch_instr = self.str2bool(val)
+            elif (par == "rf_driver"):
+                self.rf_driver = val
+            #elif (par == "rf_drv_init"):
+            #    self.rf_drv_init = val
+            elif (par == "dsp_app_dl"):
+                self.dsp_app_dl = val
+            #elif (par == "dl_etm_test_vector"):
+            #    self.dl_etm_test_vector = val
+            #elif (par == "exg_waveform"):
+            #    self.exg_waveform = val
+            elif (par == "max_atten"):
+                self.max_atten = int(val)
+            elif (par == "cr_txpwr_min"):
+                self.cr_txpwr_min = int(val)
+            elif (par == "cr_txpwr_max"):
+                self.cr_txpwr_max = int(val)
+            elif (par == "cr_txevm_max"):
+                self.cr_txevm_max = float(val)
+            elif (par == "en_eeprom_write"):
+                self.en_eeprom_write = self.str2bool(val)
+            elif (par == "eeprom_record_ver"):
+                self.eeprom_record_ver = val
+            #elif (par == "eeprom_new_rec"):
+            #    self.eeprom_new_rec = self.str2bool(val)
+            elif (par == "test_report"):
+                self.test_report = self.str2bool(val)
+            elif (par == "instr_disp"):
+                self.instr_disp = self.str2bool(val)
+            elif (par == "do_sens_test_in_opt1"):
+                self.do_sens_test_in_opt1 = self.str2bool(val)
+            elif (par == "my_udp_ipaddr"):
+                self.my_udp_ipaddr = val
+            elif (par == "my_udp_port"):
+                self.my_udp_port = int(val)
+            #elif (par == "rx_test_vector"):
+            #    self.rx_test_vector = val
+            #elif (par == "rx_patch_vector"):
+            #    self.rx_patch_vector = val
+            elif (par == "tcid"):
+                self.tcid = val
+            elif (par == "rx_gain"):
+                self.rx_gain = val
+            elif (par == "bler_limit"):
+                self.bler_limit = int(val)
+            elif (par == "sens_pass_limit"):
+                self.sens_pass_limit = int(val)
+            elif (par == "bb_port"):
+                self.bb_port = val
+            elif (par == "bb_baudrate"):
+                self.bb_baudrate = val
+            elif (par == "bb_pingip"):
+                self.bb_pingip = val
+            elif (par == ""):
+                continue
+            else:
+                pass
+                #print("unknown parameter!")
+            
+    def read_line(self, strline):
+        param = ""
+        value = ""
+        sn = strline
+        
+        if ((sn[0] != '#') and (sn[0] != ' ') and 
+            (sn[0] != '\n') and (sn[0] != '\r') and
+            (sn[0] != '\t')):
+            result = sn.split('=')
+            param = result[0]
+            value = result[1]
+            for i in range(len(value)):
+                if ((value[i] == '\n') or (value[i] == '\r')):
+                    value = value[:i]
+                    break
+                elif ((value[i] == " ") or (value[i] == "#") or (value[i] == '\t')):
+                        value = value[:i]
+                        break
+            value = value.strip("\'")
+            #print("read_line(): param=%s, value=%s" % (param, value))
+            
+        return param, value
+    
+    def str2bool(self, vs):
+        
+        return vs.lower() in ("yes", "true", "t", "1")
+    
+def main():
+
+    ec = EnbConfig()
+    ec.read_config()
+
+
+if (__name__ == "__main__"):
+    main()
+            
diff --git a/octal/cavium_env/rf_card_cal_tip/test_config.pyc b/octal/cavium_env/rf_card_cal_tip/test_config.pyc
new file mode 100644
index 0000000000..f9fe8943e6
Binary files /dev/null and b/octal/cavium_env/rf_card_cal_tip/test_config.pyc differ
diff --git a/octal/cavium_env/rf_card_cal_tip/test_config.txt b/octal/cavium_env/rf_card_cal_tip/test_config.txt
new file mode 100644
index 0000000000..ccec403b99
--- /dev/null
+++ b/octal/cavium_env/rf_card_cal_tip/test_config.txt
@@ -0,0 +1,76 @@
+
+# calibration channel frequency select
+# 1. the 1st dl_freq & ul_freq calibration results will write into u-boot environment variables
+# 2. leave the 1st dl_freq & ul_freq to zero for default(center) frequencies
+
+num_cal_channel=1               # number of calibration channels 
+band=3                         # enodeB band
+dl_freq=1840                       # downlink frequency
+ul_freq=1745                       # uplink frequency
+
+# environment setting
+
+board_typ='zen_ad'   # board type [zen_ad]
+cal_bandwidth=10     # calibration bandwidth in mhz [5, 10, 15, 20]
+tcxo_ctrl='pwm'      # tcxo control type [pwm, dac, dax]; dax - DAC8571
+
+attn1=18             # port 1 attenuation
+attn2=18             # port 2 attenuation
+gain1=38             # port 1 gain [dB]
+gain2=38             # port 2 gain [dB]
+
+login_pwd='cavium.lte'           # 'admin.udcell'
+enb_ipaddr='10.102.81.61'      # enodeB IP address
+enb_tn_port=23                   # enodeB telnet port
+tftp_server_ip='10.102.81.50' # tftp server IP address
+rssi_cable_loss=9               # cable loss for RSSI test
+txpwr_cable_loss=9               # cable loss for TX test
+manual_switch_instr=False        # T: pause for manual switching; F: continuous
+
+test_set='agilent'   # test set type [agilent, anritsu, rs]
+
+# agilent test set
+exg_ipaddr='10.115.115.38'     # EXG IP address
+exg_tcp_port=5025                # EXG TCP port
+mxa_ipaddr='10.102.81.200'     # MXA IP address
+mxa_tcp_port=5025                # MXA TCP port
+
+# anritsu test set
+mt8870a_ipaddr='192.168.166.68'	 # '192.168.1.1'
+mt8870a_tcp_port=56001
+
+# r&s test set
+cmw500_ipaddr='10.115.115.40'
+cmw500_tcp_port=5025
+
+# test files
+rf_driver='cn_rfdriver'			 # 'oct_fusion_rfic_drv-E2E'
+dsp_app_dl='pltD'                #'pltD.gz'
+dl_etm_test_vector='LSM_X_TV_0_wk21_00_ETM_10Mhz.tgz'
+
+# test criteria
+max_atten=5    #28  # make the lowest TX power to start TX power test; 5 ~ 45
+cr_txpwr_min=-10      # minimum TX output power limit
+cr_txpwr_max=22      # maximum TX output power limit
+cr_txevm_max=5.0     # maximum TX EVM limit
+
+# system variables
+en_eeprom_write=True # T: write EEPROM
+eeprom_record_ver=1  # EEPROM record version
+test_report=True     # T: enable test report; F: disable
+instr_disp=True      # T: enable instrument screen display
+
+# RX sensitivity test
+do_sens_test_in_opt1=True        # do test in option 1 calibration
+my_udp_ipaddr='192.168.166.27'  # UDP IP address for sensitivity test
+my_udp_port=9991                 # UDP port for sensitivity test
+tcid='901'						 # RX test case ID
+rx_gain=60                       # RX gain for sensitivity test
+bler_limit=4                     # percentage of BLER pass criteria
+sens_pass_limit=-96              # sensitivity pass limit
+
+# Baseboard test variables
+bb_port='COM88'  	             #'/dev/ttyUSB0'
+bb_baudrate=115200
+bb_pingip='192.168.166.27'
+
diff --git a/octal/cavium_env/rf_card_cal_tip/test_flatness.py b/octal/cavium_env/rf_card_cal_tip/test_flatness.py
new file mode 100644
index 0000000000..8a36d158e0
--- /dev/null
+++ b/octal/cavium_env/rf_card_cal_tip/test_flatness.py
@@ -0,0 +1,160 @@
+#!/usr/bin/python
+
+#import common
+import test_config
+from time import sleep
+from im_calibration import Calibration
+
+class TestFlatness(Calibration):
+    
+    def __init__(self, rpt_hndl, bandwidth, dl_freq):
+        
+        self.rpt = rpt_hndl
+        self.input_power = -20  # input power in dBm
+        self.test_bw = bandwidth
+        self.dl_freq = dl_freq
+        self.curr_obw = 0.0
+        self.ripple_data = []
+        self.curr_freq_start = 0.0
+        self.curr_freq_stop = 0.0
+        self.sample_freq_step = 100 # kHz
+        
+        self.max_ripple_less_than_3mhz = 8
+        self.max_ripple_greater_than_3mhz = 4
+        
+        if (self.test_bw == 5):
+            self.intbw = '4.5'
+            self.spabw = '10'
+            self.obw_std = 'B5M'
+        elif (self.test_bw == 10):
+            self.intbw = '9'
+            self.spabw = '20'
+            self.obw_std = 'B10M'
+        elif (self.test_bw == 20):
+            self.intbw = '18'
+            self.spabw = '30'
+            self.obw_std = 'B20M'
+        else:
+            print "bandwidth is not in configuration"
+            exit(1)
+        
+    def mxa_flatness_setup(self):
+        
+        type(self).mxa.send_msg_to_server(':INIT:CONT ON')
+        type(self).mxa.send_msg_to_server(':INST:SEL SA')
+        #type(self).mxa.send_msg_to_server(':FREQ:CENT ' + str(self.dl_freq) + ' MHz')
+        #type(self).mxa.send_msg_to_server(':FREQ:SPAN ' + self.curr_obw + ' MHz')
+        type(self).mxa.send_msg_to_server(':FREQ:START ' + str(self.curr_freq_start - 1) + ' MHz')
+        type(self).mxa.send_msg_to_server(':FREQ:STOP ' + str(self.curr_freq_stop + 1) + ' MHz')
+        #type(self).mxa.send_msg_to_server(':BAND:RES 1 kHz')
+        type(self).mxa.send_msg_to_server(':BAND:VID 1 kHz')
+        type(self).mxa.send_msg_to_server(':POW:ATT 38')
+        type(self).mxa.send_msg_to_server(':DISP:WIND:TRAC:Y:RLEV 20 dBm')
+        type(self).mxa.send_msg_to_server(':AVER:COUN 10')
+        
+    def mxa_obw_setup(self):
+        
+        type(self).mxa.send_msg_to_server('*PSC')
+        type(self).mxa.send_msg_to_server(':INIT:CONT ON')
+        type(self).mxa.send_msg_to_server(':INST LTE')
+        type(self).mxa.send_msg_to_server(':POW:ATT 30') # attenuation
+        type(self).mxa.send_msg_to_server(':FREQ:CENT ' + str(self.dl_freq) + ' MHz')
+        type(self).mxa.send_msg_to_server(':RAD:STAN:PRES ' + self.obw_std) # LTE preset
+        type(self).mxa.send_msg_to_server(':CONF:OBW ' + str(self.test_bw) + ' MHz')
+        type(self).mxa.send_msg_to_server(':INIT:OBW')
+        
+    def start_enodeb_tx(self):
+        
+        type(self).enb.enb_login()
+        
+        # default is PWM control in booting
+        if (type(self).cfg.tcxo_ctrl == "dax"):
+            print("load ext dac clock control")
+            type(self).enb.enb_cd_usr_bin()
+            type(self).enb.enb_load_dax()   # do ext DAC control
+    
+        if test_config.band > 32:
+            type(self).enb.enb_cd_usr_bin()
+            type(self).enb.enb_set_zen_tdd_tx()
+            
+        type(self).enb.enb_cd_tmpfs()
+        type(self).enb.enb_run_dsp_app_dl()
+        
+    def collect_ripple_data(self):
+        
+        self.ripple_data = []
+        mark_freq = self.curr_freq_start
+        type(self).mxa.send_msg_to_server(':CALC:MARK1:MODE POS')
+        
+        while (mark_freq <= self.curr_freq_stop):
+            type(self).mxa.send_msg_to_server(':CALC:MARK1:X ' + str(mark_freq) + ' MHz')
+            sleep(0.5)
+            type(self).mxa.send_msg_to_server(':CALC:MARK1:Y?')        # get power
+            in_msg = type(self).mxa.recv_msg_frm_server()
+            cur_pwr = round(float(in_msg), 2)
+            #self.ripple_data.append([mark_freq, cur_pwr])
+            self.ripple_data.append(cur_pwr)
+            self.rpt.write('\t' + str(mark_freq) + ' MHz\t\t' + str(cur_pwr) + ' dBm\n')
+            mark_freq = mark_freq + float(self.sample_freq_step)/1000.0
+            print str(mark_freq) + ' MHz ' + str(cur_pwr) + ' dBm'
+            
+        type(self).mxa.send_msg_to_server(':CALC:MARK1:MODE OFF')
+        
+    def calcFlatness(self):
+        
+        data = sorted(self.ripple_data)
+        flatness = abs(round(float(data[-1] - data[0]), 2))
+        
+        self.rpt.write('max = ' + str(round(float(data[-1]), 2)) + ' dBm\n')
+        self.rpt.write('min = ' + str(round(float(data[0]), 2)) + ' dBm\n')
+        self.rpt.write('flatness = ' + str(flatness) + ' dBm\n\n')
+        self.rpt.flush()
+        
+        print ''
+        print 'max = ' + str(round(float(data[-1]), 2)) + ' dBm'
+        print 'min = ' + str(round(float(data[0]), 2)) + ' dBm'
+        print 'flatness = ' + str(flatness) + ' dBm'
+        print ''
+        
+    def do_flatness_measurement(self):
+        
+        # measure OBW
+        obw_loop = 6
+        self.mxa_obw_setup()
+        
+        for cnt in range(0, obw_loop):   # prevent get carrier only
+            sleep(5) # wait for spectrum stable
+            type(self).mxa.send_msg_to_server(':FETC:OBW?')
+            in_msg = type(self).mxa.recv_msg_frm_server()
+            line = in_msg.split(',')
+            self.curr_obw = round(float(line[0])/1000000, 6)
+            if (self.curr_obw > 3.0):
+                break
+            elif (cnt == (obw_loop - 1)):
+                print 'transmit signal error, obw measure failed'
+                exit(1)
+        
+        print('OBW = ' + str(self.curr_obw) + ' MHz')
+        self.rpt.write('OBW = ' + str(self.curr_obw) + ' MHz\n')
+        
+        # set MXA in new span
+        obw_offset = round(float(self.curr_obw/2), 6)
+        self.curr_freq_start = self.dl_freq - obw_offset
+        self.curr_freq_stop = self.dl_freq + obw_offset
+        self.rpt.write('frequency start = ' + str(self.curr_freq_start) + ' MHz\n')
+        self.rpt.write('frequency stop = ' + str(self.curr_freq_stop) + ' MHz\n\n')
+        self.mxa_flatness_setup()
+        sleep(3)
+        
+        # collect frequency vs power list [freq, pow]
+        self.collect_ripple_data()
+        
+        # analysis data
+        self.calcFlatness()
+        
+    def run(self):
+        
+        self.start_enodeb_tx()
+        sleep(3)    # wait spectrum comes out
+        self.do_flatness_measurement()
+        
diff --git a/octal/cavium_env/rf_card_cal_tip/test_flatness.pyc b/octal/cavium_env/rf_card_cal_tip/test_flatness.pyc
new file mode 100644
index 0000000000..f709e935f7
Binary files /dev/null and b/octal/cavium_env/rf_card_cal_tip/test_flatness.pyc differ
diff --git a/octal/cavium_env/rf_card_cal_tip/test_report/test_20180427_114150.txt b/octal/cavium_env/rf_card_cal_tip/test_report/test_20180427_114150.txt
new file mode 100644
index 0000000000..e69de29bb2
diff --git a/octal/cavium_env/rf_card_cal_tip/test_report/test_20180427_115347.txt b/octal/cavium_env/rf_card_cal_tip/test_report/test_20180427_115347.txt
new file mode 100644
index 0000000000..f6dc48193c
--- /dev/null
+++ b/octal/cavium_env/rf_card_cal_tip/test_report/test_20180427_115347.txt
@@ -0,0 +1,2 @@
+./test_report/test_20180427_115347.txt
+27/04/2018 11:53:47
diff --git a/octal/cavium_env/rf_card_cal_tip/test_report/test_20180427_115502.txt b/octal/cavium_env/rf_card_cal_tip/test_report/test_20180427_115502.txt
new file mode 100644
index 0000000000..14983eeffd
--- /dev/null
+++ b/octal/cavium_env/rf_card_cal_tip/test_report/test_20180427_115502.txt
@@ -0,0 +1,2 @@
+./test_report/test_20180427_115502.txt
+27/04/2018 11:55:02
diff --git a/octal/cavium_env/rf_card_cal_tip/test_report/test_20180427_145042.txt b/octal/cavium_env/rf_card_cal_tip/test_report/test_20180427_145042.txt
new file mode 100644
index 0000000000..1d594f3ea6
--- /dev/null
+++ b/octal/cavium_env/rf_card_cal_tip/test_report/test_20180427_145042.txt
@@ -0,0 +1,2 @@
+./test_report/test_20180427_145042.txt
+27/04/2018 14:50:42
diff --git a/octal/cavium_env/rf_card_cal_tip/test_report/test_20180427_150844.txt b/octal/cavium_env/rf_card_cal_tip/test_report/test_20180427_150844.txt
new file mode 100644
index 0000000000..7ad1a4846e
--- /dev/null
+++ b/octal/cavium_env/rf_card_cal_tip/test_report/test_20180427_150844.txt
@@ -0,0 +1,2 @@
+./test_report/test_20180427_150844.txt
+27/04/2018 15:08:44
diff --git a/octal/cavium_env/rf_card_cal_tip/test_report/test_20180427_155911.txt b/octal/cavium_env/rf_card_cal_tip/test_report/test_20180427_155911.txt
new file mode 100644
index 0000000000..1a001e1a36
--- /dev/null
+++ b/octal/cavium_env/rf_card_cal_tip/test_report/test_20180427_155911.txt
@@ -0,0 +1,2 @@
+./test_report/test_20180427_155911.txt
+27/04/2018 15:59:11
diff --git a/octal/cavium_env/rf_card_cal_tip/test_report/test_20180427_161032.txt b/octal/cavium_env/rf_card_cal_tip/test_report/test_20180427_161032.txt
new file mode 100644
index 0000000000..cc3aebe45f
--- /dev/null
+++ b/octal/cavium_env/rf_card_cal_tip/test_report/test_20180427_161032.txt
@@ -0,0 +1,2 @@
+./test_report/test_20180427_161032.txt
+27/04/2018 16:10:32
diff --git a/octal/cavium_env/rf_card_cal_tip/test_report/test_20180427_162857.txt b/octal/cavium_env/rf_card_cal_tip/test_report/test_20180427_162857.txt
new file mode 100644
index 0000000000..e69de29bb2
diff --git a/octal/cavium_env/rf_card_cal_tip/test_report/test_20180427_164025.txt b/octal/cavium_env/rf_card_cal_tip/test_report/test_20180427_164025.txt
new file mode 100644
index 0000000000..e69de29bb2
diff --git a/octal/cavium_env/rf_card_cal_tip/test_report/test_20180430_120144.txt b/octal/cavium_env/rf_card_cal_tip/test_report/test_20180430_120144.txt
new file mode 100644
index 0000000000..e69de29bb2
diff --git a/octal/cavium_env/rf_card_cal_tip/test_report/test_20180430_120516.txt b/octal/cavium_env/rf_card_cal_tip/test_report/test_20180430_120516.txt
new file mode 100644
index 0000000000..5a796dc8ed
--- /dev/null
+++ b/octal/cavium_env/rf_card_cal_tip/test_report/test_20180430_120516.txt
@@ -0,0 +1,7 @@
+./test_report/test_20180430_120516.txt
+30/04/2018 12:05:16
+
+*** Calibration #1 ***
+
+DL Freq.1825.0 MHz
+UL Freq.1730.0 MHz
diff --git a/octal/cavium_env/rf_card_cal_tip/test_report/test_20180430_121054.txt b/octal/cavium_env/rf_card_cal_tip/test_report/test_20180430_121054.txt
new file mode 100644
index 0000000000..e69de29bb2
diff --git a/octal/cavium_env/rf_card_cal_tip/test_report/test_20180501_102412.txt b/octal/cavium_env/rf_card_cal_tip/test_report/test_20180501_102412.txt
new file mode 100644
index 0000000000..c135b9c634
--- /dev/null
+++ b/octal/cavium_env/rf_card_cal_tip/test_report/test_20180501_102412.txt
@@ -0,0 +1,2 @@
+./test_report/test_20180501_102412.txt
+01/05/2018 10:24:12
diff --git a/octal/cavium_env/rf_card_cal_tip/test_report/test_20180501_112411.txt b/octal/cavium_env/rf_card_cal_tip/test_report/test_20180501_112411.txt
new file mode 100644
index 0000000000..5ff18fb611
--- /dev/null
+++ b/octal/cavium_env/rf_card_cal_tip/test_report/test_20180501_112411.txt
@@ -0,0 +1,2 @@
+./test_report/test_20180501_112411.txt
+01/05/2018 11:24:11
diff --git a/octal/cavium_env/rf_card_cal_tip/test_report/test_20180501_112740.txt b/octal/cavium_env/rf_card_cal_tip/test_report/test_20180501_112740.txt
new file mode 100644
index 0000000000..9717b70178
--- /dev/null
+++ b/octal/cavium_env/rf_card_cal_tip/test_report/test_20180501_112740.txt
@@ -0,0 +1,2 @@
+./test_report/test_20180501_112740.txt
+01/05/2018 11:27:40
diff --git a/octal/cavium_env/rf_card_cal_tip/test_report/test_20180501_132532.txt b/octal/cavium_env/rf_card_cal_tip/test_report/test_20180501_132532.txt
new file mode 100644
index 0000000000..e69de29bb2
diff --git a/octal/cavium_env/rf_card_cal_tip/test_report/test_20180501_135105.txt b/octal/cavium_env/rf_card_cal_tip/test_report/test_20180501_135105.txt
new file mode 100644
index 0000000000..e69de29bb2
diff --git a/octal/cavium_env/rf_card_cal_tip/test_report/test_20180501_135947.txt b/octal/cavium_env/rf_card_cal_tip/test_report/test_20180501_135947.txt
new file mode 100644
index 0000000000..e69de29bb2
diff --git a/octal/cavium_env/rf_card_cal_tip/test_report/test_20180501_140511.txt b/octal/cavium_env/rf_card_cal_tip/test_report/test_20180501_140511.txt
new file mode 100644
index 0000000000..e69de29bb2
diff --git a/octal/cavium_env/rf_card_cal_tip/test_report/test_20180501_141102.txt b/octal/cavium_env/rf_card_cal_tip/test_report/test_20180501_141102.txt
new file mode 100644
index 0000000000..b4239e675e
--- /dev/null
+++ b/octal/cavium_env/rf_card_cal_tip/test_report/test_20180501_141102.txt
@@ -0,0 +1,2 @@
+./test_report/test_20180501_141102.txt
+01/05/2018 14:11:02
diff --git a/octal/cavium_env/rf_card_cal_tip/test_report/test_20180501_141712.txt b/octal/cavium_env/rf_card_cal_tip/test_report/test_20180501_141712.txt
new file mode 100644
index 0000000000..5619fc161c
--- /dev/null
+++ b/octal/cavium_env/rf_card_cal_tip/test_report/test_20180501_141712.txt
@@ -0,0 +1,2 @@
+./test_report/test_20180501_141712.txt
+01/05/2018 14:17:12
diff --git a/octal/cavium_env/rf_card_cal_tip/test_report/test_20180501_142344.txt b/octal/cavium_env/rf_card_cal_tip/test_report/test_20180501_142344.txt
new file mode 100644
index 0000000000..e69de29bb2
diff --git a/octal/cavium_env/rf_card_cal_tip/test_report/test_20180501_143315.txt b/octal/cavium_env/rf_card_cal_tip/test_report/test_20180501_143315.txt
new file mode 100644
index 0000000000..e69de29bb2
diff --git a/octal/cavium_env/rf_card_cal_tip/test_report/test_20180501_143812.txt b/octal/cavium_env/rf_card_cal_tip/test_report/test_20180501_143812.txt
new file mode 100644
index 0000000000..8df59caba7
--- /dev/null
+++ b/octal/cavium_env/rf_card_cal_tip/test_report/test_20180501_143812.txt
@@ -0,0 +1,2 @@
+./test_report/test_20180501_143812.txt
+01/05/2018 14:38:12
diff --git a/octal/cavium_env/rf_card_cal_tip/test_report/test_20180501_144317.txt b/octal/cavium_env/rf_card_cal_tip/test_report/test_20180501_144317.txt
new file mode 100644
index 0000000000..e69de29bb2
diff --git a/octal/cavium_env/rf_card_cal_tip/test_report/test_20180501_144643.txt b/octal/cavium_env/rf_card_cal_tip/test_report/test_20180501_144643.txt
new file mode 100644
index 0000000000..cd89389430
--- /dev/null
+++ b/octal/cavium_env/rf_card_cal_tip/test_report/test_20180501_144643.txt
@@ -0,0 +1,2 @@
+./test_report/test_20180501_144643.txt
+01/05/2018 14:46:43
diff --git a/octal/cavium_env/rf_card_cal_tip/test_report/test_20180501_145822.txt b/octal/cavium_env/rf_card_cal_tip/test_report/test_20180501_145822.txt
new file mode 100644
index 0000000000..81339e1ad0
--- /dev/null
+++ b/octal/cavium_env/rf_card_cal_tip/test_report/test_20180501_145822.txt
@@ -0,0 +1,2 @@
+./test_report/test_20180501_145822.txt
+01/05/2018 14:58:22
diff --git a/octal/cavium_env/rf_card_cal_tip/test_report/test_20180501_150822.txt b/octal/cavium_env/rf_card_cal_tip/test_report/test_20180501_150822.txt
new file mode 100644
index 0000000000..07404bbe11
--- /dev/null
+++ b/octal/cavium_env/rf_card_cal_tip/test_report/test_20180501_150822.txt
@@ -0,0 +1,2 @@
+./test_report/test_20180501_150822.txt
+01/05/2018 15:08:22
diff --git a/octal/cavium_env/rf_card_cal_tip/test_report/test_20180501_152014.txt b/octal/cavium_env/rf_card_cal_tip/test_report/test_20180501_152014.txt
new file mode 100644
index 0000000000..58eca7d132
--- /dev/null
+++ b/octal/cavium_env/rf_card_cal_tip/test_report/test_20180501_152014.txt
@@ -0,0 +1,2 @@
+./test_report/test_20180501_152014.txt
+01/05/2018 15:20:14
diff --git a/octal/cavium_env/rf_card_cal_tip/test_report/test_20180501_153652.txt b/octal/cavium_env/rf_card_cal_tip/test_report/test_20180501_153652.txt
new file mode 100644
index 0000000000..94ce4a4bfc
--- /dev/null
+++ b/octal/cavium_env/rf_card_cal_tip/test_report/test_20180501_153652.txt
@@ -0,0 +1,2 @@
+./test_report/test_20180501_153652.txt
+01/05/2018 15:36:52
diff --git a/octal/cavium_env/rf_card_cal_tip/test_report/test_20180502_093449.txt b/octal/cavium_env/rf_card_cal_tip/test_report/test_20180502_093449.txt
new file mode 100644
index 0000000000..dd95e29d13
--- /dev/null
+++ b/octal/cavium_env/rf_card_cal_tip/test_report/test_20180502_093449.txt
@@ -0,0 +1,11 @@
+./test_report/test_20180502_093449.txt
+02/05/2018 09:34:49
+
+*** Calibration #1 ***
+
+DL Freq.1840.0 MHz
+UL Freq.1715.0 MHz
+
+RSSI Calibration:
+slope_1=nan, offset_1=nan
+slope_2=nan, offset_2=nan
diff --git a/octal/cavium_env/rf_card_cal_tip/test_report/test_20180502_095221.txt b/octal/cavium_env/rf_card_cal_tip/test_report/test_20180502_095221.txt
new file mode 100644
index 0000000000..e1a380eaac
--- /dev/null
+++ b/octal/cavium_env/rf_card_cal_tip/test_report/test_20180502_095221.txt
@@ -0,0 +1,28 @@
+./test_report/test_20180502_095221.txt
+02/05/2018 09:52:21
+
+*** Calibration #1 ***
+
+DL Freq.1840.0 MHz
+UL Freq.1715.0 MHz
+
+RSSI Calibration:
+slope_1=nan, offset_1=nan
+slope_2=nan, offset_2=nan
+
+Reference Clock Calibration:
+Frequency = 1840000000.0
+PWM_high value = 22857
+PWM_low value = 37376
+
+IQ Offset Calibration:
+tx1_i_offset = 0xff
+tx1_q_offset = 0xff
+tx2_i_offset = 0xff
+tx2_q_offset = 0xfa
+
+TX Power Calibration:
+slope_1=-1.025787, offset_1=4.017246
+slope_2=-7.884413, offset_2=-372.513807
+
+TX Max Available Power:
diff --git a/octal/cavium_env/rf_card_cal_tip/test_report/test_20180502_095917.txt b/octal/cavium_env/rf_card_cal_tip/test_report/test_20180502_095917.txt
new file mode 100644
index 0000000000..9f8941b018
--- /dev/null
+++ b/octal/cavium_env/rf_card_cal_tip/test_report/test_20180502_095917.txt
@@ -0,0 +1,2 @@
+./test_report/test_20180502_095917.txt
+02/05/2018 09:59:17
diff --git a/octal/cavium_env/rf_card_cal_tip/test_report/test_20180502_100307.txt b/octal/cavium_env/rf_card_cal_tip/test_report/test_20180502_100307.txt
new file mode 100644
index 0000000000..e69de29bb2
diff --git a/octal/cavium_env/rf_card_cal_tip/test_report/test_20180502_101718.txt b/octal/cavium_env/rf_card_cal_tip/test_report/test_20180502_101718.txt
new file mode 100644
index 0000000000..32ceb3e9fe
--- /dev/null
+++ b/octal/cavium_env/rf_card_cal_tip/test_report/test_20180502_101718.txt
@@ -0,0 +1,2 @@
+./test_report/test_20180502_101718.txt
+02/05/2018 10:17:18
diff --git a/octal/cavium_env/rf_card_cal_tip/test_report/test_20180502_102327.txt b/octal/cavium_env/rf_card_cal_tip/test_report/test_20180502_102327.txt
new file mode 100644
index 0000000000..e7e544f994
--- /dev/null
+++ b/octal/cavium_env/rf_card_cal_tip/test_report/test_20180502_102327.txt
@@ -0,0 +1,2 @@
+./test_report/test_20180502_102327.txt
+02/05/2018 10:23:27
diff --git a/octal/cavium_env/rf_card_cal_tip/test_report/test_20180502_104011.txt b/octal/cavium_env/rf_card_cal_tip/test_report/test_20180502_104011.txt
new file mode 100644
index 0000000000..b0c26d4823
--- /dev/null
+++ b/octal/cavium_env/rf_card_cal_tip/test_report/test_20180502_104011.txt
@@ -0,0 +1,2 @@
+./test_report/test_20180502_104011.txt
+02/05/2018 10:40:11
diff --git a/octal/cavium_env/rf_card_cal_tip/test_report/test_20180502_111044.txt b/octal/cavium_env/rf_card_cal_tip/test_report/test_20180502_111044.txt
new file mode 100644
index 0000000000..2bc9e45dd9
--- /dev/null
+++ b/octal/cavium_env/rf_card_cal_tip/test_report/test_20180502_111044.txt
@@ -0,0 +1,2 @@
+./test_report/test_20180502_111044.txt
+02/05/2018 11:10:44
diff --git a/octal/cavium_env/rf_card_cal_tip/test_report/test_20180502_112908.txt b/octal/cavium_env/rf_card_cal_tip/test_report/test_20180502_112908.txt
new file mode 100644
index 0000000000..746e7249da
--- /dev/null
+++ b/octal/cavium_env/rf_card_cal_tip/test_report/test_20180502_112908.txt
@@ -0,0 +1,2 @@
+./test_report/test_20180502_112908.txt
+02/05/2018 11:29:08
diff --git a/octal/cavium_env/rf_card_cal_tip/test_report/test_20180502_113244.txt b/octal/cavium_env/rf_card_cal_tip/test_report/test_20180502_113244.txt
new file mode 100644
index 0000000000..21eb14ebe9
--- /dev/null
+++ b/octal/cavium_env/rf_card_cal_tip/test_report/test_20180502_113244.txt
@@ -0,0 +1,2 @@
+./test_report/test_20180502_113244.txt
+02/05/2018 11:32:44
diff --git a/octal/cavium_env/rf_card_cal_tip/test_report/test_20180502_113449.txt b/octal/cavium_env/rf_card_cal_tip/test_report/test_20180502_113449.txt
new file mode 100644
index 0000000000..d8f653008e
--- /dev/null
+++ b/octal/cavium_env/rf_card_cal_tip/test_report/test_20180502_113449.txt
@@ -0,0 +1,2 @@
+./test_report/test_20180502_113449.txt
+02/05/2018 11:34:49
diff --git a/octal/cavium_env/rf_card_cal_tip/test_report/test_20180502_113804.txt b/octal/cavium_env/rf_card_cal_tip/test_report/test_20180502_113804.txt
new file mode 100644
index 0000000000..e69de29bb2
diff --git a/octal/cavium_env/rf_card_cal_tip/test_report/test_20180502_114507.txt b/octal/cavium_env/rf_card_cal_tip/test_report/test_20180502_114507.txt
new file mode 100644
index 0000000000..350847de2b
--- /dev/null
+++ b/octal/cavium_env/rf_card_cal_tip/test_report/test_20180502_114507.txt
@@ -0,0 +1,2 @@
+./test_report/test_20180502_114507.txt
+02/05/2018 11:45:07
diff --git a/octal/cavium_env/rf_card_cal_tip/test_report/test_20180502_114726.txt b/octal/cavium_env/rf_card_cal_tip/test_report/test_20180502_114726.txt
new file mode 100644
index 0000000000..e69de29bb2
diff --git a/octal/cavium_env/rf_card_cal_tip/test_report/test_20180502_114901.txt b/octal/cavium_env/rf_card_cal_tip/test_report/test_20180502_114901.txt
new file mode 100644
index 0000000000..e69de29bb2
diff --git a/octal/cavium_env/rf_card_cal_tip/test_report/test_20180502_115153.txt b/octal/cavium_env/rf_card_cal_tip/test_report/test_20180502_115153.txt
new file mode 100644
index 0000000000..e69de29bb2
diff --git a/octal/cavium_env/rf_card_cal_tip/test_report/test_20180502_115311.txt b/octal/cavium_env/rf_card_cal_tip/test_report/test_20180502_115311.txt
new file mode 100644
index 0000000000..e69de29bb2
diff --git a/octal/cavium_env/rf_card_cal_tip/test_report/test_20180502_142005.txt b/octal/cavium_env/rf_card_cal_tip/test_report/test_20180502_142005.txt
new file mode 100644
index 0000000000..e69de29bb2
diff --git a/octal/cavium_env/rf_card_cal_tip/test_report/test_20180503_092809.txt b/octal/cavium_env/rf_card_cal_tip/test_report/test_20180503_092809.txt
new file mode 100644
index 0000000000..bc3071dcc8
--- /dev/null
+++ b/octal/cavium_env/rf_card_cal_tip/test_report/test_20180503_092809.txt
@@ -0,0 +1,2 @@
+./test_report/test_20180503_092809.txt
+03/05/2018 09:28:09
diff --git a/octal/cavium_env/rf_card_cal_tip/test_report/test_20180510_150438.txt b/octal/cavium_env/rf_card_cal_tip/test_report/test_20180510_150438.txt
new file mode 100644
index 0000000000..a5ac273232
--- /dev/null
+++ b/octal/cavium_env/rf_card_cal_tip/test_report/test_20180510_150438.txt
@@ -0,0 +1,2 @@
+./test_report/test_20180510_150438.txt
+10/05/2018 15:04:38
diff --git a/octal/cavium_env/rf_card_cal_tip/test_report/test_20180514_103814.txt b/octal/cavium_env/rf_card_cal_tip/test_report/test_20180514_103814.txt
new file mode 100644
index 0000000000..0525aead97
--- /dev/null
+++ b/octal/cavium_env/rf_card_cal_tip/test_report/test_20180514_103814.txt
@@ -0,0 +1,2 @@
+./test_report/test_20180514_103814.txt
+14/05/2018 10:38:14
diff --git a/octal/cavium_env/rf_card_cal_tip/test_report/test_20180514_104309.txt b/octal/cavium_env/rf_card_cal_tip/test_report/test_20180514_104309.txt
new file mode 100644
index 0000000000..e69de29bb2
diff --git a/octal/cavium_env/rf_card_cal_tip/test_report/test_20180514_111015.txt b/octal/cavium_env/rf_card_cal_tip/test_report/test_20180514_111015.txt
new file mode 100644
index 0000000000..1594ee00a2
--- /dev/null
+++ b/octal/cavium_env/rf_card_cal_tip/test_report/test_20180514_111015.txt
@@ -0,0 +1,2 @@
+./test_report/test_20180514_111015.txt
+14/05/2018 11:10:15
diff --git a/octal/cavium_env/rf_card_cal_tip/test_report/test_20180514_114834.txt b/octal/cavium_env/rf_card_cal_tip/test_report/test_20180514_114834.txt
new file mode 100644
index 0000000000..71738ad969
--- /dev/null
+++ b/octal/cavium_env/rf_card_cal_tip/test_report/test_20180514_114834.txt
@@ -0,0 +1,2 @@
+./test_report/test_20180514_114834.txt
+14/05/2018 11:48:34
diff --git a/octal/cavium_env/rf_card_cal_tip/test_report/test_20180514_143034.txt b/octal/cavium_env/rf_card_cal_tip/test_report/test_20180514_143034.txt
new file mode 100644
index 0000000000..e69de29bb2
diff --git a/octal/cavium_env/rf_card_cal_tip/test_report/test_20180514_143807.txt b/octal/cavium_env/rf_card_cal_tip/test_report/test_20180514_143807.txt
new file mode 100644
index 0000000000..486f025a04
--- /dev/null
+++ b/octal/cavium_env/rf_card_cal_tip/test_report/test_20180514_143807.txt
@@ -0,0 +1,2 @@
+./test_report/test_20180514_143807.txt
+14/05/2018 14:38:07
diff --git a/octal/cavium_env/rf_card_cal_tip/test_report/test_20180515_103310.txt b/octal/cavium_env/rf_card_cal_tip/test_report/test_20180515_103310.txt
new file mode 100644
index 0000000000..f8da780220
--- /dev/null
+++ b/octal/cavium_env/rf_card_cal_tip/test_report/test_20180515_103310.txt
@@ -0,0 +1,2 @@
+./test_report/test_20180515_103310.txt
+15/05/2018 10:33:10
diff --git a/octal/cavium_env/rf_card_cal_tip/test_report/test_20180515_141948.txt b/octal/cavium_env/rf_card_cal_tip/test_report/test_20180515_141948.txt
new file mode 100644
index 0000000000..d612ab11b2
--- /dev/null
+++ b/octal/cavium_env/rf_card_cal_tip/test_report/test_20180515_141948.txt
@@ -0,0 +1,2 @@
+./test_report/test_20180515_141948.txt
+15/05/2018 14:19:48
diff --git a/octal/cavium_env/rf_card_cal_tip/test_report/test_20180525_121258.txt b/octal/cavium_env/rf_card_cal_tip/test_report/test_20180525_121258.txt
new file mode 100644
index 0000000000..884c4e370c
--- /dev/null
+++ b/octal/cavium_env/rf_card_cal_tip/test_report/test_20180525_121258.txt
@@ -0,0 +1,2 @@
+./test_report/test_20180525_121258.txt
+25/05/2018 12:12:58
diff --git a/octal/cavium_env/rf_card_cal_tip/test_report/test_20180719_133528.txt b/octal/cavium_env/rf_card_cal_tip/test_report/test_20180719_133528.txt
new file mode 100644
index 0000000000..e69de29bb2
diff --git a/octal/cavium_env/rf_card_cal_tip/test_report/test_20180720_112448.txt b/octal/cavium_env/rf_card_cal_tip/test_report/test_20180720_112448.txt
new file mode 100644
index 0000000000..e69de29bb2
diff --git a/octal/cavium_env/rf_card_cal_tip/test_report/test_20180829_141840.txt b/octal/cavium_env/rf_card_cal_tip/test_report/test_20180829_141840.txt
new file mode 100644
index 0000000000..0201f68a1c
--- /dev/null
+++ b/octal/cavium_env/rf_card_cal_tip/test_report/test_20180829_141840.txt
@@ -0,0 +1,2 @@
+./test_report/test_20180829_141840.txt
+29/08/2018 14:18:41
diff --git a/octal/cavium_env/rf_card_cal_tip/test_report/test_20180830_155438.txt b/octal/cavium_env/rf_card_cal_tip/test_report/test_20180830_155438.txt
new file mode 100644
index 0000000000..0ffef424fb
--- /dev/null
+++ b/octal/cavium_env/rf_card_cal_tip/test_report/test_20180830_155438.txt
@@ -0,0 +1,2 @@
+./test_report/test_20180830_155438.txt
+30/08/2018 15:54:38
diff --git a/octal/cavium_env/rf_card_cal_tip/test_report/test_20180830_155852.txt b/octal/cavium_env/rf_card_cal_tip/test_report/test_20180830_155852.txt
new file mode 100644
index 0000000000..5f22fef98e
--- /dev/null
+++ b/octal/cavium_env/rf_card_cal_tip/test_report/test_20180830_155852.txt
@@ -0,0 +1,2 @@
+./test_report/test_20180830_155852.txt
+30/08/2018 15:58:52
diff --git a/octal/cavium_env/rf_card_cal_tip/test_report/test_20180830_160125.txt b/octal/cavium_env/rf_card_cal_tip/test_report/test_20180830_160125.txt
new file mode 100644
index 0000000000..e69de29bb2
diff --git a/octal/cavium_env/rf_card_cal_tip/test_report/test_20180830_160531.txt b/octal/cavium_env/rf_card_cal_tip/test_report/test_20180830_160531.txt
new file mode 100644
index 0000000000..b806cd831a
--- /dev/null
+++ b/octal/cavium_env/rf_card_cal_tip/test_report/test_20180830_160531.txt
@@ -0,0 +1,2 @@
+./test_report/test_20180830_160531.txt
+30/08/2018 16:05:31
diff --git a/octal/cavium_env/rf_card_cal_tip/test_report/test_20180830_160633.txt b/octal/cavium_env/rf_card_cal_tip/test_report/test_20180830_160633.txt
new file mode 100644
index 0000000000..a381b8d469
--- /dev/null
+++ b/octal/cavium_env/rf_card_cal_tip/test_report/test_20180830_160633.txt
@@ -0,0 +1,2 @@
+./test_report/test_20180830_160633.txt
+30/08/2018 16:06:33
diff --git a/octal/cavium_env/rf_card_cal_tip/test_report/test_20180830_160841.txt b/octal/cavium_env/rf_card_cal_tip/test_report/test_20180830_160841.txt
new file mode 100644
index 0000000000..e69de29bb2
diff --git a/octal/cavium_env/rf_card_cal_tip/test_report/test_20180830_161221.txt b/octal/cavium_env/rf_card_cal_tip/test_report/test_20180830_161221.txt
new file mode 100644
index 0000000000..08280620d5
--- /dev/null
+++ b/octal/cavium_env/rf_card_cal_tip/test_report/test_20180830_161221.txt
@@ -0,0 +1,2 @@
+./test_report/test_20180830_161221.txt
+30/08/2018 16:12:21
diff --git a/octal/cavium_env/rf_card_cal_tip/test_report/test_20180830_162717.txt b/octal/cavium_env/rf_card_cal_tip/test_report/test_20180830_162717.txt
new file mode 100644
index 0000000000..01c80195e7
--- /dev/null
+++ b/octal/cavium_env/rf_card_cal_tip/test_report/test_20180830_162717.txt
@@ -0,0 +1,2 @@
+./test_report/test_20180830_162717.txt
+30/08/2018 16:27:17
diff --git a/octal/cavium_env/rf_card_cal_tip/test_report/test_20180831_141949.txt b/octal/cavium_env/rf_card_cal_tip/test_report/test_20180831_141949.txt
new file mode 100644
index 0000000000..4d52bb8ad9
--- /dev/null
+++ b/octal/cavium_env/rf_card_cal_tip/test_report/test_20180831_141949.txt
@@ -0,0 +1,2 @@
+./test_report/test_20180831_141949.txt
+31/08/2018 14:19:49
diff --git a/octal/cavium_env/rf_card_cal_tip/test_report/test_20181009_162514.txt b/octal/cavium_env/rf_card_cal_tip/test_report/test_20181009_162514.txt
new file mode 100644
index 0000000000..e5db33a533
--- /dev/null
+++ b/octal/cavium_env/rf_card_cal_tip/test_report/test_20181009_162514.txt
@@ -0,0 +1,2 @@
+./test_report/test_20181009_162514.txt
+09/10/2018 16:25:14
diff --git a/octal/cavium_env/rf_card_cal_tip/test_report/test_20181010_120025.txt b/octal/cavium_env/rf_card_cal_tip/test_report/test_20181010_120025.txt
new file mode 100644
index 0000000000..952b3186ab
--- /dev/null
+++ b/octal/cavium_env/rf_card_cal_tip/test_report/test_20181010_120025.txt
@@ -0,0 +1,2 @@
+./test_report/test_20181010_120025.txt
+10/10/2018 12:00:25
diff --git a/octal/cavium_env/rf_card_cal_tip/test_report/test_20181010_120311.txt b/octal/cavium_env/rf_card_cal_tip/test_report/test_20181010_120311.txt
new file mode 100644
index 0000000000..450a94ce9f
--- /dev/null
+++ b/octal/cavium_env/rf_card_cal_tip/test_report/test_20181010_120311.txt
@@ -0,0 +1,2 @@
+./test_report/test_20181010_120311.txt
+10/10/2018 12:03:11
diff --git a/octal/cavium_env/rf_card_cal_tip/test_report/test_20181010_120514.txt b/octal/cavium_env/rf_card_cal_tip/test_report/test_20181010_120514.txt
new file mode 100644
index 0000000000..14bd93abd9
--- /dev/null
+++ b/octal/cavium_env/rf_card_cal_tip/test_report/test_20181010_120514.txt
@@ -0,0 +1,2 @@
+./test_report/test_20181010_120514.txt
+10/10/2018 12:05:14
diff --git a/octal/cavium_env/rf_card_cal_tip/test_rx_sensitivity.py b/octal/cavium_env/rf_card_cal_tip/test_rx_sensitivity.py
new file mode 100644
index 0000000000..8ef1c503dc
--- /dev/null
+++ b/octal/cavium_env/rf_card_cal_tip/test_rx_sensitivity.py
@@ -0,0 +1,761 @@
+#!/usr/bin/python
+import common
+import sys
+import udp_server
+import test_config
+import im_calibration
+from time import sleep
+from im_calibration import Calibration
+
+class RxSens(Calibration):
+    
+    def __init__(self, rpt_hndl):
+        
+        self.rpt = rpt_hndl
+        self.init_pow = -60     # ESG test from this amplitude
+        self.udpsvr = ''
+        self.curr_pow = 0
+        self.sens_pow = []
+        self.loop_a = 5
+        self.loop_b = 10
+        self.per_pass = False
+        self.isFirstGetPer = True
+        self.zero_cnt = 0
+        self.coarse_pass_cnt = 0
+        
+    def exg_setup(self):
+        
+        type(self).exg.send_msg_to_server('*RST')
+        type(self).exg.send_msg_to_server('*IDN?')
+        in_msg = type(self).exg.recv_msg_frm_server()
+        print('recv ' + type(self).cfg.exg_ipaddr + '= ' + in_msg)
+        
+        #type(self).exg.send_msg_to_server(':RAD:ARB ON')
+        type(self).exg.send_msg_to_server(':RAD:ARB:WAV ' + type(self).cfg.exg_waveform)
+        print("EXG waveform " + type(self).cfg.exg_waveform)
+        
+        if self.cfg.cal_bandwidth == 20:
+            type(self).exg.send_msg_to_server(':RAD:ARB:SCL:RATE 30720000')
+        elif (self.cfg.cal_bandwidth == 15):
+            type(self).exg.send_msg_to_server(':RAD:ARB:SCL:RATE 23040000')
+        elif (self.cfg.cal_bandwidth == 10):
+            type(self).exg.send_msg_to_server(':RAD:ARB:SCL:RATE 15360000')
+        elif (self.cfg.cal_bandwidth == 5):
+            type(self).exg.send_msg_to_server(':RAD:ARB:SCL:RATE 7680000')
+            
+        type(self).exg.send_msg_to_server(':FREQ ' + str(test_config.ul_freq) + ' MHz')
+        type(self).exg.send_msg_to_server(':POW ' + str(self.init_pow) + ' dBm')
+        type(self).exg.send_msg_to_server(':OUTP:MOD ON')
+        type(self).exg.send_msg_to_server(':OUTP ON')
+        
+        #type(self).exg.send_msg_to_server(':RAD:ARB:TRIG:TYPE:CONT TRIG')
+        type(self).exg.send_msg_to_server(':RAD:ARB:TRIG:TYPE:CONT RES')
+        type(self).exg.send_msg_to_server(':RAD:ARB:TRIG EXT')
+        type(self).exg.send_msg_to_server(':RAD:ARB:TRIG:EXT:DEL:STAT ON')
+        
+        if self.cfg.cal_bandwidth == 20:
+            sync_delay = '0.009947'
+        elif self.cfg.cal_bandwidth == 10:
+            sync_delay = '0.009900'
+        elif self.cfg.cal_bandwidth == 15:
+            sync_delay = '0.009930'
+        elif self.cfg.cal_bandwidth == 5:
+            sync_delay = '0.009807'
+        
+        type(self).exg.send_msg_to_server(':RAD:ARB:TRIG:EXT:DEL ' + 
+                                          sync_delay) # EXT delay
+        #type(self).exg.send_msg_to_server(':RAD:ARB:TRIG:EXT:DEL ON')
+        type(self).exg.send_msg_to_server(':RAD:ARB ON')
+        
+    def exg_sync_trigger(self):
+        
+        #type(self).exg.send_msg_to_server(':RAD:ARB:TRIG:TYPE:CONT TRIG')
+        type(self).exg.send_msg_to_server(':RAD:ARB:TRIG:TYPE:CONT RES')
+        
+    def mt8870a_setup(self, powVal):
+        
+        Waveform = ""
+        if self.cfg.cal_bandwidth == 20:
+            sync_delay = '9.99601'
+            Waveform = "'SmallCell_LTEFDD_FRC_A1-3_20M_163_61_1_HARQ-ACK'"
+        elif self.cfg.cal_bandwidth == 15:
+            sync_delay = '9.99680' #TODO: need to chect
+            Waveform = "'SmallCell_LTEFDD_FRC_A1-3_15M_163_61_1_HARQ-ACK'"
+        elif self.cfg.cal_bandwidth == 10:
+            sync_delay = '9.99770'
+            Waveform = "'SmallCell_LTEFDD_FRC_A1-3_10M_163_61_1_HARQ-ACK'"
+        elif self.cfg.cal_bandwidth == 5:
+            sync_delay = '9.99857'
+            Waveform = "'SmallCell_LTEFDD_FRC_A1-3_5M_163_61_1_HARQ-ACK'"
+        
+        #print 'MT8870A setup renew\n'
+        type(self).mt8870a.send_msg_to_server('*RST\n')
+        type(self).mt8870a.send_msg_to_server('SYST:LANG SCPI')
+        type(self).mt8870a.send_msg_to_server(':ROUT:PORT:CONN:DIR PORT3,PORT4')
+        #print 'MT8870A test setup\n'
+        type(self).mt8870a.send_msg_to_server(':INST SMALLCELL\n')
+        type(self).mt8870a.send_msg_to_server(':INST:SYST SG,ACT\n')
+        type(self).mt8870a.send_msg_to_server(':SOURce:GPRF:GEN:ARB:FILE:LOAD ' + Waveform)
+        type(self).mt8870a.send_msg_to_server('*WAI\n')
+        type(self).mt8870a.send_msg_to_server(':RAD:ARB:WAV ' + Waveform + ',1\n')
+        type(self).mt8870a.send_msg_to_server(':FREQ ' + str(test_config.ul_freq)  + 'MHZ\n')
+        type(self).mt8870a.send_msg_to_server(':POW ' + str(powVal) + 'DBM\n')
+        type(self).mt8870a.send_msg_to_server(':OUTP ON\n')
+        type(self).mt8870a.send_msg_to_server(':OUTP:MOD ON\n')
+        type(self).mt8870a.send_msg_to_server(':SOURce:GPRF:GEN:ARB:TRIG ON\n')
+        type(self).mt8870a.send_msg_to_server(':SOURce:GPRF:GEN:ARB:TRIG:DEL ' + 
+                                              sync_delay + 'ms\n')
+        type(self).mt8870a.send_msg_to_server(':SOURce:GPRF:GEN:ARB:TRIG:SLOP RISE\n')
+        type(self).mt8870a.send_msg_to_server(':SOURce:GPRF:GEN:ARB:WAV:REST\n')
+        type(self).mt8870a.send_msg_to_server(':INST:SYST 3GLTE_DL,ACT\n')
+        
+    def cmw500_setup(self, powVal):
+        
+        Waveform = ""
+        if self.cfg.cal_bandwidth == 20:
+            sync_delay = "0"
+            Waveform = "'D:\Rohde-Schwarz\CMW\Data\Waveform\CaviumFRC_20MHz.wv'"
+        elif self.cfg.cal_bandwidth == 15:
+            sync_delay = "0"
+            Waveform = "'D:\Rohde-Schwarz\CMW\Data\Waveform\CaviumFRC_15MHz.wv'"
+        elif self.cfg.cal_bandwidth == 10:
+            sync_delay = "0"
+            Waveform = "'D:\Rohde-Schwarz\CMW\Data\Waveform\CaviumFRC_10MHz.wv'"
+        elif self.cfg.cal_bandwidth == 5:
+            sync_delay = "0"
+            Waveform = "'D:\Rohde-Schwarz\CMW\Data\Waveform\CaviumFRC_5MHz.wv'"
+            
+        print "VSG Setup..."
+        type(self).cmw500.send_msg_to_server("SOUR:GPRF:GEN:BBM ARB")
+        type(self).cmw500.send_msg_to_server("SOUR:GPRF:GEN:ARB:FILE " + Waveform)
+        type(self).cmw500.send_msg_to_server("SOUR:GPRF:GEN:ARB:REP CONT")
+        type(self).cmw500.send_msg_to_server("SOUR:GPRF:GEN:LIST OFF")
+        type(self).cmw500.send_msg_to_server("TRIG:GPRF:GEN:ARB:SOUR 'Base1: External TRIG A'")
+        type(self).cmw500.send_msg_to_server("TRIG:GPRF:GEN:ARB:DEL " + sync_delay)
+        type(self).cmw500.send_msg_to_server("TRIG:GPRF:GEN:ARB:RETR ON")
+        type(self).cmw500.send_msg_to_server("TRIG:GPRF:GEN:ARB:AUT ON")
+        print "Start VSG..."
+        type(self).cmw500.send_msg_to_server("SOUR:GPRF:GEN:RFS:FREQ " + str(test_config.ul_freq)  + "MHz")
+        type(self).cmw500.send_msg_to_server("SOUR:GPRF:GEN:RFS:LEV " + str(powVal))
+        type(self).cmw500.send_msg_to_server("SOUR:GPRF:GEN:STAT ON")
+        type(self).cmw500.send_msg_to_server("*WAI")
+        type(self).cmw500.send_msg_to_server("SOURce:GPRF:GEN:STATe?")
+        in_msg = type(self).cmw500.recv_msg_frm_server()
+        line = in_msg.split('\n')
+        if (line[0] == "ON"):
+            print "VSG turn on"
+        else:
+            print "VSG can not turn on"
+            sys.exit()
+        
+    def start_enodb_rx(self):
+        
+        #type(self).enb.start_telnet_session()
+        type(self).enb.enb_login()
+        type(self).enb.enb_cd_usr_bin()
+        """
+        type(self).enb.enb_load_rf_driver() #TODO: remove after new rf driver tested
+        type(self).enb.enb_run_lsmLogDisp()
+        """
+        #if test_config.band > 32:
+        #    type(self).enb.enb_set_rfif_hab('rx')
+        
+        type(self).enb.rx_set_rf_drv_rf_card()
+        
+        if test_config.band > 32:
+            type(self).enb.enb_disable_all_TX()
+            type(self).enb.enb_set_zen_tdd_rx()
+        
+        #type(self).enb.enb_set_7ffeff00()
+        type(self).enb.enb_load_lfmsoft()
+        #type(self).enb.rx_load_test_vector()
+        #sleep(10)
+        
+        #TODO: remove after merge in kernel
+        #type(self).enb.enb_cd_etc()
+        #type(self).enb.enb_load_dsp_to_etc
+        #type(self).enb.enb_cd_usr_bin()
+        
+        print "running DSP..."
+        type(self).enb.enb_cd_tmpfs()
+        #type(self).enb.rx_display_bler()
+        type(self).enb.rx_run_dsp_app()
+        sleep(5)
+         
+        sync_val = type(self).enb.get_delay_sync_value()
+        
+        if (sync_val < 50) and (sync_val >= 0):
+            if (type(self).cfg.test_set == 'agilent'):
+                if self.cfg.cal_bandwidth == 20:
+                    sync_val = round(float((9.943 + sync_val)/1000), 6)
+                elif self.cfg.cal_bandwidth == 15:
+                    sync_val = round(float((9.930 + sync_val)/1000), 6)
+                elif self.cfg.cal_bandwidth == 10:
+                    sync_val = round(float((9.900 + sync_val)/1000), 6)
+                elif self.cfg.cal_bandwidth == 5:
+                    sync_val = round(float((9.807 + sync_val)/1000), 6)
+                else:
+                    sync_val = 0.009900
+                type(self).exg.send_msg_to_server(':RAD:ARB:TRIG:EXT:DEL ' + str(sync_val))
+            
+            elif (type(self).cfg.test_set == 'anritsu'):
+                if self.cfg.cal_bandwidth == 20:
+                    sync_delay = '9.99601'
+                elif self.cfg.cal_bandwidth == 15:
+                    sync_delay = '9.99680'
+                elif self.cfg.cal_bandwidth == 10:
+                    sync_delay = '9.99770'
+                elif self.cfg.cal_bandwidth == 5:
+                    sync_delay = '9.99857'
+                type(self).mt8870a.send_msg_to_server(':SOURce:GPRF:GEN:ARB:TRIG:DEL ' + 
+                                              sync_delay + 'ms\n')
+                          
+            elif (type(self).cfg.test_set == 'rs'):
+                if self.cfg.cal_bandwidth == 20:
+                    sync_delay = '0'
+                elif self.cfg.cal_bandwidth == 15:
+                    sync_delay = '0'
+                elif self.cfg.cal_bandwidth == 10:
+                    sync_delay = '0'
+                elif self.cfg.cal_bandwidth == 5:
+                    sync_delay = '0'
+                type(self).cmw500.send_msg_to_server("TRIG:GPRF:GEN:ARB:DEL " + sync_delay)
+                
+        
+    def exg_turn_off(self):
+        
+        type(self).exg.send_msg_to_server(':OUTP OFF')
+        type(self).exg.send_msg_to_server(':OUTP:MOD OFF')
+        
+        
+    def mt8870a_turn_off(self):
+        
+        type(self).mt8870a.send_msg_to_server(':SOUR:GPRF:GEN:STAT 0')
+        
+    def cmw500_turn_off(self):
+        
+        type(self).cmw500.send_msg_to_server("SOUR:GPRF:GEN:STAT OFF")
+        
+    def run(self):
+            
+        if (type(self).cfg.test_set == 'agilent'):
+            self.exg_setup()
+        elif (type(self).cfg.test_set == 'anritsu'):
+            self.mt8870a_setup(self.init_pow)
+        elif (type(self).cfg.test_set == 'rs'):
+            self.cmw500_setup(self.init_pow)
+        """
+        try:
+            self.udpsvr = udp_server.UdpServer(type(self).cfg.my_udp_ipaddr, 
+                                           type(self).cfg.my_udp_port)
+            self.udpsvr.start_socket()
+        except:
+            return -1
+        """
+        self.start_enodb_rx()
+        #common.hit_continue() # pause for logparser test
+        
+        # wait until throughput information comes out
+        detect_loop = 5
+        for cn in range(0, detect_loop):
+            try:
+                self.mesg = self.udpsvr.recv_frm_client()
+                start = self.mesg.find("Tput".encode("ascii"), 0)
+                if (start > 0):
+                    print "found throughput information"
+                    break
+                if (cn == (detect_loop-1)):
+                    print "no throughput message found"
+                    """
+                    self.udpsvr.udp_close()
+                    if (type(self).cfg.test_set == 'agilent'):
+                        self.exg_turn_off()
+                    elif (type(self).cfg.test_set == 'anritsu'):
+                        self.mt8870a_turn_off()
+                    self.end_sys(1)
+                    """
+                    sys.exit()
+            except:
+                pass
+                #print "RF driver message skipped"
+                
+        # clear buffer
+        for _ in range(10):
+            s = type(self).enb.tn.read_until((type(self).enb.pp_usrbin).encode("ascii"), 0.5)
+                
+        self.loop_a = (120 + self.init_pow)/10
+        type(self).enb.enb_cd_usr_bin()
+        for ant in range(2):
+            
+            print("\nTesting antenna port " + str(ant+1))
+            
+            if (ant == 0):
+                type(self).enb.enb_disable_RX2()
+                if (type(self).cfg.test_set == 'rs'):
+                    type(self).cmw500.send_msg_to_server("ROUTe:GPRF:GENerator:SCENario:SALone RFAC, TX1")
+                    
+            else:
+                type(self).enb.enb_disable_RX1()
+                if (type(self).cfg.test_set == 'rs'):
+                    type(self).cmw500.send_msg_to_server("ROUTe:GPRF:GENerator:SCENario:SALone RFBC, TX1")
+                sleep(5)
+            #common.hit_continue("check gain registers...")
+                
+            s = type(self).enb.tn.read_until((type(self).enb.pp_usrbin).encode("ascii"), 0.5)
+            
+            # coarse search
+            for cn in range(0, self.loop_a):
+                
+                self.per_pass = False
+                self.curr_pow = self.init_pow - 10*cn
+                print("\nVSG power = " + str(self.curr_pow) + ' dBm')
+                
+                if (type(self).cfg.test_set == 'agilent'):
+                    type(self).exg.send_msg_to_server(':POW ' + str(self.curr_pow) + ' dBm')
+                    self.exg_sync_trigger()
+                elif (type(self).cfg.test_set == 'anritsu'):
+                    self.mt8870a_setup(self.curr_pow)
+                elif (type(self).cfg.test_set == 'rs'):
+                    self.cmw500_setup(self.curr_pow)
+                
+                sleep(3)    # wait RX demodulation stable
+                
+                self.zero_cnt = 0
+                self.coarse_pass_cnt = 0
+                self.isFirstGetPer = True
+                for _ in range(0, self.loop_b):
+
+                    per, tput = self.get_per_tput()
+                    #per, tput = self.getPerFromLogParser()
+                    
+                    if tput >= 0:
+                        print 'PER ' + str(per) + '% Tput ' + str(tput)
+                        print ''
+                        
+                    if (per <= (type(self).cfg.bler_limit)):
+                        if (self.coarse_pass_cnt >= 3):
+                            print "VSG power " + str(self.curr_pow) + " dBm passed"
+                            self.per_pass = True
+                            break
+                        else:
+                            self.coarse_pass_cnt += 1
+                            continue
+                    
+                    if (tput == 0):
+                        self.zero_cnt = self.zero_cnt + 1
+                    
+                    if (self.zero_cnt == 3):
+                        print "go next"
+                        break
+                    
+                if (self.per_pass == False):
+                    if (cn == 0):
+                        print "RX sensitivity test failed"
+                        #self.udpsvr.udp_close()
+                        if (type(self).cfg.test_set == 'agilent'):
+                            self.exg_turn_off()
+                        elif (type(self).cfg.test_set == 'anritsu'):
+                            self.mt8870a_turn_off()
+                        elif (type(self).cfg.test_set == 'rs'):
+                            self.cmw500_turn_off()
+                        #self.end_sys()
+                        return
+                        #sys.exit()
+                    else:
+                        break
+    
+            # fine search
+            loop_fine_search = 20
+            loop_each_level = 10
+            for cs in range(0, loop_fine_search):
+                
+                self.per_pass = False
+                self.curr_pow = self.curr_pow + 1
+                print("\nVSG power = " + str(self.curr_pow) + ' dBm')
+                
+                if (type(self).cfg.test_set == 'agilent'):
+                    #print ':POW ' + str(self.curr_pow) + ' dBm'
+                    type(self).exg.send_msg_to_server(':POW ' + str(self.curr_pow) + ' dBm')
+                    #print "set EXG sync trigger"
+                    self.exg_sync_trigger()
+                elif (type(self).cfg.test_set == 'anritsu'):
+                    self.mt8870a_setup(self.curr_pow)
+                elif (type(self).cfg.test_set == 'rs'):
+                    self.cmw500_setup(self.curr_pow)
+                
+                sleep(3)    # wait RF power stable
+                
+                self.zero_cnt = 0
+                self.isFirstGetPer = True
+                for _ in range(0, loop_each_level):
+                    
+                    per, tput = self.get_per_tput()
+                    #print "receiving PER information from logparser..."
+                    #per, tput = self.getPerFromLogParser()
+                    
+                    if tput >= 0:
+                        print 'PER ' + str(per) + '% Tput ' + str(tput)
+                        print ''
+                    if (per < (type(self).cfg.bler_limit)):
+                        print "VSG power " + str(self.curr_pow) + " dBm passed"
+                        sen = self.curr_pow - type(self).cfg.rssi_cable_loss
+                        self.sens_pow.append(sen)
+                        self.per_pass = True
+                        break
+                    
+                    if (tput == 0):
+                        self.zero_cnt = self.zero_cnt + 1
+                    
+                    if (self.zero_cnt == 3):
+                        print "go next"
+                        break
+                
+                if (self.per_pass == True):
+                    break
+                
+                if (cs == 19):
+                    print "Sensitivity test failed"
+                    sys.exit()
+        
+        print ''
+        print "RX1 sensitivity = " + str(self.sens_pow[0]) + " dBm\n"
+        print "RX2 sensitivity = " + str(self.sens_pow[1]) + " dBm\n"
+        
+        #self.udpsvr.udp_close()
+        if (type(self).cfg.test_set == 'agilent'):
+            self.exg_turn_off()
+        elif (type(self).cfg.test_set == 'anritsu'):
+            self.mt8870a_turn_off()
+        elif (type(self).cfg.test_set == 'rs'):
+            self.cmw500_turn_off()
+        return self.sens_pow
+        
+        
+    def run_limit_test(self):
+        
+        if (type(self).cfg.test_set == 'agilent'):
+            self.exg_setup()
+        elif (type(self).cfg.test_set == 'anritsu'):
+            self.mt8870a_setup(self.init_pow)
+        elif (type(self).cfg.test_set == 'rs'):
+            self.cmw500_setup(self.init_pow)
+        """
+        try:
+            self.udpsvr = udp_server.UdpServer(type(self).cfg.my_udp_ipaddr, 
+                                           type(self).cfg.my_udp_port)
+            self.udpsvr.start_socket()
+        except:
+            return -1
+        """
+        self.start_enodb_rx()
+        print "waiting for result...."
+        
+        # wait until throughput comes out
+        detect_loop = 5
+        for cn in range(0, detect_loop):
+            try:
+                #self.mesg = self.udpsvr.recv_frm_client()
+                #print self.mesg
+                start = self.mesg.find("Tput".encode("ascii"), 0)
+                if (start > 0):
+                    print "found throughput information"
+                    break
+                if (cn == (detect_loop - 1)):
+                    print "no throughput message found"
+                    """
+                    self.udpsvr.udp_close()
+                    
+                    if (type(self).cfg.test_set == 'agilent'):
+                        self.exg_turn_off()
+                    elif (type(self).cfg.test_set == 'anritsu'):
+                        self.mt8870a_turn_off()
+                    
+                    self.end_sys(1)
+                    """
+                    sys.exit()
+            except:
+                pass
+                #print "RF driver message skipped"
+                
+        # clear buffer
+        for _ in range(10):
+            s = type(self).enb.tn.read_until((type(self).enb.pp_usrbin).encode("ascii"), 0.5)
+        
+        type(self).enb.enb_cd_usr_bin()
+        for ant in range(2):
+            
+            per = 100.0
+            tput = 0.0
+            print("Testing antenna port " + str(ant+1))
+            
+            if (ant == 0):
+                type(self).enb.enb_disable_RX2()
+                if (type(self).cfg.test_set == 'rs'):
+                    type(self).cmw500.send_msg_to_server("ROUTe:GPRF:GENerator:SCENario:SALone RFAC, TX1")
+            else:
+                type(self).enb.enb_disable_RX1()
+                if (type(self).cfg.test_set == 'rs'):
+                    type(self).cmw500.send_msg_to_server("ROUTe:GPRF:GENerator:SCENario:SALone RFBC, TX1")
+                sleep(5)
+                
+            s = type(self).enb.tn.read_until((type(self).enb.pp_usrbin).encode("ascii"), 0.5)
+            
+            # test limit
+            self.per_pass = False
+            self.curr_pow = type(self).cfg.sens_pass_limit + type(self).cfg.rssi_cable_loss
+            print("\nVSG power = " + str(self.curr_pow) + ' dBm')
+            
+            if (type(self).cfg.test_set == 'agilent'):
+                type(self).exg.send_msg_to_server(':POW ' + str(self.curr_pow) + ' dBm')
+                self.exg_sync_trigger()
+            elif (type(self).cfg.test_set == 'anritsu'):
+                self.mt8870a_setup(self.curr_pow)
+            elif (type(self).cfg.test_set == 'rs'):
+                self.cmw500_setup(self.curr_pow)
+            
+            sleep(3)    # wait RF power stable
+            #self.clear_telnet_message()
+            
+            self.isFirstGetPer = True
+            for _ in range(0, 10):
+                
+                per, tput = self.get_per_tput()
+                #per, tput = self.getPerFromLogParser()
+                
+                if tput >= 0:
+                    print 'PER ' + str(per) + '% Tput ' + str(tput)
+                    print ''
+                if (per < (type(self).cfg.bler_limit)):
+                    print "VSG power " + str(self.curr_pow) + " dBm passed"
+                    self.per_pass = True
+                    break
+            
+            if (self.per_pass == True):
+                self.sens_pow.append("PASS")
+            else:
+                self.sens_pow.append("FAIL")
+        
+        print ''
+        print "RX1 " + str(type(self).cfg.sens_pass_limit) + " dBm:" + self.sens_pow[0] + "\n"
+        print "RX2 " + str(type(self).cfg.sens_pass_limit) + " dBm:" + self.sens_pow[1] + "\n"
+        
+        if (type(self).cfg.test_report == True) and (im_calibration.is_test_all == True):
+            self.rpt.write('\nSensitivity:\n')
+            self.rpt.write("RX1 " + str(type(self).cfg.sens_pass_limit) + " dBm:" + self.sens_pow[0] + "\n")
+            self.rpt.write("RX2 " + str(type(self).cfg.sens_pass_limit) + " dBm:" + self.sens_pow[1] + "\n")
+        
+        #self.udpsvr.udp_close()
+        if (type(self).cfg.test_set == 'agilent'):
+            self.exg_turn_off()
+        elif (type(self).cfg.test_set == 'anritsu'):
+            self.mt8870a_turn_off()
+        elif (type(self).cfg.test_set == 'rs'):
+            self.cmw500_turn_off()
+        
+        return self.sens_pow
+
+
+    def run_continuous(self):
+        
+        if (type(self).cfg.test_set == 'agilent'):
+            self.exg_setup()
+        elif (type(self).cfg.test_set == 'anritsu'):
+            self.mt8870a_setup(self.init_pow)
+        elif (type(self).cfg.test_set == 'rs'):
+            self.cmw500_setup(self.init_pow)
+            
+        self.start_enodb_rx()
+        print "waiting for result...."
+        
+        # wait until throughput comes out
+        detect_loop = 5
+        for cn in range(0, detect_loop):
+            try:
+                #self.mesg = self.udpsvr.recv_frm_client()
+                #print self.mesg
+                start = self.mesg.find("Tput".encode("ascii"), 0)
+                if (start > 0):
+                    print "found throughput information"
+                    break
+                if (cn == (detect_loop - 1)):
+                    print "no throughput message found"
+                    sys.exit()
+            except:
+                pass
+                #print "RF driver message skipped"
+                
+        # clear buffer
+        for _ in range(10):
+            s = type(self).enb.tn.read_until((type(self).enb.pp_usrbin).encode("ascii"), 0.5)
+        
+        type(self).enb.enb_cd_usr_bin()
+            
+        per = 100.0
+        tput = 0.0
+        
+        if (type(self).cfg.test_set == 'rs'):
+            type(self).cmw500.send_msg_to_server("ROUTe:GPRF:GENerator:SCENario:SALone RFAC, TX1")
+            
+        s = type(self).enb.tn.read_until((type(self).enb.pp_usrbin).encode("ascii"), 0.5)
+        
+        # test limit
+        self.per_pass = False
+        self.curr_pow = self.init_pow + type(self).cfg.rssi_cable_loss
+        print("\nVSG output power is " + str(self.curr_pow) + ' dBm')
+        
+        if (type(self).cfg.test_set == 'agilent'):
+            type(self).exg.send_msg_to_server(':POW ' + str(self.curr_pow) + ' dBm')
+            self.exg_sync_trigger()
+        elif (type(self).cfg.test_set == 'anritsu'):
+            self.mt8870a_setup(self.curr_pow)
+        elif (type(self).cfg.test_set == 'rs'):
+            self.cmw500_setup(self.curr_pow)
+        
+        sleep(3)    # wait RF power stable
+        #self.clear_telnet_message()
+        
+        self.isFirstGetPer = True
+        print '\n*** Start receiving, press CTRL-C to stop. ***\n'
+        
+        try:
+            while True:
+                per, tput = self.get_per_tput()
+                #per, tput = self.getPerFromLogParser()
+                
+                if tput >= 0:
+                    print 'PER ' + str(per) + '% Tput ' + str(tput)
+                    print ''
+                
+        except KeyboardInterrupt:
+            print 'End of continue receive test'
+        
+            # instrument turn off
+            if (type(self).cfg.test_set == 'agilent'):
+                self.exg_turn_off()
+            elif (type(self).cfg.test_set == 'anritsu'):
+                self.mt8870a_turn_off()
+            elif (type(self).cfg.test_set == 'rs'):
+                self.cmw500_turn_off()
+            
+
+    def clear_telnet_message(self):
+        
+        for _ in range(8):
+            s = type(self).enb.tn.read_until((type(self).enb.pp_usrbin).encode("ascii"), 0.1)
+
+    def getPerFromLogParser(self):
+        
+        self.r_per = 100.0
+        self.pass_packets = -1
+        start = 0
+        
+        if (self.isFirstGetPer == True):
+            self.isFirstGetPer = False
+            for _ in range(20): # get rid unwanted messages
+                self.mesg = self.udpsvr.recv_frm_client()
+                #print "log1st :" + self.mesg
+                #self.rpt.write('log1st :' + self.mesg + '\n')
+        else:
+            for _ in range(10): # get rid unwanted messages
+                self.mesg = self.udpsvr.recv_frm_client()
+                #print "log2nd :" + self.mesg
+                #self.rpt.write('log2nd :' + self.mesg + '\n')
+        
+        test_loop = 20
+        for count in range(test_loop):
+            
+            self.mesg = self.udpsvr.recv_frm_client()
+            start = self.mesg.find("PER:".encode("ascii"), start)
+            #print "log777 :" + self.mesg
+            #self.rpt.write('log777 :' + self.mesg + '\n')
+            
+            if (start == -1):
+                if (count < (test_loop-1)):
+                    start = 0
+                    self.mesg = ""
+                    sleep(2)
+                    continue
+                else:
+                    print "log message failed"
+                    return (self.r_per, self.pass_packets)
+            else: break
+            
+        start += len("PER:")
+        self.per = self.mesg[start:self.mesg.find("Tput:".encode("ascii"), start)]
+        start = self.mesg.find("Tput:".encode("ascii"), start)
+        start += len("Tput:")
+        self.tput = self.mesg[start:self.mesg.find("kbps".encode("ascii"), start)]
+        try:
+            self.r_per = round(float(self.per.strip())*0.01, 2)
+            self.pass_packets = int(self.tput.strip())
+        except:
+            print "per convert error: " + self.mesg
+            print "start=" + str(start)
+            
+        #self.rpt.write('per ' + str(self.r_per) + ', passed ' + str(self.pass_packets) + '\n')
+        return (self.r_per, self.pass_packets)
+
+    def get_per_tput(self):
+        # read form PHY register
+        
+        self.total_packets = 0.0
+        self.pass_packets = 0.0
+        self.r_per = 100.0
+        
+        # put this line before call function
+        type(self).enb.tn_write(type(self).enb.pp_usrbin, "export OCTEON_REMOTE_PROTOCOL=linux")
+        
+        # clear the statistics
+        type(self).enb.tn.write("/usr/bin/oct-linux-memory -w 4 -c 1 0x10f0000a2b7d0 0\n".encode("ascii"))
+
+        #s = type(self).enb.tn.read_until((type(self).enb.pp_usrbin).encode("ascii"))
+        sleep(0.5) # balance packet delay
+        type(self).enb.tn.write("/usr/bin/oct-linux-memory -w 4 -c 1 0x10f0000a2b800 0\n".encode("ascii"))
+        
+        self.clear_telnet_message()
+        sleep(0.5) # wait for packets
+        
+        # get tested packets
+        type(self).enb.tn.write("/usr/bin/oct-linux-memory -w 4 -c 1 0x10f0000a2b7d0\n".encode("ascii"))
+
+        sleep(0.5)
+        s = type(self).enb.tn.read_until((type(self).enb.pp_usrbin).encode("ascii"))
+        s1 = type(self).enb.tn.read_until((type(self).enb.pp_usrbin).encode("ascii"))
+        #print s1
+        
+        type(self).enb.tn.write("/usr/bin/oct-linux-memory -w 4 -c 1 0x10f0000a2b800\n".encode("ascii"))
+
+        sleep(0.5)
+        s = type(self).enb.tn.read_until((type(self).enb.pp_usrbin).encode("ascii"))
+        s2 = type(self).enb.tn.read_until((type(self).enb.pp_usrbin).encode("ascii"))
+        #print s2
+        
+        start = 0
+        while(True):
+            start = s1.find("10f0000a2b7d0 : ".encode("ascii"), start)
+            if(start == -1): break
+            start += len("10f0000a2b7d0 : ")
+            total_packets_str = s1[start:start+8]
+            self.total_packets = int(str(total_packets_str), 16)
+            #print("Total subframes tested: " + str(self.total_packets))
+        
+        start = 0
+        while(True):
+            start = s2.find("10f0000a2b800 : ".encode("ascii"), start)
+            if(start == -1): break
+            start += len("10f0000a2b800 : ")
+            pass_packets_str = s2[start:start+8]
+            self.pass_packets = int(str(pass_packets_str),16)
+            #print("Number of subframes with CRC pass: " + str(self.pass_packets))
+        
+        #print("Tested subframes: " + str(self.total_packets))
+        
+        if (self.total_packets > 0) and (self.pass_packets > 0):
+            if (self.pass_packets >= self.total_packets):
+                self.r_per = 0.0
+            else:
+                self.r_per = round(100.0*(1.0 - 
+                        float(self.pass_packets)/float(self.total_packets)), 2)
+            
+        return (self.r_per, self.pass_packets)
+
diff --git a/octal/cavium_env/rf_card_cal_tip/test_rx_sensitivity.pyc b/octal/cavium_env/rf_card_cal_tip/test_rx_sensitivity.pyc
new file mode 100644
index 0000000000..3f9c15baa7
Binary files /dev/null and b/octal/cavium_env/rf_card_cal_tip/test_rx_sensitivity.pyc differ
diff --git a/octal/cavium_env/rf_card_cal_tip/test_tx_cfr.py b/octal/cavium_env/rf_card_cal_tip/test_tx_cfr.py
new file mode 100644
index 0000000000..22bae65e93
--- /dev/null
+++ b/octal/cavium_env/rf_card_cal_tip/test_tx_cfr.py
@@ -0,0 +1,319 @@
+#!/usr/bin/python
+
+"""
+Setup:
+1. Agilent MXA, connect cable to one of the antenna port of enodeB
+2. Set TFTP server, address and port as test_config
+3. Test after TX Power calibration and reference clock calibration are done
+"""
+
+#import sys
+import test_config
+import im_calibration
+from time import sleep
+from im_calibration import Calibration
+#import common
+
+class TestTxCfr(Calibration):
+    
+    def __init__(self, rpt_hndl, ch_gain, rf_gain, rf_shift_sat):
+        
+        self.rpt = rpt_hndl
+        self.got_evm_pwr = False
+        self.val_evm_pwr = 0.0
+        
+        self.res_txpwr = []
+        self.res_evm = []
+        self.optim_txpwr = []
+        self.extra_att = 0 # extra attenuation to protect amplifier
+        
+        # CFR parameters
+        self.ch_gain_addr = '0x10f000086ea08'
+        self.rf_gain_addr = '0x10f000086ea0c'
+        self.rf_shift_addr = '0x10f000086ea10'
+        self.ch_gain_val = ch_gain
+        self.rf_gain_val = rf_gain
+        self.rf_shift_sat_val = rf_shift_sat
+        # end of CFG parameters
+        
+        self.input_power = -10  # input power in dBm
+        self.signal_bw = type(self).cfg.cal_bandwidth   # input signal bandwidth
+        
+        if (self.cfg.cal_bandwidth == 5):
+            self.ltebw = 'B5M'
+            self.intbw = '4.5'
+            self.spabw = '10'
+        elif (self.cfg.cal_bandwidth == 10):
+            self.ltebw = 'B10M'
+            self.intbw = '9'
+            self.spabw = '20'
+        elif (self.cfg.cal_bandwidth == 15):
+            self.ltebw = 'B15M'
+            self.intbw = '13.5'
+            self.spabw = '25'
+        elif (self.cfg.cal_bandwidth == 20):
+            self.ltebw = 'B20M'
+            self.intbw = '18'
+            self.spabw = '30'
+        
+    def mxa_setup(self):
+        
+        type(self).mxa.send_msg_to_server('*RST')
+        #type(self).mxa.send_msg_to_server('*PSC')
+        type(self).mxa.send_msg_to_server(':INST LTE')
+        type(self).mxa.send_msg_to_server(':FREQ:CENT ' + str(test_config.dl_freq) + ' MHz')
+        type(self).mxa.send_msg_to_server(':DISP:MON:VIEW:WIND:TRAC:Y:RLEV 20')   # reference level
+        type(self).mxa.send_msg_to_server(':POW:ATT 40')               # attenuation
+        type(self).mxa.send_msg_to_server(':RAD:STAN:BAND ' + self.ltebw)   # LTE bandwidth
+        type(self).mxa.send_msg_to_server(':MON:FREQ:SPAN ' + self.spabw + ' MHz')     # frequency span
+        type(self).mxa.send_msg_to_server(':RAD:STAN:DIR DLIN')        # downlink
+        type(self).mxa.send_msg_to_server(':CONF:CEVM')
+        #type(self).mxa.send_msg_to_server(':CONF:EVM')
+        type(self).mxa.send_msg_to_server('EVM:CCAR0:DLIN:SYNC:ANT:NUMB ANT2')
+            
+    def set_mxa_chp_measure(self):
+        
+        type(self).mxa.send_msg_to_server(':INIT:CONT ON')
+        #type(self).mxa.send_msg_to_server(':INST:SEL SA')
+        type(self).mxa.send_msg_to_server(':INST:SEL LTE')
+        type(self).mxa.send_msg_to_server(':FREQ:CENT ' + str(test_config.dl_freq) + ' MHz')
+        type(self).mxa.send_msg_to_server(':CONF:CHP')
+        type(self).mxa.send_msg_to_server(':POW:ATT 40')
+        type(self).mxa.send_msg_to_server(':DISP:CHP:VIEW:WIND:TRAC:Y:RLEV 20 dBm')
+        #type(self).mxa.send_msg_to_server(':CHP:BAND:INT ' + self.intbw + ' MHz')
+        #type(self).mxa.send_msg_to_server(':CHP:FREQ:SPAN ' + self.spabw + ' MHz')
+        #type(self).mxa.send_msg_to_server(':CHP:AVER:COUN 10')
+        #type(self).mxa.send_msg_to_server(':CHP:AVER ON')
+        type(self).mxa.send_msg_to_server(':RAD:STAN:PRES ' + self.ltebw)   # LTE bandwidth
+        type(self).mxa.send_msg_to_server(':MON:FREQ:SPAN ' + self.spabw + ' MHz')
+        
+    def mt8870a_setup(self, freq_center):
+        
+        print 'Start VSA...'
+        type(self).mt8870a.send_msg_to_server(':BATC:BAND:FREQ:CENT ' + str(freq_center) + 'MHZ')
+        type(self).mt8870a.send_msg_to_server(':BATC:BAND:POW:RANG:ILEV ' + str(self.input_power))
+        type(self).mt8870a.send_msg_to_server(':BATC:CC:RAD:CBAN ' + str(self.signal_bw))
+        type(self).mt8870a.send_msg_to_server(':BATC:CC:RAD:TMOD TM1_1')
+        
+        type(self).mt8870a.send_msg_to_server(':TRIG:STAT OFF')
+        type(self).mt8870a.send_msg_to_server(':TRIG:SOUR IMM')
+        
+        type(self).mt8870a.send_msg_to_server(':BATC:CAPT:TIME:STAR 0')
+        type(self).mt8870a.send_msg_to_server(':BATC:CAPT:TIME:LENG 1')
+        
+        type(self).mt8870a.send_msg_to_server(':BATC:CAPT:TIME:UWEM:STAR 0')
+        type(self).mt8870a.send_msg_to_server(':BATC:CAPT:TIME:UWEM:LENG 140')
+        type(self).mt8870a.send_msg_to_server(':BATC:CC:PDCC:SYMB:NUMB 2')
+        
+        type(self).mt8870a.send_msg_to_server(':BATC:EVM ON')
+        type(self).mt8870a.send_msg_to_server('*WAI')
+        
+    def cmw500_setup(self, freq_center):
+        
+        print 'Start VSA...'
+        #if test_config.band > 32:
+        #    type(self).cmw500.send_msg_to_server("CONF:LTE:MEAS:ENB:DMOD TDD")
+        #else:
+        #    type(self).cmw500.send_msg_to_server("CONF:LTE:MEAS:ENB:DMOD FDD")
+        type(self).cmw500.send_msg_to_server("CONF:LTE:MEAS:ENB:DMOD FDD")    
+        type(self).cmw500.send_msg_to_server("CONF:LTE:MEAS:ENB:RFS:FREQ " + str(freq_center) + " MHz")
+        type(self).cmw500.send_msg_to_server("CONF:LTE:MEAS:ENB:RFS:ENP 35")
+        type(self).cmw500.send_msg_to_server("CONF:LTE:MEAS:ENB:RFS:UMAR 0")
+        
+        if (self.cfg.cal_bandwidth == 5):
+            type(self).cmw500.send_msg_to_server("CONF:LTE:MEAS:ENB:MEV:CBAN B050")
+        elif (self.cfg.cal_bandwidth == 10):
+            type(self).cmw500.send_msg_to_server("CONF:LTE:MEAS:ENB:MEV:CBAN B100")
+        elif (self.cfg.cal_bandwidth == 15):
+            type(self).cmw500.send_msg_to_server("CONF:LTE:MEAS:ENB:MEV:CBAN B150")
+        elif (self.cfg.cal_bandwidth == 20):
+            type(self).cmw500.send_msg_to_server("CONF:LTE:MEAS:ENB:MEV:CBAN B200")
+        
+        type(self).cmw500.send_msg_to_server("CONF:LTE:MEAS:ENB:MEV:RES:ALL ON,OFF,OFF,OFF,OFF,OFF,ON,OFF,OFF")
+        type(self).cmw500.send_msg_to_server("CONF:LTE:MEAS:ENB:MEV:SCO:MOD 10")
+        type(self).cmw500.send_msg_to_server("CONF:LTE:MEAS:ENB:MEV:MOEX ON")
+        type(self).cmw500.send_msg_to_server("CONF:LTE:MEAS:ENB:MEV:REP SING")
+        type(self).cmw500.send_msg_to_server("CONF:LTE:MEAS:ENB:MEV:ETES ETM11")
+        type(self).cmw500.send_msg_to_server("CONF:LTE:MEAS:ENB:MEV:PLC 1")
+        type(self).cmw500.send_msg_to_server("TRIG:LTE:MEAS:ENB:MEV:SOUR 'Free Run (Fast Sync)'")
+        
+    def start_enodeb_tx(self):
+        
+        type(self).enb.enb_login()
+        
+        # default is PWM control in booting
+        if (type(self).cfg.tcxo_ctrl == "dax"):
+            print("load ext dac clock control")
+            type(self).enb.enb_cd_usr_bin()
+            type(self).enb.enb_load_dax()   # do ext DAC control
+    
+        if test_config.band > 32:
+            type(self).enb.enb_cd_usr_bin()
+            type(self).enb.enb_set_zen_tdd_tx()
+        
+        self.get_optimized_txpwr_record()
+        self.set_extra_attenuation()    
+        
+        # set CFR parameters
+        #type(self).enb.remote_memory_32bit_set(1, self.ch_gain_addr, self.ch_gain_val)
+        #type(self).enb.remote_memory_32bit_set(1, self.rf_gain_addr, self.rf_gain_val)
+        #type(self).enb.remote_memory_32bit_set(1, self.rf_shift_addr, self.rf_shift_sat_val)
+            
+        type(self).enb.enb_cd_tmpfs()
+        type(self).enb.enb_run_dsp_app_dl()
+        
+        #type(self).enb.enb_cd_usr_bin()
+        # set CFR parameters
+        type(self).enb.remote_memory_32bit_set(1, self.ch_gain_addr, self.ch_gain_val)
+        type(self).enb.remote_memory_32bit_set(1, self.rf_gain_addr, self.rf_gain_val)
+        type(self).enb.remote_memory_32bit_set(1, self.rf_shift_addr, self.rf_shift_sat_val)
+    
+    def get_optimized_txpwr_record(self):
+        
+        type(self).enb.enb_cd_usr_bin()
+        
+        # primary tx power
+        type(self).enb.tn.write("oncpu 0 /usr/bin/" + \
+                                type(self).cfg.rf_driver + " <<  EOF\n")
+        type(self).enb.tn.write("e rrc 1 rmpp q\n")
+        type(self).enb.tn.write("EOF\n")
+        
+        _ = type(self).enb.tn.read_until("rec_version".encode("ascii"), 5)
+        res = type(self).enb.tn.read_until("/usr/bin".encode("ascii"), 5)
+        
+        start = 0
+        start = res.find("tx_max_pwr_prim = ".encode("ascii"), start)
+        start += len("tx_max_pwr_prim = ")
+        pwr1 = res[start:res.find('\n'.encode("ascii"), start)]
+        
+        # secondary tx power
+        type(self).enb.tn.write("oncpu 0 /usr/bin/" + \
+                                type(self).cfg.rf_driver + " <<  EOF\n")
+        type(self).enb.tn.write("e rrc 1 rmps q\n")
+        type(self).enb.tn.write("EOF\n")
+        
+        _ = type(self).enb.tn.read_until("rec_version".encode("ascii"), 5)
+        res = type(self).enb.tn.read_until("/usr/bin".encode("ascii"), 5)
+        
+        start = 0
+        start = res.find("tx_max_pwr_sec = ".encode("ascii"), start)
+        start += len("tx_max_pwr_sec = ")
+        pwr2 = res[start:res.find('\n'.encode("ascii"), start)]
+        
+        self.optim_txpwr.append(round(float(pwr1.strip()), 2))
+        self.optim_txpwr.append(round(float(pwr2.strip()), 2))
+        print "pwr1=" + str(self.optim_txpwr[0]) + ", pwr2=" + str(self.optim_txpwr[1])
+    
+    def set_extra_attenuation(self):
+        
+        cmd = "t 1 " + str(int(self.optim_txpwr[0]) - self.extra_att) + \
+            " t 2 " + str(int(self.optim_txpwr[1]) - self.extra_att) + " q"
+            
+        type(self).enb.enb_rf_drv_call_cmd(cmd)
+    
+    # Find max TX power and check EVM
+    def get_tx_cfr_evm(self):
+        
+        if (type(self).cfg.test_report == True) and (im_calibration.is_test_all == True):
+            self.rpt.write('\nTX Max Available Power:\n')
+        
+        for ant in range(2):
+            print('')
+            print("Testing antenna port " + str(ant+1))
+            
+            if (ant == 0):
+                type(self).enb.enb_disable_TX2()
+                if (type(self).cfg.test_set == 'rs'):
+                    type(self).cmw500.send_msg_to_server("ROUTe:LTE:MEAS:ENB:SCENario:SALone RFAC, RX1")
+            else:
+                type(self).enb.enb_disable_TX1()
+                if (type(self).cfg.test_set == 'rs'):
+                    type(self).cmw500.send_msg_to_server("ROUTe:LTE:MEAS:ENB:SCENario:SALone RFBC, RX1")
+            
+            sleep(3)
+                    
+            if (type(self).cfg.test_set == 'agilent'):
+                #type(self).enb.enb_enable_all_TX()
+                self.mxa_setup()
+                if (ant == 0):
+                    type(self).mxa.send_msg_to_server('EVM:CCAR0:DLIN:SYNC:ANT:PORT P0')
+                    type(self).mxa.send_msg_to_server('EVM:CCAR0:DLIN:SYNC:SS:ANT:PORT P0')
+                else:
+                    type(self).mxa.send_msg_to_server('EVM:CCAR0:DLIN:SYNC:ANT:PORT P1')
+                    type(self).mxa.send_msg_to_server('EVM:CCAR0:DLIN:SYNC:SS:ANT:PORT P1')
+                sleep(2)
+                
+                type(self).mxa.send_msg_to_server(':READ:CEVM?')
+                #type(self).mxa.send_msg_to_server(':READ:EVM?')
+                in_msg = type(self).mxa.recv_msg_frm_server()
+                #print('recv ' + type(self).cfg.mxa_ipaddr + '= ' + in_msg)
+                
+                line = in_msg.split(',')
+                evm = round(float(line[0]), 2)
+                txpwr = round(float(line[11]), 2)
+            
+            elif (type(self).cfg.test_set == 'anritsu'):
+                """
+                type(self).mt8870a.send_msg_to_server(':INIT:MODE:SING')
+                type(self).mt8870a.send_msg_to_server('*WAI')
+                type(self).mt8870a.send_msg_to_server(':FETC:BATC1?')
+                type(self).mt8870a.send_msg_to_server('*WAI')
+                in_msg = type(self).mt8870a.recv_msg_frm_server()
+                print in_msg
+                line = in_msg.split(',')
+                """
+                evm = round(float(line[3]), 2)
+                txpwr = round(float(line[11]), 2) #TODO: need to check
+                
+            elif (type(self).cfg.test_set == 'rs'):
+                    
+                    type(self).cmw500.send_msg_to_server("INIT:LTE:MEAS:ENB:MEV")
+                    type(self).cmw500.send_msg_to_server("*WAI")
+                    type(self).cmw500.send_msg_to_server("FETC:LTE:MEAS:ENB:MEV:MOD:AVER?")
+                    in_msg = type(self).cmw500.recv_msg_frm_server()
+                    line = in_msg.split(',')
+                    if (int(line[0]) != 0):
+                        print in_msg
+                    evm = round(float(line[3]), 2)
+                    txpwr = round(float(line[17]), 2)  
+                    
+                
+            self.res_evm.append(evm)
+            self.res_txpwr.append(txpwr + type(self).cfg.txpwr_cable_loss)
+            
+        #print('')
+        print "Channel Gain Shift Off Value = " + str(self.ch_gain_val)
+        print "RF Gain Control = " + str(self.rf_gain_val)
+        print "RF Shift Value = " + str(self.rf_shift_sat_val)
+        print "ANT1, EVM=" + str(self.res_evm[0]) + "%, TX PWR=" + \
+                str(self.res_txpwr[0]) + "dBm"
+        print "ANT2, EVM=" + str(self.res_evm[1]) + "%, TX PWR=" + \
+                str(self.res_txpwr[1]) + "dBm"
+        print ""
+        
+        if (type(self).cfg.test_report == True):
+            self.rpt.write("Channel Gain Shift Off Value = " + str(self.ch_gain_val) + "\n")
+            self.rpt.write("RF Gain Control = " + str(self.rf_gain_val) + "\n")
+            self.rpt.write("RF Shift Value = " + str(self.rf_shift_sat_val) + "\n")
+            self.rpt.write("ANT1, EVM=" + str(self.res_evm[0]) + "%, TX PWR=" + \
+                           str(self.res_txpwr[0]) + "dBm\n")
+            self.rpt.write("ANT2, EVM=" + str(self.res_evm[1]) + "%, TX PWR=" + \
+                           str(self.res_txpwr[1]) + "dBm\n\n")
+            self.rpt.flush()
+
+    def run(self):
+        
+        self.start_enodeb_tx()
+        
+        if (type(self).cfg.test_set == 'agilent'):
+            self.mxa_setup()
+        elif (type(self).cfg.test_set == 'anritsu'):
+            self.mt8870a_setup(test_config.dl_freq)
+        elif (type(self).cfg.test_set == 'rs'):
+            self.cmw500_setup(test_config.dl_freq)
+            
+        sleep(3)
+        
+        #self.set_mxa_chp_measure()
+        self.get_tx_cfr_evm()
+        
diff --git a/octal/cavium_env/rf_card_cal_tip/test_tx_cfr.pyc b/octal/cavium_env/rf_card_cal_tip/test_tx_cfr.pyc
new file mode 100644
index 0000000000..dba2bb649e
Binary files /dev/null and b/octal/cavium_env/rf_card_cal_tip/test_tx_cfr.pyc differ
diff --git a/octal/cavium_env/rf_card_cal_tip/test_tx_cw.py b/octal/cavium_env/rf_card_cal_tip/test_tx_cw.py
new file mode 100644
index 0000000000..8e95790af1
--- /dev/null
+++ b/octal/cavium_env/rf_card_cal_tip/test_tx_cw.py
@@ -0,0 +1,57 @@
+#!/usr/bin/python
+
+"""
+Setup:
+1. Agilent MXA, connect to primary antenna port of enodeB
+2. Set TFTP server, address and port as test_config
+"""
+
+import common
+import test_config
+from im_calibration import Calibration
+
+class TestTxCw(Calibration):
+    
+    def __init__(self, rpt_hndl):
+        
+        self.fp = rpt_hndl
+        self.slope_1 = ''
+        self.offset_1 = ''
+        self.slope_2 = ''
+        self.offset_2 = ''
+        
+    def mxa_setup(self):
+        
+        type(self).mxa.send_msg_to_server(':INIT:CONT ON')
+        type(self).mxa.send_msg_to_server(':INST:SEL SA')
+        type(self).mxa.send_msg_to_server(':FREQ:CENT ' + str(test_config.dl_freq) + ' MHz')
+        type(self).mxa.send_msg_to_server(':CONF:CHP')
+        type(self).mxa.send_msg_to_server(':POW:ATT 30')
+        type(self).mxa.send_msg_to_server(':DISP:CHP:VIEW:WIND:TRAC:Y:RLEV 20 dBm')
+        type(self).mxa.send_msg_to_server(':CHP:BAND:INT 9MHz')
+        type(self).mxa.send_msg_to_server(':CHP:FREQ:SPAN 20 MHz')
+        type(self).mxa.send_msg_to_server(':CHP:AVER:COUN 25')
+        type(self).mxa.send_msg_to_server(':CHP:AVER ON')
+        
+    def start_enodeb_tx(self):
+        
+        type(self).enb.enb_login()
+        #type(self).enb.get_macaddr()
+        type(self).enb.enb_set_1pps('tx')
+
+        type(self).enb.enb_cd_usr_bin()
+        type(self).enb.enb_set_rf_drv_rf_card()
+        
+        if (type(self).cfg.tcxo_ctrl == "pwm"):
+            print("load pwm clock control")
+            type(self).enb.enb_load_pwm()   # do PWM control
+        elif (type(self).cfg.tcxo_ctrl == "dax"):
+            print("load ext dac clock control")
+            type(self).enb.enb_load_dax()   # do ext DAC control
+        
+    def run(self):
+        
+        self.mxa_setup()
+        self.start_enodeb_tx()
+        common.hit_continue()
+        
\ No newline at end of file
diff --git a/octal/cavium_env/rf_card_cal_tip/test_tx_cw.pyc b/octal/cavium_env/rf_card_cal_tip/test_tx_cw.pyc
new file mode 100644
index 0000000000..e6e2c25cb7
Binary files /dev/null and b/octal/cavium_env/rf_card_cal_tip/test_tx_cw.pyc differ
diff --git a/octal/cavium_env/rf_card_cal_tip/test_tx_evm.py b/octal/cavium_env/rf_card_cal_tip/test_tx_evm.py
new file mode 100644
index 0000000000..d1bbe6c5a4
--- /dev/null
+++ b/octal/cavium_env/rf_card_cal_tip/test_tx_evm.py
@@ -0,0 +1,418 @@
+#!/usr/bin/python
+
+"""
+Setup:
+1. Agilent MXA, connect cable to one of the antenna port of enodeB
+2. Set TFTP server, address and port as test_config
+3. Test after TX Power calibration and reference clock calibration are done
+"""
+
+import sys
+import test_config
+import im_calibration
+from time import sleep
+from im_calibration import Calibration
+#import common
+
+class TestTxEvm(Calibration):
+    
+    def __init__(self, rpt_hndl, rec_num):
+        
+        self.rpt = rpt_hndl
+        self.rn = rec_num
+        self.got_evm_pwr = False
+        self.val_evm_pwr = 0.0
+        
+        # TX power & EVM
+        self.data = []
+        self.elems = []
+        self.opt_res = []
+        self.first_loop = True
+        # end of TX power & EVM
+        
+        self.input_power = -10  # input power in dBm
+        self.signal_bw = type(self).cfg.cal_bandwidth   # input signal bandwidth
+        
+        if (self.cfg.cal_bandwidth == 5):
+            self.ltebw = 'B5M'
+            self.intbw = '4.5'
+            self.spabw = '10'
+        elif (self.cfg.cal_bandwidth == 10):
+            self.ltebw = 'B10M'
+            self.intbw = '9'
+            self.spabw = '20'
+        elif (self.cfg.cal_bandwidth == 15):
+            self.ltebw = 'B15M'
+            self.intbw = '13.5'
+            self.spabw = '25'
+        elif (self.cfg.cal_bandwidth == 20):
+            self.ltebw = 'B20M'
+            self.intbw = '18'
+            self.spabw = '30'
+        
+    def mxa_setup(self):
+        
+        type(self).mxa.send_msg_to_server('*RST')
+        #type(self).mxa.send_msg_to_server('*PSC')
+        type(self).mxa.send_msg_to_server(':INST LTE')
+        type(self).mxa.send_msg_to_server(':FREQ:CENT ' + str(test_config.dl_freq) + ' MHz')
+        type(self).mxa.send_msg_to_server(':DISP:MON:VIEW:WIND:TRAC:Y:RLEV 20')   # reference level
+        type(self).mxa.send_msg_to_server(':POW:ATT 40')               # attenuation
+        type(self).mxa.send_msg_to_server(':RAD:STAN:BAND ' + self.ltebw)   # LTE bandwidth
+        type(self).mxa.send_msg_to_server(':MON:FREQ:SPAN ' + self.spabw + ' MHz')     # frequency span
+        type(self).mxa.send_msg_to_server(':RAD:STAN:DIR DLIN')        # downlink
+        type(self).mxa.send_msg_to_server(':CONF:CEVM')
+        #type(self).mxa.send_msg_to_server(':CONF:EVM')
+        type(self).mxa.send_msg_to_server('EVM:CCAR0:DLIN:SYNC:ANT:NUMB ANT2')
+            
+    def set_mxa_chp_measure(self):
+        
+        type(self).mxa.send_msg_to_server(':INIT:CONT ON')
+        #type(self).mxa.send_msg_to_server(':INST:SEL SA')
+        type(self).mxa.send_msg_to_server(':INST:SEL LTE')
+        type(self).mxa.send_msg_to_server(':FREQ:CENT ' + str(test_config.dl_freq) + ' MHz')
+        type(self).mxa.send_msg_to_server(':CONF:CHP')
+        type(self).mxa.send_msg_to_server(':POW:ATT 40')
+        type(self).mxa.send_msg_to_server(':DISP:CHP:VIEW:WIND:TRAC:Y:RLEV 20 dBm')
+        #type(self).mxa.send_msg_to_server(':CHP:BAND:INT ' + self.intbw + ' MHz')
+        #type(self).mxa.send_msg_to_server(':CHP:FREQ:SPAN ' + self.spabw + ' MHz')
+        #type(self).mxa.send_msg_to_server(':CHP:AVER:COUN 10')
+        #type(self).mxa.send_msg_to_server(':CHP:AVER ON')
+        type(self).mxa.send_msg_to_server(':RAD:STAN:PRES ' + self.ltebw)   # LTE bandwidth
+        type(self).mxa.send_msg_to_server(':MON:FREQ:SPAN ' + self.spabw + ' MHz')
+        
+    def mt8870a_setup(self, freq_center):
+        
+        print 'Start VSA...'
+        type(self).mt8870a.send_msg_to_server(':BATC:BAND:FREQ:CENT ' + str(freq_center) + 'MHZ')
+        type(self).mt8870a.send_msg_to_server(':BATC:BAND:POW:RANG:ILEV ' + str(self.input_power))
+        type(self).mt8870a.send_msg_to_server(':BATC:CC:RAD:CBAN ' + str(self.signal_bw))
+        type(self).mt8870a.send_msg_to_server(':BATC:CC:RAD:TMOD TM1_1')
+        
+        type(self).mt8870a.send_msg_to_server(':TRIG:STAT OFF')
+        type(self).mt8870a.send_msg_to_server(':TRIG:SOUR IMM')
+        
+        type(self).mt8870a.send_msg_to_server(':BATC:CAPT:TIME:STAR 0')
+        type(self).mt8870a.send_msg_to_server(':BATC:CAPT:TIME:LENG 1')
+        
+        type(self).mt8870a.send_msg_to_server(':BATC:CAPT:TIME:UWEM:STAR 0')
+        type(self).mt8870a.send_msg_to_server(':BATC:CAPT:TIME:UWEM:LENG 140')
+        type(self).mt8870a.send_msg_to_server(':BATC:CC:PDCC:SYMB:NUMB 2')
+        
+        type(self).mt8870a.send_msg_to_server(':BATC:EVM ON')
+        type(self).mt8870a.send_msg_to_server('*WAI')
+        
+    def cmw500_setup(self, freq_center):
+        
+        print 'Start VSA...'
+        #if test_config.band > 32:
+        #    type(self).cmw500.send_msg_to_server("CONF:LTE:MEAS:ENB:DMOD TDD")
+        #else:
+        #    type(self).cmw500.send_msg_to_server("CONF:LTE:MEAS:ENB:DMOD FDD")
+        type(self).cmw500.send_msg_to_server("CONF:LTE:MEAS:ENB:DMOD FDD")    
+        type(self).cmw500.send_msg_to_server("CONF:LTE:MEAS:ENB:RFS:FREQ " + str(freq_center) + " MHz")
+        type(self).cmw500.send_msg_to_server("CONF:LTE:MEAS:ENB:RFS:ENP 35")
+        type(self).cmw500.send_msg_to_server("CONF:LTE:MEAS:ENB:RFS:UMAR 0")
+        
+        if (self.cfg.cal_bandwidth == 5):
+            type(self).cmw500.send_msg_to_server("CONF:LTE:MEAS:ENB:MEV:CBAN B050")
+        elif (self.cfg.cal_bandwidth == 10):
+            type(self).cmw500.send_msg_to_server("CONF:LTE:MEAS:ENB:MEV:CBAN B100")
+        elif (self.cfg.cal_bandwidth == 15):
+            type(self).cmw500.send_msg_to_server("CONF:LTE:MEAS:ENB:MEV:CBAN B150")
+        elif (self.cfg.cal_bandwidth == 20):
+            type(self).cmw500.send_msg_to_server("CONF:LTE:MEAS:ENB:MEV:CBAN B200")
+        
+        type(self).cmw500.send_msg_to_server("CONF:LTE:MEAS:ENB:MEV:RES:ALL ON,OFF,OFF,OFF,OFF,OFF,ON,OFF,OFF")
+        type(self).cmw500.send_msg_to_server("CONF:LTE:MEAS:ENB:MEV:SCO:MOD 10")
+        type(self).cmw500.send_msg_to_server("CONF:LTE:MEAS:ENB:MEV:MOEX ON")
+        type(self).cmw500.send_msg_to_server("CONF:LTE:MEAS:ENB:MEV:REP SING")
+        type(self).cmw500.send_msg_to_server("CONF:LTE:MEAS:ENB:MEV:ETES ETM11")
+        type(self).cmw500.send_msg_to_server("CONF:LTE:MEAS:ENB:MEV:PLC 1")
+        type(self).cmw500.send_msg_to_server("TRIG:LTE:MEAS:ENB:MEV:SOUR 'Free Run (Fast Sync)'")
+        
+    def start_enodeb_tx(self):
+        
+        type(self).enb.enb_login()
+        
+        # default is PWM control in booting
+        if (type(self).cfg.tcxo_ctrl == "dax"):
+            print("load ext dac clock control")
+            type(self).enb.enb_cd_usr_bin()
+            type(self).enb.enb_load_dax()   # do ext DAC control
+    
+        if test_config.band > 32:
+            type(self).enb.enb_cd_usr_bin()
+            type(self).enb.enb_set_zen_tdd_tx()
+            
+        type(self).enb.enb_cd_tmpfs()
+        type(self).enb.enb_run_dsp_app_dl()
+    
+    # Find max TX power and check EVM
+    def get_tx_evm_power(self):
+        """
+        type(self).enb.enb_cd_usr_bin()
+        type(self).enb.enb_set_rf_drv_rf_card()
+        sleep(3)
+        
+        if (type(self).cfg.cal_bandwidth >= 15):
+            cmd = "w 0x02 0x4e q"
+        else:
+            cmd = "w 0x02 0x5e q"
+            
+        type(self).enb.enb_rf_drv_call_cmd(cmd)
+        sleep(2)
+        """
+        if (type(self).cfg.test_report == True) and (im_calibration.is_test_all == True):
+            self.rpt.write('\nTX Max Available Power:\n')
+        
+        for ant in range(2):
+            print('')
+            print("Testing antenna port " + str(ant+1))
+            self.first_loop = True
+            self.elems = []
+            
+            if (ant == 0):
+                type(self).enb.enb_disable_TX2()
+                if (type(self).cfg.test_set == 'rs'):
+                    type(self).cmw500.send_msg_to_server("ROUTe:LTE:MEAS:ENB:SCENario:SALone RFAC, RX1")
+            else:
+                type(self).enb.enb_disable_TX1()
+                if (type(self).cfg.test_set == 'rs'):
+                    type(self).cmw500.send_msg_to_server("ROUTe:LTE:MEAS:ENB:SCENario:SALone RFBC, RX1")
+                #sleep(3)
+            
+            #self.mxa_setup()
+            sleep(2)
+            
+            for att in range(type(self).cfg.max_atten - 5):
+                
+                att2 = (type(self).cfg.max_atten - 1) - att
+                cmd = "a 1 " + str(att2) + " a 2 " + str(att2) + " q"
+                #print "cmd: a 1 " + str(att2) + " a 2 " + str(att2) + " q"
+                type(self).enb.enb_rf_drv_call_cmd(cmd)
+                
+                if (type(self).cfg.test_set == 'agilent'):
+                    
+                    self.set_mxa_chp_measure()
+                    sleep(2) #(5)
+                    type(self).mxa.send_msg_to_server(':FETC:CHP:CHP?')
+                    in_msg = type(self).mxa.recv_msg_frm_server()
+                    chpwr = round(float(in_msg), 2) + type(self).cfg.txpwr_cable_loss
+                    #print "chpwr = " + str(chpwr) + "dBm"
+                    #common.hit_continue("check 2")
+                elif (type(self).cfg.test_set == 'anritsu'):
+                    if (type(self).cfg.cal_bandwidth >= 15):
+                        self.input_power = 30 - att2
+                    else:
+                        self.input_power = 25 - att2
+                        
+                    type(self).mt8870a.send_msg_to_server(':BATC:BAND:POW:RANG:ILEV ' + str(self.input_power))
+                    type(self).mt8870a.send_msg_to_server(':INIT:MODE:SING')
+                    type(self).mt8870a.send_msg_to_server('*WAI')
+                    sleep(2)
+                    type(self).mt8870a.send_msg_to_server(':FETC:BATC1?')
+                    type(self).mt8870a.send_msg_to_server('*WAI')
+                    in_msg = type(self).mt8870a.recv_msg_frm_server()
+                    #print in_msg
+                    line = in_msg.split(',')
+                    chpwr = round(float(line[5]), 2)  + type(self).cfg.txpwr_cable_loss
+                    #print('recv ' + type(self).cfg.mt8870a_ipaddr + '= ' + str(chpwr))
+                
+                elif (type(self).cfg.test_set == 'rs'):
+                    
+                    type(self).cmw500.send_msg_to_server("INIT:LTE:MEAS:ENB:MEV")
+                    type(self).cmw500.send_msg_to_server("*WAI")
+                    #sleep(3)
+                    #type(self).cmw500.send_msg_to_server("FETC:LTE:MEAS:ENB:MEV:STAT?")
+                    type(self).cmw500.send_msg_to_server("FETC:LTE:MEAS:ENB:MEV:MOD:AVER?")
+                    in_msg = type(self).cmw500.recv_msg_frm_server()
+                    line = in_msg.split(',')
+                    if (int(line[0]) != 0):
+                        print in_msg
+                    chpwr = round(float(line[17]), 2)  + type(self).cfg.txpwr_cable_loss
+                    print('recv ' + type(self).cfg.cmw500_ipaddr + '= ' + str(chpwr))
+                
+                # check if TX can reach TX power criteria
+                if (chpwr < type(self).cfg.cr_txpwr_min):
+
+                    if (att2 == 5):
+                        print "Fail, power " + str(chpwr) + " dBm lower than MIN TX power criteria"
+                        if (ant == 1):
+                            self.end_sys()
+                            sys.exit()
+                        else:
+                            break
+                        
+                # check if EVM less than criteria
+                else:
+                    
+                    if (type(self).cfg.test_set == 'agilent'):
+                        #type(self).enb.enb_enable_all_TX()
+                        self.mxa_setup()
+                        if (ant == 0):
+                            type(self).mxa.send_msg_to_server('EVM:CCAR0:DLIN:SYNC:ANT:PORT P0')
+                            type(self).mxa.send_msg_to_server('EVM:CCAR0:DLIN:SYNC:SS:ANT:PORT P0')
+                        else:
+                            type(self).mxa.send_msg_to_server('EVM:CCAR0:DLIN:SYNC:ANT:PORT P1')
+                            type(self).mxa.send_msg_to_server('EVM:CCAR0:DLIN:SYNC:SS:ANT:PORT P1')
+                        sleep(2)
+                        
+                        type(self).mxa.send_msg_to_server(':READ:CEVM?')
+                        #type(self).mxa.send_msg_to_server(':READ:EVM?')
+                        in_msg = type(self).mxa.recv_msg_frm_server()
+                        #print('recv ' + type(self).cfg.mxa_ipaddr + '= ' + in_msg)
+                        
+                        line = in_msg.split(',')
+                        evm = round(float(line[0]), 2)
+                    
+                    elif (type(self).cfg.test_set == 'anritsu'):
+                        """
+                        type(self).mt8870a.send_msg_to_server(':INIT:MODE:SING')
+                        type(self).mt8870a.send_msg_to_server('*WAI')
+                        type(self).mt8870a.send_msg_to_server(':FETC:BATC1?')
+                        type(self).mt8870a.send_msg_to_server('*WAI')
+                        in_msg = type(self).mt8870a.recv_msg_frm_server()
+                        print in_msg
+                        line = in_msg.split(',')
+                        """
+                        evm = round(float(line[3]), 2)
+                        
+                    elif (type(self).cfg.test_set == 'rs'):
+                        evm = round(float(line[3]), 2)
+                    
+                    #print('')
+                    print("ANT" + str(ant+1) + ": TX Power=" + str(chpwr) + " dBm" + \
+                          ", EVM=" + str(evm) + "%, ATT=" + str(att2))
+                    if (type(self).cfg.test_report == True) and (im_calibration.is_test_all == True):
+                        self.rpt.write("ANT" + str(ant+1) + ": TX Power=" + str(chpwr) + " dBm" + \
+                          ", EVM=" + str(evm) + "%, ATT=" + str(att2) + '\n')
+                    
+                    # if smaller than the EVM limit
+                    if (evm <= type(self).cfg.cr_txevm_max):
+                        # if bigger than max power
+                        if (chpwr > type(self).cfg.cr_txpwr_max):
+                            if (type(self).cfg.test_report == True) and (im_calibration.is_test_all == True):
+                                self.rpt.write('\n')
+                            break
+                        else:
+                            self.elems.append([chpwr, evm, att2])
+                            self.first_loop = False
+
+                    # larger than EVM limit
+                    else:
+                        if self.first_loop:
+                            self.elems.append([chpwr, evm, att2])
+                        if (type(self).cfg.test_report == True) and (im_calibration.is_test_all == True):
+                            self.rpt.write('\n')
+                        break
+            
+            # save data for each antenna
+            self.data.append(self.elems)        
+            
+        self.get_optimized_txpwr()
+        #type(self).enb.killPltD()
+        
+        print('')
+        for ant in range(2):      
+            print("TX" + str(ant+1) + " power=" + str(self.opt_res[ant][0]))
+            print("    EVM=" + str(self.opt_res[ant][1]))
+            print("    ATT=" + str(self.opt_res[ant][2]))
+            if (type(self).cfg.test_report == True) and (im_calibration.is_test_all == True):
+                self.rpt.write("TX" + str(ant+1) + " power=" + str(self.opt_res[ant][0]) + '\n')
+                self.rpt.write("    EVM=" + str(self.opt_res[ant][1]) + '\n')
+                self.rpt.write("    ATT=" + str(self.opt_res[ant][2]) + '\n')
+            print('')
+        
+        if (type(self).cfg.en_eeprom_write == True):
+            if (im_calibration.is_test_all == True):
+                self.write_max_txpwr_to_eeprom()
+            else:
+                se = raw_input("Write result to EEPROM?(y/n):")
+                if (se == 'y') or (se == 'Y'):
+                    self.write_max_txpwr_to_eeprom()
+        
+        self.chk_configure_attenuation()
+        
+        # stop transmit
+        #type(self).enb.enb_cd_tmpfs()
+        #type(self).enb.enb_stop_transmit()
+        
+    def get_optimized_txpwr(self):
+        
+        ant1pwr = int(self.data[0][-1][0])
+        ant2pwr = int(self.data[1][-1][0])
+        elem1sz = len(self.data[0])
+        elem2sz = len(self.data[1])
+        
+        if (ant1pwr > ant2pwr):
+            for cn in range(elem1sz, 0, -1):
+                if (ant2pwr == int(self.data[0][cn-1][0])):
+                    self.opt_res.append(self.data[0][cn-1])
+                    self.opt_res.append(self.data[1][-1])
+                    break
+                if (cn == 1):
+                    print "cannot find equal output power in both ports"
+                    self.opt_res.append(self.data[0][-1])
+                    self.opt_res.append(self.data[1][-1])
+                    break
+                    
+        elif (ant1pwr < ant2pwr):
+            for cn in range(elem2sz, 0, -1):
+                if (ant1pwr == int(self.data[1][cn-1][0])):
+                    self.opt_res.append(self.data[0][-1])
+                    self.opt_res.append(self.data[1][cn-1])
+                    break
+                if (cn == 1):
+                    print "cannot find equal output power in both ports"
+                    self.opt_res.append(self.data[0][-1])
+                    self.opt_res.append(self.data[1][-1])
+                    break
+        else:
+            self.opt_res.append(self.data[0][-1])
+            self.opt_res.append(self.data[1][-1])
+            
+    def write_max_txpwr_to_eeprom(self):
+        
+        type(self).enb.enb_cd_usr_bin()
+        
+        print "edit EEPROM record"
+        type(self).enb.enb_eeprom_edit_record('wmpp', self.rn, str(self.opt_res[0][0]))
+        type(self).enb.enb_eeprom_edit_record('wmps', self.rn, str(self.opt_res[1][0]))
+        
+        #print "write MD5 information"
+        md5Val = type(self).enb.calc_rf_eeprom_md5()
+        if (md5Val != 'non'):
+            type(self).enb.enb_eeprom_edit_record('wrm', self.rn, md5Val)
+            print "wrote MD5 record"
+        else:
+            print "MD5 not found"
+
+        sleep(1)    # wait EEPROM data wrote
+        
+    # check if test configure attenuation available; do after optimized value found
+    def chk_configure_attenuation(self):
+        
+        if (self.opt_res[0][2] > type(self).cfg.attn1) or (self.opt_res[1][2] > type(self).cfg.attn2):
+            print "test configure attenuation is lower than optimized result, overwrite by optimized result"
+            type(self).enb.tn_write(self.im_calibration.pp_base, "fsetenv atten1 " \
+                                    + str(self.opt_res[0][2]), 3)
+            type(self).enb.tn_write(self.im_calibration.pp_base, "fsetenv atten2 " \
+                                    + str(self.opt_res[1][2]), 3)
+
+    def run(self):
+        
+        self.start_enodeb_tx()
+        
+        if (type(self).cfg.test_set == 'agilent'):
+            self.mxa_setup()
+        elif (type(self).cfg.test_set == 'anritsu'):
+            self.mt8870a_setup(test_config.dl_freq)
+        elif (type(self).cfg.test_set == 'rs'):
+            self.cmw500_setup(test_config.dl_freq)
+            
+        sleep(3)
+        
+        #self.set_mxa_chp_measure()
+        self.get_tx_evm_power()
+        
diff --git a/octal/cavium_env/rf_card_cal_tip/test_tx_evm.pyc b/octal/cavium_env/rf_card_cal_tip/test_tx_evm.pyc
new file mode 100644
index 0000000000..34ccb89af1
Binary files /dev/null and b/octal/cavium_env/rf_card_cal_tip/test_tx_evm.pyc differ
diff --git a/octal/cavium_env/rf_card_cal_tip/tip_printenv_def.txt b/octal/cavium_env/rf_card_cal_tip/tip_printenv_def.txt
new file mode 100644
index 0000000000..5af53ad3c1
--- /dev/null
+++ b/octal/cavium_env/rf_card_cal_tip/tip_printenv_def.txt
@@ -0,0 +1,91 @@
+
+RSSI_OFFSET_PRIM=0
+RSSI_OFFSET_SEC=0
+RSSI_SLOPE_PRIM=0
+RSSI_SLOPE_SEC=0
+TX1_I_OFFSET=0
+TX1_Q_OFFSET=0
+TX2_I_OFFSET=0
+TX2_Q_OFFSET=0
+TX_OFFSET_PRIM=0
+TX_OFFSET_SEC=0
+TX_SLOPE_PRIM=0
+TX_SLOPE_SEC=0
+atten1=18
+atten2=18
+autoload=n
+baudrate=115200
+baudrate_uart1=19200
+bf=bootoct $(flash_unused_addr) forceboot numcores=$(numcores)
+boardname=zen
+bootby=flash
+bootcbyflash=gunzip 0x17e20000 0x20000000; cp.l 0x18320000 0x30800000 0xA00000; bootoctlinux ;
+bootcbytftp=tftp 0x21000000 lsm_os.gz; gunzip 0x21000000 0x20000000 0x1000000; tftp 0x3080000;
+bootcmd=run vlan; printenv namedalloc bootcby${bootby};run namedalloc;run bootcby${bootby}
+bootdelay=0
+bootloader_flash_update=bootloaderupdate
+burn_app=erase $(flash_unused_addr) +$(filesize);cp.b $(fileaddr) $(flash_unused_addr) $(file)
+bw=10
+cfgloadby=flash
+enbctrlrf=1
+env_addr=0x1fbe0000
+env_size=0x20000
+ethact=octeth0
+ethaddr=00:AD:DE:00:00:80
+flash_base_addr=0x17c00000
+flash_size=0x8000000
+flash_unused_addr=0x17d80000
+flash_unused_size=0x7e80000
+gain1=35
+gain2=35
+gatewayip=192.168.0.1
+gpsenable=0
+httpdenable=1
+i2cinit=i2c dev 0; i2c probe; i2c dev 1; i2c probe
+ipaddr=192.168.166.63
+linux_cf=fatload ide 0 $(loadaddr) vmlinux.64;bootoctlinux $(loadaddr)
+loadaddr=0x20000000
+logdispen=2
+logdispport=9991
+logparserip=192.168.166.203
+ls=fatls ide 0
+mk_ubootenv=1
+mode=pltd
+mode_test=ul
+namedalloc=namedalloc dsp-dump 0x400000 0x7f4D0000; namedalloc cazac 0x630000 0x7f8D0000; nam;
+netmask=255.255.255.0
+numcores=4
+octeon_failsafe_mode=0
+octeon_ram_mode=0
+ovrdrfdsp=1
+partition=nor0,5
+pseudowww=1
+ptp1ppsen=0
+ptpenable=0
+pwdb_in_flash=1
+pwmreghigh=30000
+pwmreglow=37376
+rftarget=ad9362
+rxfreq=1730
+serverip=192.168.166.203
+startapp=0
+stderr=serial
+stdin=serial
+stdout=serial
+swloadby=flash
+syncby=internal
+target=zen
+tcxo=pwm
+telnetdenable=1
+tip=1
+txfreq=1825
+uboot_flash_addr=0x17cc0000
+uboot_flash_size=0xc0000
+ucliovrd=0
+ver=U-Boot 2012.04.01 (Development build, svnversion: u-boot:directory, exec:) (Build time: A)
+web_pass=456b7016a916a4b178dd72b947c152b7
+web_pass1=a81be4e9b20632860d20a64c054c4150
+web_user=admin
+web_user1=user
+/usr/bin # 
+
diff --git a/octal/cavium_env/rf_card_cal_tip/tip_ul_uboot_param.txt b/octal/cavium_env/rf_card_cal_tip/tip_ul_uboot_param.txt
new file mode 100644
index 0000000000..b9d36c4ef7
--- /dev/null
+++ b/octal/cavium_env/rf_card_cal_tip/tip_ul_uboot_param.txt
@@ -0,0 +1,101 @@
+RSSI_OFFSET_PRIM=0
+RSSI_OFFSET_SEC=0
+RSSI_SLOPE_PRIM=0
+RSSI_SLOPE_SEC=0
+TX1_I_OFFSET=0
+TX1_Q_OFFSET=0
+TX2_I_OFFSET=0
+TX2_Q_OFFSET=0
+TX_OFFSET_PRIM=0
+TX_OFFSET_SEC=0
+TX_SLOPE_PRIM=0
+TX_SLOPE_SEC=0
+atten1=18
+atten2=18
+autoload=n
+baudrate=115200
+baudrate_uart1=19200
+bf=bootoct $(flash_unused_addr) forceboot numcores=$(numcores)
+boardname=zen
+bootby=tftp
+bootcbyflash=gunzip 0x17e20000 0x20000000; cp.l 0x18320000 0x30800000 0xA00000; boot;
+bootcbytftp=tftp 0x21000000 lsm_os.gz; gunzip 0x21000000 0x20000000 0x1000000; tftp ;
+bootcmd=printenv namedalloc bootcby${bootby};run namedalloc;run bootcby${bootby}
+bootdelay=0
+bootfile=pxelinux.0
+bootloader_flash_update=bootloaderupdate
+burn_app=erase $(flash_unused_addr) +$(filesize);cp.b $(fileaddr) $(flash_unused_add)
+bw=10
+cfgloadby=tftp
+dhcpenable=0
+dnsip=172.16.10.40
+enable_zen5_gpio18=1
+enbctrlrf=1
+env_addr=0x1fbe0000
+env_size=0x20000
+ethact=octeth0
+ethaddr=00:AD:DE:00:00:80
+flash_base_addr=0x17c00000
+flash_size=0x8000000
+flash_unused_addr=0x17d80000
+flash_unused_size=0x7e80000
+gain1=35
+gain2=35
+gatewayip=192.168.0.1
+gpsenable=0
+httpdenable=1
+i2cinit=i2c reset
+ipaddr=192.168.166.62
+linux_cf=fatload ide 0 $(loadaddr) vmlinux.64;bootoctlinux $(loadaddr)
+loadaddr=0x20000000
+logdispen=1
+logdispport=9991
+logparserip=192.168.166.204
+ls=fatls ide 0
+mk_ubootenv=1
+mode=pltd
+mode_test=dl
+mtdids=nor0=octeon_nor0
+named_block_addr=0x33000000
+named_block_size=0x1388000
+namedalloc=namedalloc dsp-dump 0x400000 0x7f4d0000; namedalloc cazac 0x630000 0x7f8d;
+netmask=255.255.255.0
+numcores=4
+octeon_failsafe_mode=0
+octeon_ram_mode=0
+ovrdrfdsp=1
+partition=nor0,5
+pseudowww=1
+ptp1ppsen=0
+ptpenable=0
+pwdb_in_flash=1
+pwmreghigh=23870
+pwmreglow=37376
+rftarget=ad9362
+rxfreq=1730
+serverip=192.168.166.204
+startapp=0
+stderr=serial
+stdin=serial
+stdout=serial
+swloadby=tftp
+syncby=gps
+target=zen
+tcxo=pwm
+telnetdenable=1
+telnetenable=1
+tip=1
+txfreq=1825
+txpower=30
+uboot_flash_addr=0x17cc0000
+uboot_flash_size=0xc0000
+ucliovrd=1
+ver=U-Boot 2012.04.01 (Build time: Dec 18 2017 - 09:15:54)
+web_pass=456b7016a916a4b178dd72b947c152b7
+web_pass1=a81be4e9b20632860d20a64c054c4150
+web_user=admin
+web_user1=user
+webuilog=1
+xoservoenable=1
+xoservolog=/tmp/xolog
+
diff --git a/octal/cavium_env/rf_card_cal_tip/udp_server.py b/octal/cavium_env/rf_card_cal_tip/udp_server.py
new file mode 100644
index 0000000000..a1872bc361
--- /dev/null
+++ b/octal/cavium_env/rf_card_cal_tip/udp_server.py
@@ -0,0 +1,67 @@
+#!/user/bin/env python
+
+import sys
+import socket
+
+MSG_ACK = "UDPSRVACK"
+
+class UdpServer():
+    
+    def __init__(self, my_ip, my_port):
+        
+        self.my_addr = my_ip
+        self.my_port = my_port
+        self.their_addr = ""
+        self.their_port = ""
+        self.tcp_addr = ""
+        self.tcp_port = ""
+        self.tcp_info = []
+        self.msg = ""
+        self.sock = ""
+        
+    def start_socket(self):
+        
+        try:
+            self.sock = socket.socket(socket.AF_INET, socket.SOCK_DGRAM)
+            #self.host = self.sock.getsockname()
+            self.sock.setsockopt(socket.SOL_SOCKET, socket.SO_REUSEADDR, 1)
+            self.sock.settimeout(180)     # 5
+            self.sock.bind((self.my_addr, self.my_port))
+            print "start UDP server"
+        except socket.error:
+            errno, errstr = sys.exc_info()[:2]
+            print("couldn't be a UDP server on port " + str(self.my_port) 
+                  + str(errstr) + ' errno: ' + str(errno))
+        
+    def recv_frm_client(self):
+        self.msg = ''
+        self.msg, addr = self.sock.recvfrom(2048)
+        #self.msg, _ = self.sock.recvfrom(20480)
+        #print self.msg
+        return self.msg
+        
+    def send_to_client(self):
+        print("msg-> ["+MSG_ACK+"] to IP "+self.their_addr+" port "+str(self.their_port))
+        self.sock.sendto(MSG_ACK, (self.their_addr, self.their_port))
+        
+        
+    def udp_close(self):
+        self.sock.close()
+
+def main():
+
+    udpsvr = UdpServer('10.18.104.189', 9991)
+    udpsvr.start_socket()
+    
+    for i in range(10):
+        i = i + 1
+        mesg = udpsvr.recv_frm_client()
+        print(mesg)
+    
+    udpsvr.udp_close()
+    print "end of UDP server"
+    
+    return 0
+            
+if (__name__ == "__main__"):
+    main()            
diff --git a/octal/cavium_env/rf_card_cal_tip/udp_server.pyc b/octal/cavium_env/rf_card_cal_tip/udp_server.pyc
new file mode 100644
index 0000000000..1ad0cc8276
Binary files /dev/null and b/octal/cavium_env/rf_card_cal_tip/udp_server.pyc differ
diff --git a/octal/cavium_env/rf_card_cal_tip/~$vium_rftest_band3_zen.docx b/octal/cavium_env/rf_card_cal_tip/~$vium_rftest_band3_zen.docx
new file mode 100644
index 0000000000..835c07e605
Binary files /dev/null and b/octal/cavium_env/rf_card_cal_tip/~$vium_rftest_band3_zen.docx differ
diff --git a/octal/cavium_env/tftpboot_cal_170307/LFMSOFT_OCT_D.tgz b/octal/cavium_env/tftpboot_cal_170307/LFMSOFT_OCT_D.tgz
new file mode 100644
index 0000000000..4a4ecd5273
Binary files /dev/null and b/octal/cavium_env/tftpboot_cal_170307/LFMSOFT_OCT_D.tgz differ
diff --git a/octal/cavium_env/tftpboot_cal_170307/bringup b/octal/cavium_env/tftpboot_cal_170307/bringup
new file mode 100644
index 0000000000..b0f59af292
--- /dev/null
+++ b/octal/cavium_env/tftpboot_cal_170307/bringup
@@ -0,0 +1,212 @@
+#!/bin/sh
+
+if [ -f /tmp/system.conf ]; then
+source /tmp/system.conf
+elif [ -f /mnt/app/ubootenv ] ; then
+source /mnt/app/ubootenv
+fi
+
+acscli_set() {
+    if [ -n "$1" -a -n "$2" ] ; then
+        acscli << EOF
+set $1 $2
+quit
+EOF
+    fi
+}
+
+acscli_get() {
+    if [ -n "$1" ] ; then
+        acscli << EOF
+get $1
+quit
+EOF
+    fi
+}
+
+
+### Extract DUPLEX MODE of stack
+## ** Should cross verify with RF EEPROM band indicator and DSP revision
+
+if [ -e /bin/svnversion ];then
+    DUPLEXMODE=`cat /bin/svnversion |awk '/Product/{print $2}'`
+fi
+if [ -z $DUPLEXMODE ];then DUPLEXMODE=FDD;fi
+
+echo "[$0] : START Override DSP RF Interface parameters in "$DUPLEXMODE" mode"
+if [ -f /usr/bin/updatephyrfparams.sh ]; then
+    /usr/bin/updatephyrfparams.sh ${DUPLEXMODE} WRDDRCFG
+    echo "[$0] : DONE Override DSP RF Interface parameters"
+else
+    echo "[$0] : S13swselect did not correctly retreive updatephyrfparams.sh by $CFGLOADBY"
+fi
+
+## In this section, running in PLTd or E2E determines how SW is loaded
+## in pltD mode, we will prepare the environment with testvectors 
+## and pltd in a mode to set lsmD in test mode.
+## In E2E mode, we will prepare the environement to configure the smallcell
+## as an element of a end to end network.
+
+# Defualt to E2E mode is MODE is not declared
+if [ -z $MODE ];then MODE=e2e;fi
+
+if [ "$MODE" == "pltd" ];then
+
+  # Setting default.
+  if [ -z $RFTARGET ];then RFTARGET=ad9362;echo "[$0] RF defaulting to $RFTARGET device";fi
+  if [ -z $BW ];then BW=10;fi
+  if [ -z $TXFREQ ];then TXFREQ=2665;echo "[$0] RF defaulting to $TXFREQ Mhz";fi
+  if [ -z $RXFREQ ];then RXFREQ=2535;echo "[$0] RF defaulting to $RXFREQ Mhz";fi
+
+  ##Init 1PPS
+  /etc/init_1pps.sh
+
+  cd /usr/bin
+  echo "[$0] : Starting $RFTARGET driver (BW=$BW TXFREQ=$TXFREQ RXFREQ=$RXFREQ ATTEN=$ATTEN1 $ATTEN2 GAIN=$GAIN1 $GAIN2 )"
+  cp ${RFTARGET}_init_${TARGET}${BW}Mhz.txt rf_init.txt
+  chmod +r rf_init.txt
+
+  ##Start RF Driver
+  oncpu 0 cn_rfdriver adi << EOF
+  i d $TXFREQ u $RXFREQ a 1 $ATTEN1 a 2 $ATTEN2 g 1 $GAIN1 g 2 $GAIN2 q
+EOF
+  
+  ## Untar DSPs.
+  cd /etc
+  tar -zxvf dsp.tgz
+  
+  #Upload DSP related files
+  cd /usr/bin
+  gzip -d pltD.gz
+  oncpu 0 ./pltD -ld normal -stall 2
+  
+  cd /tmpfs
+  # Copy and extract ETM test vector files for selected Bandwidth
+  cp /usr/share/etm/CAL_ETM_TV_${BW}Mhz.tgz .
+  cp /usr/share/etm/CAL_UL_TV_${BW}Mhz.tgz .
+  tar -zxvf CAL_ETM_TV_${BW}Mhz.tgz
+  tar -zxvf CAL_UL_TV_${BW}Mhz.tgz
+
+  ###  Specific to TIP board
+##
+if [ "$TIP" == "1" ];then
+	echo "Setting up receive path for TIP board"
+	oncpu 0 /usr/bin/cn_rfdriver adi << eof
+w 0x04 0x03 q
+eof
+sleep 1
+
+cp /mnt/app/rffe.tgz /.
+cd /
+tar xzvf rffe.tgz
+fe-manager &
+sleep 30
+fi
+##
+
+  ## Ready to start ETM and Calibration suites.
+  
+else ## MODE != pltd
+
+
+  echo "[BRINGUP] Bringing up S1 link [START]"
+
+  renice -n 0 `ps |grep -m 1 core0app |awk '{ print ($1)}'`
+  renice -n 0 `ps |grep -m 1 core1app |awk '{ print ($1)}'`
+
+  if [ "$ENBCTRLRF" != "1" ];then
+  echo "[$0] %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%"
+  echo "[$0] Entered comdb mode and using pltD for DSP pgm"
+  echo "[$0] %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%"
+    ucli -f /var << EOF
+    demooff
+    cpF2M
+    dust
+    quit
+EOF
+    sleep 1
+  fi
+
+  if [ "$IPSECEN" == "1" ];then
+	sleep 6
+
+	acscli_set IPSEC_PROFILE_RemoteEndpoints[1] ${SECGWIP}
+	acscli_set IPSEC_FILTER_DestIP[1] ${MMEIP}
+	acscli_set IPSEC_FILTER_DestMask[1] ${MMEIPMASK}
+	acscli_set IPSEC_FILTER_SourceIP[1] ${IPSEC181_SOURCEIP}
+	acscli_set IPSEC_FILTER_SourceMask[1] ${IPSEC181_SOURCEMASK}
+	acscli_set IPSEC_FILTER_Profile[1] Device.IPsec.Profile.1.
+	acscli_set IPSEC_FILTER_ProcessingChoice[1] Protect
+	acscli_set IPSEC_PROFILE_IKEv2AllowedEncryptionAlgorithms[1] ${IPSEC181_IKEENC}
+	acscli_set IPSEC_PROFILE_IKEv2AllowedIntegrityAlgorithms[1] ${IPSEC181_IKEINTEG}
+	acscli_set IPSEC_PROFILE_IKEv2AllowedDiffieHellmanGroupTransforms[1] ${IPSEC181_IKEDH}
+	acscli_set IPSEC_FILTER_Enable[1] 1
+
+	#sleep 4
+	#acscli_get IPSEC_FILTER_Status[1]
+  fi
+
+    sleep 3
+    echo "[$0] Bringing up S1 link [DONE]"
+
+    # Assure root access to webUI.
+    chown root:root -R /var/www
+
+  version
+
+  if [ "$IPSECEN" == "1" ];then
+  ipsec statusall
+  fi
+
+  ## Monitor Cell State.  Exit after $FAPENABLECOUNT is -lt 0
+  echo -n "[$0] Checking CELL STATE "
+
+  while [[ 1 ]];do
+	if grep "ERROR: DSP Downloading Error" /var/log/core0 1>/dev/null 2>&1 ; then
+		echo
+		echo "[$0] ERROR: DSP Downloading Error"
+		exit 1
+	fi;
+	echo -n ". "
+	sleep 5
+	ENB_STATE_MSG=`cat /var/log/core0 | grep "S_RRC_CELL_STATE_IND"`
+	ENB_STATE=`echo $ENB_STATE_MSG | awk -F"(" '/state/{print $4}' | awk -F")" '{print $1}'`
+	if [ -z $ENB_STATE ];then ENB_STATE=UNKNOWN;fi
+	if [ $ENB_STATE == "enabled" ];then
+	    echo
+	    echo "[$0] CELL is in ENABLE STATE ...... [DONE - $FAPENABLECOUNT]"
+	    break
+	fi
+        if [ -z $FAPENABLECOUNT ];then FAPENABLECOUNT=16;fi
+	if [ $FAPENABLECOUNT -lt 0 ];then
+	    echo
+	    echo "[$0] CELL is in $ENB_STATE STATE ...... [DONE]"
+	    toggle 1 0&
+	    exit 1
+	fi
+	let FAPENABLECOUNT=$FAPENABLECOUNT-1
+  done
+
+  sh /sbin/rev28fix.sh
+  sleep 1
+  
+  ## This section is required in the we need to generate PPS
+  if [ "$GPSENABLE" != 1 -a "$PTPENABLE" != 1 -a "$PTP1PPSEN" != "1" ];then
+    echo "[$0] Enable internal synchronization"
+    oct-linux-memory -w 4 0x00010F0000868110 1
+  fi
+
+
+fi ## pltd or e2e mode selection
+
+
+### Create/Add version file for WebUI
+##
+
+echo "<font size=1><tt>" > /tmp/.ver
+dmesg|head -n 4 | grep -v CVMSEG | sed -e "s/:/ /"  | awk '{print $1" "$2":"$3" <br>"}'         >> /tmp/.ver
+echo `version |grep STACK | awk '{print mode " STACK Revision: "$6" <br>"}' mode=${DUPLEXMODE}` >> /tmp/.ver
+echo `version |grep DSP   | awk '{print "DSP Revision: "$5" </tt>"}'   `                        >> /tmp/.ver
+
+
+echo "[$0] SmallCell in $MODE mode"
diff --git a/octal/cavium_env/tftpboot_cal_170307/dsp.tgz b/octal/cavium_env/tftpboot_cal_170307/dsp.tgz
new file mode 100644
index 0000000000..1fc7c47fde
Binary files /dev/null and b/octal/cavium_env/tftpboot_cal_170307/dsp.tgz differ
diff --git a/octal/cavium_env/tftpboot_cal_170307/logParser b/octal/cavium_env/tftpboot_cal_170307/logParser
new file mode 100644
index 0000000000..4ae4ad442a
Binary files /dev/null and b/octal/cavium_env/tftpboot_cal_170307/logParser differ
diff --git a/octal/cavium_env/tftpboot_cal_170307/lsmD.gz b/octal/cavium_env/tftpboot_cal_170307/lsmD.gz
new file mode 100644
index 0000000000..952d9fdb51
Binary files /dev/null and b/octal/cavium_env/tftpboot_cal_170307/lsmD.gz differ
diff --git a/octal/cavium_env/tftpboot_cal_170307/lsm_os.gz b/octal/cavium_env/tftpboot_cal_170307/lsm_os.gz
new file mode 100644
index 0000000000..7b70aff61a
Binary files /dev/null and b/octal/cavium_env/tftpboot_cal_170307/lsm_os.gz differ
diff --git a/octal/cavium_env/tftpboot_cal_170307/lsm_rd.gz b/octal/cavium_env/tftpboot_cal_170307/lsm_rd.gz
new file mode 100644
index 0000000000..d3467da26a
Binary files /dev/null and b/octal/cavium_env/tftpboot_cal_170307/lsm_rd.gz differ
diff --git a/octal/cavium_env/tftpboot_cal_170307/startup10.115.115.65.cfg b/octal/cavium_env/tftpboot_cal_170307/startup10.115.115.65.cfg
new file mode 100644
index 0000000000..93e513cb03
--- /dev/null
+++ b/octal/cavium_env/tftpboot_cal_170307/startup10.115.115.65.cfg
@@ -0,0 +1,834 @@
+configure eqt gen eenbtype 1
+configure eqt gen u32enbid 12801
+configure eqt gen u8enbnamelength 20
+configure eqt gen szenbname Cavium LTE Femto eNB
+configure eqt gen eantenna 1
+configure eqt gen u8numplmnidentity 1
+configure eqt gen plmnidentity mcc 0 3  0  0  1
+configure eqt gen plmnidentity mnc 0 2  0  1
+configure eqt gen bpmcntract 0
+configure eqt board eadminstate  0 1
+configure eqt board eadminstate  1 1
+configure eqt board eadminstate  2 1
+configure eqt board eadminstate  3 1
+configure eqt board eadminstate  4 1
+configure eqt board eadminstate  5 1
+configure eqt board eadminstate  6 1
+configure eqt board eadminstate  7 1
+configure eqt board eadminstate  8 1
+configure eqt board eadminstate  9 1
+configure net net u32enbipaddress 10.102.81.65
+configure net net u32enbsubnetmask 255.255.255.0
+configure net net u32enbgwipaddress 255.255.255.0
+configure net u8nummmeinterface 1
+configure net mme u32mmeipaddress 0 10.102.81.100
+configure net mme u16mmesctpportnumber 0 36412
+configure net mme ettw 0 2
+configure net u8numsgwinterface 1
+configure net sgw u32sgwipaddress 0 0.0.0.0
+configure net u8numextenbconfig 0
+configure enbstatic u8numcell 1
+configure cell u8cellindex 0 0
+configure cell u8phycellgroupid 0 98
+configure cell u8phycellid 0 1
+configure cell eadminstate 0 1
+configure cell u16dlcarrierfreq 0 1650
+configure cell edlcyclicprefix 0 0
+configure cell pwr u16rspoweramp 0 2667
+configure cell pwr u16psspoweramp 0 2667
+configure cell pwr u16ssspoweramp 0 2667
+configure cell pwr u16pcfichpoweramp 0 2667
+configure cell pwr u16phichpoweramp 0 2667
+configure cell pwr u16pbchpoweramp 0 2667
+configure cell pwr u16pdcchpoweramp 0 2667
+configure cell edlrscblock 0 3
+configure cell phich ephichduration 0 0
+configure cell phich ephichresource 0 3
+configure cell access u16trackingareacode 0 1
+configure cell access u32cellidentity 0 12800
+configure cell access ecellbarred 0 1
+configure cell access eintrafreqreselection 0 1
+configure cell access bcsgindication 0 0
+configure cell access u32csgidentity 0 0
+configure cell access ecellreservd 0 1
+configure cell selection s8qrxlevmin 0 -65
+configure cell selection bqrxlevminoffset 0 0
+configure cell selection u8qrxlevminoffset 0 2
+configure cell bpmax 0 1
+configure cell s8pmax 0 23
+configure cell u8freqbandindicator 0 3
+configure cell u8numsi 0 2
+configure cell sched esiperiodicity 0 0 0
+configure cell sched u8numsibmappinginfo 0 0 0
+configure cell sched esibmappinginfo 0 0 0 0
+configure cell sched esiperiodicity 0 1 0
+configure cell sched u8numsibmappinginfo 0 1 1
+configure cell sched esibmappinginfo 0 1 0 0
+configure cell esiwindowlength 0 3
+configure cell u8systeminfovaluetag 0 0
+configure cell bims_emergencysupport_r9 0 0
+configure cell bq_qualmin_r9 0 0
+configure cell s8q_qualmin_r9 0 -10
+configure cell bq_qualminoffset_r9 0 0
+configure cell u16q_qualminoffset_r9 0 1
+configure cell bacbarringinfo 0 0
+configure cell acbarring bacbarringforemergency 0 0
+configure cell acbarring bacbarringformosignalling 0 0
+configure cell acbarring bacbarringformodata 0 0
+configure cell acbarring bacbarringformmtel_voice_r9 0 0
+configure cell acbarring bacbarringformmtel_video_r9 0 0
+configure cell acbarring acbarringformosignalling eacbarringfactor 0 0
+configure cell acbarring acbarringformosignalling eacbarringtime 0 0
+configure cell acbarring acbarringformosignalling u8acbarringforspecialac 0 0
+configure cell acbarring acbarringformodata eacbarringfactor 0 0
+configure cell acbarring acbarringformodata eacbarringtime 0 0
+configure cell acbarring acbarringformodata u8acbarringforspecialac 0 0
+configure cell acbarring acbarringformmtel_voice_r9 eacbarringfactor 0 0
+configure cell acbarring acbarringformmtel_voice_r9 eacbarringtime 0 0
+configure cell acbarring acbarringformmtel_voice_r9 u8acbarringforspecialac 0 0
+configure cell acbarring acbarringformmtel_video_r9 eacbarringfactor 0 0
+configure cell acbarring acbarringformmtel_video_r9 eacbarringtime 0 0
+configure cell acbarring acbarringformmtel_video_r9 u8acbarringforspecialac 0 0
+configure cell ccch bLogicalChGroup 0 1
+configure cell ccch u8LogicalChGroup 0 0
+configure cell ccch u8Priority 0 1
+configure cell ccch ePrioritisedBitRate 0 7
+configure cell ccch eBucketSizeDuration 0 7
+configure cell bcch emodperiodcoeff 0 0
+configure cell pcch edefaultpagingcycle 0 1
+configure cell pcch epagingnb 0 2
+configure cell rach preamble enumrapreambles 0 7
+configure cell rach preamble bpreamblesgroupaconfig 0 0
+configure cell rach preamble groupa esizeofrapreamblesgroupa 0 3
+configure cell rach preamble groupa emsgsizegroupa 0 0
+configure cell rach preamble groupa emsgpoweroffsetgroupb 0 0
+configure cell rach powerramping epowerrampingstep 0 1
+configure cell rach powerramping epreambleinitialrtp 0 15
+configure cell rach rasupervisioninfo epreambletransmax 0 0
+configure cell rach rasupervisioninfo erarspwindowsize 0 7
+configure cell rach rasupervisioninfo emaccontentionresolutiontimer 0 7
+configure cell rach u8maxharqmsg3tx 0 5
+configure cell prach u16rootsequenceidx 0 0
+configure cell prach prach u8prachconfigidx 0 3
+configure cell prach prach bhighspeedflag 0 0
+configure cell prach prach u8zerocorrelationzoneconfig 0 5
+configure cell prach prach u8prachfreqoffset 0 40
+configure cell pdschcommon s8refsignalpower 0 0
+configure cell pdschcommon u8pb 0 1
+configure cell puschcommon puschcommon u8nsb 0 1
+configure cell puschcommon puschcommon ehoppingmode 0 0
+configure cell puschcommon puschcommon u8puschhoppingoffset 0 0
+configure cell puschcommon puschcommon benable64qam 0 0
+configure cell puschcommon ulreferencesignalpusch bgrouphoppingenabled 0 0
+configure cell puschcommon ulreferencesignalpusch u8groupassignmentpusch 0 1
+configure cell puschcommon ulreferencesignalpusch bsequencehoppingenabled 0 0
+configure cell puschcommon ulreferencesignalpusch u8cyclicshift 0 0
+configure cell pucch edeltapucchshift 0 2
+configure cell pucch u8nrbcqi 0 1
+configure cell pucch u8ncsan 0 0
+configure cell pucch u16n1pucchan 0 36
+configure cell srs esrsconfigtype 0 1
+configure cell srs srs esrsbandwidthconfig 0 0
+configure cell srs srs esrssubframeconfig 0 0
+configure cell srs srs backnacksrssimultransmission 0 1
+configure cell ulpc s8p0nominalpusch 0 -90
+configure cell ulpc s8p0nominalpucch 0 -100
+configure cell ulpc ealpha 0 5
+configure cell ulpc s8deltapreamblemsg3 0 4
+configure cell ulpc deltaflistpucch epucchformat1 0 1
+configure cell ulpc deltaflistpucch epucchformat1b 0 0
+configure cell ulpc deltaflistpucch epucchformat2 0 1
+configure cell ulpc deltaflistpucch epucchformat2a 0 1
+configure cell ulpc deltaflistpucch epucchformat2b 0 1
+configure cell eulcyclicprefixlength 0 0
+configure cell uetimersandconsts et300 0 6
+configure cell uetimersandconsts et301 0 7
+configure cell uetimersandconsts et310 0 5
+configure cell uetimersandconsts et311 0 1
+configure cell uetimersandconsts et304_mci 0 6
+configure cell uetimersandconsts u8t302 0 3
+configure cell uetimersandconsts en310 0 4
+configure cell uetimersandconsts en311 0 2
+configure cell uetimersandconsts et320 0 0
+configure cell freq bulcarrierfreq 0 1
+configure cell freq bulbandwidth 0 0
+configure cell freq u16ulcarrierfreq 0 19650
+configure cell freq eulbandwidth 0 3
+configure cell freq u8addspectrumemission 0 1
+configure cell etimealignmenttimercommon 0 7
+configure cell sib3 eqhyst 0 4
+configure cell sib3 bspeedstatereselectionpars 0 0
+configure cell sib3 speedstatereselection mobility etevaluation 0 4
+configure cell sib3 speedstatereselection mobility ethystnormal 0 4
+configure cell sib3 speedstatereselection mobility u8ncellchangemedium 0 16
+configure cell sib3 speedstatereselection mobility u8ncellchangehigh 0 16
+configure cell sib3 speedstatereselection esfmedium 0 3
+configure cell sib3 speedstatereselection esfhigh 0 3
+configure cell sib3 bsnonintrasearch 0 1
+configure cell sib3 u8snonintrasearch 0 0
+configure cell sib3 u8threshservinglow 0 31
+configure cell sib3 bsintrasearch 0 1
+configure cell sib3 u8sintrasearch 0 0
+configure cell sib3 bsintrasearch_r9 0 0
+configure cell sib3 u8sintrasearchp_r9 0 0
+configure cell sib3 u8sintrasearchq_r9 0 0
+configure cell sib3 bsnonintrasearch_r9 0 0
+configure cell sib3 u8snonintrasearchp_r9 0 0
+configure cell sib3 u8snonintrasearchq_r9 0 0
+configure cell sib3 bthreshservinglowq_r9 0 0
+configure cell sib3 u8threshservinglowq_r9 0 0
+configure cell sib6 u8treselectionutra 0 3
+configure cell sib6 btreselectionutrasf 0 0
+configure cell sib6 treselectionutrasf esfmedium 0 3
+configure cell sib6 treselectionutrasf esfhigh 0 3
+configure cell u8neighcellconfig 0 1
+configure cell uemsrctrl report reportconfiga1 u16a1thresholdrsrp 0 0 80
+configure cell uemsrctrl report reportconfiga1 u16a1thresholdrsrq 0 0 0
+configure cell uemsrctrl report reportconfiga1 u8hysteresis 0 0 2
+configure cell uemsrctrl report reportconfiga1 etimetotrigger 0 0 11
+configure cell uemsrctrl report reportconfiga1 u8triggerquantity 0 0 0
+configure cell uemsrctrl report reportconfiga1 u8reportquantity 0 0 0
+configure cell uemsrctrl report reportconfiga1 u8maxreportcells 0 0 4
+configure cell uemsrctrl report reportconfiga1 ereportinterval 0 0 2
+configure cell uemsrctrl report reportconfiga1 ereportamount 0 0 7
+configure cell uemsrctrl report reportconfiga1 u16a1thresholdrsrp 0 1 80
+configure cell uemsrctrl report reportconfiga1 u16a1thresholdrsrq 0 1 0
+configure cell uemsrctrl report reportconfiga1 u8hysteresis 0 1 2
+configure cell uemsrctrl report reportconfiga1 etimetotrigger 0 1 11
+configure cell uemsrctrl report reportconfiga1 u8triggerquantity 0 1 0
+configure cell uemsrctrl report reportconfiga1 u8reportquantity 0 1 0
+configure cell uemsrctrl report reportconfiga1 u8maxreportcells 0 1 4
+configure cell uemsrctrl report reportconfiga1 ereportinterval 0 1 2
+configure cell uemsrctrl report reportconfiga1 ereportamount 0 1 7
+configure cell uemsrctrl report reportconfiga2 u16a2thresholdrsrp 0 0 70
+configure cell uemsrctrl report reportconfiga2 u16a2thresholdrsrq 0 0 0
+configure cell uemsrctrl report reportconfiga2 u8hysteresis 0 0 2
+configure cell uemsrctrl report reportconfiga2 etimetotrigger 0 0 1
+configure cell uemsrctrl report reportconfiga2 u8triggerquantity 0 0 0
+configure cell uemsrctrl report reportconfiga2 u8reportquantity 0 0 0
+configure cell uemsrctrl report reportconfiga2 u8maxreportcells 0 0 4
+configure cell uemsrctrl report reportconfiga2 ereportinterval 0 0 2
+configure cell uemsrctrl report reportconfiga2 ereportamount 0 0 1
+configure cell uemsrctrl report reportconfiga2 u16a2thresholdrsrp 0 1 70
+configure cell uemsrctrl report reportconfiga2 u16a2thresholdrsrq 0 1 0
+configure cell uemsrctrl report reportconfiga2 u8hysteresis 0 1 2
+configure cell uemsrctrl report reportconfiga2 etimetotrigger 0 1 1
+configure cell uemsrctrl report reportconfiga2 u8triggerquantity 0 1 0
+configure cell uemsrctrl report reportconfiga2 u8reportquantity 0 1 0
+configure cell uemsrctrl report reportconfiga2 u8maxreportcells 0 1 4
+configure cell uemsrctrl report reportconfiga2 ereportinterval 0 1 2
+configure cell uemsrctrl report reportconfiga2 ereportamount 0 1 1
+configure cell uemsrctrl report reportconfiga3 s16a3offset 0 0 6
+configure cell uemsrctrl report reportconfiga3 ba3reportonleave 0 0 0
+configure cell uemsrctrl report reportconfiga3 u8hysteresis 0 0 3
+configure cell uemsrctrl report reportconfiga3 etimetotrigger 0 0 6
+configure cell uemsrctrl report reportconfiga3 u8triggerquantity 0 0 0
+configure cell uemsrctrl report reportconfiga3 u8reportquantity 0 0 0
+configure cell uemsrctrl report reportconfiga3 u8maxreportcells 0 0 4
+configure cell uemsrctrl report reportconfiga3 ereportinterval 0 0 2
+configure cell uemsrctrl report reportconfiga3 ereportamount 0 0 5
+configure cell uemsrctrl report reportconfiga3 s16a3offset 0 1 6
+configure cell uemsrctrl report reportconfiga3 ba3reportonleave 0 1 0
+configure cell uemsrctrl report reportconfiga3 u8hysteresis 0 1 3
+configure cell uemsrctrl report reportconfiga3 etimetotrigger 0 1 6
+configure cell uemsrctrl report reportconfiga3 u8triggerquantity 0 1 0
+configure cell uemsrctrl report reportconfiga3 u8reportquantity 0 1 0
+configure cell uemsrctrl report reportconfiga3 u8maxreportcells 0 1 4
+configure cell uemsrctrl report reportconfiga3 ereportinterval 0 1 2
+configure cell uemsrctrl report reportconfiga3 ereportamount 0 1 5
+configure cell uemsrctrl report reportconfiga4 u16a4thresholdrsrp 0 0 21
+configure cell uemsrctrl report reportconfiga4 u16a4thresholdrsrq 0 0 0
+configure cell uemsrctrl report reportconfiga4 u8hysteresis 0 0 6
+configure cell uemsrctrl report reportconfiga4 etimetotrigger 0 0 2
+configure cell uemsrctrl report reportconfiga4 u8triggerquantity 0 0 0
+configure cell uemsrctrl report reportconfiga4 u8reportquantity 0 0 0
+configure cell uemsrctrl report reportconfiga4 u8maxreportcells 0 0 8
+configure cell uemsrctrl report reportconfiga4 ereportinterval 0 0 6
+configure cell uemsrctrl report reportconfiga4 ereportamount 0 0 0
+configure cell uemsrctrl report reportconfiga4 u16a4thresholdrsrp 0 1 21
+configure cell uemsrctrl report reportconfiga4 u16a4thresholdrsrq 0 1 0
+configure cell uemsrctrl report reportconfiga4 u8hysteresis 0 1 2
+configure cell uemsrctrl report reportconfiga4 etimetotrigger 0 1 11
+configure cell uemsrctrl report reportconfiga4 u8triggerquantity 0 1 0
+configure cell uemsrctrl report reportconfiga4 u8reportquantity 0 1 0
+configure cell uemsrctrl report reportconfiga4 u8maxreportcells 0 1 4
+configure cell uemsrctrl report reportconfiga4 ereportinterval 0 1 2
+configure cell uemsrctrl report reportconfiga4 ereportamount 0 1 7
+configure cell uemsrctrl report reportconfiga5 u16a5threshold1rsrp 0 0 70
+configure cell uemsrctrl report reportconfiga5 u16a5threshold1rsrq 0 0 0
+configure cell uemsrctrl report reportconfiga5 u16a5threshold2rsrp 0 0 70
+configure cell uemsrctrl report reportconfiga5 u16a5threshold2rsrq 0 0 0
+configure cell uemsrctrl report reportconfiga5 u8hysteresis 0 0 2
+configure cell uemsrctrl report reportconfiga5 etimetotrigger 0 0 11
+configure cell uemsrctrl report reportconfiga5 u8triggerquantity 0 0 0
+configure cell uemsrctrl report reportconfiga5 u8reportquantity 0 0 0
+configure cell uemsrctrl report reportconfiga5 u8maxreportcells 0 0 4
+configure cell uemsrctrl report reportconfiga5 ereportinterval 0 0 2
+configure cell uemsrctrl report reportconfiga5 ereportamount 0 0 7
+configure cell uemsrctrl report reportconfiga5 u16a5threshold1rsrp 0 1 70 
+configure cell uemsrctrl report reportconfiga5 u16a5threshold1rsrq 0 1 0
+configure cell uemsrctrl report reportconfiga5 u16a5threshold2rsrp 0 1 0
+configure cell uemsrctrl report reportconfiga5 u16a5threshold2rsrq 0 1 0
+configure cell uemsrctrl report reportconfiga5 u8hysteresis 0 1 2
+configure cell uemsrctrl report reportconfiga5 etimetotrigger 0 1 11
+configure cell uemsrctrl report reportconfiga5 u8triggerquantity 0 1 0
+configure cell uemsrctrl report reportconfiga5 u8reportquantity 0 1 0
+configure cell uemsrctrl report reportconfiga5 u8maxreportcells 0 1 4
+configure cell uemsrctrl report reportconfiga5 ereportinterval 0 1 2
+configure cell uemsrctrl report reportconfiga5 ereportamount 0 1 7
+configure cell uemsrctrl report reportconfigb1 s16b1thresholdutrarscp 0 0 0
+configure cell uemsrctrl report reportconfigb1 u16b1thresholdutraecn0 0 0 0
+configure cell uemsrctrl report reportconfigb1 u8hysteresis 0 0 2
+configure cell uemsrctrl report reportconfigb1 etimetotrigger 0 0 11
+configure cell uemsrctrl report reportconfigb1 u8triggerquantityutra 0 0 0
+configure cell uemsrctrl report reportconfigb1 u8maxreportcells 0 0 4
+configure cell uemsrctrl report reportconfigb1 ereportinterval 0 0 2
+configure cell uemsrctrl report reportconfigb1 ereportamount 0 0 7
+configure cell uemsrctrl report reportconfigb1 s16b1thresholdutrarscp 0 1 0
+configure cell uemsrctrl report reportconfigb1 u16b1thresholdutraecn0 0 1 0
+configure cell uemsrctrl report reportconfigb1 u8hysteresis 0 1 2
+configure cell uemsrctrl report reportconfigb1 etimetotrigger 0 1 11
+configure cell uemsrctrl report reportconfigb1 u8triggerquantityutra 0 1 0
+configure cell uemsrctrl report reportconfigb1 u8maxreportcells 0 1 4
+configure cell uemsrctrl report reportconfigb1 ereportinterval 0 1 2
+configure cell uemsrctrl report reportconfigb1 ereportamount 0 1 7
+configure cell uemsrctrl report reportconfigb2 u16b2thresholdeutrarsrp 0 0 70
+configure cell uemsrctrl report reportconfigb2 u16b2thresholdeutrarsrq 0 0 0
+configure cell uemsrctrl report reportconfigb2 s16b2thresholdutrarscp 0 0 0
+configure cell uemsrctrl report reportconfigb2 u16b2thresholdutraecn0 0 0 0
+configure cell uemsrctrl report reportconfigb2 u8hysteresis 0 0 2
+configure cell uemsrctrl report reportconfigb2 etimetotrigger 0 0 11
+configure cell uemsrctrl report reportconfigb2 u8triggerquantityeutra 0 0 0
+configure cell uemsrctrl report reportconfigb2 u8triggerquantityutra 0 0 0
+configure cell uemsrctrl report reportconfigb2 u8maxreportcells 0 0 4
+configure cell uemsrctrl report reportconfigb2 ereportinterval 0 0 2
+configure cell uemsrctrl report reportconfigb2 ereportamount 0 0 7
+configure cell uemsrctrl report reportconfigb2 u16b2thresholdeutrarsrp 0 1 70
+configure cell uemsrctrl report reportconfigb2 u16b2thresholdeutrarsrq 0 1 0
+configure cell uemsrctrl report reportconfigb2 s16b2thresholdutrarscp 0 1 0
+configure cell uemsrctrl report reportconfigb2 u16b2thresholdutraecn0 0 1 0
+configure cell uemsrctrl report reportconfigb2 u8hysteresis 0 1 2
+configure cell uemsrctrl report reportconfigb2 etimetotrigger 0 1 11
+configure cell uemsrctrl report reportconfigb2 u8triggerquantityeutra 0 1 0
+configure cell uemsrctrl report reportconfigb2 u8triggerquantityutra 0 1 0
+configure cell uemsrctrl report reportconfigb2 u8maxreportcells 0 1 4
+configure cell uemsrctrl report reportconfigb2 ereportinterval 0 1 2
+configure cell uemsrctrl report reportconfigb2 ereportamount 0 1 7
+configure cell uemsrctrl msrquantity emeasquantity_rsrp 0 4
+configure cell uemsrctrl msrquantity emeasquantity_rsrq 0 4
+configure cell uemsrctrl msequantityutran emeasurequantityutra 0 0
+configure cell uemsrctrl msequantityutran efiltercoefficient 0 10
+configure cell uemsrctrl emgptype 0 1
+configure cell uemsrctrl bsmeasure 0 1
+configure cell uemsrctrl u8smeasure 0 1
+configure cell u8numberofeuranfreq 0 2
+configure cell eutranfreqrelation ecreatedby 0 0 1
+configure cell eutranfreqrelation u16arfcnvalueeutrandl 0 0 1650
+configure cell eutranfreqrelation ballowedmeasbandwidth 0 0 1
+configure cell eutranfreqrelation eallowedmeasbandwidth 0 0 0
+configure cell eutranfreqrelation bcellreselectionpriority 0 0 0
+configure cell eutranfreqrelation u8cellreselectionpriority 0 0 7
+configure cell eutranfreqrelation bpmax 0 0 0
+configure cell eutranfreqrelation s8pmax 0 0 -30
+configure cell eutranfreqrelation bpresenceantennaport1 0 0 1
+configure cell eutranfreqrelation beoffsetfreq 0 0 0
+configure cell eutranfreqrelation eoffsetfreq 0 0 15
+configure cell eutranfreqrelation bq_qualmin_r9 0 0 0
+configure cell eutranfreqrelation s8q_qualmin_r9 0 0 -34
+configure cell eutranfreqrelation s8q_rxlevmin 0 0 -60
+configure cell eutranfreqrelation u16threshx_high 0 0 0
+configure cell eutranfreqrelation u16threshx_low 0 0 0
+configure cell eutranfreqrelation bthreshx_q_r9 0 0 0
+configure cell eutranfreqrelation u16threshx_highq_r9 0 0 0
+configure cell eutranfreqrelation u16threshx_lowq_r9 0 0 0
+configure cell eutranfreqrelation u8treselectioneutra 0 0 0
+configure cell eutranfreqrelation btreselectioneutrasf 0 0 0
+configure cell eutranfreqrelation treselectioneutrasf esfmedium 0 0 3
+configure cell eutranfreqrelation treselectioneutrasf esfhigh 0 0 3
+configure cell eutranfreqrelation u8connectedmodemobilityprio 0 0 0
+configure cell eutranfreqrelation emobilityactioneutran 0 0 1
+configure cell eutranfreqrelation u8numberofeutrancells 0 0 0
+configure cell eutranfreqrelation ecreatedby 0 1 1
+configure cell eutranfreqrelation u16arfcnvalueeutrandl 0 1 1350
+configure cell eutranfreqrelation ballowedmeasbandwidth 0 1 1
+configure cell eutranfreqrelation eallowedmeasbandwidth 0 1 0
+configure cell eutranfreqrelation bcellreselectionpriority 0 1 0
+configure cell eutranfreqrelation u8cellreselectionpriority 0 1 7
+configure cell eutranfreqrelation bpmax 0 1 0
+configure cell eutranfreqrelation s8pmax 0 1 -30
+configure cell eutranfreqrelation bpresenceantennaport1 0 1 1
+configure cell eutranfreqrelation beoffsetfreq 0 1 0
+configure cell eutranfreqrelation eoffsetfreq 0 1 15
+configure cell eutranfreqrelation bq_qualmin_r9 0 1 0
+configure cell eutranfreqrelation s8q_qualmin_r9 0 1 -34
+configure cell eutranfreqrelation s8q_rxlevmin 0 1 -60
+configure cell eutranfreqrelation u16threshx_high 0 1 0
+configure cell eutranfreqrelation u16threshx_low 0 1 0
+configure cell eutranfreqrelation bthreshx_q_r9 0 1 0
+configure cell eutranfreqrelation u16threshx_highq_r9 0 1 0
+configure cell eutranfreqrelation u16threshx_lowq_r9 0 1 0
+configure cell eutranfreqrelation u8treselectioneutra 0 1 0
+configure cell eutranfreqrelation btreselectioneutrasf 0 1 0
+configure cell eutranfreqrelation treselectioneutrasf esfmedium 0 1 3
+configure cell eutranfreqrelation treselectioneutrasf esfhigh 0 1 3
+configure cell eutranfreqrelation u8connectedmodemobilityprio 0 1 0
+configure cell eutranfreqrelation emobilityactioneutran 0 1 1
+configure cell eutranfreqrelation u8numberofeutrancells 0 1 0
+configure cell bincludeinsib6 0 1
+configure cell u8numberofuranfreq 0 1
+configure cell freqrelation ecreatedby 0 0 1
+configure cell freqrelation u16arfcnvalueutrandl 0 0 10562
+configure cell freqrelation u16arfcnvalueutranul 0 0 9612
+configure cell freqrelation bcellreselectionpriority 0 0 0
+configure cell freqrelation u8cellreselectionpriority 0 0 6
+configure cell freqrelation u8connectedmodemobilityprio 0 0 6
+configure cell freqrelation emobilityaction 0 0 0
+configure cell freqrelation emobilityactioncsfb 0 0 0
+configure cell freqrelation u8csfallbackprio 0 0 0
+configure cell freqrelation u8csfallbackprioec 0 0 0
+configure cell freqrelation u16threshx_high 0 0 4
+configure cell freqrelation u16threshx_low 0 0 0
+configure cell freqrelation s8q_rxlevmin 0 0 -60
+configure cell freqrelation s8pmaxutra 0 0 33
+configure cell freqrelation s8q_qualmin 0 0 -18
+configure cell freqrelation bthreshx_q_r9 0 0 0
+configure cell freqrelation u16threshx_highq_r9 0 0 0
+configure cell freqrelation u16threshx_lowq_r9 0 0 0
+configure cell freqrelation beoffsetfreq 0 0 0
+configure cell freqrelation s8offsetfreq 0 0 0
+configure cell freqrelation u8numberofutrancells 0 0 0
+configure cell featureactivationcell bdldatafwdactivation 0 1
+configure cell featureactivationcell buldatafwdactivation 0 1
+configure cell featureactivationcell bcontetionbasedrar_ho 0 0
+configure cell featureactivationcell bcelledgedetectionactivation 0 0
+configure cell featureactivationcell bvideobearercanberelease 0 0
+configure cell featureactivationcell buesonmeasureactivation 0 0
+configure cell featureactivationcell bcacenhancementactivation 0 0
+configure cell featureactivationcell betwsactivation 0 0
+configure cell cellpower u16pcfichpoweoffset 0 6000
+configure cell cellpower u16rspoweroffset 0 0
+configure cell cellpower u16phichpoweroffset 0 6000
+configure cell cellpower u16pschpoweroffset 0 6000
+configure cell cellpower u16sschpoweroffset 0 6000
+configure cell cellpower u16pbchpoweroffset 0 6000
+configure cell cellpower u16pdcchpoweroffset 0 6000
+configure cell rnti u16startrnti 0 61
+configure cell rnti u16rntioffset 0 37
+configure cell rnti u16celloffset 0 0
+configure cell etc u8initpdcchofdmsymbolnumber 0 3
+configure cell etc eduplexmode 0 1
+configure cell etc u16numofrbprs 0 50
+configure cell etc u16winsize 0 16
+configure cell etc bpaprenable 0 0
+configure cell etc u16dlsymadv 0 0
+configure cell etc au16paprevm 0 0 3 2 100 100
+configure cell etc au16paprevm 0 1 2 1 100 100
+configure cell etc au16paprevm 0 2 0 0 100 100
+configure cell etc u16paprtimethreshold 0 4000
+configure cell etc u16rfgain 0 8192
+configure cell etc u16numshift 0 13
+configure cell etc u16numoutbit 0 14
+configure cell etc u16numifftoutshift 0 1
+configure cell etc u8ultxmode 0 0
+configure cell etc u8maxcceaggrlevel 0 4
+configure cell etc edlschedpolicy 0 0
+configure cell etc eulschedpolicy 0 0
+configure cell etc u16uecategory 0 5
+configure cell etc imsiwhitelist u8numberoflist 0 1
+configure cell etc imsiwhitelist imsi s8imsistr 0 0 Imsi String
+configure cell pucchsched u16srperiod 0 10
+configure cell pucchsched u16cqiperiod 0 20
+configure cell pucchsched u16riperiod 0 8
+configure cell u16srsperiod 0 80
+configure cell bbittestmode 0 0
+configure cell icic u8icicmode 0 0
+configure cell icic u8ulrboffset 0 0
+configure cell icic u8ulprbnum 0 0
+configure cell icic u8dlrboffset 0 0
+configure cell icic u8dlprbnum 0 0
+configure cell eueinactivitytimer 0 64
+configure dedi u8numpdcpconfig 4
+configure dedi pdcp ediscardtimer 0 7
+configure dedi pdcp erlcmode 0 0
+configure dedi pdcp urlcconfigfield bstatusreportrequired 0 0
+configure dedi pdcp urlcconfigfield epdcpsnsize 0 1
+configure dedi pdcp ehctype 0 0
+configure dedi pdcp rohc u16maxcid 0 15
+configure dedi pdcp rohc profile bprofile0x0001 0 1
+configure dedi pdcp rohc profile bprofile0x0002 0 0
+configure dedi pdcp rohc profile bprofile0x0003 0 0
+configure dedi pdcp rohc profile bprofile0x0004 0 0
+configure dedi pdcp rohc profile bprofile0x0006 0 0
+configure dedi pdcp rohc profile bprofile0x0101 0 0
+configure dedi pdcp rohc profile bprofile0x0102 0 0
+configure dedi pdcp rohc profile bprofile0x0103 0 0
+configure dedi pdcp rohc profile bprofile0x0104 0 0
+configure dedi pdcp ediscardtimer 1 7
+configure dedi pdcp erlcmode 1 0
+configure dedi pdcp urlcconfigfield bstatusreportrequired 1 0
+configure dedi pdcp urlcconfigfield epdcpsnsize 1 1
+configure dedi pdcp ehctype 1 0
+configure dedi pdcp rohc u16maxcid 1 1
+configure dedi pdcp rohc profile bprofile0x0001 1 0
+configure dedi pdcp rohc profile bprofile0x0002 1 0
+configure dedi pdcp rohc profile bprofile0x0003 1 0
+configure dedi pdcp rohc profile bprofile0x0004 1 0
+configure dedi pdcp rohc profile bprofile0x0006 1 0
+configure dedi pdcp rohc profile bprofile0x0101 1 0
+configure dedi pdcp rohc profile bprofile0x0102 1 0
+configure dedi pdcp rohc profile bprofile0x0103 1 0
+configure dedi pdcp rohc profile bprofile0x0104 1 0
+configure dedi pdcp ediscardtimer 2 1
+configure dedi pdcp erlcmode 2 1
+configure dedi pdcp urlcconfigfield bstatusreportrequired 2 0
+configure dedi pdcp urlcconfigfield epdcpsnsize 2 1
+configure dedi pdcp ehctype 2 0
+configure dedi pdcp rohc u16maxcid 2 1
+configure dedi pdcp rohc profile bprofile0x0001 2 0
+configure dedi pdcp rohc profile bprofile0x0002 2 0
+configure dedi pdcp rohc profile bprofile0x0003 2 0
+configure dedi pdcp rohc profile bprofile0x0004 2 0
+configure dedi pdcp rohc profile bprofile0x0006 2 0
+configure dedi pdcp rohc profile bprofile0x0101 2 0
+configure dedi pdcp rohc profile bprofile0x0102 2 0
+configure dedi pdcp rohc profile bprofile0x0103 2 0
+configure dedi pdcp rohc profile bprofile0x0104 2 0
+configure dedi pdcp ediscardtimer 3 1
+configure dedi pdcp erlcmode 3 1
+configure dedi pdcp urlcconfigfield bstatusreportrequired 3 0
+configure dedi pdcp urlcconfigfield epdcpsnsize 3 1
+configure dedi pdcp ehctype 3 0
+configure dedi pdcp rohc u16maxcid 3 15
+configure dedi pdcp rohc profile bprofile0x0001 3 1
+configure dedi pdcp rohc profile bprofile0x0002 3 0
+configure dedi pdcp rohc profile bprofile0x0003 3 0
+configure dedi pdcp rohc profile bprofile0x0004 3 0
+configure dedi pdcp rohc profile bprofile0x0006 3 0
+configure dedi pdcp rohc profile bprofile0x0101 3 0
+configure dedi pdcp rohc profile bprofile0x0102 3 0
+configure dedi pdcp rohc profile bprofile0x0103 3 0
+configure dedi pdcp rohc profile bprofile0x0104 3 0
+configure dedi u8numrlcconfig 6
+configure dedi rlc erlcmode 0 0
+configure dedi rlc urlcconfigfield strlcamconfiginfo stenbrlcamconfig stdlrlcamconfig etpollretransmit 0 15
+configure dedi rlc urlcconfigfield strlcamconfiginfo stenbrlcamconfig stdlrlcamconfig epollpdu 0 2
+configure dedi rlc urlcconfigfield strlcamconfiginfo stenbrlcamconfig stdlrlcamconfig epollbyte 0 14
+configure dedi rlc urlcconfigfield strlcamconfiginfo stenbrlcamconfig stdlrlcamconfig emaxretxthreshold 0 7
+configure dedi rlc urlcconfigfield strlcamconfiginfo stenbrlcamconfig stulrlcamconfig etreordering 0 7
+configure dedi rlc urlcconfigfield strlcamconfiginfo stenbrlcamconfig stulrlcamconfig etstatusprohibit 0 5
+configure dedi rlc urlcconfigfield strlcamconfiginfo stuerlcamconfig stulrlcamconfig etpollretransmit 0 15
+configure dedi rlc urlcconfigfield strlcamconfiginfo stuerlcamconfig stulrlcamconfig epollpdu 0 2
+configure dedi rlc urlcconfigfield strlcamconfiginfo stuerlcamconfig stulrlcamconfig epollbyte 0 14
+configure dedi rlc urlcconfigfield strlcamconfiginfo stuerlcamconfig stulrlcamconfig emaxretxthreshold 0 7
+configure dedi rlc urlcconfigfield strlcamconfiginfo stuerlcamconfig stdlrlcamconfig etreordering 0 7
+configure dedi rlc urlcconfigfield strlcamconfiginfo stuerlcamconfig stdlrlcamconfig etstatusprohibit 0 5
+configure dedi rlc erlcmode 1 0
+configure dedi rlc urlcconfigfield strlcamconfiginfo stenbrlcamconfig stdlrlcamconfig etpollretransmit 1 15
+configure dedi rlc urlcconfigfield strlcamconfiginfo stenbrlcamconfig stdlrlcamconfig epollpdu 1 2
+configure dedi rlc urlcconfigfield strlcamconfiginfo stenbrlcamconfig stdlrlcamconfig epollbyte 1 14
+configure dedi rlc urlcconfigfield strlcamconfiginfo stenbrlcamconfig stdlrlcamconfig emaxretxthreshold 1 7
+configure dedi rlc urlcconfigfield strlcamconfiginfo stenbrlcamconfig stulrlcamconfig etreordering 1 7
+configure dedi rlc urlcconfigfield strlcamconfiginfo stenbrlcamconfig stulrlcamconfig etstatusprohibit 1 5
+configure dedi rlc urlcconfigfield strlcamconfiginfo stuerlcamconfig stulrlcamconfig etpollretransmit 1 15
+configure dedi rlc urlcconfigfield strlcamconfiginfo stuerlcamconfig stulrlcamconfig epollpdu 1 2
+configure dedi rlc urlcconfigfield strlcamconfiginfo stuerlcamconfig stulrlcamconfig epollbyte 1 14
+configure dedi rlc urlcconfigfield strlcamconfiginfo stuerlcamconfig stulrlcamconfig emaxretxthreshold 1 7
+configure dedi rlc urlcconfigfield strlcamconfiginfo stuerlcamconfig stdlrlcamconfig etreordering 1 7
+configure dedi rlc urlcconfigfield strlcamconfiginfo stuerlcamconfig stdlrlcamconfig etstatusprohibit 1 5
+configure dedi rlc erlcmode 2 0
+configure dedi rlc urlcconfigfield strlcamconfiginfo stenbrlcamconfig stdlrlcamconfig etpollretransmit 2 15
+configure dedi rlc urlcconfigfield strlcamconfiginfo stenbrlcamconfig stdlrlcamconfig epollpdu 2 2
+configure dedi rlc urlcconfigfield strlcamconfiginfo stenbrlcamconfig stdlrlcamconfig epollbyte 2 14
+configure dedi rlc urlcconfigfield strlcamconfiginfo stenbrlcamconfig stdlrlcamconfig emaxretxthreshold 2 7
+configure dedi rlc urlcconfigfield strlcamconfiginfo stenbrlcamconfig stulrlcamconfig etreordering 2 7
+configure dedi rlc urlcconfigfield strlcamconfiginfo stenbrlcamconfig stulrlcamconfig etstatusprohibit 2 5
+configure dedi rlc urlcconfigfield strlcamconfiginfo stuerlcamconfig stulrlcamconfig etpollretransmit 2 15
+configure dedi rlc urlcconfigfield strlcamconfiginfo stuerlcamconfig stulrlcamconfig epollpdu 2 2
+configure dedi rlc urlcconfigfield strlcamconfiginfo stuerlcamconfig stulrlcamconfig epollbyte 2 14
+configure dedi rlc urlcconfigfield strlcamconfiginfo stuerlcamconfig stulrlcamconfig emaxretxthreshold 2 7
+configure dedi rlc urlcconfigfield strlcamconfiginfo stuerlcamconfig stdlrlcamconfig etreordering 2 7
+configure dedi rlc urlcconfigfield strlcamconfiginfo stuerlcamconfig stdlrlcamconfig etstatusprohibit 2 5
+configure dedi rlc erlcmode 3 0
+configure dedi rlc urlcconfigfield strlcamconfiginfo stenbrlcamconfig stdlrlcamconfig etpollretransmit 3 15
+configure dedi rlc urlcconfigfield strlcamconfiginfo stenbrlcamconfig stdlrlcamconfig epollpdu 3 2
+configure dedi rlc urlcconfigfield strlcamconfiginfo stenbrlcamconfig stdlrlcamconfig epollbyte 3 14
+configure dedi rlc urlcconfigfield strlcamconfiginfo stenbrlcamconfig stdlrlcamconfig emaxretxthreshold 3 7
+configure dedi rlc urlcconfigfield strlcamconfiginfo stenbrlcamconfig stulrlcamconfig etreordering 3 7
+configure dedi rlc urlcconfigfield strlcamconfiginfo stenbrlcamconfig stulrlcamconfig etstatusprohibit 3 5
+configure dedi rlc urlcconfigfield strlcamconfiginfo stuerlcamconfig stulrlcamconfig etpollretransmit 3 15
+configure dedi rlc urlcconfigfield strlcamconfiginfo stuerlcamconfig stulrlcamconfig epollpdu 3 2
+configure dedi rlc urlcconfigfield strlcamconfiginfo stuerlcamconfig stulrlcamconfig epollbyte 3 14
+configure dedi rlc urlcconfigfield strlcamconfiginfo stuerlcamconfig stulrlcamconfig emaxretxthreshold 3 7
+configure dedi rlc urlcconfigfield strlcamconfiginfo stuerlcamconfig stdlrlcamconfig etreordering 3 7
+configure dedi rlc urlcconfigfield strlcamconfiginfo stuerlcamconfig stdlrlcamconfig etstatusprohibit 3 5
+configure dedi rlc erlcmode 4 1
+configure dedi rlc urlcconfigfield strlcumconfiginfo edirection 4 2
+configure dedi rlc urlcconfigfield strlcumconfiginfo stenbrlcumconfig stdlrlcumconfig esnfieldlength 4 1
+configure dedi rlc urlcconfigfield strlcumconfiginfo stenbrlcumconfig stulrlcumconfig esnfieldlength 4 1
+configure dedi rlc urlcconfigfield strlcumconfiginfo stenbrlcumconfig stulrlcumconfig etreordering 4 1
+configure dedi rlc urlcconfigfield strlcumconfiginfo stuerlcumconfig stulrlcumconfig esnfieldlength 4 1
+configure dedi rlc urlcconfigfield strlcumconfiginfo stuerlcumconfig stdlrlcumconfig esnfieldlength 4 1
+configure dedi rlc urlcconfigfield strlcumconfiginfo stuerlcumconfig stdlrlcumconfig etreordering 4 1
+configure dedi rlc erlcmode 5 1
+configure dedi rlc urlcconfigfield strlcumconfiginfo edirection 5 2
+configure dedi rlc urlcconfigfield strlcumconfiginfo stenbrlcumconfig stdlrlcumconfig esnfieldlength 5 1
+configure dedi rlc urlcconfigfield strlcumconfiginfo stenbrlcumconfig stulrlcumconfig esnfieldlength 5 1
+configure dedi rlc urlcconfigfield strlcumconfiginfo stenbrlcumconfig stulrlcumconfig etreordering 5 1
+configure dedi rlc urlcconfigfield strlcumconfiginfo stuerlcumconfig stulrlcumconfig esnfieldlength 5 1
+configure dedi rlc urlcconfigfield strlcumconfiginfo stuerlcumconfig stdlrlcumconfig esnfieldlength 5 1
+configure dedi rlc urlcconfigfield strlcumconfiginfo stuerlcumconfig stdlrlcumconfig etreordering 5 1
+configure dedi u8numlogicalchconfig 4
+configure dedi logicalch blogicalchgroup 0 1
+configure dedi logicalch u8logicalchgroup 0 0
+configure dedi logicalch u8priority 0 1
+configure dedi logicalch eprioritisedbitrate 0 7
+configure dedi logicalch ebucketsizeduration 0 7
+configure dedi logicalch blogicalchgroup 1 1
+configure dedi logicalch u8logicalchgroup 1 0
+configure dedi logicalch u8priority 1 3
+configure dedi logicalch eprioritisedbitrate 1 7
+configure dedi logicalch ebucketsizeduration 1 7
+configure dedi logicalch blogicalchgroup 2 1
+configure dedi logicalch u8logicalchgroup 2 1
+configure dedi logicalch u8priority 2 6
+configure dedi logicalch eprioritisedbitrate 2 0
+configure dedi logicalch ebucketsizeduration 2 1
+configure dedi logicalch blogicalchgroup 3 1
+configure dedi logicalch u8logicalchgroup 3 2
+configure dedi logicalch u8priority 3 13
+configure dedi logicalch eprioritisedbitrate 3 0
+configure dedi logicalch ebucketsizeduration 3 1
+configure dedi u8nummacconfig 1
+configure dedi mac bulschconfig 0 1
+configure dedi mac bdlschconfig 0 1
+configure dedi mac bdrxconfig 0 1
+configure dedi mac bphrconfig 0 1
+configure dedi mac etimealignmenttimerdedicated 0 7
+configure dedi mac ulsch bmaxharqtx 0 1
+configure dedi mac ulsch emaxharqtx 0 4
+configure dedi mac ulsch bperiodicbsrtimer 0 1
+configure dedi mac ulsch eperiodicbsrtimer 0 0
+configure dedi mac ulsch eretxbsrtimer 0 0
+configure dedi mac ulsch bttibundling 0 0
+configure dedi mac dlsch bmaxharqtx 0 1
+configure dedi mac dlsch emaxharqtx 0 3
+configure dedi mac u16nroflongdrxexpiration 0 65535
+configure dedi mac drx edrxconfigtype 0 1
+configure dedi mac drx drx eondurationtimer 0 1
+configure dedi mac drx drx edrxinactivitytimer 0 14
+configure dedi mac drx drx edrxretxtimer 0 5
+configure dedi mac drx drx elongdrxcycletype 0 3
+configure dedi mac drx drx u16ldcsfvalue 0 0
+configure dedi mac drx drx bshortdrx 0 0
+configure dedi mac drx drx shortdrx eshortdrxcycle 0 2
+configure dedi mac drx drx shortdrx u8drxshortcycletimer 0 2
+configure dedi mac phr ephrconfigtype 0 0
+configure dedi mac phr phr eperiodicphrtimer 0 7
+configure dedi mac phr phr eprohibitphrtimer 0 7
+configure dedi mac phr phr edlpathlosschange 0 2
+configure dedi u8numphyconfig 2
+configure dedi phy bpdschconfigdedicated 0 1
+configure dedi phy bpucchconfigdedicated 0 0
+configure dedi phy bpuschconfigdedicated 0 1
+configure dedi phy bulpowercontroldedicated 0 1
+configure dedi phy btpcpdcchconfigpucch 0 0
+configure dedi phy btpcpdcchconfigpusch 0 0
+configure dedi phy bcqireportconfig 0 1
+configure dedi phy bsrsulconfigdedicated 0 1
+configure dedi phy bantennainfo 0 1
+configure dedi phy bschedulingrequestconfig 0 1
+configure dedi phy pdsch epa 0 2
+configure dedi phy pucch eacknackrepconfigtype 0 0
+configure dedi phy pucch acknackrep erepetitionfactor 0 0
+configure dedi phy pucch acknackrep u16n1pucchanrep 0 0
+configure dedi phy pusch u8betaoffsetackindex 0 10
+configure dedi phy pusch u8betaoffsetriindex 0 12
+configure dedi phy pusch u8betaoffsetcqiindex 0 15
+configure dedi phy pwrctrl s8p0uepusch 0 7
+configure dedi phy pwrctrl edeltamcsenabled 0 0
+configure dedi phy pwrctrl baccumulationenabled 0 1
+configure dedi phy pwrctrl s8p0uepucch 0 0
+configure dedi phy pwrctrl u8psrsoffset 0 5
+configure dedi phy pwrctrl efiltercoefficient 0 4
+configure dedi phy tpcpdcchpucch etpcpdcchconfigtype 0 0
+configure dedi phy tpcpdcchpucch tpcpfcch u16tpcrnti 0 1023
+configure dedi phy tpcpdcchpucch tpcpfcch tpcindex etpcindextype 0 0
+configure dedi phy tpcpdcchpucch tpcpfcch tpcindex sttpcindexfield u8indexofformat3 0 1
+configure dedi phy tpcpdcchpucch tpcpfcch tpcindex sttpcindexfield u8indexofformat3a 0 1
+configure dedi phy tpcpdcchpusch etpcpdcchconfigtype 0 1
+configure dedi phy tpcpdcchpusch tpcpfcch u16tpcrnti 0 506
+configure dedi phy tpcpdcchpusch tpcpfcch tpcindex etpcindextype 0 0
+configure dedi phy tpcpdcchpusch tpcpfcch tpcindex sttpcindexfield u8indexofformat3 0 1
+configure dedi phy tpcpdcchpusch tpcpfcch tpcindex sttpcindexfield u8indexofformat3a 0 1
+configure dedi phy cqi bcqireportmodeaperiodic 0 1
+configure dedi phy cqi bcqireportperiodic 0 1
+configure dedi phy cqi ecqireportmodeaperiodic 0 3
+configure dedi phy cqi s8nompdschrsepreoffset 0 0
+configure dedi phy cqi cqireport ecqireportperiodictype 0 1
+configure dedi phy cqi cqireport cqireportperiodicsetup briconfigindex 0 1
+configure dedi phy cqi cqireport cqireportperiodicsetup u16cqipucchresourceindex 0 0
+configure dedi phy cqi cqireport cqireportperiodicsetup u16cqipmiconfigindex 0 11
+configure dedi phy cqi cqireport cqireportperiodicsetup ecqiformatindicatortype 0 0
+configure dedi phy cqi cqireport cqireportperiodicsetup u8cqisubbandk 0 1
+configure dedi phy cqi cqireport cqireportperiodicsetup u16riconfigindex 0 483
+configure dedi phy cqi cqireport cqireportperiodicsetup bsimultaneousacknackcqi 0 1
+configure dedi phy srs esrsconfigtype 0 1
+configure dedi phy srs srs esrsbandwidth 0 0
+configure dedi phy srs srs esrshoppingbandwidth 0 0
+configure dedi phy srs srs u8freqdomainposition 0 0
+configure dedi phy srs srs bduration 0 1
+configure dedi phy srs srs u16srsconfigindex 0 20
+configure dedi phy srs srs u8transmissioncomb 0 0
+configure dedi phy srs srs ecyclicshift 0 0
+configure dedi phy antenna etransmissionmode 0 2
+configure dedi phy antenna bcodebooksubsetrestriction 0 1
+configure dedi phy antenna codebooksubsetrestriction ecodebooksubsettype 0 0
+configure dedi phy antenna codebooksubsetrestriction u8txanttmlength 0 2
+configure dedi phy antenna codebooksubsetrestriction u8txanttmvalue 0 0 3
+configure dedi phy antenna codebooksubsetrestriction u8txanttmvalue 0 1 0
+configure dedi phy antenna codebooksubsetrestriction u8txanttmvalue 0 2 0
+configure dedi phy antenna codebooksubsetrestriction u8txanttmvalue 0 3 0
+configure dedi phy antenna codebooksubsetrestriction u8txanttmvalue 0 4 0
+configure dedi phy antenna codebooksubsetrestriction u8txanttmvalue 0 5 0
+configure dedi phy antenna codebooksubsetrestriction u8txanttmvalue 0 6 0
+configure dedi phy antenna codebooksubsetrestriction u8txanttmvalue 0 7 0
+configure dedi phy antenna codebooksubsetrestriction uetransantselection eantselectiontype 0 1
+configure dedi phy antenna codebooksubsetrestriction uetransantselection etransantselectionsetup 0 1
+configure dedi phy schdulingrequest eschedulingreqconfigtype 0 1
+configure dedi phy schdulingrequest schedreq u16srpucchresourceindex 0 41
+configure dedi phy schdulingrequest schedreq u8srconfigindex 0 30
+configure dedi phy schdulingrequest schedreq edsrtransmax 0 1
+configure dedi phy bpdschconfigdedicated 1 1
+configure dedi phy bpucchconfigdedicated 1 0
+configure dedi phy bpuschconfigdedicated 1 1
+configure dedi phy bulpowercontroldedicated 1 1
+configure dedi phy btpcpdcchconfigpucch 1 0
+configure dedi phy btpcpdcchconfigpusch 1 0
+configure dedi phy bcqireportconfig 1 1
+configure dedi phy bsrsulconfigdedicated 1 1
+configure dedi phy bantennainfo 1 1
+configure dedi phy bschedulingrequestconfig 1 1
+configure dedi phy pdsch epa 1 2
+configure dedi phy pucch eacknackrepconfigtype 1 0
+configure dedi phy pucch acknackrep erepetitionfactor 1 0
+configure dedi phy pucch acknackrep u16n1pucchanrep 1 0
+configure dedi phy pusch u8betaoffsetackindex 1 10
+configure dedi phy pusch u8betaoffsetriindex 1 12
+configure dedi phy pusch u8betaoffsetcqiindex 1 15
+configure dedi phy pwrctrl s8p0uepusch 1 7
+configure dedi phy pwrctrl edeltamcsenabled 1 0
+configure dedi phy pwrctrl baccumulationenabled 1 1
+configure dedi phy pwrctrl s8p0uepucch 1 0
+configure dedi phy pwrctrl u8psrsoffset 1 5
+configure dedi phy pwrctrl efiltercoefficient 1 4
+configure dedi phy tpcpdcchpucch etpcpdcchconfigtype 1 0
+configure dedi phy tpcpdcchpucch tpcpfcch u16tpcrnti 1 1023
+configure dedi phy tpcpdcchpucch tpcpfcch tpcindex etpcindextype 1 0
+configure dedi phy tpcpdcchpucch tpcpfcch tpcindex sttpcindexfield u8indexofformat3 1 1
+configure dedi phy tpcpdcchpucch tpcpfcch tpcindex sttpcindexfield u8indexofformat3a 1 1
+configure dedi phy tpcpdcchpusch etpcpdcchconfigtype 1 1
+configure dedi phy tpcpdcchpusch tpcpfcch u16tpcrnti 1 506
+configure dedi phy tpcpdcchpusch tpcpfcch tpcindex etpcindextype 1 0
+configure dedi phy tpcpdcchpusch tpcpfcch tpcindex sttpcindexfield u8indexofformat3 1 1
+configure dedi phy tpcpdcchpusch tpcpfcch tpcindex sttpcindexfield u8indexofformat3a 1 1
+configure dedi phy cqi bcqireportmodeaperiodic 1 1
+configure dedi phy cqi bcqireportperiodic 1 1
+configure dedi phy cqi ecqireportmodeaperiodic 1 3
+configure dedi phy cqi s8nompdschrsepreoffset 1 0
+configure dedi phy cqi cqireport ecqireportperiodictype 1 1
+configure dedi phy cqi cqireport cqireportperiodicsetup briconfigindex 1 1
+configure dedi phy cqi cqireport cqireportperiodicsetup u16cqipucchresourceindex 1 0
+configure dedi phy cqi cqireport cqireportperiodicsetup u16cqipmiconfigindex 1 11
+configure dedi phy cqi cqireport cqireportperiodicsetup ecqiformatindicatortype 1 0
+configure dedi phy cqi cqireport cqireportperiodicsetup u8cqisubbandk 1 1
+configure dedi phy cqi cqireport cqireportperiodicsetup u16riconfigindex 1 483
+configure dedi phy cqi cqireport cqireportperiodicsetup bsimultaneousacknackcqi 1 1
+configure dedi phy srs esrsconfigtype 1 1
+configure dedi phy srs srs esrsbandwidth 1 0
+configure dedi phy srs srs esrshoppingbandwidth 1 0
+configure dedi phy srs srs u8freqdomainposition 1 0
+configure dedi phy srs srs bduration 1 1
+configure dedi phy srs srs u16srsconfigindex 1 20
+configure dedi phy srs srs u8transmissioncomb 1 0
+configure dedi phy srs srs ecyclicshift 1 0
+configure dedi phy antenna etransmissionmode 1 2
+configure dedi phy antenna bcodebooksubsetrestriction 1 1
+configure dedi phy antenna codebooksubsetrestriction ecodebooksubsettype 1 0
+configure dedi phy antenna codebooksubsetrestriction u8txanttmlength 1 2
+configure dedi phy antenna codebooksubsetrestriction u8txanttmvalue 1 0 3
+configure dedi phy antenna codebooksubsetrestriction u8txanttmvalue 1 1 0
+configure dedi phy antenna codebooksubsetrestriction u8txanttmvalue 1 2 0
+configure dedi phy antenna codebooksubsetrestriction u8txanttmvalue 1 3 0
+configure dedi phy antenna codebooksubsetrestriction u8txanttmvalue 1 4 0
+configure dedi phy antenna codebooksubsetrestriction u8txanttmvalue 1 5 0
+configure dedi phy antenna codebooksubsetrestriction u8txanttmvalue 1 6 0
+configure dedi phy antenna codebooksubsetrestriction u8txanttmvalue 1 7 0
+configure dedi phy antenna codebooksubsetrestriction uetransantselection eantselectiontype 1 1
+configure dedi phy antenna codebooksubsetrestriction uetransantselection etransantselectionsetup 1 1
+configure dedi phy schdulingrequest eschedulingreqconfigtype 1 1
+configure dedi phy schdulingrequest schedreq u16srpucchresourceindex 1 41
+configure dedi phy schdulingrequest schedreq u8srconfigindex 1 30
+configure dedi phy schdulingrequest schedreq edsrtransmax 1 1
+configure dedi sps bspscrnti 1
+configure dedi sps bspsdlconfig 1
+configure dedi sps bspsulconfig 1
+configure dedi sps u16crnti 1
+configure dedi sps spsdl espsdlconfigtype 1
+configure dedi sps spsdl spsdl espsintervaldl 1
+configure dedi sps spsdl spsdl u8numconfspsprocess 1
+configure dedi sps spsdl spsdl u8numpucchpersistent 1
+configure dedi sps spsdl spsdl u16n1pucchpersistent 0 1
+configure dedi sps spsul espsulconfigtype 1
+configure dedi sps spsul spsul bp0persistent 0
+configure dedi sps spsul spsul espsintervalul 1
+configure dedi sps spsul spsul eimplicitreleaseafter 0
+configure dedi sps spsul spsul p0persistent s8p0nominalpuschpersistent 0
+configure dedi sps spsul spsul p0persistent s8p0uepuschpersistent 3
+configure enbtimer u32trlcmacphysetupval 1
+configure enbtimer u32trlcmacphyreconfval 1
+configure enbtimer u32trlcmacphyreleaseval 1
+configure enbtimer u32tpdcpsetupval 1
+configure enbtimer u32tpdcpreconfval 1
+configure enbtimer u32tpdcpreleaseval 1
+configure enbtimer u32tgtpsetupval 1
+configure enbtimer u32tgtpreconfval 1
+configure enbtimer u32tgtpreleaseval 1
+configure enbtimer u32tgtpdatafwdconfigval 1
+configure enbtimer u32tpdcpdatafwdsnenqval 1
+configure enbtimer u32trrcconsetupval 3
+configure enbtimer u32tsmcval 3
+configure enbtimer u32trrcconreconfval 3
+configure enbtimer u32trrcconreestval 3
+configure enbtimer u32tuecapainfoval 3
+configure enbtimer u32trrcrelsent 10
+configure enbtimer u32trrcanrreqval 5
+configure enbtimer u32tinitctxsetupval 20
+configure enbtimer u32tctxrelreqval 5
+configure enbtimer u32ts1sctpconnval 3
+configure enbtimer u32tresetval 5
+configure enbtimer u32ts1relocprepval 7
+configure enbtimer u32ts1relocoverallval 7
+configure enbtimer u32tpathswitchval 5
+configure enbtimer u32tctxrelcmdwaitval 3
+configure enbtimer u32tmmestatusval 5
+configure enbtimer u32ts1hocancelackval 5
+configure enbtimer u32trrccellsetupval 12
+configure enbtimer u32trrccelldeletionval 3
+configure enbtimer u32tsysteminfoupdateval 3
+configure enbtimer u32tallcallreleaseval 3
+configure enbtimer u32tdedpreambleval 3
+configure enbtimer u32tdatafwdval 3
+configure enbtimer u32tstatusreqval 2
+configure enbtimer u32tx2setupoverall 10
+configure enbtimer u32tx2sctplinkval 3
+configure enbtimer u32tx2sctpretrigval 3
+configure enbtimer u32tx2setupreqval 5
+configure enbtimer u32tx2relocprepval 7
+configure enbtimer u32tx2relocoverallval 7
+configure enbtimer u32tx2snstatusval 5
+configure securityhandling u8numbercipheringpriority 2
+configure securityhandling u8cipheringpriority 0 0
+configure securityhandling u8cipheringpriority 1 1
+configure securityhandling u8numberintegritypriority 1
+configure securityhandling u8integritypriority 0 1
+
diff --git a/octal/cavium_env/tftpd32.exe b/octal/cavium_env/tftpd32.exe
new file mode 100644
index 0000000000..a383403c4a
Binary files /dev/null and b/octal/cavium_env/tftpd32.exe differ