From d0963785a099f56ade8ceb60d7f9bad3d294785c Mon Sep 17 00:00:00 2001 From: mdlewisfb Date: Mon, 8 Oct 2018 11:33:19 -0700 Subject: [PATCH 1/5] Adding .clang-format file based on linux kernel format file. --- firmware/ec/.clang-format | 108 ++++++++++++++++++++++++++++++++++++++ 1 file changed, 108 insertions(+) create mode 100644 firmware/ec/.clang-format diff --git a/firmware/ec/.clang-format b/firmware/ec/.clang-format new file mode 100644 index 0000000000..32866a4377 --- /dev/null +++ b/firmware/ec/.clang-format @@ -0,0 +1,108 @@ +# clang-format configuration file. Intended for clang-format >= 4. +# +# Modified from linux kernel .clang-format file. +# +# For more information, see: +# +# Documentation/process/clang-format.rst +# https://clang.llvm.org/docs/ClangFormat.html +# https://clang.llvm.org/docs/ClangFormatStyleOptions.html +# +--- +AccessModifierOffset: -4 +AlignAfterOpenBracket: Align +AlignConsecutiveAssignments: false +AlignConsecutiveDeclarations: false +AlignEscapedNewlinesLeft: true +AlignOperands: true +AlignTrailingComments: false +AllowAllParametersOfDeclarationOnNextLine: false +AllowShortBlocksOnASingleLine: false +AllowShortCaseLabelsOnASingleLine: false +AllowShortFunctionsOnASingleLine: None +AllowShortIfStatementsOnASingleLine: false +AllowShortLoopsOnASingleLine: false +AlwaysBreakAfterDefinitionReturnType: None +AlwaysBreakAfterReturnType: None +AlwaysBreakBeforeMultilineStrings: false +AlwaysBreakTemplateDeclarations: false +BinPackArguments: true +BinPackParameters: true +BraceWrapping: + AfterClass: false + AfterControlStatement: false + AfterEnum: false + AfterFunction: true + AfterNamespace: true + AfterObjCDeclaration: false + AfterStruct: false + AfterUnion: false + #AfterExternBlock: false # Unknown to clang-format-5.0 + BeforeCatch: false + BeforeElse: false + IndentBraces: false +BreakBeforeBinaryOperators: None +BreakBeforeBraces: Custom +BreakBeforeTernaryOperators: false +BreakConstructorInitializersBeforeComma: false +BreakAfterJavaFieldAnnotations: false +BreakStringLiterals: false +ColumnLimit: 80 +CommentPragmas: '^ IWYU pragma:' +ConstructorInitializerAllOnOneLineOrOnePerLine: false +ConstructorInitializerIndentWidth: 8 +ContinuationIndentWidth: 8 +Cpp11BracedListStyle: false +DerivePointerAlignment: false +DisableFormat: false +ExperimentalAutoDetectBinPacking: false + +# Taken from: +# git grep -h '^#define [^[:space:]]*for_each[^[:space:]]*(' include/ \ +# | sed "s,^#define \([^[:space:]]*for_each[^[:space:]]*\)(.*$, - '\1'," \ +# | sort | uniq +#ForEachMacros: #None match yet + +IncludeCategories: + - Regex: '^<.*' + Priority: 1 + - Regex: '^<.*\.h>' + Priority: 1 + - Regex: '"ti.*' + Priority: 3 + - Regex: '"inc/*' + Priority: 4 +IncludeIsMainRegex: '(Test)?$' +IndentCaseLabels: true +IndentWidth: 4 +IndentWrappedFunctionNames: false +JavaScriptQuotes: Leave +JavaScriptWrapImports: true +KeepEmptyLinesAtTheStartOfBlocks: false +MacroBlockBegin: '' +MacroBlockEnd: '' +MaxEmptyLinesToKeep: 1 +NamespaceIndentation: Inner +#ObjCBinPackProtocolList: Auto # Unknown to clang-format-5.0 +ObjCBlockIndentWidth: 8 +ObjCSpaceAfterProperty: true +ObjCSpaceBeforeProtocolList: true +PointerAlignment: Right +ReflowComments: false +SortIncludes: false +SpaceAfterCStyleCast: false +SpaceAfterTemplateKeyword: true +SpaceBeforeAssignmentOperators: true +SpaceBeforeParens: ControlStatements +SpaceInEmptyParentheses: false +SpacesBeforeTrailingComments: 1 +SpacesInAngles: false +SpacesInContainerLiterals: false +SpacesInCStyleCastParentheses: false +SpacesInParentheses: false +SpacesInSquareBrackets: false +Standard: Cpp03 + +TabWidth: 4 +UseTab: Never +... From 09068532ebafb1ab8a34166a4c35766a3bb1947d Mon Sep 17 00:00:00 2001 From: mdlewisfb Date: Mon, 8 Oct 2018 11:33:39 -0700 Subject: [PATCH 2/5] Update to code after running clang-format on all *.c and *.h files. --- firmware/ec/common/inc/global/Framework.h | 60 +- firmware/ec/common/inc/global/OC_CONNECT1.h | 70 +- firmware/ec/common/inc/global/ocmp_frame.h | 65 +- .../common/inc/ocmp_wrappers/ocmp_adt7481.h | 30 +- .../inc/ocmp_wrappers/ocmp_dat-xxr5a-pp.h | 5 +- .../common/inc/ocmp_wrappers/ocmp_debugi2c.h | 32 +- .../common/inc/ocmp_wrappers/ocmp_debugmdio.h | 28 +- .../inc/ocmp_wrappers/ocmp_debugocgpio.h | 30 +- .../inc/ocmp_wrappers/ocmp_eeprom_cat24c04.h | 63 +- .../ec/common/inc/ocmp_wrappers/ocmp_eth_sw.h | 104 +- .../common/inc/ocmp_wrappers/ocmp_fe-param.h | 8 +- .../ec/common/inc/ocmp_wrappers/ocmp_ina226.h | 25 +- .../common/inc/ocmp_wrappers/ocmp_iridium.h | 51 +- .../ec/common/inc/ocmp_wrappers/ocmp_led.h | 12 +- .../common/inc/ocmp_wrappers/ocmp_ltc4015.h | 57 +- .../common/inc/ocmp_wrappers/ocmp_ltc4274.h | 58 +- .../common/inc/ocmp_wrappers/ocmp_ltc4275.h | 18 +- .../ec/common/inc/ocmp_wrappers/ocmp_mac.h | 9 +- .../inc/ocmp_wrappers/ocmp_powersource.h | 22 +- .../inc/ocmp_wrappers/ocmp_rfpowermonitor.h | 8 +- .../inc/ocmp_wrappers/ocmp_rfwatchdog.h | 7 +- .../ec/common/inc/ocmp_wrappers/ocmp_se98a.h | 28 +- .../ec/common/inc/ocmp_wrappers/ocmp_syncio.h | 24 +- .../inc/ocmp_wrappers/ocmp_testmodule.h | 137 +- firmware/ec/inc/common/bigbrother.h | 6 +- firmware/ec/inc/common/byteorder.h | 57 +- firmware/ec/inc/common/global_header.h | 100 +- firmware/ec/inc/common/i2cbus.h | 18 +- firmware/ec/inc/common/post.h | 5 +- firmware/ec/inc/common/post_util.h | 3 +- firmware/ec/inc/devices/88E6071_registers.h | 334 +-- firmware/ec/inc/devices/adt7481.h | 88 +- firmware/ec/inc/devices/debug_ocgpio.h | 12 +- firmware/ec/inc/devices/debug_oci2c.h | 14 +- firmware/ec/inc/devices/debug_ocmdio.h | 10 +- firmware/ec/inc/devices/eeprom.h | 48 +- firmware/ec/inc/devices/eth_sw.h | 106 +- firmware/ec/inc/devices/ext_battery.h | 30 +- firmware/ec/inc/devices/ina226.h | 44 +- firmware/ec/inc/devices/int_battery.h | 16 +- firmware/ec/inc/devices/led.h | 18 +- firmware/ec/inc/devices/ltc4015.h | 95 +- firmware/ec/inc/devices/ltc4274.h | 160 +- firmware/ec/inc/devices/ltc4275.h | 36 +- firmware/ec/inc/devices/powerSource.h | 47 +- firmware/ec/inc/devices/sbd.h | 22 +- firmware/ec/inc/devices/se98a.h | 13 +- firmware/ec/inc/devices/sx1509.h | 85 +- firmware/ec/inc/interfaces/uartdma.h | 12 +- firmware/ec/inc/interfaces/usbcdcd.h | 3 +- firmware/ec/inc/subsystem/bms/bms.h | 10 +- .../ec/inc/subsystem/ethernet/ethernetSS.h | 2 +- firmware/ec/inc/subsystem/gpp/ebmp.h | 8 +- firmware/ec/inc/subsystem/gpp/gpp.h | 16 +- firmware/ec/inc/subsystem/hci/hci.h | 4 +- firmware/ec/inc/subsystem/hci/hci_led.h | 4 +- firmware/ec/inc/subsystem/rffe/rffe.h | 26 +- firmware/ec/inc/subsystem/rffe/rffe_ctrl.h | 6 +- .../ec/inc/subsystem/rffe/rffe_powermonitor.h | 21 +- firmware/ec/inc/subsystem/rffe/rffe_sensor.h | 8 +- firmware/ec/inc/subsystem/sdr/sdr.h | 20 +- firmware/ec/inc/subsystem/sync/sync.h | 15 +- .../ec/inc/subsystem/testModule/testModule.h | 7 +- firmware/ec/inc/subsystem/watchdog/watchdog.h | 4 +- firmware/ec/inc/utils/ocmp_util.h | 19 +- firmware/ec/inc/utils/util.h | 21 +- firmware/ec/platform/oc-sdr/cfg/OC_CONNECT1.c | 508 ++--- .../ec/platform/oc-sdr/cfg/OC_CONNECT_FE.c | 187 +- .../ec/platform/oc-sdr/cfg/OC_CONNECT_GBC.c | 292 +-- .../ec/platform/oc-sdr/cfg/OC_CONNECT_LED.c | 33 +- .../ec/platform/oc-sdr/cfg/OC_CONNECT_SDR.c | 51 +- .../ec/platform/oc-sdr/cfg/OC_CONNECT_SYNC.c | 22 +- firmware/ec/platform/oc-sdr/schema/schema.c | 1903 +++++++++-------- firmware/ec/src/Board.h | 68 +- firmware/ec/src/bigbrother.c | 44 +- firmware/ec/src/comm/gossiper.c | 68 +- firmware/ec/src/comm/gossiper.h | 8 +- firmware/ec/src/devices/adt7481.c | 509 +++-- firmware/ec/src/devices/eeprom.c | 142 +- firmware/ec/src/devices/eth_sw.c | 434 ++-- firmware/ec/src/devices/g510.c | 212 +- firmware/ec/src/devices/i2c/XR20M1170.c | 131 +- firmware/ec/src/devices/i2c/XR20M1170.h | 88 +- .../ec/src/devices/i2c/XR20M1170_Registers.h | 170 +- firmware/ec/src/devices/i2c/threaded_int.c | 22 +- firmware/ec/src/devices/i2cbus.c | 32 +- firmware/ec/src/devices/ina226.c | 99 +- firmware/ec/src/devices/led.c | 244 ++- firmware/ec/src/devices/ltc4015.c | 205 +- firmware/ec/src/devices/ltc4015_registers.h | 148 +- firmware/ec/src/devices/ltc4274.c | 608 +++--- firmware/ec/src/devices/ltc4275.c | 26 +- .../src/devices/ocmp_wrappers/ocmp_adt7481.c | 42 +- .../src/devices/ocmp_wrappers/ocmp_cat24c04.c | 51 +- .../devices/ocmp_wrappers/ocmp_dat-xxr5a-pp.c | 49 +- .../src/devices/ocmp_wrappers/ocmp_debugi2c.c | 27 +- .../devices/ocmp_wrappers/ocmp_debugmdio.c | 53 +- .../devices/ocmp_wrappers/ocmp_debugocgpio.c | 43 +- .../src/devices/ocmp_wrappers/ocmp_eth_sw.c | 137 +- .../ec/src/devices/ocmp_wrappers/ocmp_fe.c | 48 +- .../src/devices/ocmp_wrappers/ocmp_ina226.c | 20 +- .../src/devices/ocmp_wrappers/ocmp_iridium.c | 87 +- .../ec/src/devices/ocmp_wrappers/ocmp_led.c | 24 +- .../src/devices/ocmp_wrappers/ocmp_ltc4015.c | 130 +- .../src/devices/ocmp_wrappers/ocmp_ltc4274.c | 108 +- .../src/devices/ocmp_wrappers/ocmp_ltc4275.c | 39 +- .../ec/src/devices/ocmp_wrappers/ocmp_mac.c | 93 +- .../devices/ocmp_wrappers/ocmp_powerSource.c | 6 +- .../ocmp_wrappers/ocmp_rfpowermonitor.c | 9 +- .../devices/ocmp_wrappers/ocmp_rfwatchdog.c | 7 +- .../ec/src/devices/ocmp_wrappers/ocmp_se98a.c | 23 +- .../src/devices/ocmp_wrappers/ocmp_syncio.c | 2 - .../devices/ocmp_wrappers/ocmp_testmodule.c | 131 +- firmware/ec/src/devices/pca9557.c | 28 +- firmware/ec/src/devices/powerSource.c | 116 +- firmware/ec/src/devices/sbdn9603.c | 171 +- firmware/ec/src/devices/se98a.c | 103 +- firmware/ec/src/devices/sx1509.c | 360 ++-- firmware/ec/src/devices/uart/UartMon.c | 42 +- firmware/ec/src/devices/uart/UartMon.h | 6 +- firmware/ec/src/devices/uart/at_cmd.c | 190 +- firmware/ec/src/devices/uart/gsm.c | 148 +- firmware/ec/src/devices/uart/gsm.h | 69 +- firmware/ec/src/devices/uart/sbd.c | 118 +- firmware/ec/src/devices/uart/sbd.h | 23 +- firmware/ec/src/drivers/GpioNative.c | 32 +- firmware/ec/src/drivers/GpioPCA9557.c | 31 +- firmware/ec/src/drivers/GpioSX1509.c | 111 +- firmware/ec/src/drivers/GpioSX1509.h | 6 +- firmware/ec/src/drivers/OcGpio.c | 1 - firmware/ec/src/drivers/OcGpio.h | 184 +- firmware/ec/src/drivers/PinGroup.c | 2 +- firmware/ec/src/drivers/PinGroup.h | 4 +- firmware/ec/src/drivers/mdio_bb.c | 44 +- firmware/ec/src/helpers/attribute.h | 2 +- firmware/ec/src/helpers/i2c.c | 10 +- firmware/ec/src/helpers/memory.c | 10 +- firmware/ec/src/helpers/memory.h | 8 +- firmware/ec/src/helpers/uart.c | 8 +- .../ec/src/interfaces/Ethernet/tcp_tx_rx.c | 52 +- firmware/ec/src/interfaces/UART/uartdma.c | 106 +- firmware/ec/src/interfaces/USB/usb.c | 46 +- firmware/ec/src/interfaces/USB/usbcdcd.c | 291 +-- firmware/ec/src/main.c | 43 +- firmware/ec/src/post/post.c | 100 +- firmware/ec/src/post/post_util.c | 114 +- firmware/ec/src/registry/SSRegistry.c | 115 +- firmware/ec/src/registry/SSRegistry.h | 2 +- firmware/ec/src/subsystem/gpp/ebmp.c | 118 +- firmware/ec/src/subsystem/gpp/gpp.c | 30 +- firmware/ec/src/subsystem/hci/hci.c | 3 +- firmware/ec/src/subsystem/hci/hci_buzzer.c | 6 +- firmware/ec/src/subsystem/hci/led/hci_led.c | 10 +- firmware/ec/src/subsystem/obc/obc.c | 38 +- firmware/ec/src/subsystem/rffe/rffe.c | 42 +- firmware/ec/src/subsystem/rffe/rffe_ctrl.c | 17 +- .../ec/src/subsystem/rffe/rffe_powermonitor.c | 20 +- firmware/ec/src/subsystem/sdr/sdr.c | 41 +- firmware/ec/src/subsystem/sync/sync.c | 41 +- firmware/ec/src/subsystem/sys/sys.c | 41 +- firmware/ec/src/subsystem/watchdog/watchdog.c | 26 +- firmware/ec/src/utils/ocmp_util.c | 81 +- firmware/ec/src/utils/swupdate.c | 71 +- firmware/ec/src/utils/swupdate.h | 3 +- firmware/ec/src/utils/util.c | 181 +- firmware/ec/test/fake/fake_GPIO.c | 36 +- firmware/ec/test/fake/fake_I2C.c | 40 +- firmware/ec/test/fake/fake_I2C.h | 6 +- firmware/ec/test/fake/fake_ThreadedISR.c | 6 +- firmware/ec/test/stub/stub_GateMutex.c | 9 +- firmware/ec/test/suites/Test_GpioPCA9557.c | 33 +- firmware/ec/test/suites/Test_GpioSX1509.c | 13 +- firmware/ec/test/suites/Test_OcGpio.c | 4 +- .../ec/test/suites/Test_PinGroup_driver.c | 71 +- firmware/ec/test/suites/Test_eeprom.c | 126 +- firmware/ec/test/suites/Test_ina226.c | 89 +- firmware/ec/test/suites/Test_ltc4015.c | 383 ++-- firmware/ec/test/suites/Test_ltc4275.c | 27 +- firmware/ec/test/suites/Test_ocmp_adt7481.c | 149 +- firmware/ec/test/suites/Test_ocmp_ltc4274.c | 304 +-- firmware/ec/test/suites/Test_pca9557.c | 21 +- firmware/ec/test/suites/Test_powerSource.c | 120 +- firmware/ec/test/suites/Test_se98a.c | 120 +- firmware/ec/test/suites/Test_sx1509.c | 214 +- firmware/ec/test/xdc_stubs/xdc_target_posix.h | 13 +- 185 files changed, 7623 insertions(+), 7533 deletions(-) diff --git a/firmware/ec/common/inc/global/Framework.h b/firmware/ec/common/inc/global/Framework.h index 274aecf1ba..cbfa220a4e 100644 --- a/firmware/ec/common/inc/global/Framework.h +++ b/firmware/ec/common/inc/global/Framework.h @@ -16,8 +16,8 @@ #include #include -#define POST_ENABLED 0 -#define POST_DISABLED 1 +#define POST_ENABLED 0 +#define POST_DISABLED 1 /* For enabling schema sharing between host and firmware we need to import the * factory config and driver config to schema.c as weak attribute from @@ -63,7 +63,7 @@ typedef struct Parameter { }; } Parameter; -typedef bool (*CB_Command) (void *driver, void *params); +typedef bool (*CB_Command)(void *driver, void *params); typedef struct Command { const char *name; @@ -71,37 +71,37 @@ typedef struct Command { const CB_Command cb_cmd; } Command; -typedef bool (*CB_POST) (void **params); +typedef bool (*CB_POST)(void **params); typedef struct Post { const char *name; const CB_POST cb_postCmd; -}Post; +} Post; // To avoid the awkward situation of not knowing how much to allocate for the return value (think // string returns), we instead rely on the 'get' and 'set' functions to allocate and return a // pointer to the value it wants to return via OCMP -typedef bool (*StatusGet_Cb) (void *driver, unsigned int param_id, - void *return_buf); -typedef bool (*ConfigGet_Cb) (void *driver, unsigned int param_id, - void *return_buf); -typedef bool (*ConfigSet_Cb) (void *driver, unsigned int param_id, - const void *data); +typedef bool (*StatusGet_Cb)(void *driver, unsigned int param_id, + void *return_buf); +typedef bool (*ConfigGet_Cb)(void *driver, unsigned int param_id, + void *return_buf); +typedef bool (*ConfigSet_Cb)(void *driver, unsigned int param_id, + const void *data); -typedef ePostCode (*CB_Probe) (void *driver, POSTData* postData); -typedef ePostCode (*CB_Init) (void *driver, const void *config, - const void *alert_token); +typedef ePostCode (*CB_Probe)(void *driver, POSTData *postData); +typedef ePostCode (*CB_Init)(void *driver, const void *config, + const void *alert_token); -typedef bool (*ssHook_Cb) (void *driver, void *return_buf); +typedef bool (*ssHook_Cb)(void *driver, void *return_buf); typedef struct Driver_fxnTable { // TODO: These callbacks are a bit rough. They'll get the job done, but we should revisit other - // options (per-parameter callbacks for example) - StatusGet_Cb cb_get_status; - ConfigGet_Cb cb_get_config; - ConfigSet_Cb cb_set_config; - CB_Probe cb_probe; - CB_Init cb_init; + // options (per-parameter callbacks for example) + StatusGet_Cb cb_get_status; + ConfigGet_Cb cb_get_config; + ConfigSet_Cb cb_set_config; + CB_Probe cb_probe; + CB_Init cb_init; } Driver_fxnTable; typedef struct Driver { @@ -111,27 +111,28 @@ typedef struct Driver { const Parameter *alerts; const Parameter *argList; const Command *commands; - const Driver_fxnTable* fxnTable; + const Driver_fxnTable *fxnTable; const Post *post; bool payload_fmt_union; /* TODO: hack to account for OBC/Testmodule payload being packed as a union instead of a struct */ } Driver; typedef struct SSHookSet { - ssHook_Cb preInitFxn ;/* Function will run before post is executed */ - ssHook_Cb postInitFxn; /* Function will run after post is executed */ -}SSHookSet; + ssHook_Cb preInitFxn; /* Function will run before post is executed */ + ssHook_Cb postInitFxn; /* Function will run after post is executed */ +} SSHookSet; -typedef void (*Component_InitCb) (void); +typedef void (*Component_InitCb)(void); typedef struct Component { const char *name; const struct Component *components; const Driver *driver; void *driver_cfg; // TODO: this could be turned into a standard polymorphism struct to hold the - // driver, hw config & driver object data (like we did for GPIO) + // driver, hw config & driver object data (like we did for GPIO) const void *factory_config; /* Factory defaults for the device */ - const Command *commands; /* TODO: super gross hack to fit into current CLI */ + const Command + *commands; /* TODO: super gross hack to fit into current CLI */ const SSHookSet *ssHookSet; bool postDisabled; //Flag for POST execution. void *ss; @@ -144,8 +145,7 @@ typedef struct AlertData { uint8_t deviceId; } AlertData; -void OCMP_GenerateAlert(const AlertData *alert_data, - unsigned int alert_id, +void OCMP_GenerateAlert(const AlertData *alert_data, unsigned int alert_id, const void *data); #endif /* _SYS_CFG_FRAMEWORK_H */ diff --git a/firmware/ec/common/inc/global/OC_CONNECT1.h b/firmware/ec/common/inc/global/OC_CONNECT1.h index 9de84e0a6f..30664a1bda 100644 --- a/firmware/ec/common/inc/global/OC_CONNECT1.h +++ b/firmware/ec/common/inc/global/OC_CONNECT1.h @@ -13,41 +13,44 @@ extern "C" { #endif -#define OC_PMIC_ENABLE (1) -#define OC_PMIC_DISABLE (0) -#define OC_SDR_ENABLE (1) -#define OC_SDR_DISABLE (0) -#define OC_SDR_FE_IO_ENABLE (1) -#define OC_SDR_FE_IO_DISABLE (0) -#define OC_FE_ENABLE (1) -#define OC_FE_DISABLE (0) -#define OC_PWR_LION_BATT (1) -#define OC_PWR_LEAD_BATT (0) -#define OC_PWR_PSE_RESET_STATE (1) -#define OC_PWR_PSE_ON_STATE (0) -#define OC_GBC_PROC_ENABLE (1) -#define OC_GBC_PROC_RESET (0) -#define OC_SYNC_IOEXP_ENABLE (1) -#define OC_SYNC_IOEXP_RESET (0) -#define OC_HCI_LED_ENABLE (1) -#define OC_HCI_LED_DISABLE (0) -#define OC_ETH_SW_ENABLE (1) -#define OC_ETH_SW_DISABLE (0) -#define CAT24C256 { .page_size = 64, .mem_size = (256 / 8) } +#define OC_PMIC_ENABLE (1) +#define OC_PMIC_DISABLE (0) +#define OC_SDR_ENABLE (1) +#define OC_SDR_DISABLE (0) +#define OC_SDR_FE_IO_ENABLE (1) +#define OC_SDR_FE_IO_DISABLE (0) +#define OC_FE_ENABLE (1) +#define OC_FE_DISABLE (0) +#define OC_PWR_LION_BATT (1) +#define OC_PWR_LEAD_BATT (0) +#define OC_PWR_PSE_RESET_STATE (1) +#define OC_PWR_PSE_ON_STATE (0) +#define OC_GBC_PROC_ENABLE (1) +#define OC_GBC_PROC_RESET (0) +#define OC_SYNC_IOEXP_ENABLE (1) +#define OC_SYNC_IOEXP_RESET (0) +#define OC_HCI_LED_ENABLE (1) +#define OC_HCI_LED_DISABLE (0) +#define OC_ETH_SW_ENABLE (1) +#define OC_ETH_SW_DISABLE (0) +#define CAT24C256 \ + { \ + .page_size = 64, .mem_size = (256 / 8) \ + } /* GBC IO expander Slave address */ -#define BIGBROTHER_IOEXP0_ADDRESS 0x71 -#define BIGBROTHER_IOEXP1_ADDRESS 0x70 +#define BIGBROTHER_IOEXP0_ADDRESS 0x71 +#define BIGBROTHER_IOEXP1_ADDRESS 0x70 /* SYNC IO expander Slave address */ -#define SYNC_IO_DEVICE_ADDR 0x71 +#define SYNC_IO_DEVICE_ADDR 0x71 /* SDR IO expander Slave address */ -#define SDR_FX3_IOEXP_ADDRESS 0x1E +#define SDR_FX3_IOEXP_ADDRESS 0x1E /* RFFE IO expander Slave address */ -#define RFFE_CHANNEL1_IO_TX_ATTEN_ADDR 0x18 -#define RFFE_CHANNEL1_IO_RX_ATTEN_ADDR 0x1A -#define RFFE_CHANNEL2_IO_TX_ATTEN_ADDR 0x1C -#define RFFE_CHANNEL2_IO_RX_ATTEN_ADDR 0x1D -#define RFFE_IO_REVPOWER_ALERT_ADDR 0x1B +#define RFFE_CHANNEL1_IO_TX_ATTEN_ADDR 0x18 +#define RFFE_CHANNEL1_IO_RX_ATTEN_ADDR 0x1A +#define RFFE_CHANNEL2_IO_TX_ATTEN_ADDR 0x1C +#define RFFE_CHANNEL2_IO_RX_ATTEN_ADDR 0x1D +#define RFFE_IO_REVPOWER_ALERT_ADDR 0x1B /*! * @def OC_CONNECT1_EMACName @@ -79,7 +82,7 @@ typedef enum OC_EC_PORTGroupName { PN, PP, PQ -}OC_EC_PORTGroupName; +} OC_EC_PORTGroupName; typedef enum OC_CONNECT1_GPIOName { //PA @@ -116,7 +119,7 @@ typedef enum OC_CONNECT1_GPIOName { OC_EC_SYNC_IOEXP_ALERT, //PE OC_EC_GBC_IOEXP71_ALERT = 32, - OC_EC_FE_CONTROL,//OC_CONNECT1_GBC_TEMP_ALERT2, + OC_EC_FE_CONTROL, //OC_CONNECT1_GBC_TEMP_ALERT2, OC_EC_AP_GPIO1, OC_EC_GPP_AP_BM_1, OC_EC_FLASH_MOSI, @@ -173,7 +176,8 @@ typedef enum OC_CONNECT1_GPIOName { OC_EC_FE_PWR_GD, OC_EC_MODULE_UART1_RIN, //PP - OC_EC_SDR_FE_IO_RESET_CTRL = 104,//OC_EC_MPPT_LACID = 104, //OC_SDR_FE_IO_RESET_CTRL + OC_EC_SDR_FE_IO_RESET_CTRL = + 104, //OC_EC_MPPT_LACID = 104, //OC_SDR_FE_IO_RESET_CTRL OC_EC_FE_RESET_OUT, OC_EC_SDR_PWR_CNTRL, OC_EC_GPP_PWRGD_PROTECTION, diff --git a/firmware/ec/common/inc/global/ocmp_frame.h b/firmware/ec/common/inc/global/ocmp_frame.h index fbb4720474..3a5999f7f1 100644 --- a/firmware/ec/common/inc/global/ocmp_frame.h +++ b/firmware/ec/common/inc/global/ocmp_frame.h @@ -18,18 +18,19 @@ * MACRO DEFINITIONS *****************************************************************************/ /* Start Of Frame & Message Lengths */ -#define OCMP_MSG_SOF 0x55 -#define OCMP_FRAME_TOTAL_LENGTH 64 +#define OCMP_MSG_SOF 0x55 +#define OCMP_FRAME_TOTAL_LENGTH 64 #define OCMP_FRAME_HEADER_LENGTH 17 -#define OCMP_FRAME_MSG_LENGTH (OCMP_FRAME_TOTAL_LENGTH - OCMP_FRAME_HEADER_LENGTH) +#define OCMP_FRAME_MSG_LENGTH \ + (OCMP_FRAME_TOTAL_LENGTH - OCMP_FRAME_HEADER_LENGTH) /***************************************************************************** * STRUCT/ENUM DEFINITIONS *****************************************************************************/ typedef enum { - OC_SS_BB = -1, //Hack around the fact that IPC reuses OCMP to allow us - // to split BB (internal) and SYS (CLI) message handling + OC_SS_BB = -1, //Hack around the fact that IPC reuses OCMP to allow us + // to split BB (internal) and SYS (CLI) message handling OC_SS_SYS = 0, OC_SS_PWR, OC_SS_BMS, @@ -42,17 +43,17 @@ typedef enum { OC_SS_SYNC, OC_SS_TEST_MODULE, OC_SS_DEBUG, - OC_SS_MAX_LIMIT,//TODO:REV C Change + OC_SS_MAX_LIMIT, //TODO:REV C Change OC_SS_WD //OC_SS_ALERT_MNGR, //OC_SS_MAX_LIMIT } OCMPSubsystem; typedef enum { - OCMP_COMM_IFACE_UART = 1, // Uart - 1 - OCMP_COMM_IFACE_ETHERNET, // Ethernet - 2 - OCMP_COMM_IFACE_SBD, // SBD(Satellite) - 3 - OCMP_COMM_IFACE_USB // Usb - 4 + OCMP_COMM_IFACE_UART = 1, // Uart - 1 + OCMP_COMM_IFACE_ETHERNET, // Ethernet - 2 + OCMP_COMM_IFACE_SBD, // SBD(Satellite) - 3 + OCMP_COMM_IFACE_USB // Usb - 4 } OCMPInterface; /* @@ -122,47 +123,45 @@ typedef enum { * communication with EC from External entity (e.g. AP over UART, Ethernet * or SBD) */ -typedef enum { - OCMP_DEBUG_READ = 1, - OCMP_DEBUG_WRITE -} eOCMPDebugOperation; +typedef enum { OCMP_DEBUG_READ = 1, OCMP_DEBUG_WRITE } eOCMPDebugOperation; /* TODO::This OCWARE_HOST has to be removed with OCMP cleanUp*/ #ifndef OCWARE_HOST - #define OC_SS OCMPSubsystem - #define OC_MSG_TYP OCMPMsgType - #define OC_AXN_TYP OCMPActionType +#define OC_SS OCMPSubsystem +#define OC_MSG_TYP OCMPMsgType +#define OC_AXN_TYP OCMPActionType #else - #define OC_SS uint8_t - #define OC_MSG_TYP uint8_t - #define OC_AXN_TYP uint8_t - #define OC_IFACE_TYP uint8_t +#define OC_SS uint8_t +#define OC_MSG_TYP uint8_t +#define OC_AXN_TYP uint8_t +#define OC_IFACE_TYP uint8_t #endif /* * Header is the field which will be containing SOF, Framelen, * Source Interface, Sequence number, and timestamp. */ -typedef struct __attribute__((packed, aligned(1))) { - uint8_t ocmpSof; // SOF - It must be 0x55 - uint8_t ocmpFrameLen; // Framelen - tells about the configuration size ONLY. +typedef struct __attribute__((packed, aligned(1))) { + uint8_t ocmpSof; // SOF - It must be 0x55 + uint8_t ocmpFrameLen; // Framelen - tells about the configuration size ONLY. OCMPInterface ocmpInterface; // Interface - UART/Ethernet/SBD - uint32_t ocmpSeqNumber; // SeqNo - Don't know!!! - uint32_t ocmpTimestamp; // Timestamp - When AP sent the command? + uint32_t ocmpSeqNumber; // SeqNo - Don't know!!! + uint32_t ocmpTimestamp; // Timestamp - When AP sent the command? } OCMPHeader; /* * This is the Message structure for Subsystem level information */ typedef struct __attribute__((packed, aligned(1))) { - OC_SS subsystem; // RF/GPP/BMS/Watchdog etc.. - uint8_t componentID; // Compononent ID. Different for different subsystem. - OCMPMsgType msgtype; // Msg type is Config/Status/Alert/Command/Watchdog/Debug - uint8_t action; // Action is - Get/Set/Reply. - uint16_t parameters; // List of Parameters to be set or get. + OC_SS subsystem; // RF/GPP/BMS/Watchdog etc.. + uint8_t componentID; // Compononent ID. Different for different subsystem. + OCMPMsgType + msgtype; // Msg type is Config/Status/Alert/Command/Watchdog/Debug + uint8_t action; // Action is - Get/Set/Reply. + uint16_t parameters; // List of Parameters to be set or get. #ifndef OCWARE_HOST - uint8_t ocmp_data[]; // The data payload. + uint8_t ocmp_data[]; // The data payload. #else - int8_t* info; + int8_t *info; #endif } OCMPMessage; diff --git a/firmware/ec/common/inc/ocmp_wrappers/ocmp_adt7481.h b/firmware/ec/common/inc/ocmp_wrappers/ocmp_adt7481.h index c78852a595..e249ff6f43 100644 --- a/firmware/ec/common/inc/ocmp_wrappers/ocmp_adt7481.h +++ b/firmware/ec/common/inc/ocmp_wrappers/ocmp_adt7481.h @@ -21,29 +21,23 @@ typedef union ADT7481_Config { } ADT7481_Config; #ifdef UT_FRAMEWORK -extern const Driver_fxnTable ADT7481_fxnTable; +extern const Driver_fxnTable ADT7481_fxnTable; #else -SCHEMA_IMPORT const Driver_fxnTable ADT7481_fxnTable; +SCHEMA_IMPORT const Driver_fxnTable ADT7481_fxnTable; #endif static const Driver ADT7481 = { .name = "ADT7481", - .status = (Parameter[]){ - { .name = "temperature", .type = TYPE_UINT8 }, - {} - }, - .config = (Parameter[]){ - { .name = "lowlimit", .type = TYPE_INT8 }, - { .name = "highlimit", .type = TYPE_UINT8 }, - { .name = "critlimit", .type = TYPE_UINT8 }, - {} - }, - .alerts = (Parameter[]){ - { .name = "BAW", .type = TYPE_UINT8 }, - { .name = "AAW", .type = TYPE_UINT8 }, - { .name = "ACW", .type = TYPE_UINT8 }, - {} - }, + .status = + (Parameter[]){ { .name = "temperature", .type = TYPE_UINT8 }, {} }, + .config = (Parameter[]){ { .name = "lowlimit", .type = TYPE_INT8 }, + { .name = "highlimit", .type = TYPE_UINT8 }, + { .name = "critlimit", .type = TYPE_UINT8 }, + {} }, + .alerts = (Parameter[]){ { .name = "BAW", .type = TYPE_UINT8 }, + { .name = "AAW", .type = TYPE_UINT8 }, + { .name = "ACW", .type = TYPE_UINT8 }, + {} }, .fxnTable = &ADT7481_fxnTable, }; diff --git a/firmware/ec/common/inc/ocmp_wrappers/ocmp_dat-xxr5a-pp.h b/firmware/ec/common/inc/ocmp_wrappers/ocmp_dat-xxr5a-pp.h index 1b343d443a..934ea50854 100644 --- a/firmware/ec/common/inc/ocmp_wrappers/ocmp_dat-xxr5a-pp.h +++ b/firmware/ec/common/inc/ocmp_wrappers/ocmp_dat-xxr5a-pp.h @@ -16,10 +16,7 @@ SCHEMA_IMPORT const Driver_fxnTable DATXXR5APP_fxnTable; static const Driver DATXXR5APP = { .name = "DAT-XXR5A-PP+", .status = NULL, - .config = (Parameter[]){ - { .name = "atten", .type = TYPE_INT16 }, - {} - }, + .config = (Parameter[]){ { .name = "atten", .type = TYPE_INT16 }, {} }, .alerts = NULL, .fxnTable = &DATXXR5APP_fxnTable, }; diff --git a/firmware/ec/common/inc/ocmp_wrappers/ocmp_debugi2c.h b/firmware/ec/common/inc/ocmp_wrappers/ocmp_debugi2c.h index 01c4005721..b6bb181b63 100644 --- a/firmware/ec/common/inc/ocmp_wrappers/ocmp_debugi2c.h +++ b/firmware/ec/common/inc/ocmp_wrappers/ocmp_debugi2c.h @@ -16,24 +16,20 @@ SCHEMA_IMPORT bool i2c_write(void *driver, void *data); static const Driver OC_I2C = { .name = "OC_I2C", - .argList = (Parameter[]){ - { .name = "slave_address", .type = TYPE_UINT8 }, - { .name = "no_of_bytes", .type = TYPE_UINT8 }, - { .name = "reg_address", .type = TYPE_UINT8 }, - { .name = "reg_values", .type = TYPE_UINT16 }, - {} - }, - .commands = (Command[]){ - { - .name = "get", - .cb_cmd = i2c_read, - }, - { - .name = "set", - .cb_cmd = i2c_write, - }, - {} - }, + .argList = (Parameter[]){ { .name = "slave_address", .type = TYPE_UINT8 }, + { .name = "no_of_bytes", .type = TYPE_UINT8 }, + { .name = "reg_address", .type = TYPE_UINT8 }, + { .name = "reg_values", .type = TYPE_UINT16 }, + {} }, + .commands = (Command[]){ { + .name = "get", + .cb_cmd = i2c_read, + }, + { + .name = "set", + .cb_cmd = i2c_write, + }, + {} }, }; #endif /* INC_DEVICES_OCMP_WRAPPERS_OCMP_I2C_H_ */ diff --git a/firmware/ec/common/inc/ocmp_wrappers/ocmp_debugmdio.h b/firmware/ec/common/inc/ocmp_wrappers/ocmp_debugmdio.h index 83019f7b8a..17adb9f13a 100644 --- a/firmware/ec/common/inc/ocmp_wrappers/ocmp_debugmdio.h +++ b/firmware/ec/common/inc/ocmp_wrappers/ocmp_debugmdio.h @@ -16,22 +16,18 @@ SCHEMA_IMPORT bool mdio_write(void *driver, void *data); static const Driver OC_MDIO = { .name = "OC_MDIO", - .argList = (Parameter[]){ - { .name = "reg_address", .type = TYPE_UINT16 }, - { .name = "reg_values", .type = TYPE_UINT16 }, - {} - }, - .commands = (Command[]){ - { - .name = "get", - .cb_cmd = mdio_read, - }, - { - .name = "set", - .cb_cmd = mdio_write, - }, - {} - }, + .argList = (Parameter[]){ { .name = "reg_address", .type = TYPE_UINT16 }, + { .name = "reg_values", .type = TYPE_UINT16 }, + {} }, + .commands = (Command[]){ { + .name = "get", + .cb_cmd = mdio_read, + }, + { + .name = "set", + .cb_cmd = mdio_write, + }, + {} }, }; #endif /* INC_DEVICES_OCMP_WRAPPERS_OCMP_MDIO_H_ */ diff --git a/firmware/ec/common/inc/ocmp_wrappers/ocmp_debugocgpio.h b/firmware/ec/common/inc/ocmp_wrappers/ocmp_debugocgpio.h index 10dd21eafb..56b17e79d4 100644 --- a/firmware/ec/common/inc/ocmp_wrappers/ocmp_debugocgpio.h +++ b/firmware/ec/common/inc/ocmp_wrappers/ocmp_debugocgpio.h @@ -14,26 +14,22 @@ SCHEMA_IMPORT bool ocgpio_get(void *driver, void *data); SCHEMA_IMPORT bool ocgpio_set(void *driver, void *data); -SCHEMA_IMPORT const Driver_fxnTable DEBUG_OCGPIO_fxnTable; +SCHEMA_IMPORT const Driver_fxnTable DEBUG_OCGPIO_fxnTable; static const Driver OC_GPIO = { .name = "OC_GPIO", - .argList = (Parameter[]){ - { .name = "pin", .type = TYPE_UINT8 }, - { .name = "value", .type = TYPE_UINT8 }, - {} - }, - .commands = (Command[]){ - { - .name = "get", - .cb_cmd = ocgpio_get, - }, - { - .name = "set", - .cb_cmd = ocgpio_set, - }, - {} - }, + .argList = (Parameter[]){ { .name = "pin", .type = TYPE_UINT8 }, + { .name = "value", .type = TYPE_UINT8 }, + {} }, + .commands = (Command[]){ { + .name = "get", + .cb_cmd = ocgpio_get, + }, + { + .name = "set", + .cb_cmd = ocgpio_set, + }, + {} }, .fxnTable = &DEBUG_OCGPIO_fxnTable, }; diff --git a/firmware/ec/common/inc/ocmp_wrappers/ocmp_eeprom_cat24c04.h b/firmware/ec/common/inc/ocmp_wrappers/ocmp_eeprom_cat24c04.h index ddc36d3fd0..25acdae380 100644 --- a/firmware/ec/common/inc/ocmp_wrappers/ocmp_eeprom_cat24c04.h +++ b/firmware/ec/common/inc/ocmp_wrappers/ocmp_eeprom_cat24c04.h @@ -20,10 +20,11 @@ SCHEMA_IMPORT const Driver_fxnTable CAT24C04_fe_inv_fxnTable; static const Driver CAT24C04_gbc_sid = { .name = "EEPROM", - .status = (Parameter[]){ - { .name = "ocserialinfo", .type = TYPE_STR, .size = 21 }, - { .name = "gbcboardinfo", .type = TYPE_STR, .size = 21 }, - }, + .status = + (Parameter[]){ + { .name = "ocserialinfo", .type = TYPE_STR, .size = 21 }, + { .name = "gbcboardinfo", .type = TYPE_STR, .size = 21 }, + }, .fxnTable = &CAT24C04_gbc_sid_fxnTable, }; @@ -32,47 +33,33 @@ static const Driver CAT24C04_gbc_inv = { .fxnTable = &CAT24C04_gbc_inv_fxnTable, }; static const Driver CAT24C04_sdr_inv = { - .name = "Inventory", - .status = (Parameter[]){ - { .name = "dev_id", .type = TYPE_STR, - .size = 19 }, - {} - }, - .fxnTable = &CAT24C04_sdr_inv_fxnTable, + .name = "Inventory", + .status = (Parameter[]){ { .name = "dev_id", .type = TYPE_STR, .size = 19 }, + {} }, + .fxnTable = &CAT24C04_sdr_inv_fxnTable, }; static const Driver CAT24C04_fe_inv = { - .name = "Inventory", - .status = (Parameter[]){ - { .name = "dev_id", .type = TYPE_STR, - .size = 18 }, - {} - }, - .fxnTable = &CAT24C04_fe_inv_fxnTable, + .name = "Inventory", + .status = (Parameter[]){ { .name = "dev_id", .type = TYPE_STR, .size = 18 }, + {} }, + .fxnTable = &CAT24C04_fe_inv_fxnTable, }; static const Driver SYSTEMDRV = { .name = "SYSTEMDRV", - .status = (Parameter[]){ - {} - }, - .config = (Parameter[]){ - {} - }, - .alerts = (Parameter[]){ - {} - }, - .post = (Post[]){ - { - .name = "results", - .cb_postCmd = SYS_post_get_results, - }, - { - .name = "enable", - .cb_postCmd = SYS_post_enable, - }, - {} - } + .status = (Parameter[]){ {} }, + .config = (Parameter[]){ {} }, + .alerts = (Parameter[]){ {} }, + .post = (Post[]){ { + .name = "results", + .cb_postCmd = SYS_post_get_results, + }, + { + .name = "enable", + .cb_postCmd = SYS_post_enable, + }, + {} } }; #endif /* INC_DEVICES_OCMP_EEPROM_H_ */ diff --git a/firmware/ec/common/inc/ocmp_wrappers/ocmp_eth_sw.h b/firmware/ec/common/inc/ocmp_wrappers/ocmp_eth_sw.h index 374fc5eb5f..33b4e045a1 100644 --- a/firmware/ec/common/inc/ocmp_wrappers/ocmp_eth_sw.h +++ b/firmware/ec/common/inc/ocmp_wrappers/ocmp_eth_sw.h @@ -20,62 +20,54 @@ SCHEMA_IMPORT bool ETHERNET_tivaClient(void *driver, void *params); static const Driver ETH_SW = { .name = "Marvel_88E6071", - .status = (Parameter[]){ - { .name = "speed", .type = TYPE_UINT8 }, - { .name = "duplex", .type = TYPE_UINT8 }, - { .name = "autoneg_on", .type = TYPE_UINT8 }, - { .name = "sleep_mode_en", .type = TYPE_UINT8 }, - { .name = "autoneg_complete", .type = TYPE_UINT8 }, - { .name = "link_up", .type = TYPE_UINT8 }, - {} - }, - .config = (Parameter[]){ - { .name = "speed", .type = TYPE_UINT8 }, - { .name = "duplex", .type = TYPE_UINT8 }, - { .name = "powerDown", .type = TYPE_UINT8 }, - { .name = "enable_sleepMode", .type = TYPE_UINT8 }, - { .name = "enable_interrupt", .type = TYPE_UINT8 }, - { .name = "switch_reset", .type = TYPE_UINT8 }, - { .name = "restart_autoneg", .type = TYPE_UINT8 }, - {} - }, - .alerts = (Parameter[]){ - { .name = "speed", .type = TYPE_UINT8 }, - { .name = "duplex", .type = TYPE_UINT8 }, - { .name = "autoneg_complete", .type = TYPE_UINT8 }, - { .name = "crossover_det", .type = TYPE_UINT8 }, - { .name = "energy_det", .type = TYPE_UINT8 }, - { .name = "polarity_change", .type = TYPE_UINT8 }, - { .name = "jabber_det", .type = TYPE_UINT8 }, - {} - }, - .commands = (Command[]){ - { - .name = "reset", - .cb_cmd = ETHERNET_reset, - }, - { - .name = "en_loopBk", - .cb_cmd = ETHERNET_enLoopBk, - }, - { - .name = "dis_loopBk", - .cb_cmd = ETHERNET_disLoopBk, - }, - { - .name = "en_pktGen", - .cb_cmd = ETHERNET_enPktGen, - }, - { - .name = "dis_pktGen", - .cb_cmd = ETHERNET_disPktGen, - }, - { - .name = "en_tivaClient", - .cb_cmd = ETHERNET_tivaClient, - }, - {} - }, + .status = (Parameter[]){ { .name = "speed", .type = TYPE_UINT8 }, + { .name = "duplex", .type = TYPE_UINT8 }, + { .name = "autoneg_on", .type = TYPE_UINT8 }, + { .name = "sleep_mode_en", .type = TYPE_UINT8 }, + { .name = "autoneg_complete", .type = TYPE_UINT8 }, + { .name = "link_up", .type = TYPE_UINT8 }, + {} }, + .config = (Parameter[]){ { .name = "speed", .type = TYPE_UINT8 }, + { .name = "duplex", .type = TYPE_UINT8 }, + { .name = "powerDown", .type = TYPE_UINT8 }, + { .name = "enable_sleepMode", .type = TYPE_UINT8 }, + { .name = "enable_interrupt", .type = TYPE_UINT8 }, + { .name = "switch_reset", .type = TYPE_UINT8 }, + { .name = "restart_autoneg", .type = TYPE_UINT8 }, + {} }, + .alerts = (Parameter[]){ { .name = "speed", .type = TYPE_UINT8 }, + { .name = "duplex", .type = TYPE_UINT8 }, + { .name = "autoneg_complete", .type = TYPE_UINT8 }, + { .name = "crossover_det", .type = TYPE_UINT8 }, + { .name = "energy_det", .type = TYPE_UINT8 }, + { .name = "polarity_change", .type = TYPE_UINT8 }, + { .name = "jabber_det", .type = TYPE_UINT8 }, + {} }, + .commands = (Command[]){ { + .name = "reset", + .cb_cmd = ETHERNET_reset, + }, + { + .name = "en_loopBk", + .cb_cmd = ETHERNET_enLoopBk, + }, + { + .name = "dis_loopBk", + .cb_cmd = ETHERNET_disLoopBk, + }, + { + .name = "en_pktGen", + .cb_cmd = ETHERNET_enPktGen, + }, + { + .name = "dis_pktGen", + .cb_cmd = ETHERNET_disPktGen, + }, + { + .name = "en_tivaClient", + .cb_cmd = ETHERNET_tivaClient, + }, + {} }, .fxnTable = ð_fxnTable, }; diff --git a/firmware/ec/common/inc/ocmp_wrappers/ocmp_fe-param.h b/firmware/ec/common/inc/ocmp_wrappers/ocmp_fe-param.h index 6478d3faaf..d445e609a0 100644 --- a/firmware/ec/common/inc/ocmp_wrappers/ocmp_fe-param.h +++ b/firmware/ec/common/inc/ocmp_wrappers/ocmp_fe-param.h @@ -15,11 +15,9 @@ SCHEMA_IMPORT const Driver_fxnTable FE_PARAM_fxnTable; static const Driver FE_Param = { .name = "FE_parametrs", - .config = (Parameter[]){ - { .name = "band", .type = TYPE_UINT16 }, - { .name = "arfcn", .type = TYPE_UINT16 }, - {} - }, + .config = (Parameter[]){ { .name = "band", .type = TYPE_UINT16 }, + { .name = "arfcn", .type = TYPE_UINT16 }, + {} }, .fxnTable = &FE_PARAM_fxnTable, }; diff --git a/firmware/ec/common/inc/ocmp_wrappers/ocmp_ina226.h b/firmware/ec/common/inc/ocmp_wrappers/ocmp_ina226.h index 6b554f0852..96f102d984 100644 --- a/firmware/ec/common/inc/ocmp_wrappers/ocmp_ina226.h +++ b/firmware/ec/common/inc/ocmp_wrappers/ocmp_ina226.h @@ -15,25 +15,18 @@ typedef struct INA226_Config { uint16_t current_lim; } INA226_Config; -SCHEMA_IMPORT const Driver_fxnTable INA226_fxnTable; +SCHEMA_IMPORT const Driver_fxnTable INA226_fxnTable; static const Driver INA226 = { .name = "INA226", - .status = (Parameter[]){ - { .name = "busvoltage", .type = TYPE_UINT16 }, - { .name = "shuntvoltage", .type = TYPE_UINT16 }, - { .name = "current", .type = TYPE_UINT16 }, - { .name = "power", .type = TYPE_UINT16 }, - {} - }, - .config = (Parameter[]){ - { .name = "currlimit", .type = TYPE_UINT16 }, - {} - }, - .alerts = (Parameter[]){ - { .name = "Overcurrent", .type = TYPE_UINT16 }, - {} - }, + .status = (Parameter[]){ { .name = "busvoltage", .type = TYPE_UINT16 }, + { .name = "shuntvoltage", .type = TYPE_UINT16 }, + { .name = "current", .type = TYPE_UINT16 }, + { .name = "power", .type = TYPE_UINT16 }, + {} }, + .config = (Parameter[]){ { .name = "currlimit", .type = TYPE_UINT16 }, {} }, + .alerts = + (Parameter[]){ { .name = "Overcurrent", .type = TYPE_UINT16 }, {} }, .fxnTable = &INA226_fxnTable, }; diff --git a/firmware/ec/common/inc/ocmp_wrappers/ocmp_iridium.h b/firmware/ec/common/inc/ocmp_wrappers/ocmp_iridium.h index 2841b1ebca..3342c14cb9 100644 --- a/firmware/ec/common/inc/ocmp_wrappers/ocmp_iridium.h +++ b/firmware/ec/common/inc/ocmp_wrappers/ocmp_iridium.h @@ -16,31 +16,32 @@ SCHEMA_IMPORT bool IRIDIUM_reset(void *driver, void *params); static const Driver OBC_Iridium = { .name = "Iridium 96xx", - .status = (Parameter[]){ - { .name = "imei", .type = TYPE_UINT64 }, - { .name = "mfg", .type = TYPE_STR, .size = 10 }, - { .name = "model", .type = TYPE_STR, .size = 4 }, - { .name = "signal_quality", .type = TYPE_UINT8 }, - { .name = "registration", .type = TYPE_ENUM, - .values = (Enum_Map[]){ - { 0, "Detached" }, - { 1, "None" }, - { 2, "Registered" }, - { 3, "Registration Denied" }, - {} - }, - }, - { .name = "numberofoutgoingmessage", .type = TYPE_UINT8 }, - { .name = "lasterror", .type = TYPE_UINT8, .size = 3 }, /* TODO: this is a complex type */ - {} - }, - .commands = (Command[]){ - { - .name = "reset", - .cb_cmd = IRIDIUM_reset, - }, - {} - }, + .status = + (Parameter[]){ + { .name = "imei", .type = TYPE_UINT64 }, + { .name = "mfg", .type = TYPE_STR, .size = 10 }, + { .name = "model", .type = TYPE_STR, .size = 4 }, + { .name = "signal_quality", .type = TYPE_UINT8 }, + { + .name = "registration", + .type = TYPE_ENUM, + .values = + (Enum_Map[]){ { 0, "Detached" }, + { 1, "None" }, + { 2, "Registered" }, + { 3, "Registration Denied" }, + {} }, + }, + { .name = "numberofoutgoingmessage", .type = TYPE_UINT8 }, + { .name = "lasterror", + .type = TYPE_UINT8, + .size = 3 }, /* TODO: this is a complex type */ + {} }, + .commands = (Command[]){ { + .name = "reset", + .cb_cmd = IRIDIUM_reset, + }, + {} }, .fxnTable = &OBC_fxnTable, .payload_fmt_union = true, /* OBC breaks serialization pattern :( */ }; diff --git a/firmware/ec/common/inc/ocmp_wrappers/ocmp_led.h b/firmware/ec/common/inc/ocmp_wrappers/ocmp_led.h index 24c436450b..26b699b150 100644 --- a/firmware/ec/common/inc/ocmp_wrappers/ocmp_led.h +++ b/firmware/ec/common/inc/ocmp_wrappers/ocmp_led.h @@ -18,13 +18,11 @@ static const Driver HCI_LED = { .status = NULL, .config = NULL, .alerts = NULL, - .commands = (Command[]){ - { - .name = "set", - .cb_cmd = led_testpattern_control, - }, - {} - }, + .commands = (Command[]){ { + .name = "set", + .cb_cmd = led_testpattern_control, + }, + {} }, .fxnTable = &LED_fxnTable, }; diff --git a/firmware/ec/common/inc/ocmp_wrappers/ocmp_ltc4015.h b/firmware/ec/common/inc/ocmp_wrappers/ocmp_ltc4015.h index b1b935ae41..4ca522bf25 100644 --- a/firmware/ec/common/inc/ocmp_wrappers/ocmp_ltc4015.h +++ b/firmware/ec/common/inc/ocmp_wrappers/ocmp_ltc4015.h @@ -26,37 +26,32 @@ SCHEMA_IMPORT const Driver_fxnTable LTC4015_fxnTable; static const Driver LTC4015 = { .name = "LTC4015", - .status = (Parameter[]){ - { .name = "batteryVoltage", .type = TYPE_INT16 }, - { .name = "batteryCurrent", .type = TYPE_INT16 }, - { .name = "systemVoltage", .type = TYPE_INT16 }, - { .name = "inputVoltage", .type = TYPE_INT16 }, - { .name = "inputCurrent", .type = TYPE_INT16 }, - { .name = "dieTemperature", .type = TYPE_INT16 }, - { .name = "ichargeDAC", .type = TYPE_INT16 }, - {} - }, - .config = (Parameter[]){ - { .name = "batteryVoltageLow", .type = TYPE_INT16 }, - { .name = "batteryVoltageHigh", .type = TYPE_INT16 }, - { .name = "batteryCurrentLow", .type = TYPE_INT16 }, - { .name = "inputVoltageLow", .type = TYPE_INT16 }, - { .name = "inputCurrentHigh", .type = TYPE_INT16 }, - { .name = "inputCurrentLimit", .type = TYPE_UINT16 }, - { .name = "icharge", .type = TYPE_UINT16 }, - { .name = "vcharge", .type = TYPE_UINT16 }, - { .name = "dieTemperature", .type = TYPE_INT16 }, - {} - }, - .alerts = (Parameter[]){ - { .name = "BVL", .type = TYPE_INT16 }, - { .name = "BVH", .type = TYPE_INT16 }, - { .name = "BCL", .type = TYPE_INT16 }, - { .name = "IVL", .type = TYPE_INT16 }, - { .name = "ICH", .type = TYPE_INT16 }, - { .name = "DTH", .type = TYPE_INT16 }, - {} - }, + .status = (Parameter[]){ { .name = "batteryVoltage", .type = TYPE_INT16 }, + { .name = "batteryCurrent", .type = TYPE_INT16 }, + { .name = "systemVoltage", .type = TYPE_INT16 }, + { .name = "inputVoltage", .type = TYPE_INT16 }, + { .name = "inputCurrent", .type = TYPE_INT16 }, + { .name = "dieTemperature", .type = TYPE_INT16 }, + { .name = "ichargeDAC", .type = TYPE_INT16 }, + {} }, + .config = + (Parameter[]){ { .name = "batteryVoltageLow", .type = TYPE_INT16 }, + { .name = "batteryVoltageHigh", .type = TYPE_INT16 }, + { .name = "batteryCurrentLow", .type = TYPE_INT16 }, + { .name = "inputVoltageLow", .type = TYPE_INT16 }, + { .name = "inputCurrentHigh", .type = TYPE_INT16 }, + { .name = "inputCurrentLimit", .type = TYPE_UINT16 }, + { .name = "icharge", .type = TYPE_UINT16 }, + { .name = "vcharge", .type = TYPE_UINT16 }, + { .name = "dieTemperature", .type = TYPE_INT16 }, + {} }, + .alerts = (Parameter[]){ { .name = "BVL", .type = TYPE_INT16 }, + { .name = "BVH", .type = TYPE_INT16 }, + { .name = "BCL", .type = TYPE_INT16 }, + { .name = "IVL", .type = TYPE_INT16 }, + { .name = "ICH", .type = TYPE_INT16 }, + { .name = "DTH", .type = TYPE_INT16 }, + {} }, .fxnTable = <C4015_fxnTable, }; diff --git a/firmware/ec/common/inc/ocmp_wrappers/ocmp_ltc4274.h b/firmware/ec/common/inc/ocmp_wrappers/ocmp_ltc4274.h index ce762b56aa..b7968c705b 100644 --- a/firmware/ec/common/inc/ocmp_wrappers/ocmp_ltc4274.h +++ b/firmware/ec/common/inc/ocmp_wrappers/ocmp_ltc4274.h @@ -30,39 +30,31 @@ SCHEMA_IMPORT bool LTC4274_reset(void *driver, void *params); static const Driver LTC4274 = { .name = "PSE", - .status = (Parameter[]){ - { .name = "detection", .type = TYPE_UINT16 }, - { .name = "class", .type = TYPE_UINT16 }, - { .name = "powerGood", .type = TYPE_UINT16 }, - {} - }, - .config = (Parameter[]){ - { .name = "operatingMode", .type = TYPE_UINT16 }, - { .name = "detectEnable", .type = TYPE_UINT16 }, - { .name = "interruptMask", .type = TYPE_UINT16 }, - { .name = "interruptEnable", .type = TYPE_UINT16 }, - { .name = "enableHighpower", .type = TYPE_UINT16 }, - {} - }, - .alerts = (Parameter[]){ - { .name = "NoAlert", .type = TYPE_UINT8 }, - { .name = "PowerEnable", .type = TYPE_UINT8 }, - { .name = "PowerGood", .type = TYPE_UINT8 }, - { .name = "DiconnectAlert", .type = TYPE_UINT8 }, - { .name = "DetectionAlert", .type = TYPE_UINT8 }, - { .name = "ClassAlert", .type = TYPE_UINT8 }, - { .name = "TCUTAler", .type = TYPE_UINT8 }, - { .name = "TStartAlert", .type = TYPE_UINT8 }, - { .name = "SupplyAlert", .type = TYPE_UINT8 }, - {} - }, - .commands = (Command[]){ - { - .name = "reset", - .cb_cmd = LTC4274_reset, - }, - {} - }, + .status = (Parameter[]){ { .name = "detection", .type = TYPE_UINT16 }, + { .name = "class", .type = TYPE_UINT16 }, + { .name = "powerGood", .type = TYPE_UINT16 }, + {} }, + .config = (Parameter[]){ { .name = "operatingMode", .type = TYPE_UINT16 }, + { .name = "detectEnable", .type = TYPE_UINT16 }, + { .name = "interruptMask", .type = TYPE_UINT16 }, + { .name = "interruptEnable", .type = TYPE_UINT16 }, + { .name = "enableHighpower", .type = TYPE_UINT16 }, + {} }, + .alerts = (Parameter[]){ { .name = "NoAlert", .type = TYPE_UINT8 }, + { .name = "PowerEnable", .type = TYPE_UINT8 }, + { .name = "PowerGood", .type = TYPE_UINT8 }, + { .name = "DiconnectAlert", .type = TYPE_UINT8 }, + { .name = "DetectionAlert", .type = TYPE_UINT8 }, + { .name = "ClassAlert", .type = TYPE_UINT8 }, + { .name = "TCUTAler", .type = TYPE_UINT8 }, + { .name = "TStartAlert", .type = TYPE_UINT8 }, + { .name = "SupplyAlert", .type = TYPE_UINT8 }, + {} }, + .commands = (Command[]){ { + .name = "reset", + .cb_cmd = LTC4274_reset, + }, + {} }, .fxnTable = <C4274_fxnTable, }; diff --git a/firmware/ec/common/inc/ocmp_wrappers/ocmp_ltc4275.h b/firmware/ec/common/inc/ocmp_wrappers/ocmp_ltc4275.h index e5ae3da530..eb4cf65d40 100644 --- a/firmware/ec/common/inc/ocmp_wrappers/ocmp_ltc4275.h +++ b/firmware/ec/common/inc/ocmp_wrappers/ocmp_ltc4275.h @@ -15,17 +15,13 @@ SCHEMA_IMPORT const Driver_fxnTable LTC4275_fxnTable; static const Driver LTC4275 = { .name = "LTC4275", - .status = (Parameter[]){ - { .name = "class", .type = TYPE_ENUM }, - { .name = "powerGoodState", .type = TYPE_ENUM }, - {} - }, - .alerts = (Parameter[]){ - { .name = "INCOMPATIBLE", .type = TYPE_ENUM }, - { .name = "DISCONNECT", .type = TYPE_ENUM }, - { .name = "CONNECT", .type = TYPE_ENUM }, - {} - }, + .status = (Parameter[]){ { .name = "class", .type = TYPE_ENUM }, + { .name = "powerGoodState", .type = TYPE_ENUM }, + {} }, + .alerts = (Parameter[]){ { .name = "INCOMPATIBLE", .type = TYPE_ENUM }, + { .name = "DISCONNECT", .type = TYPE_ENUM }, + { .name = "CONNECT", .type = TYPE_ENUM }, + {} }, .fxnTable = <C4275_fxnTable, }; diff --git a/firmware/ec/common/inc/ocmp_wrappers/ocmp_mac.h b/firmware/ec/common/inc/ocmp_wrappers/ocmp_mac.h index a56f93e3f5..0e1b0c68c1 100644 --- a/firmware/ec/common/inc/ocmp_wrappers/ocmp_mac.h +++ b/firmware/ec/common/inc/ocmp_wrappers/ocmp_mac.h @@ -11,16 +11,15 @@ #include "common/inc/global/Framework.h" -#define OC_MAC_ADDRESS_SIZE 13 +#define OC_MAC_ADDRESS_SIZE 13 SCHEMA_IMPORT const Driver_fxnTable MAC_fxnTable; static const Driver Driver_MAC = { .name = "MAC", - .config = (Parameter[]){ - { .name = "address", .type = TYPE_STR, - .size = OC_MAC_ADDRESS_SIZE + 1 } - }, + .config = (Parameter[]){ { .name = "address", + .type = TYPE_STR, + .size = OC_MAC_ADDRESS_SIZE + 1 } }, .fxnTable = &MAC_fxnTable, }; diff --git a/firmware/ec/common/inc/ocmp_wrappers/ocmp_powersource.h b/firmware/ec/common/inc/ocmp_wrappers/ocmp_powersource.h index 2cec0bb4bd..3b9c834974 100644 --- a/firmware/ec/common/inc/ocmp_wrappers/ocmp_powersource.h +++ b/firmware/ec/common/inc/ocmp_wrappers/ocmp_powersource.h @@ -15,17 +15,17 @@ SCHEMA_IMPORT const Driver_fxnTable PWRSRC_fxnTable; static const Driver PWRSRC = { .name = "powerSource", - .status = (Parameter[]){ - { .name = "poeAvailability", .type = TYPE_UINT8 }, - { .name = "poeAccessebility", .type = TYPE_UINT8 }, - { .name = "solarAvailability", .type = TYPE_UINT8 }, - { .name = "solarAccessebility", .type = TYPE_UINT8 }, - { .name = "extBattAvailability", .type = TYPE_UINT8 }, - { .name = "extBattAccessebility", .type = TYPE_UINT8 }, - { .name = "intBattAvailability", .type = TYPE_UINT8 }, - { .name = "intBattAccessebility", .type = TYPE_UINT8 }, - {} - }, + .status = + (Parameter[]){ + { .name = "poeAvailability", .type = TYPE_UINT8 }, + { .name = "poeAccessebility", .type = TYPE_UINT8 }, + { .name = "solarAvailability", .type = TYPE_UINT8 }, + { .name = "solarAccessebility", .type = TYPE_UINT8 }, + { .name = "extBattAvailability", .type = TYPE_UINT8 }, + { .name = "extBattAccessebility", .type = TYPE_UINT8 }, + { .name = "intBattAvailability", .type = TYPE_UINT8 }, + { .name = "intBattAccessebility", .type = TYPE_UINT8 }, + {} }, .fxnTable = &PWRSRC_fxnTable, }; #endif /* _OCMP_POWERSOURCE_H_ */ diff --git a/firmware/ec/common/inc/ocmp_wrappers/ocmp_rfpowermonitor.h b/firmware/ec/common/inc/ocmp_wrappers/ocmp_rfpowermonitor.h index 3c32773e72..6d47466688 100644 --- a/firmware/ec/common/inc/ocmp_wrappers/ocmp_rfpowermonitor.h +++ b/firmware/ec/common/inc/ocmp_wrappers/ocmp_rfpowermonitor.h @@ -14,11 +14,9 @@ SCHEMA_IMPORT const Driver_fxnTable RFPowerMonitor_fxnTable; static const Driver RFPowerMonitor = { - .status = (Parameter[]){ - { .name = "forward", .type = TYPE_UINT16 }, - { .name = "reverse", .type = TYPE_UINT16 }, - {} - }, + .status = (Parameter[]){ { .name = "forward", .type = TYPE_UINT16 }, + { .name = "reverse", .type = TYPE_UINT16 }, + {} }, .fxnTable = &RFPowerMonitor_fxnTable, }; diff --git a/firmware/ec/common/inc/ocmp_wrappers/ocmp_rfwatchdog.h b/firmware/ec/common/inc/ocmp_wrappers/ocmp_rfwatchdog.h index bc7a16cb6e..7f5d69d15e 100644 --- a/firmware/ec/common/inc/ocmp_wrappers/ocmp_rfwatchdog.h +++ b/firmware/ec/common/inc/ocmp_wrappers/ocmp_rfwatchdog.h @@ -15,11 +15,8 @@ SCHEMA_IMPORT const Driver_fxnTable RFFEWatchdogP_fxnTable; static const Driver RFFEWatchdog = { .name = "RFFE Watchdog", - .alerts = (Parameter[]){ - { .name = "LB_R_PWR" }, - { .name = "HB_R_PWR" }, - {} - }, + .alerts = + (Parameter[]){ { .name = "LB_R_PWR" }, { .name = "HB_R_PWR" }, {} }, .fxnTable = &RFFEWatchdogP_fxnTable, }; diff --git a/firmware/ec/common/inc/ocmp_wrappers/ocmp_se98a.h b/firmware/ec/common/inc/ocmp_wrappers/ocmp_se98a.h index ae2ce80d0f..9a2b6a9840 100644 --- a/firmware/ec/common/inc/ocmp_wrappers/ocmp_se98a.h +++ b/firmware/ec/common/inc/ocmp_wrappers/ocmp_se98a.h @@ -20,26 +20,20 @@ typedef union SE98A_Config { int8_t limits[3]; } SE98A_Config; -SCHEMA_IMPORT const Driver_fxnTable SE98_fxnTable; +SCHEMA_IMPORT const Driver_fxnTable SE98_fxnTable; static const Driver SE98A = { .name = "SE98A", - .status = (Parameter[]){ - { .name = "temperature", .type = TYPE_UINT8 }, - {} - }, - .config = (Parameter[]){ - { .name = "lowlimit", .type = TYPE_INT8 }, - { .name = "highlimit", .type = TYPE_UINT8 }, - { .name = "critlimit", .type = TYPE_UINT8 }, - {} - }, - .alerts = (Parameter[]){ - { .name = "BAW", .type = TYPE_UINT8 }, - { .name = "AAW", .type = TYPE_UINT8 }, - { .name = "ACW", .type = TYPE_UINT8 }, - {} - }, + .status = + (Parameter[]){ { .name = "temperature", .type = TYPE_UINT8 }, {} }, + .config = (Parameter[]){ { .name = "lowlimit", .type = TYPE_INT8 }, + { .name = "highlimit", .type = TYPE_UINT8 }, + { .name = "critlimit", .type = TYPE_UINT8 }, + {} }, + .alerts = (Parameter[]){ { .name = "BAW", .type = TYPE_UINT8 }, + { .name = "AAW", .type = TYPE_UINT8 }, + { .name = "ACW", .type = TYPE_UINT8 }, + {} }, .fxnTable = &SE98_fxnTable, }; diff --git a/firmware/ec/common/inc/ocmp_wrappers/ocmp_syncio.h b/firmware/ec/common/inc/ocmp_wrappers/ocmp_syncio.h index 7c9afb85b6..f50a49c191 100644 --- a/firmware/ec/common/inc/ocmp_wrappers/ocmp_syncio.h +++ b/firmware/ec/common/inc/ocmp_wrappers/ocmp_syncio.h @@ -11,21 +11,19 @@ #include "common/inc/global/Framework.h" -SCHEMA_IMPORT const Driver_fxnTable SYNC_fxnTable; +SCHEMA_IMPORT const Driver_fxnTable SYNC_fxnTable; static const Driver Sync_IO = { .name = "sync_ioexp", - .status = (Parameter[]){ - { - .name = "gps_lock", - .type = TYPE_ENUM, - .values = (Enum_Map[]){ - {0, "Gps Not Locked" }, - {1, "Gps Locked" }, - {} - }, - }, - {} - }, + .status = + (Parameter[]){ + { + .name = "gps_lock", + .type = TYPE_ENUM, + .values = (Enum_Map[]){ { 0, "Gps Not Locked" }, + { 1, "Gps Locked" }, + {} }, + }, + {} }, .fxnTable = &SYNC_fxnTable, }; diff --git a/firmware/ec/common/inc/ocmp_wrappers/ocmp_testmodule.h b/firmware/ec/common/inc/ocmp_wrappers/ocmp_testmodule.h index eb66864f6d..1233b46443 100644 --- a/firmware/ec/common/inc/ocmp_wrappers/ocmp_testmodule.h +++ b/firmware/ec/common/inc/ocmp_wrappers/ocmp_testmodule.h @@ -24,77 +24,72 @@ SCHEMA_IMPORT bool TestMod_cmdReset(void *driver, void *params); static const Driver Testmod_G510 = { .name = "Fibocom G510", - .status = (Parameter[]){ - { .name = "imei", .type = TYPE_UINT64 }, - { .name = "imsi", .type = TYPE_UINT64 }, - { .name = "mfg", .type = TYPE_STR, .size = 10 }, - { .name = "model", .type = TYPE_STR, .size = 5 }, - { .name = "rssi", .type = TYPE_UINT8 }, - { .name = "ber", .type = TYPE_UINT8 }, - { .name = "registration", .type = TYPE_ENUM, - .values = (Enum_Map[]){ - { 0, "Not Registered, Not Searching" }, - { 1, "Registered, Home Network" }, - { 2, "Not Registered, Searching" }, - { 3, "Registration Denied" }, - { 4, "Status Unknown" }, - { 5, "Registered, Roaming" }, - {} - }, - }, - { .name = "network_operatorinfo", .type = TYPE_UINT8, .size = 3 }, /* TODO: this is a complex type */ - { .name = "cellid", .type = TYPE_UINT32 }, - { .name = "bsic", .type = TYPE_UINT8 }, - { .name = "lasterror",.type = TYPE_UINT8, .size = 3 }, /* TODO: this is a complex type */ - {} - }, - .alerts = (Parameter[]){ - { .name = "Call State Changed", .type = TYPE_ENUM, - .values = (Enum_Map[]){ - { 0, "Ringing" }, - { 1, "Call End" }, - {} - }, - }, - /* TODO: var len str */ - { .name = "Incoming SMS", .type = TYPE_STR, .size = 20 }, - {} - }, - .commands = (Command[]){ - { - .name = "disconnect_nw", - .cb_cmd = TestMod_cmdDisconnect - }, - { - .name = "connect_nw", - .cb_cmd = TestMod_cmdConnect - }, - { - .name = "send", - .cb_cmd = TestMod_cmdSendSms - }, - { - .name = "dial", - .cb_cmd = TestMod_cmdDial - }, - { - .name = "answer", - .cb_cmd = TestMod_cmdAnswer, - }, - { - .name = "hangup", - .cb_cmd = TestMod_cmdHangup, - }, - { - .name = "enable", - .cb_cmd = TestMod_cmdEnable, - }, - { - .name = "disable", - .cb_cmd = TestMod_cmdDisable, - }, - {} - }, + .status = + (Parameter[]){ + { .name = "imei", .type = TYPE_UINT64 }, + { .name = "imsi", .type = TYPE_UINT64 }, + { .name = "mfg", .type = TYPE_STR, .size = 10 }, + { .name = "model", .type = TYPE_STR, .size = 5 }, + { .name = "rssi", .type = TYPE_UINT8 }, + { .name = "ber", .type = TYPE_UINT8 }, + { + .name = "registration", + .type = TYPE_ENUM, + .values = + (Enum_Map[]){ + { 0, + "Not Registered, Not Searching" }, + { 1, "Registered, Home Network" }, + { 2, "Not Registered, Searching" }, + { 3, "Registration Denied" }, + { 4, "Status Unknown" }, + { 5, "Registered, Roaming" }, + {} }, + }, + { .name = "network_operatorinfo", + .type = TYPE_UINT8, + .size = 3 }, /* TODO: this is a complex type */ + { .name = "cellid", .type = TYPE_UINT32 }, + { .name = "bsic", .type = TYPE_UINT8 }, + { .name = "lasterror", + .type = TYPE_UINT8, + .size = 3 }, /* TODO: this is a complex type */ + {} }, + .alerts = + (Parameter[]){ + { + .name = "Call State Changed", + .type = TYPE_ENUM, + .values = (Enum_Map[]){ { 0, "Ringing" }, + { 1, "Call End" }, + {} }, + }, + /* TODO: var len str */ + { .name = "Incoming SMS", .type = TYPE_STR, .size = 20 }, + {} }, + .commands = + (Command[]){ { .name = "disconnect_nw", + .cb_cmd = TestMod_cmdDisconnect }, + { .name = "connect_nw", .cb_cmd = TestMod_cmdConnect }, + { .name = "send", .cb_cmd = TestMod_cmdSendSms }, + { .name = "dial", .cb_cmd = TestMod_cmdDial }, + { + .name = "answer", + .cb_cmd = TestMod_cmdAnswer, + }, + { + .name = "hangup", + .cb_cmd = TestMod_cmdHangup, + }, + { + .name = "enable", + .cb_cmd = TestMod_cmdEnable, + }, + { + .name = "disable", + .cb_cmd = TestMod_cmdDisable, + }, + {} }, .fxnTable = &G510_fxnTable, .payload_fmt_union = true, /* Testmodule breaks serialization pattern :( */ }; diff --git a/firmware/ec/inc/common/bigbrother.h b/firmware/ec/inc/common/bigbrother.h index 252f31ccfc..f3c163e359 100644 --- a/firmware/ec/inc/common/bigbrother.h +++ b/firmware/ec/inc/common/bigbrother.h @@ -19,13 +19,13 @@ /***************************************************************************** * MACRO DEFINITIONS *****************************************************************************/ -#define BIGBROTHER_TASK_PRIORITY 5 -#define BIGBROTHER_TASK_STACK_SIZE 8096 +#define BIGBROTHER_TASK_PRIORITY 5 +#define BIGBROTHER_TASK_STACK_SIZE 8096 typedef enum { OC_SYS_S_ID_EEPROM = 1, OC_SYS_INVEN_EEPROM = 2, - OC_SYS_FLASH= 3, + OC_SYS_FLASH = 3, } eSysDeviceSno; /* Semaphore and Queue Handles for Big Brother */ diff --git a/firmware/ec/inc/common/byteorder.h b/firmware/ec/inc/common/byteorder.h index 2d98269d1b..d886572e94 100644 --- a/firmware/ec/inc/common/byteorder.h +++ b/firmware/ec/inc/common/byteorder.h @@ -12,44 +12,45 @@ /* Detect endianness if using TI compiler */ #ifndef __BYTE_ORDER__ - #define __ORDER_LITTLE_ENDIAN__ 1234 - #define __ORDER_BIG_ENDIAN__ 4321 - #ifdef __little_endian__ - #define __BYTE_ORDER__ __ORDER_LITTLE_ENDIAN__ - #else - #ifdef __big_endian__ - #define __BYTE_ORDER__ __ORDER_BIG_ENDIAN__ - #else - #error Unable to detect byte order! - #endif - #endif +#define __ORDER_LITTLE_ENDIAN__ 1234 +#define __ORDER_BIG_ENDIAN__ 4321 +#ifdef __little_endian__ +#define __BYTE_ORDER__ __ORDER_LITTLE_ENDIAN__ +#else +#ifdef __big_endian__ +#define __BYTE_ORDER__ __ORDER_BIG_ENDIAN__ +#else +#error Unable to detect byte order! +#endif +#endif #endif #if __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__ - /* Little endian host functions here */ - #define htobe16(a) ( (((a)>>8)&0xff) + (((a)<<8)&0xff00) ) - #define betoh16(a) htobe16(a) +/* Little endian host functions here */ +#define htobe16(a) ((((a) >> 8) & 0xff) + (((a) << 8) & 0xff00)) +#define betoh16(a) htobe16(a) - #define htobe32(a) ((((a) & 0xff000000) >> 24) | (((a) & 0x00ff0000) >> 8) | \ - (((a) & 0x0000ff00) << 8) | (((a) & 0x000000ff) << 24) ) - #define betoh32(a) htobe32(a) +#define htobe32(a) \ + ((((a)&0xff000000) >> 24) | (((a)&0x00ff0000) >> 8) | \ + (((a)&0x0000ff00) << 8) | (((a)&0x000000ff) << 24)) +#define betoh32(a) htobe32(a) - #define htole16(a) a; // Host is a little endian. - #define letoh16(a) htole16(a) +#define htole16(a) a; // Host is a little endian. +#define letoh16(a) htole16(a) #else - /* Big endian host functions here */ - #define htole16(a) ( (((a)>>8)&0xff) + (((a)<<8)&0xff00) ) - #define letoh16(a) htobe16(a) +/* Big endian host functions here */ +#define htole16(a) ((((a) >> 8) & 0xff) + (((a) << 8) & 0xff00)) +#define letoh16(a) htobe16(a) - #define htole32(a) ((((a) & 0xff000000) >> 24) | (((a) & 0x00ff0000) >> 8) | \ - (((a) & 0x0000ff00) << 8) | (((a) & 0x000000ff) << 24) ) - #define letoh32(a) htobe32(a) +#define htole32(a) \ + ((((a)&0xff000000) >> 24) | (((a)&0x00ff0000) >> 8) | \ + (((a)&0x0000ff00) << 8) | (((a)&0x000000ff) << 24)) +#define letoh32(a) htobe32(a) - #define htobe16(a) a; // Host is a little endian. - #define betoh16(a) htole16(a) +#define htobe16(a) a; // Host is a little endian. +#define betoh16(a) htole16(a) #endif - #endif /* INC_COMMON_BYTEORDER_H_ */ diff --git a/firmware/ec/inc/common/global_header.h b/firmware/ec/inc/common/global_header.h index 7afa760bc1..42701d80f9 100644 --- a/firmware/ec/inc/common/global_header.h +++ b/firmware/ec/inc/common/global_header.h @@ -9,8 +9,8 @@ #ifndef GLOBAL_HEADER_H_ #define GLOBAL_HEADER_H_ -#define _FW_REV_MAJOR_ 0 -#define _FW_REV_MINOR_ 4 +#define _FW_REV_MAJOR_ 0 +#define _FW_REV_MINOR_ 4 #define _FW_REV_BUGFIX_ 0 #define _FW_REV_TAG_ __COMMIT_HASH__ @@ -21,54 +21,78 @@ #include /* For System_printf */ #if 1 -#define DEBUG(...) {System_printf(__VA_ARGS__); System_flush();} +#define DEBUG(...) \ + { \ + System_printf(__VA_ARGS__); \ + System_flush(); \ + } -#define LOGGER(...) {System_printf(__VA_ARGS__); System_flush();} -#define LOGGER_WARNING(...) {System_printf(__VA_ARGS__); System_flush();} -#define LOGGER_ERROR(...) {System_printf(__VA_ARGS__); System_flush();} +#define LOGGER(...) \ + { \ + System_printf(__VA_ARGS__); \ + System_flush(); \ + } +#define LOGGER_WARNING(...) \ + { \ + System_printf(__VA_ARGS__); \ + System_flush(); \ + } +#define LOGGER_ERROR(...) \ + { \ + System_printf(__VA_ARGS__); \ + System_flush(); \ + } #ifdef DEBUG_LOGS -#define LOGGER_DEBUG(...) {System_printf(__VA_ARGS__); System_flush();} +#define LOGGER_DEBUG(...) \ + { \ + System_printf(__VA_ARGS__); \ + System_flush(); \ + } -#define NOP_DELAY() { uint32_t delay =7000000;\ - while (delay--) \ - ;\ - } +#define NOP_DELAY() \ + { \ + uint32_t delay = 7000000; \ + while (delay--) \ + ; \ + } #else - #define LOGGER_DEBUG(...) - #define NOP_DELAY() +#define LOGGER_DEBUG(...) +#define NOP_DELAY() #endif #else -#define DEBUG(...) // +#define DEBUG(...) // -#define LOGGER(...) // -#define LOGGER_WARNING(...) // -#define LOGGER_ERROR(...) // +#define LOGGER(...) // +#define LOGGER_WARNING(...) // +#define LOGGER_ERROR(...) // #ifdef DEBUG_LOGS -#define LOGGER_DEBUG(...) // +#define LOGGER_DEBUG(...) // #endif -#define NOP_DELAY() { uint32_t delay =7000000;\ - while (delay--) \ - ;\ - } +#define NOP_DELAY() \ + { \ + uint32_t delay = 7000000; \ + while (delay--) \ + ; \ + } #endif -#define RET_OK 0 -#define RET_NOT_OK 1 +#define RET_OK 0 +#define RET_NOT_OK 1 typedef enum { - RETURN_OK = 0x00, - RETURN_NOTOK = 0x01, - RETURN_OCMP_INVALID_SS_TYPE = 0x02, - RETURN_OCMP_INVALID_MSG_TYPE = 0x03, - RETURN_OCMP_INVALID_COMP_TYPE = 0x04, - RETURN_OCMP_INVALID_AXN_TYPE = 0x05, - RETURN_OCMP_INVALID_PARAM_INFO = 0x06, - RETURN_OCMP_INVALID_CMD_INFO = 0x07, - RETURN_OCMP_INVALID_IFACE_TYPE = 0x08, - RETURN_DEV_VALUE_TOO_LOW = 0x09, - RETURN_DEV_VALUE_TOO_HIGH = 0x0A, - RETURN_DEV_I2C_BUS_FAILURE = 0x0B, - RETURN_SS_NOT_READY = 0x0C, - RETURN_SS_NOT_RESET_STATE = 0x0D + RETURN_OK = 0x00, + RETURN_NOTOK = 0x01, + RETURN_OCMP_INVALID_SS_TYPE = 0x02, + RETURN_OCMP_INVALID_MSG_TYPE = 0x03, + RETURN_OCMP_INVALID_COMP_TYPE = 0x04, + RETURN_OCMP_INVALID_AXN_TYPE = 0x05, + RETURN_OCMP_INVALID_PARAM_INFO = 0x06, + RETURN_OCMP_INVALID_CMD_INFO = 0x07, + RETURN_OCMP_INVALID_IFACE_TYPE = 0x08, + RETURN_DEV_VALUE_TOO_LOW = 0x09, + RETURN_DEV_VALUE_TOO_HIGH = 0x0A, + RETURN_DEV_I2C_BUS_FAILURE = 0x0B, + RETURN_SS_NOT_READY = 0x0C, + RETURN_SS_NOT_RESET_STATE = 0x0D } ReturnStatus; #endif /* GLOBAL_HEADER_H_ */ diff --git a/firmware/ec/inc/common/i2cbus.h b/firmware/ec/inc/common/i2cbus.h index 33c196e883..9e7edfc4a9 100644 --- a/firmware/ec/inc/common/i2cbus.h +++ b/firmware/ec/inc/common/i2cbus.h @@ -33,16 +33,12 @@ I2C_Handle i2c_open_bus(unsigned int index); /* Wrapper to ease migration */ #define i2c_get_handle i2c_open_bus -void i2c_close_bus(I2C_Handle* i2cHandle); -ReturnStatus i2c_reg_write( I2C_Handle i2cHandle, - uint8_t deviceAddress, - uint8_t regAddress, - uint16_t value, - uint8_t numofBytes); -ReturnStatus i2c_reg_read( I2C_Handle i2cHandle, - uint8_t deviceAddress, - uint8_t regAddress, - uint16_t *value, - uint8_t numofBytes); +void i2c_close_bus(I2C_Handle *i2cHandle); +ReturnStatus i2c_reg_write(I2C_Handle i2cHandle, uint8_t deviceAddress, + uint8_t regAddress, uint16_t value, + uint8_t numofBytes); +ReturnStatus i2c_reg_read(I2C_Handle i2cHandle, uint8_t deviceAddress, + uint8_t regAddress, uint16_t *value, + uint8_t numofBytes); #endif /* I2CBUS_H_ */ diff --git a/firmware/ec/inc/common/post.h b/firmware/ec/inc/common/post.h index 36b1605ee8..ad8ad70b71 100644 --- a/firmware/ec/inc/common/post.h +++ b/firmware/ec/inc/common/post.h @@ -24,9 +24,8 @@ *****************************************************************************/ #define POST_RECORDS 55 -#define OC_POST_TASKPRIORITY 3 -#define POST_TASK_STACK_SIZE 4096 - +#define OC_POST_TASKPRIORITY 3 +#define POST_TASK_STACK_SIZE 4096 /***************************************************************************** * HANDLE DECLARATIONS diff --git a/firmware/ec/inc/common/post_util.h b/firmware/ec/inc/common/post_util.h index 69b6427577..9628b238c5 100644 --- a/firmware/ec/inc/common/post_util.h +++ b/firmware/ec/inc/common/post_util.h @@ -12,7 +12,6 @@ #include "common/inc/global/Framework.h" #include "inc/common/post.h" -ReturnStatus _execPost(OCMPMessageFrame *pMsg, - unsigned int subsystem_id); +ReturnStatus _execPost(OCMPMessageFrame *pMsg, unsigned int subsystem_id); #endif /* INC_COMMON_POST_UTIL_H_ */ diff --git a/firmware/ec/inc/devices/88E6071_registers.h b/firmware/ec/inc/devices/88E6071_registers.h index a29703c180..e7cf51adca 100644 --- a/firmware/ec/inc/devices/88E6071_registers.h +++ b/firmware/ec/inc/devices/88E6071_registers.h @@ -10,214 +10,214 @@ #define _88E6071_REGISTERS_H_ /* SMI Device IDs */ -#define PHY_PORT_0 0 -#define PHY_PORT_1 1 -#define PHY_PORT_2 2 -#define PHY_PORT_3 3 -#define PHY_PORT_4 4 -#define GLOBAL_2 7 -#define SW_PORT_0 8 -#define SW_PORT_1 9 -#define SW_PORT_2 10 -#define SW_PORT_3 11 -#define SW_PORT_4 12 -#define SW_PORT_5 13 -#define SW_PORT_6 14 -#define GLOBAL_1 15 +#define PHY_PORT_0 0 +#define PHY_PORT_1 1 +#define PHY_PORT_2 2 +#define PHY_PORT_3 3 +#define PHY_PORT_4 4 +#define GLOBAL_2 7 +#define SW_PORT_0 8 +#define SW_PORT_1 9 +#define SW_PORT_2 10 +#define SW_PORT_3 11 +#define SW_PORT_4 12 +#define SW_PORT_5 13 +#define SW_PORT_6 14 +#define GLOBAL_1 15 /* PHY Specific Register set */ -#define REG_PHY_CONTROL 0x0 -#define REG_PHY_STATUS 0x1 -#define REG_PHY_ID_1 0x2 -#define REG_PHY_ID_2 0x3 -#define REG_AUTONEG_ADV 0x4 -#define REG_LINK_PARTNER_ABILITY 0x5 -#define REG_AUTO_NEG_EXPANSION 0x6 -#define REG_NXT_PAGE_TRANSMIT 0x7 -#define REG_LINK_PARTNER_NXT_PAGE 0x8 -#define REG_MMD_ACCESS_CNTRL 0xD -#define REG_MMD_ADDR_DATA 0xC -#define REG_PHY_SPEC_CONTROL 0x10 -#define REG_PHY_SPEC_STATUS 0x11 -#define REG_PHY_INTERRUPT_EN 0x12 -#define REG_PHY_INTERRUPT_STATUS 0x13 -#define REG_RCV_ERR_COUNTER 0x15 +#define REG_PHY_CONTROL 0x0 +#define REG_PHY_STATUS 0x1 +#define REG_PHY_ID_1 0x2 +#define REG_PHY_ID_2 0x3 +#define REG_AUTONEG_ADV 0x4 +#define REG_LINK_PARTNER_ABILITY 0x5 +#define REG_AUTO_NEG_EXPANSION 0x6 +#define REG_NXT_PAGE_TRANSMIT 0x7 +#define REG_LINK_PARTNER_NXT_PAGE 0x8 +#define REG_MMD_ACCESS_CNTRL 0xD +#define REG_MMD_ADDR_DATA 0xC +#define REG_PHY_SPEC_CONTROL 0x10 +#define REG_PHY_SPEC_STATUS 0x11 +#define REG_PHY_INTERRUPT_EN 0x12 +#define REG_PHY_INTERRUPT_STATUS 0x13 +#define REG_RCV_ERR_COUNTER 0x15 /* GLOBAL - 1 */ -#define REG_GLOBAL_STATUS 0x0 -#define REG_GLOBAL_CONTROL 0x4 -#define REG_VTU_CONTROL 0x5 -#define REG_VTU_VID 0x6 -#define REG_VTU_DATA_PORT_3_0 0x7 -#define REG_VTU_DATA_PORT_6_4 0x8 -#define REG_ATU_CONTROL 0xA -#define REG_ATU_OPERATION 0xB -#define REG_ATU_DATA 0xC +#define REG_GLOBAL_STATUS 0x0 +#define REG_GLOBAL_CONTROL 0x4 +#define REG_VTU_CONTROL 0x5 +#define REG_VTU_VID 0x6 +#define REG_VTU_DATA_PORT_3_0 0x7 +#define REG_VTU_DATA_PORT_6_4 0x8 +#define REG_ATU_CONTROL 0xA +#define REG_ATU_OPERATION 0xB +#define REG_ATU_DATA 0xC /* GLOBAL - 2 */ -#define REG_INTERRUPT_SOURCE 0x0 -#define REG_INTERRUPT_MASK 0x1 -#define REG_MGMT_EN_2X 0x2 -#define REG_MGMT_EN_0X 0x3 -#define REG_MANAGEMENT 0x5 -#define REG_TRUNK_MASK 0x7 -#define REG_INGRESS_RATE_CMD 0x9 -#define REG_INGRESS_RATE_DATA 0xA -#define REG_SWITCH_MAC 0xD -#define REG_ATU_STATS 0xE -#define REG_PRIORITY_OVERRIDES 0xF -#define REG_EEPROM_CMD 0x14 -#define REG_EEPROM_DATA 0x15 -#define REG_AVB_CMD 0x16 -#define REG_AVB_DATA 0x17 -#define REG_SMI_CMD 0x18 -#define REG_SMI_DATA 0x19 -#define REG_SCRATCH_MISC 0x1A -#define REG_WATCHDOG 0x1B +#define REG_INTERRUPT_SOURCE 0x0 +#define REG_INTERRUPT_MASK 0x1 +#define REG_MGMT_EN_2X 0x2 +#define REG_MGMT_EN_0X 0x3 +#define REG_MANAGEMENT 0x5 +#define REG_TRUNK_MASK 0x7 +#define REG_INGRESS_RATE_CMD 0x9 +#define REG_INGRESS_RATE_DATA 0xA +#define REG_SWITCH_MAC 0xD +#define REG_ATU_STATS 0xE +#define REG_PRIORITY_OVERRIDES 0xF +#define REG_EEPROM_CMD 0x14 +#define REG_EEPROM_DATA 0x15 +#define REG_AVB_CMD 0x16 +#define REG_AVB_DATA 0x17 +#define REG_SMI_CMD 0x18 +#define REG_SMI_DATA 0x19 +#define REG_SCRATCH_MISC 0x1A +#define REG_WATCHDOG 0x1B /* Switch Ports registers */ -#define REG_PORT_STATUS 0x0 -#define REG_MAC_CONTROL 0x1 -#define REG_JAMING_CONTROL 0x2 -#define REG_SW_IDENTIFIER 0x3 -#define REG_PORT_CONTROL 0x4 -#define REG_PORT_CONTROL_1 0x5 -#define REG_VLAN_MAP 0x6 -#define REG_VLAN_ID_PRIORITY 0x7 -#define REG_PORT_ID_2 0x8 -#define REG_EGRESS_RATE_CONTROL 0x9 -#define REG_EGRESS_RATE_CONTROL_2 0xA -#define REG_PORT_ASSOCITATION_VECTOR 0xB -#define REG_PRIORITY_OVERRIDE 0xD -#define REG_POLICY_CONTROL 0xE -#define REG_PORT_ETYPE 0xF -#define REG_RX_FRAME_COUNTER 0x10 -#define REG_TX_FRAME_COUNTER 0x11 -#define REG_INDISCARD_COUNTER 0x12 -#define REG_INFILTERED_COUNTER 0x13 -#define REG_LED_CONTROL 0x16 -#define REG_TAG_REMAP_3_0 0x18 -#define REG_TAG_REMAP_7_4 0x19 -#define REG_QUEUE_COUNTER 0x1B +#define REG_PORT_STATUS 0x0 +#define REG_MAC_CONTROL 0x1 +#define REG_JAMING_CONTROL 0x2 +#define REG_SW_IDENTIFIER 0x3 +#define REG_PORT_CONTROL 0x4 +#define REG_PORT_CONTROL_1 0x5 +#define REG_VLAN_MAP 0x6 +#define REG_VLAN_ID_PRIORITY 0x7 +#define REG_PORT_ID_2 0x8 +#define REG_EGRESS_RATE_CONTROL 0x9 +#define REG_EGRESS_RATE_CONTROL_2 0xA +#define REG_PORT_ASSOCITATION_VECTOR 0xB +#define REG_PRIORITY_OVERRIDE 0xD +#define REG_POLICY_CONTROL 0xE +#define REG_PORT_ETYPE 0xF +#define REG_RX_FRAME_COUNTER 0x10 +#define REG_TX_FRAME_COUNTER 0x11 +#define REG_INDISCARD_COUNTER 0x12 +#define REG_INFILTERED_COUNTER 0x13 +#define REG_LED_CONTROL 0x16 +#define REG_TAG_REMAP_3_0 0x18 +#define REG_TAG_REMAP_7_4 0x19 +#define REG_QUEUE_COUNTER 0x1B -#define REG_C45_PACKET_GEN 0x8030 -#define REG_C45_CRC_ERROR_COUNTER 0x8031 +#define REG_C45_PACKET_GEN 0x8030 +#define REG_C45_CRC_ERROR_COUNTER 0x8031 /* * PHY Register fields SMI Device address 0x0 to 0x4 */ //REG_PHY_CONTROL - 0x0 -#define SOFT_RESET (1 << 0xF) -#define LOOPBACK_EN (1 << 0xE) -#define SPEED (1 << 0xD) -#define AUTONEG_EN (1 << 0xC) -#define PWR_DOWN (1 << 0xB) -#define RESTART_AUTONEG (1 << 0xA) -#define DUPLEX (1 << 0x8) +#define SOFT_RESET (1 << 0xF) +#define LOOPBACK_EN (1 << 0xE) +#define SPEED (1 << 0xD) +#define AUTONEG_EN (1 << 0xC) +#define PWR_DOWN (1 << 0xB) +#define RESTART_AUTONEG (1 << 0xA) +#define DUPLEX (1 << 0x8) //REG_PHY_STATUS - 0x1 -#define AUTONEG_DONE (1 << 0x5) -#define LINK_UP (1 << 0x2) +#define AUTONEG_DONE (1 << 0x5) +#define LINK_UP (1 << 0x2) //REG_MMD_ACCESS_CNTRL - 0xD -#define DEVADDR (0x1F << 0x0) -#define FUNCTION (0x03 << 0xD) +#define DEVADDR (0x1F << 0x0) +#define FUNCTION (0x03 << 0xD) //REG_PHY_SPEC_CONTROL - 0x10 -#define ENERGY_DET (1 << 0xE) -#define DIS_NLP_CHECK (1 << 0xD) -#define EXT_DISTANCE (1 << 0x7) -#define SIGDET_POL (1 << 0x6) -#define AUTOMDI_CROSSOVER (0x03 << 0x4) -#define AUTOPOL_REVERSE (1 << 0x1) +#define ENERGY_DET (1 << 0xE) +#define DIS_NLP_CHECK (1 << 0xD) +#define EXT_DISTANCE (1 << 0x7) +#define SIGDET_POL (1 << 0x6) +#define AUTOMDI_CROSSOVER (0x03 << 0x4) +#define AUTOPOL_REVERSE (1 << 0x1) //REG_PHY_SPEC_STATUS - 0x11 -#define RES_SPEED (1 << 0xE) -#define RES_DUPLEX (1 << 0xD) -#define RT_LINK (1 << 0xA) -#define MDI_CROSSOVER_STATUS (1 << 0x6) -#define SLEEP_MODE (1 << 0x4) -#define POLARITY (1 << 0x1) -#define JABBER_DET (1 << 0x0) +#define RES_SPEED (1 << 0xE) +#define RES_DUPLEX (1 << 0xD) +#define RT_LINK (1 << 0xA) +#define MDI_CROSSOVER_STATUS (1 << 0x6) +#define SLEEP_MODE (1 << 0x4) +#define POLARITY (1 << 0x1) +#define JABBER_DET (1 << 0x0) //REG_PHY_INTERRUPT_EN - 0x12 -#define SPEED_INT_EN (1 << 0xE) -#define DUPLEX_INT_EN (1 << 0xD) -#define PAGE_RX_INT_STATUS_EN (1 << 0xC) -#define AUTONEG_COMPLETE_INT_EN (1 << 0xB) -#define LINK_CHANGE_INT_EN (1 << 0xA) -#define MDI_CROSSOVER_INT_EN (1 << 0x6) -#define ENERGY_DET_INT_EN (1 << 0x4) -#define POLARITY_INT_EN (1 << 0x1) -#define JABBER_INT_EN (1 << 0x0) +#define SPEED_INT_EN (1 << 0xE) +#define DUPLEX_INT_EN (1 << 0xD) +#define PAGE_RX_INT_STATUS_EN (1 << 0xC) +#define AUTONEG_COMPLETE_INT_EN (1 << 0xB) +#define LINK_CHANGE_INT_EN (1 << 0xA) +#define MDI_CROSSOVER_INT_EN (1 << 0x6) +#define ENERGY_DET_INT_EN (1 << 0x4) +#define POLARITY_INT_EN (1 << 0x1) +#define JABBER_INT_EN (1 << 0x0) //REG_PHY_INTERRUPT_STATUS - 0x13 -#define SPEED_INT_STATUS (1 << 0xE) -#define DUPLEX_INT_STATUS (1 << 0xD) -#define PAGE_RX_INT_STATUS (1 << 0xC) +#define SPEED_INT_STATUS (1 << 0xE) +#define DUPLEX_INT_STATUS (1 << 0xD) +#define PAGE_RX_INT_STATUS (1 << 0xC) #define AUTONEG_COMPLETE_INT_STATUS (1 << 0xB) -#define LINK_CHANGE_INT_STATUS (1 << 0xA) -#define MDI_CROSSOVER_INT_STATUS (1 << 0x6) -#define ENERGY_DET_INT_STATUS (1 << 0x4) -#define POLARITY_INT_STATUS (1 << 0x1) -#define JABBER_INT_STATUS (1 << 0x0) +#define LINK_CHANGE_INT_STATUS (1 << 0xA) +#define MDI_CROSSOVER_INT_STATUS (1 << 0x6) +#define ENERGY_DET_INT_STATUS (1 << 0x4) +#define POLARITY_INT_STATUS (1 << 0x1) +#define JABBER_INT_STATUS (1 << 0x0) /* * GLOBAL -1 Register fields (SMI Device address 0xF) */ // REG_GLOBAL_STATUS 0x1 -#define INIT_RDY (1 << 11) -#define AVB_INT (1 << 8) -#define DEV_INT (1 << 7) -#define STATS_DONE (1 << 6) -#define VLAN_PROB (1 << 5) -#define VLAN_DONE (1 << 4) -#define ATU_PROB (1 << 3) -#define ATU_DONE (1 << 2) -#define EE_INT (1 << 0) +#define INIT_RDY (1 << 11) +#define AVB_INT (1 << 8) +#define DEV_INT (1 << 7) +#define STATS_DONE (1 << 6) +#define VLAN_PROB (1 << 5) +#define VLAN_DONE (1 << 4) +#define ATU_PROB (1 << 3) +#define ATU_DONE (1 << 2) +#define EE_INT (1 << 0) // REG_GLOBAL_CONTROL 0x4 -#define SW_RESET (1 << 15) -#define DISCARD_EXCESSIVE (1 << 13) -#define ARP_WO_BROADCAST (1 << 12) -#define MAX_FRAME_SIZE (1 << 10) -#define RELOAD (1 << 9) -#define AVB_INT_EN (1 << 8) -#define DEV_INT_EN (1 << 7) -#define STATS_DONE_INT_EN (1 << 6) -#define VTU_PROB_INT_EN (1 << 5) -#define ATU_DONE_INT_EN (1 << 4) -#define EE_INT_EN (1 << 0) +#define SW_RESET (1 << 15) +#define DISCARD_EXCESSIVE (1 << 13) +#define ARP_WO_BROADCAST (1 << 12) +#define MAX_FRAME_SIZE (1 << 10) +#define RELOAD (1 << 9) +#define AVB_INT_EN (1 << 8) +#define DEV_INT_EN (1 << 7) +#define STATS_DONE_INT_EN (1 << 6) +#define VTU_PROB_INT_EN (1 << 5) +#define ATU_DONE_INT_EN (1 << 4) +#define EE_INT_EN (1 << 0) /* * GLOBAL - 2 Register fields (SMI Device address 0x7) */ //REG_INTERRUPT_SOURCE 0x0 -#define WATCHDOG_INT (1 << 15) -#define JAM_INT (1 << 14) -#define WAKE_EVENT_INT (1 << 12) -#define PHY_4_INT (1 << 4) -#define PHY_3_INT (1 << 3) -#define PHY_2_INT (1 << 2) -#define PHY_1_INT (1 << 1) -#define PHY_0_INT (1 << 0) +#define WATCHDOG_INT (1 << 15) +#define JAM_INT (1 << 14) +#define WAKE_EVENT_INT (1 << 12) +#define PHY_4_INT (1 << 4) +#define PHY_3_INT (1 << 3) +#define PHY_2_INT (1 << 2) +#define PHY_1_INT (1 << 1) +#define PHY_0_INT (1 << 0) //REG_INTERRUPT_MASK 0x1 -#define WATCHDOG_INT_EN (1 << 15) -#define JAM_INT_EN (1 << 14) -#define WAKE_EVENT_INT_EN (1 << 12) -#define PHY_4_INT_EN (1 << 4) -#define PHY_3_INT_EN (1 << 3) -#define PHY_2_INT_EN (1 << 2) -#define PHY_1_INT_EN (1 << 1) -#define PHY_0_INT_EN (1 << 0) +#define WATCHDOG_INT_EN (1 << 15) +#define JAM_INT_EN (1 << 14) +#define WAKE_EVENT_INT_EN (1 << 12) +#define PHY_4_INT_EN (1 << 4) +#define PHY_3_INT_EN (1 << 3) +#define PHY_2_INT_EN (1 << 2) +#define PHY_1_INT_EN (1 << 1) +#define PHY_0_INT_EN (1 << 0) //REG_C45_PACKET_GEN 0x8030 -#define CRC_ENABLE (1 << 6) -#define FRAME_COUNT_EN (1 << 5) -#define FORCE_BURST_STOP (1 << 4) -#define PACKET_GEN_EN (1 << 3) -#define PAYLOAD_TYPE (1 << 2) -#define PACKET_LENGTH (1 << 1) -#define ERROR_PACKET_INJECTION (1 << 0) +#define CRC_ENABLE (1 << 6) +#define FRAME_COUNT_EN (1 << 5) +#define FORCE_BURST_STOP (1 << 4) +#define PACKET_GEN_EN (1 << 3) +#define PAYLOAD_TYPE (1 << 2) +#define PACKET_LENGTH (1 << 1) +#define ERROR_PACKET_INJECTION (1 << 0) #endif /* _88E6071_REGISTERS_H_ */ diff --git a/firmware/ec/inc/devices/adt7481.h b/firmware/ec/inc/devices/adt7481.h index 413ef4c50f..83e69433b8 100644 --- a/firmware/ec/inc/devices/adt7481.h +++ b/firmware/ec/inc/devices/adt7481.h @@ -25,7 +25,7 @@ * to be in extended region(-64°C to +191°C) otherwise 0 if temperature region * is in normal range(0°C to +127°C). */ -#define ADT7481_EXTENDED_FLAG 1 +#define ADT7481_EXTENDED_FLAG 1 /* * 7 - (Mask) - Setting this bit to 1 masks all ALERTs on the ALERT pin. @@ -51,7 +51,8 @@ * 0 - (Mask R2) - 0 - Setting this bit to 1 masks ALERTs due to the Remote 2 * temperature exceeding a programmed limit. Default = 0. */ -#define ADT7481_CONFIGURATION_REG_VALUE (ADT7481_EXTENDED_FLAG << 2) /* Set/Clear Only Temp Range bit */ +#define ADT7481_CONFIGURATION_REG_VALUE \ + (ADT7481_EXTENDED_FLAG << 2) /* Set/Clear Only Temp Range bit */ /* * 7 - (Averaging) - Setting this bit to 1 disables averaging of the @@ -81,11 +82,12 @@ * 1010 = 64 15.5 m * 1011 = Continuous Measurements 73 m (Averaging Enabled) */ -#define ADT7481_CONVERSION_RATE_REG_VALUE 0x07 /* Set conversion rate to 125ms(default) */ +#define ADT7481_CONVERSION_RATE_REG_VALUE \ + 0x07 /* Set conversion rate to 125ms(default) */ /* ADT7481 Manufacturer Id and Device Id */ -#define TEMP_ADT7481_MANF_ID 0x41 -#define TEMP_ADT7481_DEV_ID 0x81 +#define TEMP_ADT7481_MANF_ID 0x41 +#define TEMP_ADT7481_DEV_ID 0x81 /* * Enumeration of Temperature limit registers @@ -99,71 +101,71 @@ typedef enum { /***************************************************************************** * FUNCTION DECLARATIONS *****************************************************************************/ -ReturnStatus adt7481_get_dev_id(const I2C_Dev *i2c_dev, - uint8_t *devID); -ReturnStatus adt7481_get_mfg_id(const I2C_Dev *i2c_dev, - uint8_t *mfgID); -ePostCode adt7481_probe(const I2C_Dev *i2c_dev, - POSTData *postData); -ReturnStatus adt7481_get_config1(const I2C_Dev *i2c_dev, - uint8_t *configValue); -ReturnStatus adt7481_set_config1(const I2C_Dev *i2c_dev, - uint8_t configValue); + +ReturnStatus adt7481_get_dev_id(const I2C_Dev *i2c_dev, uint8_t *devID); +ReturnStatus adt7481_get_mfg_id(const I2C_Dev *i2c_dev, uint8_t *mfgID); +ePostCode adt7481_probe(const I2C_Dev *i2c_dev, POSTData *postData); +ReturnStatus adt7481_get_config1(const I2C_Dev *i2c_dev, uint8_t *configValue); +ReturnStatus adt7481_set_config1(const I2C_Dev *i2c_dev, uint8_t configValue); ReturnStatus adt7481_get_conv_rate(const I2C_Dev *i2c_dev, uint8_t *convRateValue); ReturnStatus adt7481_set_conv_rate(const I2C_Dev *i2c_dev, uint8_t convRateValue); -ReturnStatus adt7481_get_status1(const I2C_Dev *i2c_dev, - uint8_t *statusValue); -ReturnStatus adt7481_get_status2(const I2C_Dev *i2c_dev, - uint8_t *statusValue); +ReturnStatus adt7481_get_status1(const I2C_Dev *i2c_dev, uint8_t *statusValue); +ReturnStatus adt7481_get_status2(const I2C_Dev *i2c_dev, uint8_t *statusValue); ReturnStatus adt7481_get_local_temp_val(const I2C_Dev *i2c_dev, int16_t *tempValue); ReturnStatus adt7481_get_remote1_temp_val(const I2C_Dev *i2c_dev, int16_t *tempValue); ReturnStatus adt7481_get_remote2_temp_val(const I2C_Dev *i2c_dev, int8_t *tempValue); -ReturnStatus adt7481_get_local_temp_limit(const I2C_Dev *i2c_dev, - eTempSensorADT7481ConfigParamsId limitToConfig, - int16_t* tempLimitValue); -ReturnStatus adt7481_set_local_temp_limit(const I2C_Dev *i2c_dev, - eTempSensorADT7481ConfigParamsId limitToConfig, - int16_t tempLimitValue); +ReturnStatus +adt7481_get_local_temp_limit(const I2C_Dev *i2c_dev, + eTempSensorADT7481ConfigParamsId limitToConfig, + int16_t *tempLimitValue); +ReturnStatus +adt7481_set_local_temp_limit(const I2C_Dev *i2c_dev, + eTempSensorADT7481ConfigParamsId limitToConfig, + int16_t tempLimitValue); ReturnStatus adt7481_get_remote2_temp_low_limit(const I2C_Dev *i2c_dev, - int8_t* tempLimitValue); + int8_t *tempLimitValue); ReturnStatus adt7481_get_remote2_temp_high_limit(const I2C_Dev *i2c_dev, - int8_t* tempLimitValue); + int8_t *tempLimitValue); ReturnStatus adt7481_get_remote2_temp_therm_limit(const I2C_Dev *i2c_dev, - int8_t* tempLimitValue); -ReturnStatus adt7481_get_remote1_temp_limit(const I2C_Dev *i2c_dev, - eTempSensorADT7481ConfigParamsId limitToConfig, - int8_t* tempLimitValue); + int8_t *tempLimitValue); +ReturnStatus +adt7481_get_remote1_temp_limit(const I2C_Dev *i2c_dev, + eTempSensorADT7481ConfigParamsId limitToConfig, + int8_t *tempLimitValue); ReturnStatus adt7481_set_remote2_temp_low_limit(const I2C_Dev *i2c_dev, int8_t tempLimitValue); ReturnStatus adt7481_set_remote2_temp_high_limit(const I2C_Dev *i2c_dev, int8_t tempLimitValue); ReturnStatus adt7481_set_remote2_temp_therm_limit(const I2C_Dev *i2c_dev, int8_t tempLimitValue); -ReturnStatus adt7481_set_remote1_temp_limit(const I2C_Dev *i2c_dev, - eTempSensorADT7481ConfigParamsId limitToConfig, - int8_t tempLimitValue); -ReturnStatus adt7481_get_remote2_temp_limit(const I2C_Dev *i2c_dev, - eTempSensorADT7481ConfigParamsId limitToConfig, - int8_t* tempLimitValue); -ReturnStatus adt7481_set_remote2_temp_limit(const I2C_Dev *i2c_dev, - eTempSensorADT7481ConfigParamsId limitToConfig, - int8_t tempLimitValue); +ReturnStatus +adt7481_set_remote1_temp_limit(const I2C_Dev *i2c_dev, + eTempSensorADT7481ConfigParamsId limitToConfig, + int8_t tempLimitValue); +ReturnStatus +adt7481_get_remote2_temp_limit(const I2C_Dev *i2c_dev, + eTempSensorADT7481ConfigParamsId limitToConfig, + int8_t *tempLimitValue); +ReturnStatus +adt7481_set_remote2_temp_limit(const I2C_Dev *i2c_dev, + eTempSensorADT7481ConfigParamsId limitToConfig, + int8_t tempLimitValue); ReturnStatus adt7481_get_remote1_temp_offset(const I2C_Dev *i2c_dev, - int16_t* tempOffsetValue); + int16_t *tempOffsetValue); ReturnStatus adt7481_set_remote1_temp_offset(const I2C_Dev *i2c_dev, int16_t tempOffsetValue); ReturnStatus adt7481_get_remote2_temp_offset(const I2C_Dev *i2c_dev, - int16_t* tempOffsetValue); + int16_t *tempOffsetValue); ReturnStatus adt7481_set_remote2_temp_offset(const I2C_Dev *i2c_dev, int8_t tempOffsetValue); ReturnStatus adt7481_get_therm_hysteresis(const I2C_Dev *i2c_dev, - int8_t* tempHysteresisValue); + int8_t *tempHysteresisValue); ReturnStatus adt7481_set_therm_hysteresis(const I2C_Dev *i2c_dev, int8_t tempHysteresisValue); diff --git a/firmware/ec/inc/devices/debug_ocgpio.h b/firmware/ec/inc/devices/debug_ocgpio.h index cbc18a848c..4af18a2f3f 100644 --- a/firmware/ec/inc/devices/debug_ocgpio.h +++ b/firmware/ec/inc/devices/debug_ocgpio.h @@ -11,14 +11,14 @@ #include "drivers/OcGpio.h" -typedef struct __attribute__ ((packed, aligned(1))) { - uint8_t pin; - uint8_t value; -}S_OCGPIO; +typedef struct __attribute__((packed, aligned(1))) { + uint8_t pin; + uint8_t value; +} S_OCGPIO; typedef struct S_OCGPIO_Cfg { - OcGpio_Port* port; + OcGpio_Port *port; unsigned int group; -}S_OCGPIO_Cfg; +} S_OCGPIO_Cfg; #endif /* _OC_GPIO_H_ */ diff --git a/firmware/ec/inc/devices/debug_oci2c.h b/firmware/ec/inc/devices/debug_oci2c.h index af8b686efc..972beef71e 100644 --- a/firmware/ec/inc/devices/debug_oci2c.h +++ b/firmware/ec/inc/devices/debug_oci2c.h @@ -11,15 +11,15 @@ #include -typedef struct __attribute__ ((packed, aligned(1))){ - uint8_t slaveAddress; - uint8_t number_of_bytes; - uint8_t reg_address; - uint16_t reg_value; -}S_OCI2C; +typedef struct __attribute__((packed, aligned(1))) { + uint8_t slaveAddress; + uint8_t number_of_bytes; + uint8_t reg_address; + uint16_t reg_value; +} S_OCI2C; typedef struct S_I2C_Cfg { unsigned int bus; -}S_I2C_Cfg; +} S_I2C_Cfg; #endif /* INC_DEVICES_OC_I2C_H_ */ diff --git a/firmware/ec/inc/devices/debug_ocmdio.h b/firmware/ec/inc/devices/debug_ocmdio.h index acd1af7c3a..37a279a3f6 100644 --- a/firmware/ec/inc/devices/debug_ocmdio.h +++ b/firmware/ec/inc/devices/debug_ocmdio.h @@ -11,13 +11,13 @@ #include -typedef struct __attribute__ ((packed, aligned(1))){ - uint16_t reg_address; - uint16_t reg_value; -}S_OCMDIO; +typedef struct __attribute__((packed, aligned(1))) { + uint16_t reg_address; + uint16_t reg_value; +} S_OCMDIO; typedef struct S_MDIO_Cfg { unsigned int port; -}S_MDIO_Cfg; +} S_MDIO_Cfg; #endif /* INC_DEVICES_OC_MDIO_H_ */ diff --git a/firmware/ec/inc/devices/eeprom.h b/firmware/ec/inc/devices/eeprom.h index 4cf7d47ab1..99e04ed7b2 100644 --- a/firmware/ec/inc/devices/eeprom.h +++ b/firmware/ec/inc/devices/eeprom.h @@ -19,19 +19,19 @@ /***************************************************************************** * MACRO DEFINITIONS *****************************************************************************/ -#define OC_TEST_ADDRESS 0xFFFF -#define OC_CONNECT1_SERIAL_INFO 0x01C6 -#define OC_CONNECT1_SERIAL_SIZE 0x12 -#define OC_GBC_BOARD_INFO 0x01AC -#define OC_GBC_BOARD_INFO_SIZE 0x12 -#define OC_GBC_DEVICE_INFO 0x0100 /*TODO: Update offsets*/ -#define OC_SDR_BOARD_INFO 0x01AC -#define OC_SDR_BOARD_INFO_SIZE 0x12 -#define OC_SDR_DEVICE_INFO 0x0100 /*TODO: Update offsets*/ -#define OC_RFFE_BOARD_INFO 0x01AC -#define OC_RFFE_BOARD_INFO_SIZE 0x11 -#define OC_RFFE_DEVICE_INFO 0x0100 /*TODO: Update offsets*/ -#define OC_DEVICE_INFO_SIZE 0x0A +#define OC_TEST_ADDRESS 0xFFFF +#define OC_CONNECT1_SERIAL_INFO 0x01C6 +#define OC_CONNECT1_SERIAL_SIZE 0x12 +#define OC_GBC_BOARD_INFO 0x01AC +#define OC_GBC_BOARD_INFO_SIZE 0x12 +#define OC_GBC_DEVICE_INFO 0x0100 /*TODO: Update offsets*/ +#define OC_SDR_BOARD_INFO 0x01AC +#define OC_SDR_BOARD_INFO_SIZE 0x12 +#define OC_SDR_DEVICE_INFO 0x0100 /*TODO: Update offsets*/ +#define OC_RFFE_BOARD_INFO 0x01AC +#define OC_RFFE_BOARD_INFO_SIZE 0x11 +#define OC_RFFE_DEVICE_INFO 0x0100 /*TODO: Update offsets*/ +#define OC_DEVICE_INFO_SIZE 0x0A /***************************************************************************** * STRUCT DEFINITIONS @@ -62,31 +62,25 @@ typedef enum { *****************************************************************************/ bool eeprom_init(Eeprom_Cfg *cfg); -ReturnStatus eeprom_read(const Eeprom_Cfg *cfg, - uint16_t address, - void *buffer, +ReturnStatus eeprom_read(const Eeprom_Cfg *cfg, uint16_t address, void *buffer, size_t size); -ReturnStatus eeprom_write(const Eeprom_Cfg *cfg, - uint16_t address, - const void *buffer, - size_t size); +ReturnStatus eeprom_write(const Eeprom_Cfg *cfg, uint16_t address, + const void *buffer, size_t size); ReturnStatus eeprom_disable_write(Eeprom_Cfg *cfg); ReturnStatus eeprom_enable_write(Eeprom_Cfg *cfg); -ReturnStatus eeprom_read_oc_info(uint8_t * oc_serial); +ReturnStatus eeprom_read_oc_info(uint8_t *oc_serial); -ReturnStatus eeprom_read_board_info(const Eeprom_Cfg *cfg, - uint8_t * rom_info); +ReturnStatus eeprom_read_board_info(const Eeprom_Cfg *cfg, uint8_t *rom_info); ReturnStatus eeprom_read_device_info_record(const Eeprom_Cfg *cfg, uint8_t recordNo, - char * device_info); + char *device_info); -ReturnStatus eeprom_write_device_info_record(Eeprom_Cfg *cfg, - uint8_t recordNo, - char * device_info); +ReturnStatus eeprom_write_device_info_record(Eeprom_Cfg *cfg, uint8_t recordNo, + char *device_info); #endif /* EEPROM_H_ */ diff --git a/firmware/ec/inc/devices/eth_sw.h b/firmware/ec/inc/devices/eth_sw.h index 8c3b4b893d..49e341ffae 100644 --- a/firmware/ec/inc/devices/eth_sw.h +++ b/firmware/ec/inc/devices/eth_sw.h @@ -19,59 +19,52 @@ /***************************************************************************** * MACRO DEFINITIONS *****************************************************************************/ -#define ETH_SW_PRODUCT_ID 0x0071 -#define PHY_IDENTIFIER 0x0141 +#define ETH_SW_PRODUCT_ID 0x0071 +#define PHY_IDENTIFIER 0x0141 -#define DEFAULT_PHY_INTS (PHY_4_INT_EN | PHY_3_INT_EN | PHY_2_INT_EN |PHY_1_INT_EN | PHY_0_INT_EN) -#define DEFUALT_INT (LINK_CHANGE_INT_EN) +#define DEFAULT_PHY_INTS \ + (PHY_4_INT_EN | PHY_3_INT_EN | PHY_2_INT_EN | PHY_1_INT_EN | PHY_0_INT_EN) +#define DEFUALT_INT (LINK_CHANGE_INT_EN) /* * MDC MDIO definitions */ -#define NO_CPU_MODE 1 -#define CPU_MODE 0 +#define NO_CPU_MODE 1 +#define CPU_MODE 0 //#define ETH_SW_ADDR -#define MDIO_PORT GPIO_PORTC_BASE -#define MDC_PIN GPIO_PIN_6 -#define MDIO_PIN GPIO_PIN_7 +#define MDIO_PORT GPIO_PORTC_BASE +#define MDC_PIN GPIO_PIN_6 +#define MDIO_PIN GPIO_PIN_7 -#define LAN_MUX_SELECT_PORT GPIO_PORTN_BASE -#define LAN_MUX_SELECT_PIN GPIO_PIN_1 +#define LAN_MUX_SELECT_PORT GPIO_PORTN_BASE +#define LAN_MUX_SELECT_PIN GPIO_PIN_1 -#define ETH_SW_DEV_SERIAL_NO 1 -#define IPPARAMS 4 +#define ETH_SW_DEV_SERIAL_NO 1 +#define IPPARAMS 4 /* * Ethernet Components ID. This is the part of the OCMPMsg in componentID field. */ typedef enum { - ETH_COMP_ALL = 0x0, - PORT_0, // PORT# 0 + ETH_COMP_ALL = 0x0, + PORT_0, // PORT# 0 PORT_1, PORT_2, PORT_3, PORT_4, - ETH_COMPONENT_MAX // Limiter + ETH_COMPONENT_MAX // Limiter } e_ethernet_component_ID; typedef enum { - PORT0=0, + PORT0 = 0, PORT1, PORT2, PORT3, PORT4, -}Eth_Sw_Port; +} Eth_Sw_Port; -typedef enum { - SPEED_10M = 0, - SPEED_100M, - SPEED_AUTONEG -} port_speed; +typedef enum { SPEED_10M = 0, SPEED_100M, SPEED_AUTONEG } port_speed; -typedef enum { - HALF_DUPLEX = 0, - FULL_DUPLEX, - DUPLEX_AUTONEG -} port_duplex; +typedef enum { HALF_DUPLEX = 0, FULL_DUPLEX, DUPLEX_AUTONEG } port_duplex; typedef enum Eth_Sw_Status { ETH_SW_STATUS_SPEED = 0x00, @@ -97,16 +90,16 @@ typedef enum Eth_Sw_Config { typedef enum Eth_Sw_Alert { ETH_ALERT_SPEED_CHANGE = 0x01, ETH_ALERT_DUPLEX_CHANGE = 0x02, - ETH_ALERT_AUTONEG_DONE=0x04, - ETH_ALERT_LINK_CHANGE=0x08, - ETH_ALERT_CROSSOVER_DET=0x10, - ETH_ALERT_ENERGY_DET=0x20, - ETH_ALERT_POLARITY_DET=0x040, - ETH_ALERT_JABBER_DET=0x80 + ETH_ALERT_AUTONEG_DONE = 0x04, + ETH_ALERT_LINK_CHANGE = 0x08, + ETH_ALERT_CROSSOVER_DET = 0x10, + ETH_ALERT_ENERGY_DET = 0x20, + ETH_ALERT_POLARITY_DET = 0x040, + ETH_ALERT_JABBER_DET = 0x80 } Eth_Sw_Alert; typedef enum { - ETH_EVT_SPEED =0x00, + ETH_EVT_SPEED = 0x00, ETH_EVT_DUPLEX, ETH_EVT_AUTONEG, ETH_EVT_LINK, @@ -114,11 +107,10 @@ typedef enum { ETH_EVT_ENERGY, ETH_EVT_POLARITY, ETH_EVT_JABBER, -}Eth_Sw_Events; +} Eth_Sw_Events; - -typedef void (*Eth_Sw_CallbackFn) (Eth_Sw_Events evt, int16_t value, - void *context); +typedef void (*Eth_Sw_CallbackFn)(Eth_Sw_Events evt, int16_t value, + void *context); typedef struct Eth_Sw_Obj { Eth_Sw_CallbackFn alert_cb; @@ -130,7 +122,7 @@ typedef struct Eth_Sw_Dev { } Eth_Sw_Dev; typedef struct Eth_Sw_Cfg { - OcGpio_Pin* pin_evt; + OcGpio_Pin *pin_evt; Eth_Sw_Dev eth_switch; OcGpio_Pin pin_ec_ethsw_reset; } Eth_Sw_Cfg; @@ -143,17 +135,17 @@ typedef struct Eth_cfg { typedef struct Eth_LoopBack_Params { uint8_t loopBackType; -}Eth_LoopBack_Params; +} Eth_LoopBack_Params; typedef struct Eth_PacketGen_Params { uint16_t reg_value; -}Eth_PacketGen_Params; +} Eth_PacketGen_Params; typedef struct Eth_TcpClient_Params { uint8_t ipAddress[IPPARAMS]; uint16_t tcpPort; uint8_t repeat; -}Eth_TcpClient_Params; +} Eth_TcpClient_Params; ePostCode eth_sw_probe(); ePostCode eth_sw_init(); @@ -162,28 +154,34 @@ ReturnStatus get_interrupt(uint8_t port); ReturnStatus eth_sw_get_status_speed(uint8_t port, port_speed *speed); ReturnStatus eth_sw_get_status_duplex(uint8_t port, port_duplex *duplex); ReturnStatus eth_sw_get_status_auto_neg(uint8_t port, port_duplex *autoneg_on); -ReturnStatus eth_sw_get_status_sleep_mode(uint8_t port, port_duplex *sleep_mode_en); -ReturnStatus eth_sw_get_status_auto_neg_complete(uint8_t port, port_duplex *autoneg_complete); +ReturnStatus eth_sw_get_status_sleep_mode(uint8_t port, + port_duplex *sleep_mode_en); +ReturnStatus eth_sw_get_status_auto_neg_complete(uint8_t port, + port_duplex *autoneg_complete); ReturnStatus eth_sw_get_status_link_up(uint8_t port, port_duplex *link_up); ReturnStatus restart_autoneg(uint8_t port); ReturnStatus eth_sw_set_config_speed(uint8_t port, port_speed speed); ReturnStatus eth_sw_set_config_duplex(uint8_t port, port_duplex duplex); -ReturnStatus eth_sw_set_config_power_down(uint8_t port,uint8_t power_down); -ReturnStatus eth_sw_set_config_sleep_mode_enable(uint8_t port,uint8_t sleep_mode_en); +ReturnStatus eth_sw_set_config_power_down(uint8_t port, uint8_t power_down); +ReturnStatus eth_sw_set_config_sleep_mode_enable(uint8_t port, + uint8_t sleep_mode_en); ReturnStatus eth_sw_set_config_restart_neg(uint8_t port); -ReturnStatus eth_sw_set_config_interrupt_enable(uint8_t port, uint8_t *interrupt_mask); +ReturnStatus eth_sw_set_config_interrupt_enable(uint8_t port, + uint8_t *interrupt_mask); ReturnStatus eth_sw_set_config_soft_reset(uint8_t port); -ReturnStatus eth_sw_get_config_speed(uint8_t port, port_speed* speed); -ReturnStatus eth_sw_get_config_duplex(uint8_t port, port_duplex* duplex); -ReturnStatus eth_sw_get_config_power_down(uint8_t port, uint8_t* power_dwn); -ReturnStatus eth_sw_get_config_sleep_mode(uint8_t port, uint8_t* sleep_mode); -ReturnStatus eth_sw_get_config_interrupt_enable(uint8_t port, uint8_t* interrupt_enb); +ReturnStatus eth_sw_get_config_speed(uint8_t port, port_speed *speed); +ReturnStatus eth_sw_get_config_duplex(uint8_t port, port_duplex *duplex); +ReturnStatus eth_sw_get_config_power_down(uint8_t port, uint8_t *power_dwn); +ReturnStatus eth_sw_get_config_sleep_mode(uint8_t port, uint8_t *sleep_mode); +ReturnStatus eth_sw_get_config_interrupt_enable(uint8_t port, + uint8_t *interrupt_enb); ReturnStatus eth_sw_enable_loopback(void *driver, void *params); ReturnStatus eth_sw_disable_loopback(void *driver, void *params); ReturnStatus eth_sw_enable_macloopback(uint8_t port); ReturnStatus eth_sw_disable_macloopback(uint8_t port); ReturnStatus eth_sw_enable_packet_gen(void *driver, void *params); ReturnStatus eth_sw_disable_packet_gen(void *driver); -void eth_sw_setAlertHandler(Eth_cfg *ethCfg, Eth_Sw_CallbackFn alert_cb, void *cb_context); +void eth_sw_setAlertHandler(Eth_cfg *ethCfg, Eth_Sw_CallbackFn alert_cb, + void *cb_context); #endif /* INC_DEVICES_ETH_SW_H_ */ diff --git a/firmware/ec/inc/devices/ext_battery.h b/firmware/ec/inc/devices/ext_battery.h index 6dd6a6781f..06112461cd 100644 --- a/firmware/ec/inc/devices/ext_battery.h +++ b/firmware/ec/inc/devices/ext_battery.h @@ -12,27 +12,27 @@ /***************************************************************************** * MACRO DEFINITIONS *****************************************************************************/ -#define PWR_LEAD_ACID_BATT_DEV_TEMP_SENS_ADDR 0x18 +#define PWR_LEAD_ACID_BATT_DEV_TEMP_SENS_ADDR 0x18 -#define PWR_EXT_BATT_RSNSB 3 //milli ohms -#define PWR_EXT_BATT_RSNSI 2 //milli ohms +#define PWR_EXT_BATT_RSNSB 3 //milli ohms +#define PWR_EXT_BATT_RSNSI 2 //milli ohms /* * External Battery Temperature sensors Low, High and Critical Temeprature Alert Limits */ -#define PWR_EXT_BATT_TEMP_LOW_LIMIT -20 //(in Celcius) -#define PWR_EXT_BATT_TEMP_HIGH_LIMIT 75 //(in Celcius) -#define PWR_EXT_BATT_TEMP_CRITICAL_LIMIT 80 //(in Celcius) -#define PWR_EXT_BATT_DIE_TEMP_LIMIT 60 +#define PWR_EXT_BATT_TEMP_LOW_LIMIT -20 //(in Celcius) +#define PWR_EXT_BATT_TEMP_HIGH_LIMIT 75 //(in Celcius) +#define PWR_EXT_BATT_TEMP_CRITICAL_LIMIT 80 //(in Celcius) +#define PWR_EXT_BATT_DIE_TEMP_LIMIT 60 /* Config parameters for External battery charger */ -#define PWR_EXTBATT_ICHARGE_VAL 10660 //milliAmps -#define PWR_EXTBATT_VCHARGE_VAL 12000 //milliVolts -#define PWR_EXTBATT_UNDERVOLTAGE_VAL 9500 //milliVolts -#define PWR_EXTBATT_OVERVOLTAGE_VAL 13800 //milliVolts -#define PWR_EXTBATT_INPUTBATTUNDERVOLATGE_VAL 16200 //milliVolts -#define PWR_EXTBATT_INPUTHICURRENT_VAL 17000 //milliAmps -#define PWR_EXTBATT_LOWBATTCURRENT_VAL 100 //milliAmps -#define PWR_EXTBATT_INPUTCURRENTLIMIT_VAL 16500 //milliAmps +#define PWR_EXTBATT_ICHARGE_VAL 10660 //milliAmps +#define PWR_EXTBATT_VCHARGE_VAL 12000 //milliVolts +#define PWR_EXTBATT_UNDERVOLTAGE_VAL 9500 //milliVolts +#define PWR_EXTBATT_OVERVOLTAGE_VAL 13800 //milliVolts +#define PWR_EXTBATT_INPUTBATTUNDERVOLATGE_VAL 16200 //milliVolts +#define PWR_EXTBATT_INPUTHICURRENT_VAL 17000 //milliAmps +#define PWR_EXTBATT_LOWBATTCURRENT_VAL 100 //milliAmps +#define PWR_EXTBATT_INPUTCURRENTLIMIT_VAL 16500 //milliAmps #endif /* EXT_BATTERY_H_ */ diff --git a/firmware/ec/inc/devices/ina226.h b/firmware/ec/inc/devices/ina226.h index 13c03be6fe..fa42eee110 100644 --- a/firmware/ec/inc/devices/ina226.h +++ b/firmware/ec/inc/devices/ina226.h @@ -21,25 +21,30 @@ *****************************************************************************/ /* Mask/Enable Register Bits */ #define INA_ALERT_EN_MASK 0xF800 /* Upper 5 bits are the enable bits */ -#define INA_MSK_SOL (1 << 15) /* Shunt over-voltage */ -#define INA_MSK_SUL (1 << 14) /* Shunt under-voltage */ -#define INA_MSK_BOL (1 << 13) /* Bus over-voltage */ -#define INA_MSK_BUL (1 << 12) /* Bus under-voltage */ -#define INA_MSK_POL (1 << 11) /* Power over limit */ -#define INA_MSK_CNVR (1 << 10) /* Conversion ready - enable alert when +#define INA_MSK_SOL (1 << 15) /* Shunt over-voltage */ +#define INA_MSK_SUL (1 << 14) /* Shunt under-voltage */ +#define INA_MSK_BOL (1 << 13) /* Bus over-voltage */ +#define INA_MSK_BUL (1 << 12) /* Bus under-voltage */ +#define INA_MSK_POL (1 << 11) /* Power over limit */ +#define INA_MSK_CNVR \ + (1 << 10) /* Conversion ready - enable alert when * CVRF is set (ready for next conversion) */ -#define INA_MSK_AFF (1 << 4) /* Alert Function Flag (caused by alert) +#define INA_MSK_AFF \ + (1 << 4) /* Alert Function Flag (caused by alert) * In latch mode, cleared on mask read */ -#define INA_MSK_CVRF (1 << 3) /* Conversion Ready Flag, cleared when +#define INA_MSK_CVRF \ + (1 << 3) /* Conversion Ready Flag, cleared when * writing to cfg reg or mask read */ -#define INA_MSK_OVF (1 << 2) /* Math Overflow Flag (data may be invalid) */ -#define INA_MSK_APOL (1 << 1) /* Alert Polarity (1 = invert, active high) */ -#define INA_MSK_LEN (1 << 0) /* Alert Latch Enable +#define INA_MSK_OVF (1 << 2) /* Math Overflow Flag (data may be invalid) */ +#define INA_MSK_APOL (1 << 1) /* Alert Polarity (1 = invert, active high) */ +#define INA_MSK_LEN \ + (1 << 0) /* Alert Latch Enable * 1 Latch (alert only cleared by read to msk) * 0 Transparent (auto-clear on fault clear) */ -#define INA_HYSTERESIS 30 /* 30mA TODO: need to make more robust, maybe percentage based */ +#define INA_HYSTERESIS \ + 30 /* 30mA TODO: need to make more robust, maybe percentage based */ /***************************************************************************** * STRUCT/ENUM DEFINITIONS @@ -56,8 +61,8 @@ typedef enum INA226_Event { INA226_EVT_CUL, /* Current under limit - based on SUL */ } INA226_Event; -typedef void (*INA226_CallbackFn) (INA226_Event evt, uint16_t value, - void *context); +typedef void (*INA226_CallbackFn)(INA226_Event evt, uint16_t value, + void *context); typedef struct INA226_Cfg { I2C_Dev dev; @@ -78,13 +83,12 @@ typedef struct INA226_Dev { /***************************************************************************** * FUNCTION DECLARATIONS *****************************************************************************/ -ReturnStatus ina226_readCurrentLim(INA226_Dev *dev, uint16_t* currLimit); +ReturnStatus ina226_readCurrentLim(INA226_Dev *dev, uint16_t *currLimit); ReturnStatus ina226_setCurrentLim(INA226_Dev *dev, uint16_t currLimit); -ReturnStatus ina226_readBusVoltage(INA226_Dev *dev, uint16_t* busVoltValue); -ReturnStatus ina226_readShuntVoltage(INA226_Dev *dev, - uint16_t* shuntVoltValue); -ReturnStatus ina226_readCurrent(INA226_Dev *dev, uint16_t* currValue); -ReturnStatus ina226_readPower(INA226_Dev *dev, uint16_t* powValue); +ReturnStatus ina226_readBusVoltage(INA226_Dev *dev, uint16_t *busVoltValue); +ReturnStatus ina226_readShuntVoltage(INA226_Dev *dev, uint16_t *shuntVoltValue); +ReturnStatus ina226_readCurrent(INA226_Dev *dev, uint16_t *currValue); +ReturnStatus ina226_readPower(INA226_Dev *dev, uint16_t *powValue); ReturnStatus ina226_init(INA226_Dev *dev); void ina226_setAlertHandler(INA226_Dev *dev, INA226_CallbackFn alert_cb, void *cb_context); diff --git a/firmware/ec/inc/devices/int_battery.h b/firmware/ec/inc/devices/int_battery.h index 16926ebc29..74dc5cb743 100644 --- a/firmware/ec/inc/devices/int_battery.h +++ b/firmware/ec/inc/devices/int_battery.h @@ -12,15 +12,15 @@ /***************************************************************************** * MACRO DEFINITIONS *****************************************************************************/ -#define PWR_INT_BATT_RSNSB 30 //milli ohms -#define PWR_INT_BATT_RSNSI 7 //milli ohms +#define PWR_INT_BATT_RSNSB 30 //milli ohms +#define PWR_INT_BATT_RSNSI 7 //milli ohms /* Config parameters for Internal battery charger */ -#define PWR_INTBATT_UNDERVOLTAGE_VAL 9000 //milliVolts -#define PWR_INTBATT_OVERVOLTAGE_VAL 12600 //milliVolts -#define PWR_INTBATT_INPUTUNDERVOLATGE_VAL 16200 //milliVolts -#define PWR_INTBATT_INPUTOVERCURRENT_VAL 5000 //milliAmps -#define PWR_INTBATT_LOWBATTERYCURRENT_VAL 100 //milliAmps -#define PWR_INTBATT_INPUTCURRENTLIMIT_VAL 5570 //milliAmps +#define PWR_INTBATT_UNDERVOLTAGE_VAL 9000 //milliVolts +#define PWR_INTBATT_OVERVOLTAGE_VAL 12600 //milliVolts +#define PWR_INTBATT_INPUTUNDERVOLATGE_VAL 16200 //milliVolts +#define PWR_INTBATT_INPUTOVERCURRENT_VAL 5000 //milliAmps +#define PWR_INTBATT_LOWBATTERYCURRENT_VAL 100 //milliAmps +#define PWR_INTBATT_INPUTCURRENTLIMIT_VAL 5570 //milliAmps #endif /* INT_BATTERY_H_ */ diff --git a/firmware/ec/inc/devices/led.h b/firmware/ec/inc/devices/led.h index 91fa76c151..4813200c61 100644 --- a/firmware/ec/inc/devices/led.h +++ b/firmware/ec/inc/devices/led.h @@ -22,34 +22,30 @@ /***************************************************************************** * MACRO DEFINITIONS *****************************************************************************/ -#define LED_OFF 0xFF +#define LED_OFF 0xFF /* ClkX = fOSC/(2^(RegMisc[6:4]-1); 0x50-125kHz, 0x40-250KHz, 0x30-500KHz, * 0x20-1MHz, 0x10-2MHz; Fading - Linear */ -#define REG_MISC_VALUE 0x24 +#define REG_MISC_VALUE 0x24 /* 4:0 => ON Time of IO[X]; If 0 : TOnX = Infinite; * 1 - 15 : TOnX = 64 * RegTOnX * (255/ClkX); * 16 - 31 : TOnX = 512 * RegTOnX * (255/ClkX) */ -#define REG_T_ON_VALUE 0x10 +#define REG_T_ON_VALUE 0x10 /* 7:3 - OFF Time of IO[X]; If 0 : TOffX = Infinite; * 1 - 15 : TOffX = 64 * RegOffX[7:3] * (255/ClkX); * 16 - 31 : TOffX = 512 * RegOffX[ 7:3] * (255/ClkX) */ /* 2:0 - OFF Intensity of IO[X] = >Linear mode : IOffX = 4 x RegOff[2:0] */ -#define REG_OFF_VALUE 0x80 +#define REG_OFF_VALUE 0x80 -#define HCI_LED_TOTAL_NOS 14 +#define HCI_LED_TOTAL_NOS 14 /***************************************************************************** * STRUCT/ENUM DEFINITIONS *****************************************************************************/ /* LED Test Params */ -typedef enum { - HCI_LED_OFF = 0, - HCI_LED_RED, - HCI_LED_GREEN -} ledTestParam; +typedef enum { HCI_LED_OFF = 0, HCI_LED_RED, HCI_LED_GREEN } ledTestParam; typedef enum { HCI_LED_1 = 0, @@ -86,6 +82,6 @@ ReturnStatus hci_led_turnon_red(const HciLedCfg *driver); ReturnStatus hci_led_turnoff_all(const HciLedCfg *driver); ReturnStatus hci_led_system_boot(const HciLedCfg *driver); ReturnStatus led_init(const HciLedCfg *driver); -ePostCode led_probe(const HciLedCfg *driver,POSTData* postData); +ePostCode led_probe(const HciLedCfg *driver, POSTData *postData); #endif /* INA226_H_ */ diff --git a/firmware/ec/inc/devices/ltc4015.h b/firmware/ec/inc/devices/ltc4015.h index ba41416402..c93aafe205 100644 --- a/firmware/ec/inc/devices/ltc4015.h +++ b/firmware/ec/inc/devices/ltc4015.h @@ -22,24 +22,25 @@ *****************************************************************************/ /* Mask/Enable Register Bits */ -#define LTC4015_ALERT_EN_MASK 0xFFFF /* Bits 15-0 are the enable bits(except bit 14) */ -#define LTC4015_MSK_MSRV (1 << 15) /* Measurement system results valid */ -#define LTC4015_MSK_QCL (1 << 13) /* QCOUNT Low alert */ -#define LTC4015_MSK_QCH (1 << 12) /* QCOUNT High alert */ -#define LTC4015_MSK_BVL (1 << 11) /* Battery voltage Low alert */ -#define LTC4015_MSK_BVH (1 << 10) /* Battery voltage High alert */ -#define LTC4015_MSK_IVL (1 << 9) /* Input voltage Low alert */ -#define LTC4015_MSK_IVH (1 << 8) /* Input voltage High alert */ -#define LTC4015_MSK_SVL (1 << 7) /* System voltage Low alert */ -#define LTC4015_MSK_SVH (1 << 6) /* System voltage High alert */ -#define LTC4015_MSK_ICH (1 << 5) /* Input current High alert */ -#define LTC4015_MSK_BCL (1 << 4) /* Battery current Low alert */ -#define LTC4015_MSK_DTH (1 << 3) /* Die temperature High alert */ -#define LTC4015_MSK_BSRH (1 << 2) /* BSR High alert */ -#define LTC4015_MSK_NTCH (1 << 1) /* NTC ratio High alert */ -#define LTC4015_MSK_NTCL (1 << 0) /* NTC ratio Low alert */ +#define LTC4015_ALERT_EN_MASK \ + 0xFFFF /* Bits 15-0 are the enable bits(except bit 14) */ +#define LTC4015_MSK_MSRV (1 << 15) /* Measurement system results valid */ +#define LTC4015_MSK_QCL (1 << 13) /* QCOUNT Low alert */ +#define LTC4015_MSK_QCH (1 << 12) /* QCOUNT High alert */ +#define LTC4015_MSK_BVL (1 << 11) /* Battery voltage Low alert */ +#define LTC4015_MSK_BVH (1 << 10) /* Battery voltage High alert */ +#define LTC4015_MSK_IVL (1 << 9) /* Input voltage Low alert */ +#define LTC4015_MSK_IVH (1 << 8) /* Input voltage High alert */ +#define LTC4015_MSK_SVL (1 << 7) /* System voltage Low alert */ +#define LTC4015_MSK_SVH (1 << 6) /* System voltage High alert */ +#define LTC4015_MSK_ICH (1 << 5) /* Input current High alert */ +#define LTC4015_MSK_BCL (1 << 4) /* Battery current Low alert */ +#define LTC4015_MSK_DTH (1 << 3) /* Die temperature High alert */ +#define LTC4015_MSK_BSRH (1 << 2) /* BSR High alert */ +#define LTC4015_MSK_NTCH (1 << 1) /* NTC ratio High alert */ +#define LTC4015_MSK_NTCL (1 << 0) /* NTC ratio Low alert */ -#define LTC4015_MSK_BMFA (1 << 1) /* Battery Missing Fault alert */ +#define LTC4015_MSK_BMFA (1 << 1) /* Battery Missing Fault alert */ #define LTC4015_CHARGER_ENABLED (1 << 13) @@ -58,17 +59,17 @@ typedef enum LTC4015_Chem { typedef enum LTC4015_Event { LTC4015_EVT_MSRV = LTC4015_MSK_MSRV, /* Measurement system results valid */ - LTC4015_EVT_QCL = LTC4015_MSK_QCL, /* QCOUNT Low alert */ - LTC4015_EVT_QCH = LTC4015_MSK_QCH, /* QCOUNT High alert */ - LTC4015_EVT_BVL = LTC4015_MSK_BVL, /* Battery voltage Low alert */ - LTC4015_EVT_BVH = LTC4015_MSK_BVH, /* Battery voltage High alert */ - LTC4015_EVT_IVL = LTC4015_MSK_IVL, /* Input voltage Low alert */ - LTC4015_EVT_IVH = LTC4015_MSK_IVH, /* Input voltage High alert */ - LTC4015_EVT_SVL = LTC4015_MSK_SVL, /* System voltage Low alert */ - LTC4015_EVT_SVH = LTC4015_MSK_SVH, /* System voltage High alert */ - LTC4015_EVT_ICH = LTC4015_MSK_ICH, /* Input current High alert */ - LTC4015_EVT_BCL = LTC4015_MSK_BCL, /* Battery current Low alert */ - LTC4015_EVT_DTH = LTC4015_MSK_DTH, /* Die temperature High alert */ + LTC4015_EVT_QCL = LTC4015_MSK_QCL, /* QCOUNT Low alert */ + LTC4015_EVT_QCH = LTC4015_MSK_QCH, /* QCOUNT High alert */ + LTC4015_EVT_BVL = LTC4015_MSK_BVL, /* Battery voltage Low alert */ + LTC4015_EVT_BVH = LTC4015_MSK_BVH, /* Battery voltage High alert */ + LTC4015_EVT_IVL = LTC4015_MSK_IVL, /* Input voltage Low alert */ + LTC4015_EVT_IVH = LTC4015_MSK_IVH, /* Input voltage High alert */ + LTC4015_EVT_SVL = LTC4015_MSK_SVL, /* System voltage Low alert */ + LTC4015_EVT_SVH = LTC4015_MSK_SVH, /* System voltage High alert */ + LTC4015_EVT_ICH = LTC4015_MSK_ICH, /* Input current High alert */ + LTC4015_EVT_BCL = LTC4015_MSK_BCL, /* Battery current Low alert */ + LTC4015_EVT_DTH = LTC4015_MSK_DTH, /* Die temperature High alert */ LTC4015_EVT_BSRH = LTC4015_MSK_BSRH, /* BSR High alert */ LTC4015_EVT_NTCL = LTC4015_MSK_NTCL, /* NTC ratio High alert */ LTC4015_EVT_NTCH = LTC4015_MSK_NTCH, /* NTC ratio Low alert */ @@ -76,14 +77,15 @@ typedef enum LTC4015_Event { LTC4015_EVT_BMFA = LTC4015_MSK_BMFA, /* Battery Missing Fault alert */ } LTC4015_Event; -typedef void (*LTC4015_CallbackFn) (LTC4015_Event evt, int16_t value, +typedef void (*LTC4015_CallbackFn)(LTC4015_Event evt, int16_t value, void *context); typedef struct LTC4015_HWCfg { I2C_Dev i2c_dev; /* TODO: this can be read from the IC itself */ - LTC4015_Chem chem; /* Battery chemistry we're controlling (verified during init) */ + LTC4015_Chem + chem; /* Battery chemistry we're controlling (verified during init) */ uint8_t r_snsb; /* Value of SNSB resistor in milli-ohms */ uint8_t r_snsi; /* Value of SNSI resistor in milli-ohms */ @@ -108,8 +110,7 @@ typedef struct LTC4015_Dev { /***************************************************************************** * FUNCTION DECLARATIONS *****************************************************************************/ -ReturnStatus LTC4015_cfg_icharge(LTC4015_Dev *dev, - uint16_t max_chargeCurrent); +ReturnStatus LTC4015_cfg_icharge(LTC4015_Dev *dev, uint16_t max_chargeCurrent); ReturnStatus LTC4015_get_cfg_icharge(LTC4015_Dev *dev, uint16_t *max_chargeCurrent); @@ -151,10 +152,10 @@ ReturnStatus LTC4015_get_cfg_battery_current_low(LTC4015_Dev *dev, int16_t *lowbattCurrent); ReturnStatus LTC4015_cfg_die_temperature_high(LTC4015_Dev *dev, - int16_t dieTemp); + int16_t dieTemp); ReturnStatus LTC4015_get_cfg_die_temperature_high(LTC4015_Dev *dev, - int16_t *dieTemp); + int16_t *dieTemp); ReturnStatus LTC4015_cfg_input_current_limit(LTC4015_Dev *dev, uint16_t inputCurrentLimit); @@ -162,34 +163,26 @@ ReturnStatus LTC4015_cfg_input_current_limit(LTC4015_Dev *dev, ReturnStatus LTC4015_get_cfg_input_current_limit(LTC4015_Dev *dev, uint16_t *currentLimit); -ReturnStatus LTC4015_get_die_temperature(LTC4015_Dev *dev, - int16_t *dieTemp); +ReturnStatus LTC4015_get_die_temperature(LTC4015_Dev *dev, int16_t *dieTemp); -ReturnStatus LTC4015_get_battery_current(LTC4015_Dev *dev, - int16_t *iBatt); +ReturnStatus LTC4015_get_battery_current(LTC4015_Dev *dev, int16_t *iBatt); -ReturnStatus LTC4015_get_input_current(LTC4015_Dev *dev, - int16_t *iIn); +ReturnStatus LTC4015_get_input_current(LTC4015_Dev *dev, int16_t *iIn); -ReturnStatus LTC4015_get_battery_voltage(LTC4015_Dev *dev, - int16_t *vbat); +ReturnStatus LTC4015_get_battery_voltage(LTC4015_Dev *dev, int16_t *vbat); -ReturnStatus LTC4015_get_input_voltage(LTC4015_Dev *dev, - int16_t *vIn); +ReturnStatus LTC4015_get_input_voltage(LTC4015_Dev *dev, int16_t *vIn); -ReturnStatus LTC4015_get_system_voltage(LTC4015_Dev *dev, - int16_t *vSys); +ReturnStatus LTC4015_get_system_voltage(LTC4015_Dev *dev, int16_t *vSys); -ReturnStatus LTC4015_get_icharge_dac(LTC4015_Dev *dev, - int16_t *ichargeDac); +ReturnStatus LTC4015_get_icharge_dac(LTC4015_Dev *dev, int16_t *ichargeDac); -ReturnStatus LTC4015_get_bat_presence(LTC4015_Dev *dev, - bool *present); +ReturnStatus LTC4015_get_bat_presence(LTC4015_Dev *dev, bool *present); ReturnStatus LTC4015_init(LTC4015_Dev *dev); void LTC4015_setAlertHandler(LTC4015_Dev *dev, LTC4015_CallbackFn alert_cb, - void *cb_context); + void *cb_context); ReturnStatus LTC4015_enableLimitAlerts(LTC4015_Dev *dev, uint16_t alert_mask); diff --git a/firmware/ec/inc/devices/ltc4274.h b/firmware/ec/inc/devices/ltc4274.h index 1c648596e4..cc29a22300 100644 --- a/firmware/ec/inc/devices/ltc4274.h +++ b/firmware/ec/inc/devices/ltc4274.h @@ -20,52 +20,50 @@ #include /* PSE Configuration */ -#define LTC4274_INTERRUPT_MASK 0x00 -#define LTC4274_OPERATING_MODE_SET 0x03 -#define LTC4274_DETCET_CLASS_ENABLE 0x11 -#define LTC4274_MISC_CONF 0xD1 +#define LTC4274_INTERRUPT_MASK 0x00 +#define LTC4274_OPERATING_MODE_SET 0x03 +#define LTC4274_DETCET_CLASS_ENABLE 0x11 +#define LTC4274_MISC_CONF 0xD1 /* PSE operating modes */ -#define LTC4274_SHUTDOWN_MODE 0x00 -#define LTC4274_MANUAL_MODE 0x01 -#define LTC4274_SEMIAUTO_MODE 0x02 -#define LTC4274_AUTO_MODE 0x03 +#define LTC4274_SHUTDOWN_MODE 0x00 +#define LTC4274_MANUAL_MODE 0x01 +#define LTC4274_SEMIAUTO_MODE 0x02 +#define LTC4274_AUTO_MODE 0x03 -#define LTC4274_INTERRUPT_ENABLE 0x80 -#define LTC4274_DETECT_ENABLE 0x40 -#define LTC4274_FAST_IV 0x20 -#define LTC4274_MSD_MASK 0x01 +#define LTC4274_INTERRUPT_ENABLE 0x80 +#define LTC4274_DETECT_ENABLE 0x40 +#define LTC4274_FAST_IV 0x20 +#define LTC4274_MSD_MASK 0x01 -#define LTC4274_HP_ENABLE 0x11 +#define LTC4274_HP_ENABLE 0x11 /* POE Device Info */ -#define LTC4274_DEV_ID 0x0C -#define LTC4274_ADDRESS 0x2F -#define LTC4274_LTEPOE_90W 0x0E +#define LTC4274_DEV_ID 0x0C +#define LTC4274_ADDRESS 0x2F +#define LTC4274_LTEPOE_90W 0x0E -#define LTC4274_DEVID(x) (x>>3) -#define LTC4274_PWRGD(x) ((x&0x10)>>4) -#define LTC4374_CLASS(x) ((x&0xF0)>>4) /*if MSB is set it specifies LTEPOE++ device*/ -#define LTC4374_DETECT(x) ((x&0x07)) -#define LTC4274_DETECTION_COMPLETE(x) (x&0x01) -#define LTC4274_CLASSIFICATION_COMPLETE(x) (x&0x10) +#define LTC4274_DEVID(x) (x >> 3) +#define LTC4274_PWRGD(x) ((x & 0x10) >> 4) +#define LTC4374_CLASS(x) \ + ((x & 0xF0) >> 4) /*if MSB is set it specifies LTEPOE++ device*/ +#define LTC4374_DETECT(x) ((x & 0x07)) +#define LTC4274_DETECTION_COMPLETE(x) (x & 0x01) +#define LTC4274_CLASSIFICATION_COMPLETE(x) (x & 0x10) typedef enum LTC4274_Event { - LTC4274_EVT_SUPPLY = 1 << 7, - LTC4274_EVT_TSTART = 1 << 6, - LTC4274_EVT_TCUT = 1 << 5, - LTC4274_EVT_CLASS = 1 << 4, - LTC4274_EVT_DETECTION = 1 << 3, - LTC4274_EVT_DISCONNECT = 1 << 2, - LTC4274_EVT_POWERGOOD = 1 << 1, + LTC4274_EVT_SUPPLY = 1 << 7, + LTC4274_EVT_TSTART = 1 << 6, + LTC4274_EVT_TCUT = 1 << 5, + LTC4274_EVT_CLASS = 1 << 4, + LTC4274_EVT_DETECTION = 1 << 3, + LTC4274_EVT_DISCONNECT = 1 << 2, + LTC4274_EVT_POWERGOOD = 1 << 1, LTC4274_EVT_POWER_ENABLE = 1 << 0, - LTC4274_EVT_NONE = 0, + LTC4274_EVT_NONE = 0, } LTC4274_Event; // From LTC4274 Datasheet, Interrupts table -typedef enum { - LTC4274_POWERGOOD = 0, - LTC4274_POWERGOOD_NOTOK -} ePSEPowerState; +typedef enum { LTC4274_POWERGOOD = 0, LTC4274_POWERGOOD_NOTOK } ePSEPowerState; typedef enum { LTC4274_DETECT_UNKOWN = 0, @@ -87,33 +85,29 @@ typedef enum { LTC4274_CLASSTYPE_RESERVED, LTC4274_CLASSTYPE_0, LTC4274_OVERCURRENT, - LTC4274_LTEPOE_TYPE_52_7W =0x09, - LTC4274_LTEPOE_TYPE_70W =0x0a, - LTC4274_LTEPOE_TYPE_90W=0x0b, - LTC4274_LTEPOE_TYPE_38_7W=0xe, + LTC4274_LTEPOE_TYPE_52_7W = 0x09, + LTC4274_LTEPOE_TYPE_70W = 0x0a, + LTC4274_LTEPOE_TYPE_90W = 0x0b, + LTC4274_LTEPOE_TYPE_38_7W = 0xe, LTC4274_LTEPOE_RESERVED, LTC4274_CLASS_ERROR } ePSEClassType; -typedef enum { - LTC4274_STATE_OK = 0, - LTC4274_STATE_NOTOK -} ePSEState; +typedef enum { LTC4274_STATE_OK = 0, LTC4274_STATE_NOTOK } ePSEState; typedef enum { - LTC4274_NO_ACTIVE_ALERT = 0x00, - LTC4274_POWER_ENABLE_ALERT = 0x01, - LTC4274_POWERGOOD_ALERT = 0x02, - LTC4274_DISCONNECT_ALERT = 0x04, - LTC4274_DETECTION_ALERT = 0x08, - LTC4274_CLASS_ALERT = 0x10, - LTC4274_TCUT_ALERT = 0x20, - LTC4274_TSTART_ALERT = 0x40, - LTC4274_SUPPLY_ALERT = 0x80 + LTC4274_NO_ACTIVE_ALERT = 0x00, + LTC4274_POWER_ENABLE_ALERT = 0x01, + LTC4274_POWERGOOD_ALERT = 0x02, + LTC4274_DISCONNECT_ALERT = 0x04, + LTC4274_DETECTION_ALERT = 0x08, + LTC4274_CLASS_ALERT = 0x10, + LTC4274_TCUT_ALERT = 0x20, + LTC4274_TSTART_ALERT = 0x40, + LTC4274_SUPPLY_ALERT = 0x80 } ePSEAlert; -typedef void (*LTC4274_CallbackFn) (LTC4274_Event evt, - void *context); +typedef void (*LTC4274_CallbackFn)(LTC4274_Event evt, void *context); typedef struct LTC4274_Cfg { I2C_Dev i2c_dev; @@ -132,34 +126,44 @@ typedef struct LTC4274_Dev { LTC4274_Obj obj; } LTC4274_Dev; -ReturnStatus ltc4274_set_cfg_operation_mode(const I2C_Dev *i2c_dev, uint8_t operatingMode); -ReturnStatus ltc4274_get_operation_mode(const I2C_Dev *i2c_dev, uint8_t *operatingMode); -ReturnStatus ltc4274_set_cfg_detect_enable(const I2C_Dev *i2c_dev, uint8_t detectEnable); -ReturnStatus ltc4274_get_detect_enable(const I2C_Dev *i2c_dev, uint8_t *detectVal); -ReturnStatus ltc4274_set_interrupt_mask(const I2C_Dev *i2c_dev, uint8_t interruptMask); -ReturnStatus ltc4274_get_interrupt_mask(const I2C_Dev *i2c_dev, uint8_t *intrMask); +ReturnStatus ltc4274_set_cfg_operation_mode(const I2C_Dev *i2c_dev, + uint8_t operatingMode); +ReturnStatus ltc4274_get_operation_mode(const I2C_Dev *i2c_dev, + uint8_t *operatingMode); +ReturnStatus ltc4274_set_cfg_detect_enable(const I2C_Dev *i2c_dev, + uint8_t detectEnable); +ReturnStatus ltc4274_get_detect_enable(const I2C_Dev *i2c_dev, + uint8_t *detectVal); +ReturnStatus ltc4274_set_interrupt_mask(const I2C_Dev *i2c_dev, + uint8_t interruptMask); +ReturnStatus ltc4274_get_interrupt_mask(const I2C_Dev *i2c_dev, + uint8_t *intrMask); ReturnStatus ltc4274_cfg_interrupt_enable(const I2C_Dev *i2c_dev, bool enable); -ReturnStatus ltc4274_get_interrupt_enable(const I2C_Dev *i2c_dev, uint8_t *interruptEnable); -ReturnStatus ltc4274_set_cfg_pshp_feature(const I2C_Dev *i2c_dev, uint8_t hpEnable); -ReturnStatus ltc4274_get_pshp_feature(const I2C_Dev *i2c_dev, uint8_t *hpEnable); -ReturnStatus ltc4274_get_detection_status(const I2C_Dev *i2c_dev, ePSEDetection *pseDetect); -ReturnStatus ltc4274_get_class_status(const I2C_Dev *i2c_dev, ePSEClassType *pseClass); -ReturnStatus ltc4274_get_powergood_status(const I2C_Dev *i2c_dev, uint8_t *psePwrGood); -void ltc4274_set_alert_handler(LTC4274_Dev *dev, LTC4274_CallbackFn alert_cb, void *cb_context); -ReturnStatus ltc4274_clear_interrupt( const I2C_Dev *i2c_dev, - uint8_t *pwrEvent, - uint8_t *overCurrent, - uint8_t *supply); +ReturnStatus ltc4274_get_interrupt_enable(const I2C_Dev *i2c_dev, + uint8_t *interruptEnable); +ReturnStatus ltc4274_set_cfg_pshp_feature(const I2C_Dev *i2c_dev, + uint8_t hpEnable); +ReturnStatus ltc4274_get_pshp_feature(const I2C_Dev *i2c_dev, + uint8_t *hpEnable); +ReturnStatus ltc4274_get_detection_status(const I2C_Dev *i2c_dev, + ePSEDetection *pseDetect); +ReturnStatus ltc4274_get_class_status(const I2C_Dev *i2c_dev, + ePSEClassType *pseClass); +ReturnStatus ltc4274_get_powergood_status(const I2C_Dev *i2c_dev, + uint8_t *psePwrGood); +void ltc4274_set_alert_handler(LTC4274_Dev *dev, LTC4274_CallbackFn alert_cb, + void *cb_context); +ReturnStatus ltc4274_clear_interrupt(const I2C_Dev *i2c_dev, uint8_t *pwrEvent, + uint8_t *overCurrent, uint8_t *supply); ReturnStatus ltc4274_get_interrupt_status(const I2C_Dev *i2c_dev, uint8_t *val); -ReturnStatus ltc4274_debug_write(const I2C_Dev *i2c_dev, - uint8_t reg_address, uint8_t value); -ReturnStatus ltc4274_debug_read(const I2C_Dev *i2c_dev, - uint8_t reg_address, uint8_t *value); +ReturnStatus ltc4274_debug_write(const I2C_Dev *i2c_dev, uint8_t reg_address, + uint8_t value); +ReturnStatus ltc4274_debug_read(const I2C_Dev *i2c_dev, uint8_t reg_address, + uint8_t *value); void ltc4274_enable(LTC4274_Dev *dev, uint8_t enableVal); -ReturnStatus ltc4274_get_devid(const I2C_Dev *i2c_dev, - uint8_t *devID); -ReturnStatus ltc4274_detect(const I2C_Dev *i2c_dev, - uint8_t *detect, uint8_t *val); +ReturnStatus ltc4274_get_devid(const I2C_Dev *i2c_dev, uint8_t *devID); +ReturnStatus ltc4274_detect(const I2C_Dev *i2c_dev, uint8_t *detect, + uint8_t *val); void ltc4274_config(LTC4274_Dev *dev); ePostCode ltc4274_probe(const LTC4274_Dev *i2c_dev, POSTData *postData); void ltc4274_init(LTC4274_Dev *dev); diff --git a/firmware/ec/inc/devices/ltc4275.h b/firmware/ec/inc/devices/ltc4275.h index f6e1ccfde2..b731f6ec7c 100644 --- a/firmware/ec/inc/devices/ltc4275.h +++ b/firmware/ec/inc/devices/ltc4275.h @@ -21,12 +21,9 @@ typedef enum { LTC4275_STATUS_CLASS = 0x00, LTC4275_STATUS_POWERGOOD = 0x01, -}eltc4275StatusParamId; +} eltc4275StatusParamId; -typedef enum { - LTC4275_POWERGOOD = 0, - LTC4275_POWERGOOD_NOTOK -} ePDPowerState; +typedef enum { LTC4275_POWERGOOD = 0, LTC4275_POWERGOOD_NOTOK } ePDPowerState; typedef enum { LTC4275_CLASSTYPE_UNKOWN = 0, @@ -36,10 +33,7 @@ typedef enum { LTC4275_CLASSTYPE_POEPP } ePDClassType; -typedef enum { - LTC4275_STATE_OK = 0, - LTC4275_STATE_NOTOK -} ePDState; +typedef enum { LTC4275_STATE_OK = 0, LTC4275_STATE_NOTOK } ePDState; typedef enum { LTC4275_CONNECT_ALERT = 1, @@ -48,29 +42,28 @@ typedef enum { } ePDAlert; typedef enum { - LTC4275_CONNECT_EVT = 1 << 2, /* PD device Connected. */ - LTC4275_DISCONNECT_EVT = 1 << 1, /* PD device removed. */ - LTC4275_INCOMPATIBLE_EVT = 1 << 0, /* Incomaptible device */ + LTC4275_CONNECT_EVT = 1 << 2, /* PD device Connected. */ + LTC4275_DISCONNECT_EVT = 1 << 1, /* PD device removed. */ + LTC4275_INCOMPATIBLE_EVT = 1 << 0, /* Incomaptible device */ } LTC4275_Event; typedef struct __attribute__((packed, aligned(1))) { - uint8_t classStatus; - uint8_t powerGoodStatus; -}tPower_PDStatus; + uint8_t classStatus; + uint8_t powerGoodStatus; +} tPower_PDStatus; typedef struct __attribute__((packed, aligned(1))) { tPower_PDStatus pdStatus; - ePDState state; - ePDAlert pdalert; -}tPower_PDStatus_Info; + ePDState state; + ePDAlert pdalert; +} tPower_PDStatus_Info; typedef struct LTC4275_Cfg { OcGpio_Pin *pin_evt; OcGpio_Pin *pin_detect; } LTC4275_Cfg; -typedef void (*LTC4275_CallbackFn) (LTC4275_Event evt, - void *context); +typedef void (*LTC4275_CallbackFn)(LTC4275_Event evt, void *context); typedef struct LTC4275_Obj { LTC4275_CallbackFn alert_cb; void *cb_context; @@ -88,7 +81,8 @@ typedef struct LTC4275A_Dev { void ltc4275_config(const LTC4275_Dev *dev); ePostCode ltc4275_probe(const LTC4275_Dev *dev, POSTData *postData); ReturnStatus ltc4275_init(LTC4275_Dev *dev); -void ltc4275_set_alert_handler(LTC4275_Dev *dev, LTC4275_CallbackFn alert_cb, void *cb_context); +void ltc4275_set_alert_handler(LTC4275_Dev *dev, LTC4275_CallbackFn alert_cb, + void *cb_context); ReturnStatus ltc4275_get_power_good(const LTC4275_Dev *dev, ePDPowerState *val); ReturnStatus ltc4275_get_class(const LTC4275_Dev *dev, ePDClassType *val); void ltc4275_update_status(const LTC4275_Dev *dev); diff --git a/firmware/ec/inc/devices/powerSource.h b/firmware/ec/inc/devices/powerSource.h index 898c63d419..902459fd86 100644 --- a/firmware/ec/inc/devices/powerSource.h +++ b/firmware/ec/inc/devices/powerSource.h @@ -27,40 +27,40 @@ typedef enum { } ePowerSource; typedef enum { - PWR_SRC_ACTIVE = 0, /* If source is primary source */ - PWR_SRC_AVAILABLE, /* If source is available */ - PWR_SRC_NON_AVAILABLE /* If source is not connected */ + PWR_SRC_ACTIVE = 0, /* If source is primary source */ + PWR_SRC_AVAILABLE, /* If source is available */ + PWR_SRC_NON_AVAILABLE /* If source is not connected */ } ePowerSourceState; typedef enum { - PWR_STAT_POE_AVAILABILITY = 0x00, - PWR_STAT_POE_ACCESSIBILITY = 0x01, - PWR_STAT_SOLAR_AVAILABILITY = 0x02, - PWR_STAT_SOLAR_ACCESSIBILITY = 0x03, - PWR_STAT_EXTBATT_AVAILABILITY = 0x04, - PWR_STAT_EXTBATT_ACCESSIBILITY = 0x05, - PWR_STAT_INTBATT_AVAILABILITY = 0x06, - PWR_STAT_INTBATT_ACCESSIBILITY = 0x07 -}ePower_StatusParamId; + PWR_STAT_POE_AVAILABILITY = 0x00, + PWR_STAT_POE_ACCESSIBILITY = 0x01, + PWR_STAT_SOLAR_AVAILABILITY = 0x02, + PWR_STAT_SOLAR_ACCESSIBILITY = 0x03, + PWR_STAT_EXTBATT_AVAILABILITY = 0x04, + PWR_STAT_EXTBATT_ACCESSIBILITY = 0x05, + PWR_STAT_INTBATT_AVAILABILITY = 0x06, + PWR_STAT_INTBATT_ACCESSIBILITY = 0x07 +} ePower_StatusParamId; typedef enum { - PWR_STATUS_POE_AVAILABILITY = 0x01, - PWR_STATUS_POE_ACCESSIBILITY = 0x02, - PWR_STATUS_SOLAR_AVAILABILITY = 0x04, - PWR_STATUS_SOLAR_ACCESSIBILITY = 0x08, - PWR_STATUS_EXTBATT_AVAILABILITY = 0x10, + PWR_STATUS_POE_AVAILABILITY = 0x01, + PWR_STATUS_POE_ACCESSIBILITY = 0x02, + PWR_STATUS_SOLAR_AVAILABILITY = 0x04, + PWR_STATUS_SOLAR_ACCESSIBILITY = 0x08, + PWR_STATUS_EXTBATT_AVAILABILITY = 0x10, PWR_STATUS_EXTBATT_ACCESSIBILITY = 0x20, - PWR_STATUS_INTBATT_AVAILABILITY = 0x40, + PWR_STATUS_INTBATT_AVAILABILITY = 0x40, PWR_STATUS_INTBATT_ACCESSIBILITY = 0x80, - PWR_STATUS_PARAM_MAX = 0x100 -}ePower_StatusParam; + PWR_STATUS_PARAM_MAX = 0x100 +} ePower_StatusParam; typedef struct { ePowerSource powerSource; ePowerSourceState state; } tPowerSource; -typedef struct __attribute__((packed, aligned(1))) { +typedef struct __attribute__((packed, aligned(1))) { uint8_t poeAvail; uint8_t poeAccess; uint8_t solarAvail; @@ -89,7 +89,8 @@ typedef struct PWRSRC_Dev { void pwr_source_init(void); void pwr_get_source_info(PWRSRC_Dev *pwrSrcDev); -ReturnStatus pwr_process_get_status_parameters_data( - ePower_StatusParamId paramIndex, uint8_t *pPowerStatusData); +ReturnStatus +pwr_process_get_status_parameters_data(ePower_StatusParamId paramIndex, + uint8_t *pPowerStatusData); #endif /* POWERSOURCE_H_ */ diff --git a/firmware/ec/inc/devices/sbd.h b/firmware/ec/inc/devices/sbd.h index 7ff9a293e0..96b6336f66 100644 --- a/firmware/ec/inc/devices/sbd.h +++ b/firmware/ec/inc/devices/sbd.h @@ -12,20 +12,20 @@ #include typedef enum { - IRIDIUM_IMEI = 0, - IRIDIUM_MFG = 1, - IRIDIUM_MODEL = 2, - IRIDIUM_SIG_QUALITY = 3, - IRIDIUM_REGSTATUS = 4, - IRIDIUM_NO_OUT_MSG = 5, - IRIDIUM_LASTERR = 6, - IRIDIUM_PARAM_MAX /* Limiter */ + IRIDIUM_IMEI = 0, + IRIDIUM_MFG = 1, + IRIDIUM_MODEL = 2, + IRIDIUM_SIG_QUALITY = 3, + IRIDIUM_REGSTATUS = 4, + IRIDIUM_NO_OUT_MSG = 5, + IRIDIUM_LASTERR = 6, + IRIDIUM_PARAM_MAX /* Limiter */ } eOBC_StatusParam; typedef enum { - ERR_RC_INTERNAL = 0, - ERR_SRC_CMS = 1, - ERR_SRC_CME = 2 + ERR_RC_INTERNAL = 0, + ERR_SRC_CMS = 1, + ERR_SRC_CME = 2 } eOBC_ErrorSource; typedef struct OBC_lastError { diff --git a/firmware/ec/inc/devices/se98a.h b/firmware/ec/inc/devices/se98a.h index 3b3be07741..88bf827774 100644 --- a/firmware/ec/inc/devices/se98a.h +++ b/firmware/ec/inc/devices/se98a.h @@ -28,15 +28,14 @@ typedef enum SE98A_Event { SE98A_EVT_BAW = 1 << 0, /* Below alarm window */ } SE98A_Event; -typedef enum -{ +typedef enum { CONF_TEMP_SE98A_LOW_LIMIT_REG = 1, CONF_TEMP_SE98A_HIGH_LIMIT_REG, CONF_TEMP_SE98A_CRITICAL_LIMIT_REG -}eTempSensor_ConfigParamsId; +} eTempSensor_ConfigParamsId; -typedef void (*SE98A_CallbackFn) (SE98A_Event evt, int8_t temperature, - void *context); +typedef void (*SE98A_CallbackFn)(SE98A_Event evt, int8_t temperature, + void *context); typedef struct SE98A_Cfg { I2C_Dev dev; @@ -84,7 +83,7 @@ ReturnStatus se98a_enable_alerts(SE98A_Dev *dev); * @param dev Device struct pointer, Post data struct * @return POST_DEV_FOUND on success, error code on failure */ -ePostCode se98a_probe(SE98A_Dev *dev, POSTData *postData); +ePostCode se98a_probe(SE98A_Dev *dev, POSTData *postData); /*! Sets one of the 3 alert thresholds on the device * @param dev Device struct pointer @@ -104,7 +103,7 @@ ReturnStatus se98a_set_limit(SE98A_Dev *dev, */ ReturnStatus se98a_get_limit(SE98A_Dev *dev, eTempSensor_ConfigParamsId limitToConfig, - int8_t* tempLimitValue); + int8_t *tempLimitValue); /*! Reads the current temperature from the sensor * @param dev Device struct pointer diff --git a/firmware/ec/inc/devices/sx1509.h b/firmware/ec/inc/devices/sx1509.h index 09741bd63c..37aad449a5 100644 --- a/firmware/ec/inc/devices/sx1509.h +++ b/firmware/ec/inc/devices/sx1509.h @@ -19,40 +19,36 @@ * MACRO DEFINITIONS *****************************************************************************/ /* Oscillator frequency source */ -#define SX1509_EXTERNAL_CLOCK 1 -#define SX1509_INTERNAL_CLOCK_2MHZ 2 +#define SX1509_EXTERNAL_CLOCK 1 +#define SX1509_INTERNAL_CLOCK_2MHZ 2 /* OSCIO pin function */ -#define SX1509_CLOCK_OSC_IN 0 -#define SX1509_CLOCK_OSC_OUT 1 +#define SX1509_CLOCK_OSC_IN 0 +#define SX1509_CLOCK_OSC_OUT 1 /* IO pin definitions */ -#define SX1509_IO_PIN_0 0x0001 -#define SX1509_IO_PIN_1 0x0002 -#define SX1509_IO_PIN_2 0x0004 -#define SX1509_IO_PIN_3 0x0008 -#define SX1509_IO_PIN_4 0x0010 -#define SX1509_IO_PIN_5 0x0020 -#define SX1509_IO_PIN_6 0x0040 -#define SX1509_IO_PIN_7 0x0080 -#define SX1509_IO_PIN_8 0x0001 -#define SX1509_IO_PIN_9 0x0002 -#define SX1509_IO_PIN_10 0x0004 -#define SX1509_IO_PIN_11 0x0008 -#define SX1509_IO_PIN_12 0x0010 -#define SX1509_IO_PIN_13 0x0020 -#define SX1509_IO_PIN_14 0x0040 -#define SX1509_IO_PIN_15 0x0080 +#define SX1509_IO_PIN_0 0x0001 +#define SX1509_IO_PIN_1 0x0002 +#define SX1509_IO_PIN_2 0x0004 +#define SX1509_IO_PIN_3 0x0008 +#define SX1509_IO_PIN_4 0x0010 +#define SX1509_IO_PIN_5 0x0020 +#define SX1509_IO_PIN_6 0x0040 +#define SX1509_IO_PIN_7 0x0080 +#define SX1509_IO_PIN_8 0x0001 +#define SX1509_IO_PIN_9 0x0002 +#define SX1509_IO_PIN_10 0x0004 +#define SX1509_IO_PIN_11 0x0008 +#define SX1509_IO_PIN_12 0x0010 +#define SX1509_IO_PIN_13 0x0020 +#define SX1509_IO_PIN_14 0x0040 +#define SX1509_IO_PIN_15 0x0080 /***************************************************************************** * STRUCT/ENUM DEFINITIONS *****************************************************************************/ /* Enumeration of SX1509 register types */ -typedef enum { - SX1509_REG_A = 0, - SX1509_REG_B, - SX1509_REG_AB -} sx1509RegType; +typedef enum { SX1509_REG_A = 0, SX1509_REG_B, SX1509_REG_AB } sx1509RegType; typedef enum { SX1509_EDGE_SENSE_REG_LOW = 0, @@ -63,18 +59,13 @@ typedef enum { /***************************************************************************** * FUNCTION DECLARATIONS *****************************************************************************/ -ReturnStatus ioexp_led_get_data(const I2C_Dev *i2c_dev, - sx1509RegType regType, +ReturnStatus ioexp_led_get_data(const I2C_Dev *i2c_dev, sx1509RegType regType, uint8_t *regValue); -ReturnStatus ioexp_led_set_data(const I2C_Dev *i2c_dev, - sx1509RegType regType, - uint8_t regValue1, - uint8_t regValue2); -ReturnStatus ioexp_led_set_on_time(const I2C_Dev *i2c_dev, - uint8_t index, +ReturnStatus ioexp_led_set_data(const I2C_Dev *i2c_dev, sx1509RegType regType, + uint8_t regValue1, uint8_t regValue2); +ReturnStatus ioexp_led_set_on_time(const I2C_Dev *i2c_dev, uint8_t index, uint8_t tOnRegValue); -ReturnStatus ioexp_led_set_off_time(const I2C_Dev *i2c_dev, - uint8_t index, +ReturnStatus ioexp_led_set_off_time(const I2C_Dev *i2c_dev, uint8_t index, uint8_t tOffRegValue); ReturnStatus ioexp_led_software_reset(const I2C_Dev *i2c_dev); ReturnStatus ioexp_led_config_inputbuffer(const I2C_Dev *i2c_dev, @@ -86,9 +77,9 @@ ReturnStatus ioexp_led_config_pullup(const I2C_Dev *i2c_dev, uint8_t pullUpRegValue1, uint8_t pullUpRegValue2); ReturnStatus ioexp_led_config_pulldown(const I2C_Dev *i2c_dev, - sx1509RegType regType, - uint8_t pullDownRegValue1, - uint8_t pullDownRegValue2); + sx1509RegType regType, + uint8_t pullDownRegValue1, + uint8_t pullDownRegValue2); ReturnStatus ioexp_led_config_opendrain(const I2C_Dev *i2c_dev, sx1509RegType regType, uint8_t openDrainRegValue1, @@ -101,11 +92,9 @@ ReturnStatus ioexp_led_config_polarity(const I2C_Dev *i2c_dev, sx1509RegType regType, uint8_t polarityRegValue1, uint8_t polarityRegValue2); -ReturnStatus ioexp_led_config_clock(const I2C_Dev *i2c_dev, - uint8_t oscSource, +ReturnStatus ioexp_led_config_clock(const I2C_Dev *i2c_dev, uint8_t oscSource, uint8_t oscPin); -ReturnStatus ioexp_led_config_misc(const I2C_Dev *i2c_dev, - uint8_t regValue); +ReturnStatus ioexp_led_config_misc(const I2C_Dev *i2c_dev, uint8_t regValue); ReturnStatus ioexp_led_enable_leddriver(const I2C_Dev *i2c_dev, sx1509RegType regType, uint8_t ledEnableRegValue1, @@ -117,13 +106,13 @@ ReturnStatus ioexp_led_config_interrupt(const I2C_Dev *i2c_dev, uint8_t interruptMaskRegValue1, uint8_t interruptMaskRegValue2); ReturnStatus ioexp_led_config_edge_sense_A(const I2C_Dev *i2c_dev, - sx1509EdgeSenseRegType regType, - uint8_t edgeSenseLowARegValue, - uint8_t edgeSenseHighARegValue); + sx1509EdgeSenseRegType regType, + uint8_t edgeSenseLowARegValue, + uint8_t edgeSenseHighARegValue); ReturnStatus ioexp_led_config_edge_sense_A(const I2C_Dev *i2c_dev, - sx1509EdgeSenseRegType regType, - uint8_t edgeSenseLowBRegValue, - uint8_t edgeSenseHighBRegValue); + sx1509EdgeSenseRegType regType, + uint8_t edgeSenseLowBRegValue, + uint8_t edgeSenseHighBRegValue); ReturnStatus ioexp_led_config_edge_sense_B(const I2C_Dev *i2c_dev, sx1509EdgeSenseRegType regType, uint8_t edgeSenseLowBRegValue, diff --git a/firmware/ec/inc/interfaces/uartdma.h b/firmware/ec/inc/interfaces/uartdma.h index 4cfe957368..7d9569a9e0 100644 --- a/firmware/ec/inc/interfaces/uartdma.h +++ b/firmware/ec/inc/interfaces/uartdma.h @@ -17,14 +17,14 @@ /***************************************************************************** * MACROS DEFINITION *****************************************************************************/ -#define OCUARTDMA_TASK_PRIORITY 7 -#define OCUARTDMA_TASK_STACK_SIZE 1024 +#define OCUARTDMA_TASK_PRIORITY 7 +#define OCUARTDMA_TASK_STACK_SIZE 1024 -#define OCUARTDMATX_TASK_PRIORITY 7 -#define OCUARTDMATX_TASK_STACK_SIZE 1024 +#define OCUARTDMATX_TASK_PRIORITY 7 +#define OCUARTDMATX_TASK_STACK_SIZE 1024 -#define UART_TXBUF_SIZE OCMP_FRAME_TOTAL_LENGTH -#define UART_RXBUF_SIZE OCMP_FRAME_TOTAL_LENGTH +#define UART_TXBUF_SIZE OCMP_FRAME_TOTAL_LENGTH +#define UART_RXBUF_SIZE OCMP_FRAME_TOTAL_LENGTH /***************************************************************************** * HANDLE DECLARATIONS diff --git a/firmware/ec/inc/interfaces/usbcdcd.h b/firmware/ec/inc/interfaces/usbcdcd.h index 0bde7f449f..62feec12c9 100644 --- a/firmware/ec/inc/interfaces/usbcdcd.h +++ b/firmware/ec/inc/interfaces/usbcdcd.h @@ -65,8 +65,7 @@ extern void USBCDCD_init(void); * @return Number of bytes added to the USB Buffer for transmission */ extern unsigned int USBCDCD_sendData(const unsigned char *pStr, - unsigned int length, - unsigned int timeout); + unsigned int length, unsigned int timeout); /*! * ======== USBCDCD_receiveData ======== diff --git a/firmware/ec/inc/subsystem/bms/bms.h b/firmware/ec/inc/subsystem/bms/bms.h index 4aa26315b9..0d0c160bd3 100644 --- a/firmware/ec/inc/subsystem/bms/bms.h +++ b/firmware/ec/inc/subsystem/bms/bms.h @@ -18,16 +18,16 @@ /***************************************************************************** * MACRO DEFINITIONS *****************************************************************************/ -#define BMS_TASK_PRIORITY 2 -#define BMS_TASK_STACK_SIZE 2048 +#define BMS_TASK_PRIORITY 2 +#define BMS_TASK_STACK_SIZE 2048 /* * Define all the constant information of BMS subsystem here, like device * addresses or Constant configuration values or NUMBER of sensors */ -#define BMS_EC_TEMP_SENSOR_ADDR 0x19 -#define BMS_EC_CURRENT_SENSOR_12V_ADDR 0x40 -#define BMS_EC_CURRENT_SENSOR_3P3V_ADDR 0x45 +#define BMS_EC_TEMP_SENSOR_ADDR 0x19 +#define BMS_EC_CURRENT_SENSOR_12V_ADDR 0x40 +#define BMS_EC_CURRENT_SENSOR_3P3V_ADDR 0x45 /***************************************************************************** * STRUCT/ENUM DEFINITIONS diff --git a/firmware/ec/inc/subsystem/ethernet/ethernetSS.h b/firmware/ec/inc/subsystem/ethernet/ethernetSS.h index a1fb4dd4a9..33fca96195 100644 --- a/firmware/ec/inc/subsystem/ethernet/ethernetSS.h +++ b/firmware/ec/inc/subsystem/ethernet/ethernetSS.h @@ -12,6 +12,6 @@ #include void ethernet_switch_setup(); -bool eth_sw_pre_init(void** driver, void *returnValue); +bool eth_sw_pre_init(void **driver, void *returnValue); #endif /* ETHERNETSS_H_ */ diff --git a/firmware/ec/inc/subsystem/gpp/ebmp.h b/firmware/ec/inc/subsystem/gpp/ebmp.h index 05091fcc51..5904a4d12c 100644 --- a/firmware/ec/inc/subsystem/gpp/ebmp.h +++ b/firmware/ec/inc/subsystem/gpp/ebmp.h @@ -14,8 +14,8 @@ /***************************************************************************** * MACRO DEFINITIONS *****************************************************************************/ -#define EBMP_TASK_STACK_SIZE 1024 -#define EBMP_TASK_PRIORITY 2 +#define EBMP_TASK_STACK_SIZE 1024 +#define EBMP_TASK_PRIORITY 2 /***************************************************************************** * STRUCT/ENUM DEFINITIONS @@ -46,7 +46,7 @@ typedef enum { } apStates; typedef enum { - AP_RESET = 0, + AP_RESET = 0, AP_BOOT_PROGRESS_MONITOR_1 = 1, AP_BOOT_PROGRESS_MONITOR_2 = 2 } apBootMonitor; @@ -54,6 +54,6 @@ typedef enum { /***************************************************************************** * FUNCTION DECLARATIONS *****************************************************************************/ -void ebmp_init(Gpp_gpioCfg* driver); +void ebmp_init(Gpp_gpioCfg *driver); #endif /* EBMP_H_ */ diff --git a/firmware/ec/inc/subsystem/gpp/gpp.h b/firmware/ec/inc/subsystem/gpp/gpp.h index 5d15cb804a..8e13b71cb8 100644 --- a/firmware/ec/inc/subsystem/gpp/gpp.h +++ b/firmware/ec/inc/subsystem/gpp/gpp.h @@ -20,23 +20,23 @@ /***************************************************************************** * MACRO DEFINITIONS *****************************************************************************/ -#define GPP_TASK_PRIORITY 2 -#define GPP_TASK_STACK_SIZE 2048 +#define GPP_TASK_PRIORITY 2 +#define GPP_TASK_STACK_SIZE 2048 /* * Define all the constant information of GPP subsystem here, like device * addresses or Constant configuration values or NUMBER of sensors. */ -#define GPP_TEMP_SENSOR_NOS 3 +#define GPP_TEMP_SENSOR_NOS 3 /* * Device address of GPP sub system are as below. */ -#define GPP_AP_TEMPSENS1_ADDR 0x1A -#define GPP_AP_TEMPSENS2_ADDR 0x1D -#define GPP_AP_TEMPSENS3_ADDR 0x1C -#define GPP_AP_CURRENT_SENSOR_ADDR 0x44 -#define GPP_MSATA_CURRENT_SENSOR_ADDR 0x45 +#define GPP_AP_TEMPSENS1_ADDR 0x1A +#define GPP_AP_TEMPSENS2_ADDR 0x1D +#define GPP_AP_TEMPSENS3_ADDR 0x1C +#define GPP_AP_CURRENT_SENSOR_ADDR 0x44 +#define GPP_MSATA_CURRENT_SENSOR_ADDR 0x45 /***************************************************************************** * STRUCT/ENUM DEFINITIONS diff --git a/firmware/ec/inc/subsystem/hci/hci.h b/firmware/ec/inc/subsystem/hci/hci.h index d2b8c41723..f371b542de 100644 --- a/firmware/ec/inc/subsystem/hci/hci.h +++ b/firmware/ec/inc/subsystem/hci/hci.h @@ -19,8 +19,8 @@ /***************************************************************************** * MACRO DEFINITIONS *****************************************************************************/ -#define HCI_TASK_PRIORITY 6 -#define HCI_TASK_STACK_SIZE 4096 +#define HCI_TASK_PRIORITY 6 +#define HCI_TASK_STACK_SIZE 4096 #define HCI_LED_TEMP_SENSOR_ADDR 0x1A diff --git a/firmware/ec/inc/subsystem/hci/hci_led.h b/firmware/ec/inc/subsystem/hci/hci_led.h index 4994b47954..c5c68e3c72 100644 --- a/firmware/ec/inc/subsystem/hci/hci_led.h +++ b/firmware/ec/inc/subsystem/hci/hci_led.h @@ -20,8 +20,8 @@ /***************************************************************************** * MACRO DEFINITIONS *****************************************************************************/ -#define LED_SX1509_LEFT_ADDRESS 0x3E -#define LED_SX1509_RIGHT_ADDRESS 0x3F +#define LED_SX1509_LEFT_ADDRESS 0x3E +#define LED_SX1509_RIGHT_ADDRESS 0x3F /***************************************************************************** * STRUCT/ENUM DEFINITIONS diff --git a/firmware/ec/inc/subsystem/rffe/rffe.h b/firmware/ec/inc/subsystem/rffe/rffe.h index 45c65bf6ee..4815e734c5 100644 --- a/firmware/ec/inc/subsystem/rffe/rffe.h +++ b/firmware/ec/inc/subsystem/rffe/rffe.h @@ -21,8 +21,8 @@ /***************************************************************************** * MACRO DEFINITIONS *****************************************************************************/ -#define RFFE_TASK_PRIORITY 2 -#define RFFE_TASK_STACK_SIZE 2048 +#define RFFE_TASK_PRIORITY 2 +#define RFFE_TASK_STACK_SIZE 2048 /***************************************************************************** * STRUCT/ENUM DEFINITIONS @@ -50,21 +50,21 @@ typedef struct Fe_Lna_Cfg { } Fe_Lna_Cfg; typedef struct Fe_Ch1_Gain_Cfg { - Fe_Gain_Cfg* fe_gain_cfg; + Fe_Gain_Cfg *fe_gain_cfg; } Fe_Ch1_Gain_Cfg; typedef struct Fe_Ch2_Gain_Cfg { OcGpio_Pin pin_ch1_2g_lb_band_sel_l; - Fe_Gain_Cfg* fe_gain_cfg; + Fe_Gain_Cfg *fe_gain_cfg; } Fe_Ch2_Gain_Cfg; typedef struct Fe_Ch1_Lna_Cfg { - Fe_Lna_Cfg* fe_lna_cfg; + Fe_Lna_Cfg *fe_lna_cfg; } Fe_Ch1_Lna_Cfg; typedef struct Fe_Ch2_Lna_Cfg { OcGpio_Pin pin_ch1_rf_pwr_off; - Fe_Lna_Cfg* fe_lna_cfg; + Fe_Lna_Cfg *fe_lna_cfg; } Fe_Ch2_Lna_Cfg; typedef struct Fe_Watchdog_Cfg { @@ -82,15 +82,15 @@ typedef struct Fe_gpioCfg { OcGpio_Pin pin_rf_pgood_ldo; OcGpio_Pin pin_fe_12v_ctrl; OcGpio_Pin pin_trxfe_conn_reset; -}Fe_gpioCfg; +} Fe_gpioCfg; typedef struct Fe_Cfg { - Fe_gpioCfg* fe_gpio_cfg; - Fe_Ch1_Gain_Cfg* fe_ch1_gain_cfg; - Fe_Ch2_Gain_Cfg* fe_ch2_gain_cfg; - Fe_Ch1_Lna_Cfg* fe_ch1_lna_cfg; - Fe_Ch2_Lna_Cfg* fe_ch2_lna_cfg; - Fe_Watchdog_Cfg* fe_watchdog_cfg; + Fe_gpioCfg *fe_gpio_cfg; + Fe_Ch1_Gain_Cfg *fe_ch1_gain_cfg; + Fe_Ch2_Gain_Cfg *fe_ch2_gain_cfg; + Fe_Ch1_Lna_Cfg *fe_ch1_lna_cfg; + Fe_Ch2_Lna_Cfg *fe_ch2_lna_cfg; + Fe_Watchdog_Cfg *fe_watchdog_cfg; } Fe_Cfg; typedef struct __attribute__((packed, aligned(1))) { diff --git a/firmware/ec/inc/subsystem/rffe/rffe_ctrl.h b/firmware/ec/inc/subsystem/rffe/rffe_ctrl.h index 8889d91d1f..ad90642b32 100644 --- a/firmware/ec/inc/subsystem/rffe/rffe_ctrl.h +++ b/firmware/ec/inc/subsystem/rffe/rffe_ctrl.h @@ -19,7 +19,7 @@ /***************************************************************************** * MACRO DEFINITIONS *****************************************************************************/ -#define RFFE_IO_BOARD_CFG_ADDR 0x19 +#define RFFE_IO_BOARD_CFG_ADDR 0x19 /***************************************************************************** * STRUCT/ENUM DEFINITIONS @@ -33,7 +33,7 @@ typedef enum rfChannel { typedef struct FE_Ch_Band_cfg { rffeChannel channel; -}FE_Ch_Band_cfg; +} FE_Ch_Band_cfg; /* RFFE Band Type */ typedef enum { @@ -49,7 +49,7 @@ typedef enum { typedef struct FE_Band_Cfg { rffeBand band; -}FE_Band_Cfg; +} FE_Band_Cfg; /* Power Amplifier Control Type */ typedef enum rfPACtrl { diff --git a/firmware/ec/inc/subsystem/rffe/rffe_powermonitor.h b/firmware/ec/inc/subsystem/rffe/rffe_powermonitor.h index 147d630c02..659ad12071 100644 --- a/firmware/ec/inc/subsystem/rffe/rffe_powermonitor.h +++ b/firmware/ec/inc/subsystem/rffe/rffe_powermonitor.h @@ -18,24 +18,21 @@ /***************************************************************************** * MACRO DEFINITIONS *****************************************************************************/ -#define RFFEPOWERMONITOR_TASK_PRIORITY 2 -#define RFFEPOWERMONITOR_TASK_STACK_SIZE 1024 +#define RFFEPOWERMONITOR_TASK_PRIORITY 2 +#define RFFEPOWERMONITOR_TASK_STACK_SIZE 1024 /* RF POWER Detector Device Addresses */ -#define RFFE_CHANNEL1_ADC_ADDR 0x4A -#define RFFE_CHANNEL2_ADC_ADDR 0x48 +#define RFFE_CHANNEL1_ADC_ADDR 0x4A +#define RFFE_CHANNEL2_ADC_ADDR 0x48 /***************************************************************************** * STRUCT/ENUM DEFINITIONS *****************************************************************************/ -typedef enum { - RFFE_STAT_FW_POWER = 1, - RFFE_STAT_REV_POWER -} eRffeStatusParamId; +typedef enum { RFFE_STAT_FW_POWER = 1, RFFE_STAT_REV_POWER } eRffeStatusParamId; typedef enum { - RFFE_STATUS_FW_POWER = 0x01, - RFFE_STATUS_REV_POWER = 0x02, + RFFE_STATUS_FW_POWER = 0x01, + RFFE_STATUS_REV_POWER = 0x02, RFFE_STATUS_PARAMS_MAX = 0x04 } eRffeStatusParam; @@ -71,8 +68,8 @@ typedef enum FePowerStatus { * FUNCTION DECLARATIONS *****************************************************************************/ ReturnStatus rffe_powermonitor_read_power(const I2C_Dev *i2c_dev, - eRffeStatusParamId rfPowerSelect, - uint16_t *rfpower); + eRffeStatusParamId rfPowerSelect, + uint16_t *rfpower); void rffe_powermonitor_createtask(void); #endif /* RFFE_POWERMONITOR_H_ */ diff --git a/firmware/ec/inc/subsystem/rffe/rffe_sensor.h b/firmware/ec/inc/subsystem/rffe/rffe_sensor.h index e2fc6eb814..2da9071f74 100644 --- a/firmware/ec/inc/subsystem/rffe/rffe_sensor.h +++ b/firmware/ec/inc/subsystem/rffe/rffe_sensor.h @@ -13,11 +13,11 @@ * MACRO DEFINITIONS *****************************************************************************/ /* RFFE Temperature Sensor Device Addresses */ -#define RFFE_CH1_TEMP_SENSOR_ADDR 0x4B -#define RFFE_CH2_TEMP_SENSOR_ADDR 0x4C +#define RFFE_CH1_TEMP_SENSOR_ADDR 0x4B +#define RFFE_CH2_TEMP_SENSOR_ADDR 0x4C /* RFFE INA226 Sensor Device Addresses */ -#define RFFE_INA226_CH1_5_7V_ADDR 0x41 -#define RFFE_INA226_CH2_5_7V_ADDR 0x40 +#define RFFE_INA226_CH1_5_7V_ADDR 0x41 +#define RFFE_INA226_CH2_5_7V_ADDR 0x40 #endif /* RFFE_SENSOR_H_ */ diff --git a/firmware/ec/inc/subsystem/sdr/sdr.h b/firmware/ec/inc/subsystem/sdr/sdr.h index 3cc985545e..2eea71678b 100644 --- a/firmware/ec/inc/subsystem/sdr/sdr.h +++ b/firmware/ec/inc/subsystem/sdr/sdr.h @@ -17,14 +17,13 @@ #include "inc/devices/eeprom.h" #include "inc/devices/ina226.h" - #include /***************************************************************************** * MACRO DEFINITIONS *****************************************************************************/ -#define SDR_TASK_PRIORITY 2 -#define SDR_TASK_STACK_SIZE 4096 +#define SDR_TASK_PRIORITY 2 +#define SDR_TASK_STACK_SIZE 4096 /* * Define all the constant information of RF SDR subsystem here, like device @@ -32,14 +31,14 @@ */ /* SDR Temperature Sensor Device Addresses */ -#define SDR_FPGA_TEMP_SENSOR_ADDR 0x4C +#define SDR_FPGA_TEMP_SENSOR_ADDR 0x4C /* SDR INA226 Sensor Device Addresses */ -#define SDR_FPGA_CURRENT_SENSOR_ADDR 0x44 -#define SDR_CURRENT_SENSOR_ADDR 0x41 +#define SDR_FPGA_CURRENT_SENSOR_ADDR 0x44 +#define SDR_CURRENT_SENSOR_ADDR 0x41 /* FX3 IO Expander Device Address */ -#define SDR_EEPROM_IOEXP_ADDRESS 0x1F +#define SDR_EEPROM_IOEXP_ADDRESS 0x1F /***************************************************************************** * STRUCT/ENUM DEFINITIONS @@ -57,17 +56,18 @@ typedef struct Sdr_gpioCfg { OcGpio_Pin pin_sdr_reset_in; OcGpio_Pin pin_ec_trxfe_reset; OcGpio_Pin pin_fx3_reset; -}Sdr_gpioCfg; +} Sdr_gpioCfg; /***************************************************************************** * FUNCTION DECLARATIONS *****************************************************************************/ -void sdr_pwr_control(Sdr_gpioCfg *driver, uint8_t control); /* TODO: hack to let OBC work */ +void sdr_pwr_control(Sdr_gpioCfg *driver, + uint8_t control); /* TODO: hack to let OBC work */ /* Schema hooks */ bool SDR_Init(void *driver, void *return_buf); bool Sdr_InventoryGetStatus(void *driver, unsigned int param_id, - void *return_buf); + void *return_buf); bool SDR_fx3Reset(void *driver, void *params); bool SDR_reset(void *driver, void *params); diff --git a/firmware/ec/inc/subsystem/sync/sync.h b/firmware/ec/inc/subsystem/sync/sync.h index 5acd29ab81..755a86e2eb 100644 --- a/firmware/ec/inc/subsystem/sync/sync.h +++ b/firmware/ec/inc/subsystem/sync/sync.h @@ -21,14 +21,14 @@ /***************************************************************************** * MACRO DEFINITIONS *****************************************************************************/ -#define SYNC_TASK_PRIORITY 2 -#define SYNC_TASK_STACK_SIZE 1024 +#define SYNC_TASK_PRIORITY 2 +#define SYNC_TASK_STACK_SIZE 1024 /* Temporary fix */ -#define SYNC_GPS_TASK_PRIORITY 2 -#define SYNC_GPS_TASK_STACK_SIZE 1024 +#define SYNC_GPS_TASK_PRIORITY 2 +#define SYNC_GPS_TASK_STACK_SIZE 1024 -#define SYNC_TEMP_SENSOR_ADDR 0x4C +#define SYNC_TEMP_SENSOR_ADDR 0x4C /***************************************************************************** * STRUCT/ENUM DEFINITIONS @@ -47,10 +47,7 @@ typedef struct Sync_gpioCfg { OcGpio_Pin pin_ec_sync_reset; } Sync_gpioCfg; -typedef enum gpsStatus { - GPS_NOTLOCKED = 0, - GPS_LOCKED -} gpsStatus; +typedef enum gpsStatus { GPS_NOTLOCKED = 0, GPS_LOCKED } gpsStatus; /***************************************************************************** * FUNCTION DECLARATIONS diff --git a/firmware/ec/inc/subsystem/testModule/testModule.h b/firmware/ec/inc/subsystem/testModule/testModule.h index cb1f71ea93..b62c7f5ac3 100644 --- a/firmware/ec/inc/subsystem/testModule/testModule.h +++ b/firmware/ec/inc/subsystem/testModule/testModule.h @@ -16,7 +16,6 @@ #include "drivers/OcGpio.h" #include "helpers/attribute.h" - /***************************************************************************** * STRUCT/ENUM DEFINITIONS *****************************************************************************/ @@ -53,9 +52,9 @@ typedef struct TestModule_opInfo { } TestModule_opInfo; typedef enum TestModule_errorSource { - TESTMOD_ERR_INTERNAL = 0, - TESTMOD_ERR_CMS = 1, - TESTMOD_ERR_CME = 2 + TESTMOD_ERR_INTERNAL = 0, + TESTMOD_ERR_CMS = 1, + TESTMOD_ERR_CME = 2 } TestModule_errorSource; typedef struct TestModule_lastError { diff --git a/firmware/ec/inc/subsystem/watchdog/watchdog.h b/firmware/ec/inc/subsystem/watchdog/watchdog.h index a8b704bd46..109808eba5 100644 --- a/firmware/ec/inc/subsystem/watchdog/watchdog.h +++ b/firmware/ec/inc/subsystem/watchdog/watchdog.h @@ -12,7 +12,7 @@ /***************************************************************************** * MACRO DEFINITIONS *****************************************************************************/ -#define WATCHDOG_TASK_STACK_SIZE 1024 -#define WATCHDOG_TASK_PRIORITY 2 +#define WATCHDOG_TASK_STACK_SIZE 1024 +#define WATCHDOG_TASK_PRIORITY 2 #endif /* WATCHDOG_H_ */ diff --git a/firmware/ec/inc/utils/ocmp_util.h b/firmware/ec/inc/utils/ocmp_util.h index 9aae16ebc4..68c5208312 100644 --- a/firmware/ec/inc/utils/ocmp_util.h +++ b/firmware/ec/inc/utils/ocmp_util.h @@ -26,7 +26,7 @@ ** *****************************************************************************/ -OCMPMessageFrame * OCMP_mallocFrame(uint16_t len); +OCMPMessageFrame *OCMP_mallocFrame(uint16_t len); /***************************************************************************** ** FUNCTION NAME : create_ocmp_msg_frame @@ -38,13 +38,10 @@ OCMPMessageFrame * OCMP_mallocFrame(uint16_t len); ** RETURN TYPE : OCMPMessageFrame ** *****************************************************************************/ -OCMPMessageFrame* create_ocmp_msg_frame(OCMPSubsystem subSystem, - OCMPMsgType msgtype, - OCMPActionType actionType, - uint8_t componentId, - uint16_t parameters, - uint8_t payloadSize); - +OCMPMessageFrame * +create_ocmp_msg_frame(OCMPSubsystem subSystem, OCMPMsgType msgtype, + OCMPActionType actionType, uint8_t componentId, + uint16_t parameters, uint8_t payloadSize); /***************************************************************************** ** FUNCTION NAME : create_ocmp_alert_from_Evt @@ -58,8 +55,8 @@ OCMPMessageFrame* create_ocmp_msg_frame(OCMPSubsystem subSystem, ** RETURN TYPE : OCMPMessageFrame ** *****************************************************************************/ -OCMPMessageFrame* create_ocmp_alert_from_Evt(OCMPMessageFrame* ocmpEventMsg, - uint8_t componentId, - uint16_t parameters ); +OCMPMessageFrame *create_ocmp_alert_from_Evt(OCMPMessageFrame *ocmpEventMsg, + uint8_t componentId, + uint16_t parameters); #endif /* INC_UTILS_OCMP_UTIL_H_ */ diff --git a/firmware/ec/inc/utils/util.h b/firmware/ec/inc/utils/util.h index 26d3ebc87b..514d468a0e 100644 --- a/firmware/ec/inc/utils/util.h +++ b/firmware/ec/inc/utils/util.h @@ -66,11 +66,10 @@ extern "C" { * TYPEDEFS */ -typedef struct -{ - uint16_t event; // Event type. - uint8_t state; // Event state; -}appEvtHdr_t; +typedef struct { + uint16_t event; // Event type. + uint8_t state; // Event state; +} appEvtHdr_t; /********************************************************************* * MACROS @@ -95,12 +94,9 @@ typedef struct * * @return Clock_Handle - a handle to the clock instance. */ -Clock_Handle Util_constructClock(Clock_Struct *pClock, - Clock_FuncPtr clockCB, - uint32_t clockDuration, - uint32_t clockPeriod, - uint8_t startFlag, - UArg arg); +Clock_Handle Util_constructClock(Clock_Struct *pClock, Clock_FuncPtr clockCB, + uint32_t clockDuration, uint32_t clockPeriod, + uint8_t startFlag, UArg arg); /********************************************************************* * @fn Util_startClock @@ -184,7 +180,8 @@ Queue_Handle Util_constructQueue(Queue_Struct *pQueue); * * @return TRUE if message was queued, FALSE otherwise. */ -uint8_t Util_enqueueMsg(Queue_Handle msgQueue, Semaphore_Handle sem, uint8_t *pMsg); +uint8_t Util_enqueueMsg(Queue_Handle msgQueue, Semaphore_Handle sem, + uint8_t *pMsg); /********************************************************************* * @fn Util_dequeueMsg diff --git a/firmware/ec/platform/oc-sdr/cfg/OC_CONNECT1.c b/firmware/ec/platform/oc-sdr/cfg/OC_CONNECT1.c index 414e63c2dd..09caabd224 100644 --- a/firmware/ec/platform/oc-sdr/cfg/OC_CONNECT1.c +++ b/firmware/ec/platform/oc-sdr/cfg/OC_CONNECT1.c @@ -82,9 +82,9 @@ extern int USBSerialPPP_NIMUInit(); #if defined(__TI_COMPILER_VERSION__) #pragma DATA_ALIGN(dmaControlTable, 1024) #elif defined(__IAR_SYSTEMS_ICC__) -#pragma data_alignment=1024 +#pragma data_alignment = 1024 #elif defined(__GNUC__) -__attribute__ ((aligned (1024))) +__attribute__((aligned(1024))) #endif static tDMAControlTable dmaControlTable[32]; static bool dmaInitialized = false; @@ -182,11 +182,11 @@ void OC_CONNECT1_initGeneral(void) NIMU_DEVICE_TABLE_ENTRY NIMUDeviceTable[2] = { { #if TI_EXAMPLES_PPP - /* Use PPP driver for PPP example only */ - .init = USBSerialPPP_NIMUInit + /* Use PPP driver for PPP example only */ + .init = USBSerialPPP_NIMUInit #else - /* Default: use Ethernet driver */ - .init = EMACSnow_NIMUInit + /* Default: use Ethernet driver */ + .init = EMACSnow_NIMUInit #endif }, { NULL } @@ -203,20 +203,16 @@ EMACSnow_Object emacObjects[OC_CONNECT1_EMACCOUNT]; unsigned char macAddress[6] = { 0xff, 0xff, 0xff, 0xff, 0xff, 0xff }; const EMACSnow_HWAttrs emacHWAttrs[OC_CONNECT1_EMACCOUNT] = { - [OC_CONNECT1_EMAC0] = { - .baseAddr = EMAC0_BASE, - .intNum = INT_EMAC0, - .intPriority = (~0), - .macAddress = macAddress - } + [OC_CONNECT1_EMAC0] = { .baseAddr = EMAC0_BASE, + .intNum = INT_EMAC0, + .intPriority = (~0), + .macAddress = macAddress } }; const EMAC_Config EMAC_config[] = { - [OC_CONNECT1_EMAC0] = { - .fxnTablePtr = &EMACSnow_fxnTable, - .object = &emacObjects[OC_CONNECT1_EMAC0], - .hwAttrs = &emacHWAttrs[OC_CONNECT1_EMAC0] - }, + [OC_CONNECT1_EMAC0] = { .fxnTablePtr = &EMACSnow_fxnTable, + .object = &emacObjects[OC_CONNECT1_EMAC0], + .hwAttrs = &emacHWAttrs[OC_CONNECT1_EMAC0] }, { NULL, NULL, NULL } }; @@ -242,15 +238,15 @@ void OC_CONNECT1_initEMAC(void) macAddress[3] = ((ulUser1 >> 0) & 0xff); macAddress[4] = ((ulUser1 >> 8) & 0xff); macAddress[5] = ((ulUser1 >> 16) & 0xff); - } else if (macAddress[0] == 0xff && macAddress[1] == 0xff - && macAddress[2] == 0xff && macAddress[3] == 0xff - && macAddress[4] == 0xff && macAddress[5] == 0xff) { + } else if (macAddress[0] == 0xff && macAddress[1] == 0xff && + macAddress[2] == 0xff && macAddress[3] == 0xff && + macAddress[4] == 0xff && macAddress[5] == 0xff) { System_printf("Change the macAddress variable to valid Mac address"); } -// GPIOPinConfigure(GPIO_PF0_EN0LED0); /* OC_CONNECT1_USR_D3 */ -// GPIOPinConfigure(GPIO_PF4_EN0LED1); /* OC_CONNECT1_USR_D4 */ -// GPIOPinTypeEthernetLED(GPIO_PORTF_BASE, GPIO_PIN_0 | GPIO_PIN_4); + // GPIOPinConfigure(GPIO_PF0_EN0LED0); /* OC_CONNECT1_USR_D3 */ + // GPIOPinConfigure(GPIO_PF4_EN0LED1); /* OC_CONNECT1_USR_D4 */ + // GPIOPinTypeEthernetLED(GPIO_PORTF_BASE, GPIO_PIN_0 | GPIO_PIN_4); /* Once EMAC_init is called, EMAC_config cannot be changed */ EMAC_init(); @@ -277,77 +273,69 @@ extern GPIO_PinConfig gpioPinConfigs[]; */ GPIO_PinConfig gpioPinConfigs[OC_EC_GPIOCOUNT] = { [OC_EC_SOC_UART3_TX] = - GPIOTiva_PA_5 | GPIO_CFG_IN_NOPULL | GPIO_CFG_IN_INT_BOTH_EDGES, + GPIOTiva_PA_5 | GPIO_CFG_IN_NOPULL | GPIO_CFG_IN_INT_BOTH_EDGES, [OC_EC_SDR_INA_ALERT] = - GPIOTiva_PD_2 | GPIO_CFG_IN_NOPULL | GPIO_CFG_IN_INT_FALLING, - [OC_EC_PWR_PSE_RESET] = - GPIOTiva_PD_3 | GPIO_CFG_OUT_STD | GPIO_CFG_OUT_STR_HIGH | GPIO_CFG_OUT_HIGH, - [OC_EC_PWR_PRSNT_SOLAR_AUX] = - GPIOTiva_PD_6 | GPIO_CFG_IN_PU , + GPIOTiva_PD_2 | GPIO_CFG_IN_NOPULL | GPIO_CFG_IN_INT_FALLING, + [OC_EC_PWR_PSE_RESET] = GPIOTiva_PD_3 | GPIO_CFG_OUT_STD | + GPIO_CFG_OUT_STR_HIGH | GPIO_CFG_OUT_HIGH, + [OC_EC_PWR_PRSNT_SOLAR_AUX] = GPIOTiva_PD_6 | GPIO_CFG_IN_PU, [OC_EC_SYNC_IOEXP_ALERT] = - GPIOTiva_PD_7 | GPIO_CFG_IN_PU | GPIO_CFG_IN_INT_FALLING, + GPIOTiva_PD_7 | GPIO_CFG_IN_PU | GPIO_CFG_IN_INT_FALLING, [OC_EC_GBC_IOEXP71_ALERT] = - GPIOTiva_PE_0 | GPIO_CFG_IN_NOPULL | GPIO_CFG_IN_INT_FALLING, - [OC_EC_FE_CONTROL] = - GPIOTiva_PE_1 | GPIO_CFG_OUT_STD | GPIO_CFG_OUT_STR_HIGH | GPIO_CFG_OUT_LOW, + GPIOTiva_PE_0 | GPIO_CFG_IN_NOPULL | GPIO_CFG_IN_INT_FALLING, + [OC_EC_FE_CONTROL] = GPIOTiva_PE_1 | GPIO_CFG_OUT_STD | + GPIO_CFG_OUT_STR_HIGH | GPIO_CFG_OUT_LOW, [OC_EC_GPP_AP_BM_1] = - GPIOTiva_PE_3 | GPIO_CFG_IN_NOPULL | GPIO_CFG_IN_INT_BOTH_EDGES, - [OC_EC_GPP_PMIC_CORE_PWR] = - GPIOTiva_PH_0 | GPIO_CFG_IN_PU , + GPIOTiva_PE_3 | GPIO_CFG_IN_NOPULL | GPIO_CFG_IN_INT_BOTH_EDGES, + [OC_EC_GPP_PMIC_CORE_PWR] = GPIOTiva_PH_0 | GPIO_CFG_IN_PU, [OC_EC_GPP_SOC_PLTRST] = - GPIOTiva_PH_1 | GPIO_CFG_IN_NOPULL | GPIO_CFG_IN_INT_BOTH_EDGES, - [OC_EC_GPP_PMIC_CTRL] = - GPIOTiva_PH_2 | GPIO_CFG_OUT_STD | GPIO_CFG_OUT_STR_HIGH | GPIO_CFG_OUT_LOW, + GPIOTiva_PH_1 | GPIO_CFG_IN_NOPULL | GPIO_CFG_IN_INT_BOTH_EDGES, + [OC_EC_GPP_PMIC_CTRL] = GPIOTiva_PH_2 | GPIO_CFG_OUT_STD | + GPIO_CFG_OUT_STR_HIGH | GPIO_CFG_OUT_LOW, [OC_EC_GBC_INA_ALERT] = - GPIOTiva_PH_3 | GPIO_CFG_IN_NOPULL | GPIO_CFG_IN_INT_FALLING, - [OC_EC_PWR_PD_NT2P] = - GPIOTiva_PJ_0 | GPIO_CFG_IN_PU , + GPIOTiva_PH_3 | GPIO_CFG_IN_NOPULL | GPIO_CFG_IN_INT_FALLING, + [OC_EC_PWR_PD_NT2P] = GPIOTiva_PJ_0 | GPIO_CFG_IN_PU, [OC_EC_GBC_AP_INA_ALERT] = - GPIOTiva_PJ_1 | GPIO_CFG_IN_NOPULL | GPIO_CFG_IN_INT_FALLING, + GPIOTiva_PJ_1 | GPIO_CFG_IN_NOPULL | GPIO_CFG_IN_INT_FALLING, [OC_EC_GBC_PSE_ALERT] = - GPIOTiva_PL_2 | GPIO_CFG_IN_NOPULL | GPIO_CFG_IN_INT_FALLING, + GPIOTiva_PL_2 | GPIO_CFG_IN_NOPULL | GPIO_CFG_IN_INT_FALLING, [OC_EC_GPP_AP_BM_2] = - GPIOTiva_PL_3 | GPIO_CFG_IN_NOPULL | GPIO_CFG_IN_INT_BOTH_EDGES, - [OC_EC_PWR_PRSNT_POE] = - GPIOTiva_PL_5 | GPIO_CFG_IN_PU , + GPIOTiva_PL_3 | GPIO_CFG_IN_NOPULL | GPIO_CFG_IN_INT_BOTH_EDGES, + [OC_EC_PWR_PRSNT_POE] = GPIOTiva_PL_5 | GPIO_CFG_IN_PU, [OC_EC_PWR_LION_ALERT] = - GPIOTiva_PM_0 | GPIO_CFG_IN_NOPULL | GPIO_CFG_IN_INT_FALLING, - [OC_EC_HCI_LED_RESET] = - GPIOTiva_PM_1 | GPIO_CFG_OUT_STD | GPIO_CFG_OUT_STR_HIGH | GPIO_CFG_OUT_HIGH, + GPIOTiva_PM_0 | GPIO_CFG_IN_NOPULL | GPIO_CFG_IN_INT_FALLING, + [OC_EC_HCI_LED_RESET] = GPIOTiva_PM_1 | GPIO_CFG_OUT_STD | + GPIO_CFG_OUT_STR_HIGH | GPIO_CFG_OUT_HIGH, [OC_EC_PWR_LACID_ALERT] = - GPIOTiva_PM_3 | GPIO_CFG_IN_NOPULL | GPIO_CFG_IN_INT_FALLING, + GPIOTiva_PM_3 | GPIO_CFG_IN_NOPULL | GPIO_CFG_IN_INT_FALLING, [OC_EC_RFFE_TEMP_INA_ALERT] = - GPIOTiva_PM_4 | GPIO_CFG_IN_NOPULL | GPIO_CFG_IN_INT_FALLING, - [OC_EC_ETH_SW_RESET] = - GPIOTiva_PM_5 | GPIO_CFG_OUT_STD | GPIO_CFG_OUT_STR_HIGH | GPIO_CFG_OUT_HIGH, - [OC_EC_PWR_BATT_SELECT] = - GPIOTiva_PM_7 | GPIO_CFG_OUT_STD | GPIO_CFG_OUT_STR_HIGH | GPIO_CFG_OUT_HIGH, + GPIOTiva_PM_4 | GPIO_CFG_IN_NOPULL | GPIO_CFG_IN_INT_FALLING, + [OC_EC_ETH_SW_RESET] = GPIOTiva_PM_5 | GPIO_CFG_OUT_STD | + GPIO_CFG_OUT_STR_HIGH | GPIO_CFG_OUT_HIGH, + [OC_EC_PWR_BATT_SELECT] = GPIOTiva_PM_7 | GPIO_CFG_OUT_STD | + GPIO_CFG_OUT_STR_HIGH | GPIO_CFG_OUT_HIGH, [OC_EC_PD_PWRGD_ALERT] = - GPIOTiva_PN_0 | GPIO_CFG_IN_NOPULL | GPIO_CFG_IN_INT_BOTH_EDGES, + GPIOTiva_PN_0 | GPIO_CFG_IN_NOPULL | GPIO_CFG_IN_INT_BOTH_EDGES, [OC_EC_SDR_FPGA_TEMP_INA_ALERT] = - GPIOTiva_PN_1 | GPIO_CFG_IN_NOPULL | GPIO_CFG_IN_INT_FALLING, - [OC_EC_SDR_PWR_GD] = - GPIOTiva_PN_3 | GPIO_CFG_IN_NOPULL, - [OC_EC_SDR_DEVICE_CONTROL] = - GPIOTiva_PN_2 | GPIO_CFG_OUT_STD | GPIO_CFG_OUT_STR_HIGH | GPIO_CFG_OUT_LOW, - [OC_EC_FE_PWR_GD] = - GPIOTiva_PN_4 | GPIO_CFG_IN_NOPULL, - [OC_EC_SDR_FE_IO_RESET_CTRL] = - GPIOTiva_PP_1 | GPIO_CFG_OUT_STD | GPIO_CFG_OUT_STR_HIGH | GPIO_CFG_OUT_LOW, - [OC_EC_SDR_PWR_CNTRL] = - GPIOTiva_PP_2 | GPIO_CFG_OUT_STD | GPIO_CFG_OUT_STR_HIGH | GPIO_CFG_OUT_LOW, - [OC_EC_GPP_PWRGD_PROTECTION] = - GPIOTiva_PP_3 | GPIO_CFG_IN_PU , - [OC_EC_RFFE_RESET] = - GPIOTiva_PP_4 | GPIO_CFG_OUT_STD | GPIO_CFG_OUT_STR_HIGH | GPIO_CFG_OUT_LOW, + GPIOTiva_PN_1 | GPIO_CFG_IN_NOPULL | GPIO_CFG_IN_INT_FALLING, + [OC_EC_SDR_PWR_GD] = GPIOTiva_PN_3 | GPIO_CFG_IN_NOPULL, + [OC_EC_SDR_DEVICE_CONTROL] = GPIOTiva_PN_2 | GPIO_CFG_OUT_STD | + GPIO_CFG_OUT_STR_HIGH | GPIO_CFG_OUT_LOW, + [OC_EC_FE_PWR_GD] = GPIOTiva_PN_4 | GPIO_CFG_IN_NOPULL, + [OC_EC_SDR_FE_IO_RESET_CTRL] = GPIOTiva_PP_1 | GPIO_CFG_OUT_STD | + GPIO_CFG_OUT_STR_HIGH | GPIO_CFG_OUT_LOW, + [OC_EC_SDR_PWR_CNTRL] = GPIOTiva_PP_2 | GPIO_CFG_OUT_STD | + GPIO_CFG_OUT_STR_HIGH | GPIO_CFG_OUT_LOW, + [OC_EC_GPP_PWRGD_PROTECTION] = GPIOTiva_PP_3 | GPIO_CFG_IN_PU, + [OC_EC_RFFE_RESET] = GPIOTiva_PP_4 | GPIO_CFG_OUT_STD | + GPIO_CFG_OUT_STR_HIGH | GPIO_CFG_OUT_LOW, [OC_EC_FE_TRXFE_CONN_RESET] = /* Watchdog nAO pin */ - GPIOTiva_PQ_0 | GPIO_CFG_IN_NOPULL, - [OC_EC_GPP_MSATA_DAS] = - GPIOTiva_PQ_1 | GPIO_CFG_IN_PU , - [OC_EC_GPP_RST_TO_PROC] = - GPIOTiva_PQ_3 | GPIO_CFG_OUT_STD | GPIO_CFG_OUT_STR_HIGH | GPIO_CFG_OUT_HIGH, - [OC_EC_SYNC_RESET] = - GPIOTiva_PQ_4 | GPIO_CFG_OUT_STD | GPIO_CFG_OUT_STR_HIGH | GPIO_CFG_OUT_HIGH, + GPIOTiva_PQ_0 | GPIO_CFG_IN_NOPULL, + [OC_EC_GPP_MSATA_DAS] = GPIOTiva_PQ_1 | GPIO_CFG_IN_PU, + [OC_EC_GPP_RST_TO_PROC] = GPIOTiva_PQ_3 | GPIO_CFG_OUT_STD | + GPIO_CFG_OUT_STR_HIGH | GPIO_CFG_OUT_HIGH, + [OC_EC_SYNC_RESET] = GPIOTiva_PQ_4 | GPIO_CFG_OUT_STD | + GPIO_CFG_OUT_STR_HIGH | GPIO_CFG_OUT_HIGH, }; /* @@ -359,15 +347,15 @@ GPIO_PinConfig gpioPinConfigs[OC_EC_GPIOCOUNT] = { * We have lots of RAM right now, so just set it to full size of * GPIO array */ -GPIO_CallbackFxn gpioCallbackFunctions[OC_EC_GPIOCOUNT] = { }; +GPIO_CallbackFxn gpioCallbackFunctions[OC_EC_GPIOCOUNT] = {}; /* The device-specific GPIO_config structure */ const GPIOTiva_Config GPIOTiva_config = { - .pinConfigs = (GPIO_PinConfig *) gpioPinConfigs, - .callbacks = (GPIO_CallbackFxn *) gpioCallbackFunctions, + .pinConfigs = (GPIO_PinConfig *)gpioPinConfigs, + .callbacks = (GPIO_CallbackFxn *)gpioCallbackFunctions, .numberOfPinConfigs = sizeof(gpioPinConfigs) / sizeof(GPIO_PinConfig), - .numberOfCallbacks = sizeof(gpioCallbackFunctions) / - sizeof(GPIO_CallbackFxn), + .numberOfCallbacks = + sizeof(gpioCallbackFunctions) / sizeof(GPIO_CallbackFxn), .intPriority = (~0) }; @@ -386,7 +374,7 @@ OcGpio_Port gbc_io_0; OcGpio_Port sdr_fx3_io; //OcGpio_Port sdr_eeprom_wp_io; OcGpio_Port fe_ch1_gain_io; -OcGpio_Port fe_ch2_gain_io ; +OcGpio_Port fe_ch2_gain_io; OcGpio_Port fe_ch1_lna_io; OcGpio_Port fe_ch2_lna_io; OcGpio_Port fe_watchdog_io; @@ -398,27 +386,31 @@ OcGpio_Port ec_io = { OcGpio_Port gbc_io_0 = { .fn_table = &GpioSX1509_fnTable, - .cfg = &(SX1509_Cfg) { - .i2c_dev = { OC_CONNECT1_I2C6, BIGBROTHER_IOEXP0_ADDRESS }, - .pin_irq = &(OcGpio_Pin){ &ec_io, OC_EC_GBC_IOEXP71_ALERT }, - }, + .cfg = + &(SX1509_Cfg){ + .i2c_dev = { OC_CONNECT1_I2C6, BIGBROTHER_IOEXP0_ADDRESS }, + .pin_irq = &(OcGpio_Pin){ &ec_io, OC_EC_GBC_IOEXP71_ALERT }, + }, .object_data = &(SX1509_Obj){}, }; OcGpio_Port gbc_io_1 = { .fn_table = &GpioSX1509_fnTable, - .cfg = &(SX1509_Cfg) { - .i2c_dev = { OC_CONNECT1_I2C6, BIGBROTHER_IOEXP1_ADDRESS }, - .pin_irq = NULL, /* This IO expander doesn't provide interrupts */ - }, + .cfg = + &(SX1509_Cfg){ + .i2c_dev = { OC_CONNECT1_I2C6, BIGBROTHER_IOEXP1_ADDRESS }, + .pin_irq = + NULL, /* This IO expander doesn't provide interrupts */ + }, .object_data = &(SX1509_Obj){}, }; OcGpio_Port sdr_fx3_io = { .fn_table = &GpioPCA9557_fnTable, - .cfg = &(PCA9557_Cfg) { - .i2c_dev = { OC_CONNECT1_I2C3, SDR_FX3_IOEXP_ADDRESS }, - }, + .cfg = + &(PCA9557_Cfg){ + .i2c_dev = { OC_CONNECT1_I2C3, SDR_FX3_IOEXP_ADDRESS }, + }, .object_data = &(PCA9557_Obj){}, }; @@ -433,50 +425,61 @@ OcGpio_Port sdr_fx3_io = { OcGpio_Port fe_ch1_gain_io = { .fn_table = &GpioPCA9557_fnTable, - .cfg = &(PCA9557_Cfg) { - .i2c_dev = { OC_CONNECT1_I2C2, RFFE_CHANNEL1_IO_TX_ATTEN_ADDR }, - }, + .cfg = + &(PCA9557_Cfg){ + .i2c_dev = { OC_CONNECT1_I2C2, + RFFE_CHANNEL1_IO_TX_ATTEN_ADDR }, + }, .object_data = &(PCA9557_Obj){}, }; OcGpio_Port fe_ch2_gain_io = { .fn_table = &GpioPCA9557_fnTable, - .cfg = &(PCA9557_Cfg) { - .i2c_dev = { OC_CONNECT1_I2C2, RFFE_CHANNEL2_IO_TX_ATTEN_ADDR }, - }, + .cfg = + &(PCA9557_Cfg){ + .i2c_dev = { OC_CONNECT1_I2C2, + RFFE_CHANNEL2_IO_TX_ATTEN_ADDR }, + }, .object_data = &(PCA9557_Obj){}, }; OcGpio_Port fe_ch1_lna_io = { .fn_table = &GpioPCA9557_fnTable, - .cfg = &(PCA9557_Cfg) { - .i2c_dev = { OC_CONNECT1_I2C2, RFFE_CHANNEL1_IO_RX_ATTEN_ADDR }, - }, + .cfg = + &(PCA9557_Cfg){ + .i2c_dev = { OC_CONNECT1_I2C2, + RFFE_CHANNEL1_IO_RX_ATTEN_ADDR }, + }, .object_data = &(PCA9557_Obj){}, }; OcGpio_Port fe_ch2_lna_io = { .fn_table = &GpioPCA9557_fnTable, - .cfg = &(PCA9557_Cfg) { - .i2c_dev = { OC_CONNECT1_I2C2, RFFE_CHANNEL2_IO_RX_ATTEN_ADDR }, - }, + .cfg = + &(PCA9557_Cfg){ + .i2c_dev = { OC_CONNECT1_I2C2, + RFFE_CHANNEL2_IO_RX_ATTEN_ADDR }, + }, .object_data = &(PCA9557_Obj){}, }; OcGpio_Port fe_watchdog_io = { .fn_table = &GpioPCA9557_fnTable, - .cfg = &(PCA9557_Cfg) { - .i2c_dev = { OC_CONNECT1_I2C2, RFFE_IO_REVPOWER_ALERT_ADDR }, - }, + .cfg = + &(PCA9557_Cfg){ + .i2c_dev = { OC_CONNECT1_I2C2, + RFFE_IO_REVPOWER_ALERT_ADDR }, + }, .object_data = &(PCA9557_Obj){}, }; -OcGpio_Port sync_io = { +OcGpio_Port sync_io = { .fn_table = &GpioSX1509_fnTable, - .cfg = &(SX1509_Cfg) { - .i2c_dev = { OC_CONNECT1_I2C7, SYNC_IO_DEVICE_ADDR }, - .pin_irq = &(OcGpio_Pin){ &ec_io, OC_EC_SYNC_IOEXP_ALERT }, - }, + .cfg = + &(SX1509_Cfg){ + .i2c_dev = { OC_CONNECT1_I2C7, SYNC_IO_DEVICE_ADDR }, + .pin_irq = &(OcGpio_Pin){ &ec_io, OC_EC_SYNC_IOEXP_ALERT }, + }, .object_data = &(SX1509_Obj){}, }; @@ -506,89 +509,57 @@ void OC_CONNECT1_initGPIO(void) I2CTiva_Object i2cTivaObjects[OC_CONNECT1_I2CCOUNT]; const I2CTiva_HWAttrs i2cTivaHWAttrs[OC_CONNECT1_I2CCOUNT] = { - [OC_CONNECT1_I2C0] = { - .baseAddr = I2C0_BASE, - .intNum = INT_I2C0, - .intPriority = (~0) - }, - [OC_CONNECT1_I2C1] = { - .baseAddr = I2C1_BASE, - .intNum = INT_I2C1, - .intPriority = (~0) - }, - [OC_CONNECT1_I2C2] = { - .baseAddr = I2C2_BASE, - .intNum = INT_I2C2, - .intPriority = (~0) - }, - [OC_CONNECT1_I2C3] = { - .baseAddr = I2C3_BASE, - .intNum = INT_I2C3, - .intPriority = (~0) - }, - [OC_CONNECT1_I2C4] = { - .baseAddr = I2C4_BASE, - .intNum = INT_I2C4, - .intPriority = (~0) - }, - [OC_CONNECT1_I2C6] = { - .baseAddr = I2C6_BASE, - .intNum = INT_I2C6, - .intPriority = (~0) - }, - [OC_CONNECT1_I2C7] = { - .baseAddr = I2C7_BASE, - .intNum = INT_I2C7, - .intPriority = (~0) - }, - [OC_CONNECT1_I2C8] = { - .baseAddr = I2C8_BASE, - .intNum = INT_I2C8, - .intPriority = (~0) - }, + [OC_CONNECT1_I2C0] = { .baseAddr = I2C0_BASE, + .intNum = INT_I2C0, + .intPriority = (~0) }, + [OC_CONNECT1_I2C1] = { .baseAddr = I2C1_BASE, + .intNum = INT_I2C1, + .intPriority = (~0) }, + [OC_CONNECT1_I2C2] = { .baseAddr = I2C2_BASE, + .intNum = INT_I2C2, + .intPriority = (~0) }, + [OC_CONNECT1_I2C3] = { .baseAddr = I2C3_BASE, + .intNum = INT_I2C3, + .intPriority = (~0) }, + [OC_CONNECT1_I2C4] = { .baseAddr = I2C4_BASE, + .intNum = INT_I2C4, + .intPriority = (~0) }, + [OC_CONNECT1_I2C6] = { .baseAddr = I2C6_BASE, + .intNum = INT_I2C6, + .intPriority = (~0) }, + [OC_CONNECT1_I2C7] = { .baseAddr = I2C7_BASE, + .intNum = INT_I2C7, + .intPriority = (~0) }, + [OC_CONNECT1_I2C8] = { .baseAddr = I2C8_BASE, + .intNum = INT_I2C8, + .intPriority = (~0) }, }; const I2C_Config I2C_config[] = { - [OC_CONNECT1_I2C0] = { - .fxnTablePtr = &I2CTiva_fxnTable, - .object = &i2cTivaObjects[OC_CONNECT1_I2C0], - .hwAttrs = &i2cTivaHWAttrs[OC_CONNECT1_I2C0] - }, - [OC_CONNECT1_I2C1] = { - .fxnTablePtr = &I2CTiva_fxnTable, - .object = &i2cTivaObjects[OC_CONNECT1_I2C1], - .hwAttrs = &i2cTivaHWAttrs[OC_CONNECT1_I2C1] - }, - [OC_CONNECT1_I2C2] = { - .fxnTablePtr = &I2CTiva_fxnTable, - .object = &i2cTivaObjects[OC_CONNECT1_I2C2], - .hwAttrs = &i2cTivaHWAttrs[OC_CONNECT1_I2C2] - }, - [OC_CONNECT1_I2C3] = { - .fxnTablePtr = &I2CTiva_fxnTable, - .object = &i2cTivaObjects[OC_CONNECT1_I2C3], - .hwAttrs = &i2cTivaHWAttrs[OC_CONNECT1_I2C3] - }, - [OC_CONNECT1_I2C4] = { - .fxnTablePtr = &I2CTiva_fxnTable, - .object = &i2cTivaObjects[OC_CONNECT1_I2C4], - .hwAttrs = &i2cTivaHWAttrs[OC_CONNECT1_I2C4] - }, - [OC_CONNECT1_I2C6] = { - .fxnTablePtr = &I2CTiva_fxnTable, - .object = &i2cTivaObjects[OC_CONNECT1_I2C6], - .hwAttrs = &i2cTivaHWAttrs[OC_CONNECT1_I2C6] - }, - [OC_CONNECT1_I2C7] = { - .fxnTablePtr = &I2CTiva_fxnTable, - .object = &i2cTivaObjects[OC_CONNECT1_I2C7], - .hwAttrs = &i2cTivaHWAttrs[OC_CONNECT1_I2C7] - }, - [OC_CONNECT1_I2C8] = { - .fxnTablePtr = &I2CTiva_fxnTable, - .object = &i2cTivaObjects[OC_CONNECT1_I2C8], - .hwAttrs = &i2cTivaHWAttrs[OC_CONNECT1_I2C8] - }, + [OC_CONNECT1_I2C0] = { .fxnTablePtr = &I2CTiva_fxnTable, + .object = &i2cTivaObjects[OC_CONNECT1_I2C0], + .hwAttrs = &i2cTivaHWAttrs[OC_CONNECT1_I2C0] }, + [OC_CONNECT1_I2C1] = { .fxnTablePtr = &I2CTiva_fxnTable, + .object = &i2cTivaObjects[OC_CONNECT1_I2C1], + .hwAttrs = &i2cTivaHWAttrs[OC_CONNECT1_I2C1] }, + [OC_CONNECT1_I2C2] = { .fxnTablePtr = &I2CTiva_fxnTable, + .object = &i2cTivaObjects[OC_CONNECT1_I2C2], + .hwAttrs = &i2cTivaHWAttrs[OC_CONNECT1_I2C2] }, + [OC_CONNECT1_I2C3] = { .fxnTablePtr = &I2CTiva_fxnTable, + .object = &i2cTivaObjects[OC_CONNECT1_I2C3], + .hwAttrs = &i2cTivaHWAttrs[OC_CONNECT1_I2C3] }, + [OC_CONNECT1_I2C4] = { .fxnTablePtr = &I2CTiva_fxnTable, + .object = &i2cTivaObjects[OC_CONNECT1_I2C4], + .hwAttrs = &i2cTivaHWAttrs[OC_CONNECT1_I2C4] }, + [OC_CONNECT1_I2C6] = { .fxnTablePtr = &I2CTiva_fxnTable, + .object = &i2cTivaObjects[OC_CONNECT1_I2C6], + .hwAttrs = &i2cTivaHWAttrs[OC_CONNECT1_I2C6] }, + [OC_CONNECT1_I2C7] = { .fxnTablePtr = &I2CTiva_fxnTable, + .object = &i2cTivaObjects[OC_CONNECT1_I2C7], + .hwAttrs = &i2cTivaHWAttrs[OC_CONNECT1_I2C7] }, + [OC_CONNECT1_I2C8] = { .fxnTablePtr = &I2CTiva_fxnTable, + .object = &i2cTivaObjects[OC_CONNECT1_I2C8], + .hwAttrs = &i2cTivaHWAttrs[OC_CONNECT1_I2C8] }, { NULL, NULL, NULL } }; @@ -701,22 +672,19 @@ void OC_CONNECT1_initI2C(void) UARTTivaDMA_Object uartTivaObjects[OC_CONNECT1_UARTCOUNT]; -const UARTTivaDMA_HWAttrs uartTivaHWAttrs[OC_CONNECT1_UARTCOUNT] = { - [OC_CONNECT1_UART3] = { - .baseAddr = UART0_BASE, - .intNum = INT_UART0, - .intPriority = (~0), - .rxChannelIndex = UDMA_CH8_UART0RX, - .txChannelIndex = UDMA_CH9_UART0TX, - } -}; +const UARTTivaDMA_HWAttrs uartTivaHWAttrs[OC_CONNECT1_UARTCOUNT] = + { [OC_CONNECT1_UART3] = { + .baseAddr = UART0_BASE, + .intNum = INT_UART0, + .intPriority = (~0), + .rxChannelIndex = UDMA_CH8_UART0RX, + .txChannelIndex = UDMA_CH9_UART0TX, + } }; const UART_Config UART_config[] = { - [OC_CONNECT1_UART3] = { - .fxnTablePtr = &UARTTivaDMA_fxnTable, - .object = &uartTivaObjects[0], - .hwAttrs = &uartTivaHWAttrs[0] - }, + [OC_CONNECT1_UART3] = { .fxnTablePtr = &UARTTivaDMA_fxnTable, + .object = &uartTivaObjects[0], + .hwAttrs = &uartTivaHWAttrs[0] }, { NULL, NULL, NULL } }; #else @@ -732,30 +700,24 @@ unsigned char XR20M1170RingBuffer[1][64]; // TODO: probably more efficient to use DMA drivers const UARTTiva_HWAttrs uartTivaHWAttrs[] = { - { - .baseAddr = UART0_BASE, - .intNum = INT_UART0, - .intPriority = (~0), - .flowControl = UART_FLOWCONTROL_NONE, - .ringBufPtr = uartTivaRingBuffer[0], - .ringBufSize = sizeof(uartTivaRingBuffer[0]) - }, - { - .baseAddr = UART3_BASE, - .intNum = INT_UART3, - .intPriority = (~0), - .flowControl = UART_FLOWCONTROL_NONE, - .ringBufPtr = uartTivaRingBuffer[1], - .ringBufSize = sizeof(uartTivaRingBuffer[1]) - }, - { - .baseAddr = UART4_BASE, - .intNum = INT_UART4, - .intPriority = (~0), - .flowControl = UART_FLOWCONTROL_RX | UART_FLOWCONTROL_TX, - .ringBufPtr = uartTivaRingBuffer[2], - .ringBufSize = sizeof(uartTivaRingBuffer[2]) - }, + { .baseAddr = UART0_BASE, + .intNum = INT_UART0, + .intPriority = (~0), + .flowControl = UART_FLOWCONTROL_NONE, + .ringBufPtr = uartTivaRingBuffer[0], + .ringBufSize = sizeof(uartTivaRingBuffer[0]) }, + { .baseAddr = UART3_BASE, + .intNum = INT_UART3, + .intPriority = (~0), + .flowControl = UART_FLOWCONTROL_NONE, + .ringBufPtr = uartTivaRingBuffer[1], + .ringBufSize = sizeof(uartTivaRingBuffer[1]) }, + { .baseAddr = UART4_BASE, + .intNum = INT_UART4, + .intPriority = (~0), + .flowControl = UART_FLOWCONTROL_RX | UART_FLOWCONTROL_TX, + .ringBufPtr = uartTivaRingBuffer[2], + .ringBufSize = sizeof(uartTivaRingBuffer[2]) }, }; // TODO: flow control settings @@ -768,11 +730,12 @@ const XR20M1170_HWAttrs XR20M1170HWAttrs = { // i2c bit rate // uart interrupt .i2cIndex = OC_CONNECT1_I2C7, - .i2cSlaveAddress = 0x60 >> 1, // TODO: i2c driver uses 7-bit address...sort of annoying + .i2cSlaveAddress = + 0x60 >> 1, // TODO: i2c driver uses 7-bit address...sort of annoying .xtal1_freq = 14745600, // 14.7456 MHz .pin_irq = &(OcGpio_Pin){ &gbc_io_0, 0, OCGPIO_CFG_IN_PU }, .flowControl = XR20M1170_FLOWCONTROL_TX | XR20M1170_FLOWCONTROL_RX, - .ringBufPtr = XR20M1170RingBuffer[0], + .ringBufPtr = XR20M1170RingBuffer[0], .ringBufSize = sizeof(XR20M1170RingBuffer[0]), }; @@ -783,31 +746,24 @@ const UartMon_Cfg uart_mon_cfg = { }; const UART_Config UART_config[OC_CONNECT1_UARTCOUNT + 1] = { - [OC_CONNECT1_UART0] = { - .fxnTablePtr = &UARTTiva_fxnTable, - .object = &uartTivaObjects[0], - .hwAttrs = &uartTivaHWAttrs[0] - }, - [OC_CONNECT1_UART3] = { - .fxnTablePtr = &UARTTiva_fxnTable, - .object = &uartTivaObjects[1], - .hwAttrs = &uartTivaHWAttrs[1] - }, - [OC_CONNECT1_UART4] = { - .fxnTablePtr = &UARTTiva_fxnTable, - .object = &uartTivaObjects[2], - .hwAttrs = &uartTivaHWAttrs[2] - }, - [OC_CONNECT1_UARTXR0] = { - .fxnTablePtr = &XR20M1170_fxnTable, - .object = &XR20M1170Objects, - .hwAttrs = &XR20M1170HWAttrs - }, - [OC_CONNECT1_UARTMON] = { - .fxnTablePtr = &UartMon_fxnTable, - .object = &uart_mon_obj, - .hwAttrs = &uart_mon_cfg, - }, + [OC_CONNECT1_UART0] = { .fxnTablePtr = &UARTTiva_fxnTable, + .object = &uartTivaObjects[0], + .hwAttrs = &uartTivaHWAttrs[0] }, + [OC_CONNECT1_UART3] = { .fxnTablePtr = &UARTTiva_fxnTable, + .object = &uartTivaObjects[1], + .hwAttrs = &uartTivaHWAttrs[1] }, + [OC_CONNECT1_UART4] = { .fxnTablePtr = &UARTTiva_fxnTable, + .object = &uartTivaObjects[2], + .hwAttrs = &uartTivaHWAttrs[2] }, + [OC_CONNECT1_UARTXR0] = { .fxnTablePtr = &XR20M1170_fxnTable, + .object = &XR20M1170Objects, + .hwAttrs = &XR20M1170HWAttrs }, + [OC_CONNECT1_UARTMON] = + { + .fxnTablePtr = &UartMon_fxnTable, + .object = &uart_mon_obj, + .hwAttrs = &uart_mon_cfg, + }, { NULL, NULL, NULL } }; @@ -837,8 +793,8 @@ void OC_CONNECT1_initUART(void) GPIOPinConfigure(GPIO_PK1_U4TX); GPIOPinConfigure(GPIO_PK2_U4RTS); GPIOPinConfigure(GPIO_PK3_U4CTS); - GPIOPinTypeUART(GPIO_PORTK_BASE, GPIO_PIN_0 | GPIO_PIN_1 | GPIO_PIN_2 | - GPIO_PIN_3); + GPIOPinTypeUART(GPIO_PORTK_BASE, + GPIO_PIN_0 | GPIO_PIN_1 | GPIO_PIN_2 | GPIO_PIN_3); /* Initialize the UART driver */ #if TI_DRIVERS_UART_DMA @@ -896,8 +852,7 @@ void OC_CONNECT1_initUSB(OC_CONNECT1_USBMode usbMode) * program. PQ4 is active low; set the pin as input with a weak * pull-up. */ - GPIOPadConfigSet(GPIO_PORTQ_BASE, GPIO_PIN_4, - GPIO_STRENGTH_2MA, + GPIOPadConfigSet(GPIO_PORTQ_BASE, GPIO_PIN_4, GPIO_STRENGTH_2MA, GPIO_PIN_TYPE_STD_WPU); GPIOIntTypeSet(GPIO_PORTQ_BASE, GPIO_PIN_4, GPIO_FALLING_EDGE); GPIOIntClear(GPIO_PORTQ_BASE, GPIO_PIN_4); @@ -928,20 +883,21 @@ void OC_CONNECT1_initUSB(OC_CONNECT1_USBMode usbMode) WatchdogTiva_Object watchdogTivaObjects[OC_CONNECT1_WATCHDOGCOUNT]; const WatchdogTiva_HWAttrs watchdogTivaHWAttrs[OC_CONNECT1_WATCHDOGCOUNT] = { - [OC_CONNECT1_WATCHDOG0] = { - .baseAddr = WATCHDOG0_BASE, - .intNum = INT_WATCHDOG, - .intPriority = (~0), - .reloadValue = 80000000 // 1 second period at default CPU clock freq - }, + [OC_CONNECT1_WATCHDOG0] = + { + .baseAddr = WATCHDOG0_BASE, + .intNum = INT_WATCHDOG, + .intPriority = (~0), + .reloadValue = + 80000000 // 1 second period at default CPU clock freq + }, }; const Watchdog_Config Watchdog_config[] = { - [OC_CONNECT1_WATCHDOG0] = { - .fxnTablePtr = &WatchdogTiva_fxnTable, - .object = &watchdogTivaObjects[OC_CONNECT1_WATCHDOG0], - .hwAttrs = &watchdogTivaHWAttrs[OC_CONNECT1_WATCHDOG0] - }, + [OC_CONNECT1_WATCHDOG0] = + { .fxnTablePtr = &WatchdogTiva_fxnTable, + .object = &watchdogTivaObjects[OC_CONNECT1_WATCHDOG0], + .hwAttrs = &watchdogTivaHWAttrs[OC_CONNECT1_WATCHDOG0] }, { NULL, NULL, NULL }, }; diff --git a/firmware/ec/platform/oc-sdr/cfg/OC_CONNECT_FE.c b/firmware/ec/platform/oc-sdr/cfg/OC_CONNECT_FE.c index 5945373ba4..2944a2b782 100644 --- a/firmware/ec/platform/oc-sdr/cfg/OC_CONNECT_FE.c +++ b/firmware/ec/platform/oc-sdr/cfg/OC_CONNECT_FE.c @@ -42,27 +42,31 @@ Eeprom_Cfg eeprom_fe_inv = { // FE Channel 1 Power sensor. INA226_Dev fe_ch1_ps_5_7v = { /* CH1 5.7V Sensor */ - .cfg = { - .dev = { - .bus = OC_CONNECT1_I2C4, - .slave_addr = RFFE_INA226_CH1_5_7V_ADDR, - }, - .pin_alert = &(OcGpio_Pin){ &ec_io, - OC_EC_RFFE_TEMP_INA_ALERT }, - }, + .cfg = + { + .dev = + { + .bus = OC_CONNECT1_I2C4, + .slave_addr = RFFE_INA226_CH1_5_7V_ADDR, + }, + .pin_alert = + &(OcGpio_Pin){ &ec_io, OC_EC_RFFE_TEMP_INA_ALERT }, + }, }; //FE Channel 2 Power sensor. INA226_Dev fe_ch2_ps_5_7v = { /* CH2 5.7V Sensor */ - .cfg = { - .dev = { - .bus = OC_CONNECT1_I2C4, - .slave_addr = RFFE_INA226_CH2_5_7V_ADDR, - }, - .pin_alert = &(OcGpio_Pin){ &ec_io, - OC_EC_RFFE_TEMP_INA_ALERT }, - }, + .cfg = + { + .dev = + { + .bus = OC_CONNECT1_I2C4, + .slave_addr = RFFE_INA226_CH2_5_7V_ADDR, + }, + .pin_alert = + &(OcGpio_Pin){ &ec_io, OC_EC_RFFE_TEMP_INA_ALERT }, + }, }; //FE Channel 1 temperature sensor. @@ -73,23 +77,23 @@ I2C_Dev fe_ch1_ts = { //FE Channel 2 temperature sensor. I2C_Dev fe_ch2_ts = (I2C_Dev){ - .bus = OC_CONNECT1_I2C4, - .slave_addr = RFFE_CH2_TEMP_SENSOR_ADDR, + .bus = OC_CONNECT1_I2C4, + .slave_addr = RFFE_CH2_TEMP_SENSOR_ADDR, }; //FE EEPROM inventory -void* fe_eeprom_inventory = &eeprom_fe_inv; +void *fe_eeprom_inventory = &eeprom_fe_inv; //FE Channel 1 ADC I2C_Dev fe_ch1_ads7830 = { - .bus = OC_CONNECT1_I2C4, - .slave_addr = RFFE_CHANNEL1_ADC_ADDR, + .bus = OC_CONNECT1_I2C4, + .slave_addr = RFFE_CHANNEL1_ADC_ADDR, }; //FE Channel 2 ADC I2C_Dev fe_ch2_ads7830 = { - .bus = OC_CONNECT1_I2C4, - .slave_addr = RFFE_CHANNEL2_ADC_ADDR, + .bus = OC_CONNECT1_I2C4, + .slave_addr = RFFE_CHANNEL2_ADC_ADDR, }; Fe_Gain_Cfg fe_ch1_gain = { @@ -98,111 +102,111 @@ Fe_Gain_Cfg fe_ch1_gain = { /* CH1_TX_ATTN_P5DB */ .pin_tx_attn_p5db = { &fe_ch1_gain_io, 2 }, /* CH1_TX_ATTN_1DB */ - .pin_tx_attn_1db = { &fe_ch1_gain_io, 3 }, + .pin_tx_attn_1db = { &fe_ch1_gain_io, 3 }, /* CH1_TX_ATTN_2DB */ - .pin_tx_attn_2db = { &fe_ch1_gain_io, 4 }, + .pin_tx_attn_2db = { &fe_ch1_gain_io, 4 }, /* CH1_TX_ATTN_4DB */ - .pin_tx_attn_4db = { &fe_ch1_gain_io, 5 }, + .pin_tx_attn_4db = { &fe_ch1_gain_io, 5 }, /* CH1_TX_ATTN_8DB */ - .pin_tx_attn_8db = { &fe_ch1_gain_io, 6 }, + .pin_tx_attn_8db = { &fe_ch1_gain_io, 6 }, /* CH1_TX_ATTN_ENB */ - .pin_tx_attn_enb = { &fe_ch1_gain_io, 7 }, + .pin_tx_attn_enb = { &fe_ch1_gain_io, 7 }, }; Fe_Gain_Cfg fe_ch2_gain = { - /* CH2_TX_ATTN_16DB */ - .pin_tx_attn_16db = { &fe_ch2_gain_io, 1 }, - /* CH2_TX_ATTN_P5DB */ - .pin_tx_attn_p5db = { &fe_ch2_gain_io, 2 }, - /* CH2_TX_ATTN_1DB */ - .pin_tx_attn_1db = { &fe_ch2_gain_io, 3 }, - /* CH2_TX_ATTN_2DB */ - .pin_tx_attn_2db = { &fe_ch2_gain_io, 4 }, - /* CH2_TX_ATTN_4DB */ - .pin_tx_attn_4db = { &fe_ch2_gain_io, 5 }, - /* CH2_TX_ATTN_8DB */ - .pin_tx_attn_8db = { &fe_ch2_gain_io, 6 }, - /* CH2_TX_ATTN_ENB */ - .pin_tx_attn_enb = { &fe_ch2_gain_io, 7 }, + /* CH2_TX_ATTN_16DB */ + .pin_tx_attn_16db = { &fe_ch2_gain_io, 1 }, + /* CH2_TX_ATTN_P5DB */ + .pin_tx_attn_p5db = { &fe_ch2_gain_io, 2 }, + /* CH2_TX_ATTN_1DB */ + .pin_tx_attn_1db = { &fe_ch2_gain_io, 3 }, + /* CH2_TX_ATTN_2DB */ + .pin_tx_attn_2db = { &fe_ch2_gain_io, 4 }, + /* CH2_TX_ATTN_4DB */ + .pin_tx_attn_4db = { &fe_ch2_gain_io, 5 }, + /* CH2_TX_ATTN_8DB */ + .pin_tx_attn_8db = { &fe_ch2_gain_io, 6 }, + /* CH2_TX_ATTN_ENB */ + .pin_tx_attn_enb = { &fe_ch2_gain_io, 7 }, }; Fe_Lna_Cfg fe_ch1_lna = { /* CH1_RX_ATTN_P5DB */ .pin_rx_attn_p5db = { &fe_ch1_lna_io, 2 }, /* CH1_RX_ATTN_1DB */ - .pin_rx_attn_1db = { &fe_ch1_lna_io, 3 }, + .pin_rx_attn_1db = { &fe_ch1_lna_io, 3 }, /* CH1_RX_ATTN_2DB */ - .pin_rx_attn_2db = { &fe_ch1_lna_io, 4 }, + .pin_rx_attn_2db = { &fe_ch1_lna_io, 4 }, /* CH1_RX_ATTN_4DB */ - .pin_rx_attn_4db = { &fe_ch1_lna_io, 5 }, + .pin_rx_attn_4db = { &fe_ch1_lna_io, 5 }, /* CH1_RX_ATTN_8DB */ - .pin_rx_attn_8db = { &fe_ch1_lna_io, 6 }, + .pin_rx_attn_8db = { &fe_ch1_lna_io, 6 }, /* CH1_RX_ATTN_ENB */ - .pin_rx_attn_enb = { &fe_ch1_lna_io, 7 }, + .pin_rx_attn_enb = { &fe_ch1_lna_io, 7 }, }; Fe_Lna_Cfg fe_ch2_lna = { /* CH2_RX_ATTN_P5DB */ .pin_rx_attn_p5db = { &fe_ch2_lna_io, 2 }, /* CH2_RX_ATTN_1DB */ - .pin_rx_attn_1db = { &fe_ch2_lna_io, 3 }, + .pin_rx_attn_1db = { &fe_ch2_lna_io, 3 }, /* CH2_RX_ATTN_2DB */ - .pin_rx_attn_2db = { &fe_ch2_lna_io, 4 }, + .pin_rx_attn_2db = { &fe_ch2_lna_io, 4 }, /* CH2_RX_ATTN_4DB */ - .pin_rx_attn_4db = { &fe_ch2_lna_io, 5 }, + .pin_rx_attn_4db = { &fe_ch2_lna_io, 5 }, /* CH2_RX_ATTN_8DB */ - .pin_rx_attn_8db = { &fe_ch2_lna_io, 6 }, + .pin_rx_attn_8db = { &fe_ch2_lna_io, 6 }, /* CH2_RX_ATTN_ENB */ - .pin_rx_attn_enb = { &fe_ch2_lna_io, 7 }, + .pin_rx_attn_enb = { &fe_ch2_lna_io, 7 }, }; //FE watch dog Fe_Watchdog_Cfg fe_watchdog_cfg = { /* AOSEL_FPGA */ - .pin_aosel_fpga = { &fe_watchdog_io, 0 }, + .pin_aosel_fpga = { &fe_watchdog_io, 0 }, /* CH2_RF_PWR_OFF */ .pin_ch2_rf_pwr_off = { &fe_watchdog_io, 1 }, /* CO6_WD */ - .pin_co6_wd = { &fe_watchdog_io, 2 }, + .pin_co6_wd = { &fe_watchdog_io, 2 }, /* CO5_WD */ - .pin_co5_wd = { &fe_watchdog_io, 3 }, + .pin_co5_wd = { &fe_watchdog_io, 3 }, /* CO4_WD */ - .pin_co4_wd = { &fe_watchdog_io, 4 }, + .pin_co4_wd = { &fe_watchdog_io, 4 }, /* CO3_WD */ - .pin_co3_wd = { &fe_watchdog_io, 5 }, + .pin_co3_wd = { &fe_watchdog_io, 5 }, /* CO2_WD */ - .pin_co2_wd = { &fe_watchdog_io, 6 }, + .pin_co2_wd = { &fe_watchdog_io, 6 }, /* COPOL_FPGA */ - .pin_copol_fpga = { &fe_watchdog_io, 7 }, + .pin_copol_fpga = { &fe_watchdog_io, 7 }, }; Fe_gpioCfg fe_gpiocfg = { - /* EC_TRXFECONN_GPIO3/RF_PGOOD_LDO */ - .pin_rf_pgood_ldo = { &ec_io, OC_EC_FE_PWR_GD }, - /* FE_12V_CTRL */ - .pin_fe_12v_ctrl = { &ec_io, OC_EC_FE_CONTROL }, - .pin_trxfe_conn_reset = { &ec_io, OC_EC_FE_TRXFE_CONN_RESET }, + /* EC_TRXFECONN_GPIO3/RF_PGOOD_LDO */ + .pin_rf_pgood_ldo = { &ec_io, OC_EC_FE_PWR_GD }, + /* FE_12V_CTRL */ + .pin_fe_12v_ctrl = { &ec_io, OC_EC_FE_CONTROL }, + .pin_trxfe_conn_reset = { &ec_io, OC_EC_FE_TRXFE_CONN_RESET }, }; //FE Ch1 TX Gain control -Fe_Ch1_Gain_Cfg fe_ch1_tx_gain_cfg = (Fe_Ch1_Gain_Cfg) { +Fe_Ch1_Gain_Cfg fe_ch1_tx_gain_cfg = (Fe_Ch1_Gain_Cfg){ .fe_gain_cfg = &fe_ch1_gain, }; //FE Ch2 TX Gain control -Fe_Ch2_Gain_Cfg fe_ch2_tx_gain_cfg = (Fe_Ch2_Gain_Cfg) { +Fe_Ch2_Gain_Cfg fe_ch2_tx_gain_cfg = (Fe_Ch2_Gain_Cfg){ /* CH1_2G_LB_BAND_SEL_L */ .pin_ch1_2g_lb_band_sel_l = { &fe_ch2_gain_io, 0 }, .fe_gain_cfg = &fe_ch2_gain, }; //FE Ch1 LNA config -Fe_Ch1_Lna_Cfg fe_ch1_rx_gain_cfg = (Fe_Ch1_Lna_Cfg) { +Fe_Ch1_Lna_Cfg fe_ch1_rx_gain_cfg = (Fe_Ch1_Lna_Cfg){ .fe_lna_cfg = &fe_ch1_lna, }; //FE Ch2 LNA config -Fe_Ch2_Lna_Cfg fe_ch2_rx_gain_cfg = (Fe_Ch2_Lna_Cfg) { +Fe_Ch2_Lna_Cfg fe_ch2_rx_gain_cfg = (Fe_Ch2_Lna_Cfg){ /* CH1_RF_PWR_OFF */ .pin_ch1_rf_pwr_off = { &fe_ch2_lna_io, 1 }, .fe_lna_cfg = &fe_ch2_lna, @@ -225,11 +229,11 @@ RfWatchdog_Cfg fe_ch2_watchdog = { /* FE GPIO's */ Fe_Cfg fe_rffecfg = { .fe_gpio_cfg = &fe_gpiocfg, - .fe_ch1_gain_cfg = (Fe_Ch1_Gain_Cfg*)&fe_ch1_tx_gain_cfg, - .fe_ch2_gain_cfg = (Fe_Ch2_Gain_Cfg*)&fe_ch2_tx_gain_cfg, - .fe_ch1_lna_cfg = (Fe_Ch1_Lna_Cfg*)&fe_ch1_rx_gain_cfg, - .fe_ch2_lna_cfg = (Fe_Ch2_Lna_Cfg*)&fe_ch2_rx_gain_cfg, - .fe_watchdog_cfg = (Fe_Watchdog_Cfg*)&fe_watchdog_cfg, + .fe_ch1_gain_cfg = (Fe_Ch1_Gain_Cfg *)&fe_ch1_tx_gain_cfg, + .fe_ch2_gain_cfg = (Fe_Ch2_Gain_Cfg *)&fe_ch2_tx_gain_cfg, + .fe_ch1_lna_cfg = (Fe_Ch1_Lna_Cfg *)&fe_ch1_rx_gain_cfg, + .fe_ch2_lna_cfg = (Fe_Ch2_Lna_Cfg *)&fe_ch2_rx_gain_cfg, + .fe_watchdog_cfg = (Fe_Watchdog_Cfg *)&fe_watchdog_cfg, }; FE_Ch_Band_cfg fe_ch1_bandcfg = { @@ -240,30 +244,27 @@ FE_Ch_Band_cfg fe_ch2_bandcfg = { .channel = RFFE_CHANNEL2, }; -Fe_Ch_Pwr_Cfg fe_ch1_pwrcfg = { - .channel = RFFE_CHANNEL1, - .fe_Rffecfg = (Fe_Cfg*)&fe_rffecfg -}; +Fe_Ch_Pwr_Cfg fe_ch1_pwrcfg = { .channel = RFFE_CHANNEL1, + .fe_Rffecfg = (Fe_Cfg *)&fe_rffecfg }; -Fe_Ch_Pwr_Cfg fe_ch2_pwrcfg = { - .channel = RFFE_CHANNEL2, - .fe_Rffecfg = (Fe_Cfg*)&fe_rffecfg -}; +Fe_Ch_Pwr_Cfg fe_ch2_pwrcfg = { .channel = RFFE_CHANNEL2, + .fe_Rffecfg = (Fe_Cfg *)&fe_rffecfg }; -// TestModule +// TestModule TestMod_Cfg testModuleCfg = (TestMod_Cfg){ - .g510_cfg = { - .uart = OC_CONNECT1_UART4, - /* 2G_SIM_PRESENCE */ - .pin_sim_present = { &gbc_io_1, 0, OCGPIO_CFG_IN_PU }, + .g510_cfg = + { + .uart = OC_CONNECT1_UART4, + /* 2G_SIM_PRESENCE */ + .pin_sim_present = { &gbc_io_1, 0, OCGPIO_CFG_IN_PU }, - /* NOTE: enable & power go through MOSFETs, inverting them */ - /* 2GMODULE_POWEROFF */ - .pin_enable = { &gbc_io_1, 2, OCGPIO_CFG_INVERT }, - /* EC_2GMODULE_PWR_ON */ - .pin_pwr_en = { &gbc_io_1, 1, OCGPIO_CFG_INVERT }, - }, - .pin_ant_sw = {}, + /* NOTE: enable & power go through MOSFETs, inverting them */ + /* 2GMODULE_POWEROFF */ + .pin_enable = { &gbc_io_1, 2, OCGPIO_CFG_INVERT }, + /* EC_2GMODULE_PWR_ON */ + .pin_pwr_en = { &gbc_io_1, 1, OCGPIO_CFG_INVERT }, + }, + .pin_ant_sw = {}, }; // RFFE IO EXPANDERS diff --git a/firmware/ec/platform/oc-sdr/cfg/OC_CONNECT_GBC.c b/firmware/ec/platform/oc-sdr/cfg/OC_CONNECT_GBC.c index 02a4c1dcda..5e534282ee 100644 --- a/firmware/ec/platform/oc-sdr/cfg/OC_CONNECT_GBC.c +++ b/firmware/ec/platform/oc-sdr/cfg/OC_CONNECT_GBC.c @@ -34,14 +34,14 @@ SCHEMA_IMPORT OcGpio_Port gbc_io_1; SCHEMA_IMPORT const Driver_fxnTable LTC4274_fxnTable; /* These are terrible pin names, but they match the net names... */ -OcGpio_Pin pin_inven_eeprom_wp = { &gbc_io_0, 1, OCGPIO_CFG_OUT_OD_NOPULL }; -OcGpio_Pin pin_s_id_eeprom_wp = { &gbc_io_0, 2, OCGPIO_CFG_OUT_OD_NOPULL }; -OcGpio_Pin pin_tempsen_evt1 = { &gbc_io_0, 4 }; -OcGpio_Pin pin_tempsen_evt2 = { &gbc_io_0, 5 }; -OcGpio_Pin pin_tempsen_evt3 = { &gbc_io_0, 6 }; -OcGpio_Pin pin_tempsen_evt4 = { &gbc_io_0, 7 }; -OcGpio_Pin pin_tempsen_evt5 = { &gbc_io_0, 8 }; -OcGpio_Pin eth_sw_tiva_intn = { &gbc_io_0, 11 }; +OcGpio_Pin pin_inven_eeprom_wp = { &gbc_io_0, 1, OCGPIO_CFG_OUT_OD_NOPULL }; +OcGpio_Pin pin_s_id_eeprom_wp = { &gbc_io_0, 2, OCGPIO_CFG_OUT_OD_NOPULL }; +OcGpio_Pin pin_tempsen_evt1 = { &gbc_io_0, 4 }; +OcGpio_Pin pin_tempsen_evt2 = { &gbc_io_0, 5 }; +OcGpio_Pin pin_tempsen_evt3 = { &gbc_io_0, 6 }; +OcGpio_Pin pin_tempsen_evt4 = { &gbc_io_0, 7 }; +OcGpio_Pin pin_tempsen_evt5 = { &gbc_io_0, 8 }; +OcGpio_Pin eth_sw_tiva_intn = { &gbc_io_0, 11 }; /***************************************************************************** * EEPROM CONFIG @@ -66,128 +66,142 @@ Eeprom_Cfg eeprom_gbc_inv = { /* Power SubSystem Config */ //Lead Acid Temperature sensor. SE98A_Dev gbc_pwr_lead_acid_ts = { - .cfg = { - .dev = { - .bus = OC_CONNECT1_I2C1, - .slave_addr = PWR_LEAD_ACID_BATT_DEV_TEMP_SENS_ADDR - }, - .pin_evt = &pin_tempsen_evt1, - }, + .cfg = + { + .dev = { .bus = OC_CONNECT1_I2C1, + .slave_addr = + PWR_LEAD_ACID_BATT_DEV_TEMP_SENS_ADDR }, + .pin_evt = &pin_tempsen_evt1, + }, .obj = {}, }; //Lead acid battery charge controller. LTC4015_Dev gbc_pwr_ext_bat_charger = { - .cfg = { - .i2c_dev = { - .bus = OC_CONNECT1_I2C0, - .slave_addr = 0x68, /* LTC4015 I2C address in 7-bit format */ + .cfg = + { + .i2c_dev = + { + .bus = OC_CONNECT1_I2C0, + .slave_addr = + 0x68, /* LTC4015 I2C address in 7-bit format */ + }, + .chem = LTC4015_CHEM_LEAD_ACID, + .r_snsb = PWR_EXT_BATT_RSNSB, + .r_snsi = PWR_EXT_BATT_RSNSI, + .cellcount = 6, + .pin_lt4015_i2c_sel = { &gbc_io_1, 4, + OCGPIO_CFG_OUT_OD_NOPULL }, + .pin_alert = &(OcGpio_Pin){ &ec_io, OC_EC_PWR_LACID_ALERT }, }, - .chem = LTC4015_CHEM_LEAD_ACID, - .r_snsb = PWR_EXT_BATT_RSNSB, - .r_snsi = PWR_EXT_BATT_RSNSI, - .cellcount = 6, - .pin_lt4015_i2c_sel = { &gbc_io_1, 4, OCGPIO_CFG_OUT_OD_NOPULL }, - .pin_alert = &(OcGpio_Pin){ &ec_io, - OC_EC_PWR_LACID_ALERT }, - }, - .obj = {}, - }; + .obj = {}, +}; //Lithium ion battery charge controller. LTC4015_Dev gbc_pwr_int_bat_charger = { - .cfg = { - .i2c_dev = { - .bus = OC_CONNECT1_I2C0, - .slave_addr = 0x68, /* LTC4015 I2C address in 7-bit format */ - }, - .chem = LTC4015_CHEM_LI_ION, - .r_snsb = PWR_INT_BATT_RSNSB, - .r_snsi = PWR_INT_BATT_RSNSI, - .cellcount = 3, - .pin_lt4015_i2c_sel = { &gbc_io_1, 4, OCGPIO_CFG_OUT_OD_NOPULL }, - .pin_alert = &(OcGpio_Pin){ &ec_io, OC_EC_PWR_LION_ALERT }, - }, - .obj = {}, + .cfg = + { + .i2c_dev = + { + .bus = OC_CONNECT1_I2C0, + .slave_addr = + 0x68, /* LTC4015 I2C address in 7-bit format */ + }, + .chem = LTC4015_CHEM_LI_ION, + .r_snsb = PWR_INT_BATT_RSNSB, + .r_snsi = PWR_INT_BATT_RSNSI, + .cellcount = 3, + .pin_lt4015_i2c_sel = { &gbc_io_1, 4, + OCGPIO_CFG_OUT_OD_NOPULL }, + .pin_alert = &(OcGpio_Pin){ &ec_io, OC_EC_PWR_LION_ALERT }, + }, + .obj = {}, }; //Power Source Equipment LTC4274_Dev gbc_pwr_pse = { - .cfg = { - .i2c_dev = { - .bus = OC_CONNECT1_I2C8, - .slave_addr = 0x2F, /* LTC4274 I2C address in 7-bit format */ - }, - .pin_evt = &(OcGpio_Pin){ &ec_io, - OC_EC_GBC_PSE_ALERT }, - .reset_pin ={ &ec_io, OC_EC_PWR_PSE_RESET }, - }, + .cfg = + { + .i2c_dev = + { + .bus = OC_CONNECT1_I2C8, + .slave_addr = + 0x2F, /* LTC4274 I2C address in 7-bit format */ + }, + .pin_evt = &(OcGpio_Pin){ &ec_io, OC_EC_GBC_PSE_ALERT }, + .reset_pin = { &ec_io, OC_EC_PWR_PSE_RESET }, + }, .obj = {}, }; //Power Device LTC4275_Dev gbc_pwr_pd = { - .cfg = { - .pin_evt = &(OcGpio_Pin){ &ec_io, - OC_EC_PD_PWRGD_ALERT }, - .pin_detect = &(OcGpio_Pin){ &ec_io, - OC_EC_PWR_PD_NT2P }, + .cfg = + { + .pin_evt = &(OcGpio_Pin){ &ec_io, OC_EC_PD_PWRGD_ALERT }, + .pin_detect = &(OcGpio_Pin){ &ec_io, OC_EC_PWR_PD_NT2P }, - }, - .obj = {}, - }; + }, + .obj = {}, +}; //Power Source -PWRSRC_Dev gbc_pwr_powerSource = { /*Added as a place holder for now.*/ - .cfg = { - /* SOLAR_AUX_PRSNT_N */ - .pin_solar_aux_prsnt_n = { &ec_io, OC_EC_PWR_PRSNT_SOLAR_AUX }, - /* POE_PRSNT_N */ - .pin_poe_prsnt_n = { &ec_io, OC_EC_PWR_PRSNT_POE }, - /* INT_BAT_PRSNT */ - .pin_int_bat_prsnt = { &gbc_io_0, 11 }, - /* EXT_BAT_PRSNT */ - .pin_ext_bat_prsnt = { &gbc_io_0, 12 }, - }, - .obj = {}, +PWRSRC_Dev gbc_pwr_powerSource = { + /*Added as a place holder for now.*/ + .cfg = + { + /* SOLAR_AUX_PRSNT_N */ + .pin_solar_aux_prsnt_n = { &ec_io, + OC_EC_PWR_PRSNT_SOLAR_AUX }, + /* POE_PRSNT_N */ + .pin_poe_prsnt_n = { &ec_io, OC_EC_PWR_PRSNT_POE }, + /* INT_BAT_PRSNT */ + .pin_int_bat_prsnt = { &gbc_io_0, 11 }, + /* EXT_BAT_PRSNT */ + .pin_ext_bat_prsnt = { &gbc_io_0, 12 }, + }, + .obj = {}, }; /* BMS SubSystem Config */ //EC Power sensor for 12V rail. INA226_Dev gbc_bms_ec_ps_12v = { /* 12V Power Sensor */ - .cfg = { - .dev = { - .bus = OC_CONNECT1_I2C6, - .slave_addr = BMS_EC_CURRENT_SENSOR_12V_ADDR, - }, - .pin_alert = &(OcGpio_Pin){ &ec_io, - OC_EC_GBC_INA_ALERT }, - }, + .cfg = + { + .dev = + { + .bus = OC_CONNECT1_I2C6, + .slave_addr = + BMS_EC_CURRENT_SENSOR_12V_ADDR, + }, + .pin_alert = &(OcGpio_Pin){ &ec_io, OC_EC_GBC_INA_ALERT }, + }, }; //EC Power sensor for 3.3V rail. INA226_Dev gbc_bms_ec_ps_3p3v = { /* 3.3V Power Sensor */ - .cfg = { - .dev = { - .bus = OC_CONNECT1_I2C7, - .slave_addr = BMS_EC_CURRENT_SENSOR_3P3V_ADDR, - }, - .pin_alert = &(OcGpio_Pin){ &ec_io, - OC_EC_GBC_INA_ALERT }, - }, + .cfg = + { + .dev = + { + .bus = OC_CONNECT1_I2C7, + .slave_addr = + BMS_EC_CURRENT_SENSOR_3P3V_ADDR, + }, + .pin_alert = &(OcGpio_Pin){ &ec_io, OC_EC_GBC_INA_ALERT }, + }, }; // EC Temperature sensor. SE98A_Dev gbc_bms_ec_ts = { - .cfg = { - .dev = { - .bus = OC_CONNECT1_I2C1, - .slave_addr = BMS_EC_TEMP_SENSOR_ADDR + .cfg = + { + .dev = { .bus = OC_CONNECT1_I2C1, + .slave_addr = BMS_EC_TEMP_SENSOR_ADDR }, + .pin_evt = &pin_tempsen_evt2, }, - .pin_evt = &pin_tempsen_evt2, - }, .obj = {}, }; @@ -237,77 +251,78 @@ Eth_cfg gbc_eth_port4 = { /* GPP Subsystem Config*/ //EC Power sensor for 12V rail. INA226_Dev gbc_gpp_ap_ps = { - .cfg = { - .dev = { - .bus = OC_CONNECT1_I2C6, - .slave_addr = GPP_AP_CURRENT_SENSOR_ADDR, - }, - .pin_alert = &(OcGpio_Pin){ &ec_io, - OC_EC_GBC_AP_INA_ALERT }, - }, + .cfg = + { + .dev = + { + .bus = OC_CONNECT1_I2C6, + .slave_addr = GPP_AP_CURRENT_SENSOR_ADDR, + }, + .pin_alert = + &(OcGpio_Pin){ &ec_io, OC_EC_GBC_AP_INA_ALERT }, + }, }; // AP Temperature sensor SE98A_Dev gbc_gpp_ap_ts1 = { - .cfg = { - .dev = { - .bus = OC_CONNECT1_I2C1, - .slave_addr = GPP_AP_TEMPSENS1_ADDR - }, - .pin_evt = &pin_tempsen_evt3, - }, - .obj = {}, + .cfg = + { + .dev = { .bus = OC_CONNECT1_I2C1, + .slave_addr = GPP_AP_TEMPSENS1_ADDR }, + .pin_evt = &pin_tempsen_evt3, + }, + .obj = {}, }; SE98A_Dev gbc_gpp_ap_ts2 = { - .cfg = { - .dev = { - .bus = OC_CONNECT1_I2C1, - .slave_addr = GPP_AP_TEMPSENS2_ADDR + .cfg = + { + .dev = { .bus = OC_CONNECT1_I2C1, + .slave_addr = GPP_AP_TEMPSENS2_ADDR }, + .pin_evt = &pin_tempsen_evt5, }, - .pin_evt = &pin_tempsen_evt5, - }, .obj = {}, }; SE98A_Dev gbc_gpp_ap_ts3 = { - .cfg = { - .dev = { - .bus = OC_CONNECT1_I2C1, - .slave_addr = GPP_AP_TEMPSENS3_ADDR - }, - .pin_evt = &pin_tempsen_evt4, - }, - .obj = {}, + .cfg = + { + .dev = { .bus = OC_CONNECT1_I2C1, + .slave_addr = GPP_AP_TEMPSENS3_ADDR }, + .pin_evt = &pin_tempsen_evt4, + }, + .obj = {}, }; //mSATA power sensor INA226_Dev gbc_gpp_msata_ps = { - .cfg = { - .dev = { - .bus = OC_CONNECT1_I2C6, - .slave_addr = GPP_MSATA_CURRENT_SENSOR_ADDR, - }, - .pin_alert = &(OcGpio_Pin){ &ec_io, - OC_EC_GBC_AP_INA_ALERT }, - }, + .cfg = + { + .dev = + { + .bus = OC_CONNECT1_I2C6, + .slave_addr = GPP_MSATA_CURRENT_SENSOR_ADDR, + }, + .pin_alert = + &(OcGpio_Pin){ &ec_io, OC_EC_GBC_AP_INA_ALERT }, + }, }; Gpp_gpioCfg gbc_gpp_gpioCfg = (Gpp_gpioCfg){ /* SOC_PLTRST_N */ - .pin_soc_pltrst_n = { &ec_io, OC_EC_GPP_SOC_PLTRST }, + .pin_soc_pltrst_n = { &ec_io, OC_EC_GPP_SOC_PLTRST }, /* TIVA_SOC_GPIO2 */ - .pin_ap_boot_alert1 = { &ec_io, OC_EC_GPP_AP_BM_1 }, + .pin_ap_boot_alert1 = { &ec_io, OC_EC_GPP_AP_BM_1 }, /* TIVA_SOC_GPIO3 */ - .pin_ap_boot_alert2 = { &ec_io, OC_EC_GPP_AP_BM_2 }, + .pin_ap_boot_alert2 = { &ec_io, OC_EC_GPP_AP_BM_2 }, /* SOC_COREPWROK */ - .pin_soc_corepwr_ok = { &ec_io, OC_EC_GPP_PMIC_CORE_PWR }, + .pin_soc_corepwr_ok = { &ec_io, OC_EC_GPP_PMIC_CORE_PWR }, /* MSATA_EC_DAS */ - .pin_msata_ec_das = { &ec_io, OC_EC_GPP_MSATA_DAS }, + .pin_msata_ec_das = { &ec_io, OC_EC_GPP_MSATA_DAS }, /* LT4256_EC_PWRGD */ - .pin_lt4256_ec_pwrgd = { &ec_io, OC_EC_GPP_PWRGD_PROTECTION }, + .pin_lt4256_ec_pwrgd = { &ec_io, OC_EC_GPP_PWRGD_PROTECTION }, /* AP_12V_ONOFF */ - .pin_ap_12v_onoff = { &ec_io, OC_EC_GPP_PMIC_CTRL }, + .pin_ap_12v_onoff = { &ec_io, OC_EC_GPP_PMIC_CTRL }, /* EC_RESET_TO_PROC */ .pin_ec_reset_to_proc = { &ec_io, OC_EC_GPP_RST_TO_PROC }, }; @@ -488,7 +503,6 @@ S_OCGPIO_Cfg debug_gbc_ioexpanderx71 = { .port = &gbc_io_0, }; - /* Factory Configuration for the Devices*/ //Power Factory Config. const SE98A_Config fact_bc_se98a = { diff --git a/firmware/ec/platform/oc-sdr/cfg/OC_CONNECT_LED.c b/firmware/ec/platform/oc-sdr/cfg/OC_CONNECT_LED.c index 42071d7f07..8ab172b295 100644 --- a/firmware/ec/platform/oc-sdr/cfg/OC_CONNECT_LED.c +++ b/firmware/ec/platform/oc-sdr/cfg/OC_CONNECT_LED.c @@ -17,26 +17,27 @@ SCHEMA_IMPORT OcGpio_Port sync_io; *****************************************************************************/ //LED Temperature sensor SE98A_Dev led_hci_ts = { - .cfg = { - .dev = { - .bus = OC_CONNECT1_I2C8, - .slave_addr = HCI_LED_TEMP_SENSOR_ADDR - }, - .pin_evt = NULL, - }, + .cfg = + { + .dev = { .bus = OC_CONNECT1_I2C8, + .slave_addr = HCI_LED_TEMP_SENSOR_ADDR }, + .pin_evt = NULL, + }, .obj = {}, }; //LED IO Expander -HciLedCfg led_hci_ioexp ={ - .sx1509_dev[HCI_LED_DRIVER_LEFT] = { - .bus = OC_CONNECT1_I2C8, - .slave_addr = LED_SX1509_LEFT_ADDRESS, - }, - .sx1509_dev[HCI_LED_DRIVER_RIGHT] = { - .bus = OC_CONNECT1_I2C8, - .slave_addr = LED_SX1509_RIGHT_ADDRESS, - }, +HciLedCfg led_hci_ioexp = { + .sx1509_dev[HCI_LED_DRIVER_LEFT] = + { + .bus = OC_CONNECT1_I2C8, + .slave_addr = LED_SX1509_LEFT_ADDRESS, + }, + .sx1509_dev[HCI_LED_DRIVER_RIGHT] = + { + .bus = OC_CONNECT1_I2C8, + .slave_addr = LED_SX1509_RIGHT_ADDRESS, + }, /* EC_GPIO */ .pin_ec_gpio = { &ec_io, OC_EC_HCI_LED_RESET }, }; diff --git a/firmware/ec/platform/oc-sdr/cfg/OC_CONNECT_SDR.c b/firmware/ec/platform/oc-sdr/cfg/OC_CONNECT_SDR.c index 77a338d3ec..774a74682c 100644 --- a/firmware/ec/platform/oc-sdr/cfg/OC_CONNECT_SDR.c +++ b/firmware/ec/platform/oc-sdr/cfg/OC_CONNECT_SDR.c @@ -30,14 +30,16 @@ Eeprom_Cfg eeprom_sdr_inv = { /* SDR Subsystem Config.*/ // SDR FPGA power sensor. INA226_Dev sdr_fpga_ps = { - .cfg = { - .dev = { - .bus = OC_CONNECT1_I2C3, - .slave_addr = SDR_FPGA_CURRENT_SENSOR_ADDR, - }, - .pin_alert = &(OcGpio_Pin){ &ec_io, - OC_EC_SDR_FPGA_TEMP_INA_ALERT }, - }, + .cfg = + { + .dev = + { + .bus = OC_CONNECT1_I2C3, + .slave_addr = SDR_FPGA_CURRENT_SENSOR_ADDR, + }, + .pin_alert = &(OcGpio_Pin){ &ec_io, + OC_EC_SDR_FPGA_TEMP_INA_ALERT }, + }, }; //SDR FPGA temperature sensor @@ -47,18 +49,19 @@ I2C_Dev sdr_fpga_ts = { }; //SDR EEPROM -void* sdr_eeprom_inventory = &eeprom_sdr_inv; +void *sdr_eeprom_inventory = &eeprom_sdr_inv; //SDR Power sensor INA226_Dev sdr_ps = { - .cfg = { - .dev = { - .bus = OC_CONNECT1_I2C6, - .slave_addr = SDR_CURRENT_SENSOR_ADDR, - }, - .pin_alert = &(OcGpio_Pin){ &ec_io, - OC_EC_SDR_INA_ALERT }, - }, + .cfg = + { + .dev = + { + .bus = OC_CONNECT1_I2C6, + .slave_addr = SDR_CURRENT_SENSOR_ADDR, + }, + .pin_alert = &(OcGpio_Pin){ &ec_io, OC_EC_SDR_INA_ALERT }, + }, }; // SDR IO EXPANDERS @@ -81,17 +84,17 @@ const INA226_Config fact_sdr_fpga_ps_cfg = { .current_lim = 500, }; -Sdr_gpioCfg sdr_gpioCfg = (Sdr_gpioCfg) { +Sdr_gpioCfg sdr_gpioCfg = (Sdr_gpioCfg){ /* EC_TRXFECONN_GPIO2/SDR_REG_LDO_PGOOD */ - .pin_sdr_reg_ldo_pgood = { &ec_io, OC_EC_SDR_PWR_GD }, + .pin_sdr_reg_ldo_pgood = { &ec_io, OC_EC_SDR_PWR_GD }, /* TRXFE_12V_ONOFF */ - .pin_trxfe_12v_onoff = { &ec_io, OC_EC_SDR_PWR_CNTRL }, + .pin_trxfe_12v_onoff = { &ec_io, OC_EC_SDR_PWR_CNTRL }, /* EC_FE_RESET_OUT/RF_FE_IO_RESET */ - .pin_rf_fe_io_reset = { &ec_io, OC_EC_SDR_FE_IO_RESET_CTRL }, + .pin_rf_fe_io_reset = { &ec_io, OC_EC_SDR_FE_IO_RESET_CTRL }, /* EC_TRXFECONN_GPIO1/SDR_RESET_IN */ - .pin_sdr_reset_in = { &ec_io, OC_EC_SDR_DEVICE_CONTROL }, + .pin_sdr_reset_in = { &ec_io, OC_EC_SDR_DEVICE_CONTROL }, /* EC_TRXFE_RESET */ - .pin_ec_trxfe_reset = { &ec_io, OC_EC_RFFE_RESET }, + .pin_ec_trxfe_reset = { &ec_io, OC_EC_RFFE_RESET }, /* FX3_RESET */ - .pin_fx3_reset = { &sdr_fx3_io, 0 }, + .pin_fx3_reset = { &sdr_fx3_io, 0 }, }; diff --git a/firmware/ec/platform/oc-sdr/cfg/OC_CONNECT_SYNC.c b/firmware/ec/platform/oc-sdr/cfg/OC_CONNECT_SYNC.c index dd10ab4141..4952481223 100644 --- a/firmware/ec/platform/oc-sdr/cfg/OC_CONNECT_SYNC.c +++ b/firmware/ec/platform/oc-sdr/cfg/OC_CONNECT_SYNC.c @@ -22,9 +22,9 @@ SCHEMA_IMPORT OcGpio_Port sync_io; Iridium_Cfg obc_irridium = { .uart = OC_CONNECT1_UARTXR0, /* IRIDIUM_RSTIOEXP */ - .pin_enable = { &sync_io, 2, OCGPIO_CFG_OUT_STD }, + .pin_enable = { &sync_io, 2, OCGPIO_CFG_OUT_STD }, /* R_NW_AVAIL */ - .pin_nw_avail = { &sync_io, 3, OCGPIO_CFG_IN_PU }, + .pin_nw_avail = { &sync_io, 3, OCGPIO_CFG_IN_PU }, }; /* Sync Subsystem Config.*/ @@ -53,25 +53,25 @@ const ADT7481_Config fact_sync_ts_cfg = { Sync_gpioCfg sync_gpiocfg = (Sync_gpioCfg){ /* SPDT_CNTRL_LVL */ - .pin_spdt_cntrl_lvl = { &sync_io, 0, OCGPIO_CFG_OUT_OD_NOPULL }, + .pin_spdt_cntrl_lvl = { &sync_io, 0, OCGPIO_CFG_OUT_OD_NOPULL }, /* WARMUP_SURVEY_INIT_SEL */ - .pin_warmup_survey_init_sel = { &sync_io, 1, OCGPIO_CFG_OUT_OD_NOPULL }, + .pin_warmup_survey_init_sel = { &sync_io, 1, OCGPIO_CFG_OUT_OD_NOPULL }, /* R_PHASE_LOCK_IOEXP */ - .pin_r_phase_lock_ioexp = { &sync_io, 4, OCGPIO_CFG_IN_PU }, + .pin_r_phase_lock_ioexp = { &sync_io, 4, OCGPIO_CFG_IN_PU }, /* R_LOCK_OK_IOEXP */ - .pin_r_lock_ok_ioexp = { &sync_io, 5, OCGPIO_CFG_IN_PU }, + .pin_r_lock_ok_ioexp = { &sync_io, 5, OCGPIO_CFG_IN_PU }, /* R_ALARM_IOEXP */ - .pin_r_alarm_ioexp = { &sync_io, 6, OCGPIO_CFG_IN_PU }, + .pin_r_alarm_ioexp = { &sync_io, 6, OCGPIO_CFG_IN_PU }, /* 12V_REG_ENB */ - .pin_12v_reg_enb = { &sync_io, 7, OCGPIO_CFG_OUT_STD }, + .pin_12v_reg_enb = { &sync_io, 7, OCGPIO_CFG_OUT_STD }, /* TEMP_ALERT */ - .pin_temp_alert = { &sync_io, 8, OCGPIO_CFG_IN_PU }, + .pin_temp_alert = { &sync_io, 8, OCGPIO_CFG_IN_PU }, /* SPDT_CNTRL_LTE_CPU_GPS_LVL */ .pin_spdt_cntrl_lte_cpu_gps_lvl = { &sync_io, 9, OCGPIO_CFG_OUT_OD_NOPULL }, /* INIT_SURVEY_SEL */ - .pin_init_survey_sel = { &sync_io, 10, OCGPIO_CFG_OUT_OD_NOPULL }, + .pin_init_survey_sel = { &sync_io, 10, OCGPIO_CFG_OUT_OD_NOPULL }, /* EC_SYNC_RESET */ - .pin_ec_sync_reset = { &ec_io, OC_EC_SYNC_RESET }, + .pin_ec_sync_reset = { &ec_io, OC_EC_SYNC_RESET }, }; Obc_gpioCfg sync_obc_gpiocfg = { diff --git a/firmware/ec/platform/oc-sdr/schema/schema.c b/firmware/ec/platform/oc-sdr/schema/schema.c index d877f1b26a..9d853ac1e0 100644 --- a/firmware/ec/platform/oc-sdr/schema/schema.c +++ b/firmware/ec/platform/oc-sdr/schema/schema.c @@ -43,7 +43,7 @@ SCHEMA_IMPORT DriverStruct gbc_pwr_lead_acid_ts; SCHEMA_IMPORT DriverStruct gbc_pwr_ext_bat_charger; SCHEMA_IMPORT DriverStruct gbc_pwr_int_bat_charger; SCHEMA_IMPORT DriverStruct gbc_pwr_pse; -SCHEMA_IMPORT DriverStruct gbc_pwr_pd ; +SCHEMA_IMPORT DriverStruct gbc_pwr_pd; SCHEMA_IMPORT DriverStruct gbc_pwr_powerSource; /* BMS SubSystem Configs */ @@ -229,950 +229,1023 @@ SCHEMA_IMPORT bool SYS_post_enable(void **postActivate); const Component sys_schema[] = { { - .name = "system", - .components = (Component[]){ - { - .name = "comp_all", - .driver = &SYSTEMDRV, - .driver_cfg = &gbc_gpp_gpioCfg, /* For reset pin, will revise */ - .components = (Component[]){ - { - .name = "eeprom_sid", - .driver = &CAT24C04_gbc_sid, - .driver_cfg = &eeprom_gbc_sid, - }, - { - .name = "eeprom_inv", - .driver = &CAT24C04_gbc_inv, - .driver_cfg = &eeprom_gbc_inv, - }, - { - .name = "eeprom_mac", - .driver = &Driver_MAC, - }, - {} - }, - .commands = (Command[]){ - { - .name = "reset", - .cb_cmd = SYS_cmdReset, - }, - { - .name = "echo", - .cb_cmd = SYS_cmdEcho, - }, - {} - }, - }, - {} - }, + .name = "system", + .components = + (Component[]){ + { + .name = "comp_all", + .driver = &SYSTEMDRV, + .driver_cfg = + &gbc_gpp_gpioCfg, /* For reset pin, will revise */ + .components = + (Component[]){ + { + .name = "eeprom_sid", + .driver = + &CAT24C04_gbc_sid, + .driver_cfg = + &eeprom_gbc_sid, + }, + { + .name = "eeprom_inv", + .driver = + &CAT24C04_gbc_inv, + .driver_cfg = + &eeprom_gbc_inv, + }, + { + .name = "eeprom_mac", + .driver = + &Driver_MAC, + }, + {} }, + .commands = + (Command[]){ + { + .name = "reset", + .cb_cmd = + SYS_cmdReset, + }, + { + .name = "echo", + .cb_cmd = + SYS_cmdEcho, + }, + {} }, + }, + {} }, }, { - .name = "power", - .components = (Component[]){ - { - .name = "comp_all", - .components = (Component[]){ - { - .name = "powerSource", - .driver = &PWRSRC, - .driver_cfg = &gbc_pwr_powerSource, - .postDisabled = POST_DISABLED, - }, - {} - }, - }, - { - .name = "leadacid_sensor", - .components = (Component[]){ - { - .name = "temp_sensor1", - .driver = &SE98A, - .driver_cfg = &gbc_pwr_lead_acid_ts, - .factory_config = &fact_bc_se98a, - }, - {} - } - }, - { - .name = "leadacid", - .components = (Component[]){ - { - .name = "battery", - .driver = <C4015, - .driver_cfg = &gbc_pwr_ext_bat_charger, - .factory_config = &fact_leadAcid_cfg, - }, - {} - } - }, - { - .name = "lion", - .components = (Component[]){ - { - .name = "battery", - .driver = <C4015, - .driver_cfg = &gbc_pwr_int_bat_charger, - .factory_config = &fact_lithiumIon_cfg, - }, - {} - } - }, - { - .name = "pse", - .driver = <C4274, - .driver_cfg = &gbc_pwr_pse, - .factory_config = &fact_ltc4274_cfg, - }, - { - .name = "pd", - .driver = <C4275, - .driver_cfg = &gbc_pwr_pd, - }, - {} - }, + .name = "power", + .components = + (Component[]){ + { + .name = "comp_all", + .components = + (Component[]){ + { + .name = "powerSource", + .driver = &PWRSRC, + .driver_cfg = + &gbc_pwr_powerSource, + .postDisabled = + POST_DISABLED, + }, + {} }, + }, + { .name = "leadacid_sensor", + .components = + (Component[]){ + { + .name = "temp_sensor1", + .driver = &SE98A, + .driver_cfg = + &gbc_pwr_lead_acid_ts, + .factory_config = + &fact_bc_se98a, + }, + {} } }, + { .name = "leadacid", + .components = + (Component[]){ + { + .name = "battery", + .driver = <C4015, + .driver_cfg = + &gbc_pwr_ext_bat_charger, + .factory_config = + &fact_leadAcid_cfg, + }, + {} } }, + { .name = "lion", + .components = + (Component[]){ + { + .name = "battery", + .driver = <C4015, + .driver_cfg = + &gbc_pwr_int_bat_charger, + .factory_config = + &fact_lithiumIon_cfg, + }, + {} } }, + { + .name = "pse", + .driver = <C4274, + .driver_cfg = &gbc_pwr_pse, + .factory_config = &fact_ltc4274_cfg, + }, + { + .name = "pd", + .driver = <C4275, + .driver_cfg = &gbc_pwr_pd, + }, + {} }, }, { - .name = "bms", - .components = (Component[]){ - { - .name = "comp_all", - .postDisabled = POST_DISABLED, - }, - { - .name = "ec", - .components = (Component[]){ - { - .name = "temp_sensor1", - .driver = &SE98A, - .driver_cfg = &gbc_bms_ec_ts, - .factory_config = &fact_ec_se98a_cfg, - }, - { - .name = "current_sensor1", - .driver = &INA226, - .driver_cfg = &gbc_bms_ec_ps_12v, - .factory_config = &fact_ec_12v_ps_cfg, - }, - { - .name = "current_sensor2", - .driver = &INA226, - .driver_cfg = &gbc_bms_ec_ps_3p3v, - .factory_config = &fact_ec_3v_ps_cfg, - }, - {} - } - }, - {} - }, + .name = "bms", + .components = + (Component[]){ + { + .name = "comp_all", + .postDisabled = POST_DISABLED, + }, + { .name = "ec", + .components = + (Component[]){ + { + .name = "temp_sensor1", + .driver = &SE98A, + .driver_cfg = + &gbc_bms_ec_ts, + .factory_config = + &fact_ec_se98a_cfg, + }, + { + .name = "current_sensor1", + .driver = &INA226, + .driver_cfg = + &gbc_bms_ec_ps_12v, + .factory_config = + &fact_ec_12v_ps_cfg, + }, + { + .name = "current_sensor2", + .driver = &INA226, + .driver_cfg = + &gbc_bms_ec_ps_3p3v, + .factory_config = + &fact_ec_3v_ps_cfg, + }, + {} } }, + {} }, }, { - .name = "hci", - .ssHookSet = &(SSHookSet){ - .preInitFxn = (ssHook_Cb)HCI_Init, - .postInitFxn = NULL, - }, - .components = (Component[]){ - { - .name = "comp_all", - .postDisabled = POST_DISABLED, - }, - { - .name = "led", - .components = (Component[]){ - { - .name = "temp_sensor1", - .driver = &SE98A, - .driver_cfg = &led_hci_ts, - .factory_config = &fact_led_se98a_cfg, - .postDisabled = POST_DISABLED, + .name = "hci", + .ssHookSet = + &(SSHookSet){ + .preInitFxn = (ssHook_Cb)HCI_Init, + .postInitFxn = NULL, }, - { - .name = "fw", - .driver = &HCI_LED, - .driver_cfg = &led_hci_ioexp, - }, - {} - }, - }, - { - /* TODO: Remove buzzer component if there is no OCMP message + .components = + (Component[]){ + { + .name = "comp_all", + .postDisabled = POST_DISABLED, + }, + { + .name = "led", + .components = + (Component[]){ + { + .name = "temp_sensor1", + .driver = &SE98A, + .driver_cfg = + &led_hci_ts, + .factory_config = + &fact_led_se98a_cfg, + .postDisabled = + POST_DISABLED, + }, + { + .name = "fw", + .driver = &HCI_LED, + .driver_cfg = + &led_hci_ioexp, + }, + {} }, + }, + { + /* TODO: Remove buzzer component if there is no OCMP message * required */ - .name = "buzzer", - .driver_cfg = &gbc_hci_buzzer, - .postDisabled = POST_DISABLED, - }, - {} - }, + .name = "buzzer", + .driver_cfg = &gbc_hci_buzzer, + .postDisabled = POST_DISABLED, + }, + {} }, }, { - .name = "ethernet", - .components = (Component[]){ - { - .name = "comp_all", - .postDisabled = POST_DISABLED, - }, - { - .name = "port0", - .driver = Ð_SW, - .driver_cfg = &gbc_eth_port0, - }, - { - .name = "port1", - .driver = Ð_SW, - .driver_cfg = &gbc_eth_port1, - }, - { - .name = "port2", - .driver = Ð_SW, - .driver_cfg = &gbc_eth_port2, - }, - { - .name = "port3", - .driver = Ð_SW, - .driver_cfg = &gbc_eth_port3, - }, - { - .name = "port4", - .driver = Ð_SW, - .driver_cfg = &gbc_eth_port4, - }, - {} - }, + .name = "ethernet", + .components = (Component[]){ { + .name = "comp_all", + .postDisabled = POST_DISABLED, + }, + { + .name = "port0", + .driver = Ð_SW, + .driver_cfg = &gbc_eth_port0, + }, + { + .name = "port1", + .driver = Ð_SW, + .driver_cfg = &gbc_eth_port1, + }, + { + .name = "port2", + .driver = Ð_SW, + .driver_cfg = &gbc_eth_port2, + }, + { + .name = "port3", + .driver = Ð_SW, + .driver_cfg = &gbc_eth_port3, + }, + { + .name = "port4", + .driver = Ð_SW, + .driver_cfg = &gbc_eth_port4, + }, + {} }, }, { - .name = "obc", - .ssHookSet = &(SSHookSet){ - .preInitFxn = (ssHook_Cb)obc_pre_init, - .postInitFxn = NULL, - }, - .driver_cfg = &sync_obc_gpiocfg, - .components = (Component[]){ - { - .name = "comp_all", - .postDisabled = POST_DISABLED, - }, - { - .name = "iridium", - .driver = &OBC_Iridium, - .driver_cfg = &obc_irridium, - }, - {} - }, + .name = "obc", + .ssHookSet = + &(SSHookSet){ + .preInitFxn = (ssHook_Cb)obc_pre_init, + .postInitFxn = NULL, + }, + .driver_cfg = &sync_obc_gpiocfg, + .components = (Component[]){ { + .name = "comp_all", + .postDisabled = POST_DISABLED, + }, + { + .name = "iridium", + .driver = &OBC_Iridium, + .driver_cfg = &obc_irridium, + }, + {} }, }, { - .name = "gpp", - .components = (Component[]){ - { - .name = "comp_all", - .postDisabled = POST_DISABLED, - }, + .name = "gpp", + .components = + (Component[]){ + { + .name = "comp_all", + .postDisabled = POST_DISABLED, + }, - { - .name = "ap", - .components = (Component[]){ - { - .name = "temp_sensor1", - .driver = &SE98A, - .driver_cfg = &gbc_gpp_ap_ts1, - .factory_config = &fact_ap_se98a_ts1_cfg, - }, - { - .name = "temp_sensor2", - .driver = &SE98A, - .driver_cfg = &gbc_gpp_ap_ts2, - .factory_config = &fact_ap_se98a_ts2_cfg, - }, - { - .name = "temp_sensor3", - .driver = &SE98A, - .driver_cfg = &gbc_gpp_ap_ts3, - .factory_config = &fact_ap_se98a_ts3_cfg, - }, - { - .name = "current_sensor1", - .driver = &INA226, - .driver_cfg = &gbc_gpp_ap_ps, - .factory_config = &fact_ap_3v_ps_cfg, - }, - {} - }, - .driver_cfg = &gbc_gpp_gpioCfg, - .commands = (Command[]){ - { - .name = "reset", - .cb_cmd = GPP_ap_Reset, + { + .name = "ap", + .components = + (Component[]){ + { + .name = "temp_sensor1", + .driver = &SE98A, + .driver_cfg = + &gbc_gpp_ap_ts1, + .factory_config = + &fact_ap_se98a_ts1_cfg, + }, + { + .name = "temp_sensor2", + .driver = &SE98A, + .driver_cfg = + &gbc_gpp_ap_ts2, + .factory_config = + &fact_ap_se98a_ts2_cfg, + }, + { + .name = "temp_sensor3", + .driver = &SE98A, + .driver_cfg = + &gbc_gpp_ap_ts3, + .factory_config = + &fact_ap_se98a_ts3_cfg, + }, + { + .name = "current_sensor1", + .driver = &INA226, + .driver_cfg = + &gbc_gpp_ap_ps, + .factory_config = + &fact_ap_3v_ps_cfg, + }, + {} }, + .driver_cfg = &gbc_gpp_gpioCfg, + .commands = + (Command[]){ + { + .name = "reset", + .cb_cmd = + GPP_ap_Reset, + }, + {} }, + }, + { .name = "msata", + .components = + (Component[]){ + { + .name = "current_sensor1", + .driver = &INA226, + .driver_cfg = + &gbc_gpp_msata_ps, + .factory_config = + &fact_msata_3v_ps_cfg, + }, + {} } }, + {} }, + .driver_cfg = &gbc_gpp_gpioCfg, + .ssHookSet = + &(SSHookSet){ + .preInitFxn = (ssHook_Cb)gpp_pre_init, + .postInitFxn = (ssHook_Cb)gpp_post_init, }, - {} - }, - }, - { - .name = "msata", - .components = (Component[]){ - { - .name = "current_sensor1", - .driver = &INA226, - .driver_cfg = &gbc_gpp_msata_ps, - .factory_config = &fact_msata_3v_ps_cfg, - }, - {} - } - }, - {} - }, - .driver_cfg = &gbc_gpp_gpioCfg, - .ssHookSet = &(SSHookSet){ - .preInitFxn = (ssHook_Cb)gpp_pre_init, - .postInitFxn = (ssHook_Cb)gpp_post_init, - }, }, { - .name = "sdr", - .components = (Component[]){ - { - .name = "comp_all", - .components = (Component[]){ - { - .name = "current_sensor1", - .driver = &INA226, - .driver_cfg = &sdr_ps, - .factory_config = &fact_sdr_3v_ps_cfg, - }, - { - /* TODO: this is pretty hw-specific, I think we can + .name = "sdr", + .components = + (Component[]){ + { + .name = "comp_all", + .components = + (Component[]){ + { + .name = "current_sensor1", + .driver = &INA226, + .driver_cfg = + &sdr_ps, + .factory_config = + &fact_sdr_3v_ps_cfg, + }, + { + /* TODO: this is pretty hw-specific, I think we can * dedupe for the other boards, but I don't think * a framework level driver is appropriate (although, * a proper OC-DB driver might have us revisit this) */ - /* TODO: "eeprom" makes the CLI command pretty verbose, + /* TODO: "eeprom" makes the CLI command pretty verbose, * maybe see about a way of making this better: * sdr.comp_all.eeprom.dev_id is kind of long */ - .name = "eeprom", - .driver_cfg = &eeprom_sdr_inv, - .driver = &CAT24C04_sdr_inv, + .name = "eeprom", + .driver_cfg = + &eeprom_sdr_inv, + .driver = &CAT24C04_sdr_inv, + }, + {} }, + .driver_cfg = &sdr_gpioCfg, + .commands = + (Command[]){ + { + .name = "reset", + .cb_cmd = SDR_reset, + }, + {} }, + }, + { .name = "fpga", + .components = + (Component[]){ + { + .name = "temp_sensor1", + .driver = &ADT7481, + .driver_cfg = + &sdr_fpga_ts, + .factory_config = + &fact_sdr_fpga_adt7481_cfg, + }, + { + .name = "current_sensor1", + .driver = &INA226, + .driver_cfg = + &sdr_fpga_ps, + .factory_config = + &fact_sdr_fpga_ps_cfg, + }, + {} } }, + { + .name = "fx3", + .driver_cfg = &sdr_gpioCfg, + .commands = + (Command[]){ + { + .name = "reset", + .cb_cmd = + SDR_fx3Reset, + }, + {} }, + .postDisabled = POST_DISABLED, + }, + {} }, + .driver_cfg = &sdr_gpioCfg, + .ssHookSet = + &(SSHookSet){ + .preInitFxn = (ssHook_Cb)SDR_Init, + .postInitFxn = NULL, }, - {} - }, - .driver_cfg =&sdr_gpioCfg, - .commands = (Command[]){ - { - .name = "reset", - .cb_cmd = SDR_reset, - }, - {} - }, - }, - { - .name = "fpga", - .components = (Component[]){ - { - .name = "temp_sensor1", - .driver = &ADT7481, - .driver_cfg = &sdr_fpga_ts, - .factory_config = &fact_sdr_fpga_adt7481_cfg, - }, - { - .name = "current_sensor1", - .driver = &INA226, - .driver_cfg = &sdr_fpga_ps, - .factory_config = &fact_sdr_fpga_ps_cfg, - }, - {} - } - }, - { - .name = "fx3", - .driver_cfg = &sdr_gpioCfg, - .commands = (Command[]){ - { - .name = "reset", - .cb_cmd = SDR_fx3Reset, - }, - {} - }, - .postDisabled = POST_DISABLED, - }, - {} - }, - .driver_cfg = &sdr_gpioCfg, - .ssHookSet = &(SSHookSet){ - .preInitFxn = (ssHook_Cb)SDR_Init, - .postInitFxn = NULL, - }, }, { - .name = "rffe", - .driver_cfg = &fe_rffecfg, - .components = (Component[]){ - { - .name = "comp_all", - .components = (Component[]){ - { - .name = "eeprom", - .driver = &CAT24C04_fe_inv, - .driver_cfg = &eeprom_fe_inv, + .name = "rffe", + .driver_cfg = &fe_rffecfg, + .components = + (Component[]){ + { + .name = "comp_all", + .components = + (Component[]){ + { + .name = "eeprom", + .driver = + &CAT24C04_fe_inv, + .driver_cfg = + &eeprom_fe_inv, + }, + {} }, + .driver_cfg = &sdr_gpioCfg, + .commands = + (Command[]){ + { + .name = "reset", + .cb_cmd = + RFFE_reset, + }, + {} }, + }, + { .name = "ch1_sensor", + .components = + (Component[]){ + { + .name = "temp_sensor1", + .driver = &ADT7481, + .driver_cfg = &fe_ch1_ts, + .factory_config = + &fact_fe_ch1_adt7481_cfg, + }, + { + .name = "current_sensor1", + .driver = &INA226, + .driver_cfg = + &fe_ch1_ps_5_7v, + .factory_config = + &fact_fe_ch1_ps_cfg, + }, + {} } }, + { .name = "ch2_sensor", + .components = + (Component[]){ + { + .name = "temp_sensor1", + .driver = &ADT7481, + .driver_cfg = &fe_ch2_ts, + .factory_config = + &fact_fe_ch2_adt7481_cfg, + }, + { + .name = "current_sensor1", + .driver = &INA226, + .driver_cfg = + &fe_ch2_ps_5_7v, + .factory_config = + &fact_fe_ch2_ps_cfg, + }, + {} } }, + { + .name = "ch1_fe", + .driver_cfg = + &fe_ch1_pwrcfg, /* For en/dis context */ + .components = + (Component[]){ + { + .name = "ch1_band", + /* Placeholder driver to let us test the DAT driver */ + .driver = &FE_Param, + .driver_cfg = + &fe_ch1_bandcfg, + .factory_config = + &fact_ch1_band_cfg, + }, + { + .name = "watchdog", + .driver = + &RFFEWatchdog, + .driver_cfg = + &fe_ch1_watchdog, + }, + { + .name = "power", + .driver = + &RFPowerMonitor, + .driver_cfg = + &fe_ch1_ads7830, + }, + { + .name = "tx", + .driver = + &DATXXR5APP, + /* this struct should be compatible with the DAT cfg struct */ + .driver_cfg = + &fe_ch1_gain, + .factory_config = + &fact_ch1_tx_gain_cfg, + }, + { + .name = "rx", + .driver = + &DATXXR5APP, + /* this struct should be compatible with the DAT cfg struct */ + .driver_cfg = + &fe_ch1_lna, + .factory_config = + &fact_ch1_rx_gain_cfg, + }, + {} }, + .commands = + (Command[]){ + { + .name = "enable", + .cb_cmd = + RFFE_enablePA, + }, + { + .name = "disable", + .cb_cmd = RFFE_disablePA, + }, + {} }, + }, + { + .name = "ch2_fe", + .driver_cfg = + &fe_ch2_pwrcfg, /* For en/dis context */ + .components = + (Component[]){ + { + .name = "ch2_band", + /* Placeholder driver to let us test the DAT driver */ + .driver = &FE_Param, + .driver_cfg = + &fe_ch2_bandcfg, + .factory_config = + &fact_ch2_band_cfg, + }, + { + .name = "watchdog", + .driver = &RFFEWatchdog, + .driver_cfg = + &fe_ch2_watchdog, + }, + { + .name = "power", + .driver = &RFPowerMonitor, + .driver_cfg = + &fe_ch2_ads7830, + }, + { + .name = "tx", + .driver = &DATXXR5APP, + /* this struct should be compatible with the DAT cfg struct */ + .driver_cfg = + &fe_ch2_gain, + .factory_config = + &fact_ch2_tx_gain_cfg, + }, + { + .name = "rx", + .driver = &DATXXR5APP, + /* this struct should be compatible with the DAT cfg struct */ + .driver_cfg = + &fe_ch2_lna, + .factory_config = + &fact_ch2_rx_gain_cfg, + }, + {} }, + .commands = + (Command[]){ { + .name = "enable", + .cb_cmd = + RFFE_enablePA, + }, + { + .name = "disable", + .cb_cmd = + RFFE_disablePA, + }, + {} }, + }, + {} }, + .driver_cfg = &fe_rffecfg, + .ssHookSet = + &(SSHookSet){ + .preInitFxn = (ssHook_Cb)rffe_pre_init, + .postInitFxn = (ssHook_Cb)rffe_post_init, }, - {} - }, - .driver_cfg = &sdr_gpioCfg, - .commands =(Command[]){ - { - .name = "reset", - .cb_cmd = RFFE_reset, - }, - {} - }, - }, - { - .name = "ch1_sensor", - .components = (Component[]){ - { - .name = "temp_sensor1", - .driver = &ADT7481, - .driver_cfg = &fe_ch1_ts, - .factory_config = &fact_fe_ch1_adt7481_cfg, - }, - { - .name = "current_sensor1", - .driver = &INA226, - .driver_cfg = &fe_ch1_ps_5_7v, - .factory_config = &fact_fe_ch1_ps_cfg, - }, - {} - } - }, - { - .name = "ch2_sensor", - .components = (Component[]){ - { - .name = "temp_sensor1", - .driver = &ADT7481, - .driver_cfg = &fe_ch2_ts, - .factory_config = &fact_fe_ch2_adt7481_cfg, - }, - { - .name = "current_sensor1", - .driver = &INA226, - .driver_cfg = &fe_ch2_ps_5_7v, - .factory_config = &fact_fe_ch2_ps_cfg, - }, - {} - } - }, - { - .name = "ch1_fe", - .driver_cfg = &fe_ch1_pwrcfg, /* For en/dis context */ - .components = (Component[]){ - { - .name = "ch1_band", - /* Placeholder driver to let us test the DAT driver */ - .driver = &FE_Param, - .driver_cfg = &fe_ch1_bandcfg, - .factory_config = &fact_ch1_band_cfg, - }, - { - .name = "watchdog", - .driver = &RFFEWatchdog, - .driver_cfg = &fe_ch1_watchdog, - }, - { - .name = "power", - .driver = &RFPowerMonitor, - .driver_cfg = &fe_ch1_ads7830, - }, - { - .name = "tx", - .driver = &DATXXR5APP, - /* this struct should be compatible with the DAT cfg struct */ - .driver_cfg = &fe_ch1_gain, - .factory_config = &fact_ch1_tx_gain_cfg, - }, - { - .name = "rx", - .driver = &DATXXR5APP, - /* this struct should be compatible with the DAT cfg struct */ - .driver_cfg = &fe_ch1_lna, - .factory_config = &fact_ch1_rx_gain_cfg, - }, - {} - }, - .commands = (Command[]){ - { - .name = "enable", - .cb_cmd = RFFE_enablePA, - }, - { - .name = "disable", - .cb_cmd = RFFE_disablePA, - }, - {} - }, - }, - { - .name = "ch2_fe", - .driver_cfg = &fe_ch2_pwrcfg, /* For en/dis context */ - .components = (Component[]){ - { - .name = "ch2_band", - /* Placeholder driver to let us test the DAT driver */ - .driver = &FE_Param, - .driver_cfg = &fe_ch2_bandcfg, - .factory_config = &fact_ch2_band_cfg, - }, - { - .name = "watchdog", - .driver = &RFFEWatchdog, - .driver_cfg = &fe_ch2_watchdog, - }, - { - .name = "power", - .driver = &RFPowerMonitor, - .driver_cfg = &fe_ch2_ads7830, - }, - { - .name = "tx", - .driver = &DATXXR5APP, - /* this struct should be compatible with the DAT cfg struct */ - .driver_cfg = &fe_ch2_gain, - .factory_config = &fact_ch2_tx_gain_cfg, - }, - { - .name = "rx", - .driver = &DATXXR5APP, - /* this struct should be compatible with the DAT cfg struct */ - .driver_cfg = &fe_ch2_lna, - .factory_config = &fact_ch2_rx_gain_cfg, - }, - {} - }, - .commands = (Command[]){ - { - .name = "enable", - .cb_cmd = RFFE_enablePA, - }, - { - .name = "disable", - .cb_cmd = RFFE_disablePA, - }, - {} - }, - }, - {} - }, - .driver_cfg = &fe_rffecfg, - .ssHookSet = &(SSHookSet){ - .preInitFxn = (ssHook_Cb)rffe_pre_init, - .postInitFxn = (ssHook_Cb)rffe_post_init, - }, }, + { .name = "sync", + .driver_cfg = &sync_gpiocfg, + .ssHookSet = + &(SSHookSet){ + .preInitFxn = (ssHook_Cb)SYNC_Init, + .postInitFxn = NULL, + }, + .components = + (Component[]){ + { + .name = "comp_all", + .driver_cfg = &sync_gpiocfg, + .commands = + (Command[]){ + { + .name = "reset", + .cb_cmd = SYNC_reset, + }, + {} }, + .postDisabled = POST_DISABLED, + }, + { + .name = "gps", + .driver_cfg = &sync_gpiocfg, + .driver = &Sync_IO, + }, + { .name = "sensor", + .components = + (Component[]){ + { + .name = "temp_sensor1", + .driver = &ADT7481, + .driver_cfg = &sync_gps_ts, + .factory_config = + &fact_sync_ts_cfg, + }, + {} } }, + {} } }, + { .name = "testmodule", + .components = + (Component[]){ + { + .name = "comp_all", + .commands = + (Command[]){ + { + .name = "reset", + .cb_cmd = + TestMod_cmdReset, + }, + {} }, + .postDisabled = POST_DISABLED, + }, + { + .name = "2gsim", + .driver = &Testmod_G510, + .driver_cfg = &testModuleCfg, + }, + {} } }, { - .name = "sync", - .driver_cfg = &sync_gpiocfg, - .ssHookSet = &(SSHookSet){ - .preInitFxn = (ssHook_Cb)SYNC_Init, - .postInitFxn = NULL, - }, - .components = (Component[]){ - { - .name = "comp_all", - .driver_cfg = &sync_gpiocfg, - .commands = (Command[]){ - { - .name = "reset", - .cb_cmd = SYNC_reset, - }, - {} - }, - .postDisabled = POST_DISABLED, - }, - { - .name = "gps", - .driver_cfg = &sync_gpiocfg, - .driver = &Sync_IO, - }, - { - .name = "sensor", - .components = (Component[]){ - { - .name = "temp_sensor1", - .driver = &ADT7481, - .driver_cfg = &sync_gps_ts, - .factory_config = &fact_sync_ts_cfg, - }, - {} - } - }, - {} - } - }, - { - .name = "testmodule", - .components = (Component[]){ - { - .name = "comp_all", - .commands = (Command[]){ - { - .name = "reset", - .cb_cmd = TestMod_cmdReset, - }, - {} - }, - .postDisabled = POST_DISABLED, - }, - { - .name = "2gsim", - .driver = &Testmod_G510, - .driver_cfg = &testModuleCfg, - }, - {} - } - }, - { - .name = "debug", - .components = (Component[]){ - { - .name = "comp_all", - .postDisabled = POST_DISABLED, - }, - { - .name = "I2C", - .components = (Component[]){ - { - .name = "comp_all", - .postDisabled = POST_DISABLED - }, - { - .name = "bus0", - .driver = &OC_I2C, - .driver_cfg = &debug_I2C0, - .postDisabled = POST_DISABLED - }, - { - .name = "bus1", - .driver = &OC_I2C, - .driver_cfg = &debug_I2C1, - .postDisabled = POST_DISABLED - }, - { - .name = "bus2", - .driver = &OC_I2C, - .driver_cfg = &debug_I2C2, - .postDisabled = POST_DISABLED - }, - { - .name = "bus3", - .driver = &OC_I2C, - .driver_cfg = &debug_I2C3, - .postDisabled = POST_DISABLED - }, - { - .name = "bus4", - .driver = &OC_I2C, - .driver_cfg = &debug_I2C4, - .postDisabled = POST_DISABLED - }, - { - .name = "bus6", - .driver = &OC_I2C, - .driver_cfg = &debug_I2C6, - .postDisabled = POST_DISABLED - }, - { - .name = "bus7", - .driver = &OC_I2C, - .driver_cfg = &debug_I2C7, - .postDisabled = POST_DISABLED - }, - { - .name = "bus8", - .driver = &OC_I2C, - .driver_cfg = &debug_I2C8, - .postDisabled = POST_DISABLED - }, - {} - }, - }, - { - .name = "ec", - .components = (Component[]){ - { - .name = "comp_all", - .postDisabled = POST_DISABLED, - }, - { - .name = "PA", - .driver = &OC_GPIO, - .driver_cfg = &debug_ec_gpio_pa, - .postDisabled = POST_DISABLED, - }, - { - .name = "PB", - .driver = &OC_GPIO, - .driver_cfg =&debug_ec_gpio_pb, - .postDisabled = POST_DISABLED, - }, - { - .name = "PC", - .driver = &OC_GPIO, - .driver_cfg = &debug_ec_gpio_pc, - .postDisabled = POST_DISABLED, - }, - { - .name = "PD", - .driver = &OC_GPIO, - .driver_cfg = &debug_ec_gpio_pd, - .postDisabled = POST_DISABLED, - }, - { - .name = "PE", - .driver = &OC_GPIO, - .driver_cfg = &debug_ec_gpio_pe, - .postDisabled = POST_DISABLED, - }, - { - .name = "PF", - .driver = &OC_GPIO, - .driver_cfg = &debug_ec_gpio_pf, - .postDisabled = POST_DISABLED, - }, - { - .name = "PG", - .driver = &OC_GPIO, - .driver_cfg = &debug_ec_gpio_pg, - .postDisabled = POST_DISABLED, - }, - { - .name = "PH", - .driver = &OC_GPIO, - .driver_cfg = &debug_ec_gpio_ph, - .postDisabled = POST_DISABLED, - }, - { - .name = "PJ", - .driver = &OC_GPIO, - .driver_cfg = &debug_ec_gpio_pj, - .postDisabled = POST_DISABLED, - }, - { - .name = "PK", - .driver = &OC_GPIO, - .driver_cfg = &debug_ec_gpio_pk, - .postDisabled = POST_DISABLED, - }, - { - .name = "PL", - .driver = &OC_GPIO, - .driver_cfg = &debug_ec_gpio_pl, - .postDisabled = POST_DISABLED, - }, - { - .name = "PM", - .driver = &OC_GPIO, - .driver_cfg = &debug_ec_gpio_pm, - .postDisabled = POST_DISABLED, - }, - { - .name = "PN", - .driver = &OC_GPIO, - .driver_cfg = &debug_ec_gpio_pn, - .postDisabled = POST_DISABLED, - }, - { - .name = "PP", - .driver = &OC_GPIO, - .driver_cfg = &debug_ec_gpio_pn, - .postDisabled = POST_DISABLED, - }, - { - .name = "PQ", - .driver = &OC_GPIO, - .driver_cfg = &debug_ec_gpio_pq, - .postDisabled = POST_DISABLED, - }, - {} - }, - }, - { - .name = "gbc", - .components = (Component[]) { - { - .name = "comp_all", - .postDisabled = POST_DISABLED, - }, - { - .name = "ioexpanderx70", - .driver = &OC_GPIO, - .driver_cfg = &debug_gbc_ioexpanderx70, - }, - { - .name = "ioexpanderx71", - .driver = &OC_GPIO, - .driver_cfg = &debug_gbc_ioexpanderx71, - }, - {} - }, - }, - { - .name = "sdr", - .components = (Component[]) { - { - .name = "comp_all", - .postDisabled = POST_DISABLED, - }, - { - .name = "ioexpanderx1E", - .driver = &OC_GPIO, - .driver_cfg = &debug_sdr_ioexpanderx1E, - }, - {} - } - }, - { - .name = "fe", - .components = (Component[]) { - { - .name = "comp_all", - .postDisabled = POST_DISABLED, - }, - { - .name = "ioexpanderx18", - .driver = &OC_GPIO, - .driver_cfg = &debug_sdr_ioexpanderx1E, - }, - { - .name = "ioexpanderx1C", - .driver = &OC_GPIO, - .driver_cfg = &debug_fe_ioexpanderx1C, - }, - { - .name = "ioexpanderx1B", - .driver = &OC_GPIO, - .driver_cfg = &debug_fe_ioexpanderx1B, - }, - { - .name = "ioexpanderx1A", - .driver = &OC_GPIO, - .driver_cfg = &debug_fe_ioexpanderx1A, - }, - { - .name = "ioexpanderx1D", - .driver = &OC_GPIO, - .driver_cfg = &debug_fe_ioexpanderx1D, - }, - {} + .name = "debug", + .components = + (Component[]){ + { + .name = "comp_all", + .postDisabled = POST_DISABLED, + }, + { + .name = "I2C", + .components = + (Component[]){ + { .name = "comp_all", + .postDisabled = POST_DISABLED }, + { .name = "bus0", + .driver = &OC_I2C, + .driver_cfg = &debug_I2C0, + .postDisabled = POST_DISABLED }, + { .name = "bus1", + .driver = &OC_I2C, + .driver_cfg = &debug_I2C1, + .postDisabled = POST_DISABLED }, + { .name = "bus2", + .driver = &OC_I2C, + .driver_cfg = &debug_I2C2, + .postDisabled = POST_DISABLED }, + { .name = "bus3", + .driver = &OC_I2C, + .driver_cfg = &debug_I2C3, + .postDisabled = POST_DISABLED }, + { .name = "bus4", + .driver = &OC_I2C, + .driver_cfg = &debug_I2C4, + .postDisabled = POST_DISABLED }, + { .name = "bus6", + .driver = &OC_I2C, + .driver_cfg = &debug_I2C6, + .postDisabled = POST_DISABLED }, + { .name = "bus7", + .driver = &OC_I2C, + .driver_cfg = &debug_I2C7, + .postDisabled = POST_DISABLED }, + { .name = "bus8", + .driver = &OC_I2C, + .driver_cfg = &debug_I2C8, + .postDisabled = POST_DISABLED }, + {} }, + }, + { + .name = "ec", + .components = + (Component[]){ + { + .name = "comp_all", + .postDisabled = POST_DISABLED, + }, + { + .name = "PA", + .driver = &OC_GPIO, + .driver_cfg = + &debug_ec_gpio_pa, + .postDisabled = POST_DISABLED, + }, + { + .name = "PB", + .driver = &OC_GPIO, + .driver_cfg = + &debug_ec_gpio_pb, + .postDisabled = POST_DISABLED, + }, + { + .name = "PC", + .driver = &OC_GPIO, + .driver_cfg = + &debug_ec_gpio_pc, + .postDisabled = POST_DISABLED, + }, + { + .name = "PD", + .driver = &OC_GPIO, + .driver_cfg = + &debug_ec_gpio_pd, + .postDisabled = POST_DISABLED, + }, + { + .name = "PE", + .driver = &OC_GPIO, + .driver_cfg = + &debug_ec_gpio_pe, + .postDisabled = POST_DISABLED, + }, + { + .name = "PF", + .driver = &OC_GPIO, + .driver_cfg = + &debug_ec_gpio_pf, + .postDisabled = POST_DISABLED, + }, + { + .name = "PG", + .driver = &OC_GPIO, + .driver_cfg = + &debug_ec_gpio_pg, + .postDisabled = POST_DISABLED, + }, + { + .name = "PH", + .driver = &OC_GPIO, + .driver_cfg = + &debug_ec_gpio_ph, + .postDisabled = POST_DISABLED, + }, + { + .name = "PJ", + .driver = &OC_GPIO, + .driver_cfg = + &debug_ec_gpio_pj, + .postDisabled = POST_DISABLED, + }, + { + .name = "PK", + .driver = &OC_GPIO, + .driver_cfg = + &debug_ec_gpio_pk, + .postDisabled = POST_DISABLED, + }, + { + .name = "PL", + .driver = &OC_GPIO, + .driver_cfg = + &debug_ec_gpio_pl, + .postDisabled = POST_DISABLED, + }, + { + .name = "PM", + .driver = &OC_GPIO, + .driver_cfg = + &debug_ec_gpio_pm, + .postDisabled = POST_DISABLED, + }, + { + .name = "PN", + .driver = &OC_GPIO, + .driver_cfg = + &debug_ec_gpio_pn, + .postDisabled = POST_DISABLED, + }, + { + .name = "PP", + .driver = &OC_GPIO, + .driver_cfg = + &debug_ec_gpio_pn, + .postDisabled = POST_DISABLED, + }, + { + .name = "PQ", + .driver = &OC_GPIO, + .driver_cfg = + &debug_ec_gpio_pq, + .postDisabled = POST_DISABLED, + }, + {} }, + }, + { + .name = "gbc", + .components = + (Component[]){ + { + .name = "comp_all", + .postDisabled = POST_DISABLED, + }, + { + .name = "ioexpanderx70", + .driver = &OC_GPIO, + .driver_cfg = + &debug_gbc_ioexpanderx70, + }, + { + .name = "ioexpanderx71", + .driver = &OC_GPIO, + .driver_cfg = + &debug_gbc_ioexpanderx71, + }, + {} }, + }, + { .name = "sdr", + .components = + (Component[]){ + { + .name = "comp_all", + .postDisabled = POST_DISABLED, + }, + { + .name = "ioexpanderx1E", + .driver = &OC_GPIO, + .driver_cfg = + &debug_sdr_ioexpanderx1E, + }, + {} } }, + { .name = "fe", + .components = + (Component[]){ + { + .name = "comp_all", + .postDisabled = POST_DISABLED, + }, + { + .name = "ioexpanderx18", + .driver = &OC_GPIO, + .driver_cfg = + &debug_sdr_ioexpanderx1E, + }, + { + .name = "ioexpanderx1C", + .driver = &OC_GPIO, + .driver_cfg = + &debug_fe_ioexpanderx1C, + }, + { + .name = "ioexpanderx1B", + .driver = &OC_GPIO, + .driver_cfg = + &debug_fe_ioexpanderx1B, + }, + { + .name = "ioexpanderx1A", + .driver = &OC_GPIO, + .driver_cfg = + &debug_fe_ioexpanderx1A, + }, + { + .name = "ioexpanderx1D", + .driver = &OC_GPIO, + .driver_cfg = + &debug_fe_ioexpanderx1D, + }, + {} - } - }, - { - .name = "sync", - .components = (Component[]) { - { - .name = "comp_all", - .postDisabled = POST_DISABLED, - }, - { - .name = "ioexpanderx71", - .driver = &OC_GPIO, - .driver_cfg = &debug_sync_ioexpanderx71, - }, - {} - } - }, - { - .name = "ethernet", - .components = (Component[]) { - { - .name = "comp_all", - .postDisabled = POST_DISABLED, - }, - { - .name = "port0", - .driver = &OC_MDIO, - .driver_cfg = &debug_mdio_phyport0, - .postDisabled = POST_DISABLED, - }, - { - .name = "port1", - .driver = &OC_MDIO, - .driver_cfg = &debug_mdio_phyport1, - .postDisabled = POST_DISABLED, - }, - { - .name = "port2", - .driver = &OC_MDIO, - .driver_cfg = &debug_mdio_phyport2, - .postDisabled = POST_DISABLED, - }, - { - .name = "port3", - .driver = &OC_MDIO, - .driver_cfg = &debug_mdio_phyport3, - .postDisabled = POST_DISABLED, - }, - { - .name = "port4", - .driver = &OC_MDIO, - .driver_cfg = &debug_mdio_phyport4, - .postDisabled = POST_DISABLED, - }, - { - .name = "global1", - .driver = &OC_MDIO, - .driver_cfg = &debug_mdio_global1, - .postDisabled = POST_DISABLED, - }, - { - .name = "global2", - .driver = &OC_MDIO, - .driver_cfg = &debug_mdio_global2, - .postDisabled = POST_DISABLED, - }, - { - .name = "swport0", - .driver = &OC_MDIO, - .driver_cfg = &debug_mdio_swport0, - .postDisabled = POST_DISABLED, - }, - { - .name = "swport1", - .driver = &OC_MDIO, - .driver_cfg = &debug_mdio_swport1, - .postDisabled = POST_DISABLED, - }, - { - .name = "swport2", - .driver = &OC_MDIO, - .driver_cfg = &debug_mdio_swport2, - .postDisabled = POST_DISABLED, - }, - { - .name = "swport3", - .driver = &OC_MDIO, - .driver_cfg = &debug_mdio_swport3, - .postDisabled = POST_DISABLED, - }, - { - .name = "swport4", - .driver = &OC_MDIO, - .driver_cfg = &debug_mdio_swport4, - .postDisabled = POST_DISABLED, - }, - { - .name = "swport5", - .driver = &OC_MDIO, - .driver_cfg = &debug_mdio_swport5, - .postDisabled = POST_DISABLED, - }, - { - .name = "swport6", - .driver = &OC_MDIO, - .driver_cfg = &debug_mdio_swport6, - .postDisabled = POST_DISABLED, - }, - {} - } - }, - {} - }, + } }, + { .name = "sync", + .components = + (Component[]){ + { + .name = "comp_all", + .postDisabled = POST_DISABLED, + }, + { + .name = "ioexpanderx71", + .driver = &OC_GPIO, + .driver_cfg = + &debug_sync_ioexpanderx71, + }, + {} } }, + { .name = "ethernet", + .components = + (Component[]){ + { + .name = "comp_all", + .postDisabled = POST_DISABLED, + }, + { + .name = "port0", + .driver = &OC_MDIO, + .driver_cfg = + &debug_mdio_phyport0, + .postDisabled = POST_DISABLED, + }, + { + .name = "port1", + .driver = &OC_MDIO, + .driver_cfg = + &debug_mdio_phyport1, + .postDisabled = POST_DISABLED, + }, + { + .name = "port2", + .driver = &OC_MDIO, + .driver_cfg = + &debug_mdio_phyport2, + .postDisabled = POST_DISABLED, + }, + { + .name = "port3", + .driver = &OC_MDIO, + .driver_cfg = + &debug_mdio_phyport3, + .postDisabled = POST_DISABLED, + }, + { + .name = "port4", + .driver = &OC_MDIO, + .driver_cfg = + &debug_mdio_phyport4, + .postDisabled = POST_DISABLED, + }, + { + .name = "global1", + .driver = &OC_MDIO, + .driver_cfg = + &debug_mdio_global1, + .postDisabled = POST_DISABLED, + }, + { + .name = "global2", + .driver = &OC_MDIO, + .driver_cfg = + &debug_mdio_global2, + .postDisabled = POST_DISABLED, + }, + { + .name = "swport0", + .driver = &OC_MDIO, + .driver_cfg = + &debug_mdio_swport0, + .postDisabled = POST_DISABLED, + }, + { + .name = "swport1", + .driver = &OC_MDIO, + .driver_cfg = + &debug_mdio_swport1, + .postDisabled = POST_DISABLED, + }, + { + .name = "swport2", + .driver = &OC_MDIO, + .driver_cfg = + &debug_mdio_swport2, + .postDisabled = POST_DISABLED, + }, + { + .name = "swport3", + .driver = &OC_MDIO, + .driver_cfg = + &debug_mdio_swport3, + .postDisabled = POST_DISABLED, + }, + { + .name = "swport4", + .driver = &OC_MDIO, + .driver_cfg = + &debug_mdio_swport4, + .postDisabled = POST_DISABLED, + }, + { + .name = "swport5", + .driver = &OC_MDIO, + .driver_cfg = + &debug_mdio_swport5, + .postDisabled = POST_DISABLED, + }, + { + .name = "swport6", + .driver = &OC_MDIO, + .driver_cfg = + &debug_mdio_swport6, + .postDisabled = POST_DISABLED, + }, + {} } }, + {} }, }, {} }; diff --git a/firmware/ec/src/Board.h b/firmware/ec/src/Board.h index 7a8842ee49..3de01f14df 100644 --- a/firmware/ec/src/Board.h +++ b/firmware/ec/src/Board.h @@ -44,46 +44,46 @@ extern "C" { #include "common/inc/global/OC_CONNECT1.h" -#define Board_initEMAC OC_CONNECT1_initEMAC -#define Board_initGeneral OC_CONNECT1_initGeneral -#define Board_initGPIO OC_CONNECT1_initGPIO -#define Board_initI2C OC_CONNECT1_initI2C -#define Board_initUART OC_CONNECT1_initUART -#define Board_initUSB OC_CONNECT1_initUSB -#define Board_initWatchdog OC_CONNECT1_initWatchdog +#define Board_initEMAC OC_CONNECT1_initEMAC +#define Board_initGeneral OC_CONNECT1_initGeneral +#define Board_initGPIO OC_CONNECT1_initGPIO +#define Board_initI2C OC_CONNECT1_initI2C +#define Board_initUART OC_CONNECT1_initUART +#define Board_initUSB OC_CONNECT1_initUSB +#define Board_initWatchdog OC_CONNECT1_initWatchdog -#define Board_IOEXP_ALERT OC_EC_GBC_IOEXP71_ALERT -#define Board_ECINA_ALERT OC_EC_GBC_INA_ALERT -#define Board_APINA_ALERT OC_EC_GBC_AP_INA_ALERT +#define Board_IOEXP_ALERT OC_EC_GBC_IOEXP71_ALERT +#define Board_ECINA_ALERT OC_EC_GBC_INA_ALERT +#define Board_APINA_ALERT OC_EC_GBC_AP_INA_ALERT #define Board_SDRFPGA_TEMPINA_ALERT OC_EC_SDR_FPGA_TEMP_INA_ALERT -#define Board_SDR_INA_ALERT OC_EC_SDR_INA_ALERT -#define Board_RFFE_TEMP_INA_ALERT OC_EC_RFFE_TEMP_INA_ALERT -#define Board_SYNC_IOEXP_ALERT OC_EC_SYNC_IOEXP_ALERT -#define Board_LeadAcidAlert OC_EC_PWR_LACID_ALERT -#define Board_LithiumIonAlert OC_EC_PWR_LION_ALERT -#define Board_PSEALERT OC_EC_GBC_PSE_ALERT -#define Board_PD_PWRGDAlert OC_EC_PD_PWRGD_ALERT -#define Board_SOC_UART3_TX OC_EC_SOC_UART3_TX +#define Board_SDR_INA_ALERT OC_EC_SDR_INA_ALERT +#define Board_RFFE_TEMP_INA_ALERT OC_EC_RFFE_TEMP_INA_ALERT +#define Board_SYNC_IOEXP_ALERT OC_EC_SYNC_IOEXP_ALERT +#define Board_LeadAcidAlert OC_EC_PWR_LACID_ALERT +#define Board_LithiumIonAlert OC_EC_PWR_LION_ALERT +#define Board_PSEALERT OC_EC_GBC_PSE_ALERT +#define Board_PD_PWRGDAlert OC_EC_PD_PWRGD_ALERT +#define Board_SOC_UART3_TX OC_EC_SOC_UART3_TX -#define Board_I2C0 OC_CONNECT1_I2C0 -#define Board_I2C1 OC_CONNECT1_I2C1 -#define Board_I2C2 OC_CONNECT1_I2C2 -#define Board_I2C3 OC_CONNECT1_I2C3 -#define Board_I2C4 OC_CONNECT1_I2C4 -#define Board_I2C6 OC_CONNECT1_I2C6 -#define Board_I2C7 OC_CONNECT1_I2C7 -#define Board_I2C8 OC_CONNECT1_I2C8 -#define Board_I2CCOUNT OC_CONNECT1_I2CCOUNT +#define Board_I2C0 OC_CONNECT1_I2C0 +#define Board_I2C1 OC_CONNECT1_I2C1 +#define Board_I2C2 OC_CONNECT1_I2C2 +#define Board_I2C3 OC_CONNECT1_I2C3 +#define Board_I2C4 OC_CONNECT1_I2C4 +#define Board_I2C6 OC_CONNECT1_I2C6 +#define Board_I2C7 OC_CONNECT1_I2C7 +#define Board_I2C8 OC_CONNECT1_I2C8 +#define Board_I2CCOUNT OC_CONNECT1_I2CCOUNT -#define Board_USBHOST OC_CONNECT1_USBHOST -#define Board_USBDEVICE OC_CONNECT1_USBDEVICE +#define Board_USBHOST OC_CONNECT1_USBHOST +#define Board_USBDEVICE OC_CONNECT1_USBDEVICE // TODO: maybe rename to "UART_GSM" and stuff to be more abstracted from HW -#define Board_UART0 OC_CONNECT1_UART0 -#define Board_UART3 OC_CONNECT1_UART3 -#define Board_UART4 OC_CONNECT1_UART4 -#define Board_UARTXR0 OC_CONNECT1_UARTXR0 -#define Board_WATCHDOG0 OC_CONNECT1_WATCHDOG0 +#define Board_UART0 OC_CONNECT1_UART0 +#define Board_UART3 OC_CONNECT1_UART3 +#define Board_UART4 OC_CONNECT1_UART4 +#define Board_UARTXR0 OC_CONNECT1_UARTXR0 +#define Board_WATCHDOG0 OC_CONNECT1_WATCHDOG0 #ifdef __cplusplus } diff --git a/firmware/ec/src/bigbrother.c b/firmware/ec/src/bigbrother.c index 9417886a4b..aa56c78674 100644 --- a/firmware/ec/src/bigbrother.c +++ b/firmware/ec/src/bigbrother.c @@ -73,7 +73,8 @@ extern void usb_tx_createtask(void); extern void uartdma_rx_createtask(void); extern void uartdma_tx_createtask(void); extern void ebmp_create_task(void); -extern void watchdog_create_task(void);; +extern void watchdog_create_task(void); +; /***************************************************************************** ** FUNCTION NAME : bigbrother_process_tx_msg @@ -90,7 +91,7 @@ static ReturnStatus bigbrother_process_tx_msg(uint8_t *pMsg) ReturnStatus status = RETURN_OK; LOGGER_DEBUG("BIGBROTHER:INFO:: Processing Big Brother TX Message.\n"); if (pMsg != NULL) { - Util_enqueueMsg(gossiperTxMsgQueue, semGossiperMsg, (uint8_t*) pMsg); + Util_enqueueMsg(gossiperTxMsgQueue, semGossiperMsg, (uint8_t *)pMsg); } else { LOGGER_ERROR("BIGBROTHER::ERROR::No Valid Pointer.\n"); } @@ -131,10 +132,10 @@ static ReturnStatus bigbrother_process_rx_msg(uint8_t *pMsg) { ReturnStatus status = RETURN_OK; LOGGER_DEBUG("BIGBROTHER:INFO:: Processing Big Brother RX Message.\n"); - OCMPMessageFrame * pOCMPMessageFrame = (OCMPMessageFrame *) pMsg; + OCMPMessageFrame *pOCMPMessageFrame = (OCMPMessageFrame *)pMsg; if (pOCMPMessageFrame != NULL) { LOGGER_DEBUG("BIGBROTHER:INFO:: RX Msg recieved with Length: 0x%x," - "Interface: 0x%x, Seq.No: 0x%x, TimeStamp: 0x%x.\n", + "Interface: 0x%x, Seq.No: 0x%x, TimeStamp: 0x%x.\n", pOCMPMessageFrame->header.ocmpFrameLen, pOCMPMessageFrame->header.ocmpInterface, pOCMPMessageFrame->header.ocmpSeqNumber, @@ -189,7 +190,7 @@ extern OcGpio_Port gbc_io_0; //OcGpio_Pin pin_r_irq_intrpt = { &gbc_io_0, 0, OCGPIO_CFG_IN_PU }; //OcGpio_Pin pin_inven_eeprom_wp = { &gbc_io_0, 1, OCGPIO_CFG_OUT_OD_NOPULL }; //OcGpio_Pin pin_s_id_eeprom_wp = { &gbc_io_0, 2, OCGPIO_CFG_OUT_OD_NOPULL }; -OcGpio_Pin pin_uart_sel = { &gbc_io_0, 3, OCGPIO_CFG_OUT_OD_NOPULL }; +OcGpio_Pin pin_uart_sel = { &gbc_io_0, 3, OCGPIO_CFG_OUT_OD_NOPULL }; //OcGpio_Pin pin_tempsen_evt1 = { &gbc_io_0, 4 }; //OcGpio_Pin pin_tempsen_evt2 = { &gbc_io_0, 5 }; //OcGpio_Pin pin_tempsen_evt3 = { &gbc_io_0, 6 }; @@ -198,10 +199,10 @@ OcGpio_Pin pin_uart_sel = { &gbc_io_0, 3, OCGPIO_CFG_OUT_OD_NOPULL } //OcGpio_Pin pin_buzzer_on = { &gbc_io_0, 10, OCGPIO_CFG_OUT_OD_NOPULL }; //OcGpio_Pin pin_int_bat_prsnt = { &gbc_io_0, 11 }; //OcGpio_Pin pin_ext_bat_prsnt = { &gbc_io_0, 12 }; -OcGpio_Pin pin_ec_syncconn_gpio1 = { &gbc_io_0, 13, OCGPIO_CFG_OUT_OD_NOPULL }; -OcGpio_Pin pin_eth_sw_ec_intn = { &gbc_io_0, 14 }; +OcGpio_Pin pin_ec_syncconn_gpio1 = { &gbc_io_0, 13, OCGPIO_CFG_OUT_OD_NOPULL }; +OcGpio_Pin pin_eth_sw_ec_intn = { &gbc_io_0, 14 }; -OcGpio_Pin pin_v5_a_pgood = { &gbc_io_1, 3, OCGPIO_CFG_IN_PU }; +OcGpio_Pin pin_v5_a_pgood = { &gbc_io_1, 3, OCGPIO_CFG_IN_PU }; extern OcGpio_Port sync_io; extern OcGpio_Port sdr_fx3_io; @@ -306,9 +307,9 @@ static void bigborther_spwan_task(void) /* Check the list for possible devices connected. */ /* Launches other tasks */ - usb_rx_createtask(); // P - 05 - usb_tx_createtask(); // P - 04 - gossiper_createtask(); // P - 06 + usb_rx_createtask(); // P - 05 + usb_tx_createtask(); // P - 04 + gossiper_createtask(); // P - 06 ebmp_create_task(); watchdog_create_task(); @@ -332,17 +333,20 @@ static void bigbrother_init(void) /*Creating Semaphore for RX Message Queue*/ semBigBrotherMsg = Semaphore_create(0, NULL, NULL); if (semBigBrotherMsg == NULL) { - LOGGER_ERROR("BIGBROTHER:ERROR::BIGBROTHER RX Semaphore creation failed.\n"); + LOGGER_ERROR( + "BIGBROTHER:ERROR::BIGBROTHER RX Semaphore creation failed.\n"); } /*Creating RX Message Queue*/ bigBrotherRxMsgQueue = Util_constructQueue(&bigBrotherRxMsg); - LOGGER_DEBUG("BIGBROTHER:INFO::Constructing message Queue for 0x%x Big Brother RX Messages.\n", - bigBrotherRxMsgQueue); + LOGGER_DEBUG( + "BIGBROTHER:INFO::Constructing message Queue for 0x%x Big Brother RX Messages.\n", + bigBrotherRxMsgQueue); /*Creating TX Message Queue*/ bigBrotherTxMsgQueue = Util_constructQueue(&bigBrotherTxMsg); - LOGGER_DEBUG("BIGBROTHER:INFO::Constructing message Queue for 0x%x Big Brother RX Messages.\n", - bigBrotherTxMsgQueue); + LOGGER_DEBUG( + "BIGBROTHER:INFO::Constructing message Queue for 0x%x Big Brother RX Messages.\n", + bigBrotherTxMsgQueue); } /***************************************************************************** @@ -370,15 +374,15 @@ static void bigbrother_taskfxn(UArg a0, UArg a1) while (true) { if (Semaphore_pend(semBigBrotherMsg, BIOS_WAIT_FOREVER)) { while (!Queue_empty(bigBrotherRxMsgQueue)) { - uint8_t *pWrite = (uint8_t *) Util_dequeueMsg( - bigBrotherRxMsgQueue); + uint8_t *pWrite = + (uint8_t *)Util_dequeueMsg(bigBrotherRxMsgQueue); if (pWrite) { bigbrother_process_rx_msg(pWrite); } } while (!Queue_empty(bigBrotherTxMsgQueue)) { - uint8_t *pWrite = (uint8_t *) Util_dequeueMsg( - bigBrotherTxMsgQueue); + uint8_t *pWrite = + (uint8_t *)Util_dequeueMsg(bigBrotherTxMsgQueue); if (pWrite) { bigbrother_process_tx_msg(pWrite); } diff --git a/firmware/ec/src/comm/gossiper.c b/firmware/ec/src/comm/gossiper.c index 5c981cc0a2..9dc04627ff 100644 --- a/firmware/ec/src/comm/gossiper.c +++ b/firmware/ec/src/comm/gossiper.c @@ -111,18 +111,21 @@ static void gossiper_init(void) /*Creating Semaphore for RX Message Queue*/ semGossiperMsg = Semaphore_create(0, NULL, NULL); if (semGossiperMsg == NULL) { - LOGGER_ERROR("GOSSIPER:ERROR::GOSSIPER RX Semaphore creation failed.\n"); + LOGGER_ERROR( + "GOSSIPER:ERROR::GOSSIPER RX Semaphore creation failed.\n"); } /*Creating RX Message Queue*/ gossiperRxMsgQueue = Util_constructQueue(&gossiperRxMsg); - LOGGER_DEBUG("GOSSIPER:INFO::Constructing message Queue 0x%x for RX Gossiper Messages.\n", - gossiperRxMsgQueue); + LOGGER_DEBUG( + "GOSSIPER:INFO::Constructing message Queue 0x%x for RX Gossiper Messages.\n", + gossiperRxMsgQueue); /*Creating TX Message Queue*/ gossiperTxMsgQueue = Util_constructQueue(&gossiperTxMsg); - LOGGER_DEBUG("GOSSIPER:INFO::Constructing message Queue 0x%x for TX Gossiper Messages.\n", - gossiperTxMsgQueue); + LOGGER_DEBUG( + "GOSSIPER:INFO::Constructing message Queue 0x%x for TX Gossiper Messages.\n", + gossiperTxMsgQueue); } /***************************************************************************** @@ -142,8 +145,8 @@ static void gossiper_taskfxn(UArg a0, UArg a1) if (Semaphore_pend(semGossiperMsg, BIOS_WAIT_FOREVER)) { /* Gossiper RX Messgaes */ while (!Queue_empty(gossiperRxMsgQueue)) { - uint8_t *pWrite = (uint8_t *) Util_dequeueMsg( - gossiperRxMsgQueue); + uint8_t *pWrite = + (uint8_t *)Util_dequeueMsg(gossiperRxMsgQueue); if (pWrite) { gossiper_process_rx_msg(pWrite); } else { @@ -153,8 +156,8 @@ static void gossiper_taskfxn(UArg a0, UArg a1) /* Gossiper TX Messgaes */ while (!Queue_empty(gossiperTxMsgQueue)) { - uint8_t *pWrite = (uint8_t *) Util_dequeueMsg( - gossiperTxMsgQueue); + uint8_t *pWrite = + (uint8_t *)Util_dequeueMsg(gossiperTxMsgQueue); if (pWrite) { gossiper_process_tx_msg(pWrite); } else { @@ -180,13 +183,14 @@ static ReturnStatus gossiper_process_rx_msg(uint8_t *pMsg) ReturnStatus status = RETURN_OK; LOGGER_DEBUG("GOSSIPER:INFO:: Processing Gossiper RX Message.\n"); - OCMPMessageFrame * pOCMPMessageFrame = (OCMPMessageFrame *) pMsg; + OCMPMessageFrame *pOCMPMessageFrame = (OCMPMessageFrame *)pMsg; if (pOCMPMessageFrame != NULL) { - LOGGER_DEBUG("GOSSIPER:INFO:: RX Msg recieved with Length: 0x%x, Interface: 0x%x, Seq.No: 0x%x, TimeStamp: 0x%x.\n", - pOCMPMessageFrame->header.ocmpFrameLen, - pOCMPMessageFrame->header.ocmpInterface, - pOCMPMessageFrame->header.ocmpSeqNumber, - pOCMPMessageFrame->header.ocmpTimestamp); + LOGGER_DEBUG( + "GOSSIPER:INFO:: RX Msg recieved with Length: 0x%x, Interface: 0x%x, Seq.No: 0x%x, TimeStamp: 0x%x.\n", + pOCMPMessageFrame->header.ocmpFrameLen, + pOCMPMessageFrame->header.ocmpInterface, + pOCMPMessageFrame->header.ocmpSeqNumber, + pOCMPMessageFrame->header.ocmpTimestamp); /*Update the Debug info required based on the debug jumper connected*/ //status = CheckDebugEnabled() if (pOCMPMessageFrame->message.msgtype == OCMP_MSG_TYPE_DEBUG) { @@ -199,7 +203,8 @@ static ReturnStatus gossiper_process_rx_msg(uint8_t *pMsg) } #endif } - Util_enqueueMsg(bigBrotherRxMsgQueue, semBigBrotherMsg, (uint8_t*) pMsg); + Util_enqueueMsg(bigBrotherRxMsgQueue, semBigBrotherMsg, + (uint8_t *)pMsg); } else { LOGGER_ERROR("GOSSIPER:ERROR:: Not valid pointer.\n"); } @@ -220,18 +225,18 @@ static ReturnStatus gossiper_process_tx_msg(uint8_t *pMsg) { ReturnStatus status = RETURN_OK; LOGGER_DEBUG("GOSSIPER:INFO:: Processing Gossiper TX Message.\n"); - OCMPMessageFrame * pOCMPMessageFrame = (OCMPMessageFrame *) pMsg; + OCMPMessageFrame *pOCMPMessageFrame = (OCMPMessageFrame *)pMsg; if (pOCMPMessageFrame != NULL) { if (pOCMPMessageFrame->header.ocmpInterface == OCMP_COMM_IFACE_UART) { status = gossiper_uart_send_msg(pMsg); - } else if (pOCMPMessageFrame->header.ocmpInterface - == OCMP_COMM_IFACE_ETHERNET) { + } else if (pOCMPMessageFrame->header.ocmpInterface == + OCMP_COMM_IFACE_ETHERNET) { status = gossiper_ethernet_send_msg(pMsg); - } else if (pOCMPMessageFrame->header.ocmpInterface - == OCMP_COMM_IFACE_SBD) { - // Will be added later. - } else if (pOCMPMessageFrame->header.ocmpInterface - == OCMP_COMM_IFACE_USB) { + } else if (pOCMPMessageFrame->header.ocmpInterface == + OCMP_COMM_IFACE_SBD) { + // Will be added later. + } else if (pOCMPMessageFrame->header.ocmpInterface == + OCMP_COMM_IFACE_USB) { status = gossiper_usb_send_msg(pMsg); } } else { @@ -253,9 +258,10 @@ static ReturnStatus gossiper_process_tx_msg(uint8_t *pMsg) static ReturnStatus gossiper_ethernet_send_msg(uint8_t *pMsg) { ReturnStatus status = RETURN_OK; - LOGGER_DEBUG("GOSSIPER:INFO:: Forwarding TX message to the ETH Interface.\n"); + LOGGER_DEBUG( + "GOSSIPER:INFO:: Forwarding TX message to the ETH Interface.\n"); if (pMsg != NULL) { - Util_enqueueMsg(ethTxMsgQueue, ethTxsem, (uint8_t*) pMsg); + Util_enqueueMsg(ethTxMsgQueue, ethTxsem, (uint8_t *)pMsg); } else { LOGGER_ERROR("GOSSIPER::ERROR::No Valid Pointer.\n"); } @@ -275,9 +281,10 @@ static ReturnStatus gossiper_ethernet_send_msg(uint8_t *pMsg) static ReturnStatus gossiper_uart_send_msg(uint8_t *pMsg) { ReturnStatus status = RETURN_OK; - LOGGER_DEBUG("GOSSIPER:INFO:: Forwarding TX message to the UART Interface.\n"); + LOGGER_DEBUG( + "GOSSIPER:INFO:: Forwarding TX message to the UART Interface.\n"); if (pMsg != NULL) { - Util_enqueueMsg(uartTxMsgQueue, semUARTTX, (uint8_t*) pMsg); + Util_enqueueMsg(uartTxMsgQueue, semUARTTX, (uint8_t *)pMsg); } else { LOGGER_ERROR("GOSSIPER::ERROR::No Valid Pointer.\n"); } @@ -297,9 +304,10 @@ static ReturnStatus gossiper_uart_send_msg(uint8_t *pMsg) static ReturnStatus gossiper_usb_send_msg(uint8_t *pMsg) { ReturnStatus status = RETURN_OK; - LOGGER_DEBUG("GOSSIPER:INFO:: Forwarding TX message to the USB Interface.\n"); + LOGGER_DEBUG( + "GOSSIPER:INFO:: Forwarding TX message to the USB Interface.\n"); if (pMsg != NULL) { - Util_enqueueMsg(usbTxMsgQueue, semUSBTX, (uint8_t*) pMsg); + Util_enqueueMsg(usbTxMsgQueue, semUSBTX, (uint8_t *)pMsg); } else { LOGGER_ERROR("GOSSIPER::ERROR::No Valid Pointer.\n"); } diff --git a/firmware/ec/src/comm/gossiper.h b/firmware/ec/src/comm/gossiper.h index 1fd6672765..1696146297 100644 --- a/firmware/ec/src/comm/gossiper.h +++ b/firmware/ec/src/comm/gossiper.h @@ -18,11 +18,11 @@ /***************************************************************************** * MACRO DEFINITIONS *****************************************************************************/ -#define GOSSIPER_TASK_PRIORITY 6 -#define GOSSIPER_TASK_STACK_SIZE 2048 +#define GOSSIPER_TASK_PRIORITY 6 +#define GOSSIPER_TASK_STACK_SIZE 2048 -#define SET_DEBEUG_MODE(debugMode) ((debugMode | 0x00)) -#define UNSET_DEBUG_MODE(debugMode) ((debugMode & 0x0f)) +#define SET_DEBEUG_MODE(debugMode) ((debugMode | 0x00)) +#define UNSET_DEBUG_MODE(debugMode) ((debugMode & 0x0f)) /***************************************************************************** * HANDLE DEFINITIONS diff --git a/firmware/ec/src/devices/adt7481.c b/firmware/ec/src/devices/adt7481.c index 2fac3e31fa..af9314195d 100644 --- a/firmware/ec/src/devices/adt7481.c +++ b/firmware/ec/src/devices/adt7481.c @@ -18,60 +18,90 @@ /***************************************************************************** * REGISTER DEFINITIONS *****************************************************************************/ -#define ADT7481_REG_R_LOCAL_TEMP 0x00 /* Local Temperature Value */ -#define ADT7481_REG_R_REMOTE1_TEMP_H 0x01 /* Remote 1 Temperature Value High Byte */ -#define ADT7481_REG_R_STATUS1 0x02 /* Status Register 1 */ -#define ADT7481_REG_R_CONFIG1 0x03 /* Configuration Register 1 */ -#define ADT7481_REG_R_CONVERSION_RATE 0x04 /* Conversion Rate/Channel Selector */ -#define ADT7481_REG_R_LOCAL_HIGHLIMIT 0x05 /* Local Temperature High Limit */ -#define ADT7481_REG_R_LOCAL_LOWLIMIT 0x06 /* Local Temperature Low Limit */ -#define ADT7481_REG_R_REMOTE1_HIGHLIMIT_H 0x07 /* Remote 1 Temp High Limit High Byte */ -#define ADT7481_REG_R_REMOTE1_LOWLIMIT_H 0x08 /* Remote 1 Temp Low Limit High Byte */ -#define ADT7481_REG_W_CONFIG1 0x09 /* Configuration Register */ -#define ADT7481_REG_W_CONVERSION_RATE 0x0A /* Conversion Rate/Channel Selector */ -#define ADT7481_REG_W_LOCAL_HIGHLIMIT 0x0B /* Local Temperature High Limit */ -#define ADT7481_REG_W_LOCAL_LOWLIMIT 0x0C /* Local Temperature Low Limit */ -#define ADT7481_REG_W_REMOTE1_HIGHLIMIT_H 0x0D /* Remote 1 Temp High Limit High Byte */ -#define ADT7481_REG_W_REMOTE1_LOWLIMIT_H 0x0E /* Remote 1 Temp Low Limit High Byte */ -#define ADT7481_REG_W_ONE_SHOT 0x0F /* One-Shot */ -#define ADT7481_REG_R_REMOTE1_TEMP_L 0x10 /* Remote 1 Temperature Value Low Byte */ -#define ADT7481_REG_R_REMOTE1_OFFSET_H 0x11 /* Remote 1 Temperature Offset High Byte */ -#define ADT7481_REG_W_REMOTE1_OFFSET_H 0x11 /* Remote 1 Temperature Offset High Byte */ -#define ADT7481_REG_R_REMOTE1_OFFSET_L 0x12 /* Remote 1 Temperature Offset Low Byte */ -#define ADT7481_REG_W_REMOTE1_OFFSET_L 0x12 /* Remote 1 Temperature Offset Low Byte */ -#define ADT7481_REG_R_REMOTE1_HIGHLIMIT_L 0x13 /* Remote 1 Temp High Limit Low Byte */ -#define ADT7481_REG_W_REMOTE1_HIGHLIMIT_L 0x13 /* Remote 1 Temp High Limit Low Byte */ -#define ADT7481_REG_R_REMOTE1_LOWLIMIT_L 0x14 /* Remote 1 Temp Low Limit Low Byte */ -#define ADT7481_REG_W_REMOTE1_LOWLIMIT_L 0x14 /* Remote 1 Temp Low Limit Low Byte */ -#define ADT7481_REG_R_REMOTE1_THERMLIMIT 0x19 /* Remote 1 THERM Limit */ -#define ADT7481_REG_W_REMOTE1_THERMLIMIT 0x19 /* Remote 1 THERM Limit */ -#define ADT7481_REG_R_LOCAL_THERMLIMIT 0x20 /* Local THERM Limit */ -#define ADT7481_REG_W_LOCAL_THERMLIMIT 0x20 /* Local THERM Limit */ -#define ADT7481_REG_R_THERM_HYST 0x21 /* THERM Hysteresis */ -#define ADT7481_REG_W_THERM_HYST 0x21 /* THERM Hysteresis */ -#define ADT7481_REG_R_CONECUTIVE_ALERT 0x22 /* Consecutive ALERT */ -#define ADT7481_REG_W_CONECUTIVE_ALERT 0x22 /* Consecutive ALERT */ -#define ADT7481_REG_R_STATUS2 0x23 /* Status Register 2 */ -#define ADT7481_REG_R_CONFIG2 0x24 /* Configuration 2 Register */ -#define ADT7481_REG_W_CONFIG2 0x24 /* Configuration 2 Register */ -#define ADT7481_REG_R_REMOTE2_TEMP_H 0x30 /* Remote 2 Temperature Value High Byte */ -#define ADT7481_REG_R_REMOTE2_HIGHLIMIT_H 0x31 /* Remote 2 Temp High Limit High Byte */ -#define ADT7481_REG_W_REMOTE2_HIGHLIMIT_H 0x31 /* Remote 2 Temp High Limit High Byte */ -#define ADT7481_REG_R_REMOTE2_LOWLIMIT_H 0x32 /* Remote 2 Temp Low Limit High Byte */ -#define ADT7481_REG_W_REMOTE2_LOWLIMIT_H 0x32 /* Remote 2 Temp Low Limit High Byte */ -#define ADT7481_REG_R_REMOTE2_TEMP_L 0x33 /* Remote 2 Temperature Value Low Byte */ -#define ADT7481_REG_R_REMOTE2_OFFSET_H 0x34 /* Remote 2 Temperature Offset High Byte */ -#define ADT7481_REG_W_REMOTE2_OFFSET_H 0x34 /* Remote 2 Temperature Offset High Byte */ -#define ADT7481_REG_R_REMOTE2_OFFSET_L 0x35 /* Remote 2 Temperature Offset Low Byte */ -#define ADT7481_REG_W_REMOTE2_OFFSET_L 0x35 /* Remote 2 Temperature Offset Low Byte */ -#define ADT7481_REG_R_REMOTE2_HIGHLIMIT_L 0x36 /* Remote 2 Temp High Limit Low Byte */ -#define ADT7481_REG_W_REMOTE2_HIGHLIMIT_L 0x36 /* Remote 2 Temp High Limit Low Byte */ -#define ADT7481_REG_R_REMOTE2_LOWLIMIT_L 0x37 /* Remote 2 Temp Low Limit Low Byte */ -#define ADT7481_REG_W_REMOTE2_LOWLIMIT_L 0x37 /* Remote 2 Temp Low Limit Low Byte */ -#define ADT7481_REG_R_REMOTE2_THERMLIMIT 0x39 /* Remote 2 THERM Limit */ -#define ADT7481_REG_W_REMOTE2_THERMLIMIT 0x39 /* Remote 2 THERM Limit */ -#define ADT7481_REG_R_CHIP_ID 0x3D /* Device ID */ -#define ADT7481_REG_R_MAN_ID 0x3E /* Manufacturer ID */ +#define ADT7481_REG_R_LOCAL_TEMP 0x00 /* Local Temperature Value */ +#define ADT7481_REG_R_REMOTE1_TEMP_H \ + 0x01 /* Remote 1 Temperature Value High Byte */ +#define ADT7481_REG_R_STATUS1 0x02 /* Status Register 1 */ +#define ADT7481_REG_R_CONFIG1 0x03 /* Configuration Register 1 */ +#define ADT7481_REG_R_CONVERSION_RATE \ + 0x04 /* Conversion Rate/Channel Selector */ +#define ADT7481_REG_R_LOCAL_HIGHLIMIT 0x05 /* Local Temperature High Limit */ +#define ADT7481_REG_R_LOCAL_LOWLIMIT 0x06 /* Local Temperature Low Limit */ +#define ADT7481_REG_R_REMOTE1_HIGHLIMIT_H \ + 0x07 /* Remote 1 Temp High Limit High Byte */ +#define ADT7481_REG_R_REMOTE1_LOWLIMIT_H \ + 0x08 /* Remote 1 Temp Low Limit High Byte */ +#define ADT7481_REG_W_CONFIG1 0x09 /* Configuration Register */ +#define ADT7481_REG_W_CONVERSION_RATE \ + 0x0A /* Conversion Rate/Channel Selector */ +#define ADT7481_REG_W_LOCAL_HIGHLIMIT 0x0B /* Local Temperature High Limit */ +#define ADT7481_REG_W_LOCAL_LOWLIMIT 0x0C /* Local Temperature Low Limit */ +#define ADT7481_REG_W_REMOTE1_HIGHLIMIT_H \ + 0x0D /* Remote 1 Temp High Limit High Byte */ +#define ADT7481_REG_W_REMOTE1_LOWLIMIT_H \ + 0x0E /* Remote 1 Temp Low Limit High Byte */ +#define ADT7481_REG_W_ONE_SHOT 0x0F /* One-Shot */ +#define ADT7481_REG_R_REMOTE1_TEMP_L \ + 0x10 /* Remote 1 Temperature Value Low Byte */ +#define ADT7481_REG_R_REMOTE1_OFFSET_H \ + 0x11 /* Remote 1 Temperature Offset High Byte */ +#define ADT7481_REG_W_REMOTE1_OFFSET_H \ + 0x11 /* Remote 1 Temperature Offset High Byte */ +#define ADT7481_REG_R_REMOTE1_OFFSET_L \ + 0x12 /* Remote 1 Temperature Offset Low Byte */ +#define ADT7481_REG_W_REMOTE1_OFFSET_L \ + 0x12 /* Remote 1 Temperature Offset Low Byte */ +#define ADT7481_REG_R_REMOTE1_HIGHLIMIT_L \ + 0x13 /* Remote 1 Temp High Limit Low Byte */ +#define ADT7481_REG_W_REMOTE1_HIGHLIMIT_L \ + 0x13 /* Remote 1 Temp High Limit Low Byte */ +#define ADT7481_REG_R_REMOTE1_LOWLIMIT_L \ + 0x14 /* Remote 1 Temp Low Limit Low Byte */ +#define ADT7481_REG_W_REMOTE1_LOWLIMIT_L \ + 0x14 /* Remote 1 Temp Low Limit Low Byte */ +#define ADT7481_REG_R_REMOTE1_THERMLIMIT 0x19 /* Remote 1 THERM Limit */ +#define ADT7481_REG_W_REMOTE1_THERMLIMIT 0x19 /* Remote 1 THERM Limit */ +#define ADT7481_REG_R_LOCAL_THERMLIMIT 0x20 /* Local THERM Limit */ +#define ADT7481_REG_W_LOCAL_THERMLIMIT 0x20 /* Local THERM Limit */ +#define ADT7481_REG_R_THERM_HYST 0x21 /* THERM Hysteresis */ +#define ADT7481_REG_W_THERM_HYST 0x21 /* THERM Hysteresis */ +#define ADT7481_REG_R_CONECUTIVE_ALERT 0x22 /* Consecutive ALERT */ +#define ADT7481_REG_W_CONECUTIVE_ALERT 0x22 /* Consecutive ALERT */ +#define ADT7481_REG_R_STATUS2 0x23 /* Status Register 2 */ +#define ADT7481_REG_R_CONFIG2 0x24 /* Configuration 2 Register */ +#define ADT7481_REG_W_CONFIG2 0x24 /* Configuration 2 Register */ +#define ADT7481_REG_R_REMOTE2_TEMP_H \ + 0x30 /* Remote 2 Temperature Value High Byte */ +#define ADT7481_REG_R_REMOTE2_HIGHLIMIT_H \ + 0x31 /* Remote 2 Temp High Limit High Byte */ +#define ADT7481_REG_W_REMOTE2_HIGHLIMIT_H \ + 0x31 /* Remote 2 Temp High Limit High Byte */ +#define ADT7481_REG_R_REMOTE2_LOWLIMIT_H \ + 0x32 /* Remote 2 Temp Low Limit High Byte */ +#define ADT7481_REG_W_REMOTE2_LOWLIMIT_H \ + 0x32 /* Remote 2 Temp Low Limit High Byte */ +#define ADT7481_REG_R_REMOTE2_TEMP_L \ + 0x33 /* Remote 2 Temperature Value Low Byte */ +#define ADT7481_REG_R_REMOTE2_OFFSET_H \ + 0x34 /* Remote 2 Temperature Offset High Byte */ +#define ADT7481_REG_W_REMOTE2_OFFSET_H \ + 0x34 /* Remote 2 Temperature Offset High Byte */ +#define ADT7481_REG_R_REMOTE2_OFFSET_L \ + 0x35 /* Remote 2 Temperature Offset Low Byte */ +#define ADT7481_REG_W_REMOTE2_OFFSET_L \ + 0x35 /* Remote 2 Temperature Offset Low Byte */ +#define ADT7481_REG_R_REMOTE2_HIGHLIMIT_L \ + 0x36 /* Remote 2 Temp High Limit Low Byte */ +#define ADT7481_REG_W_REMOTE2_HIGHLIMIT_L \ + 0x36 /* Remote 2 Temp High Limit Low Byte */ +#define ADT7481_REG_R_REMOTE2_LOWLIMIT_L \ + 0x37 /* Remote 2 Temp Low Limit Low Byte */ +#define ADT7481_REG_W_REMOTE2_LOWLIMIT_L \ + 0x37 /* Remote 2 Temp Low Limit Low Byte */ +#define ADT7481_REG_R_REMOTE2_THERMLIMIT 0x39 /* Remote 2 THERM Limit */ +#define ADT7481_REG_W_REMOTE2_THERMLIMIT 0x39 /* Remote 2 THERM Limit */ +#define ADT7481_REG_R_CHIP_ID 0x3D /* Device ID */ +#define ADT7481_REG_R_MAN_ID 0x3E /* Manufacturer ID */ /* * Macros to convert temperature values to register values and vice versa. @@ -80,15 +110,15 @@ * binary data format are offset by +64. */ #ifdef ADT7481_EXTENDED_FLAG -#define TEMP_TO_REG_U8(x) (x + 64) -#define TEMP_TO_REG_U16(x) ((x + 64) << 8) -#define REG_U8_TO_TEMP(y) (y - 64) -#define REG_U16_TO_TEMP(y) (y - 64) +#define TEMP_TO_REG_U8(x) (x + 64) +#define TEMP_TO_REG_U16(x) ((x + 64) << 8) +#define REG_U8_TO_TEMP(y) (y - 64) +#define REG_U16_TO_TEMP(y) (y - 64) #else -#define TEMP_TO_REG_U8(x) (x) -#define TEMP_TO_REG_U16(x) (x << 8) -#define REG_U8_TO_TEMP(y) (y) -#define REG_U16_TO_TEMP(y) (y) +#define TEMP_TO_REG_U8(x) (x) +#define TEMP_TO_REG_U16(x) (x << 8) +#define REG_U8_TO_TEMP(y) (y) +#define REG_U16_TO_TEMP(y) (y) #endif /***************************************************************************** @@ -102,18 +132,18 @@ ** RETURN TYPE : Success or failure ** *****************************************************************************/ -static ReturnStatus adt7481_raw_read(const I2C_Dev *i2c_dev, - uint8_t regAddress, +static ReturnStatus adt7481_raw_read(const I2C_Dev *i2c_dev, uint8_t regAddress, uint8_t *regValue) { ReturnStatus status = RETURN_NOTOK; I2C_Handle adt7481_handle = i2c_get_handle(i2c_dev->bus); if (!adt7481_handle) { LOGGER_ERROR("ADT7481:ERROR:: Failed to get I2C Bus for Thermal sensor " - "0x%x on bus 0x%x.\n", i2c_dev->slave_addr, i2c_dev->bus); + "0x%x on bus 0x%x.\n", + i2c_dev->slave_addr, i2c_dev->bus); } else { status = i2c_reg_read(adt7481_handle, i2c_dev->slave_addr, regAddress, - (uint16_t *) regValue, 1); + (uint16_t *)regValue, 1); } return status; } @@ -130,14 +160,14 @@ static ReturnStatus adt7481_raw_read(const I2C_Dev *i2c_dev, ** *****************************************************************************/ static ReturnStatus adt7481_raw_write(const I2C_Dev *i2c_dev, - uint8_t regAddress, - uint8_t regValue) + uint8_t regAddress, uint8_t regValue) { ReturnStatus status = RETURN_NOTOK; I2C_Handle adt7481_handle = i2c_get_handle(i2c_dev->bus); if (!adt7481_handle) { LOGGER_ERROR("ADT7481:ERROR:: Failed to get I2C Bus for Thermal sensor " - "0x%x on bus 0x%x.\n", i2c_dev->slave_addr, i2c_dev->bus); + "0x%x on bus 0x%x.\n", + i2c_dev->slave_addr, i2c_dev->bus); } else { status = i2c_reg_write(adt7481_handle, i2c_dev->slave_addr, regAddress, regValue, 1); @@ -155,8 +185,7 @@ static ReturnStatus adt7481_raw_write(const I2C_Dev *i2c_dev, ** RETURN TYPE : Success or failure ** *****************************************************************************/ -ReturnStatus adt7481_get_dev_id(const I2C_Dev *i2c_dev, - uint8_t *devID) +ReturnStatus adt7481_get_dev_id(const I2C_Dev *i2c_dev, uint8_t *devID) { ReturnStatus status = RETURN_OK; @@ -178,8 +207,7 @@ ReturnStatus adt7481_get_dev_id(const I2C_Dev *i2c_dev, ** RETURN TYPE : Success or failure ** *****************************************************************************/ -ReturnStatus adt7481_get_mfg_id(const I2C_Dev *i2c_dev, - uint8_t *mfgID) +ReturnStatus adt7481_get_mfg_id(const I2C_Dev *i2c_dev, uint8_t *mfgID) { ReturnStatus status = RETURN_OK; status = adt7481_raw_read(i2c_dev, ADT7481_REG_R_MAN_ID, mfgID); @@ -200,8 +228,7 @@ ReturnStatus adt7481_get_mfg_id(const I2C_Dev *i2c_dev, ** RETURN TYPE : ePostCode ** *****************************************************************************/ -ePostCode adt7481_probe(const I2C_Dev *i2c_dev, - POSTData *postData) +ePostCode adt7481_probe(const I2C_Dev *i2c_dev, POSTData *postData) { ePostCode postcode = POST_DEV_MISSING; ReturnStatus status = RETURN_OK; @@ -211,13 +238,14 @@ ePostCode adt7481_probe(const I2C_Dev *i2c_dev, status = adt7481_get_mfg_id(i2c_dev, &manfId); if (status != RETURN_OK) { postcode = POST_DEV_MISSING; - } else if ((devId == TEMP_ADT7481_DEV_ID) - && (manfId == TEMP_ADT7481_MANF_ID)) { + } else if ((devId == TEMP_ADT7481_DEV_ID) && + (manfId == TEMP_ADT7481_MANF_ID)) { postcode = POST_DEV_FOUND; } else { postcode = POST_DEV_ID_MISMATCH; } - post_update_POSTData(postData, i2c_dev->bus, i2c_dev->slave_addr,manfId, devId); + post_update_POSTData(postData, i2c_dev->bus, i2c_dev->slave_addr, manfId, + devId); return postcode; } @@ -230,8 +258,7 @@ ePostCode adt7481_probe(const I2C_Dev *i2c_dev, * * @return ReturnStatus *****************************************************************************/ -ReturnStatus adt7481_get_config1(const I2C_Dev *i2c_dev, - uint8_t *configValue) +ReturnStatus adt7481_get_config1(const I2C_Dev *i2c_dev, uint8_t *configValue) { ReturnStatus status = RETURN_OK; status = adt7481_raw_read(i2c_dev, ADT7481_REG_R_CONFIG1, configValue); @@ -250,8 +277,7 @@ ReturnStatus adt7481_get_config1(const I2C_Dev *i2c_dev, * * @return ReturnStatus *****************************************************************************/ -ReturnStatus adt7481_set_config1(const I2C_Dev *i2c_dev, - uint8_t configValue) +ReturnStatus adt7481_set_config1(const I2C_Dev *i2c_dev, uint8_t configValue) { ReturnStatus status = RETURN_OK; status = adt7481_raw_write(i2c_dev, ADT7481_REG_W_CONFIG1, configValue); @@ -295,8 +321,7 @@ ReturnStatus adt7481_set_conv_rate(const I2C_Dev *i2c_dev, uint8_t convRateValue) { ReturnStatus status = RETURN_OK; - status = adt7481_raw_write(i2c_dev, - ADT7481_REG_W_CONVERSION_RATE, + status = adt7481_raw_write(i2c_dev, ADT7481_REG_W_CONVERSION_RATE, convRateValue); return status; } @@ -310,13 +335,10 @@ ReturnStatus adt7481_set_conv_rate(const I2C_Dev *i2c_dev, * * @return ReturnStatus *****************************************************************************/ -ReturnStatus adt7481_get_status1(const I2C_Dev *i2c_dev, - uint8_t *statusValue) +ReturnStatus adt7481_get_status1(const I2C_Dev *i2c_dev, uint8_t *statusValue) { ReturnStatus status = RETURN_OK; - status = adt7481_raw_read(i2c_dev, - ADT7481_REG_R_STATUS1, - statusValue); + status = adt7481_raw_read(i2c_dev, ADT7481_REG_R_STATUS1, statusValue); if (status != RETURN_OK) { statusValue = NULL; } @@ -332,13 +354,10 @@ ReturnStatus adt7481_get_status1(const I2C_Dev *i2c_dev, * * @return ReturnStatus *****************************************************************************/ -ReturnStatus adt7481_get_status2(const I2C_Dev *i2c_dev, - uint8_t *statusValue) +ReturnStatus adt7481_get_status2(const I2C_Dev *i2c_dev, uint8_t *statusValue) { ReturnStatus status = RETURN_OK; - status = adt7481_raw_read(i2c_dev, - ADT7481_REG_R_STATUS2, - statusValue); + status = adt7481_raw_read(i2c_dev, ADT7481_REG_R_STATUS2, statusValue); if (status != RETURN_OK) { statusValue = NULL; } @@ -359,13 +378,11 @@ ReturnStatus adt7481_get_local_temp_val(const I2C_Dev *i2c_dev, { ReturnStatus status = RETURN_OK; uint8_t regValue = 0x00; - status = adt7481_raw_read(i2c_dev, - ADT7481_REG_R_LOCAL_TEMP, - ®Value); + status = adt7481_raw_read(i2c_dev, ADT7481_REG_R_LOCAL_TEMP, ®Value); if (status != RETURN_OK) { tempValue = NULL; } else { - *tempValue = (int8_t) REG_U8_TO_TEMP(regValue); + *tempValue = (int8_t)REG_U8_TO_TEMP(regValue); } return status; } @@ -385,19 +402,17 @@ ReturnStatus adt7481_get_remote1_temp_val(const I2C_Dev *i2c_dev, ReturnStatus status = RETURN_OK; uint8_t lRegValue = 0x00; uint8_t hRegValue = 0x00; - status = adt7481_raw_read(i2c_dev, - ADT7481_REG_R_REMOTE1_TEMP_L, - &lRegValue); + status = + adt7481_raw_read(i2c_dev, ADT7481_REG_R_REMOTE1_TEMP_L, &lRegValue); if (status != RETURN_OK) { tempValue = NULL; } else { - status = adt7481_raw_read(i2c_dev, - ADT7481_REG_R_REMOTE1_TEMP_H, + status = adt7481_raw_read(i2c_dev, ADT7481_REG_R_REMOTE1_TEMP_H, &hRegValue); if (status != RETURN_OK) { tempValue = NULL; } else { - *tempValue = (int16_t) REG_U16_TO_TEMP(hRegValue); + *tempValue = (int16_t)REG_U16_TO_TEMP(hRegValue); } } return status; @@ -418,19 +433,17 @@ ReturnStatus adt7481_get_remote2_temp_val(const I2C_Dev *i2c_dev, ReturnStatus status = RETURN_OK; uint8_t lRegValue = 0x00; uint8_t hRegValue = 0x00; - status = adt7481_raw_read(i2c_dev, - ADT7481_REG_R_REMOTE2_TEMP_L, - &lRegValue); + status = + adt7481_raw_read(i2c_dev, ADT7481_REG_R_REMOTE2_TEMP_L, &lRegValue); if (status != RETURN_OK) { tempValue = NULL; } else { - status = adt7481_raw_read(i2c_dev, - ADT7481_REG_R_REMOTE2_TEMP_H, + status = adt7481_raw_read(i2c_dev, ADT7481_REG_R_REMOTE2_TEMP_H, &hRegValue); if (status != RETURN_OK) { tempValue = NULL; } else { - *tempValue = (int8_t) REG_U16_TO_TEMP(hRegValue); + *tempValue = (int8_t)REG_U16_TO_TEMP(hRegValue); } } return status; @@ -447,32 +460,29 @@ ReturnStatus adt7481_get_remote2_temp_val(const I2C_Dev *i2c_dev, * * @return ReturnStatus *****************************************************************************/ -ReturnStatus adt7481_get_local_temp_limit(const I2C_Dev *i2c_dev, - eTempSensorADT7481ConfigParamsId limitToConfig, - int16_t* tempLimitValue) +ReturnStatus +adt7481_get_local_temp_limit(const I2C_Dev *i2c_dev, + eTempSensorADT7481ConfigParamsId limitToConfig, + int16_t *tempLimitValue) { ReturnStatus status = RETURN_NOTOK; uint8_t regValue = 0x00; uint8_t regAddress = 0x0000; switch (limitToConfig) { - case CONF_TEMP_ADT7481_LOW_LIMIT_REG: - { + case CONF_TEMP_ADT7481_LOW_LIMIT_REG: { regAddress = ADT7481_REG_R_LOCAL_LOWLIMIT; break; } - case CONF_TEMP_ADT7481_HIGH_LIMIT_REG: - { + case CONF_TEMP_ADT7481_HIGH_LIMIT_REG: { regAddress = ADT7481_REG_R_LOCAL_HIGHLIMIT; break; } - case CONF_TEMP_ADT7481_THERM_LIMIT_REG: - { + case CONF_TEMP_ADT7481_THERM_LIMIT_REG: { regAddress = ADT7481_REG_R_LOCAL_THERMLIMIT; break; } - default: - { + default: { return status; } } @@ -481,7 +491,7 @@ ReturnStatus adt7481_get_local_temp_limit(const I2C_Dev *i2c_dev, if (status != RETURN_OK) { tempLimitValue = NULL; } else { - *tempLimitValue = (int8_t) REG_U8_TO_TEMP(regValue); + *tempLimitValue = (int8_t)REG_U8_TO_TEMP(regValue); } return status; } @@ -496,32 +506,29 @@ ReturnStatus adt7481_get_local_temp_limit(const I2C_Dev *i2c_dev, * * @return ReturnStatus *****************************************************************************/ -ReturnStatus adt7481_set_local_temp_limit(const I2C_Dev *i2c_dev, - eTempSensorADT7481ConfigParamsId limitToConfig, - int16_t tempLimitValue) +ReturnStatus +adt7481_set_local_temp_limit(const I2C_Dev *i2c_dev, + eTempSensorADT7481ConfigParamsId limitToConfig, + int16_t tempLimitValue) { ReturnStatus status = RETURN_NOTOK; uint8_t regAddress = 0x00; uint8_t regValue = 0x0000; switch (limitToConfig) { - case CONF_TEMP_ADT7481_LOW_LIMIT_REG: - { + case CONF_TEMP_ADT7481_LOW_LIMIT_REG: { regAddress = ADT7481_REG_W_LOCAL_LOWLIMIT; break; } - case CONF_TEMP_ADT7481_HIGH_LIMIT_REG: - { + case CONF_TEMP_ADT7481_HIGH_LIMIT_REG: { regAddress = ADT7481_REG_W_LOCAL_HIGHLIMIT; break; } - case CONF_TEMP_ADT7481_THERM_LIMIT_REG: - { + case CONF_TEMP_ADT7481_THERM_LIMIT_REG: { regAddress = ADT7481_REG_W_LOCAL_THERMLIMIT; break; } - default: - { + default: { return status; } } @@ -544,27 +551,25 @@ ReturnStatus adt7481_set_local_temp_limit(const I2C_Dev *i2c_dev, * @return ReturnStatus *****************************************************************************/ ReturnStatus adt7481_get_remote1_temp_low_limit(const I2C_Dev *i2c_dev, - int8_t* tempLimitValue) + int8_t *tempLimitValue) { ReturnStatus status = RETURN_NOTOK; uint8_t lRegValue = 0x00; uint8_t hRegValue = 0x00; /* Read LSB data */ - status = adt7481_raw_read(i2c_dev, - ADT7481_REG_R_REMOTE1_LOWLIMIT_L, + status = adt7481_raw_read(i2c_dev, ADT7481_REG_R_REMOTE1_LOWLIMIT_L, &lRegValue); if (status != RETURN_OK) { tempLimitValue = NULL; } else { /* Read MSB data */ - status = adt7481_raw_read(i2c_dev, - ADT7481_REG_R_REMOTE1_LOWLIMIT_H, + status = adt7481_raw_read(i2c_dev, ADT7481_REG_R_REMOTE1_LOWLIMIT_H, &hRegValue); if (status != RETURN_OK) { tempLimitValue = NULL; } else { - *tempLimitValue = (int8_t) REG_U16_TO_TEMP(hRegValue); + *tempLimitValue = (int8_t)REG_U16_TO_TEMP(hRegValue); } } return status; @@ -581,27 +586,25 @@ ReturnStatus adt7481_get_remote1_temp_low_limit(const I2C_Dev *i2c_dev, * @return ReturnStatus *****************************************************************************/ ReturnStatus adt7481_get_remote1_temp_high_limit(const I2C_Dev *i2c_dev, - int8_t* tempLimitValue) + int8_t *tempLimitValue) { ReturnStatus status = RETURN_NOTOK; uint8_t lRegValue = 0x00; uint8_t hRegValue = 0x00; /* Read LSB data */ - status = adt7481_raw_read(i2c_dev, - ADT7481_REG_R_REMOTE1_HIGHLIMIT_L, + status = adt7481_raw_read(i2c_dev, ADT7481_REG_R_REMOTE1_HIGHLIMIT_L, &lRegValue); if (status != RETURN_OK) { tempLimitValue = NULL; } else { /* Read MSB data */ - status = adt7481_raw_read(i2c_dev, - ADT7481_REG_R_REMOTE1_HIGHLIMIT_H, + status = adt7481_raw_read(i2c_dev, ADT7481_REG_R_REMOTE1_HIGHLIMIT_H, &hRegValue); if (status != RETURN_OK) { tempLimitValue = NULL; } else { - *tempLimitValue = (int8_t) REG_U16_TO_TEMP(hRegValue); + *tempLimitValue = (int8_t)REG_U16_TO_TEMP(hRegValue); } } return status; @@ -618,18 +621,17 @@ ReturnStatus adt7481_get_remote1_temp_high_limit(const I2C_Dev *i2c_dev, * @return ReturnStatus *****************************************************************************/ ReturnStatus adt7481_get_remote1_temp_therm_limit(const I2C_Dev *i2c_dev, - int8_t* tempLimitValue) + int8_t *tempLimitValue) { ReturnStatus status = RETURN_NOTOK; uint8_t regValue = 0x00; - status = adt7481_raw_read(i2c_dev, - ADT7481_REG_R_REMOTE1_THERMLIMIT, + status = adt7481_raw_read(i2c_dev, ADT7481_REG_R_REMOTE1_THERMLIMIT, ®Value); if (status != RETURN_OK) { tempLimitValue = NULL; } else { - *tempLimitValue = (int8_t) REG_U8_TO_TEMP(regValue); + *tempLimitValue = (int8_t)REG_U8_TO_TEMP(regValue); } return status; @@ -646,33 +648,30 @@ ReturnStatus adt7481_get_remote1_temp_therm_limit(const I2C_Dev *i2c_dev, * * @return ReturnStatus *****************************************************************************/ -ReturnStatus adt7481_get_remote1_temp_limit(const I2C_Dev *i2c_dev, - eTempSensorADT7481ConfigParamsId limitToConfig, - int8_t* tempLimitValue) +ReturnStatus +adt7481_get_remote1_temp_limit(const I2C_Dev *i2c_dev, + eTempSensorADT7481ConfigParamsId limitToConfig, + int8_t *tempLimitValue) { ReturnStatus status = RETURN_NOTOK; switch (limitToConfig) { - case CONF_TEMP_ADT7481_LOW_LIMIT_REG: - { - status = adt7481_get_remote1_temp_low_limit(i2c_dev, - tempLimitValue); + case CONF_TEMP_ADT7481_LOW_LIMIT_REG: { + status = + adt7481_get_remote1_temp_low_limit(i2c_dev, tempLimitValue); break; } - case CONF_TEMP_ADT7481_HIGH_LIMIT_REG: - { + case CONF_TEMP_ADT7481_HIGH_LIMIT_REG: { status = adt7481_get_remote1_temp_high_limit(i2c_dev, tempLimitValue); break; } - case CONF_TEMP_ADT7481_THERM_LIMIT_REG: - { + case CONF_TEMP_ADT7481_THERM_LIMIT_REG: { status = adt7481_get_remote1_temp_therm_limit(i2c_dev, tempLimitValue); break; } - default: - { + default: { return status; } } @@ -699,14 +698,12 @@ ReturnStatus adt7481_set_remote1_temp_low_limit(const I2C_Dev *i2c_dev, regValue = TEMP_TO_REG_U16(tempLimitValue); /* Write LSB data */ - status = adt7481_raw_write(i2c_dev, - ADT7481_REG_W_REMOTE1_LOWLIMIT_L, - (uint8_t) regValue); + status = adt7481_raw_write(i2c_dev, ADT7481_REG_W_REMOTE1_LOWLIMIT_L, + (uint8_t)regValue); if (status == RETURN_OK) { /* Write MSB data */ - status = adt7481_raw_write(i2c_dev, - ADT7481_REG_W_REMOTE1_LOWLIMIT_H, - (uint8_t) (regValue >> 8)); + status = adt7481_raw_write(i2c_dev, ADT7481_REG_W_REMOTE1_LOWLIMIT_H, + (uint8_t)(regValue >> 8)); } return status; } @@ -731,14 +728,12 @@ ReturnStatus adt7481_set_remote1_temp_high_limit(const I2C_Dev *i2c_dev, regValue = TEMP_TO_REG_U16(tempLimitValue); /* Write LSB data */ - status = adt7481_raw_write(i2c_dev, - ADT7481_REG_W_REMOTE1_HIGHLIMIT_L, - (uint8_t) regValue); + status = adt7481_raw_write(i2c_dev, ADT7481_REG_W_REMOTE1_HIGHLIMIT_L, + (uint8_t)regValue); if (status == RETURN_OK) { /* Write MSB data */ - status = adt7481_raw_write(i2c_dev, - ADT7481_REG_W_REMOTE1_HIGHLIMIT_H, - (uint8_t) (regValue >> 8)); + status = adt7481_raw_write(i2c_dev, ADT7481_REG_W_REMOTE1_HIGHLIMIT_H, + (uint8_t)(regValue >> 8)); } return status; } @@ -762,8 +757,7 @@ ReturnStatus adt7481_set_remote1_temp_therm_limit(const I2C_Dev *i2c_dev, /* Converting Temp limit into the register value */ regValue = TEMP_TO_REG_U8(tempLimitValue); - status = adt7481_raw_write(i2c_dev, - ADT7481_REG_W_REMOTE1_THERMLIMIT, + status = adt7481_raw_write(i2c_dev, ADT7481_REG_W_REMOTE1_THERMLIMIT, regValue); return status; } @@ -778,33 +772,30 @@ ReturnStatus adt7481_set_remote1_temp_therm_limit(const I2C_Dev *i2c_dev, * * @return ReturnStatus *****************************************************************************/ -ReturnStatus adt7481_set_remote1_temp_limit(const I2C_Dev *i2c_dev, - eTempSensorADT7481ConfigParamsId limitToConfig, - int8_t tempLimitValue) +ReturnStatus +adt7481_set_remote1_temp_limit(const I2C_Dev *i2c_dev, + eTempSensorADT7481ConfigParamsId limitToConfig, + int8_t tempLimitValue) { ReturnStatus status = RETURN_NOTOK; switch (limitToConfig) { - case CONF_TEMP_ADT7481_LOW_LIMIT_REG: - { - status = adt7481_set_remote1_temp_low_limit(i2c_dev, - tempLimitValue); + case CONF_TEMP_ADT7481_LOW_LIMIT_REG: { + status = + adt7481_set_remote1_temp_low_limit(i2c_dev, tempLimitValue); break; } - case CONF_TEMP_ADT7481_HIGH_LIMIT_REG: - { + case CONF_TEMP_ADT7481_HIGH_LIMIT_REG: { status = adt7481_set_remote1_temp_high_limit(i2c_dev, tempLimitValue); break; } - case CONF_TEMP_ADT7481_THERM_LIMIT_REG: - { + case CONF_TEMP_ADT7481_THERM_LIMIT_REG: { status = adt7481_set_remote1_temp_therm_limit(i2c_dev, tempLimitValue); break; } - default: - { + default: { return status; } } @@ -822,27 +813,25 @@ ReturnStatus adt7481_set_remote1_temp_limit(const I2C_Dev *i2c_dev, * @return ReturnStatus *****************************************************************************/ ReturnStatus adt7481_get_remote2_temp_low_limit(const I2C_Dev *i2c_dev, - int8_t* tempLimitValue) + int8_t *tempLimitValue) { ReturnStatus status = RETURN_NOTOK; uint8_t lRegValue = 0x00; uint8_t hRegValue = 0x00; /* Read LSB data */ - status = adt7481_raw_read(i2c_dev, - ADT7481_REG_R_REMOTE2_LOWLIMIT_L, + status = adt7481_raw_read(i2c_dev, ADT7481_REG_R_REMOTE2_LOWLIMIT_L, &lRegValue); if (status != RETURN_OK) { tempLimitValue = NULL; } else { /* Read MSB data */ - status = adt7481_raw_read(i2c_dev, - ADT7481_REG_R_REMOTE2_LOWLIMIT_H, + status = adt7481_raw_read(i2c_dev, ADT7481_REG_R_REMOTE2_LOWLIMIT_H, &hRegValue); if (status != RETURN_OK) { tempLimitValue = NULL; } else { - *tempLimitValue = (int8_t) REG_U16_TO_TEMP(hRegValue); + *tempLimitValue = (int8_t)REG_U16_TO_TEMP(hRegValue); } } return status; @@ -859,27 +848,25 @@ ReturnStatus adt7481_get_remote2_temp_low_limit(const I2C_Dev *i2c_dev, * @return ReturnStatus *****************************************************************************/ ReturnStatus adt7481_get_remote2_temp_high_limit(const I2C_Dev *i2c_dev, - int8_t* tempLimitValue) + int8_t *tempLimitValue) { ReturnStatus status = RETURN_NOTOK; uint8_t lRegValue = 0x00; uint8_t hRegValue = 0x00; /* Read LSB data */ - status = adt7481_raw_read(i2c_dev, - ADT7481_REG_R_REMOTE2_HIGHLIMIT_L, + status = adt7481_raw_read(i2c_dev, ADT7481_REG_R_REMOTE2_HIGHLIMIT_L, &lRegValue); if (status != RETURN_OK) { tempLimitValue = NULL; } else { /* Read MSB data */ - status = adt7481_raw_read(i2c_dev, - ADT7481_REG_R_REMOTE2_HIGHLIMIT_H, + status = adt7481_raw_read(i2c_dev, ADT7481_REG_R_REMOTE2_HIGHLIMIT_H, &hRegValue); if (status != RETURN_OK) { tempLimitValue = NULL; } else { - *tempLimitValue = (int8_t) REG_U16_TO_TEMP(hRegValue); + *tempLimitValue = (int8_t)REG_U16_TO_TEMP(hRegValue); } } return status; @@ -896,18 +883,17 @@ ReturnStatus adt7481_get_remote2_temp_high_limit(const I2C_Dev *i2c_dev, * @return ReturnStatus *****************************************************************************/ ReturnStatus adt7481_get_remote2_temp_therm_limit(const I2C_Dev *i2c_dev, - int8_t* tempLimitValue) + int8_t *tempLimitValue) { ReturnStatus status = RETURN_NOTOK; uint8_t regValue = 0x00; - status = adt7481_raw_read(i2c_dev, - ADT7481_REG_R_REMOTE2_THERMLIMIT, + status = adt7481_raw_read(i2c_dev, ADT7481_REG_R_REMOTE2_THERMLIMIT, ®Value); if (status != RETURN_OK) { tempLimitValue = NULL; } else { - *tempLimitValue = (int8_t) REG_U8_TO_TEMP(regValue); + *tempLimitValue = (int8_t)REG_U8_TO_TEMP(regValue); } return status; @@ -924,33 +910,30 @@ ReturnStatus adt7481_get_remote2_temp_therm_limit(const I2C_Dev *i2c_dev, * * @return ReturnStatus *****************************************************************************/ -ReturnStatus adt7481_get_remote2_temp_limit(const I2C_Dev *i2c_dev, - eTempSensorADT7481ConfigParamsId limitToConfig, - int8_t* tempLimitValue) +ReturnStatus +adt7481_get_remote2_temp_limit(const I2C_Dev *i2c_dev, + eTempSensorADT7481ConfigParamsId limitToConfig, + int8_t *tempLimitValue) { ReturnStatus status = RETURN_NOTOK; switch (limitToConfig) { - case CONF_TEMP_ADT7481_LOW_LIMIT_REG: - { - status = adt7481_get_remote2_temp_low_limit(i2c_dev, - tempLimitValue); + case CONF_TEMP_ADT7481_LOW_LIMIT_REG: { + status = + adt7481_get_remote2_temp_low_limit(i2c_dev, tempLimitValue); break; } - case CONF_TEMP_ADT7481_HIGH_LIMIT_REG: - { + case CONF_TEMP_ADT7481_HIGH_LIMIT_REG: { status = adt7481_get_remote2_temp_high_limit(i2c_dev, tempLimitValue); break; } - case CONF_TEMP_ADT7481_THERM_LIMIT_REG: - { + case CONF_TEMP_ADT7481_THERM_LIMIT_REG: { status = adt7481_get_remote2_temp_therm_limit(i2c_dev, tempLimitValue); break; } - default: - { + default: { return status; } } @@ -977,14 +960,12 @@ ReturnStatus adt7481_set_remote2_temp_low_limit(const I2C_Dev *i2c_dev, regValue = TEMP_TO_REG_U16(tempLimitValue); /* Write LSB data */ - status = adt7481_raw_write(i2c_dev, - ADT7481_REG_W_REMOTE2_LOWLIMIT_L, - (uint8_t) regValue); + status = adt7481_raw_write(i2c_dev, ADT7481_REG_W_REMOTE2_LOWLIMIT_L, + (uint8_t)regValue); if (status == RETURN_OK) { /* Write MSB data */ - status = adt7481_raw_write(i2c_dev, - ADT7481_REG_W_REMOTE2_LOWLIMIT_H, - (uint8_t) (regValue >> 8)); + status = adt7481_raw_write(i2c_dev, ADT7481_REG_W_REMOTE2_LOWLIMIT_H, + (uint8_t)(regValue >> 8)); } return status; } @@ -1009,14 +990,12 @@ ReturnStatus adt7481_set_remote2_temp_high_limit(const I2C_Dev *i2c_dev, regValue = TEMP_TO_REG_U16(tempLimitValue); /* Write LSB data */ - status = adt7481_raw_write(i2c_dev, - ADT7481_REG_W_REMOTE2_HIGHLIMIT_L, - (uint8_t) regValue); + status = adt7481_raw_write(i2c_dev, ADT7481_REG_W_REMOTE2_HIGHLIMIT_L, + (uint8_t)regValue); if (status == RETURN_OK) { /* Write MSB data */ - status = adt7481_raw_write(i2c_dev, - ADT7481_REG_W_REMOTE2_HIGHLIMIT_H, - (uint8_t) (regValue >> 8)); + status = adt7481_raw_write(i2c_dev, ADT7481_REG_W_REMOTE2_HIGHLIMIT_H, + (uint8_t)(regValue >> 8)); } return status; } @@ -1040,8 +1019,7 @@ ReturnStatus adt7481_set_remote2_temp_therm_limit(const I2C_Dev *i2c_dev, /* Converting Temp limit into the register value */ regValue = TEMP_TO_REG_U8(tempLimitValue); - status = adt7481_raw_write(i2c_dev, - ADT7481_REG_W_REMOTE2_THERMLIMIT, + status = adt7481_raw_write(i2c_dev, ADT7481_REG_W_REMOTE2_THERMLIMIT, regValue); return status; } @@ -1056,33 +1034,30 @@ ReturnStatus adt7481_set_remote2_temp_therm_limit(const I2C_Dev *i2c_dev, * * @return ReturnStatus *****************************************************************************/ -ReturnStatus adt7481_set_remote2_temp_limit(const I2C_Dev *i2c_dev, - eTempSensorADT7481ConfigParamsId limitToConfig, - int8_t tempLimitValue) +ReturnStatus +adt7481_set_remote2_temp_limit(const I2C_Dev *i2c_dev, + eTempSensorADT7481ConfigParamsId limitToConfig, + int8_t tempLimitValue) { ReturnStatus status = RETURN_NOTOK; switch (limitToConfig) { - case CONF_TEMP_ADT7481_LOW_LIMIT_REG: - { - status = adt7481_set_remote2_temp_low_limit(i2c_dev, - tempLimitValue); + case CONF_TEMP_ADT7481_LOW_LIMIT_REG: { + status = + adt7481_set_remote2_temp_low_limit(i2c_dev, tempLimitValue); break; } - case CONF_TEMP_ADT7481_HIGH_LIMIT_REG: - { + case CONF_TEMP_ADT7481_HIGH_LIMIT_REG: { status = adt7481_set_remote2_temp_high_limit(i2c_dev, tempLimitValue); break; } - case CONF_TEMP_ADT7481_THERM_LIMIT_REG: - { + case CONF_TEMP_ADT7481_THERM_LIMIT_REG: { status = adt7481_set_remote2_temp_therm_limit(i2c_dev, tempLimitValue); break; } - default: - { + default: { return status; } } @@ -1100,27 +1075,25 @@ ReturnStatus adt7481_set_remote2_temp_limit(const I2C_Dev *i2c_dev, * @return ReturnStatus *****************************************************************************/ ReturnStatus adt7481_get_remote1_temp_offset(const I2C_Dev *i2c_dev, - int16_t* tempOffsetValue) + int16_t *tempOffsetValue) { ReturnStatus status = RETURN_NOTOK; uint8_t lRegValue = 0x00; uint8_t hRegValue = 0x00; /* Read LSB data */ - status = adt7481_raw_read(i2c_dev, - ADT7481_REG_R_REMOTE1_OFFSET_L, + status = adt7481_raw_read(i2c_dev, ADT7481_REG_R_REMOTE1_OFFSET_L, &lRegValue); if (status != RETURN_OK) { tempOffsetValue = NULL; } else { /* Read MSB data */ - status = adt7481_raw_read(i2c_dev, - ADT7481_REG_R_REMOTE1_OFFSET_H, + status = adt7481_raw_read(i2c_dev, ADT7481_REG_R_REMOTE1_OFFSET_H, &hRegValue); if (status != RETURN_OK) { tempOffsetValue = NULL; } else { - *tempOffsetValue = (int8_t) REG_U16_TO_TEMP(hRegValue); + *tempOffsetValue = (int8_t)REG_U16_TO_TEMP(hRegValue); } } return status; @@ -1146,14 +1119,12 @@ ReturnStatus adt7481_set_remote1_temp_offset(const I2C_Dev *i2c_dev, regValue = TEMP_TO_REG_U16(tempOffsetValue); /* Write LSB data */ - status = adt7481_raw_write(i2c_dev, - ADT7481_REG_W_REMOTE1_OFFSET_L, - (uint8_t) regValue); + status = adt7481_raw_write(i2c_dev, ADT7481_REG_W_REMOTE1_OFFSET_L, + (uint8_t)regValue); if (status == RETURN_OK) { /* Write MSB data */ - status = adt7481_raw_write(i2c_dev, - ADT7481_REG_W_REMOTE1_OFFSET_L, - (uint8_t) (regValue >> 8)); + status = adt7481_raw_write(i2c_dev, ADT7481_REG_W_REMOTE1_OFFSET_L, + (uint8_t)(regValue >> 8)); } return status; } @@ -1169,27 +1140,25 @@ ReturnStatus adt7481_set_remote1_temp_offset(const I2C_Dev *i2c_dev, * @return ReturnStatus *****************************************************************************/ ReturnStatus adt7481_get_remote2_temp_offset(const I2C_Dev *i2c_dev, - int16_t* tempOffsetValue) + int16_t *tempOffsetValue) { ReturnStatus status = RETURN_NOTOK; uint8_t lRegValue = 0x00; uint8_t hRegValue = 0x00; /* Read LSB data */ - status = adt7481_raw_read(i2c_dev, - ADT7481_REG_R_REMOTE2_OFFSET_L, + status = adt7481_raw_read(i2c_dev, ADT7481_REG_R_REMOTE2_OFFSET_L, &lRegValue); if (status != RETURN_OK) { tempOffsetValue = NULL; } else { /* Read MSB data */ - status = adt7481_raw_read(i2c_dev, - ADT7481_REG_R_REMOTE2_OFFSET_L, + status = adt7481_raw_read(i2c_dev, ADT7481_REG_R_REMOTE2_OFFSET_L, &hRegValue); if (status != RETURN_OK) { tempOffsetValue = NULL; } else { - *tempOffsetValue = (int8_t) REG_U16_TO_TEMP(hRegValue); + *tempOffsetValue = (int8_t)REG_U16_TO_TEMP(hRegValue); } } @@ -1216,14 +1185,12 @@ ReturnStatus adt7481_set_remote2_temp_offset(const I2C_Dev *i2c_dev, regValue = TEMP_TO_REG_U16(tempOffsetValue); /* Write LSB data */ - status = adt7481_raw_write(i2c_dev, - ADT7481_REG_W_REMOTE2_OFFSET_L, - (uint8_t) regValue); + status = adt7481_raw_write(i2c_dev, ADT7481_REG_W_REMOTE2_OFFSET_L, + (uint8_t)regValue); if (status == RETURN_OK) { /* Write MSB data */ - status = adt7481_raw_write(i2c_dev, - ADT7481_REG_W_REMOTE2_OFFSET_H, - (uint8_t) (regValue >> 8)); + status = adt7481_raw_write(i2c_dev, ADT7481_REG_W_REMOTE2_OFFSET_H, + (uint8_t)(regValue >> 8)); } return status; } @@ -1239,7 +1206,7 @@ ReturnStatus adt7481_set_remote2_temp_offset(const I2C_Dev *i2c_dev, * @return ReturnStatus *****************************************************************************/ ReturnStatus adt7481_get_therm_hysteresis(const I2C_Dev *i2c_dev, - int8_t* tempHysteresisValue) + int8_t *tempHysteresisValue) { ReturnStatus status = RETURN_NOTOK; uint8_t regValue = 0x00; @@ -1248,7 +1215,7 @@ ReturnStatus adt7481_get_therm_hysteresis(const I2C_Dev *i2c_dev, if (status != RETURN_OK) { tempHysteresisValue = NULL; } else { - *tempHysteresisValue = (int8_t) REG_U8_TO_TEMP(regValue); + *tempHysteresisValue = (int8_t)REG_U8_TO_TEMP(regValue); } return status; } diff --git a/firmware/ec/src/devices/eeprom.c b/firmware/ec/src/devices/eeprom.c index f5ae48df32..323f0496d8 100644 --- a/firmware/ec/src/devices/eeprom.c +++ b/firmware/ec/src/devices/eeprom.c @@ -22,7 +22,7 @@ #endif #include -#define WP_ASSERT 1 +#define WP_ASSERT 1 #define WP_DEASSERT 0 extern Eeprom_Cfg eeprom_gbc_sid; @@ -31,16 +31,12 @@ extern Eeprom_Cfg eeprom_sdr_inv; extern Eeprom_Cfg eeprom_fe_inv; static ReturnStatus i2c_eeprom_write(I2C_Handle i2cHandle, - uint8_t deviceAddress, - uint16_t regAddress, - const void *value, - size_t numofBytes); + uint8_t deviceAddress, uint16_t regAddress, + const void *value, size_t numofBytes); static ReturnStatus i2c_eeprom_read(I2C_Handle i2cHandle, - uint16_t deviceAddress, - uint16_t regAddress, - void *value, - size_t numofbytes); + uint16_t deviceAddress, uint16_t regAddress, + void *value, size_t numofbytes); /***************************************************************************** ** FUNCTION NAME : eeprom_init @@ -52,11 +48,11 @@ static ReturnStatus i2c_eeprom_read(I2C_Handle i2cHandle, ** RETURN TYPE : Success or failure ** *****************************************************************************/ -bool eeprom_init(Eeprom_Cfg *cfg) { +bool eeprom_init(Eeprom_Cfg *cfg) +{ /* Configure our WP pin (if any) and set to be low (protected) by default */ if (cfg->pin_wp) { - OcGpio_configure(cfg->pin_wp, - OCGPIO_CFG_OUTPUT | OCGPIO_CFG_OUT_HIGH); + OcGpio_configure(cfg->pin_wp, OCGPIO_CFG_OUTPUT | OCGPIO_CFG_OUT_HIGH); } /* Test communication to the EEPROM */ @@ -79,16 +75,15 @@ bool eeprom_init(Eeprom_Cfg *cfg) { ** RETURN TYPE : Success or failure ** *****************************************************************************/ -ReturnStatus eeprom_read(const Eeprom_Cfg *cfg, - uint16_t address, - void *buffer, +ReturnStatus eeprom_read(const Eeprom_Cfg *cfg, uint16_t address, void *buffer, size_t size) { ReturnStatus status = RETURN_OK; I2C_Handle eepromHandle = i2c_get_handle(cfg->i2c_dev.bus); if (!eepromHandle) { LOGGER_ERROR("EEPROM:ERROR:: Failed to get I2C Bus for " - "EEPROM device 0x%x.\n", cfg->i2c_dev.slave_addr); + "EEPROM device 0x%x.\n", + cfg->i2c_dev.slave_addr); } else { /* TODO: if we're concerned about hogging the bus, we could always * page reads, but this doesn't seem necessary right now @@ -96,8 +91,8 @@ ReturnStatus eeprom_read(const Eeprom_Cfg *cfg, /* TODO: check for out-of-bounds addresses (some EEPROM wrap around * when reading after the end, so this could lead to confusion) */ - status = i2c_eeprom_read(eepromHandle, cfg->i2c_dev.slave_addr, - address, buffer, size); + status = i2c_eeprom_read(eepromHandle, cfg->i2c_dev.slave_addr, address, + buffer, size); } return status; } @@ -113,16 +108,15 @@ ReturnStatus eeprom_read(const Eeprom_Cfg *cfg, ** RETURN TYPE : Success or failure ** *****************************************************************************/ -ReturnStatus eeprom_write(const Eeprom_Cfg *cfg, - uint16_t address, - const void *buffer, - size_t size) +ReturnStatus eeprom_write(const Eeprom_Cfg *cfg, uint16_t address, + const void *buffer, size_t size) { ReturnStatus status = RETURN_OK; I2C_Handle eepromHandle = i2c_get_handle(cfg->i2c_dev.bus); if (!eepromHandle) { LOGGER_ERROR("EEPROM:ERROR:: Failed to get I2C Bus for " - "EEPROM device 0x%x.\n", cfg->i2c_dev.slave_addr); + "EEPROM device 0x%x.\n", + cfg->i2c_dev.slave_addr); } else { /* Respect EEPROM page size */ const size_t page_size = cfg->type.page_size; @@ -152,10 +146,8 @@ ReturnStatus eeprom_write(const Eeprom_Cfg *cfg, ** RETURN TYPE : Success or failure ** *****************************************************************************/ -static ReturnStatus i2c_eeprom_write(I2C_Handle i2cHandle, - uint8_t slaveAddress, - uint16_t memAddress, - const void *value, +static ReturnStatus i2c_eeprom_write(I2C_Handle i2cHandle, uint8_t slaveAddress, + uint16_t memAddress, const void *value, size_t numofBytes) { ReturnStatus status = RETURN_OK; @@ -171,12 +163,14 @@ static ReturnStatus i2c_eeprom_write(I2C_Handle i2cHandle, i2cTransaction.readBuf = NULL; i2cTransaction.readCount = 0; if (I2C_transfer(i2cHandle, &i2cTransaction)) { - LOGGER_DEBUG("EEPROM:INFO:: I2C write success for device: 0x%x reg Addr: 0x%x\n", - slaveAddress, memAddress); + LOGGER_DEBUG( + "EEPROM:INFO:: I2C write success for device: 0x%x reg Addr: 0x%x\n", + slaveAddress, memAddress); status = RETURN_OK; } else { - LOGGER_ERROR("EEPROM:ERROR:: I2C write failed for for device: 0x%x reg Addr: 0x%x\n", - slaveAddress, memAddress); + LOGGER_ERROR( + "EEPROM:ERROR:: I2C write failed for for device: 0x%x reg Addr: 0x%x\n", + slaveAddress, memAddress); status = RETURN_NOTOK; } return status; @@ -192,10 +186,8 @@ static ReturnStatus i2c_eeprom_write(I2C_Handle i2cHandle, ** RETURN TYPE : Success or failure ** *****************************************************************************/ -static ReturnStatus i2c_eeprom_read(I2C_Handle i2cHandle, - uint16_t slaveAddress, - uint16_t memAddress, - void *value, +static ReturnStatus i2c_eeprom_read(I2C_Handle i2cHandle, uint16_t slaveAddress, + uint16_t memAddress, void *value, size_t numofbytes) { ReturnStatus status = RETURN_OK; @@ -208,12 +200,14 @@ static ReturnStatus i2c_eeprom_read(I2C_Handle i2cHandle, i2cTransaction.readBuf = value; i2cTransaction.readCount = numofbytes; if (I2C_transfer(i2cHandle, &i2cTransaction)) { - LOGGER_DEBUG("EEPROM:INFO:: I2C read success for device: 0x%x reg Addr: 0x%x\n", - slaveAddress, memAddress); + LOGGER_DEBUG( + "EEPROM:INFO:: I2C read success for device: 0x%x reg Addr: 0x%x\n", + slaveAddress, memAddress); status = RETURN_OK; } else { - LOGGER_ERROR("EEPROM:ERROR:: I2C write failed for for device: 0x%x reg Addr: 0x%x\n", - slaveAddress, memAddress); + LOGGER_ERROR( + "EEPROM:ERROR:: I2C write failed for for device: 0x%x reg Addr: 0x%x\n", + slaveAddress, memAddress); status = RETURN_NOTOK; } return status; @@ -270,13 +264,14 @@ ReturnStatus eeprom_enable_write(Eeprom_Cfg *cfg) ** RETURN TYPE : Success or failure ** *****************************************************************************/ -ReturnStatus eeprom_read_oc_info(uint8_t * oc_serial) +ReturnStatus eeprom_read_oc_info(uint8_t *oc_serial) { ReturnStatus status = RETURN_NOTOK; - status = eeprom_read(&eeprom_gbc_sid, OC_CONNECT1_SERIAL_INFO, - oc_serial, OC_CONNECT1_SERIAL_SIZE); + status = eeprom_read(&eeprom_gbc_sid, OC_CONNECT1_SERIAL_INFO, oc_serial, + OC_CONNECT1_SERIAL_SIZE); if (status != RETURN_OK) { - LOGGER_ERROR("EEPROM:ERROR:: Failed to get I2C Bus for GBC serial ID EEPROM.\n"); + LOGGER_ERROR( + "EEPROM:ERROR:: Failed to get I2C Bus for GBC serial ID EEPROM.\n"); } else { LOGGER_ERROR("EEPROM:Info:: OC Connect1 %d.\n", *oc_serial); } @@ -294,39 +289,36 @@ ReturnStatus eeprom_read_oc_info(uint8_t * oc_serial) ** RETURN TYPE : Success or failure ** *****************************************************************************/ -ReturnStatus eeprom_read_board_info(const Eeprom_Cfg *cfg, uint8_t * rom_info) +ReturnStatus eeprom_read_board_info(const Eeprom_Cfg *cfg, uint8_t *rom_info) { ReturnStatus status = RETURN_NOTOK; uint8_t info_size = 0x00; uint16_t eepromOffset = 0x0000; switch (cfg->ss) { - case OC_SS_SYS: - { + case OC_SS_SYS: { info_size = OC_GBC_BOARD_INFO_SIZE; eepromOffset = OC_GBC_BOARD_INFO; break; } - case OC_SS_SDR: - { + case OC_SS_SDR: { info_size = OC_SDR_BOARD_INFO_SIZE; eepromOffset = OC_SDR_BOARD_INFO; break; } - case OC_SS_RF: - { + case OC_SS_RF: { info_size = OC_RFFE_BOARD_INFO_SIZE; eepromOffset = OC_RFFE_BOARD_INFO; break; } - default: - { + default: { return status; } } status = eeprom_read(cfg, eepromOffset, rom_info, info_size); if (status != RETURN_OK) { - LOGGER_ERROR("EEPROM:ERROR:: Failed to get I2C Bus for EEPROM device 0x%x.\n", - cfg->i2c_dev.slave_addr); + LOGGER_ERROR( + "EEPROM:ERROR:: Failed to get I2C Bus for EEPROM device 0x%x.\n", + cfg->i2c_dev.slave_addr); } else { LOGGER_ERROR("EEPROM:Info:: OC Connect1 %s.\n", rom_info); } @@ -346,37 +338,33 @@ ReturnStatus eeprom_read_board_info(const Eeprom_Cfg *cfg, uint8_t * rom_info) ** *****************************************************************************/ ReturnStatus eeprom_read_device_info_record(const Eeprom_Cfg *cfg, - uint8_t recordNo, - char * device_info) + uint8_t recordNo, char *device_info) { ReturnStatus status = RETURN_NOTOK; uint8_t info_size = OC_DEVICE_INFO_SIZE; uint16_t eepromOffset = 0x0000; switch (cfg->ss) { - case OC_SS_SYS: - { + case OC_SS_SYS: { eepromOffset = OC_GBC_DEVICE_INFO + (recordNo * info_size); break; } - case OC_SS_SDR: - { + case OC_SS_SDR: { eepromOffset = OC_SDR_DEVICE_INFO + (recordNo * info_size); break; } - case OC_SS_RF: - { + case OC_SS_RF: { eepromOffset = OC_RFFE_DEVICE_INFO + (recordNo * info_size); break; } - default: - { + default: { return status; } } status = eeprom_read(cfg, eepromOffset, device_info, info_size); if (status != RETURN_OK) { - LOGGER_ERROR("EEPROM:ERROR:: Failed to get I2C Bus for EEPROM device 0x%x.\n", - cfg->i2c_dev.slave_addr); + LOGGER_ERROR( + "EEPROM:ERROR:: Failed to get I2C Bus for EEPROM device 0x%x.\n", + cfg->i2c_dev.slave_addr); } else { LOGGER_ERROR("EEPROM:Info:: Record read for 0x%x.\n", cfg->i2c_dev.slave_addr); @@ -396,38 +384,34 @@ ReturnStatus eeprom_read_device_info_record(const Eeprom_Cfg *cfg, ** RETURN TYPE : Success or failure ** *****************************************************************************/ -ReturnStatus eeprom_write_device_info_record(Eeprom_Cfg *cfg, - uint8_t recordNo, - char * device_info) +ReturnStatus eeprom_write_device_info_record(Eeprom_Cfg *cfg, uint8_t recordNo, + char *device_info) { ReturnStatus status = RETURN_NOTOK; uint8_t info_size = OC_DEVICE_INFO_SIZE; uint16_t eepromOffset = 0x0000; switch (cfg->ss) { - case OC_SS_SYS: - { + case OC_SS_SYS: { eepromOffset = OC_GBC_DEVICE_INFO + (recordNo * info_size); break; } - case OC_SS_SDR: - { + case OC_SS_SDR: { eepromOffset = OC_SDR_DEVICE_INFO + (recordNo * info_size); break; } - case OC_SS_RF: - { + case OC_SS_RF: { eepromOffset = OC_RFFE_DEVICE_INFO + (recordNo * info_size); break; } - default: - { + default: { return status; } } status = eeprom_write(cfg, eepromOffset, device_info, info_size); if (status != RETURN_OK) { - LOGGER_ERROR("EEPROM:ERROR:: Failed to get I2C Bus for EEPROM device 0x%x.\n", - cfg->i2c_dev.slave_addr); + LOGGER_ERROR( + "EEPROM:ERROR:: Failed to get I2C Bus for EEPROM device 0x%x.\n", + cfg->i2c_dev.slave_addr); } else { LOGGER_ERROR("EEPROM:Info:: Record written for 0x%x.\n", cfg->i2c_dev.slave_addr); diff --git a/firmware/ec/src/devices/eth_sw.c b/firmware/ec/src/devices/eth_sw.c index 3f325dfe5f..63ed3e6a0a 100644 --- a/firmware/ec/src/devices/eth_sw.c +++ b/firmware/ec/src/devices/eth_sw.c @@ -21,7 +21,7 @@ #include #include -#define CLEAR_BIT(x, y) (y = (~x) & y) +#define CLEAR_BIT(x, y) (y = (~x) & y) #define SET_BIT(x, y) (y = x | y) #define MACLOOPBACK 0 #define LINELOOPBACK 1 @@ -37,14 +37,15 @@ const char *destIp; uint8_t numRepeat; char convStr[IPSTRING_LENGTH]; char temp[IPSTRING_LENGTH]; -char *tempBuf=temp; +char *tempBuf = temp; -void eth_sw_configure(Eth_cfg* ethCfg) +void eth_sw_configure(Eth_cfg *ethCfg) { uint8_t link_up; uint16_t read_val = 0; if (!s_eth_sw_linkup) { - OcGpio_configure(ðCfg->eth_sw_cfg->pin_ec_ethsw_reset, OCGPIO_CFG_OUTPUT| OCGPIO_CFG_OUT_HIGH); + OcGpio_configure(ðCfg->eth_sw_cfg->pin_ec_ethsw_reset, + OCGPIO_CFG_OUTPUT | OCGPIO_CFG_OUT_HIGH); SysCtlDelay(16000000); //400ms delay } read_val = mdiobb_read_by_paging(PHY_PORT_0, REG_PHY_SPEC_STATUS); @@ -57,18 +58,18 @@ void eth_sw_configure(Eth_cfg* ethCfg) } } -ePostCode eth_sw_probe( POSTData *postData) +ePostCode eth_sw_probe(POSTData *postData) { ePostCode eth_sw_found = POST_DEV_MISSING; uint16_t switch_pid = 0; uint16_t devId = 0x00; /*Switch idenifier*/ - switch_pid = mdiobb_read(0x8, 3); - switch_pid = (switch_pid >>4); + switch_pid = mdiobb_read(0x8, 3); + switch_pid = (switch_pid >> 4); if (switch_pid == ETH_SW_PRODUCT_ID) { /* Phy Identifier */ devId = mdiobb_read_by_paging(0, REG_PHY_ID_1); - if ( devId == PHY_IDENTIFIER) { + if (devId == PHY_IDENTIFIER) { eth_sw_found = POST_DEV_FOUND; } } @@ -97,8 +98,9 @@ uint16_t get_interrupt_status(uint8_t port) /***************************************************************************** * Internal IRQ handler - reads in triggered interrupts and dispatches CBs *****************************************************************************/ -static void _ethernet_sw_isr(void *context) { - Eth_cfg *ethCfg= context; +static void _ethernet_sw_isr(void *context) +{ + Eth_cfg *ethCfg = context; uint8_t port = 0; uint8_t value; if (!ethCfg->eth_sw_cfg->eth_switch.obj.alert_cb) { @@ -107,94 +109,93 @@ static void _ethernet_sw_isr(void *context) { /* Confirm the interrupt*/ uint16_t read_val = mdiobb_read(GLOBAL_2, REG_INTERRUPT_MASK); read_val = mdiobb_read(GLOBAL_2, REG_INTERRUPT_SOURCE); - LOGGER_DEBUG("ETHSW::INFO:: Ethernet switch Interrupt mask register shows 0x%x.\n",read_val); + LOGGER_DEBUG( + "ETHSW::INFO:: Ethernet switch Interrupt mask register shows 0x%x.\n", + read_val); if (read_val & 0x1F) { while (!((read_val >> port) & 1)) { port++; } } - LOGGER_DEBUG("ETHSW::INFO:: Ethernet switch context report interrupt from 0x%x.\n",ethCfg->eth_sw_port); + LOGGER_DEBUG( + "ETHSW::INFO:: Ethernet switch context report interrupt from 0x%x.\n", + ethCfg->eth_sw_port); uint16_t interrupt_status = 0; uint16_t i = 0; Eth_Sw_Events eth_Evt; if (interrupt_status = get_interrupt_status(port)) { for (i = 0; (1 << i) != 0x10000; i++) { switch (interrupt_status & (1 << i)) { - case SPEED_INT_STATUS: - { - if (mdiobb_read_by_paging(port, REG_PHY_CONTROL) & AUTONEG_EN) { - value = (RES_SPEED & mdiobb_read_by_paging(port, REG_PHY_SPEC_STATUS)) ? - SPEED_100M : SPEED_10M; + case SPEED_INT_STATUS: { + if (mdiobb_read_by_paging(port, REG_PHY_CONTROL) & + AUTONEG_EN) { + value = (RES_SPEED & + mdiobb_read_by_paging(port, + REG_PHY_SPEC_STATUS)) ? + SPEED_100M : + SPEED_10M; } else { - value = (SPEED & mdiobb_read_by_paging(port, REG_PHY_CONTROL)) ? - SPEED_100M : SPEED_10M; + value = (SPEED & + mdiobb_read_by_paging(port, REG_PHY_CONTROL)) ? + SPEED_100M : + SPEED_10M; } eth_Evt = ETH_EVT_SPEED; - } - break; - case DUPLEX_INT_STATUS: - { - if (mdiobb_read_by_paging(port, REG_PHY_CONTROL) & AUTONEG_EN) { - value = (RES_DUPLEX & mdiobb_read_by_paging(port, REG_PHY_SPEC_STATUS)) ? - FULL_DUPLEX : HALF_DUPLEX; + } break; + case DUPLEX_INT_STATUS: { + if (mdiobb_read_by_paging(port, REG_PHY_CONTROL) & + AUTONEG_EN) { + value = (RES_DUPLEX & + mdiobb_read_by_paging(port, + REG_PHY_SPEC_STATUS)) ? + FULL_DUPLEX : + HALF_DUPLEX; } else { - value = (DUPLEX & mdiobb_read_by_paging(port, REG_PHY_CONTROL)) ? - FULL_DUPLEX : HALF_DUPLEX; + value = (DUPLEX & + mdiobb_read_by_paging(port, REG_PHY_CONTROL)) ? + FULL_DUPLEX : + HALF_DUPLEX; } eth_Evt = ETH_EVT_DUPLEX; - } - break; - case AUTONEG_COMPLETE_INT_STATUS: - { + } break; + case AUTONEG_COMPLETE_INT_STATUS: { read_val = mdiobb_read_by_paging(port, REG_PHY_STATUS); value = (AUTONEG_DONE & read_val) ? 1 : 0; eth_Evt = ETH_EVT_AUTONEG; - } - break; - case LINK_CHANGE_INT_STATUS: - { + } break; + case LINK_CHANGE_INT_STATUS: { read_val = mdiobb_read_by_paging(port, REG_PHY_SPEC_STATUS); value = (RT_LINK & read_val) ? 1 : 0; eth_Evt = ETH_EVT_LINK; - } - break; - case MDI_CROSSOVER_INT_STATUS: - { + } break; + case MDI_CROSSOVER_INT_STATUS: { read_val = mdiobb_read_by_paging(port, REG_PHY_SPEC_STATUS); value = (MDI_CROSSOVER_STATUS & read_val) ? 1 : 0; eth_Evt = ETH_EVT_CROSSOVER; - } - break; - case ENERGY_DET_INT_STATUS: - { + } break; + case ENERGY_DET_INT_STATUS: { read_val = mdiobb_read_by_paging(port, REG_PHY_SPEC_STATUS); value = (SLEEP_MODE & read_val) ? 1 : 0; eth_Evt = ETH_EVT_ENERGY; - } - break; - case POLARITY_INT_STATUS: - { + } break; + case POLARITY_INT_STATUS: { read_val = mdiobb_read_by_paging(port, REG_PHY_SPEC_STATUS); value = (POLARITY & read_val) ? 1 : 0; eth_Evt = ETH_EVT_POLARITY; break; } - case JABBER_INT_STATUS: - { + case JABBER_INT_STATUS: { read_val = mdiobb_read_by_paging(port, REG_PHY_SPEC_STATUS); value = (JABBER_DET & read_val) ? 1 : 0; eth_Evt = ETH_EVT_JABBER; - } - break; - default: - { + } break; + default: { LOGGER_ERROR("ETHSW:Unknown event type\n"); return; } } ethCfg->eth_sw_cfg->eth_switch.obj.alert_cb( - eth_Evt, - value, + eth_Evt, value, ethCfg->eth_sw_cfg->eth_switch.obj.cb_context); } } @@ -203,7 +204,8 @@ static void _ethernet_sw_isr(void *context) { /***************************************************************************** *****************************************************************************/ void eth_sw_setAlertHandler(Eth_cfg *ethCfg, Eth_Sw_CallbackFn alert_cb, - void *cb_context) { + void *cb_context) +{ ethCfg->eth_sw_cfg->eth_switch.obj.alert_cb = alert_cb; ethCfg->eth_sw_cfg->eth_switch.obj.cb_context = cb_context; } @@ -230,11 +232,14 @@ ReturnStatus eth_sw_get_status_speed(uint8_t port, port_speed *speed) { ReturnStatus ret = RETURN_OK; if (mdiobb_read_by_paging(port, REG_PHY_CONTROL) & AUTONEG_EN) - *speed = (RES_SPEED & mdiobb_read_by_paging(port, REG_PHY_SPEC_STATUS)) ? - SPEED_100M : SPEED_10M; + *speed = + (RES_SPEED & mdiobb_read_by_paging(port, REG_PHY_SPEC_STATUS)) ? + SPEED_100M : + SPEED_10M; else *speed = (SPEED & mdiobb_read_by_paging(port, REG_PHY_CONTROL)) ? - SPEED_100M : SPEED_10M; + SPEED_100M : + SPEED_10M; return ret; } @@ -242,35 +247,42 @@ ReturnStatus eth_sw_get_status_duplex(uint8_t port, port_duplex *duplex) { ReturnStatus ret = RETURN_OK; if (mdiobb_read_by_paging(port, REG_PHY_CONTROL) & AUTONEG_EN) - *duplex = (RES_DUPLEX & mdiobb_read_by_paging(port, REG_PHY_SPEC_STATUS)) ? - FULL_DUPLEX : HALF_DUPLEX; + *duplex = (RES_DUPLEX & + mdiobb_read_by_paging(port, REG_PHY_SPEC_STATUS)) ? + FULL_DUPLEX : + HALF_DUPLEX; else *duplex = (DUPLEX & mdiobb_read_by_paging(port, REG_PHY_CONTROL)) ? - FULL_DUPLEX : HALF_DUPLEX; + FULL_DUPLEX : + HALF_DUPLEX; return ret; } ReturnStatus eth_sw_get_status_auto_neg(uint8_t port, uint8_t *autoneg_on) { ReturnStatus ret = RETURN_OK; - *autoneg_on = (AUTONEG_EN & mdiobb_read_by_paging(port, REG_PHY_CONTROL)) ? - 1 : 0; + *autoneg_on = + (AUTONEG_EN & mdiobb_read_by_paging(port, REG_PHY_CONTROL)) ? 1 : 0; return ret; } ReturnStatus eth_sw_get_status_sleep_mode(uint8_t port, uint8_t *sleep_mode_en) { ReturnStatus ret = RETURN_OK; - *sleep_mode_en = (SLEEP_MODE & mdiobb_read_by_paging(port, REG_PHY_SPEC_STATUS)) ? - 1 : 0; + *sleep_mode_en = + (SLEEP_MODE & mdiobb_read_by_paging(port, REG_PHY_SPEC_STATUS)) ? + 1 : + 0; return ret; } -ReturnStatus eth_sw_get_status_auto_neg_complete(uint8_t port, uint8_t *autoneg_complete) +ReturnStatus eth_sw_get_status_auto_neg_complete(uint8_t port, + uint8_t *autoneg_complete) { ReturnStatus ret = RETURN_OK; - *autoneg_complete = (AUTONEG_DONE & mdiobb_read_by_paging(port, REG_PHY_STATUS)) ? - 1 : 0; + *autoneg_complete = + (AUTONEG_DONE & mdiobb_read_by_paging(port, REG_PHY_STATUS)) ? 1 : + 0; return ret; } @@ -296,26 +308,26 @@ ReturnStatus restart_autoneg(uint8_t port) ReturnStatus eth_sw_set_config_speed(uint8_t port, port_speed speed) { ReturnStatus ret = RETURN_OK; - uint16_t read_val =0x0000; + uint16_t read_val = 0x0000; switch (speed) { - case SPEED_10M: - read_val = mdiobb_read_by_paging(port, REG_PHY_CONTROL); - CLEAR_BIT((AUTONEG_EN | SPEED), read_val); - SET_BIT(SOFT_RESET, read_val); - mdiobb_write_by_paging(port, REG_PHY_CONTROL, read_val); - break; - case SPEED_100M: - read_val = mdiobb_read_by_paging(port, REG_PHY_CONTROL); - CLEAR_BIT(AUTONEG_EN, read_val); - SET_BIT((SOFT_RESET | SPEED), read_val); - mdiobb_write_by_paging(port, REG_PHY_CONTROL, read_val); - break; - case SPEED_AUTONEG: - restart_autoneg(port); - break; - default: - DEBUG("Invalid Ethernet speed set option"); - return RETURN_NOTOK; + case SPEED_10M: + read_val = mdiobb_read_by_paging(port, REG_PHY_CONTROL); + CLEAR_BIT((AUTONEG_EN | SPEED), read_val); + SET_BIT(SOFT_RESET, read_val); + mdiobb_write_by_paging(port, REG_PHY_CONTROL, read_val); + break; + case SPEED_100M: + read_val = mdiobb_read_by_paging(port, REG_PHY_CONTROL); + CLEAR_BIT(AUTONEG_EN, read_val); + SET_BIT((SOFT_RESET | SPEED), read_val); + mdiobb_write_by_paging(port, REG_PHY_CONTROL, read_val); + break; + case SPEED_AUTONEG: + restart_autoneg(port); + break; + default: + DEBUG("Invalid Ethernet speed set option"); + return RETURN_NOTOK; } return ret; } @@ -323,31 +335,31 @@ ReturnStatus eth_sw_set_config_speed(uint8_t port, port_speed speed) ReturnStatus eth_sw_set_config_duplex(uint8_t port, port_duplex duplex) { ReturnStatus ret = RETURN_OK; - uint16_t read_val =0x0000; + uint16_t read_val = 0x0000; switch (duplex) { - case SPEED_10M: - read_val = mdiobb_read_by_paging(port, REG_PHY_CONTROL); - CLEAR_BIT((AUTONEG_EN | DUPLEX), read_val); - SET_BIT(SOFT_RESET, read_val); - mdiobb_write_by_paging(port, REG_PHY_CONTROL, read_val); - break; - case SPEED_100M: - read_val = mdiobb_read_by_paging(port, REG_PHY_CONTROL); - CLEAR_BIT(AUTONEG_EN, read_val); - SET_BIT((SOFT_RESET | DUPLEX), read_val); - mdiobb_write_by_paging(port, REG_PHY_CONTROL, read_val); - break; - case SPEED_AUTONEG: - restart_autoneg(port); - break; - default: - DEBUG("Invalid Ethernet speed set option"); - return RETURN_NOTOK; + case SPEED_10M: + read_val = mdiobb_read_by_paging(port, REG_PHY_CONTROL); + CLEAR_BIT((AUTONEG_EN | DUPLEX), read_val); + SET_BIT(SOFT_RESET, read_val); + mdiobb_write_by_paging(port, REG_PHY_CONTROL, read_val); + break; + case SPEED_100M: + read_val = mdiobb_read_by_paging(port, REG_PHY_CONTROL); + CLEAR_BIT(AUTONEG_EN, read_val); + SET_BIT((SOFT_RESET | DUPLEX), read_val); + mdiobb_write_by_paging(port, REG_PHY_CONTROL, read_val); + break; + case SPEED_AUTONEG: + restart_autoneg(port); + break; + default: + DEBUG("Invalid Ethernet speed set option"); + return RETURN_NOTOK; } return ret; } -ReturnStatus eth_sw_set_config_power_down(uint8_t port,uint8_t power_down) +ReturnStatus eth_sw_set_config_power_down(uint8_t port, uint8_t power_down) { ReturnStatus ret = RETURN_OK; if (power_down) @@ -357,8 +369,8 @@ ReturnStatus eth_sw_set_config_power_down(uint8_t port,uint8_t power_down) return ret; } - -ReturnStatus eth_sw_set_config_sleep_mode_enable(uint8_t port,uint8_t sleep_mode_en) +ReturnStatus eth_sw_set_config_sleep_mode_enable(uint8_t port, + uint8_t sleep_mode_en) { ReturnStatus ret = RETURN_OK; if (sleep_mode_en) @@ -374,53 +386,56 @@ ReturnStatus get_interrupt(uint8_t port) return mdiobb_read_by_paging(port, REG_PHY_INTERRUPT_EN); } -ReturnStatus eth_sw_set_config_interrupt_enable(uint8_t port, uint8_t *interrupt_mask) +ReturnStatus eth_sw_set_config_interrupt_enable(uint8_t port, + uint8_t *interrupt_mask) { ReturnStatus ret = RETURN_OK; uint16_t i = 0; uint16_t write_val = get_interrupt(port); for (i = 0; (1 << i) != 0x10; i++) { switch ((1 << i)) { - case ETH_ALERT_SPEED_CHANGE: - (*interrupt_mask & ETH_ALERT_SPEED_CHANGE) ? - (write_val |= SPEED_INT_EN) : (write_val &= ~SPEED_INT_EN); - break; - case ETH_ALERT_DUPLEX_CHANGE: - (*interrupt_mask & ETH_ALERT_DUPLEX_CHANGE) ? - (write_val |= DUPLEX_INT_EN) : (write_val &= ~DUPLEX_INT_EN); - break; - case ETH_ALERT_AUTONEG_DONE: - (*interrupt_mask & ETH_ALERT_AUTONEG_DONE) ? - (write_val |= AUTONEG_COMPLETE_INT_EN) : - (write_val &= ~AUTONEG_COMPLETE_INT_EN); - break; - case ETH_ALERT_LINK_CHANGE: - (*interrupt_mask & ETH_ALERT_LINK_CHANGE) ? - (write_val |= LINK_CHANGE_INT_EN) : - (write_val &= ~LINK_CHANGE_INT_EN); - break; - case ETH_ALERT_CROSSOVER_DET: - (*interrupt_mask & ETH_ALERT_CROSSOVER_DET) ? - (write_val |= MDI_CROSSOVER_INT_EN) : - (write_val &= ~MDI_CROSSOVER_INT_EN); - break; - case ETH_ALERT_ENERGY_DET: - (*interrupt_mask & ETH_ALERT_ENERGY_DET) ? - (write_val |= ENERGY_DET_INT_EN) : - (write_val &= ~ENERGY_DET_INT_EN); - break; - case ETH_ALERT_POLARITY_DET: - (*interrupt_mask & ETH_ALERT_POLARITY_DET) ? - (write_val |= POLARITY_INT_EN) : - (write_val &= ~POLARITY_INT_EN); - break; - case ETH_ALERT_JABBER_DET: - (*interrupt_mask & ETH_ALERT_JABBER_DET) ? - (write_val |= JABBER_INT_EN) : - (write_val &= ~JABBER_INT_EN); - default: - DEBUG("Interrupt not supported"); - return RETURN_NOTOK; + case ETH_ALERT_SPEED_CHANGE: + (*interrupt_mask & ETH_ALERT_SPEED_CHANGE) ? + (write_val |= SPEED_INT_EN) : + (write_val &= ~SPEED_INT_EN); + break; + case ETH_ALERT_DUPLEX_CHANGE: + (*interrupt_mask & ETH_ALERT_DUPLEX_CHANGE) ? + (write_val |= DUPLEX_INT_EN) : + (write_val &= ~DUPLEX_INT_EN); + break; + case ETH_ALERT_AUTONEG_DONE: + (*interrupt_mask & ETH_ALERT_AUTONEG_DONE) ? + (write_val |= AUTONEG_COMPLETE_INT_EN) : + (write_val &= ~AUTONEG_COMPLETE_INT_EN); + break; + case ETH_ALERT_LINK_CHANGE: + (*interrupt_mask & ETH_ALERT_LINK_CHANGE) ? + (write_val |= LINK_CHANGE_INT_EN) : + (write_val &= ~LINK_CHANGE_INT_EN); + break; + case ETH_ALERT_CROSSOVER_DET: + (*interrupt_mask & ETH_ALERT_CROSSOVER_DET) ? + (write_val |= MDI_CROSSOVER_INT_EN) : + (write_val &= ~MDI_CROSSOVER_INT_EN); + break; + case ETH_ALERT_ENERGY_DET: + (*interrupt_mask & ETH_ALERT_ENERGY_DET) ? + (write_val |= ENERGY_DET_INT_EN) : + (write_val &= ~ENERGY_DET_INT_EN); + break; + case ETH_ALERT_POLARITY_DET: + (*interrupt_mask & ETH_ALERT_POLARITY_DET) ? + (write_val |= POLARITY_INT_EN) : + (write_val &= ~POLARITY_INT_EN); + break; + case ETH_ALERT_JABBER_DET: + (*interrupt_mask & ETH_ALERT_JABBER_DET) ? + (write_val |= JABBER_INT_EN) : + (write_val &= ~JABBER_INT_EN); + default: + DEBUG("Interrupt not supported"); + return RETURN_NOTOK; } } mdiobb_write_by_paging(port, REG_PHY_INTERRUPT_EN, write_val); @@ -431,42 +446,42 @@ ReturnStatus eth_sw_set_config_soft_reset(uint8_t port) { ReturnStatus ret = RETURN_OK; /* write into REG_PHY_CONTROL bit# 15 */ - mdiobb_set_bits(port, REG_PHY_CONTROL, SOFT_RESET); - return ret; + mdiobb_set_bits(port, REG_PHY_CONTROL, SOFT_RESET); + return ret; } -ReturnStatus eth_sw_enable_loopback(void *driver, void *params){ +ReturnStatus eth_sw_enable_loopback(void *driver, void *params) +{ ReturnStatus status = RETURN_OK; - Eth_cfg* s_eth_cfg = (Eth_cfg*)driver; - Eth_LoopBack_Params* s_eth_lpback = (Eth_LoopBack_Params*)params; - switch (s_eth_lpback->loopBackType) - { - case MACLOOPBACK: - status = eth_sw_enable_macloopback(s_eth_cfg->eth_sw_port); - break; - /*TODO: Implementation to be done for Line and External Loopback*/ - case LINELOOPBACK: - case EXTLOOPBACK: - default: - break; + Eth_cfg *s_eth_cfg = (Eth_cfg *)driver; + Eth_LoopBack_Params *s_eth_lpback = (Eth_LoopBack_Params *)params; + switch (s_eth_lpback->loopBackType) { + case MACLOOPBACK: + status = eth_sw_enable_macloopback(s_eth_cfg->eth_sw_port); + break; + /*TODO: Implementation to be done for Line and External Loopback*/ + case LINELOOPBACK: + case EXTLOOPBACK: + default: + break; } return status; } -ReturnStatus eth_sw_disable_loopback(void *driver, void *params){ +ReturnStatus eth_sw_disable_loopback(void *driver, void *params) +{ ReturnStatus status = RETURN_OK; - Eth_cfg* s_eth_cfg = (Eth_cfg*)driver; - Eth_LoopBack_Params* s_eth_lpback = (Eth_LoopBack_Params*)params; - switch (s_eth_lpback->loopBackType) - { - case MACLOOPBACK: - status = eth_sw_disable_macloopback(s_eth_cfg->eth_sw_port); - break; - /*TODO: Implementation to be done for Line and External Loopback*/ - case LINELOOPBACK: - case EXTLOOPBACK: - default: - break; + Eth_cfg *s_eth_cfg = (Eth_cfg *)driver; + Eth_LoopBack_Params *s_eth_lpback = (Eth_LoopBack_Params *)params; + switch (s_eth_lpback->loopBackType) { + case MACLOOPBACK: + status = eth_sw_disable_macloopback(s_eth_cfg->eth_sw_port); + break; + /*TODO: Implementation to be done for Line and External Loopback*/ + case LINELOOPBACK: + case EXTLOOPBACK: + default: + break; } return status; } @@ -491,32 +506,35 @@ ReturnStatus eth_sw_disable_macloopback(uint8_t port) ReturnStatus eth_sw_enable_packet_gen(void *driver, void *params) { ReturnStatus ret = RETURN_OK; - Eth_cfg* s_eth_cfg = (Eth_cfg*)driver; - Eth_PacketGen_Params* s_eth_packetParams = (Eth_PacketGen_Params*)params; + Eth_cfg *s_eth_cfg = (Eth_cfg *)driver; + Eth_PacketGen_Params *s_eth_packetParams = (Eth_PacketGen_Params *)params; /*Packet generator params such as packet length, payload type, frame count etc are set in REG_C45_PACKET_GEN*/ - mdiobb_write_by_paging_c45(s_eth_cfg->eth_sw_port, REG_C45_PACKET_GEN, s_eth_packetParams->reg_value); + mdiobb_write_by_paging_c45(s_eth_cfg->eth_sw_port, REG_C45_PACKET_GEN, + s_eth_packetParams->reg_value); return ret; } ReturnStatus eth_sw_disable_packet_gen(void *driver) { ReturnStatus ret = RETURN_OK; - Eth_cfg* s_eth_cfg = (Eth_cfg*)driver; - mdiobb_clear_bits_C45(s_eth_cfg->eth_sw_port, REG_C45_PACKET_GEN, PACKET_GEN_EN); + Eth_cfg *s_eth_cfg = (Eth_cfg *)driver; + mdiobb_clear_bits_C45(s_eth_cfg->eth_sw_port, REG_C45_PACKET_GEN, + PACKET_GEN_EN); return ret; } char *convString(int i, char *result) { - sprintf(result,"%d",i); + sprintf(result, "%d", i); return result; } -ReturnStatus eth_sw_config_tiva_client(void *driver, void *params) { +ReturnStatus eth_sw_config_tiva_client(void *driver, void *params) +{ ReturnStatus ret = RETURN_OK; int count = 0; - Eth_cfg* s_eth_cfg = (Eth_cfg*)driver; - Eth_TcpClient_Params *s_eth_tcpParams = (Eth_TcpClient_Params*)params; + Eth_cfg *s_eth_cfg = (Eth_cfg *)driver; + Eth_TcpClient_Params *s_eth_tcpParams = (Eth_TcpClient_Params *)params; Task_Handle taskHandle_client; Task_Params taskParams; @@ -530,7 +548,7 @@ ReturnStatus eth_sw_config_tiva_client(void *driver, void *params) { do { convString(s_eth_tcpParams->ipAddress[count], tempBuf); strcat(convStr, tempBuf); - if((MAX - 1) != count) { + if ((MAX - 1) != count) { strcat(convStr, "."); } count++; @@ -547,7 +565,8 @@ ReturnStatus eth_sw_config_tiva_client(void *driver, void *params) { taskParams.priority = ETHTIVACLEINT_TASK_PRIORITY; taskParams.arg0 = s_eth_tcpParams->tcpPort; - taskHandle_client = Task_create((Task_FuncPtr) tcpHandler_client, &taskParams, &eb); + taskHandle_client = + Task_create((Task_FuncPtr)tcpHandler_client, &taskParams, &eb); if (taskHandle_client == NULL) { System_printf("Failed to create taskHandle_client Task\n"); } @@ -560,49 +579,54 @@ ReturnStatus eth_sw_set_config_restart_neg(uint8_t port) ReturnStatus ret = RETURN_OK; /* write into PHY control register & in autoneg enable bit */ mdiobb_set_bits(port, REG_PHY_CONTROL, - (RESTART_AUTONEG | AUTONEG_EN | SOFT_RESET)); + (RESTART_AUTONEG | AUTONEG_EN | SOFT_RESET)); return ret; } -ReturnStatus eth_sw_get_config_speed(uint8_t port, port_speed* speed) +ReturnStatus eth_sw_get_config_speed(uint8_t port, port_speed *speed) { ReturnStatus ret = RETURN_OK; - if (AUTONEG_EN & mdiobb_read_by_paging(port, REG_PHY_CONTROL)) + if (AUTONEG_EN & mdiobb_read_by_paging(port, REG_PHY_CONTROL)) *speed = SPEED_AUTONEG; else *speed = SPEED & mdiobb_read_by_paging(port, REG_PHY_CONTROL) ? - SPEED_100M : SPEED_10M; + SPEED_100M : + SPEED_10M; return ret; } -ReturnStatus eth_sw_get_config_duplex(uint8_t port, port_duplex* duplex) +ReturnStatus eth_sw_get_config_duplex(uint8_t port, port_duplex *duplex) { ReturnStatus ret = RETURN_OK; - if (AUTONEG_EN & mdiobb_read_by_paging(port, REG_PHY_CONTROL)) + if (AUTONEG_EN & mdiobb_read_by_paging(port, REG_PHY_CONTROL)) *duplex = DUPLEX_AUTONEG; else *duplex = (DUPLEX & mdiobb_read_by_paging(port, REG_PHY_CONTROL)) ? - FULL_DUPLEX : HALF_DUPLEX; + FULL_DUPLEX : + HALF_DUPLEX; return ret; } -ReturnStatus eth_sw_get_config_power_down(uint8_t port, uint8_t* power_dwn) +ReturnStatus eth_sw_get_config_power_down(uint8_t port, uint8_t *power_dwn) { ReturnStatus ret = RETURN_OK; - *power_dwn = (PWR_DOWN & mdiobb_read_by_paging(port, REG_PHY_CONTROL)) ? - 1 : 0; + *power_dwn = + (PWR_DOWN & mdiobb_read_by_paging(port, REG_PHY_CONTROL)) ? 1 : 0; return ret; } -ReturnStatus eth_sw_get_config_sleep_mode(uint8_t port, uint8_t* sleep_mode) +ReturnStatus eth_sw_get_config_sleep_mode(uint8_t port, uint8_t *sleep_mode) { ReturnStatus ret = RETURN_OK; - *sleep_mode = (ENERGY_DET & mdiobb_read_by_paging(port, REG_PHY_SPEC_CONTROL)) ? - 1 : 0; + *sleep_mode = + (ENERGY_DET & mdiobb_read_by_paging(port, REG_PHY_SPEC_CONTROL)) ? + 1 : + 0; return ret; } -ReturnStatus eth_sw_get_config_interrupt_enable(uint8_t port, uint8_t* interrupt_enb) +ReturnStatus eth_sw_get_config_interrupt_enable(uint8_t port, + uint8_t *interrupt_enb) { ReturnStatus ret = RETURN_OK; /* read the register REG_PHY_INTERRUPT_EN */ diff --git a/firmware/ec/src/devices/g510.c b/firmware/ec/src/devices/g510.c index 71fa7fbafc..776757631a 100644 --- a/firmware/ec/src/devices/g510.c +++ b/firmware/ec/src/devices/g510.c @@ -25,45 +25,45 @@ /* TODO: move to helper? */ #define STATIC_STRLEN(s) (ARRAY_SIZE(s) - 1) -#define TESTMOD_TASK_PRIORITY 2 -#define TESTMOD_TASK_STACK_SIZE 2048 +#define TESTMOD_TASK_PRIORITY 2 +#define TESTMOD_TASK_STACK_SIZE 2048 #define G510_WRITE_TIMEOUT 500 #define G510_READ_TIMEOUT 5000 /* G510 enable line is active-low */ -#define GSM_EN_ASSERT (0) +#define GSM_EN_ASSERT (0) #define GSM_EN_DEASSERT (1) -#define GSM_PWR_EN_ASSERT (1) +#define GSM_PWR_EN_ASSERT (1) #define GSM_PWR_EN_DEASSERT (0) #define GSM_SHUTDOWN_TIME 200 #define GSM_COOLDOWN_TIME 50 typedef enum { - TWOG_SIM_CALLSTATE_CHANGE = 0, - TWOG_SIM_INCOMING_MSG = 1, - TWOG_SIM_ALERT_PARAMS_MAX /* Limiter */ + TWOG_SIM_CALLSTATE_CHANGE = 0, + TWOG_SIM_INCOMING_MSG = 1, + TWOG_SIM_ALERT_PARAMS_MAX /* Limiter */ } eTEST_MOD_ALERTParam; -typedef enum { - TWOG_CALL_EVT_RING = 0, +typedef enum { + TWOG_CALL_EVT_RING = 0, TWOG_CALL_EVT_CALL_END = 1, } eTEST_MODE_CallEvent; typedef enum { - TWOG_IMEI = 0, - TWOG_IMSI = 1, - TWOG_GETMFG = 2, - TWOG_GETMODEL = 3, - TWOG_RSSI = 4, - TWOG_BER = 5, - TWOG_REGSTATUS = 6, - TWOG_NETWORK_OP_INFO = 7, - TWOG_CELLID = 8, - TWOG_BSIC = 9, - TWOG_LASTERR = 10, - TWOG_PARAM_MAX /* Limiter */ + TWOG_IMEI = 0, + TWOG_IMSI = 1, + TWOG_GETMFG = 2, + TWOG_GETMODEL = 3, + TWOG_RSSI = 4, + TWOG_BER = 5, + TWOG_REGSTATUS = 6, + TWOG_NETWORK_OP_INFO = 7, + TWOG_CELLID = 8, + TWOG_BSIC = 9, + TWOG_LASTERR = 10, + TWOG_PARAM_MAX /* Limiter */ } eTestModule_StatusParam; static UART_Handle uartGsm; @@ -89,7 +89,7 @@ static void cmti_cb(const GsmCmtiInfo *info, void *context) static void call_state_cb(const GsmClccInfo *info, void *context) { - LOGGER("CLCC %u\n", info->call_state); + LOGGER("CLCC %u\n", info->call_state); switch (info->call_state) { case GSM_CALL_STATE_INCOMING: { eTEST_MODE_CallEvent callState = TWOG_CALL_EVT_RING; @@ -105,20 +105,19 @@ static void call_state_cb(const GsmClccInfo *info, void *context) } /* Configures the various IO pins associated with this subsystem */ -static bool configure_io(TestMod_Cfg *testmod_cfg) { +static bool configure_io(TestMod_Cfg *testmod_cfg) +{ //const TestMod_Cfg *testmod_cfg = (TestMod_Cfg *)testModuleCfg; - G510_Cfg *cfg = &testmod_cfg->g510_cfg; + G510_Cfg *cfg = &testmod_cfg->g510_cfg; OcGpio_configure(&cfg->pin_sim_present, OCGPIO_CFG_INPUT); - OcGpio_configure(&cfg->pin_enable, OCGPIO_CFG_OUTPUT | - OCGPIO_CFG_OUT_LOW); - OcGpio_configure(&cfg->pin_pwr_en, OCGPIO_CFG_OUTPUT | - OCGPIO_CFG_OUT_LOW); + OcGpio_configure(&cfg->pin_enable, OCGPIO_CFG_OUTPUT | OCGPIO_CFG_OUT_LOW); + OcGpio_configure(&cfg->pin_pwr_en, OCGPIO_CFG_OUTPUT | OCGPIO_CFG_OUT_LOW); return true; } -static UART_Handle open_comm(TestMod_Cfg * testmod_cfg) +static UART_Handle open_comm(TestMod_Cfg *testmod_cfg) { //const TestMod_Cfg *testmod_cfg = (TestMod_Cfg *)testModuleCfg; @@ -138,7 +137,7 @@ static UART_Handle open_comm(TestMod_Cfg * testmod_cfg) return UART_open(testmod_cfg->g510_cfg.uart, &uartParams); } -static bool g510_reset(TestMod_Cfg * testmod_cfg) +static bool g510_reset(TestMod_Cfg *testmod_cfg) { //const TestMod_Cfg *testmod_cfg = (TestMod_Cfg *)testModuleCfg; const G510_Cfg *cfg = &testmod_cfg->g510_cfg; @@ -184,8 +183,7 @@ static bool g510_reset(TestMod_Cfg * testmod_cfg) return true; } - -ReturnStatus g510_init(TestMod_Cfg* testModuleCfg, const void *alert_token) +ReturnStatus g510_init(TestMod_Cfg *testModuleCfg, const void *alert_token) { if (!configure_io(testModuleCfg)) { return RETURN_NOTOK; @@ -243,7 +241,7 @@ static void testModule_task(UArg a0, UArg a1) GSM_cimi(s_hGsm, &imsi); /* TODO: hack because System_printf is crappy and doesn't support %llu */ char imsiStr[16]; - snprintf(imsiStr, sizeof(imsiStr), "%"PRIu64, imsi); + snprintf(imsiStr, sizeof(imsiStr), "%" PRIu64, imsi); LOGGER("IMSI: %s\n", imsiStr); /* NOTE: if the message storage fills up, the G510 will just @@ -255,10 +253,10 @@ static void testModule_task(UArg a0, UArg a1) GSM_clccSet(s_hGsm, true); /* Enable clcc (call state) msg */ /* Finish device configuration */ - if (!GSM_cnmi(s_hGsm, 2, 1, 0, 0 , 0) || /* enable sms arrival notif */ + if (!GSM_cnmi(s_hGsm, 2, 1, 0, 0, 0) || /* enable sms arrival notif */ !GSM_cmgf(s_hGsm, GSM_MSG_FMT_TEXT) || /* set to text mode */ - !GSM_csmp(s_hGsm, 17, 167, 0, 0) || /* text mode parameters */ - !GSM_csdh(s_hGsm, true)) { /* display extra info for cgmr */ + !GSM_csmp(s_hGsm, 17, 167, 0, 0) || /* text mode parameters */ + !GSM_csdh(s_hGsm, true)) { /* display extra info for cgmr */ s_hGsm = NULL; /* TODO: proper teardown of handle */ } @@ -267,7 +265,8 @@ static void testModule_task(UArg a0, UArg a1) GSM_cnma(s_hGsm); static char sms[160]; if (GSM_cmgr(s_hGsm, sms_idx, sms, NULL)) { - LOGGER("SMS: %.*s\n", 50, sms); // System_printf has a limited buffer + LOGGER("SMS: %.*s\n", 50, + sms); // System_printf has a limited buffer OCMP_GenerateAlert(alert_token, TWOG_SIM_INCOMING_MSG, sms); } else { LOGGER_ERROR("TESTMOD:Failed to read SMS\n"); @@ -306,130 +305,128 @@ ePostCode g510_task_init(void *driver, const void **config, taskParams.arg0 = (intptr_t)alert_token; Task_Handle task = Task_create(testModule_task, &taskParams, NULL); if (!task) { - LOGGER("TESTMOD::FATAL: Unable to start G510 task\n"); + LOGGER("TESTMOD::FATAL: Unable to start G510 task\n"); Semaphore_delete(&sem_simReady); Semaphore_delete(&sem_sms); return POST_DEV_CFG_FAIL; } - if (g510_init(driver,alert_token) != RETURN_OK) { + if (g510_init(driver, alert_token) != RETURN_OK) { return POST_DEV_CFG_FAIL; } return POST_DEV_CFG_DONE; } -bool g510_get_imei( TestMod_2G_Status_Data *p2gStatusData) +bool g510_get_imei(TestMod_2G_Status_Data *p2gStatusData) { - GsmCgsnInfo cgsnInfo; - if (!GSM_cgsn(s_hGsm, &cgsnInfo)) { - return false; - } - p2gStatusData->imei = strtoull(cgsnInfo.imei, NULL, 10); - return true; + GsmCgsnInfo cgsnInfo; + if (!GSM_cgsn(s_hGsm, &cgsnInfo)) { + return false; + } + p2gStatusData->imei = strtoull(cgsnInfo.imei, NULL, 10); + return true; } -bool g510_get_imsi( TestMod_2G_Status_Data *p2gStatusData) +bool g510_get_imsi(TestMod_2G_Status_Data *p2gStatusData) { - uint64_t imsi; - if (!GSM_cimi(s_hGsm, &imsi)) { - return false; - } - p2gStatusData->imsi = imsi; - return true; + uint64_t imsi; + if (!GSM_cimi(s_hGsm, &imsi)) { + return false; + } + p2gStatusData->imsi = imsi; + return true; } -bool g510_get_mfg( TestMod_2G_Status_Data *p2gStatusData) +bool g510_get_mfg(TestMod_2G_Status_Data *p2gStatusData) { - GsmCgmiInfo cgmiInfo; - if (!GSM_cgmi(s_hGsm, &cgmiInfo)) { - return false; - } - /* TODO: idea - make safe strncpy that always terminates str */ - strncpy(p2gStatusData->mfg, cgmiInfo.mfgId, - sizeof(p2gStatusData->mfg)); - return true; + GsmCgmiInfo cgmiInfo; + if (!GSM_cgmi(s_hGsm, &cgmiInfo)) { + return false; + } + /* TODO: idea - make safe strncpy that always terminates str */ + strncpy(p2gStatusData->mfg, cgmiInfo.mfgId, sizeof(p2gStatusData->mfg)); + return true; } -bool g510_get_model( TestMod_2G_Status_Data *p2gStatusData) +bool g510_get_model(TestMod_2G_Status_Data *p2gStatusData) { - GsmCgmmInfo cgmmInfo; - if (!GSM_cgmm(s_hGsm, &cgmmInfo)) { - return false; - } - strncpy(p2gStatusData->model, cgmmInfo.model, - sizeof(p2gStatusData->model)); - return true; + GsmCgmmInfo cgmmInfo; + if (!GSM_cgmm(s_hGsm, &cgmmInfo)) { + return false; + } + strncpy(p2gStatusData->model, cgmmInfo.model, sizeof(p2gStatusData->model)); + return true; } -bool g510_get_rssi( TestMod_2G_Status_Data *p2gStatusData) +bool g510_get_rssi(TestMod_2G_Status_Data *p2gStatusData) { - GsmCsqInfo csqInfo; - if (!GSM_csq(s_hGsm, &csqInfo)) { - return false; - } - p2gStatusData->rssi = csqInfo.rssi; - return true; + GsmCsqInfo csqInfo; + if (!GSM_csq(s_hGsm, &csqInfo)) { + return false; + } + p2gStatusData->rssi = csqInfo.rssi; + return true; } -bool g510_get_ber( TestMod_2G_Status_Data *p2gStatusData) +bool g510_get_ber(TestMod_2G_Status_Data *p2gStatusData) { - GsmCsqInfo csqInfo; - if (!GSM_csq(s_hGsm, &csqInfo)) { - return false; - } - p2gStatusData->ber = csqInfo.ber; - return true; + GsmCsqInfo csqInfo; + if (!GSM_csq(s_hGsm, &csqInfo)) { + return false; + } + p2gStatusData->ber = csqInfo.ber; + return true; } -bool g510_get_regStatus( TestMod_2G_Status_Data *p2gStatusData) +bool g510_get_regStatus(TestMod_2G_Status_Data *p2gStatusData) { - GsmCregInfo cregInfo; - if (!GSM_cregRead(s_hGsm, &cregInfo)) { - return false; - } - p2gStatusData->regStat = cregInfo.stat; - return true; + GsmCregInfo cregInfo; + if (!GSM_cregRead(s_hGsm, &cregInfo)) { + return false; + } + p2gStatusData->regStat = cregInfo.stat; + return true; } -bool g510_get_cellId( TestMod_2G_Status_Data *p2gStatusData) +bool g510_get_cellId(TestMod_2G_Status_Data *p2gStatusData) { - /* NOTE: requires CREG mode 2 (unsolicited + location info) */ - GsmCregInfo cregInfo; - if (!GSM_cregRead(s_hGsm, &cregInfo)) { - return false; - } - p2gStatusData->cid = cregInfo.cid; - return true; + /* NOTE: requires CREG mode 2 (unsolicited + location info) */ + GsmCregInfo cregInfo; + if (!GSM_cregRead(s_hGsm, &cregInfo)) { + return false; + } + p2gStatusData->cid = cregInfo.cid; + return true; } /* Command handling */ bool TestMod_cmdEnable(void *driver, void *params) { - LOGGER("TESTMOD 2G Enable\n"); + LOGGER("TESTMOD 2G Enable\n"); return GSM_cfun(s_hGsm, GSM_CFUN_FULL); } bool TestMod_cmdDisable(void *driver, void *params) { - LOGGER("TESTMOD 2G Disable\n"); + LOGGER("TESTMOD 2G Disable\n"); return GSM_cfun(s_hGsm, GSM_CFUN_AIRPLANE); } bool TestMod_cmdDisconnect(void *driver, void *params) { - LOGGER("TESTMOD 2G Disconnect\n"); + LOGGER("TESTMOD 2G Disconnect\n"); return GSM_cops(s_hGsm, GSM_COPS_MODE_DEREG, GSM_COPS_FMT_NUMERIC, ""); } bool TestMod_cmdConnect(void *driver, void *params) { - LOGGER("TESTMOD 2G Connect\n"); + LOGGER("TESTMOD 2G Connect\n"); return GSM_cops(s_hGsm, GSM_COPS_MODE_AUTO, GSM_COPS_FMT_NUMERIC, ""); } bool TestMod_cmdSendSms(void *driver, void *params) { - LOGGER("TESTMOD 2G SMS\n"); + LOGGER("TESTMOD 2G SMS\n"); /* TODO: we assume number is null terminated, should have check */ TestModule_sms *sms = params; return GSM_cmgs(s_hGsm, sms->number, sms->msg); @@ -446,19 +443,18 @@ bool TestMod_cmdDial(void *driver, void *params) bool TestMod_cmdAnswer(void *driver, void *params) { - LOGGER("TESTMOD 2G answer\n"); + LOGGER("TESTMOD 2G answer\n"); return GSM_a(s_hGsm); } bool TestMod_cmdHangup(void *driver, void *params) { - LOGGER("TESTMOD 2G hangup\n"); + LOGGER("TESTMOD 2G hangup\n"); return GSM_h(s_hGsm); } bool TestMod_cmdReset(void *driver, void *params) { - LOGGER("TESTMOD Reset\n"); + LOGGER("TESTMOD Reset\n"); return false; /* Not yet implemented */ } - diff --git a/firmware/ec/src/devices/i2c/XR20M1170.c b/firmware/ec/src/devices/i2c/XR20M1170.c index 03c6d342ef..c8d3ef2dde 100644 --- a/firmware/ec/src/devices/i2c/XR20M1170.c +++ b/firmware/ec/src/devices/i2c/XR20M1170.c @@ -47,11 +47,9 @@ static const XrStopBit XR_STOP_BIT_MAP[] = { }; static const XrParity XR_PARITY_MAP[] = { - [UART_PAR_NONE] = XR_PARITY_NONE, - [UART_PAR_EVEN] = XR_PARITY_EVEN, - [UART_PAR_ODD] = XR_PARITY_ODD, - [UART_PAR_ZERO] = XR_PARITY_ZERO, - [UART_PAR_ONE] = XR_PARITY_ONE, + [UART_PAR_NONE] = XR_PARITY_NONE, [UART_PAR_EVEN] = XR_PARITY_EVEN, + [UART_PAR_ODD] = XR_PARITY_ODD, [UART_PAR_ZERO] = XR_PARITY_ZERO, + [UART_PAR_ONE] = XR_PARITY_ONE, }; // TXLVL IRQ will automatically fire after reset & give us the actual level @@ -59,7 +57,7 @@ static XrRegTxlvl s_txEmptyBytes = 0; // UART function table for XR20M1170 implementation void XR20M1170_close(UART_Handle handle); -int XR20M1170_control(UART_Handle handle, unsigned int cmd, void *arg); +int XR20M1170_control(UART_Handle handle, unsigned int cmd, void *arg); void XR20M1170_init(UART_Handle handle); UART_Handle XR20M1170_open(UART_Handle handle, UART_Params *params); int XR20M1170_read(UART_Handle handle, void *buffer, size_t size); @@ -70,26 +68,23 @@ int XR20M1170_writePolling(UART_Handle handle, const void *buffer, size_t size); void XR20M1170_writeCancel(UART_Handle handle); const UART_FxnTable XR20M1170_fxnTable = { - XR20M1170_close, - XR20M1170_control, - XR20M1170_init, - XR20M1170_open, - XR20M1170_read, - XR20M1170_readPolling, - XR20M1170_readCancel, - XR20M1170_write, - XR20M1170_writePolling, + XR20M1170_close, XR20M1170_control, XR20M1170_init, + XR20M1170_open, XR20M1170_read, XR20M1170_readPolling, + XR20M1170_readCancel, XR20M1170_write, XR20M1170_writePolling, XR20M1170_writeCancel }; -static XrSubAddress getSubAddress(XrRegister reg) { - return (XrSubAddress) { +static XrSubAddress getSubAddress(XrRegister reg) +{ + return (XrSubAddress){ .channel = XR_CHANNEL_A, // The only supported option .reg = reg, }; } -static bool writeData(UART_Handle handle, XrRegister reg, const void *buffer, size_t size) { +static bool writeData(UART_Handle handle, XrRegister reg, const void *buffer, + size_t size) +{ XR20M1170_Object *object = handle->object; const XR20M1170_HWAttrs *hwAttrs = handle->hwAttrs; @@ -101,7 +96,9 @@ static bool writeData(UART_Handle handle, XrRegister reg, const void *buffer, si return true; } -static void readData(UART_Handle handle, XrRegister reg, void *buffer, size_t size) { +static void readData(UART_Handle handle, XrRegister reg, void *buffer, + size_t size) +{ XR20M1170_Object *object = handle->object; const XR20M1170_HWAttrs *hwAttrs = handle->hwAttrs; @@ -111,10 +108,12 @@ static void readData(UART_Handle handle, XrRegister reg, void *buffer, size_t si } } -void XR20M1170_close(UART_Handle handle) { +void XR20M1170_close(UART_Handle handle) +{ } -int XR20M1170_control(UART_Handle handle, unsigned int cmd, void *arg) { +int XR20M1170_control(UART_Handle handle, unsigned int cmd, void *arg) +{ XR20M1170_Object *object = handle->object; // Most of the commands require this info, might as well dedupe @@ -126,21 +125,18 @@ int XR20M1170_control(UART_Handle handle, unsigned int cmd, void *arg) { } GateMutex_leave(object->ringBufMutex, mutexKey); - switch(cmd) { - case UART_CMD_ISAVAILABLE: - { + switch (cmd) { + case UART_CMD_ISAVAILABLE: { bool *available = arg; *available = (rxLvl > 0); return (UART_STATUS_SUCCESS); } - case UART_CMD_GETRXCOUNT: - { + case UART_CMD_GETRXCOUNT: { int *count = arg; *count = rxLvl; return (UART_STATUS_SUCCESS); } - case UART_CMD_PEEK: - { + case UART_CMD_PEEK: { int *byte = (int *)arg; if (!rxLvl) { *byte = UART_ERROR; @@ -159,15 +155,17 @@ int XR20M1170_control(UART_Handle handle, unsigned int cmd, void *arg) { } // XR20M1170_init -void XR20M1170_init(UART_Handle handle) { +void XR20M1170_init(UART_Handle handle) +{ XR20M1170_Object *object = handle->object; - *object = (XR20M1170_Object) { + *object = (XR20M1170_Object){ .state.opened = false, }; } -static void processIrq(void *context) { +static void processIrq(void *context) +{ UART_Handle handle = context; XR20M1170_Object *object = handle->object; @@ -176,10 +174,9 @@ static void processIrq(void *context) { XrRegIsr isr; readData(handle, XR_REG_ISR, &isr, sizeof(isr)); - switch(isr.source) { + switch (isr.source) { case ISR_SRC_RXRDY_TMOUT: - case ISR_SRC_RXRDY: - { + case ISR_SRC_RXRDY: { // See how much data is available XrRegRxlvl rxLvl; readData(handle, XR_REG_RXLVL, &rxLvl, sizeof(rxLvl)); @@ -211,14 +208,16 @@ static void processIrq(void *context) { // copy and maybe auto-locking for (int i = 0; i < bytesToRead; ++i) { RingBuf_put(&object->ringBuffer, buf[i]); - Semaphore_post(object->readSem); // TODO: move out of mutex lock? + Semaphore_post( + object->readSem); // TODO: move out of mutex lock? } } GateMutex_leave(object->ringBufMutex, mutexKey); break; } case ISR_SRC_TXRDY: - readData(handle, XR_REG_TXLVL, &s_txEmptyBytes, sizeof(s_txEmptyBytes)); + readData(handle, XR_REG_TXLVL, &s_txEmptyBytes, + sizeof(s_txEmptyBytes)); Semaphore_post(object->writeSem); break; case ISR_SRC_LSR: @@ -235,11 +234,13 @@ static void processIrq(void *context) { } static double calc_divisor(double xtal_freq, double prescaler, double baudRate, - double sampling_mode) { + double sampling_mode) +{ return (xtal_freq / prescaler) / (baudRate * sampling_mode); } -static bool reset_ic(UART_Handle handle) { +static bool reset_ic(UART_Handle handle) +{ XrRegIOCtrl ioCtrl = { .uartReset = true, }; @@ -251,7 +252,8 @@ static bool reset_ic(UART_Handle handle) { } // Sets up the XR20M1170 registers to match desired settings -static bool register_config(UART_Handle handle, UART_Params *params) { +static bool register_config(UART_Handle handle, UART_Params *params) +{ const XR20M1170_HWAttrs *hwAttrs = handle->hwAttrs; // TODO: Idea: have a function for setting registers to make sure everything @@ -289,8 +291,8 @@ static bool register_config(UART_Handle handle, UART_Params *params) { // If the divisor is too big, introduce the prescaler if (divisor > UINT16_MAX) { prescaler = 4; - divisor = calc_divisor(hwAttrs->xtal1_freq, prescaler, - params->baudRate, samplingMode); + divisor = calc_divisor(hwAttrs->xtal1_freq, prescaler, params->baudRate, + samplingMode); } // Split the divisor into its integer and fractional parts @@ -311,14 +313,14 @@ static bool register_config(UART_Handle handle, UART_Params *params) { // Calculate data error rate double realDivisor = (dld.fracDivisor / 16.0) + trunc(divisor); - double dataErrorRate = ((divisor - realDivisor)/divisor) * 100.0; + double dataErrorRate = ((divisor - realDivisor) / divisor) * 100.0; if (dataErrorRate > 0.001) { Log_warning2("XR20M1170: Data error rate of %d%% for baud rate %d", dataErrorRate, params->baudRate); } // Set up LCR - lcr = (XrRegLcr) { + lcr = (XrRegLcr){ .wordLen = XR_WORD_LEN_MAP[params->dataLength], .stopBits = XR_STOP_BIT_MAP[params->stopBits], .parity = XR_PARITY_MAP[params->parityType], @@ -345,16 +347,16 @@ static bool register_config(UART_Handle handle, UART_Params *params) { writeData(handle, XR_REG_FCR, &fcr, sizeof(fcr)); /* Set trigger levels - these override the levels set by FCR if nonzero */ - XrRegTlr tlr = { - .rxTrigger = 32 / 4, /* 4-60, multiple of 4 */ - .txTrigger = 32 / 4, /* 4-60, multiple of 4 */ - }; - writeData(handle, XR_REG_TLR, &tlr, sizeof(tlr)); + XrRegTlr tlr = { + .rxTrigger = 32 / 4, /* 4-60, multiple of 4 */ + .txTrigger = 32 / 4, /* 4-60, multiple of 4 */ + }; + writeData(handle, XR_REG_TLR, &tlr, sizeof(tlr)); /* Set halt/resume levels - these can be relatively low since data should * normally be cleared quite quickly */ XrRegTcr tcr = { - .rxHaltLvl = 40 / 4, /* 0-60, multiple of 4 */ + .rxHaltLvl = 40 / 4, /* 0-60, multiple of 4 */ .rxResumeLvl = 12 / 4, /* 0-60, multiple of 4 */ }; writeData(handle, XR_REG_TCR, &tcr, sizeof(tcr)); @@ -382,7 +384,8 @@ static bool register_config(UART_Handle handle, UART_Params *params) { } // XR20M1170_open -UART_Handle XR20M1170_open(UART_Handle handle, UART_Params *params) { +UART_Handle XR20M1170_open(UART_Handle handle, UART_Params *params) +{ XR20M1170_Object *object = handle->object; const XR20M1170_HWAttrs *hwAttrs = handle->hwAttrs; @@ -429,8 +432,8 @@ UART_Handle XR20M1170_open(UART_Handle handle, UART_Params *params) { DEBUG("XR20M1170:ERROR::Can't ring buffer mutex\n"); } - OcGpio_configure(hwAttrs->pin_irq, OCGPIO_CFG_INPUT | - OCGPIO_CFG_INT_FALLING); + OcGpio_configure(hwAttrs->pin_irq, + OCGPIO_CFG_INPUT | OCGPIO_CFG_INT_FALLING); // Set up our threaded interrupt handler ThreadedInt_Init(hwAttrs->pin_irq, processIrq, handle); @@ -447,8 +450,8 @@ UART_Handle XR20M1170_open(UART_Handle handle, UART_Params *params) { // object->state.readDataMode = params->readDataMode; // object->state.writeDataMode = params->writeDataMode; // object->state.readEcho = params->readEcho; - object->readTimeout = params->readTimeout; - object->writeTimeout = params->writeTimeout; + object->readTimeout = params->readTimeout; + object->writeTimeout = params->writeTimeout; // object->readCallback = params->readCallback; // object->writeCallback = params->writeCallback; @@ -457,7 +460,8 @@ UART_Handle XR20M1170_open(UART_Handle handle, UART_Params *params) { return (handle); } -int XR20M1170_read(UART_Handle handle, void *buffer, size_t size) { +int XR20M1170_read(UART_Handle handle, void *buffer, size_t size) +{ XR20M1170_Object *object = handle->object; uint8_t *char_buf = buffer; @@ -483,11 +487,12 @@ int XR20M1170_read(UART_Handle handle, void *buffer, size_t size) { return bytesRead; } -int XR20M1170_write(UART_Handle handle, const void *buffer, size_t size) { +int XR20M1170_write(UART_Handle handle, const void *buffer, size_t size) +{ XR20M1170_Object *object = handle->object; int bytes_written = 0; - while(size) { + while (size) { if (!Semaphore_pend(object->writeSem, object->writeTimeout)) { return bytes_written; } @@ -501,20 +506,24 @@ int XR20M1170_write(UART_Handle handle, const void *buffer, size_t size) { return bytes_written; } -int XR20M1170_readPolling(UART_Handle handle, void *buffer, size_t size) { +int XR20M1170_readPolling(UART_Handle handle, void *buffer, size_t size) +{ DEBUG("XR20M1170::readPolling not yet implemented"); return 0; } -void XR20M1170_readCancel(UART_Handle handle) { +void XR20M1170_readCancel(UART_Handle handle) +{ DEBUG("XR20M1170::readCancel not yet implemented"); } -int XR20M1170_writePolling(UART_Handle handle, const void *buffer, size_t size) { +int XR20M1170_writePolling(UART_Handle handle, const void *buffer, size_t size) +{ DEBUG("XR20M1170::writePolling not yet implemented"); return 0; } -void XR20M1170_writeCancel(UART_Handle handle) { +void XR20M1170_writeCancel(UART_Handle handle) +{ DEBUG("XR20M1170::writeCancel not yet implemented"); } diff --git a/firmware/ec/src/devices/i2c/XR20M1170.h b/firmware/ec/src/devices/i2c/XR20M1170.h index 3db454080a..4ace1044ca 100644 --- a/firmware/ec/src/devices/i2c/XR20M1170.h +++ b/firmware/ec/src/devices/i2c/XR20M1170.h @@ -24,8 +24,8 @@ #include typedef enum XR20M1170_FlowControl { - XR20M1170_FLOWCONTROL_TX = 0x01, // Enable auto CTS - XR20M1170_FLOWCONTROL_RX = 0x02, // Enable auto RTS + XR20M1170_FLOWCONTROL_TX = 0x01, // Enable auto CTS + XR20M1170_FLOWCONTROL_RX = 0x02, // Enable auto RTS XR20M1170_FLOWCONTROL_NONE = 0x00, } XR20M1170_FlowControl; @@ -41,14 +41,14 @@ typedef struct XR20M1170_HWAttrs { OcGpio_Pin *pin_irq; /*!< XR20M IRQ# pin */ /*! UART Peripheral's interrupt priority */ // TODO: might be able to do something with this - unsigned int intPriority; + unsigned int intPriority; /*! Hardware flow control setting defined by driverlib */ XR20M1170_FlowControl flowControl; /*! Pointer to a application ring buffer */ - unsigned char *ringBufPtr; + unsigned char *ringBufPtr; /*! Size of ringBufPtr */ - size_t ringBufSize; + size_t ringBufSize; } XR20M1170_HWAttrs; /*! @@ -59,63 +59,63 @@ typedef struct XR20M1170_HWAttrs { typedef struct XR20M1170_Object { /* UART state variable */ struct { - bool opened:1; /* Has the obj been opened */ - UART_Mode readMode:1; /* Mode for all read calls */ - UART_Mode writeMode:1; /* Mode for all write calls */ - UART_DataMode readDataMode:1; /* Type of data being read */ - UART_DataMode writeDataMode:1; /* Type of data being written */ - UART_ReturnMode readReturnMode:1; /* Receive return mode */ - UART_Echo readEcho:1; /* Echo received data back */ + bool opened : 1; /* Has the obj been opened */ + UART_Mode readMode : 1; /* Mode for all read calls */ + UART_Mode writeMode : 1; /* Mode for all write calls */ + UART_DataMode readDataMode : 1; /* Type of data being read */ + UART_DataMode writeDataMode : 1; /* Type of data being written */ + UART_ReturnMode readReturnMode : 1; /* Receive return mode */ + UART_Echo readEcho : 1; /* Echo received data back */ /* * Flag to determine if a timeout has occurred when the user called * UART_read(). This flag is set by the timeoutClk clock object. */ - bool bufTimeout:1; + bool bufTimeout : 1; /* * Flag to determine when an ISR needs to perform a callback; in both * UART_MODE_BLOCKING or UART_MODE_CALLBACK */ - bool callCallback:1; + bool callCallback : 1; /* * Flag to determine if the ISR is in control draining the ring buffer * when in UART_MODE_CALLBACK */ - bool drainByISR:1; + bool drainByISR : 1; /* Flag to keep the state of the read ring buffer */ - bool rxEnabled:1; + bool rxEnabled : 1; } state; I2C_Handle i2cHandle; -// TODO: these are from UART_Tiva - need to revise the struct members -// Clock_Struct timeoutClk; /* Clock object to for timeouts */ -// uint32_t baudRate; /* Baud rate for UART */ -// UART_LEN dataLength; /* Data length for UART */ -// UART_STOP stopBits; /* Stop bits for UART */ -// UART_PAR parityType; /* Parity bit type for UART */ -// -// /* UART read variables */ - RingBuf_Object ringBuffer; /* local circular buffer object */ - GateMutex_Handle ringBufMutex; // Mutex for accessing ring buffer -// /* A complement pair of read functions for both the ISR and UART_read() */ -// UARTTiva_FxnSet readFxns; -// unsigned char *readBuf; /* Buffer data pointer */ -// size_t readSize; /* Desired number of bytes to read */ -// size_t readCount; /* Number of bytes left to read */ + // TODO: these are from UART_Tiva - need to revise the struct members + // Clock_Struct timeoutClk; /* Clock object to for timeouts */ + // uint32_t baudRate; /* Baud rate for UART */ + // UART_LEN dataLength; /* Data length for UART */ + // UART_STOP stopBits; /* Stop bits for UART */ + // UART_PAR parityType; /* Parity bit type for UART */ + // + // /* UART read variables */ + RingBuf_Object ringBuffer; /* local circular buffer object */ + GateMutex_Handle ringBufMutex; // Mutex for accessing ring buffer + // /* A complement pair of read functions for both the ISR and UART_read() */ + // UARTTiva_FxnSet readFxns; + // unsigned char *readBuf; /* Buffer data pointer */ + // size_t readSize; /* Desired number of bytes to read */ + // size_t readCount; /* Number of bytes left to read */ - Semaphore_Handle readSem; /* UART read semaphore */ - unsigned int readTimeout; /* Timeout for read semaphore */ -// UART_Callback readCallback; /* Pointer to read callback */ -// -// /* UART write variables */ -// const unsigned char *writeBuf; /* Buffer data pointer */ -// size_t writeSize; /* Desired number of bytes to write*/ -// size_t writeCount; /* Number of bytes left to write */ - Semaphore_Handle writeSem; /* UART write semaphore*/ - unsigned int writeTimeout; /* Timeout for write semaphore */ -// UART_Callback writeCallback; /* Pointer to write callback */ -// -// ti_sysbios_family_arm_m3_Hwi_Struct hwi; /* Hwi object */ + Semaphore_Handle readSem; /* UART read semaphore */ + unsigned int readTimeout; /* Timeout for read semaphore */ + // UART_Callback readCallback; /* Pointer to read callback */ + // + // /* UART write variables */ + // const unsigned char *writeBuf; /* Buffer data pointer */ + // size_t writeSize; /* Desired number of bytes to write*/ + // size_t writeCount; /* Number of bytes left to write */ + Semaphore_Handle writeSem; /* UART write semaphore*/ + unsigned int writeTimeout; /* Timeout for write semaphore */ + // UART_Callback writeCallback; /* Pointer to write callback */ + // + // ti_sysbios_family_arm_m3_Hwi_Struct hwi; /* Hwi object */ } XR20M1170_Object, *XR20M1170_Handle; #endif diff --git a/firmware/ec/src/devices/i2c/XR20M1170_Registers.h b/firmware/ec/src/devices/i2c/XR20M1170_Registers.h index 89b5588329..d657139952 100644 --- a/firmware/ec/src/devices/i2c/XR20M1170_Registers.h +++ b/firmware/ec/src/devices/i2c/XR20M1170_Registers.h @@ -45,17 +45,17 @@ typedef enum XrRegister { XR_REG_TCR = 0x06, /* EFR[4] == 1 && MCR[2] == 1 */ XR_REG_TLR = 0x07, /* EFR[4] == 1 && MCR[2] == 1 */ - XR_REG_TXLVL = 0x08, // LCR[7] = 0 - XR_REG_RXLVL = 0x09, // LCR[7] = 0 - XR_REG_IODIR = 0x0A, // LCR[7] = 0 - XR_REG_IOSTATE = 0x0B, // LCR[7] = 0 + XR_REG_TXLVL = 0x08, // LCR[7] = 0 + XR_REG_RXLVL = 0x09, // LCR[7] = 0 + XR_REG_IODIR = 0x0A, // LCR[7] = 0 + XR_REG_IOSTATE = 0x0B, // LCR[7] = 0 XR_REG_IOINTENA = 0x0C, // LCR[7] = 0 - XR_REG_IOCTRL = 0x0E, // LCR[7] = 0 - XR_REG_EFCR = 0x0F, // LCR[7] = 0 + XR_REG_IOCTRL = 0x0E, // LCR[7] = 0 + XR_REG_EFCR = 0x0F, // LCR[7] = 0 - XR_REG_EFR = 0x02, // LCR = 0xBF - XR_REG_XON1 = 0x04, // LCR = 0xBF - XR_REG_XON2 = 0x05, // LCR = 0xBF + XR_REG_EFR = 0x02, // LCR = 0xBF + XR_REG_XON1 = 0x04, // LCR = 0xBF + XR_REG_XON2 = 0x05, // LCR = 0xBF XR_REG_XOFF1 = 0x06, // LCR = 0xBF XR_REG_XOFF2 = 0x07, // LCR = 0xBF } XrRegister; @@ -78,10 +78,10 @@ typedef enum XrChannel { typedef struct PACKED XrSubAddress { union PACKED { struct PACKED { - uint8_t reserve1:1; - XrChannel channel:2; - uint8_t reg:4; - uint8_t reserve2:1; + uint8_t reserve1 : 1; + XrChannel channel : 2; + uint8_t reg : 4; + uint8_t reserve2 : 1; }; uint8_t byte; }; @@ -91,47 +91,47 @@ typedef uint8_t XrRegTxlvl; typedef uint8_t XrRegRxlvl; typedef enum XrWordLen { - XR_WORD_LEN_5 = 0x0, //!< Data length is 5 bits - XR_WORD_LEN_6 = 0x1, //!< Data length is 6 bits - XR_WORD_LEN_7 = 0x2, //!< Data length is 7 bits - XR_WORD_LEN_8 = 0x3, //!< Data length is 8 bits + XR_WORD_LEN_5 = 0x0, //!< Data length is 5 bits + XR_WORD_LEN_6 = 0x1, //!< Data length is 6 bits + XR_WORD_LEN_7 = 0x2, //!< Data length is 7 bits + XR_WORD_LEN_8 = 0x3, //!< Data length is 8 bits } XrWordLen; typedef enum XrStopBit { - XR_STOP_BIT_ONE = 0x0, //!< One stop bit - XR_STOP_BIT_TWO = 0x1, //!< Two stop bits + XR_STOP_BIT_ONE = 0x0, //!< One stop bit + XR_STOP_BIT_TWO = 0x1, //!< Two stop bits } XrStopBit; typedef enum XrParity { - XR_PARITY_NONE = 0x0, //!< No parity - XR_PARITY_ODD = 0x1, //!< Parity bit is odd - XR_PARITY_EVEN = 0x3, //!< Parity bit is even - XR_PARITY_ONE = 0x5, //!< Parity bit is always one - XR_PARITY_ZERO = 0x7, //!< Parity bit is always zero + XR_PARITY_NONE = 0x0, //!< No parity + XR_PARITY_ODD = 0x1, //!< Parity bit is odd + XR_PARITY_EVEN = 0x3, //!< Parity bit is even + XR_PARITY_ONE = 0x5, //!< Parity bit is always one + XR_PARITY_ZERO = 0x7, //!< Parity bit is always zero } XrParity; // TODO: a lot of these should be enums typedef struct PACKED XrRegLcr { - XrWordLen wordLen:2; // Word length to be transmitted or received - XrStopBit stopBits:1; // Length of stop bit - XrParity parity:3; // Parity format - bool txBreak:1; // Causes a break condition to be transmitted - bool divisorEn:1; // Baud rate generator divisor (DLL, DLM and DLD) + XrWordLen wordLen : 2; // Word length to be transmitted or received + XrStopBit stopBits : 1; // Length of stop bit + XrParity parity : 3; // Parity format + bool txBreak : 1; // Causes a break condition to be transmitted + bool divisorEn : 1; // Baud rate generator divisor (DLL, DLM and DLD) } XrRegLcr; typedef struct PACKED XrRegDld { - uint8_t fracDivisor:4; - bool mode8x:1; - bool mode4x:1; - uint8_t reserved:2; + uint8_t fracDivisor : 4; + bool mode8x : 1; + bool mode4x : 1; + uint8_t reserved : 2; } XrRegDld; typedef struct PACKED XrRegEfr { - uint8_t swFlowCtl:4; - bool enhancedFunc:1; - bool specialCharDetect:1; - bool autoRts:1; - bool autoCts:1; + uint8_t swFlowCtl : 4; + bool enhancedFunc : 1; + bool specialCharDetect : 1; + bool autoRts : 1; + bool autoCts : 1; } XrRegEfr; typedef uint8_t XrRegDlm; @@ -143,69 +143,69 @@ typedef enum XrClkPrescaler { } XrClkPrescaler; typedef struct PACKED XrRegMcr { - bool dtr:1; - bool rts:1; - bool op1:1; - bool op2:1; - bool loopbackEn:1; - bool xonAnyEn:1; - bool irModeEn:1; - XrClkPrescaler clkPrescaler:1; + bool dtr : 1; + bool rts : 1; + bool op1 : 1; + bool op2 : 1; + bool loopbackEn : 1; + bool xonAnyEn : 1; + bool irModeEn : 1; + XrClkPrescaler clkPrescaler : 1; } XrRegMcr; typedef enum RxTriggerLevel { - RX_TRIGGER_LEVEL_8 = 0x00, + RX_TRIGGER_LEVEL_8 = 0x00, RX_TRIGGER_LEVEL_16 = 0x01, RX_TRIGGER_LEVEL_56 = 0x02, RX_TRIGGER_LEVEL_60 = 0x03, } RxTriggerLevel; typedef enum TxTriggerLevel { - TX_TRIGGER_LEVEL_8 = 0x00, + TX_TRIGGER_LEVEL_8 = 0x00, TX_TRIGGER_LEVEL_16 = 0x01, TX_TRIGGER_LEVEL_32 = 0x02, TX_TRIGGER_LEVEL_56 = 0x03, } TxTriggerLevel; typedef struct PACKED XrRegFcr { - bool fifoEn:1; - bool rxRst:1; - bool txRst:1; - bool reserved:1; - TxTriggerLevel txTrigger:2; /*!< Overwridden if TLR value set */ - RxTriggerLevel rxTrigger:2; /*!< Overwridden if TLR value set */ + bool fifoEn : 1; + bool rxRst : 1; + bool txRst : 1; + bool reserved : 1; + TxTriggerLevel txTrigger : 2; /*!< Overwridden if TLR value set */ + RxTriggerLevel rxTrigger : 2; /*!< Overwridden if TLR value set */ } XrRegFcr; /* Transmission Control Register (TCR) */ typedef struct PACKED XrRegTcr { - uint8_t rxHaltLvl:4; /*!< x4, 0-60 - RTS goes high after this level */ - uint8_t rxResumeLvl:4; /*!< x4, 0-60 - RTS returns low below this level */ + uint8_t rxHaltLvl : 4; /*!< x4, 0-60 - RTS goes high after this level */ + uint8_t rxResumeLvl : 4; /*!< x4, 0-60 - RTS returns low below this level */ } XrRegTcr; /* Trigger Level Register (TLR) */ typedef struct PACKED XrRegTlr { - uint8_t txTrigger:4; /*!< x4, 4-60, If 0 (default), FCR value used */ - uint8_t rxTrigger:4; /*!< x4, 4-60, If 0 (default), FCR value used */ + uint8_t txTrigger : 4; /*!< x4, 4-60, If 0 (default), FCR value used */ + uint8_t rxTrigger : 4; /*!< x4, 4-60, If 0 (default), FCR value used */ } XrRegTlr; typedef struct PACKED XrRegIOCtrl { - bool ioLatch:1; - bool modemIf:1; - uint8_t res1:1; - bool uartReset:1; - uint8_t res2:4; + bool ioLatch : 1; + bool modemIf : 1; + uint8_t res1 : 1; + bool uartReset : 1; + uint8_t res2 : 4; } XrRegIOCtrl; // LCR[7] = 0 typedef struct PACKED XrRegIer { - bool rhrIntEn:1; - bool thrIntEn:1; - bool lsrIntEn:1; - bool msrIntEn:1; - bool sleepModeEn:1; //!< EFR[4] = 1 to modify - bool xoffIntEn:1; //!< EFR[4] = 1 to modify - bool rtsIntEn:1; //!< EFR[4] = 1 to modify - bool ctsIntEn:1; //!< EFR[4] = 1 to modify + bool rhrIntEn : 1; + bool thrIntEn : 1; + bool lsrIntEn : 1; + bool msrIntEn : 1; + bool sleepModeEn : 1; //!< EFR[4] = 1 to modify + bool xoffIntEn : 1; //!< EFR[4] = 1 to modify + bool rtsIntEn : 1; //!< EFR[4] = 1 to modify + bool ctsIntEn : 1; //!< EFR[4] = 1 to modify } XrRegIer; // Note: in order of priority @@ -223,31 +223,31 @@ typedef enum ISR_SRC { } ISR_SRC; typedef struct PACKED XrRegIsr { - ISR_SRC source:6; - uint8_t fifo_en:2; // TODO: not sure why there's 2...datasheet doesn't elaborate - possibly TX vs RX, but it doesn't say + ISR_SRC source : 6; + uint8_t fifo_en : 2; // TODO: not sure why there's 2...datasheet doesn't elaborate - possibly TX vs RX, but it doesn't say } XrRegIsr; // General struct for configuring gpio pins typedef struct PACKED XrGpioPins { union { struct PACKED { - bool p0:1; - bool p2:1; - bool p3:1; + bool p0 : 1; + bool p2 : 1; + bool p3 : 1; - bool p4:1; - bool p5:1; - bool p6:1; - bool p7:1; + bool p4 : 1; + bool p5 : 1; + bool p6 : 1; + bool p7 : 1; } gpio; struct PACKED { - char res:4; + char res : 4; - bool dsr:1; - bool dtr:1; - bool cd:1; - bool ri:1; + bool dsr : 1; + bool dtr : 1; + bool cd : 1; + bool ri : 1; } modem; }; } XrGpioPins; diff --git a/firmware/ec/src/devices/i2c/threaded_int.c b/firmware/ec/src/devices/i2c/threaded_int.c index c5ce2746de..966e2ceb2b 100644 --- a/firmware/ec/src/devices/i2c/threaded_int.c +++ b/firmware/ec/src/devices/i2c/threaded_int.c @@ -16,8 +16,8 @@ #include // Threaded interrupt info -#define TI_TASKSTACKSIZE 1024 -#define TI_TASKPRIORITY 6 +#define TI_TASKSTACKSIZE 1024 +#define TI_TASKPRIORITY 6 // This number is fairly superficial - just used to keep track of the // various tasks, it can be increased without much overhead @@ -25,14 +25,15 @@ // Config simply to map context to our GPIO interrupts typedef struct InterruptConfig { - Semaphore_Handle sem; //!< Semaphore to wake up INT thread - ThreadedInt_Callback cb; //!< Callback to run when interrupt occurs - void *context; //!< Pointer to pass to cb function + Semaphore_Handle sem; //!< Semaphore to wake up INT thread + ThreadedInt_Callback cb; //!< Callback to run when interrupt occurs + void *context; //!< Pointer to pass to cb function } InterruptConfig; static InterruptConfig s_intConfigs[MAX_DEVICES] = {}; static int s_numDevices = 0; -static void gpioIntFxn(const OcGpio_Pin *pin, void *context) { +static void gpioIntFxn(const OcGpio_Pin *pin, void *context) +{ Semaphore_Handle sem = context; // TODO: this should probably be an assert @@ -44,7 +45,8 @@ static void gpioIntFxn(const OcGpio_Pin *pin, void *context) { Semaphore_post(sem); } -static void ThreadedInt_Task(UArg arg0, UArg arg1) { +static void ThreadedInt_Task(UArg arg0, UArg arg1) +{ InterruptConfig *cfg = (InterruptConfig *)arg0; if (!cfg) { DEBUG("Threaded Int started without configuration???\n"); @@ -60,7 +62,8 @@ static void ThreadedInt_Task(UArg arg0, UArg arg1) { // TODO: this function isn't thread safe at the moment void ThreadedInt_Init(OcGpio_Pin *irqPin, ThreadedInt_Callback cb, - void *context) { + void *context) +{ // Build up table of all devices for interrupt handling. This is an ok // workaround for TI RTOS GPIO interrupts for now (only using one device) if (s_numDevices >= MAX_DEVICES) { @@ -75,7 +78,7 @@ void ThreadedInt_Init(OcGpio_Pin *irqPin, ThreadedInt_Callback cb, return; } - s_intConfigs[devNum] = (InterruptConfig) { + s_intConfigs[devNum] = (InterruptConfig){ .sem = sem, .cb = cb, .context = context, @@ -103,4 +106,3 @@ void ThreadedInt_Init(OcGpio_Pin *irqPin, ThreadedInt_Callback cb, OcGpio_setCallback(irqPin, gpioIntFxn, sem); OcGpio_enableInt(irqPin); } - diff --git a/firmware/ec/src/devices/i2cbus.c b/firmware/ec/src/devices/i2cbus.c index 96b5e5b9be..0e8232602a 100644 --- a/firmware/ec/src/devices/i2cbus.c +++ b/firmware/ec/src/devices/i2cbus.c @@ -67,7 +67,7 @@ I2C_Handle i2c_open_bus(unsigned int index) ** RETURN TYPE : None ** *****************************************************************************/ -void i2c_close_bus(I2C_Handle* i2cHandle) +void i2c_close_bus(I2C_Handle *i2cHandle) { I2C_close(*i2cHandle); i2cHandle = NULL; @@ -83,17 +83,15 @@ void i2c_close_bus(I2C_Handle* i2cHandle) ** RETURN TYPE : Success or failure ** *****************************************************************************/ -ReturnStatus i2c_reg_write( I2C_Handle i2cHandle, - uint8_t deviceAddress, - uint8_t regAddress, - uint16_t value, - uint8_t numofBytes) +ReturnStatus i2c_reg_write(I2C_Handle i2cHandle, uint8_t deviceAddress, + uint8_t regAddress, uint16_t value, + uint8_t numofBytes) { ReturnStatus status = RETURN_OK; uint8_t txBuffer[3]; I2C_Transaction i2cTransaction; txBuffer[0] = regAddress; - memcpy(&txBuffer[1],&value,numofBytes); + memcpy(&txBuffer[1], &value, numofBytes); i2cTransaction.slaveAddress = deviceAddress; i2cTransaction.writeBuf = txBuffer; i2cTransaction.writeCount = numofBytes + 1; @@ -104,8 +102,9 @@ ReturnStatus i2c_reg_write( I2C_Handle i2cHandle, // deviceAddress, regAddress, value); status = RETURN_OK; } else { - LOGGER_ERROR("I2CBUS:ERROR:: I2C write failed for for device: 0x%x reg Addr: 0x%x value: 0x%x.\n", - deviceAddress, regAddress, value); + LOGGER_ERROR( + "I2CBUS:ERROR:: I2C write failed for for device: 0x%x reg Addr: 0x%x value: 0x%x.\n", + deviceAddress, regAddress, value); status = RETURN_NOTOK; } return status; @@ -121,11 +120,9 @@ ReturnStatus i2c_reg_write( I2C_Handle i2cHandle, ** RETURN TYPE : Success or failure ** *****************************************************************************/ -ReturnStatus i2c_reg_read( I2C_Handle i2cHandle, - uint8_t deviceAddress, - uint8_t regAddress, - uint16_t *value, - uint8_t numofBytes) +ReturnStatus i2c_reg_read(I2C_Handle i2cHandle, uint8_t deviceAddress, + uint8_t regAddress, uint16_t *value, + uint8_t numofBytes) { ReturnStatus status = RETURN_OK; uint8_t txBuffer[1] = { 0 }; @@ -138,13 +135,14 @@ ReturnStatus i2c_reg_read( I2C_Handle i2cHandle, i2cTransaction.readBuf = rxBuffer; i2cTransaction.readCount = numofBytes; if (I2C_transfer(i2cHandle, &i2cTransaction)) { - memcpy(value,rxBuffer,numofBytes); + memcpy(value, rxBuffer, numofBytes); //LOGGER_DEBUG("I2CBUS:INFO:: I2C read success for device: 0x%x reg Addr: 0x%x value : 0x%x.\n", // deviceAddress, regAddress, *value); status = RETURN_OK; } else { - LOGGER_ERROR("I2CBUS:ERROR:: I2C read failed for for device: 0x%x reg Addr: 0x%x.\n", - deviceAddress, regAddress); + LOGGER_ERROR( + "I2CBUS:ERROR:: I2C read failed for for device: 0x%x reg Addr: 0x%x.\n", + deviceAddress, regAddress); status = RETURN_NOTOK; } return status; diff --git a/firmware/ec/src/devices/ina226.c b/firmware/ec/src/devices/ina226.c index c1b8f6463d..a0ff69eb88 100644 --- a/firmware/ec/src/devices/ina226.c +++ b/firmware/ec/src/devices/ina226.c @@ -20,21 +20,21 @@ /***************************************************************************** * REGISTER DEFINITIONS *****************************************************************************/ -#define INA_CONFIGURATION_REG 0x00 -#define INA_SHUNTVOLTAGE_REG 0x01 -#define INA_BUSVOLTAGE_REG 0x02 -#define INA_POWER_REG 0x03 -#define INA_CURRENT_REG 0x04 -#define INA_CALIBRATION_REG 0x05 -#define INA_MASKENABLE_REG 0x06 -#define INA_ALERTLIMIT_REG 0x07 -#define INA_MANUFACTUREID_REG 0xFE -#define INA_DIEID_REG 0xFF +#define INA_CONFIGURATION_REG 0x00 +#define INA_SHUNTVOLTAGE_REG 0x01 +#define INA_BUSVOLTAGE_REG 0x02 +#define INA_POWER_REG 0x03 +#define INA_CURRENT_REG 0x04 +#define INA_CALIBRATION_REG 0x05 +#define INA_MASKENABLE_REG 0x06 +#define INA_ALERTLIMIT_REG 0x07 +#define INA_MANUFACTUREID_REG 0xFE +#define INA_DIEID_REG 0xFF /*INA226 Device Info */ -#define INA226_MANFACTURE_ID 0x5449 -#define INA226_DEVICE_ID 0x2260 -#define INA226_DEV_VERSION 0x00 +#define INA226_MANFACTURE_ID 0x5449 +#define INA226_DEVICE_ID 0x2260 +#define INA226_DEV_VERSION 0x00 /* Configuration Register Bits */ #define INA_CFG_RESET (1 << 15) @@ -47,23 +47,25 @@ * Calculate Shunt Voltage Alert Limit Register Value * ui16rfINARegValue = (ui16rfINARegValue * 2048)/INA226_CALIBRATION_REG_VALUE; */ -#define CURRENT_TO_REG(x) ((2048 *(x/INA226_CURRENT_LSB)/INA226_CAL_REG_VALUE)) -#define REG_TO_CURRENT(y) ((y * INA226_CURRENT_LSB * INA226_CAL_REG_VALUE)/2048) +#define CURRENT_TO_REG(x) \ + ((2048 * (x / INA226_CURRENT_LSB) / INA226_CAL_REG_VALUE)) +#define REG_TO_CURRENT(y) \ + ((y * INA226_CURRENT_LSB * INA226_CAL_REG_VALUE) / 2048) /***************************************************************************** * CONSTANTS DEFINITIONS *****************************************************************************/ /* INA226 LSB Values */ -#define INA226_VSHUNT_LSB 2.5 /* 2.5uV or 2500nV (uV default) */ -#define INA226_VBUS_LSB 1.25 /* 1.25mV or 1250uV (mV default) */ -#define INA226_CURRENT_LSB 0.1 /* 0.100mA 0r 100uA (mA default) */ -#define INA226_POWER_LSB 2.5 /* 2.5mW or 2500uW (mW default) */ +#define INA226_VSHUNT_LSB 2.5 /* 2.5uV or 2500nV (uV default) */ +#define INA226_VBUS_LSB 1.25 /* 1.25mV or 1250uV (mV default) */ +#define INA226_CURRENT_LSB 0.1 /* 0.100mA 0r 100uA (mA default) */ +#define INA226_POWER_LSB 2.5 /* 2.5mW or 2500uW (mW default) */ /* Configure the Configuration register with Number of Samples and Conversion * Time for Shunt and Bus Voltage. * Min(Default):0x4127; Max: 0x4FFF; Average: 0x476F */ -#define INA226_CONFIG_REG_VALUE 0x476F +#define INA226_CONFIG_REG_VALUE 0x476F /* Configure Calibration register with shunt resistor value and current LSB. Current_LSB = Maximum Expected Current/2^15 @@ -71,9 +73,9 @@ Calibration Register(CAL) = 0.00512/(Current_LSB*RSHUNT) CAL = 0.00512/(100uA*2mOhm) = = 25600 = 0x6400.(RSHUNT = 2mohm) */ -#define INA226_CAL_REG_VALUE 0x6400 +#define INA226_CAL_REG_VALUE 0x6400 -#define INA226_MASKEN_REG_VALUE 0x8001 +#define INA226_MASKEN_REG_VALUE 0x8001 /***************************************************************************** ** FUNCTION NAME : read_ina_reg @@ -86,16 +88,15 @@ ** RETURN TYPE : Success or failure ** *****************************************************************************/ -static ReturnStatus read_ina_reg(const INA226_Dev *dev, - uint8_t regAddress, +static ReturnStatus read_ina_reg(const INA226_Dev *dev, uint8_t regAddress, uint16_t *regValue) { ReturnStatus status = RETURN_NOTOK; I2C_Handle inaHandle = i2c_get_handle(dev->cfg.dev.bus); if (!inaHandle) { LOGGER_ERROR("INASENSOR:ERROR:: Failed to get I2C Bus for INA sensor " - "0x%x on bus 0x%x.\n", dev->cfg.dev.slave_addr, - dev->cfg.dev.bus); + "0x%x on bus 0x%x.\n", + dev->cfg.dev.slave_addr, dev->cfg.dev.bus); } else { status = i2c_reg_read(inaHandle, dev->cfg.dev.slave_addr, regAddress, regValue, 2); @@ -115,16 +116,15 @@ static ReturnStatus read_ina_reg(const INA226_Dev *dev, ** RETURN TYPE : Success or failure ** *****************************************************************************/ -static ReturnStatus write_ina_reg(const INA226_Dev *dev, - uint8_t regAddress, +static ReturnStatus write_ina_reg(const INA226_Dev *dev, uint8_t regAddress, uint16_t regValue) { ReturnStatus status = RETURN_NOTOK; I2C_Handle inaHandle = i2c_get_handle(dev->cfg.dev.bus); if (!inaHandle) { LOGGER_ERROR("INASENSOR:ERROR:: Failed to get I2C Bus for INA sensor " - "0x%x on bus 0x%x.\n", dev->cfg.dev.slave_addr, - dev->cfg.dev.bus); + "0x%x on bus 0x%x.\n", + dev->cfg.dev.slave_addr, dev->cfg.dev.bus); } else { regValue = htobe16(regValue); status = i2c_reg_write(inaHandle, dev->cfg.dev.slave_addr, regAddress, @@ -204,7 +204,7 @@ static ReturnStatus _set_cal_reg(INA226_Dev *dev, uint16_t regValue) ** RETURN TYPE : Success or failure ** *****************************************************************************/ -ReturnStatus ina226_readCurrentLim(INA226_Dev *dev, uint16_t* currLimit) +ReturnStatus ina226_readCurrentLim(INA226_Dev *dev, uint16_t *currLimit) { uint16_t regValue = 0x0000; ReturnStatus status = read_ina_reg(dev, INA_ALERTLIMIT_REG, ®Value); @@ -243,7 +243,7 @@ ReturnStatus ina226_setCurrentLim(INA226_Dev *dev, uint16_t currLimit) ** RETURN TYPE : Success or failure ** *****************************************************************************/ -static ReturnStatus _read_alert_reg(INA226_Dev *dev, uint16_t* regValue) +static ReturnStatus _read_alert_reg(INA226_Dev *dev, uint16_t *regValue) { return read_ina_reg(dev, INA_MASKENABLE_REG, regValue); } @@ -273,8 +273,7 @@ static ReturnStatus _enable_alert(INA226_Dev *dev, uint16_t regValue) ** RETURN TYPE : Success or failure ** *****************************************************************************/ -ReturnStatus ina226_readBusVoltage(INA226_Dev *dev, - uint16_t* busVoltValue) +ReturnStatus ina226_readBusVoltage(INA226_Dev *dev, uint16_t *busVoltValue) { uint16_t regValue; ReturnStatus status = read_ina_reg(dev, INA_BUSVOLTAGE_REG, ®Value); @@ -298,8 +297,7 @@ ReturnStatus ina226_readBusVoltage(INA226_Dev *dev, ** RETURN TYPE : Success or failure ** *****************************************************************************/ -ReturnStatus ina226_readShuntVoltage(INA226_Dev *dev, - uint16_t* shuntVoltValue) +ReturnStatus ina226_readShuntVoltage(INA226_Dev *dev, uint16_t *shuntVoltValue) { uint16_t regValue; ReturnStatus status = read_ina_reg(dev, INA_SHUNTVOLTAGE_REG, ®Value); @@ -308,7 +306,8 @@ ReturnStatus ina226_readShuntVoltage(INA226_Dev *dev, *shuntVoltValue = regValue * INA226_VSHUNT_LSB; LOGGER_DEBUG("INASENSOR:INFO:: INA sensor 0x%x on bus 0x%x is " "reporting shunt voltage value of %d uV.\n", - dev->cfg.dev.slave_addr, dev->cfg.dev.bus, *shuntVoltValue); + dev->cfg.dev.slave_addr, dev->cfg.dev.bus, + *shuntVoltValue); } return status; } @@ -323,7 +322,7 @@ ReturnStatus ina226_readShuntVoltage(INA226_Dev *dev, ** RETURN TYPE : Success or failure ** *****************************************************************************/ -ReturnStatus ina226_readCurrent(INA226_Dev *dev, uint16_t* currValue) +ReturnStatus ina226_readCurrent(INA226_Dev *dev, uint16_t *currValue) { uint16_t regValue; ReturnStatus status = read_ina_reg(dev, INA_CURRENT_REG, ®Value); @@ -347,7 +346,7 @@ ReturnStatus ina226_readCurrent(INA226_Dev *dev, uint16_t* currValue) ** RETURN TYPE : Success or failure ** *****************************************************************************/ -ReturnStatus ina226_readPower(INA226_Dev *dev, uint16_t* powValue) +ReturnStatus ina226_readPower(INA226_Dev *dev, uint16_t *powValue) { uint16_t regValue; ReturnStatus status = read_ina_reg(dev, INA_POWER_REG, ®Value); @@ -363,7 +362,8 @@ ReturnStatus ina226_readPower(INA226_Dev *dev, uint16_t* powValue) /***************************************************************************** * Internal IRQ handler - reads in triggered interrupts and dispatches CBs *****************************************************************************/ -static void _ina226_isr(void *context) { +static void _ina226_isr(void *context) +{ INA226_Dev *dev = context; /* Read the alert mask register (will clear the alert bit if set) */ @@ -404,7 +404,7 @@ static void _ina226_isr(void *context) { if (alert_mask & INA_MSK_SOL) { if (dev->obj.evt_to_monitor == INA226_EVT_COL || - dev->obj.evt_to_monitor == INA226_EVT_CUL) { + dev->obj.evt_to_monitor == INA226_EVT_CUL) { if (ina226_readCurrent(dev, &value) != RETURN_OK) { value = UINT16_MAX; } @@ -419,7 +419,7 @@ static void _ina226_isr(void *context) { new_mask |= INA_MSK_SUL; } else if (alert_mask & INA_MSK_SUL) { if (dev->obj.evt_to_monitor == INA226_EVT_CUL || - dev->obj.evt_to_monitor == INA226_EVT_COL) { + dev->obj.evt_to_monitor == INA226_EVT_COL) { if (ina226_readCurrent(dev, &value) != RETURN_OK) { value = UINT16_MAX; } @@ -502,13 +502,14 @@ ReturnStatus ina226_init(INA226_Dev *dev) } /* Make sure we're talking to the right device */ -// if (ina226_probe(dev) != POST_DEV_FOUND) { -// return RETURN_NOTOK; -// } + // if (ina226_probe(dev) != POST_DEV_FOUND) { + // return RETURN_NOTOK; + // } if (dev->cfg.pin_alert) { const uint32_t pin_evt_cfg = OCGPIO_CFG_INPUT | OCGPIO_CFG_INT_FALLING; - if (OcGpio_configure(dev->cfg.pin_alert, pin_evt_cfg) < OCGPIO_SUCCESS) { + if (OcGpio_configure(dev->cfg.pin_alert, pin_evt_cfg) < + OCGPIO_SUCCESS) { return RETURN_NOTOK; } @@ -521,7 +522,8 @@ ReturnStatus ina226_init(INA226_Dev *dev) /***************************************************************************** *****************************************************************************/ void ina226_setAlertHandler(INA226_Dev *dev, INA226_CallbackFn alert_cb, - void *cb_context) { + void *cb_context) +{ dev->obj.alert_cb = alert_cb; dev->obj.cb_context = cb_context; } @@ -575,6 +577,7 @@ ePostCode ina226_probe(INA226_Dev *dev, POSTData *postData) if (manfId != INA226_MANFACTURE_ID) { return POST_DEV_ID_MISMATCH; } - post_update_POSTData(postData, dev->cfg.dev.bus, dev->cfg.dev.slave_addr,manfId, devId); + post_update_POSTData(postData, dev->cfg.dev.bus, dev->cfg.dev.slave_addr, + manfId, devId); return POST_DEV_FOUND; } diff --git a/firmware/ec/src/devices/led.c b/firmware/ec/src/devices/led.c index 62be616e2d..e307d9ce1c 100644 --- a/firmware/ec/src/devices/led.c +++ b/firmware/ec/src/devices/led.c @@ -63,106 +63,118 @@ IO14 & IO15 = 1(Not connected IOs; Reg Data should be 11xxxxxx). */ -static const hciLedData ledData[HCI_LED_TOTAL_NOS] = { - [HCI_LED_1] = { - .ioexpDev = HCI_LED_DRIVER_LEFT, - .ledReg = SX1509_REG_A, - .ledGreen = ~SX1509_IO_PIN_5, // IO5 - .ledRed = ~SX1509_IO_PIN_4, // IO4 - .ledOff = SX1509_IO_PIN_5 | SX1509_IO_PIN_4, - }, - [HCI_LED_2] = { - .ioexpDev = HCI_LED_DRIVER_LEFT, - .ledReg = SX1509_REG_A, - .ledGreen = ~SX1509_IO_PIN_3, // IO3 - .ledRed = ~SX1509_IO_PIN_2, // IO2 - .ledOff = SX1509_IO_PIN_3 | SX1509_IO_PIN_2, - }, - [HCI_LED_3] = { - .ioexpDev = HCI_LED_DRIVER_LEFT, - .ledReg = SX1509_REG_B, - .ledGreen = ~SX1509_IO_PIN_13, // IO13 - .ledRed = ~SX1509_IO_PIN_12, // IO12 - .ledOff = SX1509_IO_PIN_13 | SX1509_IO_PIN_12, - }, - [HCI_LED_4] = { - .ioexpDev = HCI_LED_DRIVER_LEFT, - .ledReg = SX1509_REG_A, - .ledGreen = ~SX1509_IO_PIN_1, // IO1 - .ledRed = ~SX1509_IO_PIN_0, // IO0 - .ledOff = SX1509_IO_PIN_1 | SX1509_IO_PIN_0, - }, - [HCI_LED_5] = { - .ioexpDev = HCI_LED_DRIVER_LEFT, - .ledReg = SX1509_REG_A, - .ledGreen = ~SX1509_IO_PIN_7, // IO7 - .ledRed = ~SX1509_IO_PIN_6, // IO6 - .ledOff = SX1509_IO_PIN_7 | SX1509_IO_PIN_6, - }, - [HCI_LED_6] = { - .ioexpDev = HCI_LED_DRIVER_LEFT, - .ledReg = SX1509_REG_B, - .ledGreen = ~SX1509_IO_PIN_9, // IO9 - .ledRed = ~SX1509_IO_PIN_8, // IO8 - .ledOff = SX1509_IO_PIN_9 | SX1509_IO_PIN_8, - }, - [HCI_LED_7] = { - .ioexpDev = HCI_LED_DRIVER_LEFT, - .ledReg = SX1509_REG_B, - .ledGreen = ~SX1509_IO_PIN_11, // IO11 - .ledRed = ~SX1509_IO_PIN_10, // I010 - .ledOff = SX1509_IO_PIN_11 | SX1509_IO_PIN_10, - }, - [HCI_LED_8] = { - .ioexpDev = HCI_LED_DRIVER_RIGHT, - .ledReg = SX1509_REG_A, - .ledGreen = ~SX1509_IO_PIN_5, // IO5 - .ledRed = ~SX1509_IO_PIN_4, // IO4 - .ledOff = SX1509_IO_PIN_5 | SX1509_IO_PIN_4, - }, - [HCI_LED_9] = { - .ioexpDev = HCI_LED_DRIVER_RIGHT, - .ledReg = SX1509_REG_A, - .ledGreen = ~SX1509_IO_PIN_3, // IO3 - .ledRed = ~SX1509_IO_PIN_2, // IO2 - .ledOff = SX1509_IO_PIN_3 | SX1509_IO_PIN_2, - }, - [HCI_LED_10] = { - .ioexpDev = HCI_LED_DRIVER_RIGHT, - .ledReg = SX1509_REG_A, - .ledGreen = ~SX1509_IO_PIN_1, // IO1 - .ledRed = ~SX1509_IO_PIN_0, // IO0 - .ledOff = SX1509_IO_PIN_1 | SX1509_IO_PIN_0, - }, - [HCI_LED_11] = { - .ioexpDev = HCI_LED_DRIVER_RIGHT, - .ledReg = SX1509_REG_A, - .ledGreen = ~SX1509_IO_PIN_7, // IO7 - .ledRed = ~SX1509_IO_PIN_6, // IO6 - .ledOff = SX1509_IO_PIN_7 | SX1509_IO_PIN_6, - }, - [HCI_LED_12] = { - .ioexpDev = HCI_LED_DRIVER_RIGHT, - .ledReg = SX1509_REG_B, - .ledGreen = ~SX1509_IO_PIN_9, // IO9 - .ledRed = ~SX1509_IO_PIN_8, // IO8 - .ledOff = SX1509_IO_PIN_9 | SX1509_IO_PIN_8, - }, - [HCI_LED_13] = { - .ioexpDev = HCI_LED_DRIVER_RIGHT, - .ledReg = SX1509_REG_B, - .ledGreen = ~SX1509_IO_PIN_11, // IO11 - .ledRed = ~SX1509_IO_PIN_10, // IO10 - .ledOff = SX1509_IO_PIN_11 | SX1509_IO_PIN_10, - }, - [HCI_LED_14] = { - .ioexpDev = HCI_LED_DRIVER_RIGHT, - .ledReg = SX1509_REG_B, - .ledGreen = ~SX1509_IO_PIN_13, // IO13 - .ledRed = ~SX1509_IO_PIN_12, // IO12 - .ledOff = SX1509_IO_PIN_13 | SX1509_IO_PIN_12, - } -}; +static const hciLedData ledData[HCI_LED_TOTAL_NOS] = + { [HCI_LED_1] = + { + .ioexpDev = HCI_LED_DRIVER_LEFT, + .ledReg = SX1509_REG_A, + .ledGreen = ~SX1509_IO_PIN_5, // IO5 + .ledRed = ~SX1509_IO_PIN_4, // IO4 + .ledOff = SX1509_IO_PIN_5 | SX1509_IO_PIN_4, + }, + [HCI_LED_2] = + { + .ioexpDev = HCI_LED_DRIVER_LEFT, + .ledReg = SX1509_REG_A, + .ledGreen = ~SX1509_IO_PIN_3, // IO3 + .ledRed = ~SX1509_IO_PIN_2, // IO2 + .ledOff = SX1509_IO_PIN_3 | SX1509_IO_PIN_2, + }, + [HCI_LED_3] = + { + .ioexpDev = HCI_LED_DRIVER_LEFT, + .ledReg = SX1509_REG_B, + .ledGreen = ~SX1509_IO_PIN_13, // IO13 + .ledRed = ~SX1509_IO_PIN_12, // IO12 + .ledOff = SX1509_IO_PIN_13 | SX1509_IO_PIN_12, + }, + [HCI_LED_4] = + { + .ioexpDev = HCI_LED_DRIVER_LEFT, + .ledReg = SX1509_REG_A, + .ledGreen = ~SX1509_IO_PIN_1, // IO1 + .ledRed = ~SX1509_IO_PIN_0, // IO0 + .ledOff = SX1509_IO_PIN_1 | SX1509_IO_PIN_0, + }, + [HCI_LED_5] = + { + .ioexpDev = HCI_LED_DRIVER_LEFT, + .ledReg = SX1509_REG_A, + .ledGreen = ~SX1509_IO_PIN_7, // IO7 + .ledRed = ~SX1509_IO_PIN_6, // IO6 + .ledOff = SX1509_IO_PIN_7 | SX1509_IO_PIN_6, + }, + [HCI_LED_6] = + { + .ioexpDev = HCI_LED_DRIVER_LEFT, + .ledReg = SX1509_REG_B, + .ledGreen = ~SX1509_IO_PIN_9, // IO9 + .ledRed = ~SX1509_IO_PIN_8, // IO8 + .ledOff = SX1509_IO_PIN_9 | SX1509_IO_PIN_8, + }, + [HCI_LED_7] = + { + .ioexpDev = HCI_LED_DRIVER_LEFT, + .ledReg = SX1509_REG_B, + .ledGreen = ~SX1509_IO_PIN_11, // IO11 + .ledRed = ~SX1509_IO_PIN_10, // I010 + .ledOff = SX1509_IO_PIN_11 | SX1509_IO_PIN_10, + }, + [HCI_LED_8] = + { + .ioexpDev = HCI_LED_DRIVER_RIGHT, + .ledReg = SX1509_REG_A, + .ledGreen = ~SX1509_IO_PIN_5, // IO5 + .ledRed = ~SX1509_IO_PIN_4, // IO4 + .ledOff = SX1509_IO_PIN_5 | SX1509_IO_PIN_4, + }, + [HCI_LED_9] = + { + .ioexpDev = HCI_LED_DRIVER_RIGHT, + .ledReg = SX1509_REG_A, + .ledGreen = ~SX1509_IO_PIN_3, // IO3 + .ledRed = ~SX1509_IO_PIN_2, // IO2 + .ledOff = SX1509_IO_PIN_3 | SX1509_IO_PIN_2, + }, + [HCI_LED_10] = + { + .ioexpDev = HCI_LED_DRIVER_RIGHT, + .ledReg = SX1509_REG_A, + .ledGreen = ~SX1509_IO_PIN_1, // IO1 + .ledRed = ~SX1509_IO_PIN_0, // IO0 + .ledOff = SX1509_IO_PIN_1 | SX1509_IO_PIN_0, + }, + [HCI_LED_11] = + { + .ioexpDev = HCI_LED_DRIVER_RIGHT, + .ledReg = SX1509_REG_A, + .ledGreen = ~SX1509_IO_PIN_7, // IO7 + .ledRed = ~SX1509_IO_PIN_6, // IO6 + .ledOff = SX1509_IO_PIN_7 | SX1509_IO_PIN_6, + }, + [HCI_LED_12] = + { + .ioexpDev = HCI_LED_DRIVER_RIGHT, + .ledReg = SX1509_REG_B, + .ledGreen = ~SX1509_IO_PIN_9, // IO9 + .ledRed = ~SX1509_IO_PIN_8, // IO8 + .ledOff = SX1509_IO_PIN_9 | SX1509_IO_PIN_8, + }, + [HCI_LED_13] = + { + .ioexpDev = HCI_LED_DRIVER_RIGHT, + .ledReg = SX1509_REG_B, + .ledGreen = ~SX1509_IO_PIN_11, // IO11 + .ledRed = ~SX1509_IO_PIN_10, // IO10 + .ledOff = SX1509_IO_PIN_11 | SX1509_IO_PIN_10, + }, + [HCI_LED_14] = { + .ioexpDev = HCI_LED_DRIVER_RIGHT, + .ledReg = SX1509_REG_B, + .ledGreen = ~SX1509_IO_PIN_13, // IO13 + .ledRed = ~SX1509_IO_PIN_12, // IO12 + .ledOff = SX1509_IO_PIN_13 | SX1509_IO_PIN_12, + } }; /***************************************************************************** ** FUNCTION NAME : hci_led_turnon_green @@ -319,17 +331,15 @@ ReturnStatus hci_led_system_boot(const HciLedCfg *driver) } /* Turn on the LEDs one by one from Left to Right of LED Board */ for (index = 0; index < HCI_LED_TOTAL_NOS; index++) { - status = ioexp_led_get_data( - &driver->sx1509_dev[ledData[index].ioexpDev], - ledData[index].ledReg, - ®Value); + status = + ioexp_led_get_data(&driver->sx1509_dev[ledData[index].ioexpDev], + ledData[index].ledReg, ®Value); regValue &= ledData[index].ledGreen; - status = ioexp_led_set_data( - &driver->sx1509_dev[ledData[index].ioexpDev], - ledData[index].ledReg, regValue, - 0); + status = + ioexp_led_set_data(&driver->sx1509_dev[ledData[index].ioexpDev], + ledData[index].ledReg, regValue, 0); if (status != RETURN_OK) { break; } @@ -424,7 +434,8 @@ ReturnStatus hci_led_radio_failure(const HciLedCfg *driver) status = hci_led_turnoff_all(driver); if (status == RETURN_OK) { /* Turn On Left side Red LEDs */ - status = ioexp_led_set_data(HCI_LED_DRIVER_LEFT, SX1509_REG_AB, 0xAA, 0xAA); + status = ioexp_led_set_data(HCI_LED_DRIVER_LEFT, SX1509_REG_AB, 0xAA, + 0xAA); } return status; @@ -485,7 +496,7 @@ ReturnStatus led_init(const HciLedCfg *driver) /* Initilaize Left and Right LED driver SX1509 to turn on LED */ for (index = 0; index < HCI_LED_DRIVER_COUNT; index++) { - DEBUG("HCILED:INFO:: Initilaizing LED driver SX1509 0x%x.\n",\ + DEBUG("HCILED:INFO:: Initilaizing LED driver SX1509 0x%x.\n", driver->sx1509_dev[index].slave_addr); /* Do software reset for LED driver */ @@ -551,10 +562,11 @@ ReturnStatus led_init(const HciLedCfg *driver) return status; } -void led_configure(HciLedCfg* driver) { +void led_configure(HciLedCfg *driver) +{ /* Initialize IO pins */ - OcGpio_configure(&driver->pin_ec_gpio, OCGPIO_CFG_OUTPUT | - OCGPIO_CFG_OUT_HIGH); + OcGpio_configure(&driver->pin_ec_gpio, + OCGPIO_CFG_OUTPUT | OCGPIO_CFG_OUT_HIGH); } /***************************************************************************** ** FUNCTION NAME : led_probe @@ -567,7 +579,7 @@ void led_configure(HciLedCfg* driver) { ** RETURN TYPE : Success or Failure ** *****************************************************************************/ -ePostCode led_probe(const HciLedCfg *driver, POSTData* postData) +ePostCode led_probe(const HciLedCfg *driver, POSTData *postData) { ReturnStatus status = RETURN_NOTOK; uint8_t regValue = 0x00; @@ -585,6 +597,8 @@ ePostCode led_probe(const HciLedCfg *driver, POSTData* postData) if (status != RETURN_OK) { return POST_DEV_MISSING; } - post_update_POSTData(postData, &driver->sx1509_dev[HCI_LED_DRIVER_LEFT].bus, &driver->sx1509_dev[HCI_LED_DRIVER_LEFT].slave_addr,0xFF, 0xFF); + post_update_POSTData(postData, &driver->sx1509_dev[HCI_LED_DRIVER_LEFT].bus, + &driver->sx1509_dev[HCI_LED_DRIVER_LEFT].slave_addr, + 0xFF, 0xFF); return POST_DEV_FOUND; } diff --git a/firmware/ec/src/devices/ltc4015.c b/firmware/ec/src/devices/ltc4015.c index f519682cfa..bb5ff3fe56 100644 --- a/firmware/ec/src/devices/ltc4015.c +++ b/firmware/ec/src/devices/ltc4015.c @@ -24,14 +24,14 @@ #define WTF abort() static ReturnStatus LTC4015_reg_write(const LTC4015_Dev *dev, - uint8_t regAddress, - uint16_t regValue) + uint8_t regAddress, uint16_t regValue) { ReturnStatus status = RETURN_NOTOK; I2C_Handle battHandle = i2c_get_handle(dev->cfg.i2c_dev.bus); if (!battHandle) { LOGGER_ERROR("LTC4015:ERROR:: Failed to open I2C bus for battery " - "charge controller 0x%x.\n", dev->cfg.i2c_dev.slave_addr); + "charge controller 0x%x.\n", + dev->cfg.i2c_dev.slave_addr); } else { regValue = htole16(regValue); status = i2c_reg_write(battHandle, dev->cfg.i2c_dev.slave_addr, @@ -40,15 +40,15 @@ static ReturnStatus LTC4015_reg_write(const LTC4015_Dev *dev, return status; } -static ReturnStatus LTC4015_reg_read(const LTC4015_Dev *dev, - uint8_t regAddress, +static ReturnStatus LTC4015_reg_read(const LTC4015_Dev *dev, uint8_t regAddress, uint16_t *regValue) { ReturnStatus status = RETURN_NOTOK; I2C_Handle battHandle = i2c_get_handle(dev->cfg.i2c_dev.bus); if (!battHandle) { LOGGER_ERROR("LTC4015:ERROR:: Failed to open I2C bus for battery " - "charge controller 0x%x.\n", dev->cfg.i2c_dev.slave_addr); + "charge controller 0x%x.\n", + dev->cfg.i2c_dev.slave_addr); } else { status = i2c_reg_read(battHandle, dev->cfg.i2c_dev.slave_addr, regAddress, regValue, 2); @@ -62,8 +62,8 @@ ReturnStatus LTC4015_cfg_icharge(LTC4015_Dev *dev, { /* Maximum charge current target = (ICHARGE_TARGET + 1) * 1mV/RSNSB => ICHARGE_TARGET = (target*RSNSB/1mV)-1 */ - int icharge_target = round((max_chargeCurrent * dev->cfg.r_snsb) / 1000.0) - - 1; + int icharge_target = + round((max_chargeCurrent * dev->cfg.r_snsb) / 1000.0) - 1; icharge_target = MAX(0, icharge_target); return LTC4015_reg_write(dev, LTC4015_ICHARGE_TARGET_SUBADDR, icharge_target); @@ -74,15 +74,14 @@ ReturnStatus LTC4015_get_cfg_icharge(LTC4015_Dev *dev, { /* Maximum charge current target = (ICHARGE_TARGET + 1) * 1mV/RSNSB */ uint16_t ichargeCurrent = 0x0000; - ReturnStatus status = LTC4015_reg_read(dev, - LTC4015_ICHARGE_TARGET_SUBADDR, + ReturnStatus status = LTC4015_reg_read(dev, LTC4015_ICHARGE_TARGET_SUBADDR, &ichargeCurrent); *max_chargeCurrent = (ichargeCurrent + 1) * 1000 / dev->cfg.r_snsb; return status; } ReturnStatus LTC4015_cfg_vcharge(LTC4015_Dev *dev, - uint16_t charge_voltageLevel) // millivolts + uint16_t charge_voltageLevel) // millivolts { /* See datasheet, page 61:VCHARGE_SETTING */ const double target_v = charge_voltageLevel / (1000.0 * dev->cfg.cellcount); @@ -106,29 +105,26 @@ ReturnStatus LTC4015_cfg_vcharge(LTC4015_Dev *dev, vchargeSetting); } -ReturnStatus LTC4015_get_cfg_vcharge(LTC4015_Dev *dev, - uint16_t *charge_voltageLevel) // millivolts +ReturnStatus +LTC4015_get_cfg_vcharge(LTC4015_Dev *dev, + uint16_t *charge_voltageLevel) // millivolts { /* See datasheet, page 61:VCHARGE_SETTING */ uint16_t vchargeSetting = 0x0000; - ReturnStatus status = LTC4015_reg_read(dev, - LTC4015_VCHARGE_SETTING_SUBADDR, + ReturnStatus status = LTC4015_reg_read(dev, LTC4015_VCHARGE_SETTING_SUBADDR, &vchargeSetting); switch (dev->cfg.chem) { case LTC4015_CHEM_LEAD_ACID: - *charge_voltageLevel = - round(((vchargeSetting / 105.0) + 2.0) * - dev->cfg.cellcount * 1000.0); + *charge_voltageLevel = round(((vchargeSetting / 105.0) + 2.0) * + dev->cfg.cellcount * 1000.0); break; case LTC4015_CHEM_LI_FE_PO4: - *charge_voltageLevel = - round(((vchargeSetting / 80.0) + 3.4125) * - dev->cfg.cellcount * 1000.0); + *charge_voltageLevel = round(((vchargeSetting / 80.0) + 3.4125) * + dev->cfg.cellcount * 1000.0); break; case LTC4015_CHEM_LI_ION: - *charge_voltageLevel = - round(((vchargeSetting / 80.0) + 3.8125) * - dev->cfg.cellcount * 1000.0); + *charge_voltageLevel = round(((vchargeSetting / 80.0) + 3.8125) * + dev->cfg.cellcount * 1000.0); break; default: WTF; @@ -140,8 +136,7 @@ ReturnStatus LTC4015_get_cfg_vcharge(LTC4015_Dev *dev, } /* Convert a voltage to a valid vbat register value */ -static uint16_t voltage_to_vbat_reg(LTC4015_Dev *dev, - int16_t voltage) +static uint16_t voltage_to_vbat_reg(LTC4015_Dev *dev, int16_t voltage) { switch (dev->cfg.chem) { case LTC4015_CHEM_LEAD_ACID: @@ -166,15 +161,16 @@ ReturnStatus LTC4015_cfg_battery_voltage_low(LTC4015_Dev *dev, } /* Convert a voltage to a valid vbat register value */ -static int16_t vbat_reg_to_voltage(LTC4015_Dev *dev, - uint16_t vbat_reg) +static int16_t vbat_reg_to_voltage(LTC4015_Dev *dev, uint16_t vbat_reg) { switch (dev->cfg.chem) { case LTC4015_CHEM_LEAD_ACID: - return ((int16_t) vbat_reg / 1000.0) * (128.176 * dev->cfg.cellcount); + return ((int16_t)vbat_reg / 1000.0) * + (128.176 * dev->cfg.cellcount); case LTC4015_CHEM_LI_FE_PO4: case LTC4015_CHEM_LI_ION: - return ((int16_t) vbat_reg / 1000.0) * (192.264 * dev->cfg.cellcount); + return ((int16_t)vbat_reg / 1000.0) * + (192.264 * dev->cfg.cellcount); default: WTF; break; @@ -182,14 +178,14 @@ static int16_t vbat_reg_to_voltage(LTC4015_Dev *dev, return 0; /* Should never get here, but keeps compiler happy */ } -ReturnStatus LTC4015_get_cfg_battery_voltage_low(LTC4015_Dev *dev, - int16_t *underVolatage) //millivolts +ReturnStatus +LTC4015_get_cfg_battery_voltage_low(LTC4015_Dev *dev, + int16_t *underVolatage) //millivolts { /* See datasheet, page 56 */ uint16_t vbatLoLimit = 0x0000; - ReturnStatus status = LTC4015_reg_read(dev, - LTC4015_VBAT_LO_ALERT_LIMIT_SUBADDR, - &vbatLoLimit); + ReturnStatus status = LTC4015_reg_read( + dev, LTC4015_VBAT_LO_ALERT_LIMIT_SUBADDR, &vbatLoLimit); *underVolatage = vbat_reg_to_voltage(dev, vbatLoLimit); return status; } @@ -203,21 +199,21 @@ ReturnStatus LTC4015_cfg_battery_voltage_high(LTC4015_Dev *dev, voltage_to_vbat_reg(dev, overVoltage)); } -ReturnStatus LTC4015_get_cfg_battery_voltage_high(LTC4015_Dev *dev, - int16_t *overVoltage) //millivolts +ReturnStatus +LTC4015_get_cfg_battery_voltage_high(LTC4015_Dev *dev, + int16_t *overVoltage) //millivolts { /* See datasheet, page 56 */ uint16_t vbatHiLimit = 0x0000; - ReturnStatus status = LTC4015_reg_read(dev, - LTC4015_VBAT_HI_ALERT_LIMIT_SUBADDR, - &vbatHiLimit); + ReturnStatus status = LTC4015_reg_read( + dev, LTC4015_VBAT_HI_ALERT_LIMIT_SUBADDR, &vbatHiLimit); *overVoltage = vbat_reg_to_voltage(dev, vbatHiLimit); return status; } - -ReturnStatus LTC4015_cfg_input_voltage_low(LTC4015_Dev *dev, - int16_t inputUnderVoltage) // millivolts +ReturnStatus +LTC4015_cfg_input_voltage_low(LTC4015_Dev *dev, + int16_t inputUnderVoltage) // millivolts { /* See datasheet, page 56:VIN_LO_ALERT_LIMIT VIN_LO_ALERT_LIMIT = limit/1.648mV */ @@ -226,21 +222,22 @@ ReturnStatus LTC4015_cfg_input_voltage_low(LTC4015_Dev *dev, vinLoLimit); } -ReturnStatus LTC4015_get_cfg_input_voltage_low(LTC4015_Dev *dev, - int16_t *inpUnderVoltage) //millivolts +ReturnStatus +LTC4015_get_cfg_input_voltage_low(LTC4015_Dev *dev, + int16_t *inpUnderVoltage) //millivolts { /* See datasheet, page 56 * VIN_LO_ALERT_LIMIT = (inpUnderVoltage/(1.648)) */ uint16_t vInLoAlertLimit = 0x0000; - ReturnStatus status = LTC4015_reg_read(dev, - LTC4015_VIN_LO_ALERT_LIMIT_SUBADDR, - &vInLoAlertLimit); - *inpUnderVoltage = (int16_t) vInLoAlertLimit * 1.648; + ReturnStatus status = LTC4015_reg_read( + dev, LTC4015_VIN_LO_ALERT_LIMIT_SUBADDR, &vInLoAlertLimit); + *inpUnderVoltage = (int16_t)vInLoAlertLimit * 1.648; return status; } -ReturnStatus LTC4015_cfg_input_current_high(LTC4015_Dev *dev, - int16_t inputOvercurrent) // milliAmps +ReturnStatus +LTC4015_cfg_input_current_high(LTC4015_Dev *dev, + int16_t inputOvercurrent) // milliAmps { /* See datasheet, page 56:IIN_HI_ALERT_LIMIT IIN_HI_ALERT_LIMIT = (limit*RSNSI)/1.46487uV */ @@ -255,10 +252,9 @@ ReturnStatus LTC4015_get_cfg_input_current_high(LTC4015_Dev *dev, /* See datasheet, page 56 * IIN_HI_ALERT_LIMIT = ((inpOverCurrent*PWR_INT_BATT_RSNSI)/(1.46487)) */ uint16_t iInHiALertLimit = 0x0000; - ReturnStatus status = LTC4015_reg_read(dev, - LTC4015_IIN_HI_ALERT_LIMIT_SUBADDR, - &iInHiALertLimit); - *inpOverCurrent = ((int16_t) iInHiALertLimit * 1.46487) / dev->cfg.r_snsi; + ReturnStatus status = LTC4015_reg_read( + dev, LTC4015_IIN_HI_ALERT_LIMIT_SUBADDR, &iInHiALertLimit); + *inpOverCurrent = ((int16_t)iInHiALertLimit * 1.46487) / dev->cfg.r_snsi; return status; } @@ -278,15 +274,14 @@ ReturnStatus LTC4015_get_cfg_battery_current_low(LTC4015_Dev *dev, /* See datasheet, page 56 * IBAT_LO_ALERT_LIMIT = ((current*PWR_INT_BATT_RSNSB)/(1.46487)) */ uint16_t iBatLoAlertLimit = 0x0000; - ReturnStatus status = LTC4015_reg_read(dev, - LTC4015_IBAT_LO_ALERT_LIMIT_SUBADDR, - &iBatLoAlertLimit); - *lowbattCurrent = ((int16_t) iBatLoAlertLimit * 1.46487) / dev->cfg.r_snsb; + ReturnStatus status = LTC4015_reg_read( + dev, LTC4015_IBAT_LO_ALERT_LIMIT_SUBADDR, &iBatLoAlertLimit); + *lowbattCurrent = ((int16_t)iBatLoAlertLimit * 1.46487) / dev->cfg.r_snsb; return status; } ReturnStatus LTC4015_cfg_die_temperature_high(LTC4015_Dev *dev, - int16_t dieTemp) // Degrees C + int16_t dieTemp) // Degrees C { /* See datasheet, page 57:DIE_TEMP_HI_ALERT_LIMIT DIE_TEMP_HI_ALERT_LIMIT = (DIE_TEMP • 12010)/45.6°C */ @@ -296,38 +291,39 @@ ReturnStatus LTC4015_cfg_die_temperature_high(LTC4015_Dev *dev, } ReturnStatus LTC4015_get_cfg_die_temperature_high(LTC4015_Dev *dev, - int16_t *dieTemp) // Degrees C + int16_t *dieTemp) // Degrees C { /* See datasheet, page 57 * DIE_TEMP_HI_ALERT_LIMIT = (dieTemp • 12010)/45.6°C */ uint16_t dieTempAlertLimit = 0x0000; - ReturnStatus status = LTC4015_reg_read(dev, - LTC4015_DIE_TEMP_HI_ALERT_LIMIT_SUBADDR, - &dieTempAlertLimit); - *dieTemp = (((int16_t) dieTempAlertLimit - 12010) / 45.6); + ReturnStatus status = LTC4015_reg_read( + dev, LTC4015_DIE_TEMP_HI_ALERT_LIMIT_SUBADDR, &dieTempAlertLimit); + *dieTemp = (((int16_t)dieTempAlertLimit - 12010) / 45.6); return status; } -ReturnStatus LTC4015_cfg_input_current_limit(LTC4015_Dev *dev, - uint16_t inputCurrentLimit) // milliAmps +ReturnStatus +LTC4015_cfg_input_current_limit(LTC4015_Dev *dev, + uint16_t inputCurrentLimit) // milliAmps { /* See datasheet, page 61:IIN_LIMIT_SETTING IIN_LIMIT_SETTING = (limit * RSNSI / 500uV) - 1 */ /* TODO: range check? this is only a 6-bit register */ - uint16_t iInLimitSetting = ((inputCurrentLimit * dev->cfg.r_snsi) / 500) - 1; + uint16_t iInLimitSetting = + ((inputCurrentLimit * dev->cfg.r_snsi) / 500) - 1; return LTC4015_reg_write(dev, LTC4015_IIN_LIMIT_SETTING_SUBADDR, iInLimitSetting); } -ReturnStatus LTC4015_get_cfg_input_current_limit(LTC4015_Dev *dev, - uint16_t *currentLimit) //milli Amps +ReturnStatus +LTC4015_get_cfg_input_current_limit(LTC4015_Dev *dev, + uint16_t *currentLimit) //milli Amps { /* See datasheet, page 56 * Input current limit setting = (IIN_LIMIT_SETTING + 1) • 500uV / RSNSI */ uint16_t iInlimitSetting = 0x0000; - ReturnStatus status = LTC4015_reg_read(dev, - LTC4015_IIN_LIMIT_SETTING_SUBADDR, - &iInlimitSetting); + ReturnStatus status = LTC4015_reg_read( + dev, LTC4015_IIN_LIMIT_SETTING_SUBADDR, &iInlimitSetting); *currentLimit = ((iInlimitSetting + 1) * 500.0) / dev->cfg.r_snsi; return status; } @@ -337,9 +333,9 @@ ReturnStatus LTC4015_get_die_temperature(LTC4015_Dev *dev, { /* Datasheet page 71: temperature = (DIE_TEMP • 12010)/45.6°C */ uint16_t dieTemperature = 0x0000; - ReturnStatus status = LTC4015_reg_read(dev, LTC4015_DIE_TEMP_SUBADDR, - &dieTemperature); - *dieTemp = (((int16_t) dieTemperature - 12010) / 45.6); + ReturnStatus status = + LTC4015_reg_read(dev, LTC4015_DIE_TEMP_SUBADDR, &dieTemperature); + *dieTemp = (((int16_t)dieTemperature - 12010) / 45.6); return status; } @@ -348,9 +344,9 @@ ReturnStatus LTC4015_get_battery_current(LTC4015_Dev *dev, { /* Page 70: Battery current = [IBAT] * 1.46487uV/Rsnsb */ uint16_t batteryCurrent = 0x0000; - ReturnStatus status = LTC4015_reg_read(dev, LTC4015_IBAT_SUBADDR, - &batteryCurrent); - *iBatt = ((float) ((int16_t) batteryCurrent * 1.46487)) / (dev->cfg.r_snsb); + ReturnStatus status = + LTC4015_reg_read(dev, LTC4015_IBAT_SUBADDR, &batteryCurrent); + *iBatt = ((float)((int16_t)batteryCurrent * 1.46487)) / (dev->cfg.r_snsb); return status; } @@ -359,9 +355,9 @@ ReturnStatus LTC4015_get_input_current(LTC4015_Dev *dev, { /* Page 71: Input current = [IIN] • 1.46487uV/Rsnsi */ uint16_t inputCurrent = 0x0000; - ReturnStatus status = LTC4015_reg_read(dev, LTC4015_IIN_SUBADDR, - &inputCurrent); - *iIn = ((float) ((int16_t) inputCurrent * 1.46487)) / (dev->cfg.r_snsi); + ReturnStatus status = + LTC4015_reg_read(dev, LTC4015_IIN_SUBADDR, &inputCurrent); + *iIn = ((float)((int16_t)inputCurrent * 1.46487)) / (dev->cfg.r_snsi); return status; } @@ -370,8 +366,8 @@ ReturnStatus LTC4015_get_battery_voltage(LTC4015_Dev *dev, { /* Page 71: 2's compliment VBATSENS/cellcount = [VBAT] • [x]uV */ uint16_t batteryVoltage = 0x0000; - ReturnStatus status = LTC4015_reg_read(dev, LTC4015_VBAT_SUBADDR, - &batteryVoltage); + ReturnStatus status = + LTC4015_reg_read(dev, LTC4015_VBAT_SUBADDR, &batteryVoltage); *vbat = vbat_reg_to_voltage(dev, batteryVoltage); return status; } @@ -381,9 +377,9 @@ ReturnStatus LTC4015_get_input_voltage(LTC4015_Dev *dev, { /* Page 71: 2's compliment Input voltage = [VIN] • 1.648mV */ uint16_t inputVoltage = 0x0000; - ReturnStatus status = LTC4015_reg_read(dev, LTC4015_VIN_SUBADDR, - &inputVoltage); - *vIn = (int16_t) inputVoltage * 1.648; + ReturnStatus status = + LTC4015_reg_read(dev, LTC4015_VIN_SUBADDR, &inputVoltage); + *vIn = (int16_t)inputVoltage * 1.648; return status; } @@ -392,19 +388,19 @@ ReturnStatus LTC4015_get_system_voltage(LTC4015_Dev *dev, { /* Page 71: 2's compliment system voltage = [VSYS] • 1.648mV */ uint16_t sysVoltage = 0x0000; - ReturnStatus status = LTC4015_reg_read(dev, LTC4015_VSYS_SUBADDR, - &sysVoltage); - *vSys = (int16_t) sysVoltage * 1.648; + ReturnStatus status = + LTC4015_reg_read(dev, LTC4015_VSYS_SUBADDR, &sysVoltage); + *vSys = (int16_t)sysVoltage * 1.648; return status; } ReturnStatus LTC4015_get_icharge_dac(LTC4015_Dev *dev, - int16_t *icharge) //milliAmps + int16_t *icharge) //milliAmps { /* Page 72: (ICHARGE_DAC + 1) • 1mV/RSNSB */ uint16_t ichargeDAC = 0x0000; - ReturnStatus status = LTC4015_reg_read(dev, LTC4015_ICHARGE_DAC_SUBADDR, - &ichargeDAC); + ReturnStatus status = + LTC4015_reg_read(dev, LTC4015_ICHARGE_DAC_SUBADDR, &ichargeDAC); *icharge = (int16_t)((ichargeDAC + 1) / dev->cfg.r_snsb); return status; } @@ -414,12 +410,13 @@ static ReturnStatus _enable_limit_alerts(LTC4015_Dev *dev, uint16_t alertConfig) return LTC4015_reg_write(dev, LTC4015_EN_LIMIT_ALERTS_SUBADDR, alertConfig); } -static ReturnStatus _read_enable_limit_alerts(LTC4015_Dev *dev, uint16_t* regValue) +static ReturnStatus _read_enable_limit_alerts(LTC4015_Dev *dev, + uint16_t *regValue) { return LTC4015_reg_read(dev, LTC4015_EN_LIMIT_ALERTS_SUBADDR, regValue); } -static ReturnStatus _read_limit_alerts(LTC4015_Dev *dev, uint16_t* regValue) +static ReturnStatus _read_limit_alerts(LTC4015_Dev *dev, uint16_t *regValue) { return LTC4015_reg_read(dev, LTC4015_LIMIT_ALERTS_SUBADDR, regValue); } @@ -432,7 +429,7 @@ static ReturnStatus _enable_charger_state_alerts(LTC4015_Dev *dev, } static ReturnStatus _read_enable_charger_state_alerts(LTC4015_Dev *dev, - uint16_t* regValue) + uint16_t *regValue) { return LTC4015_reg_read(dev, LTC4015_EN_CHARGER_STATE_ALERTS_SUBADDR, regValue); @@ -447,8 +444,8 @@ static ReturnStatus _read_charger_state_alerts(LTC4015_Dev *dev, static ReturnStatus _read_system_status(LTC4015_Dev *dev, uint16_t *regValue) { - ReturnStatus status = LTC4015_reg_read(dev, LTC4015_SYSTEM_STATUS_SUBADDR, - regValue); + ReturnStatus status = + LTC4015_reg_read(dev, LTC4015_SYSTEM_STATUS_SUBADDR, regValue); return status; } @@ -461,7 +458,8 @@ ReturnStatus LTC4015_get_bat_presence(LTC4015_Dev *dev, bool *present) return status; } -static void _ltc4015_isr(void *context) { +static void _ltc4015_isr(void *context) +{ LTC4015_Dev *dev = context; ReturnStatus status = RETURN_OK; uint16_t alert_status = 0; @@ -525,7 +523,8 @@ ReturnStatus LTC4015_init(LTC4015_Dev *dev) if (dev->cfg.pin_alert) { const uint32_t pin_evt_cfg = OCGPIO_CFG_INPUT | OCGPIO_CFG_INT_FALLING; - if (OcGpio_configure(dev->cfg.pin_alert, pin_evt_cfg) < OCGPIO_SUCCESS) { + if (OcGpio_configure(dev->cfg.pin_alert, pin_evt_cfg) < + OCGPIO_SUCCESS) { return RETURN_NOTOK; } @@ -536,7 +535,8 @@ ReturnStatus LTC4015_init(LTC4015_Dev *dev) } void LTC4015_setAlertHandler(LTC4015_Dev *dev, LTC4015_CallbackFn alert_cb, - void *cb_context) { + void *cb_context) +{ dev->obj.alert_cb = alert_cb; dev->obj.cb_context = cb_context; } @@ -600,6 +600,7 @@ ePostCode LTC4015_probe(LTC4015_Dev *dev, POSTData *postData) if (!(ltcStatusReg & LTC4015_CHARGER_ENABLED)) { return POST_DEV_MISSING; } - post_update_POSTData(postData, dev->cfg.i2c_dev.bus, dev->cfg.i2c_dev.slave_addr,0xFF, 0xFF); + post_update_POSTData(postData, dev->cfg.i2c_dev.bus, + dev->cfg.i2c_dev.slave_addr, 0xFF, 0xFF); return POST_DEV_FOUND; } diff --git a/firmware/ec/src/devices/ltc4015_registers.h b/firmware/ec/src/devices/ltc4015_registers.h index 71e11efeb0..bd09957058 100644 --- a/firmware/ec/src/devices/ltc4015_registers.h +++ b/firmware/ec/src/devices/ltc4015_registers.h @@ -14,29 +14,29 @@ * REGISTER DEFINITIONS *****************************************************************************/ // Battery voltage low alert limit - BITS[15:0] 0x0000 -#define LTC4015_VBAT_LO_ALERT_LIMIT_SUBADDR 0x01 +#define LTC4015_VBAT_LO_ALERT_LIMIT_SUBADDR 0x01 // Battery voltage high alert limit - BITS[15:0] 0x0000 -#define LTC4015_VBAT_HI_ALERT_LIMIT_SUBADDR 0x02 +#define LTC4015_VBAT_HI_ALERT_LIMIT_SUBADDR 0x02 // Input voltage low alert limit - BITS[15:0] 0x0000 -#define LTC4015_VIN_LO_ALERT_LIMIT_SUBADDR 0x03 +#define LTC4015_VIN_LO_ALERT_LIMIT_SUBADDR 0x03 // Input voltage high alert limit - BITS[15:0] 0x0000 -#define LTC4015_VIN_HI_ALERT_LIMIT_SUBADDR 0x04 +#define LTC4015_VIN_HI_ALERT_LIMIT_SUBADDR 0x04 // Output voltage low alert limit - BITS[15:0] 0x0000 -#define LTC4015_VSYS_LO_ALERT_LIMIT_SUBADDR 0x05 +#define LTC4015_VSYS_LO_ALERT_LIMIT_SUBADDR 0x05 // Output voltage high alert limit - BITS[15:0] 0x0000 -#define LTC4015_VSYS_HI_ALERT_LIMIT_SUBADDR 0x06 +#define LTC4015_VSYS_HI_ALERT_LIMIT_SUBADDR 0x06 // Input current high alert limit - BITS[15:0] 0x0000 -#define LTC4015_IIN_HI_ALERT_LIMIT_SUBADDR 0x07 +#define LTC4015_IIN_HI_ALERT_LIMIT_SUBADDR 0x07 // Charge current low alert limit - BITS[15:0] 0x0000 -#define LTC4015_IBAT_LO_ALERT_LIMIT_SUBADDR 0x08 +#define LTC4015_IBAT_LO_ALERT_LIMIT_SUBADDR 0x08 // Die temperature high alert limit, - BITS[15:0] 0x0000 -#define LTC4015_DIE_TEMP_HI_ALERT_LIMIT_SUBADDR 0x09 +#define LTC4015_DIE_TEMP_HI_ALERT_LIMIT_SUBADDR 0x09 // Battery series resistance high alert limit - BITS[15:0] 0x0000 -#define LTC4015_BSR_HI_ALERT_LIMIT_SUBADDR 0x0A +#define LTC4015_BSR_HI_ALERT_LIMIT_SUBADDR 0x0A // Thermistor ratio high (cold battery) alert limit - BITS[15:0] 0x0000 -#define LTC4015_NTC_RATIO_HI_ALERT_LIMIT_SUBADDR 0x0B +#define LTC4015_NTC_RATIO_HI_ALERT_LIMIT_SUBADDR 0x0B // Thermistor ratio low (hot battery) alert limit - BITS[15:0] 0x0000 -#define LTC4015_NTC_RATIO_LO_ALERT_LIMIT_SUBADDR 0x0C +#define LTC4015_NTC_RATIO_LO_ALERT_LIMIT_SUBADDR 0x0C /* Bit fields: * @@ -58,7 +58,7 @@ * 0 : Enable thermistor ratio low (hot battery) alert */ // Enable limit monitoring and alert notification via SMBALERT - BITS[15:0] 0x0000 -#define LTC4015_EN_LIMIT_ALERTS_SUBADDR 0x0D +#define LTC4015_EN_LIMIT_ALERTS_SUBADDR 0x0D /* Bit fields: * @@ -76,7 +76,7 @@ * 0 : Enable alert for shorted battery fault state */ // Enable charger state alert notification via SMBALERT - BITS[15:0] 0x0000 -#define LTC4015_EN_CHARGER_STATE_ALERTS_SUBADDR 0x0E +#define LTC4015_EN_CHARGER_STATE_ALERTS_SUBADDR 0x0E /* Bit fields: * @@ -87,16 +87,16 @@ * 0 : Enable alert for constant voltage status */ // Enable charge status alert notification via SMBALERT - BITS[15:0] 0x0000 -#define LTC4015_EN_CHARGE_STATUS_ALERTS_SUBADDR 0x0F +#define LTC4015_EN_CHARGE_STATUS_ALERTS_SUBADDR 0x0F // Coulomb counter QCOUNT low alert limit, same format as QCOUNT (0x13) - BITS[15:0] : 0x0000 -#define LTC4015_QCOUNT_LO_ALERT_LIMIT_SUBADDR 0x10 +#define LTC4015_QCOUNT_LO_ALERT_LIMIT_SUBADDR 0x10 // Coulomb counter QCOUNT high alert limit, same format as QCOUNT (0x13) - BITS[15:0] : 0x0000 -#define LTC4015_QCOUNT_HI_ALERT_LIMIT_SUBADDR 0x11 +#define LTC4015_QCOUNT_HI_ALERT_LIMIT_SUBADDR 0x11 // Coulomb counter prescale factor - BITS[15:0] : 0x0200 -#define LTC4015_QCOUNT_PRESCALE_FACTOR_SUBADDR 0x12 +#define LTC4015_QCOUNT_PRESCALE_FACTOR_SUBADDR 0x12 // Coulomb counter value - BITS[15:0] : 0x8000 -#define LTC4015_QCOUNT_SUBADDR 0x13 +#define LTC4015_QCOUNT_SUBADDR 0x13 /* Bit fields: * @@ -110,40 +110,40 @@ * 1:0 : N/A */ // Configuration Settings - BITS[15:0] : 0x0000 -#define LTC4015_CONFIG_BITS_SUBADDR 0x14 +#define LTC4015_CONFIG_BITS_SUBADDR 0x14 // Input current limit setting = (IIN_LIMIT_SETTING + 1) • 500uV / RSNSI - BITS[5:0] : 0x3F -#define LTC4015_IIN_LIMIT_SETTING_SUBADDR 0x15 +#define LTC4015_IIN_LIMIT_SETTING_SUBADDR 0x15 // UVCLFB input undervoltage limit = (VIN_UVCL_SETTING + 1) • 4.6875mV - BITS[7:0] : 0xFF -#define LTC4015_VIN_UVCL_SETTING_SUBADDR 0x16 -#define LTC4015_RESERVED_0X17_SUBADDR 0x17 -#define LTC4015_RESERVED_0X18_SUBADDR 0x18 +#define LTC4015_VIN_UVCL_SETTING_SUBADDR 0x16 +#define LTC4015_RESERVED_0X17_SUBADDR 0x17 +#define LTC4015_RESERVED_0X18_SUBADDR 0x18 // Write 0x534D to arm ship mode. Once armed, ship mode cannot be disarmed. -#define LTC4015_ARM_SHIP_MODE_SUBADDR 0x19 +#define LTC4015_ARM_SHIP_MODE_SUBADDR 0x19 // Maximum charge current target = (ICHARGE_TARGET + 1) • 1mV/RSNSB - BITS[4:0] -#define LTC4015_ICHARGE_TARGET_SUBADDR 0x1A +#define LTC4015_ICHARGE_TARGET_SUBADDR 0x1A // Charge voltage target - BITS[5:0] -#define LTC4015_VCHARGE_SETTING_SUBADDR 0x1B +#define LTC4015_VCHARGE_SETTING_SUBADDR 0x1B // Two’s complement Low IBAT threshold for C/x termination - BITS[15:0] -#define LTC4015_C_OVER_X_THRESHOLD_SUBADDR 0x1C +#define LTC4015_C_OVER_X_THRESHOLD_SUBADDR 0x1C // Time in seconds with battery charger in the CV state before timer termination // occurs (lithium chemistries only) -#define LTC4015_MAX_CV_TIME_SUBADDR 0x1D +#define LTC4015_MAX_CV_TIME_SUBADDR 0x1D // Time in seconds before a max_charge_time fault is declared. Set to zero to // disable max_charge_time fault -#define LTC4015_MAX_CHARGE_TIME_SUBADDR 0x1E +#define LTC4015_MAX_CHARGE_TIME_SUBADDR 0x1E // Value of NTC_RATIO for transition between JEITA regions 2 and 1 (off) - BITS[15:0] : 0x3F00 -#define LTC4015_JEITA_T1_SUBADDR 0x1F +#define LTC4015_JEITA_T1_SUBADDR 0x1F // Value of NTC_RATIO for transition between JEITA regions 3 and 2 - BITS[15:0] : 0x372A -#define LTC4015_JEITA_T2_SUBADDR 0x20 +#define LTC4015_JEITA_T2_SUBADDR 0x20 // Value of NTC_RATIO for transition between JEITA regions 4 and 3 - BITS[15:0] : 0x1F27 -#define LTC4015_JEITA_T3_SUBADDR 0x21 +#define LTC4015_JEITA_T3_SUBADDR 0x21 // Value of NTC_RATIO for transition between JEITA regions 5 and 4 - BITS[15:0] : 0x1BCC -#define LTC4015_JEITA_T4_SUBADDR 0x22 +#define LTC4015_JEITA_T4_SUBADDR 0x22 // Value of NTC_RATIO for transition between JEITA regions 6 and 5 - BITS[15:0] : 0x18B9 -#define LTC4015_JEITA_T5_SUBADDR 0x23 +#define LTC4015_JEITA_T5_SUBADDR 0x23 // Value of NTC_RATIO for transition between JEITA regions 7 (off) and 6 - BITS[15:0] : 0x136D -#define LTC4015_JEITA_T6_SUBADDR 0x24 +#define LTC4015_JEITA_T6_SUBADDR 0x24 /* Bit Fields: * @@ -152,7 +152,7 @@ * 4:0 : vcharge_jeita_5 */ // VCHARGE values for JEITA temperature regions 6 and 5 -#define LTC4015_VCHARGE_JEITA_6_5_SUBADDR 0x25 +#define LTC4015_VCHARGE_JEITA_6_5_SUBADDR 0x25 /* Bit Fields: * @@ -162,7 +162,7 @@ * 4:0 : vcharge_jeita_4 */ // VCHARGE values for JEITA temperature regions 4, 3, and 2 -#define LTC4015_VCHARGE_JEITA_4_3_2_SUBADDR 0x26 +#define LTC4015_VCHARGE_JEITA_4_3_2_SUBADDR 0x26 /* Bit Fields: * @@ -171,7 +171,7 @@ * 4:0 : icharge_jeita_5 */ // ICHARGE_TARGET values for JEITA temperature regions 6 and 5 - BITS[15:0] : 0x01EF -#define LTC4015_ICHARGE_JEITA_6_5_SUBADDR 0x27 +#define LTC4015_ICHARGE_JEITA_6_5_SUBADDR 0x27 /* Bit Fields: * @@ -181,7 +181,7 @@ * 4:0 : icharge_jeita_4 */ // ICHARGE_TARGET value for JEITA temperature regions 4, 3, and 2 - BITS[15:0] : 0x7FEF -#define LTC4015_ICHARGE_JEITA_4_3_2_SUBADDR 0x28 +#define LTC4015_ICHARGE_JEITA_4_3_2_SUBADDR 0x28 /* Bit Fields: * @@ -191,31 +191,31 @@ * 0 : Enable JEITA temperature profile */ // Battery charger configuration settings -#define LTC4015_CHARGER_CONFIG_BITS_SUBADDR 0x29 +#define LTC4015_CHARGER_CONFIG_BITS_SUBADDR 0x29 // LiFePO4/lead-acid absorb voltage adder, bits 15:6 are reserved -#define LTC4015_VABSORB_DELTA_SUBADDR 0x2A +#define LTC4015_VABSORB_DELTA_SUBADDR 0x2A // Maximum time for LiFePO4/lead-acid absorb charge -#define LTC4015_MAX_ABSORB_TIME_SUBADDR 0x2B +#define LTC4015_MAX_ABSORB_TIME_SUBADDR 0x2B // Lead-acid equalize charge voltage adder, bits 15:6 are reserved - BITS[15:0] : 0x002A -#define LTC4015_VEQUALIZE_DELTA_SUBADDR 0x2C +#define LTC4015_VEQUALIZE_DELTA_SUBADDR 0x2C // Lead-acid equalization time - BITS[15:0] : 0x0E10 -#define LTC4015_EQUALIZE_TIME_SUBADDR 0x2D +#define LTC4015_EQUALIZE_TIME_SUBADDR 0x2D // LiFeP04 recharge threshold - BITS[15:0] : 0x4410 -#define LTC4015_LIFEPO4_RECHARGE_THRESHOLD_SUBADDR 0x2E -#define LTC4015_RESERVED_0X2F_SUBADDR 0x2F +#define LTC4015_LIFEPO4_RECHARGE_THRESHOLD_SUBADDR 0x2E +#define LTC4015_RESERVED_0X2F_SUBADDR 0x2F // For lithium chemistries, indicates the time (in sec) that the battery has // been charging -#define LTC4015_MAX_CHARGE_TIMER_SUBADDR 0x30 +#define LTC4015_MAX_CHARGE_TIMER_SUBADDR 0x30 // For lithium chemistries, indicates the time (in sec) that the battery has // been in constant-voltage regulation -#define LTC4015_CV_TIMER_SUBADDR 0x31 +#define LTC4015_CV_TIMER_SUBADDR 0x31 // For LiFePO4 and lead-acid batteries, indicates the time (in sec) that the // battery has been in absorb phase -#define LTC4015_ABSORB_TIMER_SUBADDR 0x32 +#define LTC4015_ABSORB_TIMER_SUBADDR 0x32 // For lead-acid batteries, indicates the time (in sec) that the battery has // been in EQUALIZE phase -#define LTC4015_EQUALIZE_TIMER_SUBADDR 0x33 +#define LTC4015_EQUALIZE_TIMER_SUBADDR 0x33 /* Bit Fields: * @@ -234,7 +234,7 @@ */ // Real time battery charger state indicator. Individual bits are mutually // exclusive. Bits 15:11 are reserved. -#define LTC4015_CHARGER_STATE_SUBADDR 0x34 +#define LTC4015_CHARGER_STATE_SUBADDR 0x34 /* Bit Fields: * @@ -250,7 +250,7 @@ */ // Charge status indicator. Individual bits are mutually exclusive. Only active // in charging states. -#define LTC4015_CHARGE_STATUS_SUBADDR 0x35 +#define LTC4015_CHARGE_STATUS_SUBADDR 0x35 /* Bit Fields: * @@ -274,7 +274,7 @@ // Limit alert register.Individual bits are enabled by EN_LIMIT_ALERTS (0x0D). // Writing 0 to any bit clears that alert. Once set, alert bits remain high // until cleared or disabled. -#define LTC4015_LIMIT_ALERTS_SUBADDR 0x36 +#define LTC4015_LIMIT_ALERTS_SUBADDR 0x36 /* Bit Fields: * @@ -292,7 +292,7 @@ * 0 : Alert indicates battery short fault has occurred */ // Charger state alert register. Individual bits are enabled by EN_CHARGER_STATE_ALERTS (0x0E). -#define LTC4015_CHARGER_STATE_ALERTS_SUBADDR 0x37 +#define LTC4015_CHARGER_STATE_ALERTS_SUBADDR 0x37 /* Bit Fields: * @@ -304,7 +304,7 @@ */ // Alerts that CHARGE_STATUS indicators have occurred. // Individual bits are enabled by EN_CHARGE_STATUS_ALERTS (0x0F) -#define LTC4015_CHARGE_STATUS_ALERTS_SUBADDR 0x38 +#define LTC4015_CHARGE_STATUS_ALERTS_SUBADDR 0x38 /* Bit Fields: * @@ -333,46 +333,46 @@ * level (2.8V typical) */ // Real time system status indicator bits -#define LTC4015_SYSTEM_STATUS_SUBADDR 0x39 +#define LTC4015_SYSTEM_STATUS_SUBADDR 0x39 // Two’s complement ADC measurement result for the BATSENS pin. // VBATSENS/cellcount = [VBAT] • 192.264uV for lithium chemistries. // VBATSENS/cellcount = [VBAT] • 128.176uV for lead-acid. -#define LTC4015_VBAT_SUBADDR 0x3A +#define LTC4015_VBAT_SUBADDR 0x3A // Two’s complement ADC measurement result for VIN. // VVIN = [VIN] • 1.648mV -#define LTC4015_VIN_SUBADDR 0x3B +#define LTC4015_VIN_SUBADDR 0x3B // Two’s complement ADC measurement result for VSYS. // VSYS = [VSYS] • 1.648mV -#define LTC4015_VSYS_SUBADDR 0x3C +#define LTC4015_VSYS_SUBADDR 0x3C // Two’s complement ADC measurement result for (VCSP – VCSN). // Charge current (into the battery) is represented as a positive number. // Battery current = [IBAT] • 1.46487uV/RSNSB -#define LTC4015_IBAT_SUBADDR 0x3D +#define LTC4015_IBAT_SUBADDR 0x3D // Two’s complement ADC measurement result for (VCLP – VCLN). // Input current = [IIN] • 1.46487uV/RSNSI -#define LTC4015_IIN_SUBADDR 0x3E +#define LTC4015_IIN_SUBADDR 0x3E // Two’s complement ADC measurement result for die temperature. // Temperature = (DIE_TEMP – 12010)/45.6°C -#define LTC4015_DIE_TEMP_SUBADDR 0x3F +#define LTC4015_DIE_TEMP_SUBADDR 0x3F // Two’s complement ADC measurement result for NTC thermistor ratio. // RNTC = NTC_RATIO • RNTCBIAS/(21845.0 – NTC_RATIO) -#define LTC4015_NTC_RATIO_SUBADDR 0x40 +#define LTC4015_NTC_RATIO_SUBADDR 0x40 // Calculated battery series resistance. // For lithium chemistries, series resistance/cellcount = BSR • RSNSB/500.0 // For lead-acid chemistries, series resistance/cellcount = BSR • RSNSB/750.0 -#define LTC4015_BSR_SUBADDR 0x41 +#define LTC4015_BSR_SUBADDR 0x41 // JEITA temperature region of the NTC thermistor (Li Only). // Active only when EN_JEITA=1 (Only Bits[2:0] used) -#define LTC4015_JEITA_REGION_SUBADDR 0x42 +#define LTC4015_JEITA_REGION_SUBADDR 0x42 /* Bit Fields: * @@ -382,19 +382,19 @@ * 3:0 : Cell count as set by CELLS pins */ // Readout of CHEM and CELLS pin settings -#define LTC4015_CHEM_CELLS_SUBADDR 0x43 +#define LTC4015_CHEM_CELLS_SUBADDR 0x43 // Charge current control DAC control bits (Only Bits[4:0] used) -#define LTC4015_ICHARGE_DAC_SUBADDR 0x44 +#define LTC4015_ICHARGE_DAC_SUBADDR 0x44 // Charge voltage control DAC control bits (Only Bits[5:0] used) -#define LTC4015_VCHARGE_DAC_SUBADDR 0x45 +#define LTC4015_VCHARGE_DAC_SUBADDR 0x45 // Input current limit control DAC control word (Only Bits[5:0] used) -#define LTC4015_IIN_LIMIT_DAC_SUBADDR 0x46 +#define LTC4015_IIN_LIMIT_DAC_SUBADDR 0x46 // Digitally filtered two’s complement ADC measurement result for battery voltage -#define LTC4015_VBAT_FILT_SUBADDR 0x47 +#define LTC4015_VBAT_FILT_SUBADDR 0x47 // This 16-bit two's complement word is the value of IBAT (0x3D) used in calculating BSR. -#define LTC4015_ICHARGE_BSR_SUBADDR 0x48 -#define LTC4015_RESERVED_0X49_SUBADDR 0x49 +#define LTC4015_ICHARGE_BSR_SUBADDR 0x48 +#define LTC4015_RESERVED_0X49_SUBADDR 0x49 // Measurement valid bit, bit 0 is a 1 when the telemetry(ADC) system is ready -#define LTC4015_MEAS_SYS_VALID_SUBADDR 0x4A +#define LTC4015_MEAS_SYS_VALID_SUBADDR 0x4A #endif /* CHARGECTRL_LTC4015_H_ */ diff --git a/firmware/ec/src/devices/ltc4274.c b/firmware/ec/src/devices/ltc4274.c index 5af9e9cc11..aece382a8f 100644 --- a/firmware/ec/src/devices/ltc4274.c +++ b/firmware/ec/src/devices/ltc4274.c @@ -25,102 +25,101 @@ * MACRO DEFINITIONS *****************************************************************************/ - /* Register map */ -#define LTC4274_REG_INTERRUPT_STATUS 0x00 -#define LTC4274_REG_INTERRUPT_MASK 0x01 -#define LTC4274_REG_POWER_EVENT 0x02 -#define LTC4274_REG_POWER_EVENT_COR 0x03 -#define LTC4274_REG_DETECT_EVENT 0x04 -#define LTC4274_REG_DETECT_EVENT_COR 0x05 -#define LTC4274_REG_FAULT_EVENT 0x06 -#define LTC4274_REG_FAULT_EVENT_COR 0x07 -#define LTC4274_REG_START_EVENT 0x08 -#define LTC4274_REG_START_EVENT_COR 0x09 -#define LTC4274_REG_SUPPLY_EVENT 0x0A -#define LTC4274_REG_SUPPLY_EVENT_COR 0x0B -#define LTC4274_REG_STATUS 0x0C -#define LTC4274_REG_POWER_STATUS 0x10 -#define LTC4274_REG_PNI_STATUS 0x11 -#define LTC4274_REG_OPERATION_MODE 0x12 -#define LTC4274_REG_ENABLE_DUSCONNECT SENSING 0X13 -#define LTC4274_REG_DETECT_CLASS_ENABLE 0x14 -#define LTC4274_REG_MIDSPAN 0x15 -#define LTC4274_REG_MCONF 0x17 -#define LTC4274_REG_DETPB 0x18 -#define LTC4274_REG_PWRPB 0x19 -#define LTC4274_REG_RSTPB 0x1A -#define LTC4274_REG_ID 0x1B -#define LTC4274_REG_TLIMIT 0x1E -#define LTC4274_REG_IP1LSB 0x30 -#define LTC4274_REG_IP1MSB 0x31 -#define LTC4274_REG_VP1LSB 0x32 -#define LTC4274_REG_VP1MSB 0x33 -#define LTC4274_REG_FIRMWARE 0x41 -#define LTC4274_REG_WDOG 0x42 -#define LTC4274_REG_DEVID 0x43 -#define LTC4274_REG_HP_ENABLE 0x44 -#define LTC4274_REG_HP_MODE 0x46 -#define LTC4274_REG_CUT1 0x47 -#define LTC4274_REG_LIM1 0x48 -#define LTC4274_REG_IHP_STATUS 0x49 +#define LTC4274_REG_INTERRUPT_STATUS 0x00 +#define LTC4274_REG_INTERRUPT_MASK 0x01 +#define LTC4274_REG_POWER_EVENT 0x02 +#define LTC4274_REG_POWER_EVENT_COR 0x03 +#define LTC4274_REG_DETECT_EVENT 0x04 +#define LTC4274_REG_DETECT_EVENT_COR 0x05 +#define LTC4274_REG_FAULT_EVENT 0x06 +#define LTC4274_REG_FAULT_EVENT_COR 0x07 +#define LTC4274_REG_START_EVENT 0x08 +#define LTC4274_REG_START_EVENT_COR 0x09 +#define LTC4274_REG_SUPPLY_EVENT 0x0A +#define LTC4274_REG_SUPPLY_EVENT_COR 0x0B +#define LTC4274_REG_STATUS 0x0C +#define LTC4274_REG_POWER_STATUS 0x10 +#define LTC4274_REG_PNI_STATUS 0x11 +#define LTC4274_REG_OPERATION_MODE 0x12 +#define LTC4274_REG_ENABLE_DUSCONNECT SENSING 0X13 +#define LTC4274_REG_DETECT_CLASS_ENABLE 0x14 +#define LTC4274_REG_MIDSPAN 0x15 +#define LTC4274_REG_MCONF 0x17 +#define LTC4274_REG_DETPB 0x18 +#define LTC4274_REG_PWRPB 0x19 +#define LTC4274_REG_RSTPB 0x1A +#define LTC4274_REG_ID 0x1B +#define LTC4274_REG_TLIMIT 0x1E +#define LTC4274_REG_IP1LSB 0x30 +#define LTC4274_REG_IP1MSB 0x31 +#define LTC4274_REG_VP1LSB 0x32 +#define LTC4274_REG_VP1MSB 0x33 +#define LTC4274_REG_FIRMWARE 0x41 +#define LTC4274_REG_WDOG 0x42 +#define LTC4274_REG_DEVID 0x43 +#define LTC4274_REG_HP_ENABLE 0x44 +#define LTC4274_REG_HP_MODE 0x46 +#define LTC4274_REG_CUT1 0x47 +#define LTC4274_REG_LIM1 0x48 +#define LTC4274_REG_IHP_STATUS 0x49 /* Interrupt bits */ -#define LTC4274_SUPPLY_INTERRUPT 0x80 -#define LTC4274_TSTART_INTERRUPT 0x40 -#define LTC4274_TCUT_INTERRUPT 0x20 -#define LTC4274_CLASSIFICATION_INTERRUPT 0x10 -#define LTC4274_DETECT_INTERRUPT 0x08 -#define LTC4274_DISCONNECT_INTERRUPT 0x04 -#define LTC4274_POWERGOOD_INTERRUPT 0x02 -#define LTC4274_PWERENABLE_INTERRUPT 0x01 +#define LTC4274_SUPPLY_INTERRUPT 0x80 +#define LTC4274_TSTART_INTERRUPT 0x40 +#define LTC4274_TCUT_INTERRUPT 0x20 +#define LTC4274_CLASSIFICATION_INTERRUPT 0x10 +#define LTC4274_DETECT_INTERRUPT 0x08 +#define LTC4274_DISCONNECT_INTERRUPT 0x04 +#define LTC4274_POWERGOOD_INTERRUPT 0x02 +#define LTC4274_PWERENABLE_INTERRUPT 0x01 /* Events and status control bits*/ -#define LTC4274_PWR_GOOD_BIT 0x10 -#define LTC4274_PWR_STATE_CHANGE_BIT 0x01 -#define LTC4274_CLASSIFICATION_COMPLETE_BIT 0x10 -#define LTC4274_DETECT_COMPLETE_BIT 0X01 -#define LTC4274_DISCONNECT_TDIS_BIT 0x10 -#define LTC4274_OVERCURRENT_TCUT_BIT 0x01 -#define LTC4274_CURRENT_LIMIT_TOUT_BIT 0x10 -#define LTC4274_START_OCURRENT_TOUT_BIT 0X01 -#define LTC4274_PWR_GOOD_BIT 0x10 -#define LTC4274_PWR_ENABLE_BIT 0x01 -#define LTC4274_LTPOE_BIT 0x80 -#define LTC4274_CLASS_BIT 0x70 -#define LTC4274_DETECT_BIT 0X07 -#define LTC4274_ENABLE_CLASSIFICATION_BIT 0X10 -#define LTC4274_ENABLE_DETECTION_BIT 0x01 -#define LTC4274_SUPPLY_EVENT_FAILURE 0xF0 +#define LTC4274_PWR_GOOD_BIT 0x10 +#define LTC4274_PWR_STATE_CHANGE_BIT 0x01 +#define LTC4274_CLASSIFICATION_COMPLETE_BIT 0x10 +#define LTC4274_DETECT_COMPLETE_BIT 0X01 +#define LTC4274_DISCONNECT_TDIS_BIT 0x10 +#define LTC4274_OVERCURRENT_TCUT_BIT 0x01 +#define LTC4274_CURRENT_LIMIT_TOUT_BIT 0x10 +#define LTC4274_START_OCURRENT_TOUT_BIT 0X01 +#define LTC4274_PWR_GOOD_BIT 0x10 +#define LTC4274_PWR_ENABLE_BIT 0x01 +#define LTC4274_LTPOE_BIT 0x80 +#define LTC4274_CLASS_BIT 0x70 +#define LTC4274_DETECT_BIT 0X07 +#define LTC4274_ENABLE_CLASSIFICATION_BIT 0X10 +#define LTC4274_ENABLE_DETECTION_BIT 0x01 +#define LTC4274_SUPPLY_EVENT_FAILURE 0xF0 /* PSE Configuration */ -#define LTC4274_INTERRUPT_SET 0x1E -#define LTC4274_OPERATING_MODE_SET 0x03 -#define LTC4274_DETCET_CLASS_ENABLE 0x11 -#define LTC4274_MISC_CONF 0xD1 +#define LTC4274_INTERRUPT_SET 0x1E +#define LTC4274_OPERATING_MODE_SET 0x03 +#define LTC4274_DETCET_CLASS_ENABLE 0x11 +#define LTC4274_MISC_CONF 0xD1 /* PSE operating modes */ -#define LTC4274_SHUTDOWN_MODE 0x00 -#define LTC4274_MANUAL_MODE 0x01 -#define LTC4274_SEMIAUTO_MODE 0x02 -#define LTC4274_AUTO_MODE 0x03 +#define LTC4274_SHUTDOWN_MODE 0x00 +#define LTC4274_MANUAL_MODE 0x01 +#define LTC4274_SEMIAUTO_MODE 0x02 +#define LTC4274_AUTO_MODE 0x03 -#define LTC4274_INTERRUPT_ENABLE 0x80 -#define LTC4274_DETECT_ENABLE 0x40 -#define LTC4274_FAST_IV 0x20 -#define LTC4274_MSD_MASK 0x01 +#define LTC4274_INTERRUPT_ENABLE 0x80 +#define LTC4274_DETECT_ENABLE 0x40 +#define LTC4274_FAST_IV 0x20 +#define LTC4274_MSD_MASK 0x01 -#define LTC4274_HP_ENABLE 0x11 +#define LTC4274_HP_ENABLE 0x11 typedef struct { - ePSEDetection detectStatus; - ePSEClassType classStatus; - ePSEPowerState powerGoodStatus; + ePSEDetection detectStatus; + ePSEClassType classStatus; + ePSEPowerState powerGoodStatus; } tPower_PSEStatus_Data; typedef struct { - tPower_PSEStatus_Data pseStatus; - ePSEAlert psealert; + tPower_PSEStatus_Data pseStatus; + ePSEAlert psealert; } tPower_PSEStatus_Info; static tPower_PSEStatus_Info PSEStatus_Info; @@ -134,17 +133,17 @@ static tPower_PSEStatus_Info PSEStatus_Info; * * @return ReturnStatus */ -ReturnStatus ltc4274_write(const I2C_Dev *i2c_dev, - uint8_t regAddress, +ReturnStatus ltc4274_write(const I2C_Dev *i2c_dev, uint8_t regAddress, uint8_t regValue) { ReturnStatus status = RETURN_NOTOK; I2C_Handle pseHandle = i2c_get_handle(i2c_dev->bus); if (!pseHandle) { LOGGER_ERROR("LTC4274:ERROR:: Failed to get I2C Bus for PSE" - "0x%x on bus 0x%x.\n", i2c_dev->slave_addr, i2c_dev->bus); + "0x%x on bus 0x%x.\n", + i2c_dev->slave_addr, i2c_dev->bus); } else { - status = i2c_reg_write(pseHandle,i2c_dev->slave_addr, regAddress, + status = i2c_reg_write(pseHandle, i2c_dev->slave_addr, regAddress, regValue, 1); } return status; @@ -159,15 +158,15 @@ ReturnStatus ltc4274_write(const I2C_Dev *i2c_dev, * * @return ReturnStatus */ -ReturnStatus ltc4274_read(const I2C_Dev *i2c_dev, - uint8_t regAddress, +ReturnStatus ltc4274_read(const I2C_Dev *i2c_dev, uint8_t regAddress, uint8_t *regValue) { ReturnStatus status = RETURN_NOTOK; I2C_Handle pseHandle = i2c_get_handle(i2c_dev->bus); if (!pseHandle) { LOGGER_ERROR("LTC4274:ERROR:: Failed to get I2C Bus for PSE" - "0x%x on bus 0x%x.\n", i2c_dev->slave_addr, i2c_dev->bus); + "0x%x on bus 0x%x.\n", + i2c_dev->slave_addr, i2c_dev->bus); } else { /* TODO: refactor i2c_reg_read to not require uint16 */ uint16_t value; @@ -178,7 +177,6 @@ ReturnStatus ltc4274_read(const I2C_Dev *i2c_dev, return status; } - /****************************************************************************** * @fn ltc4274_set_cfg_operation_mode * @@ -188,10 +186,11 @@ ReturnStatus ltc4274_read(const I2C_Dev *i2c_dev, * * @return ReturnStatus */ -ReturnStatus ltc4274_set_cfg_operation_mode(const I2C_Dev *i2c_dev, uint8_t operatingMode) +ReturnStatus ltc4274_set_cfg_operation_mode(const I2C_Dev *i2c_dev, + uint8_t operatingMode) { ReturnStatus status = RETURN_OK; - status = ltc4274_write( i2c_dev, LTC4274_REG_OPERATION_MODE, operatingMode); + status = ltc4274_write(i2c_dev, LTC4274_REG_OPERATION_MODE, operatingMode); if (status != RETURN_OK) { LOGGER("LTC4274:ERROR:: Write failed to the Operation mode register of PSE.\n"); } @@ -207,10 +206,11 @@ ReturnStatus ltc4274_set_cfg_operation_mode(const I2C_Dev *i2c_dev, uint8_t oper * * @return ReturnStatus */ -ReturnStatus ltc4274_get_operation_mode(const I2C_Dev *i2c_dev, uint8_t *operatingMode) +ReturnStatus ltc4274_get_operation_mode(const I2C_Dev *i2c_dev, + uint8_t *operatingMode) { ReturnStatus status = RETURN_OK; - status = ltc4274_read( i2c_dev, LTC4274_REG_OPERATION_MODE, operatingMode); + status = ltc4274_read(i2c_dev, LTC4274_REG_OPERATION_MODE, operatingMode); if (status != RETURN_OK) { LOGGER("LTC4274:ERROR:: Read failed from the Operation mode register of PSE.\n"); } @@ -226,13 +226,14 @@ ReturnStatus ltc4274_get_operation_mode(const I2C_Dev *i2c_dev, uint8_t *operati * * @return ReturnStatus */ -ReturnStatus ltc4274_set_cfg_detect_enable(const I2C_Dev *i2c_dev, uint8_t detectEnable) +ReturnStatus ltc4274_set_cfg_detect_enable(const I2C_Dev *i2c_dev, + uint8_t detectEnable) { ReturnStatus status = RETURN_OK; //Enable detect and classfication of PD - status = ltc4274_write( i2c_dev, LTC4274_REG_DETECT_CLASS_ENABLE, - detectEnable); + status = ltc4274_write(i2c_dev, LTC4274_REG_DETECT_CLASS_ENABLE, + detectEnable); if (status != RETURN_OK) { LOGGER("LTC4274:ERROR:: PSE detect enable setting failed.\n"); } @@ -248,12 +249,13 @@ ReturnStatus ltc4274_set_cfg_detect_enable(const I2C_Dev *i2c_dev, uint8_t detec * * @return ReturnStatus */ -ReturnStatus ltc4274_get_detect_enable(const I2C_Dev *i2c_dev, uint8_t *detectVal) +ReturnStatus ltc4274_get_detect_enable(const I2C_Dev *i2c_dev, + uint8_t *detectVal) { ReturnStatus status = RETURN_OK; //Enable detect and classfication of PD uint8_t val = 0; - status = ltc4274_read( i2c_dev, LTC4274_REG_DETECT_CLASS_ENABLE, &val); + status = ltc4274_read(i2c_dev, LTC4274_REG_DETECT_CLASS_ENABLE, &val); if (status != RETURN_OK) { LOGGER("LTC4274:ERROR:: PSE detect enable config read failed.\n"); } @@ -270,12 +272,13 @@ ReturnStatus ltc4274_get_detect_enable(const I2C_Dev *i2c_dev, uint8_t *detectVa * * @return ReturnStatus */ -ReturnStatus ltc4274_set_interrupt_mask(const I2C_Dev *i2c_dev, uint8_t interruptMask) +ReturnStatus ltc4274_set_interrupt_mask(const I2C_Dev *i2c_dev, + uint8_t interruptMask) { ReturnStatus status = RETURN_OK; /* Enable interrupts for power event,power good, supply related faults or * over currrent*/ - status = ltc4274_write( i2c_dev, LTC4274_REG_INTERRUPT_MASK, interruptMask); + status = ltc4274_write(i2c_dev, LTC4274_REG_INTERRUPT_MASK, interruptMask); if (status != RETURN_OK) { LOGGER("LTC4274:ERROR:: PSE interrupt mask setting failed.\n"); } @@ -291,12 +294,13 @@ ReturnStatus ltc4274_set_interrupt_mask(const I2C_Dev *i2c_dev, uint8_t interrup * * @return ReturnStatus */ -ReturnStatus ltc4274_get_interrupt_mask(const I2C_Dev *i2c_dev, uint8_t *intrMask) +ReturnStatus ltc4274_get_interrupt_mask(const I2C_Dev *i2c_dev, + uint8_t *intrMask) { ReturnStatus status = RETURN_OK; /* Enable interrupts for power event,power good, supply related faults or * over currrent*/ - status = ltc4274_read( i2c_dev, LTC4274_REG_INTERRUPT_MASK, intrMask); + status = ltc4274_read(i2c_dev, LTC4274_REG_INTERRUPT_MASK, intrMask); if (status != RETURN_OK) { LOGGER("LTC4274:ERROR:: PSE interrupt mask config read failed.\n"); } @@ -316,11 +320,11 @@ ReturnStatus ltc4274_cfg_interrupt_enable(const I2C_Dev *i2c_dev, bool enable) { ReturnStatus status = RETURN_OK; uint8_t interruptEnable = 0x00; - if(enable) { + if (enable) { interruptEnable = LTC4274_INTERRUPT_ENABLE; } /*Enable interrupts from Misc register*/ - status = ltc4274_write( i2c_dev, LTC4274_REG_MCONF, interruptEnable); + status = ltc4274_write(i2c_dev, LTC4274_REG_MCONF, interruptEnable); if (status != RETURN_OK) { LOGGER("LTC4274:ERROR:: PSE interrupt enable failed.\n"); } @@ -336,11 +340,12 @@ ReturnStatus ltc4274_cfg_interrupt_enable(const I2C_Dev *i2c_dev, bool enable) * * @return ReturnStatus */ -ReturnStatus ltc4274_get_interrupt_enable(const I2C_Dev *i2c_dev, uint8_t *interruptEnable) +ReturnStatus ltc4274_get_interrupt_enable(const I2C_Dev *i2c_dev, + uint8_t *interruptEnable) { ReturnStatus status = RETURN_OK; /*Enable interrupts from Misc register*/ - status = ltc4274_read( i2c_dev, LTC4274_REG_MCONF, interruptEnable); + status = ltc4274_read(i2c_dev, LTC4274_REG_MCONF, interruptEnable); if (status != RETURN_OK) { LOGGER("LTC4274:ERROR:: PSE interrupt enable config read failed.\n"); } @@ -356,11 +361,12 @@ ReturnStatus ltc4274_get_interrupt_enable(const I2C_Dev *i2c_dev, uint8_t *inter * * @return ReturnStatus */ -ReturnStatus ltc4274_set_cfg_pshp_feature(const I2C_Dev *i2c_dev, uint8_t hpEnable) +ReturnStatus ltc4274_set_cfg_pshp_feature(const I2C_Dev *i2c_dev, + uint8_t hpEnable) { ReturnStatus status = RETURN_OK; /*Enbale high power feature */ - status = ltc4274_write( i2c_dev, LTC4274_REG_HP_ENABLE, hpEnable); + status = ltc4274_write(i2c_dev, LTC4274_REG_HP_ENABLE, hpEnable); if (status != RETURN_OK) { LOGGER("LTC4274:ERROR:: PSE high power mode setting failed.\n"); } @@ -380,7 +386,7 @@ ReturnStatus ltc4274_get_pshp_feature(const I2C_Dev *i2c_dev, uint8_t *hpEnable) { ReturnStatus status = RETURN_OK; /*Enbale high power feature */ - status = ltc4274_read( i2c_dev, LTC4274_REG_HP_ENABLE, hpEnable); + status = ltc4274_read(i2c_dev, LTC4274_REG_HP_ENABLE, hpEnable); if (status != RETURN_OK) { LOGGER("LTC4274:ERROR:: PSE high power mode config read failed.\n"); } @@ -395,77 +401,51 @@ ReturnStatus ltc4274_get_pshp_feature(const I2C_Dev *i2c_dev, uint8_t *hpEnable) * * @return None */ -static void _get_pse_class_enum(uint8_t val , ePSEClassType *pseClass) +static void _get_pse_class_enum(uint8_t val, ePSEClassType *pseClass) { switch (val) { - case LTC4274_CLASSTYPE_UNKOWN: - { - *pseClass = LTC4274_CLASSTYPE_UNKOWN; - } - break; - case LTC4274_CLASSTYPE_1: - { - *pseClass = LTC4274_CLASSTYPE_1; - } - break; - case LTC4274_CLASSTYPE_2: - { - *pseClass = LTC4274_CLASSTYPE_2; - } - break; - case LTC4274_CLASSTYPE_3: - { - *pseClass = LTC4274_CLASSTYPE_3; - } - break; - case LTC4274_CLASSTYPE_4: - { - *pseClass = LTC4274_CLASSTYPE_4; - } - break; - case LTC4274_CLASSTYPE_RESERVED: - { - *pseClass = LTC4274_CLASSTYPE_RESERVED; - } - break; - case LTC4274_CLASSTYPE_0: - { - *pseClass = LTC4274_CLASSTYPE_0; - } - break; - case LTC4274_OVERCURRENT: - { - *pseClass = LTC4274_OVERCURRENT; - } - break; - case LTC4274_LTEPOE_TYPE_52_7W: - { - *pseClass = LTC4274_LTEPOE_TYPE_52_7W; - } - break; - case LTC4274_LTEPOE_TYPE_70W: - { - *pseClass = LTC4274_LTEPOE_TYPE_70W; - } - break; - case LTC4274_LTEPOE_TYPE_90W: - { - *pseClass = LTC4274_LTEPOE_TYPE_90W; - } - break; - case LTC4274_LTEPOE_TYPE_38_7W: - { - *pseClass = LTC4274_LTEPOE_TYPE_38_7W; - } - break; - default: - { - *pseClass = LTC4274_LTEPOE_RESERVED; - } + case LTC4274_CLASSTYPE_UNKOWN: { + *pseClass = LTC4274_CLASSTYPE_UNKOWN; + } break; + case LTC4274_CLASSTYPE_1: { + *pseClass = LTC4274_CLASSTYPE_1; + } break; + case LTC4274_CLASSTYPE_2: { + *pseClass = LTC4274_CLASSTYPE_2; + } break; + case LTC4274_CLASSTYPE_3: { + *pseClass = LTC4274_CLASSTYPE_3; + } break; + case LTC4274_CLASSTYPE_4: { + *pseClass = LTC4274_CLASSTYPE_4; + } break; + case LTC4274_CLASSTYPE_RESERVED: { + *pseClass = LTC4274_CLASSTYPE_RESERVED; + } break; + case LTC4274_CLASSTYPE_0: { + *pseClass = LTC4274_CLASSTYPE_0; + } break; + case LTC4274_OVERCURRENT: { + *pseClass = LTC4274_OVERCURRENT; + } break; + case LTC4274_LTEPOE_TYPE_52_7W: { + *pseClass = LTC4274_LTEPOE_TYPE_52_7W; + } break; + case LTC4274_LTEPOE_TYPE_70W: { + *pseClass = LTC4274_LTEPOE_TYPE_70W; + } break; + case LTC4274_LTEPOE_TYPE_90W: { + *pseClass = LTC4274_LTEPOE_TYPE_90W; + } break; + case LTC4274_LTEPOE_TYPE_38_7W: { + *pseClass = LTC4274_LTEPOE_TYPE_38_7W; + } break; + default: { + *pseClass = LTC4274_LTEPOE_RESERVED; + } } } - /****************************************************************************** * @fn _get_pse_detect_enum * @@ -475,48 +455,33 @@ static void _get_pse_class_enum(uint8_t val , ePSEClassType *pseClass) * * @return None */ -static void _get_pse_detect_enum(uint8_t val , ePSEDetection *pseDetect) +static void _get_pse_detect_enum(uint8_t val, ePSEDetection *pseDetect) { switch (val) { - case LTC4274_DETECT_UNKOWN: - { - *pseDetect = LTC4274_DETECT_UNKOWN; - } - break; - case LTC4274_SHORT_CIRCUIT: - { - *pseDetect = LTC4274_SHORT_CIRCUIT; - } - break; - case LTC4274_CPD_HIGH: - { - *pseDetect = LTC4274_CPD_HIGH; - } - break; - case LTC4274_RSIG_LOW: - { - *pseDetect = LTC4274_RSIG_LOW; - } - break; - case LTC4274_SIGNATURE_GOOD: - { - *pseDetect = LTC4274_SIGNATURE_GOOD; - } - break; - case LTC4274_RSIG_TOO_HIGH: - { - *pseDetect = LTC4274_RSIG_TOO_HIGH; - } - break; - case LTC4274_OPEN_CIRCUIT: - { - *pseDetect = LTC4274_OPEN_CIRCUIT; - } - break; - default: - { - *pseDetect = LTC4274_DETECT_ERROR; - } + case LTC4274_DETECT_UNKOWN: { + *pseDetect = LTC4274_DETECT_UNKOWN; + } break; + case LTC4274_SHORT_CIRCUIT: { + *pseDetect = LTC4274_SHORT_CIRCUIT; + } break; + case LTC4274_CPD_HIGH: { + *pseDetect = LTC4274_CPD_HIGH; + } break; + case LTC4274_RSIG_LOW: { + *pseDetect = LTC4274_RSIG_LOW; + } break; + case LTC4274_SIGNATURE_GOOD: { + *pseDetect = LTC4274_SIGNATURE_GOOD; + } break; + case LTC4274_RSIG_TOO_HIGH: { + *pseDetect = LTC4274_RSIG_TOO_HIGH; + } break; + case LTC4274_OPEN_CIRCUIT: { + *pseDetect = LTC4274_OPEN_CIRCUIT; + } break; + default: { + *pseDetect = LTC4274_DETECT_ERROR; + } } } /****************************************************************************** @@ -528,23 +493,24 @@ static void _get_pse_detect_enum(uint8_t val , ePSEDetection *pseDetect) * * @return ReturnStatus */ -ReturnStatus ltc4274_get_detection_status(const I2C_Dev *i2c_dev, ePSEDetection *pseDetect) +ReturnStatus ltc4274_get_detection_status(const I2C_Dev *i2c_dev, + ePSEDetection *pseDetect) { ReturnStatus status = RETURN_OK; uint8_t val = 0; - status = ltc4274_read( i2c_dev, LTC4274_REG_DETECT_EVENT, &val); + status = ltc4274_read(i2c_dev, LTC4274_REG_DETECT_EVENT, &val); if (status != RETURN_OK) { LOGGER("LTC4274:ERROR:: PSE detection status read failed.\n"); } if (!(LTC4274_DETECTION_COMPLETE(val))) { - *pseDetect =LTC4274_DETECT_ERROR; + *pseDetect = LTC4274_DETECT_ERROR; } else { - status = ltc4274_read( i2c_dev, LTC4274_REG_STATUS, &val); + status = ltc4274_read(i2c_dev, LTC4274_REG_STATUS, &val); if (status != RETURN_OK) { LOGGER("LTC4274:ERROR:: PSE detection code read failed.\n"); } val = LTC4374_DETECT(val); - _get_pse_detect_enum(val,pseDetect); + _get_pse_detect_enum(val, pseDetect); } return status; @@ -559,18 +525,19 @@ ReturnStatus ltc4274_get_detection_status(const I2C_Dev *i2c_dev, ePSEDetection * * @return ReturnStatus */ -ReturnStatus ltc4274_get_class_status(const I2C_Dev *i2c_dev, ePSEClassType *pseClass) +ReturnStatus ltc4274_get_class_status(const I2C_Dev *i2c_dev, + ePSEClassType *pseClass) { ReturnStatus status = RETURN_OK; uint8_t val = 0; - status = ltc4274_read( i2c_dev, LTC4274_REG_DETECT_EVENT, &val); + status = ltc4274_read(i2c_dev, LTC4274_REG_DETECT_EVENT, &val); if (status != RETURN_OK) { LOGGER("LTC4274:ERROR:: PSE class status read failed.\n"); } if (!(LTC4274_CLASSIFICATION_COMPLETE(val))) { *pseClass = LTC4274_CLASS_ERROR; } else { - status = ltc4274_read( i2c_dev, LTC4274_REG_STATUS, &val); + status = ltc4274_read(i2c_dev, LTC4274_REG_STATUS, &val); if (status != RETURN_OK) { LOGGER("LTC4274:ERROR:: PSE class code read failed.\n"); } @@ -589,14 +556,15 @@ ReturnStatus ltc4274_get_class_status(const I2C_Dev *i2c_dev, ePSEClassType *pse * * @return ReturnStatus */ -ReturnStatus ltc4274_get_powergood_status(const I2C_Dev *i2c_dev, uint8_t *psePwrGood) +ReturnStatus ltc4274_get_powergood_status(const I2C_Dev *i2c_dev, + uint8_t *psePwrGood) { ReturnStatus status = RETURN_OK; - status = ltc4274_read( i2c_dev, LTC4274_REG_POWER_STATUS, psePwrGood); + status = ltc4274_read(i2c_dev, LTC4274_REG_POWER_STATUS, psePwrGood); if (status != RETURN_OK) { LOGGER("LTC4274:ERROR:: PSE power good read failed.\n"); } - if(LTC4274_PWRGD(*psePwrGood)) { + if (LTC4274_PWRGD(*psePwrGood)) { *psePwrGood = LTC4274_POWERGOOD; } else { *psePwrGood = LTC4274_POWERGOOD_NOTOK; @@ -604,16 +572,15 @@ ReturnStatus ltc4274_get_powergood_status(const I2C_Dev *i2c_dev, uint8_t *psePw return status; } - - - /***************************************************************************** * Internal IRQ handler - reads in triggered interrupts and dispatches CBs *****************************************************************************/ -static void ltc4274_handle_irq(void *context) { +static void ltc4274_handle_irq(void *context) +{ LTC4274_Dev *dev = context; uint8_t alertVal; - if (ltc4274_get_interrupt_status(&dev->cfg.i2c_dev, &alertVal) != RETURN_OK) { + if (ltc4274_get_interrupt_status(&dev->cfg.i2c_dev, &alertVal) != + RETURN_OK) { /* Something really strange happened */ return; } @@ -621,58 +588,40 @@ static void ltc4274_handle_irq(void *context) { if (!dev->obj.alert_cb) { return; } - switch(alertVal) { - case LTC4274_EVT_SUPPLY: - { - dev->obj.alert_cb(LTC4274_EVT_SUPPLY, dev->obj.cb_context); - } - break; - case LTC4274_EVT_TSTART: - { - dev->obj.alert_cb(LTC4274_EVT_TSTART, dev->obj.cb_context); - } - break; - case LTC4274_EVT_TCUT: - { - dev->obj.alert_cb(LTC4274_EVT_TCUT, dev->obj.cb_context); - } - break; - case LTC4274_EVT_CLASS: - { - dev->obj.alert_cb(LTC4274_EVT_CLASS, dev->obj.cb_context); - } - break; - case LTC4274_EVT_DETECTION: - { - dev->obj.alert_cb(LTC4274_EVT_DETECTION, dev->obj.cb_context); - } - break; - case LTC4274_EVT_DISCONNECT: - { - dev->obj.alert_cb(LTC4274_EVT_DISCONNECT, dev->obj.cb_context); - } - break; - case LTC4274_EVT_POWERGOOD: - { - dev->obj.alert_cb(LTC4274_EVT_POWERGOOD, dev->obj.cb_context); - } - break; - case LTC4274_EVT_POWER_ENABLE: - { - dev->obj.alert_cb(LTC4274_EVT_POWER_ENABLE, dev->obj.cb_context); - } - break; - default: - { - dev->obj.alert_cb(LTC4274_EVT_NONE, dev->obj.cb_context); - } - + switch (alertVal) { + case LTC4274_EVT_SUPPLY: { + dev->obj.alert_cb(LTC4274_EVT_SUPPLY, dev->obj.cb_context); + } break; + case LTC4274_EVT_TSTART: { + dev->obj.alert_cb(LTC4274_EVT_TSTART, dev->obj.cb_context); + } break; + case LTC4274_EVT_TCUT: { + dev->obj.alert_cb(LTC4274_EVT_TCUT, dev->obj.cb_context); + } break; + case LTC4274_EVT_CLASS: { + dev->obj.alert_cb(LTC4274_EVT_CLASS, dev->obj.cb_context); + } break; + case LTC4274_EVT_DETECTION: { + dev->obj.alert_cb(LTC4274_EVT_DETECTION, dev->obj.cb_context); + } break; + case LTC4274_EVT_DISCONNECT: { + dev->obj.alert_cb(LTC4274_EVT_DISCONNECT, dev->obj.cb_context); + } break; + case LTC4274_EVT_POWERGOOD: { + dev->obj.alert_cb(LTC4274_EVT_POWERGOOD, dev->obj.cb_context); + } break; + case LTC4274_EVT_POWER_ENABLE: { + dev->obj.alert_cb(LTC4274_EVT_POWER_ENABLE, dev->obj.cb_context); + } break; + default: { + dev->obj.alert_cb(LTC4274_EVT_NONE, dev->obj.cb_context); + } } } /***************************************************************************** *****************************************************************************/ void ltc4274_set_alert_handler(LTC4274_Dev *dev, LTC4274_CallbackFn alert_cb, - void *cb_context) + void *cb_context) { dev->obj.alert_cb = alert_cb; dev->obj.cb_context = cb_context; @@ -687,38 +636,36 @@ void ltc4274_set_alert_handler(LTC4274_Dev *dev, LTC4274_CallbackFn alert_cb, * * @return ReturnStatus */ -ReturnStatus ltc4274_clear_interrupt( const I2C_Dev *i2c_dev, - uint8_t *pwrEvent, - uint8_t *overCurrent, - uint8_t *supply) +ReturnStatus ltc4274_clear_interrupt(const I2C_Dev *i2c_dev, uint8_t *pwrEvent, + uint8_t *overCurrent, uint8_t *supply) { ReturnStatus status = RETURN_OK; - status = ltc4274_read( i2c_dev, LTC4274_REG_POWER_EVENT_COR, pwrEvent); + status = ltc4274_read(i2c_dev, LTC4274_REG_POWER_EVENT_COR, pwrEvent); if (status != RETURN_OK) { LOGGER("LTC4274:ERROR:: Reading power good for PSE failed.\n"); } /*Bit 4 for power good and bit 0 for power event*/ LOGGER("PSELTC4274::INFO:: PSE power Good Info and Power ecent info is read with 0x%x.\n", - *pwrEvent); + *pwrEvent); /* if it is due to over current*/ - status = ltc4274_read( i2c_dev, LTC4274_REG_START_EVENT_COR, overCurrent); + status = ltc4274_read(i2c_dev, LTC4274_REG_START_EVENT_COR, overCurrent); if (status != RETURN_OK) { LOGGER("LTC4274:ERROR::Reading power good for PSE failed.\n"); } LOGGER("PSELTC4274::INFO:: PSE power Good Info and Power ecent info is read with 0x%x.\n", - *overCurrent); + *overCurrent); /* if its due to supply */ - status = ltc4274_read( i2c_dev, LTC4274_REG_SUPPLY_EVENT_COR, supply); + status = ltc4274_read(i2c_dev, LTC4274_REG_SUPPLY_EVENT_COR, supply); if (status != RETURN_OK) { LOGGER("LTC4274:ERROR::Reading power good for PSE failed.\n"); } LOGGER("PSELTC4274::INFO:: PSE power Good Info and Power ecent info is read with 0x%x.\n", - *supply); + *supply); return status; } @@ -736,10 +683,9 @@ ReturnStatus ltc4274_get_interrupt_status(const I2C_Dev *i2c_dev, uint8_t *val) { ReturnStatus status = RETURN_OK; uint8_t interruptVal = 0; - status = ltc4274_read( i2c_dev, LTC4274_REG_INTERRUPT_STATUS, &interruptVal); + status = ltc4274_read(i2c_dev, LTC4274_REG_INTERRUPT_STATUS, &interruptVal); if (status != RETURN_OK) { LOGGER("PSELTC4274: ERROR:Reading power good for PSE failed.\n"); - } LOGGER("PSELTC4274::INFO: PSE interrupt state is 0x%x.\n", interruptVal); *val = interruptVal; @@ -755,15 +701,15 @@ ReturnStatus ltc4274_get_interrupt_status(const I2C_Dev *i2c_dev, uint8_t *val) * * @return ReturnStatus */ -ReturnStatus ltc4274_debug_write(const I2C_Dev *i2c_dev, - uint8_t reg_address, uint8_t value) +ReturnStatus ltc4274_debug_write(const I2C_Dev *i2c_dev, uint8_t reg_address, + uint8_t value) { ReturnStatus status = RETURN_OK; /*Enbale high power feature */ - status = ltc4274_write( i2c_dev, reg_address, value); + status = ltc4274_write(i2c_dev, reg_address, value); if (status != RETURN_OK) { LOGGER("LTC4274:ERROR:: Debug write command for reg 0x%x failed.\n", - reg_address); + reg_address); } return status; } @@ -777,20 +723,19 @@ ReturnStatus ltc4274_debug_write(const I2C_Dev *i2c_dev, * * @return ReturnStatus */ -ReturnStatus ltc4274_debug_read(const I2C_Dev *i2c_dev, - uint8_t reg_address, uint8_t *value) +ReturnStatus ltc4274_debug_read(const I2C_Dev *i2c_dev, uint8_t reg_address, + uint8_t *value) { ReturnStatus status = RETURN_OK; /*Enbale high power feature */ - status = ltc4274_read( i2c_dev, reg_address, value); + status = ltc4274_read(i2c_dev, reg_address, value); if (status != RETURN_OK) { LOGGER("LTC4274:ERROR:: Debug read command for reg 0x%x failed.\n", - reg_address); + reg_address); } return status; } - /****************************************************************************** * @fn ltc4274_enable * @@ -800,7 +745,7 @@ ReturnStatus ltc4274_debug_read(const I2C_Dev *i2c_dev, * * @return void */ -void ltc4274_enable(LTC4274_Dev* dev, uint8_t enableVal) +void ltc4274_enable(LTC4274_Dev *dev, uint8_t enableVal) { if (enableVal) { OcGpio_write(&dev->cfg.reset_pin, false); @@ -818,11 +763,10 @@ void ltc4274_enable(LTC4274_Dev* dev, uint8_t enableVal) * * @return ReturnStatus */ -ReturnStatus ltc4274_get_devid(const I2C_Dev *i2c_dev, - uint8_t *devID) +ReturnStatus ltc4274_get_devid(const I2C_Dev *i2c_dev, uint8_t *devID) { ReturnStatus ret = RETURN_OK; - ret = ltc4274_read(i2c_dev,LTC4274_REG_ID,devID); + ret = ltc4274_read(i2c_dev, LTC4274_REG_ID, devID); if (ret != RETURN_OK) { LOGGER("LTC4274:ERROR:: Reading Device Id for PSE failed.\n"); } @@ -839,22 +783,21 @@ ReturnStatus ltc4274_get_devid(const I2C_Dev *i2c_dev, * * @return ReturnStatus */ -ReturnStatus ltc4274_detect(const I2C_Dev *i2c_dev, - uint8_t *detect, uint8_t *val) +ReturnStatus ltc4274_detect(const I2C_Dev *i2c_dev, uint8_t *detect, + uint8_t *val) { ReturnStatus status = RETURN_OK; *val = 0; - status = ltc4274_read( i2c_dev, LTC4274_REG_DETECT_EVENT, detect); + status = ltc4274_read(i2c_dev, LTC4274_REG_DETECT_EVENT, detect); if (status != RETURN_OK) { LOGGER("LTC4274:ERROR::Reading PSE port detection failed.\n"); return status; } LOGGER("PSELTC4274::Reading PSE port detection done.\n"); - status = ltc4274_read( i2c_dev, LTC4274_REG_STATUS, val); + status = ltc4274_read(i2c_dev, LTC4274_REG_STATUS, val); if (status != RETURN_OK) { LOGGER("LTC4274:ERROR::Reading PSE port classificatin failed.\n"); - } LOGGER("PSELTC4274::Reading PSE port classification is 0x%x.\n", *val); @@ -873,10 +816,10 @@ ReturnStatus ltc4274_detect(const I2C_Dev *i2c_dev, *****************************************************************************/ void ltc4274_config(LTC4274_Dev *dev) { - OcGpio_configure(&dev->cfg.reset_pin, OCGPIO_CFG_OUTPUT | - OCGPIO_CFG_OUT_HIGH); + OcGpio_configure(&dev->cfg.reset_pin, + OCGPIO_CFG_OUTPUT | OCGPIO_CFG_OUT_HIGH); //Enable PSE device. - ltc4274_enable(dev,true); + ltc4274_enable(dev, true); } /***************************************************************************** @@ -897,12 +840,13 @@ ePostCode ltc4274_probe(const LTC4274_Dev *dev, POSTData *postData) status = ltc4274_get_devid(&dev->cfg.i2c_dev, &devId); if (status != RETURN_OK) { postcode = POST_DEV_MISSING; - } else if (devId == LTC4274_DEV_ID){ + } else if (devId == LTC4274_DEV_ID) { postcode = POST_DEV_FOUND; } else { postcode = POST_DEV_ID_MISMATCH; } - post_update_POSTData(postData, dev->cfg.i2c_dev.bus, dev->cfg.i2c_dev.slave_addr,0xFF, devId); + post_update_POSTData(postData, dev->cfg.i2c_dev.bus, + dev->cfg.i2c_dev.slave_addr, 0xFF, devId); return postcode; } @@ -920,12 +864,10 @@ ReturnStatus ltc4274_reset(LTC4274_Dev *dev) { ReturnStatus status = RETURN_OK; - OcGpio_write(&dev->cfg.reset_pin, true); Task_sleep(100); OcGpio_write(&dev->cfg.reset_pin, false); - return status; } @@ -938,39 +880,36 @@ ReturnStatus ltc4274_reset(LTC4274_Dev *dev) * * @return ReturnStatus */ -ReturnStatus ltc4274_default_cfg( const I2C_Dev *i2c_dev, - uint8_t operatingMode, - uint8_t detectEnable, - uint8_t intrMask, - uint8_t interruptEnable, - uint8_t hpEnable) +ReturnStatus ltc4274_default_cfg(const I2C_Dev *i2c_dev, uint8_t operatingMode, + uint8_t detectEnable, uint8_t intrMask, + uint8_t interruptEnable, uint8_t hpEnable) { ReturnStatus ret = RETURN_OK; - ret = ltc4274_set_cfg_operation_mode(i2c_dev,operatingMode); + ret = ltc4274_set_cfg_operation_mode(i2c_dev, operatingMode); if (ret != RETURN_OK) { LOGGER("LTC4274::ERROR: PSE operational mode setting mode failed.\n"); return ret; } - ret = ltc4274_set_cfg_detect_enable(i2c_dev,detectEnable); + ret = ltc4274_set_cfg_detect_enable(i2c_dev, detectEnable); if (ret != RETURN_OK) { LOGGER("LTC4274::ERROR: PSE detection and classification enable failed.\n"); return ret; } - ret = ltc4274_set_interrupt_mask(i2c_dev,intrMask); + ret = ltc4274_set_interrupt_mask(i2c_dev, intrMask); if (ret != RETURN_OK) { LOGGER("LTC4274::ERROR:PSE interrupts mask enable failed.\n"); return ret; } - ret = ltc4274_cfg_interrupt_enable(i2c_dev,interruptEnable); + ret = ltc4274_cfg_interrupt_enable(i2c_dev, interruptEnable); if (ret != RETURN_OK) { LOGGER("LTC4274::ERROR: PSE interrupt enable failed.\n"); return ret; } - ret = ltc4274_set_cfg_pshp_feature(i2c_dev,hpEnable); + ret = ltc4274_set_cfg_pshp_feature(i2c_dev, hpEnable); if (ret != RETURN_OK) { LOGGER("LTC4274::ERROR: PSE configured for LTEPOE++.\n"); return ret; @@ -988,7 +927,7 @@ ReturnStatus ltc4274_default_cfg( const I2C_Dev *i2c_dev, ** RETURN TYPE : ReturnStatus ** *****************************************************************************/ -void ltc4274_init(LTC4274_Dev *dev) +void ltc4274_init(LTC4274_Dev *dev) { dev->obj = (LTC4274_Obj){}; @@ -1002,7 +941,7 @@ void ltc4274_init(LTC4274_Dev *dev) if (dev->cfg.pin_evt) { const uint32_t pin_evt_cfg = OCGPIO_CFG_INPUT | OCGPIO_CFG_INT_FALLING; if (OcGpio_configure(dev->cfg.pin_evt, pin_evt_cfg) < OCGPIO_SUCCESS) { - return ; + return; } /* Use a threaded interrupt to handle IRQ */ @@ -1019,7 +958,7 @@ void ltc4274_init(LTC4274_Dev *dev) ** RETURN TYPE : ReturnStatus ** *****************************************************************************/ -void ltc4274_initPSEStateInfo(void) +void ltc4274_initPSEStateInfo(void) { PSEStatus_Info.pseStatus.detectStatus = LTC4274_DETECT_UNKOWN; PSEStatus_Info.pseStatus.classStatus = LTC4274_CLASSTYPE_UNKOWN; @@ -1040,8 +979,8 @@ void ltc4274_initPSEStateInfo(void) void ltc4274_update_stateInfo(const I2C_Dev *i2c_dev) { ReturnStatus status = RETURN_OK; - status = ltc4274_get_powergood_status( i2c_dev, - &PSEStatus_Info.pseStatus.powerGoodStatus); + status = ltc4274_get_powergood_status( + i2c_dev, &PSEStatus_Info.pseStatus.powerGoodStatus); if (status != RETURN_OK) { LOGGER("PDLTC4275::ERROR: Power good signal read failed.\n"); PSEStatus_Info.pseStatus.detectStatus = LTC4274_DETECT_UNKOWN; @@ -1050,7 +989,8 @@ void ltc4274_update_stateInfo(const I2C_Dev *i2c_dev) return; } if (PSEStatus_Info.pseStatus.powerGoodStatus == LTC4274_POWERGOOD) { - status = ltc4274_get_detection_status(i2c_dev, &PSEStatus_Info.pseStatus.detectStatus); + status = ltc4274_get_detection_status( + i2c_dev, &PSEStatus_Info.pseStatus.detectStatus); if (status != RETURN_OK) { LOGGER("PDLTC4275::ERROR: Reading PSE detection failed.\n"); PSEStatus_Info.pseStatus.detectStatus = LTC4274_DETECT_UNKOWN; @@ -1058,7 +998,8 @@ void ltc4274_update_stateInfo(const I2C_Dev *i2c_dev) PSEStatus_Info.psealert = LTC4274_DISCONNECT_ALERT; return; } - status = ltc4274_get_class_status(i2c_dev, &PSEStatus_Info.pseStatus.classStatus); + status = ltc4274_get_class_status( + i2c_dev, &PSEStatus_Info.pseStatus.classStatus); if (status != RETURN_OK) { LOGGER("PDLTC4275::ERROR: Reading PSE classification failed.\n"); PSEStatus_Info.pseStatus.detectStatus = LTC4274_DETECT_UNKOWN; @@ -1066,7 +1007,8 @@ void ltc4274_update_stateInfo(const I2C_Dev *i2c_dev) PSEStatus_Info.psealert = LTC4274_DISCONNECT_ALERT; return; } - status = ltc4274_get_interrupt_status(i2c_dev, &PSEStatus_Info.psealert); + status = + ltc4274_get_interrupt_status(i2c_dev, &PSEStatus_Info.psealert); if (status != RETURN_OK) { LOGGER("PDLTC4275::ERROR: Reading PSE detection failed.\n"); PSEStatus_Info.pseStatus.detectStatus = LTC4274_DETECT_UNKOWN; diff --git a/firmware/ec/src/devices/ltc4275.c b/firmware/ec/src/devices/ltc4275.c index 208d36e278..08470314c0 100644 --- a/firmware/ec/src/devices/ltc4275.c +++ b/firmware/ec/src/devices/ltc4275.c @@ -24,7 +24,6 @@ tPower_PDStatus_Info PDStatus_Info; - /****************************************************************************** * @fn ltc4275_handle_irq * @@ -34,12 +33,15 @@ tPower_PDStatus_Info PDStatus_Info; * * @return None */ -static void ltc4275_handle_irq(void *context) { +static void ltc4275_handle_irq(void *context) +{ LTC4275_Dev *dev = context; - const IArg mutexKey = GateMutex_enter(dev->obj.mutex); { + const IArg mutexKey = GateMutex_enter(dev->obj.mutex); + { ltc4275_update_status(dev); - } GateMutex_leave(dev->obj.mutex, mutexKey); + } + GateMutex_leave(dev->obj.mutex, mutexKey); /* See if we have a callback assigned to handle alerts */ if (!dev->obj.alert_cb) { @@ -90,7 +92,7 @@ ePostCode ltc4275_probe(const LTC4275_Dev *dev, POSTData *postData) LOGGER("LTC4275::ERROR: Power good signal read failed.\n"); return postCode; } - if (pdStatus == LTC4275_POWERGOOD ) { + if (pdStatus == LTC4275_POWERGOOD) { PDStatus_Info.pdStatus.classStatus = LTC4275_CLASSTYPE_UNKOWN; PDStatus_Info.pdStatus.powerGoodStatus = LTC4275_POWERGOOD; PDStatus_Info.state = LTC4275_STATE_NOTOK; @@ -102,7 +104,7 @@ ePostCode ltc4275_probe(const LTC4275_Dev *dev, POSTData *postData) PDStatus_Info.state = LTC4275_STATE_NOTOK; PDStatus_Info.pdalert = LTC4275_DISCONNECT_ALERT; } - post_update_POSTData(postData, 0xFF,0xFF,0xFF,0xFF); + post_update_POSTData(postData, 0xFF, 0xFF, 0xFF, 0xFF); return postCode; } @@ -142,7 +144,8 @@ ReturnStatus ltc4275_init(LTC4275_Dev *dev) } if (dev->cfg.pin_evt) { - const uint32_t pin_evt_cfg = OCGPIO_CFG_INPUT | OCGPIO_CFG_INT_BOTH_EDGES ; + const uint32_t pin_evt_cfg = + OCGPIO_CFG_INPUT | OCGPIO_CFG_INT_BOTH_EDGES; if (OcGpio_configure(dev->cfg.pin_evt, pin_evt_cfg) < OCGPIO_SUCCESS) { return RETURN_NOTOK; } @@ -163,7 +166,7 @@ ReturnStatus ltc4275_init(LTC4275_Dev *dev) * @return None */ void ltc4275_set_alert_handler(LTC4275_Dev *dev, LTC4275_CallbackFn alert_cb, - void *cb_context) + void *cb_context) { dev->obj.alert_cb = alert_cb; dev->obj.cb_context = cb_context; @@ -185,9 +188,8 @@ ReturnStatus ltc4275_get_power_good(const LTC4275_Dev *dev, ePDPowerState *val) *val = LTC4275_POWERGOOD_NOTOK; /* Check Power Good */ - *val = (ePDPowerState) OcGpio_read(dev->cfg.pin_evt); - if(*val == 0) - { + *val = (ePDPowerState)OcGpio_read(dev->cfg.pin_evt); + if (*val == 0) { *val = LTC4275_POWERGOOD; } DEBUG("LTC4275:INFO:: PD power good is %d.\n", *val); @@ -245,7 +247,7 @@ ReturnStatus ltc4275_get_class(const LTC4275_Dev *dev, ePDClassType *val) void ltc4275_update_status(const LTC4275_Dev *dev) { ReturnStatus ret = RETURN_NOTOK; - ret = ltc4275_get_power_good(dev,&PDStatus_Info.pdStatus.powerGoodStatus); + ret = ltc4275_get_power_good(dev, &PDStatus_Info.pdStatus.powerGoodStatus); if (ret != RETURN_OK) { LOGGER("LTC4275::ERROR: Power good signal read failed.\n"); return; diff --git a/firmware/ec/src/devices/ocmp_wrappers/ocmp_adt7481.c b/firmware/ec/src/devices/ocmp_wrappers/ocmp_adt7481.c index 37e161672b..8688476ab9 100644 --- a/firmware/ec/src/devices/ocmp_wrappers/ocmp_adt7481.c +++ b/firmware/ec/src/devices/ocmp_wrappers/ocmp_adt7481.c @@ -27,8 +27,8 @@ typedef enum Adt7481SAlert { ADT7481_ALERT_CRITICAL } Adt7481SAlert; -static bool _get_status(void *driver, unsigned int param_id, - void *return_buf) { +static bool _get_status(void *driver, unsigned int param_id, void *return_buf) +{ switch (param_id) { case ADT7481_STATUS_TEMPERATURE: { int8_t *res = return_buf; @@ -44,15 +44,15 @@ static bool _get_status(void *driver, unsigned int param_id, return false; } -static bool _get_config(void *driver, unsigned int param_id, - void *return_buf) { +static bool _get_config(void *driver, unsigned int param_id, void *return_buf) +{ switch (param_id) { case ADT7481_CONFIG_LIM_LOW: case ADT7481_CONFIG_LIM_HIGH: case ADT7481_CONFIG_LIM_CRIT: { int8_t *res = return_buf; - if (adt7481_get_remote2_temp_limit(driver, param_id + 1, res) - == RETURN_OK) { + if (adt7481_get_remote2_temp_limit(driver, param_id + 1, res) == + RETURN_OK) { return true; } break; @@ -64,15 +64,15 @@ static bool _get_config(void *driver, unsigned int param_id, return false; } -static bool _set_config(void *driver, unsigned int param_id, - const void *data) { +static bool _set_config(void *driver, unsigned int param_id, const void *data) +{ switch (param_id) { case ADT7481_CONFIG_LIM_LOW: case ADT7481_CONFIG_LIM_HIGH: case ADT7481_CONFIG_LIM_CRIT: { const int8_t *limit = data; - if (adt7481_set_remote2_temp_limit(driver, param_id + 1, *limit) - == RETURN_OK) { + if (adt7481_set_remote2_temp_limit(driver, param_id + 1, *limit) == + RETURN_OK) { return true; } break; @@ -86,7 +86,7 @@ static bool _set_config(void *driver, unsigned int param_id, static ePostCode _probe(void *driver, POSTData *postData) { - return adt7481_probe(driver,postData); + return adt7481_probe(driver, postData); } // alert_token currently intentionally unused, so disabling unused-parameter @@ -102,22 +102,22 @@ static ePostCode _init(void *driver, const void *config, } for (size_t i = 0; i < ARRAY_SIZE(adt7481_config->limits); ++i) { if (adt7481_set_local_temp_limit( - driver, i + 1, adt7481_config->limits[i]) != RETURN_OK || + driver, i + 1, adt7481_config->limits[i]) != RETURN_OK || adt7481_set_remote1_temp_limit( - driver, i + 1, adt7481_config->limits[i]) != RETURN_OK || + driver, i + 1, adt7481_config->limits[i]) != RETURN_OK || adt7481_set_remote2_temp_limit( - driver, i + 1, adt7481_config->limits[i]) != RETURN_OK) { + driver, i + 1, adt7481_config->limits[i]) != RETURN_OK) { return POST_DEV_CFG_FAIL; } } - if (adt7481_set_config1(driver, ADT7481_CONFIGURATION_REG_VALUE) - != RETURN_OK) { + if (adt7481_set_config1(driver, ADT7481_CONFIGURATION_REG_VALUE) != + RETURN_OK) { return POST_DEV_CFG_FAIL; } - if (adt7481_set_conv_rate(driver, ADT7481_CONVERSION_RATE_REG_VALUE) - != RETURN_OK) { + if (adt7481_set_conv_rate(driver, ADT7481_CONVERSION_RATE_REG_VALUE) != + RETURN_OK) { return POST_DEV_CFG_FAIL; } @@ -129,9 +129,7 @@ static ePostCode _init(void *driver, const void *config, /* TODO: enable alerts (requires major ADT driver changes) */ const Driver_fxnTable ADT7481_fxnTable = { /* Message handlers */ - .cb_probe = _probe, - .cb_init = _init, - .cb_get_status = _get_status, - .cb_get_config = _get_config, + .cb_probe = _probe, .cb_init = _init, + .cb_get_status = _get_status, .cb_get_config = _get_config, .cb_set_config = _set_config, }; diff --git a/firmware/ec/src/devices/ocmp_wrappers/ocmp_cat24c04.c b/firmware/ec/src/devices/ocmp_wrappers/ocmp_cat24c04.c index 68609e885e..722fabab88 100644 --- a/firmware/ec/src/devices/ocmp_wrappers/ocmp_cat24c04.c +++ b/firmware/ec/src/devices/ocmp_wrappers/ocmp_cat24c04.c @@ -14,8 +14,7 @@ #include -static bool _sid_get_status_parameters_data(void *driver, - unsigned int param, +static bool _sid_get_status_parameters_data(void *driver, unsigned int param, void *data); /***************************************************************************** ** FUNCTION NAME : _sid_get_status_parameters_data @@ -27,32 +26,26 @@ static bool _sid_get_status_parameters_data(void *driver, ** RETURN TYPE : Success or Failure ** *****************************************************************************/ -static bool _sid_get_status_parameters_data(void *driver, - unsigned int param, +static bool _sid_get_status_parameters_data(void *driver, unsigned int param, void *data) { const eOCStatusParamId paramIndex = (eOCStatusParamId)param; - const Eeprom_Cfg *cfg = ( Eeprom_Cfg*)driver; + const Eeprom_Cfg *cfg = (Eeprom_Cfg *)driver; ReturnStatus status = RETURN_OK; switch (paramIndex) { - case OC_STAT_SYS_SERIAL_ID: - { + case OC_STAT_SYS_SERIAL_ID: { memset(data, '\0', OC_CONNECT1_SERIAL_SIZE + 1); status = eeprom_read_oc_info(data); - LOGGER_DEBUG("SYS:INFO:::: OC Connect1 serial id %s.\n", - data); + LOGGER_DEBUG("SYS:INFO:::: OC Connect1 serial id %s.\n", data); break; } - case OC_STAT_SYS_GBC_BOARD_ID: - { + case OC_STAT_SYS_GBC_BOARD_ID: { memset(data, '\0', OC_GBC_BOARD_INFO_SIZE + 1); status = eeprom_read_board_info(cfg, data); - LOGGER_DEBUG("SYS:INFO:::: OC Connect1 GBC board is %s.\n", - data); + LOGGER_DEBUG("SYS:INFO:::: OC Connect1 GBC board is %s.\n", data); break; } - default: - { + default: { status = RETURN_NOTOK; } } @@ -70,11 +63,12 @@ static bool _sid_get_status_parameters_data(void *driver, ** *****************************************************************************/ bool Sdr_InventoryGetStatus(void *driver, unsigned int param_id, - void *return_buf) { - const Eeprom_Cfg *cfg = ( Eeprom_Cfg*)driver; + void *return_buf) +{ + const Eeprom_Cfg *cfg = (Eeprom_Cfg *)driver; switch (param_id) { case 0: /* TODO: gross magic number */ - memset(return_buf,'\0', OC_SDR_BOARD_INFO_SIZE + 1); + memset(return_buf, '\0', OC_SDR_BOARD_INFO_SIZE + 1); if (eeprom_read_board_info(cfg, return_buf) == RETURN_OK) { return true; } @@ -97,13 +91,13 @@ bool Sdr_InventoryGetStatus(void *driver, unsigned int param_id, ** *****************************************************************************/ bool RFFE_InventoryGetStatus(void *driver, unsigned int param_id, - void *return_buf) { + void *return_buf) +{ const Eeprom_Cfg *cfg = (Eeprom_Cfg *)driver; switch (param_id) { case 0: /* TODO: gross magic number */ memset(return_buf, '\0', OC_RFFE_BOARD_INFO_SIZE + 1); - if (eeprom_read_board_info(cfg, return_buf) - == RETURN_OK) { + if (eeprom_read_board_info(cfg, return_buf) == RETURN_OK) { return true; } LOGGER_DEBUG("RFFE:INFO:: Board id: %s\n", return_buf); @@ -137,23 +131,22 @@ static ePostCode _init_eeprom(void *driver, const void **config, const Driver_fxnTable CAT24C04_gbc_sid_fxnTable = { /* Message handlers */ - .cb_init = _init_eeprom, - .cb_get_status = _sid_get_status_parameters_data, + .cb_init = _init_eeprom, + .cb_get_status = _sid_get_status_parameters_data, }; -const Driver_fxnTable CAT24C04_gbc_inv_fxnTable= { +const Driver_fxnTable CAT24C04_gbc_inv_fxnTable = { .cb_init = _init_eeprom, }; const Driver_fxnTable CAT24C04_sdr_inv_fxnTable = { /* Message handlers */ - .cb_init = _init_eeprom, - .cb_get_status = Sdr_InventoryGetStatus, + .cb_init = _init_eeprom, + .cb_get_status = Sdr_InventoryGetStatus, }; const Driver_fxnTable CAT24C04_fe_inv_fxnTable = { /* Message handlers */ - .cb_init = _init_eeprom, - .cb_get_status = RFFE_InventoryGetStatus, + .cb_init = _init_eeprom, + .cb_get_status = RFFE_InventoryGetStatus, }; - diff --git a/firmware/ec/src/devices/ocmp_wrappers/ocmp_dat-xxr5a-pp.c b/firmware/ec/src/devices/ocmp_wrappers/ocmp_dat-xxr5a-pp.c index e9826ae1ed..e8f35d6a7e 100644 --- a/firmware/ec/src/devices/ocmp_wrappers/ocmp_dat-xxr5a-pp.c +++ b/firmware/ec/src/devices/ocmp_wrappers/ocmp_dat-xxr5a-pp.c @@ -21,17 +21,15 @@ typedef enum DatConfig { DAT_CONFIG_ATTENUATION = 0, } DatConfig; -static bool _get_config(void *driver, unsigned int param_id, - void *return_buf) { +static bool _get_config(void *driver, unsigned int param_id, void *return_buf) +{ bool ret = false; switch (param_id) { case DAT_CONFIG_ATTENUATION: { DATR5APP_Cfg *cfg = driver; uint8_t atten; - const PinGroup pin_group = { - .num_pin = DATR5APP_PIN_COUNT, - .pins = cfg->pin_group - }; + const PinGroup pin_group = { .num_pin = DATR5APP_PIN_COUNT, + .pins = cfg->pin_group }; if (PinGroup_read(&pin_group, &atten) != RETURN_OK) { ret = false; } else { @@ -64,17 +62,15 @@ static bool _set_attenuation(void *driver, int16_t atten) /* Disable input latch */ OcGpio_write(&cfg->pin_le, false); /* Attenuation enable */ - // OcGpio_write(&cfg->pin_tx_attn_enb, true); + // OcGpio_write(&cfg->pin_tx_attn_enb, true); /* Set the attenuation value */ /* TODO: value is provided as x2, so 0.5 value is bit 0, consider * changing, at least on CLI to more intuitive interface */ - const PinGroup pin_group = { - .num_pin = DATR5APP_PIN_COUNT, - .pins = cfg->pin_group - }; + const PinGroup pin_group = { .num_pin = DATR5APP_PIN_COUNT, + .pins = cfg->pin_group }; - if (PinGroup_write(&pin_group, atten) != RETURN_OK) { + if (PinGroup_write(&pin_group, atten) != RETURN_OK) { return false; } @@ -88,8 +84,8 @@ static bool _set_attenuation(void *driver, int16_t atten) return true; } -static bool _set_config(void *driver, unsigned int param_id, - const void *data) { +static bool _set_config(void *driver, unsigned int param_id, const void *data) +{ switch (param_id) { case DAT_CONFIG_ATTENUATION: { return _set_attenuation(driver, *(int16_t *)data); @@ -106,10 +102,8 @@ static ePostCode _probe(void *driver) * assume that reading from the pin will tell us if the pin is working */ DATR5APP_Cfg *cfg = driver; uint8_t atten; - const PinGroup pin_group = { - .num_pin = DATR5APP_PIN_COUNT, - .pins = cfg->pin_group - }; + const PinGroup pin_group = { .num_pin = DATR5APP_PIN_COUNT, + .pins = cfg->pin_group }; if (PinGroup_read(&pin_group, &atten) != RETURN_OK) { return POST_DEV_MISSING; } @@ -122,15 +116,14 @@ static ePostCode _init(void *driver, const void *config, { DATR5APP_Cfg *cfg = (DATR5APP_Cfg *)driver; DATR5APP_Config *cfg_atten = (DATR5APP_Config *)config; - PinGroup pin_group = { - .num_pin = DATR5APP_PIN_COUNT, - .pins = cfg->pin_group - }; + PinGroup pin_group = { .num_pin = DATR5APP_PIN_COUNT, + .pins = cfg->pin_group }; if (OcGpio_configure(&cfg->pin_le, OCGPIO_CFG_OUTPUT) < OCGPIO_SUCCESS) { return POST_DEV_CFG_FAIL; } - if (PinGroup_configure(&pin_group, OCGPIO_CFG_OUTPUT | OCGPIO_CFG_OUT_HIGH) - != RETURN_OK) { + if (PinGroup_configure(&pin_group, + OCGPIO_CFG_OUTPUT | OCGPIO_CFG_OUT_HIGH) != + RETURN_OK) { return POST_DEV_CFG_FAIL; } @@ -139,11 +132,9 @@ static ePostCode _init(void *driver, const void *config, return POST_DEV_CFG_DONE; } -const Driver_fxnTable DATXXR5APP_fxnTable = { +const Driver_fxnTable DATXXR5APP_fxnTable = { /* Message handlers */ - .cb_probe = _probe, - .cb_init = _init, - .cb_get_status = NULL, - .cb_get_config = _get_config, + .cb_probe = _probe, .cb_init = _init, + .cb_get_status = NULL, .cb_get_config = _get_config, .cb_set_config = _set_config, }; diff --git a/firmware/ec/src/devices/ocmp_wrappers/ocmp_debugi2c.c b/firmware/ec/src/devices/ocmp_wrappers/ocmp_debugi2c.c index a6e3c75584..bb271bb075 100644 --- a/firmware/ec/src/devices/ocmp_wrappers/ocmp_debugi2c.c +++ b/firmware/ec/src/devices/ocmp_wrappers/ocmp_debugi2c.c @@ -12,26 +12,27 @@ #include "common/inc/global/Framework.h" #include "inc/common/global_header.h" #include "inc/common/i2cbus.h" -#include "inc/devices/debug_oci2c.h" - +#include "inc/devices/debug_oci2c.h" /* TI-RTOS driver files */ #include -bool i2c_read(void* i2c_cfg, void *oci2c ) +bool i2c_read(void *i2c_cfg, void *oci2c) { - S_I2C_Cfg* s_oc_i2c_cfg = (S_I2C_Cfg*)i2c_cfg; - S_OCI2C* s_oci2c = (S_OCI2C*)oci2c; + S_I2C_Cfg *s_oc_i2c_cfg = (S_I2C_Cfg *)i2c_cfg; + S_OCI2C *s_oci2c = (S_OCI2C *)oci2c; I2C_Handle i2cHandle = i2c_open_bus(s_oc_i2c_cfg->bus); - return (i2c_reg_read(i2cHandle, s_oci2c->slaveAddress, s_oci2c->reg_address, &s_oci2c->reg_value, s_oci2c->number_of_bytes) == RETURN_OK); + return (i2c_reg_read(i2cHandle, s_oci2c->slaveAddress, s_oci2c->reg_address, + &s_oci2c->reg_value, + s_oci2c->number_of_bytes) == RETURN_OK); } -bool i2c_write(void* i2c_cfg, void *oci2c ) +bool i2c_write(void *i2c_cfg, void *oci2c) { - S_I2C_Cfg* s_oc_i2c_cfg = (S_I2C_Cfg*)i2c_cfg; - S_OCI2C* s_oci2c = (S_OCI2C*)oci2c; - I2C_Handle i2cHandle = i2c_open_bus(s_oc_i2c_cfg->bus); - return (i2c_reg_write(i2cHandle, s_oci2c->slaveAddress, s_oci2c->reg_address, s_oci2c->reg_value, s_oci2c->number_of_bytes) == RETURN_OK); + S_I2C_Cfg *s_oc_i2c_cfg = (S_I2C_Cfg *)i2c_cfg; + S_OCI2C *s_oci2c = (S_OCI2C *)oci2c; + I2C_Handle i2cHandle = i2c_open_bus(s_oc_i2c_cfg->bus); + return (i2c_reg_write(i2cHandle, s_oci2c->slaveAddress, + s_oci2c->reg_address, s_oci2c->reg_value, + s_oci2c->number_of_bytes) == RETURN_OK); } - - diff --git a/firmware/ec/src/devices/ocmp_wrappers/ocmp_debugmdio.c b/firmware/ec/src/devices/ocmp_wrappers/ocmp_debugmdio.c index b92595ed2e..8b000d42c1 100644 --- a/firmware/ec/src/devices/ocmp_wrappers/ocmp_debugmdio.c +++ b/firmware/ec/src/devices/ocmp_wrappers/ocmp_debugmdio.c @@ -20,57 +20,66 @@ #define PORT_REG_REQUEST(port) check_clause_22(s_oc_mdio_cfg->port) #define PHY_PORT_MAX 5 -bool check_clause_45(uint16_t regAddr) { +bool check_clause_45(uint16_t regAddr) +{ bool status = false; if (REG_C45_PACKET_GEN == regAddr || REG_C45_CRC_ERROR_COUNTER == regAddr) status = true; return status; } -bool check_clause_22(uint8_t port) { +bool check_clause_22(uint8_t port) +{ bool status = false; if (port < PHY_PORT_MAX) status = true; return status; } -bool mdio_read(void* mdio_cfg, void *ocmdio ) +bool mdio_read(void *mdio_cfg, void *ocmdio) { - S_MDIO_Cfg* s_oc_mdio_cfg = (S_MDIO_Cfg*)mdio_cfg; - S_OCMDIO* s_ocmdio = (S_OCMDIO*)ocmdio; - s_ocmdio->reg_value= 0xf00f; + S_MDIO_Cfg *s_oc_mdio_cfg = (S_MDIO_Cfg *)mdio_cfg; + S_OCMDIO *s_ocmdio = (S_OCMDIO *)ocmdio; + s_ocmdio->reg_value = 0xf00f; if (CLAUSE_45_REQUEST(reg_address)) /*PHY registers use Reg 13 and Reg 14 as paging mechanism to access Clause 45 registers*/ - s_ocmdio->reg_value = mdiobb_read_by_paging_c45(s_oc_mdio_cfg->port, s_ocmdio->reg_address); + s_ocmdio->reg_value = mdiobb_read_by_paging_c45(s_oc_mdio_cfg->port, + s_ocmdio->reg_address); else if (PORT_REG_REQUEST(port)) /*PHY registers use Reg 13 and Reg 14 as paging mechanism to access Clause 22 registers*/ - s_ocmdio->reg_value = mdiobb_read_by_paging(s_oc_mdio_cfg->port, s_ocmdio->reg_address); + s_ocmdio->reg_value = mdiobb_read_by_paging(s_oc_mdio_cfg->port, + s_ocmdio->reg_address); else /*GLOBAL and SWITCH registers can be accessed directly*/ - s_ocmdio->reg_value = mdiobb_read(s_oc_mdio_cfg->port, s_ocmdio->reg_address); + s_ocmdio->reg_value = + mdiobb_read(s_oc_mdio_cfg->port, s_ocmdio->reg_address); return 0; } -bool mdio_write(void* mdio_cfg, void *ocmdio ) +bool mdio_write(void *mdio_cfg, void *ocmdio) { - S_MDIO_Cfg* s_oc_mdio_cfg = (S_MDIO_Cfg*)mdio_cfg; - S_OCMDIO* s_ocmdio = (S_OCMDIO*)ocmdio; + S_MDIO_Cfg *s_oc_mdio_cfg = (S_MDIO_Cfg *)mdio_cfg; + S_OCMDIO *s_ocmdio = (S_OCMDIO *)ocmdio; if (CLAUSE_45_REQUEST(reg_address)) { /*PHY registers use Reg 13 and Reg 14 as paging mechanism to access Clause 45 registers*/ - mdiobb_write_by_paging_c45(s_oc_mdio_cfg->port, s_ocmdio->reg_address, s_ocmdio->reg_value); - s_ocmdio->reg_value = mdiobb_read_by_paging_c45(s_oc_mdio_cfg->port, s_ocmdio->reg_address); - } - else if (PORT_REG_REQUEST(port)) { + mdiobb_write_by_paging_c45(s_oc_mdio_cfg->port, s_ocmdio->reg_address, + s_ocmdio->reg_value); + s_ocmdio->reg_value = mdiobb_read_by_paging_c45(s_oc_mdio_cfg->port, + s_ocmdio->reg_address); + } else if (PORT_REG_REQUEST(port)) { /*PHY registers use Reg 13 and Reg 14 as paging mechanism to access Clause 22 registers*/ - mdiobb_write_by_paging(s_oc_mdio_cfg->port, s_ocmdio->reg_address, s_ocmdio->reg_value); - s_ocmdio->reg_value = mdiobb_read_by_paging(s_oc_mdio_cfg->port, s_ocmdio->reg_address); - } - else { + mdiobb_write_by_paging(s_oc_mdio_cfg->port, s_ocmdio->reg_address, + s_ocmdio->reg_value); + s_ocmdio->reg_value = mdiobb_read_by_paging(s_oc_mdio_cfg->port, + s_ocmdio->reg_address); + } else { /*GLOBAL and SWITCH registers can be accessed directly*/ - mdiobb_write(s_oc_mdio_cfg->port, s_ocmdio->reg_address, s_ocmdio->reg_value); - s_ocmdio->reg_value = mdiobb_read(s_oc_mdio_cfg->port, s_ocmdio->reg_address); + mdiobb_write(s_oc_mdio_cfg->port, s_ocmdio->reg_address, + s_ocmdio->reg_value); + s_ocmdio->reg_value = + mdiobb_read(s_oc_mdio_cfg->port, s_ocmdio->reg_address); } return 0; } diff --git a/firmware/ec/src/devices/ocmp_wrappers/ocmp_debugocgpio.c b/firmware/ec/src/devices/ocmp_wrappers/ocmp_debugocgpio.c index 4015186273..52b3e70a3d 100644 --- a/firmware/ec/src/devices/ocmp_wrappers/ocmp_debugocgpio.c +++ b/firmware/ec/src/devices/ocmp_wrappers/ocmp_debugocgpio.c @@ -13,43 +13,54 @@ #include "inc/common/global_header.h" #include "inc/devices/debug_ocgpio.h" - #include -#define NO_GPIO_PINS_IN_GROUP 8 +#define NO_GPIO_PINS_IN_GROUP 8 extern GPIO_PinConfig gpioPinConfigs[]; -bool ocgpio_set(void* gpio_cfg, void* oc_gpio ) +bool ocgpio_set(void *gpio_cfg, void *oc_gpio) { - S_OCGPIO_Cfg* oc_gpio_cfg = (S_OCGPIO_Cfg*)gpio_cfg; - S_OCGPIO* s_oc_gpio = (S_OCGPIO*)oc_gpio; + S_OCGPIO_Cfg *oc_gpio_cfg = (S_OCGPIO_Cfg *)gpio_cfg; + S_OCGPIO *s_oc_gpio = (S_OCGPIO *)oc_gpio; int ret = 0; - uint8_t idx = ((oc_gpio_cfg->group != 0)?(((oc_gpio_cfg->group-1) * NO_GPIO_PINS_IN_GROUP) + s_oc_gpio->pin):s_oc_gpio->pin); - OcGpio_Pin ocgpio = { (oc_gpio_cfg->port), idx, ((oc_gpio_cfg->group != 0)?(gpioPinConfigs[idx]>>16):OCGPIO_CFG_OUT_STD)}; + uint8_t idx = ((oc_gpio_cfg->group != 0) ? + (((oc_gpio_cfg->group - 1) * NO_GPIO_PINS_IN_GROUP) + + s_oc_gpio->pin) : + s_oc_gpio->pin); + OcGpio_Pin ocgpio = { (oc_gpio_cfg->port), idx, + ((oc_gpio_cfg->group != 0) ? + (gpioPinConfigs[idx] >> 16) : + OCGPIO_CFG_OUT_STD) }; ret = OcGpio_configure(&ocgpio, OCGPIO_CFG_OUTPUT); - ret = OcGpio_write(&ocgpio,s_oc_gpio->value); + ret = OcGpio_write(&ocgpio, s_oc_gpio->value); return (ret == 0); } -bool ocgpio_get(void* gpio_cfg, void* oc_gpio ) +bool ocgpio_get(void *gpio_cfg, void *oc_gpio) { - S_OCGPIO_Cfg* oc_gpio_cfg = (S_OCGPIO_Cfg*)gpio_cfg; - S_OCGPIO* s_oc_gpio = (S_OCGPIO*)oc_gpio; + S_OCGPIO_Cfg *oc_gpio_cfg = (S_OCGPIO_Cfg *)gpio_cfg; + S_OCGPIO *s_oc_gpio = (S_OCGPIO *)oc_gpio; int ret = 0; - uint8_t idx = ((oc_gpio_cfg->group != 0)?(((oc_gpio_cfg->group-1) * NO_GPIO_PINS_IN_GROUP) + s_oc_gpio->pin):s_oc_gpio->pin); - OcGpio_Pin ocgpio = { (oc_gpio_cfg->port), idx, ((oc_gpio_cfg->group!= 0)?(gpioPinConfigs[idx]>>16):OCGPIO_CFG_IN_PU)}; + uint8_t idx = ((oc_gpio_cfg->group != 0) ? + (((oc_gpio_cfg->group - 1) * NO_GPIO_PINS_IN_GROUP) + + s_oc_gpio->pin) : + s_oc_gpio->pin); + OcGpio_Pin ocgpio = { (oc_gpio_cfg->port), idx, + ((oc_gpio_cfg->group != 0) ? + (gpioPinConfigs[idx] >> 16) : + OCGPIO_CFG_IN_PU) }; ret = OcGpio_configure(&ocgpio, OCGPIO_CFG_INPUT); s_oc_gpio->value = OcGpio_read(&ocgpio); - if ( s_oc_gpio->value < 0) { + if (s_oc_gpio->value < 0) { ret = -1; } return (ret == 0); } -static ePostCode _probe(S_OCGPIO_Cfg* oc_gpio_cfg) +static ePostCode _probe(S_OCGPIO_Cfg *oc_gpio_cfg) { if (OcGpio_probe(oc_gpio_cfg->port) != 0) { - return POST_DEV_MISSING; + return POST_DEV_MISSING; } else { return POST_DEV_FOUND; } diff --git a/firmware/ec/src/devices/ocmp_wrappers/ocmp_eth_sw.c b/firmware/ec/src/devices/ocmp_wrappers/ocmp_eth_sw.c index 1d82a94a7d..fc754e4854 100644 --- a/firmware/ec/src/devices/ocmp_wrappers/ocmp_eth_sw.c +++ b/firmware/ec/src/devices/ocmp_wrappers/ocmp_eth_sw.c @@ -53,34 +53,39 @@ bool ETHERNET_tivaClient(void *driver, void *params) return status; } -static bool _get_status(void *driver, unsigned int param_id, - void *return_buf) +static bool _get_status(void *driver, unsigned int param_id, void *return_buf) { - Eth_cfg *cfg = (Eth_cfg*)driver; + Eth_cfg *cfg = (Eth_cfg *)driver; switch (param_id) { case ETH_SW_STATUS_SPEED: { uint8_t *res = return_buf; - return (eth_sw_get_status_speed(cfg->eth_sw_port, res) == RETURN_OK); + return (eth_sw_get_status_speed(cfg->eth_sw_port, res) == + RETURN_OK); } case ETH_SW_STATUS_DUPLEX: { uint8_t *res = return_buf; - return (eth_sw_get_status_duplex(cfg->eth_sw_port, res) == RETURN_OK); + return (eth_sw_get_status_duplex(cfg->eth_sw_port, res) == + RETURN_OK); } case ETH_SW_STATUS_AUTONEG_ON: { uint8_t *res = return_buf; - return (eth_sw_get_status_auto_neg(cfg->eth_sw_port, res) == RETURN_OK); + return (eth_sw_get_status_auto_neg(cfg->eth_sw_port, res) == + RETURN_OK); } case ETH_SW_STATUS_SLEEP_MODE_EN: { uint8_t *res = return_buf; - return (eth_sw_get_status_sleep_mode(cfg->eth_sw_port, res) == RETURN_OK); + return (eth_sw_get_status_sleep_mode(cfg->eth_sw_port, res) == + RETURN_OK); } case ETH_SW_STATUS_AUTONEG_COMPLETE: { uint8_t *res = return_buf; - return (eth_sw_get_status_auto_neg_complete(cfg->eth_sw_port, res) == RETURN_OK); + return (eth_sw_get_status_auto_neg_complete(cfg->eth_sw_port, + res) == RETURN_OK); } case ETH_SW_STATUS_LINK: { uint8_t *res = return_buf; - return (eth_sw_get_status_link_up(cfg->eth_sw_port, res) == RETURN_OK); + return (eth_sw_get_status_link_up(cfg->eth_sw_port, res) == + RETURN_OK); } default: LOGGER_ERROR("ETH_SW::Unknown status param %d\n", param_id); @@ -88,41 +93,39 @@ static bool _get_status(void *driver, unsigned int param_id, } } -static bool _get_config(void *driver, unsigned int param_id, - void *return_buf) +static bool _get_config(void *driver, unsigned int param_id, void *return_buf) { - Eth_cfg *cfg = (Eth_cfg*)driver; + Eth_cfg *cfg = (Eth_cfg *)driver; switch (param_id) { case ETH_SW_CONFIG_SPEED: { uint8_t *res = return_buf; - return (eth_sw_get_config_speed(cfg->eth_sw_port, res) - == RETURN_OK); + return (eth_sw_get_config_speed(cfg->eth_sw_port, res) == + RETURN_OK); } case ETH_SW_CONFIG_DUPLEX: { uint8_t *res = return_buf; - return (eth_sw_get_config_duplex(cfg->eth_sw_port, res) - == RETURN_OK); + return (eth_sw_get_config_duplex(cfg->eth_sw_port, res) == + RETURN_OK); } case ETH_SW_CONFIG_POWER_DOWN: { uint8_t *res = return_buf; - return (eth_sw_get_config_power_down(cfg->eth_sw_port, res) - == RETURN_OK); + return (eth_sw_get_config_power_down(cfg->eth_sw_port, res) == + RETURN_OK); } case ETH_SW_CONFIG_SLEEPMODE_EN: { uint8_t *res = return_buf; - return (eth_sw_get_config_sleep_mode(cfg->eth_sw_port, res) - == RETURN_OK); + return (eth_sw_get_config_sleep_mode(cfg->eth_sw_port, res) == + RETURN_OK); } case ETH_SW_CONFIG_INTERRUPT_EN: { uint8_t *res = return_buf; - return (eth_sw_get_config_interrupt_enable(cfg->eth_sw_port, res) - == RETURN_OK); + return (eth_sw_get_config_interrupt_enable(cfg->eth_sw_port, res) == + RETURN_OK); } case ETH_SW_CONFIG_SW_RESET: { uint8_t *res = return_buf; *res = 0; return false; - } case ETH_SW_CONFIG_RESTART_AUTONEG: { uint8_t *res = return_buf; @@ -135,47 +138,47 @@ static bool _get_config(void *driver, unsigned int param_id, } } -static bool _set_config(void *driver, unsigned int param_id, - const void *data) +static bool _set_config(void *driver, unsigned int param_id, const void *data) { - Eth_cfg *cfg = (Eth_cfg*)driver; + Eth_cfg *cfg = (Eth_cfg *)driver; switch (param_id) { - case ETH_SW_CONFIG_SPEED: { - uint8_t *res = (uint8_t*)data; - return (eth_sw_set_config_speed(cfg->eth_sw_port, *res) - == RETURN_OK); - } - case ETH_SW_CONFIG_DUPLEX: { - uint8_t *res = (uint8_t*)data; - return (eth_sw_set_config_duplex(cfg->eth_sw_port, *res) - == RETURN_OK); - } - case ETH_SW_CONFIG_POWER_DOWN: { - uint8_t *res = (uint8_t*)data; - return (eth_sw_set_config_power_down(cfg->eth_sw_port, *res) - == RETURN_OK); - } - case ETH_SW_CONFIG_SLEEPMODE_EN: { - uint8_t *res = (uint8_t*)data; - return (eth_sw_set_config_sleep_mode_enable(cfg->eth_sw_port, *res) - == RETURN_OK); - } - case ETH_SW_CONFIG_INTERRUPT_EN: { - uint8_t *res = (uint8_t*)data; - return (eth_sw_set_config_interrupt_enable(cfg->eth_sw_port, res) - == RETURN_OK); - } - case ETH_SW_CONFIG_SW_RESET: { - return (eth_sw_set_config_soft_reset(cfg->eth_sw_port) - == RETURN_OK); - } - case ETH_SW_CONFIG_RESTART_AUTONEG: { - return (eth_sw_set_config_restart_neg(cfg->eth_sw_port) == RETURN_OK); - } - default: - LOGGER_ERROR("ETH_SW::Unknown config param %d\n", param_id); - return false; - } + case ETH_SW_CONFIG_SPEED: { + uint8_t *res = (uint8_t *)data; + return (eth_sw_set_config_speed(cfg->eth_sw_port, *res) == + RETURN_OK); + } + case ETH_SW_CONFIG_DUPLEX: { + uint8_t *res = (uint8_t *)data; + return (eth_sw_set_config_duplex(cfg->eth_sw_port, *res) == + RETURN_OK); + } + case ETH_SW_CONFIG_POWER_DOWN: { + uint8_t *res = (uint8_t *)data; + return (eth_sw_set_config_power_down(cfg->eth_sw_port, *res) == + RETURN_OK); + } + case ETH_SW_CONFIG_SLEEPMODE_EN: { + uint8_t *res = (uint8_t *)data; + return (eth_sw_set_config_sleep_mode_enable(cfg->eth_sw_port, + *res) == RETURN_OK); + } + case ETH_SW_CONFIG_INTERRUPT_EN: { + uint8_t *res = (uint8_t *)data; + return (eth_sw_set_config_interrupt_enable(cfg->eth_sw_port, res) == + RETURN_OK); + } + case ETH_SW_CONFIG_SW_RESET: { + return (eth_sw_set_config_soft_reset(cfg->eth_sw_port) == + RETURN_OK); + } + case ETH_SW_CONFIG_RESTART_AUTONEG: { + return (eth_sw_set_config_restart_neg(cfg->eth_sw_port) == + RETURN_OK); + } + default: + LOGGER_ERROR("ETH_SW::Unknown config param %d\n", param_id); + return false; + } } static ePostCode _probe(void *driver, POSTData *postData) @@ -206,9 +209,9 @@ static void _alert_handler(Eth_Sw_Events evt, int16_t value, void *alert_data) case ETH_EVT_ENERGY: alert = ETH_ALERT_ENERGY_DET; case ETH_EVT_POLARITY: - alert = ETH_ALERT_POLARITY_DET; + alert = ETH_ALERT_POLARITY_DET; case ETH_EVT_JABBER: - alert = ETH_ALERT_JABBER_DET; + alert = ETH_ALERT_JABBER_DET; break; default: LOGGER_ERROR("ETH_SW::Unknown Ethernet Switch evt: %d\n", evt); @@ -233,9 +236,7 @@ static ePostCode _init(void *driver, const void *config, const Driver_fxnTable eth_fxnTable = { /* Message handlers */ - .cb_probe = _probe, - .cb_init = _init, - .cb_get_status = _get_status, - .cb_get_config = _get_config, + .cb_probe = _probe, .cb_init = _init, + .cb_get_status = _get_status, .cb_get_config = _get_config, .cb_set_config = _set_config, }; diff --git a/firmware/ec/src/devices/ocmp_wrappers/ocmp_fe.c b/firmware/ec/src/devices/ocmp_wrappers/ocmp_fe.c index 087f835037..50d0cc9dbc 100644 --- a/firmware/ec/src/devices/ocmp_wrappers/ocmp_fe.c +++ b/firmware/ec/src/devices/ocmp_wrappers/ocmp_fe.c @@ -55,44 +55,38 @@ bool rffe_ctrl_get_band(rffeChannel channel, rffeBand *band) return true; } -bool static _get_config(void *driver, unsigned int param_id, - void *return_buf) - { +bool static _get_config(void *driver, unsigned int param_id, void *return_buf) +{ bool ret = false; FE_Ch_Band_cfg *driverCfg = driver; switch (param_id) { - case FE_CFG_BAND: - { - ret = rffe_ctrl_get_band(driverCfg->channel,return_buf); - break; - } - default: - { - LOGGER_ERROR("FE_PARAM::Unknown config param %d\n", param_id); - ret = false; - } + case FE_CFG_BAND: { + ret = rffe_ctrl_get_band(driverCfg->channel, return_buf); + break; + } + default: { + LOGGER_ERROR("FE_PARAM::Unknown config param %d\n", param_id); + ret = false; + } } return ret; } -bool static _set_config(void *driver, unsigned int param_id, - void *return_buf) +bool static _set_config(void *driver, unsigned int param_id, void *return_buf) { bool ret = false; FE_Ch_Band_cfg *driverCfg = driver; - rffeBand *band = (rffeBand*)return_buf; + rffeBand *band = (rffeBand *)return_buf; switch (param_id) { - case FE_CFG_BAND: - { - rffeChannel *cfg = driver; - ret = rffe_ctrl_set_band(driverCfg->channel,*band); - break; - } - default: - { - LOGGER_ERROR("FE_PARAM::Unknown config param %d\n", param_id); - ret = false; - } + case FE_CFG_BAND: { + rffeChannel *cfg = driver; + ret = rffe_ctrl_set_band(driverCfg->channel, *band); + break; + } + default: { + LOGGER_ERROR("FE_PARAM::Unknown config param %d\n", param_id); + ret = false; + } } return ret; } diff --git a/firmware/ec/src/devices/ocmp_wrappers/ocmp_ina226.c b/firmware/ec/src/devices/ocmp_wrappers/ocmp_ina226.c index 80605227a1..c5a9b95b79 100644 --- a/firmware/ec/src/devices/ocmp_wrappers/ocmp_ina226.c +++ b/firmware/ec/src/devices/ocmp_wrappers/ocmp_ina226.c @@ -26,8 +26,8 @@ typedef enum INA226Alert { INA226_ALERT_OVERCURRENT = 0, } INA226Alert; -static bool _get_status(void *driver, unsigned int param_id, - void *return_buf) { +static bool _get_status(void *driver, unsigned int param_id, void *return_buf) +{ switch (param_id) { case INA226_STATUS_BUS_VOLTAGE: { uint16_t *res = return_buf; @@ -51,8 +51,8 @@ static bool _get_status(void *driver, unsigned int param_id, } } -static bool _get_config(void *driver, unsigned int param_id, - void *return_buf) { +static bool _get_config(void *driver, unsigned int param_id, void *return_buf) +{ switch (param_id) { case INA226_CONFIG_CURRENT_LIM: { uint16_t *res = return_buf; @@ -64,8 +64,8 @@ static bool _get_config(void *driver, unsigned int param_id, } } -static bool _set_config(void *driver, unsigned int param_id, - const void *data) { +static bool _set_config(void *driver, unsigned int param_id, const void *data) +{ switch (param_id) { case INA226_CONFIG_CURRENT_LIM: { const uint16_t *limit = data; @@ -79,7 +79,7 @@ static bool _set_config(void *driver, unsigned int param_id, static ePostCode _probe(void *driver, POSTData *postData) { - return ina226_probe(driver,postData); + return ina226_probe(driver, postData); } static void _alert_handler(INA226_Event evt, uint16_t value, void *alert_data) @@ -118,9 +118,7 @@ static ePostCode _init(void *driver, const void *config, const Driver_fxnTable INA226_fxnTable = { /* Message handlers */ - .cb_probe = _probe, - .cb_init = _init, - .cb_get_status = _get_status, - .cb_get_config = _get_config, + .cb_probe = _probe, .cb_init = _init, + .cb_get_status = _get_status, .cb_get_config = _get_config, .cb_set_config = _set_config, }; diff --git a/firmware/ec/src/devices/ocmp_wrappers/ocmp_iridium.c b/firmware/ec/src/devices/ocmp_wrappers/ocmp_iridium.c index 6edccab4ae..c4b6e37f7e 100644 --- a/firmware/ec/src/devices/ocmp_wrappers/ocmp_iridium.c +++ b/firmware/ec/src/devices/ocmp_wrappers/ocmp_iridium.c @@ -31,51 +31,44 @@ static ePostCode _init(void *driver, const void *config, return POST_DEV_CFG_DONE; } -static bool _get_status(void *driver, unsigned int param_id, - void *return_buf) { - bool ret = false; - switch (param_id) { - case IRIDIUM_NO_OUT_MSG: - { - ret = sbd9603_get_queueLength(return_buf); - break; - } - case IRIDIUM_LASTERR: - { - ret = sbd9603_get_lastError(return_buf); - break; - } - case IRIDIUM_IMEI: - { - ret = sbd9603_get_imei(return_buf); - break; - } - case IRIDIUM_MFG: - { - ret = sbd9603_get_mfg(return_buf); - break; - } - /* TODO: optimize this - no reason to call CSQ twice */ - case IRIDIUM_MODEL: - { - ret = sbd9603_get_model(return_buf); - break; - } - case IRIDIUM_SIG_QUALITY: - { - ret = sbd9603_get_signalqual(return_buf); - break; - } - case IRIDIUM_REGSTATUS: - { - ret = sbd9603_get_regStatus(return_buf); - break; - } - default: - LOGGER("OBC::ERROR: Unknown param %d\n", param_id); - return false; - } - return ret; +static bool _get_status(void *driver, unsigned int param_id, void *return_buf) +{ + bool ret = false; + switch (param_id) { + case IRIDIUM_NO_OUT_MSG: { + ret = sbd9603_get_queueLength(return_buf); + break; + } + case IRIDIUM_LASTERR: { + ret = sbd9603_get_lastError(return_buf); + break; + } + case IRIDIUM_IMEI: { + ret = sbd9603_get_imei(return_buf); + break; + } + case IRIDIUM_MFG: { + ret = sbd9603_get_mfg(return_buf); + break; + } + /* TODO: optimize this - no reason to call CSQ twice */ + case IRIDIUM_MODEL: { + ret = sbd9603_get_model(return_buf); + break; + } + case IRIDIUM_SIG_QUALITY: { + ret = sbd9603_get_signalqual(return_buf); + break; + } + case IRIDIUM_REGSTATUS: { + ret = sbd9603_get_regStatus(return_buf); + break; + } + default: + LOGGER("OBC::ERROR: Unknown param %d\n", param_id); + return false; + } + return ret; } const Driver_fxnTable OBC_fxnTable = { @@ -84,7 +77,3 @@ const Driver_fxnTable OBC_fxnTable = { .cb_init = _init, .cb_get_status = _get_status, }; - - - - diff --git a/firmware/ec/src/devices/ocmp_wrappers/ocmp_led.c b/firmware/ec/src/devices/ocmp_wrappers/ocmp_led.c index 4a4030f21b..486b826564 100644 --- a/firmware/ec/src/devices/ocmp_wrappers/ocmp_led.c +++ b/firmware/ec/src/devices/ocmp_wrappers/ocmp_led.c @@ -15,25 +15,21 @@ bool led_testpattern_control(void *driver, void *param) { ReturnStatus status = RETURN_OK; - ledTestParam *testPattern = (ledTestParam*)param; + ledTestParam *testPattern = (ledTestParam *)param; switch (*testPattern) { - case HCI_LED_OFF: - { + case HCI_LED_OFF: { status = hci_led_turnoff_all(driver); break; } - case HCI_LED_RED: - { + case HCI_LED_RED: { status = hci_led_turnon_red(driver); break; } - case HCI_LED_GREEN: - { + case HCI_LED_GREEN: { status = hci_led_turnon_green(driver); break; } - default: - { + default: { LOGGER_ERROR("HCILED::Unknown param %d\n", *testPattern); status = RETURN_NOTOK; } @@ -41,7 +37,7 @@ bool led_testpattern_control(void *driver, void *param) return (status == RETURN_OK); } -static ePostCode _probe(void *driver, POSTData* postData) +static ePostCode _probe(void *driver, POSTData *postData) { led_configure(driver); return led_probe(driver, postData); @@ -63,10 +59,6 @@ static ePostCode _init(void *driver, const void *config, const Driver_fxnTable LED_fxnTable = { /* Message handlers */ - .cb_probe = _probe, - .cb_init = _init, - .cb_get_status = NULL, - .cb_get_config = NULL, - .cb_set_config = NULL, + .cb_probe = _probe, .cb_init = _init, .cb_get_status = NULL, + .cb_get_config = NULL, .cb_set_config = NULL, }; - diff --git a/firmware/ec/src/devices/ocmp_wrappers/ocmp_ltc4015.c b/firmware/ec/src/devices/ocmp_wrappers/ocmp_ltc4015.c index 55f67e7758..c12282830e 100644 --- a/firmware/ec/src/devices/ocmp_wrappers/ocmp_ltc4015.c +++ b/firmware/ec/src/devices/ocmp_wrappers/ocmp_ltc4015.c @@ -41,7 +41,8 @@ typedef enum LTC4015Alert { LTC4015_ALERT_DIE_TEMPERATURE_HIGH, } LTC4015Alert; -static bool _choose_battery_charger(LTC4015_Dev *dev) { +static bool _choose_battery_charger(LTC4015_Dev *dev) +{ if (OcGpio_write(&dev->cfg.pin_lt4015_i2c_sel, (dev->cfg.chem == LTC4015_CHEM_LI_ION)) < OCGPIO_SUCCESS) { return false; @@ -49,9 +50,9 @@ static bool _choose_battery_charger(LTC4015_Dev *dev) { return true; } -static bool _get_status(void *driver, unsigned int param_id, - void *return_buf) { - if(!_choose_battery_charger(driver)) +static bool _get_status(void *driver, unsigned int param_id, void *return_buf) +{ + if (!_choose_battery_charger(driver)) return false; switch (param_id) { @@ -89,42 +90,41 @@ static bool _get_status(void *driver, unsigned int param_id, } } -static bool _get_config(void *driver, unsigned int param_id, - void *return_buf) { - - if(!_choose_battery_charger(driver)) +static bool _get_config(void *driver, unsigned int param_id, void *return_buf) +{ + if (!_choose_battery_charger(driver)) return false; switch (param_id) { case LTC4015_CONFIG_BATTERY_VOLTAGE_LOW: { int16_t *res = return_buf; - return (LTC4015_get_cfg_battery_voltage_low(driver, res) - == RETURN_OK); + return (LTC4015_get_cfg_battery_voltage_low(driver, res) == + RETURN_OK); } case LTC4015_CONFIG_BATTERY_VOLTAGE_HIGH: { int16_t *res = return_buf; - return (LTC4015_get_cfg_battery_voltage_high(driver, res) - == RETURN_OK); + return (LTC4015_get_cfg_battery_voltage_high(driver, res) == + RETURN_OK); } case LTC4015_CONFIG_BATTERY_CURRENT_LOW: { int16_t *res = return_buf; - return (LTC4015_get_cfg_battery_current_low(driver, res) - == RETURN_OK); + return (LTC4015_get_cfg_battery_current_low(driver, res) == + RETURN_OK); } case LTC4015_CONFIG_INPUT_VOLTAGE_LOW: { int16_t *res = return_buf; - return (LTC4015_get_cfg_input_voltage_low(driver, res) - == RETURN_OK); + return (LTC4015_get_cfg_input_voltage_low(driver, res) == + RETURN_OK); } case LTC4015_CONFIG_INPUT_CURRENT_HIGH: { int16_t *res = return_buf; - return (LTC4015_get_cfg_input_current_high(driver, res) - == RETURN_OK); + return (LTC4015_get_cfg_input_current_high(driver, res) == + RETURN_OK); } case LTC4015_CONFIG_INPUT_CURRENT_LIMIT: { uint16_t *res = return_buf; - return (LTC4015_get_cfg_input_current_limit(driver, res) - == RETURN_OK); + return (LTC4015_get_cfg_input_current_limit(driver, res) == + RETURN_OK); } case LTC4015_CONFIG_ICHARGE: { uint16_t *res = return_buf; @@ -136,8 +136,8 @@ static bool _get_config(void *driver, unsigned int param_id, } case LTC4015_CONFIG_DIE_TEMPERATURE_HIGH: { int16_t *res = return_buf; - return (LTC4015_get_cfg_die_temperature_high(driver, res) - == RETURN_OK); + return (LTC4015_get_cfg_die_temperature_high(driver, res) == + RETURN_OK); } default: LOGGER_ERROR("LTC4015::Unknown config param %d\n", param_id); @@ -145,41 +145,40 @@ static bool _get_config(void *driver, unsigned int param_id, } } -static bool _set_config(void *driver, unsigned int param_id, - const void *data) { - if(!_choose_battery_charger(driver)) +static bool _set_config(void *driver, unsigned int param_id, const void *data) +{ + if (!_choose_battery_charger(driver)) return false; switch (param_id) { case LTC4015_CONFIG_BATTERY_VOLTAGE_LOW: { const int16_t *limit = data; - return (LTC4015_cfg_battery_voltage_low(driver, *limit) - == RETURN_OK); + return (LTC4015_cfg_battery_voltage_low(driver, *limit) == + RETURN_OK); } case LTC4015_CONFIG_BATTERY_VOLTAGE_HIGH: { const int16_t *limit = data; - return (LTC4015_cfg_battery_voltage_high(driver, *limit) - == RETURN_OK); + return (LTC4015_cfg_battery_voltage_high(driver, *limit) == + RETURN_OK); } case LTC4015_CONFIG_BATTERY_CURRENT_LOW: { const int16_t *limit = data; - return (LTC4015_cfg_battery_current_low(driver, *limit) - == RETURN_OK); + return (LTC4015_cfg_battery_current_low(driver, *limit) == + RETURN_OK); } case LTC4015_CONFIG_INPUT_VOLTAGE_LOW: { const int16_t *limit = data; - return (LTC4015_cfg_input_voltage_low(driver, *limit) - == RETURN_OK); + return (LTC4015_cfg_input_voltage_low(driver, *limit) == RETURN_OK); } case LTC4015_CONFIG_INPUT_CURRENT_HIGH: { const int16_t *limit = data; - return (LTC4015_cfg_input_current_high(driver, *limit) - == RETURN_OK); + return (LTC4015_cfg_input_current_high(driver, *limit) == + RETURN_OK); } case LTC4015_CONFIG_INPUT_CURRENT_LIMIT: { const uint16_t *limit = data; - return (LTC4015_cfg_input_current_limit(driver, *limit) - == RETURN_OK); + return (LTC4015_cfg_input_current_limit(driver, *limit) == + RETURN_OK); } case LTC4015_CONFIG_ICHARGE: { const uint16_t *limit = data; @@ -191,8 +190,8 @@ static bool _set_config(void *driver, unsigned int param_id, } case LTC4015_CONFIG_DIE_TEMPERATURE_HIGH: { const int16_t *limit = data; - return (LTC4015_cfg_die_temperature_high(driver, *limit) - == RETURN_OK); + return (LTC4015_cfg_die_temperature_high(driver, *limit) == + RETURN_OK); } default: LOGGER_ERROR("LTC4015::Unknown config param %d\n", param_id); @@ -203,7 +202,7 @@ static bool _set_config(void *driver, unsigned int param_id, static ePostCode _probe(void *driver, POSTData *postData) { LTC4015_configure(driver); - if(!_choose_battery_charger(driver)) + if (!_choose_battery_charger(driver)) return false; return LTC4015_probe(driver, postData); @@ -241,8 +240,9 @@ static void _alert_handler(LTC4015_Event evt, int16_t value, void *alert_data) } static ePostCode _init(void *driver, const void *config, - const void *alert_token) { - if(!_choose_battery_charger(driver)) + const void *alert_token) +{ + if (!_choose_battery_charger(driver)) return false; if (LTC4015_init(driver) != RETURN_OK) { @@ -255,52 +255,46 @@ static ePostCode _init(void *driver, const void *config, const LTC4015_Config *ltc4015_config = config; - if (LTC4015_cfg_battery_voltage_low(driver, - ltc4015_config->batteryVoltageLow) - != RETURN_OK) { + if (LTC4015_cfg_battery_voltage_low( + driver, ltc4015_config->batteryVoltageLow) != RETURN_OK) { return POST_DEV_CFG_FAIL; } - if (LTC4015_cfg_battery_voltage_high(driver, - ltc4015_config->batteryVoltageHigh) - != RETURN_OK) { + if (LTC4015_cfg_battery_voltage_high( + driver, ltc4015_config->batteryVoltageHigh) != RETURN_OK) { return POST_DEV_CFG_FAIL; } - if (LTC4015_cfg_battery_current_low(driver, - ltc4015_config->batteryCurrentLow) - != RETURN_OK) { + if (LTC4015_cfg_battery_current_low( + driver, ltc4015_config->batteryCurrentLow) != RETURN_OK) { return POST_DEV_CFG_FAIL; } - if (LTC4015_cfg_input_voltage_low(driver, ltc4015_config->inputVoltageLow) - != RETURN_OK) { + if (LTC4015_cfg_input_voltage_low( + driver, ltc4015_config->inputVoltageLow) != RETURN_OK) { return POST_DEV_CFG_FAIL; } - if (LTC4015_cfg_input_current_high(driver, ltc4015_config->inputCurrentHigh) - != RETURN_OK) { + if (LTC4015_cfg_input_current_high( + driver, ltc4015_config->inputCurrentHigh) != RETURN_OK) { return POST_DEV_CFG_FAIL; } - if (LTC4015_cfg_input_current_limit(driver, - ltc4015_config->inputCurrentLimit) - != RETURN_OK) { + if (LTC4015_cfg_input_current_limit( + driver, ltc4015_config->inputCurrentLimit) != RETURN_OK) { return POST_DEV_CFG_FAIL; } if (ltc4015_config->icharge) { - if (LTC4015_cfg_icharge(driver, ltc4015_config->icharge) - != RETURN_OK) { + if (LTC4015_cfg_icharge(driver, ltc4015_config->icharge) != RETURN_OK) { return POST_DEV_CFG_FAIL; } } if (ltc4015_config->vcharge) { - if (LTC4015_cfg_vcharge(driver, ltc4015_config->vcharge) - != RETURN_OK) { + if (LTC4015_cfg_vcharge(driver, ltc4015_config->vcharge) != RETURN_OK) { return POST_DEV_CFG_FAIL; } } LTC4015_setAlertHandler(driver, _alert_handler, (void *)alert_token); if (LTC4015_enableLimitAlerts(driver, - LTC4015_EVT_BVL | LTC4015_EVT_BVH - | LTC4015_EVT_IVL | LTC4015_EVT_ICH - | LTC4015_EVT_BCL) != RETURN_OK) { + LTC4015_EVT_BVL | LTC4015_EVT_BVH | + LTC4015_EVT_IVL | LTC4015_EVT_ICH | + LTC4015_EVT_BCL) != RETURN_OK) { return POST_DEV_CFG_FAIL; } @@ -313,9 +307,7 @@ static ePostCode _init(void *driver, const void *config, const Driver_fxnTable LTC4015_fxnTable = { /* Message handlers */ - .cb_probe = _probe, - .cb_init = _init, - .cb_get_status = _get_status, - .cb_get_config = _get_config, + .cb_probe = _probe, .cb_init = _init, + .cb_get_status = _get_status, .cb_get_config = _get_config, .cb_set_config = _set_config, }; diff --git a/firmware/ec/src/devices/ocmp_wrappers/ocmp_ltc4274.c b/firmware/ec/src/devices/ocmp_wrappers/ocmp_ltc4274.c index 7754f7ab25..e46ea35d69 100644 --- a/firmware/ec/src/devices/ocmp_wrappers/ocmp_ltc4274.c +++ b/firmware/ec/src/devices/ocmp_wrappers/ocmp_ltc4274.c @@ -14,7 +14,7 @@ typedef enum LTC7274Status { LTC7274_STATUS_DETECT = 0, - LTC7274_STATUS_CLASS , + LTC7274_STATUS_CLASS, LTC7274_STATUS_POWERGOOD, } LTC7274Status; @@ -31,7 +31,7 @@ typedef enum LTC7274Alert { LTC4274_ALERT_POWER_ENABLE, LTC4274_ALERT_POWERGOOD, LTC4274_ALERT_DISCONNECT, - LTC4274_ALERT_DETECTION , + LTC4274_ALERT_DETECTION, LTC4274_ALERT_CLASS, LTC4274_ALERT_TCUT, LTC4274_ALERT_TSTART, @@ -43,44 +43,40 @@ typedef enum LTC7274Alert { #pragma GCC diagnostic ignored "-Wunused-parameter" bool LTC4274_reset(void *driver, void *params) { - ReturnStatus status = RETURN_OK; - status = ltc4274_reset(driver); - return status; + ReturnStatus status = RETURN_OK; + status = ltc4274_reset(driver); + return status; } #pragma GCC diagnostic pop -static bool _get_status(void *driver, unsigned int param_id, - void *return_buf) { +static bool _get_status(void *driver, unsigned int param_id, void *return_buf) +{ bool ret = true; uint8_t *res = return_buf; switch (param_id) { - case LTC7274_STATUS_DETECT: - { + case LTC7274_STATUS_DETECT: { if (ltc4274_get_detection_status(driver, res) != RETURN_OK) { ret = false; LOGGER("LTC4274:ERROR:: Reading PSE detection and classification failed.\n"); } break; } - case LTC7274_STATUS_CLASS: - { + case LTC7274_STATUS_CLASS: { if (ltc4274_get_class_status(driver, res) != RETURN_OK) { ret = false; LOGGER("LTC4274:ERROR:: Reading PSE power status failed.\n"); } break; } - case LTC7274_STATUS_POWERGOOD: - { + case LTC7274_STATUS_POWERGOOD: { if (ltc4274_get_powergood_status(driver, res) != RETURN_OK) { ret = false; LOGGER("LTC4274:ERROR:: Reading PSE power status failed.\n"); return ret; } - break; + break; } - default: - { + default: { LOGGER("LTC4274:ERROR::Unkown parameter recived for PSE status.\n"); ret = false; } @@ -88,53 +84,47 @@ static bool _get_status(void *driver, unsigned int param_id, return ret; } -static bool _set_config(void *driver, unsigned int param_id, - const void *data) { +static bool _set_config(void *driver, unsigned int param_id, const void *data) +{ bool ret = true; - uint8_t *res = (uint8_t*)data; + uint8_t *res = (uint8_t *)data; switch (param_id) { - case LTC4274_CONFIG_OPERATING_MODE: - { - if ( ltc4274_set_cfg_operation_mode(driver, *res) != RETURN_OK) { + case LTC4274_CONFIG_OPERATING_MODE: { + if (ltc4274_set_cfg_operation_mode(driver, *res) != RETURN_OK) { ret = false; LOGGER("LTC4274:ERROR:: PSE operational mode setting mode failed.\n"); } break; } - case LTC4274_CONFIG_DETECT_ENABLE: - { + case LTC4274_CONFIG_DETECT_ENABLE: { if (ltc4274_set_cfg_detect_enable(driver, *res) != RETURN_OK) { ret = false; LOGGER("LTC4274:ERROR:: PSE detection and classification enable failed.\n"); } break; } - case LTC4274_CONFIG_INTERRUPT_MASK: - { + case LTC4274_CONFIG_INTERRUPT_MASK: { if (ltc4274_set_interrupt_mask(driver, *res) != RETURN_OK) { ret = false; LOGGER("LTC4274:ERROR::PSE interrupts mask enable failed.\n"); } break; } - case LTC4274_CONFIG_INTERRUPT_ENABLE: - { + case LTC4274_CONFIG_INTERRUPT_ENABLE: { if (ltc4274_cfg_interrupt_enable(driver, *res) != RETURN_OK) { ret = false; LOGGER("LTC4274:ERROR:: PSE interrupt enable failed.\n"); } break; } - case LTC4274_CONFIG_HP_ENABLE: - { + case LTC4274_CONFIG_HP_ENABLE: { if (ltc4274_set_cfg_pshp_feature(driver, *res) != RETURN_OK) { ret = false; LOGGER("LTC4274:ERROR:: PSE configuration for LTEPOE++ failed.\n"); } break; } - default: - { + default: { LOGGER("LTC4274:ERROR:: PSE configurion unkown parmeter passed.\n"); ret = false; } @@ -142,53 +132,47 @@ static bool _set_config(void *driver, unsigned int param_id, return ret; } -static bool _get_config(void *driver, unsigned int param_id, - void *return_buf) { +static bool _get_config(void *driver, unsigned int param_id, void *return_buf) +{ bool ret = true; uint8_t *res = return_buf; switch (param_id) { - case LTC4274_CONFIG_OPERATING_MODE: - { + case LTC4274_CONFIG_OPERATING_MODE: { if (ltc4274_get_operation_mode(driver, res) != RETURN_OK) { ret = false; LOGGER("LTC4274:ERROR:: PSE operational mode setting mode failed.\n"); } break; } - case LTC4274_CONFIG_DETECT_ENABLE: - { - if (ltc4274_get_detect_enable(driver, res)!= RETURN_OK) { + case LTC4274_CONFIG_DETECT_ENABLE: { + if (ltc4274_get_detect_enable(driver, res) != RETURN_OK) { ret = false; LOGGER("LTC4274:ERROR:: PSE detection and classification enable failed.\n"); } break; } - case LTC4274_CONFIG_INTERRUPT_MASK: - { + case LTC4274_CONFIG_INTERRUPT_MASK: { if (ltc4274_get_interrupt_mask(driver, res) != RETURN_OK) { ret = false; LOGGER("LTC4274:ERROR::PSE interrupts mask enable failed.\n"); } break; } - case LTC4274_CONFIG_INTERRUPT_ENABLE: - { + case LTC4274_CONFIG_INTERRUPT_ENABLE: { if (ltc4274_get_interrupt_enable(driver, res) != RETURN_OK) { ret = false; LOGGER("LTC4274:ERROR:: PSE interrupt enable failed.\n"); } break; } - case LTC4274_CONFIG_HP_ENABLE: - { + case LTC4274_CONFIG_HP_ENABLE: { if (ltc4274_get_pshp_feature(driver, res) != RETURN_OK) { ret = false; LOGGER("LTC4274:ERROR:: PSE configuration for LTEPOE++ failed.\n"); } break; } - default: - { + default: { LOGGER("LTC4274:ERROR:: PSE configurion unkown parmeter passed.\n"); ret = false; } @@ -199,14 +183,12 @@ static ePostCode _probe(void *driver, POSTData *postData) { ltc4274_config(driver); return ltc4274_probe(driver, postData); - } -static void _alert_handler(LTC4274_Event evt, - void *context) +static void _alert_handler(LTC4274_Event evt, void *context) { unsigned int alert; - switch(evt) { + switch (evt) { case LTC4274_EVT_SUPPLY: alert = LTC4274_ALERT_SUPPLY; break; @@ -231,8 +213,7 @@ static void _alert_handler(LTC4274_Event evt, case LTC4274_EVT_POWER_ENABLE: alert = LTC4274_ALERT_POWER_ENABLE; break; - default: - { + default: { alert = LTC4274_ALERT_NO_ACTIVE; return; } @@ -251,21 +232,26 @@ static ePostCode _init(void *driver, const void *config, return POST_DEV_CFG_DONE; } const LTC4274_Config *LTC7274_config = config; - if ( ltc4274_set_cfg_operation_mode(driver,LTC7274_config->operatingMode) != RETURN_OK) { + if (ltc4274_set_cfg_operation_mode(driver, LTC7274_config->operatingMode) != + RETURN_OK) { return POST_DEV_CFG_FAIL; } - if ( ltc4274_set_cfg_detect_enable(driver,LTC7274_config->detectEnable) != RETURN_OK) { + if (ltc4274_set_cfg_detect_enable(driver, LTC7274_config->detectEnable) != + RETURN_OK) { return POST_DEV_CFG_FAIL; } - if ( ltc4274_set_interrupt_mask(driver,LTC7274_config->interruptMask) != RETURN_OK) { + if (ltc4274_set_interrupt_mask(driver, LTC7274_config->interruptMask) != + RETURN_OK) { return POST_DEV_CFG_FAIL; } - if ( ltc4274_set_cfg_pshp_feature(driver,LTC7274_config->pseHpEnable) != RETURN_OK) { + if (ltc4274_set_cfg_pshp_feature(driver, LTC7274_config->pseHpEnable) != + RETURN_OK) { return POST_DEV_CFG_FAIL; } ltc4274_set_alert_handler(driver, _alert_handler, (void *)alert_token); //TODO: SET enable or disable. - if (ltc4274_cfg_interrupt_enable(driver, LTC7274_config->interruptEnable) != RETURN_OK) { + if (ltc4274_cfg_interrupt_enable(driver, LTC7274_config->interruptEnable) != + RETURN_OK) { return POST_DEV_CFG_FAIL; } ltc4274_update_stateInfo(driver); @@ -275,9 +261,7 @@ static ePostCode _init(void *driver, const void *config, const Driver_fxnTable LTC4274_fxnTable = { /* Message handlers */ - .cb_probe = _probe, - .cb_init = _init, - .cb_get_status = _get_status, - .cb_get_config = _get_config, + .cb_probe = _probe, .cb_init = _init, + .cb_get_status = _get_status, .cb_get_config = _get_config, .cb_set_config = _set_config, }; diff --git a/firmware/ec/src/devices/ocmp_wrappers/ocmp_ltc4275.c b/firmware/ec/src/devices/ocmp_wrappers/ocmp_ltc4275.c index 8f86fc9f8a..88341caa8f 100644 --- a/firmware/ec/src/devices/ocmp_wrappers/ocmp_ltc4275.c +++ b/firmware/ec/src/devices/ocmp_wrappers/ocmp_ltc4275.c @@ -12,32 +12,27 @@ #include "helpers/math.h" #include "inc/devices/ltc4275.h" -static bool _get_status(void *driver, unsigned int param_id, - void *return_buf) +static bool _get_status(void *driver, unsigned int param_id, void *return_buf) { bool ret = false; switch (param_id) { - case LTC4275_STATUS_CLASS: - { - ePDClassType *res = (ePDClassType*)return_buf; - if (ltc4275_get_class(driver, res) == RETURN_OK) { - ret = true; + case LTC4275_STATUS_CLASS: { + ePDClassType *res = (ePDClassType *)return_buf; + if (ltc4275_get_class(driver, res) == RETURN_OK) { + ret = true; + } + } break; + case LTC4275_STATUS_POWERGOOD: { + ePDPowerState *res = (ePDPowerState *)return_buf; + if (ltc4275_get_power_good(driver, res) == RETURN_OK) { + ret = true; + } + break; } - } - break; - case LTC4275_STATUS_POWERGOOD: - { - ePDPowerState *res =(ePDPowerState*) return_buf; - if (ltc4275_get_power_good(driver, res) == RETURN_OK) { - ret = true; + default: { + LOGGER_ERROR("LTC4275::Unknown status param %d\n", param_id); + ret = false; } - break; - } - default: - { - LOGGER_ERROR("LTC4275::Unknown status param %d\n", param_id); - ret = false; - } } return ret; } @@ -47,7 +42,7 @@ static bool _get_status(void *driver, unsigned int param_id, static ePostCode _probe(void *driver, POSTData *postData) { ltc4275_config(driver); - return ltc4275_probe(driver,postData); + return ltc4275_probe(driver, postData); } /***************************************************************************** diff --git a/firmware/ec/src/devices/ocmp_wrappers/ocmp_mac.c b/firmware/ec/src/devices/ocmp_wrappers/ocmp_mac.c index 89e5514b47..b9c59a12f2 100644 --- a/firmware/ec/src/devices/ocmp_wrappers/ocmp_mac.c +++ b/firmware/ec/src/devices/ocmp_wrappers/ocmp_mac.c @@ -13,9 +13,7 @@ #include #include -typedef enum { - OC_SYS_CONF_MAC_ADDRESS = 0 -} eOCConfigParamId; +typedef enum { OC_SYS_CONF_MAC_ADDRESS = 0 } eOCConfigParamId; /***************************************************************************** ** FUNCTION NAME : _get_mac_address @@ -32,11 +30,11 @@ static ReturnStatus _get_mac_address(uint8_t *macAddress) uint32_t ulUser0 = 0, ulUser1 = 0; /* Get the MAC address */ - if((FlashUserGet(&ulUser0, &ulUser1)) != 0) { + if ((FlashUserGet(&ulUser0, &ulUser1)) != 0) { return RETURN_NOTOK; } uint8_t i = 0; - uint8_t temp[6] = {'\0'}; + uint8_t temp[6] = { '\0' }; if ((ulUser0 != 0xffffffff) && (ulUser1 != 0xffffffff)) { /* @@ -51,10 +49,9 @@ static ReturnStatus _get_mac_address(uint8_t *macAddress) temp[4] = ((ulUser1 >> 8) & 0xff); temp[5] = ((ulUser1 >> 16) & 0xff); - for( i = 0; i < 6; i++ ) - { - sprintf((char *)&macAddress[i*2], "%X", ((temp[i]&0xf0) >> 4)); - sprintf((char *)&macAddress[(i*2)+1], "%X", temp[i]&0xf); + for (i = 0; i < 6; i++) { + sprintf((char *)&macAddress[i * 2], "%X", ((temp[i] & 0xf0) >> 4)); + sprintf((char *)&macAddress[(i * 2) + 1], "%X", temp[i] & 0xf); } } else { strncpy((char *)macAddress, "FFFFFFFFFFFF", 12); @@ -88,17 +85,17 @@ static uint32_t str_to_val(const char *str) ReturnStatus _set_mac_address(const uint8_t *macAddress) { uint32_t ulUser0, ulUser1; - if(macAddress != NULL) { + if (macAddress != NULL) { char temp[6]; strncpy(temp, (const char *)macAddress, 6); ulUser0 = str_to_val(temp); strncpy(temp, (const char *)(macAddress + 6), 6); ulUser1 = str_to_val(temp); /* Set the MAC address */ - if((FlashUserSet(ulUser0, ulUser1)) != 0) { + if ((FlashUserSet(ulUser0, ulUser1)) != 0) { return RETURN_NOTOK; } else { - if(FlashUserSave() != 0) { + if (FlashUserSave() != 0) { return RETURN_NOTOK; } } @@ -120,23 +117,20 @@ ReturnStatus _set_mac_address(const uint8_t *macAddress) ** RETURN TYPE : true on Success and false on Failure ** *****************************************************************************/ -static bool _mac_get_config_parameters_data(void **driver, - unsigned int param, +static bool _mac_get_config_parameters_data(void **driver, unsigned int param, void *pOCConfigData) { const eOCConfigParamId paramIndex = (eOCConfigParamId)param; ReturnStatus status = RETURN_OK; switch (paramIndex) { - case OC_SYS_CONF_MAC_ADDRESS: - { + case OC_SYS_CONF_MAC_ADDRESS: { memset(pOCConfigData, '\0', OC_MAC_ADDRESS_SIZE + 1); status = _get_mac_address(pOCConfigData); LOGGER_DEBUG("SYS:INFO:: OC Connect1 MAC Address: %s.\n", pOCConfigData); break; } - default: - { + default: { status = RETURN_NOTOK; } } @@ -154,22 +148,19 @@ static bool _mac_get_config_parameters_data(void **driver, ** RETURN TYPE : true on Success and false on Failure ** *****************************************************************************/ -static bool _mac_set_config_parameters_data(void **driver, - unsigned int param, +static bool _mac_set_config_parameters_data(void **driver, unsigned int param, const void *pOCConfigData) { const eOCConfigParamId paramIndex = (eOCConfigParamId)param; ReturnStatus status = RETURN_OK; switch (paramIndex) { - case OC_SYS_CONF_MAC_ADDRESS: - { + case OC_SYS_CONF_MAC_ADDRESS: { LOGGER_DEBUG("SYS:INFO:: Set OC Connect1 MAC Address to: %s.\n", pOCConfigData); _set_mac_address(pOCConfigData); break; } - default: - { + default: { status = RETURN_NOTOK; } } @@ -177,56 +168,52 @@ static bool _mac_set_config_parameters_data(void **driver, } static ePostCode _probe_mac(void *driver, const void *config, - const void *alert_token) + const void *alert_token) { uint8_t macAddress[14]; uint32_t ulUser0 = 0, ulUser1 = 0; - /* Get the MAC address */ - if((FlashUserGet(&ulUser0, &ulUser1)) != 0) { - return POST_DEV_MISSING; - } - uint8_t i = 0; - uint8_t temp[6] = {'\0'}; + /* Get the MAC address */ + if ((FlashUserGet(&ulUser0, &ulUser1)) != 0) { + return POST_DEV_MISSING; + } + uint8_t i = 0; + uint8_t temp[6] = { '\0' }; - if ((ulUser0 != 0xffffffff) && (ulUser1 != 0xffffffff)) { - /* + if ((ulUser0 != 0xffffffff) && (ulUser1 != 0xffffffff)) { + /* * Convert the 24/24 split MAC address from NV ram into a 32/16 split * MAC address needed to program the hardware registers, then program * the MAC address into the Ethernet Controller registers. */ - temp[0] = ((ulUser0 >> 0) & 0xff); - temp[1] = ((ulUser0 >> 8) & 0xff); - temp[2] = ((ulUser0 >> 16) & 0xff); - temp[3] = ((ulUser1 >> 0) & 0xff); - temp[4] = ((ulUser1 >> 8) & 0xff); - temp[5] = ((ulUser1 >> 16) & 0xff); + temp[0] = ((ulUser0 >> 0) & 0xff); + temp[1] = ((ulUser0 >> 8) & 0xff); + temp[2] = ((ulUser0 >> 16) & 0xff); + temp[3] = ((ulUser1 >> 0) & 0xff); + temp[4] = ((ulUser1 >> 8) & 0xff); + temp[5] = ((ulUser1 >> 16) & 0xff); - for( i = 0; i < 6; i++ ) - { - sprintf((char *)&macAddress[i*2], "%X", ((temp[i]&0xf0) >> 4)); - sprintf((char *)&macAddress[(i*2)+1], "%X", temp[i]&0xf); - } - } else { - strncpy((char *)macAddress, "FFFFFFFFFFFF", 12); - return POST_DEV_MISSING; + for (i = 0; i < 6; i++) { + sprintf((char *)&macAddress[i * 2], "%X", ((temp[i] & 0xf0) >> 4)); + sprintf((char *)&macAddress[(i * 2) + 1], "%X", temp[i] & 0xf); } - return POST_DEV_FOUND; + } else { + strncpy((char *)macAddress, "FFFFFFFFFFFF", 12); + return POST_DEV_MISSING; + } + return POST_DEV_FOUND; } /* Dummy Initialize for MAC */ static ePostCode _init_mac(void *driver, const void *config, - const void *alert_token) + const void *alert_token) { return POST_DEV_NO_CFG_REQ; } - -const Driver_fxnTable MAC_fxnTable= { +const Driver_fxnTable MAC_fxnTable = { .cb_probe = _probe_mac, .cb_init = _init_mac, .cb_get_config = _mac_get_config_parameters_data, .cb_set_config = _mac_set_config_parameters_data, }; - - diff --git a/firmware/ec/src/devices/ocmp_wrappers/ocmp_powerSource.c b/firmware/ec/src/devices/ocmp_wrappers/ocmp_powerSource.c index 07d841b92b..c22be62edf 100644 --- a/firmware/ec/src/devices/ocmp_wrappers/ocmp_powerSource.c +++ b/firmware/ec/src/devices/ocmp_wrappers/ocmp_powerSource.c @@ -12,14 +12,14 @@ #include "inc/devices/powerSource.h" #include "helpers/array.h" -static bool _get_status(void *driver, unsigned int param_id, - void *return_buf) +static bool _get_status(void *driver, unsigned int param_id, void *return_buf) { bool ret = false; /* TODO: As of now using pwr_get_sourc_info as it is for Power source Update. * Once we change the handing of the powersource status #298 this will also changed. */ pwr_get_source_info(driver); - if ( pwr_process_get_status_parameters_data(param_id,return_buf) == RETURN_OK) { + if (pwr_process_get_status_parameters_data(param_id, return_buf) == + RETURN_OK) { ret = true; } return ret; diff --git a/firmware/ec/src/devices/ocmp_wrappers/ocmp_rfpowermonitor.c b/firmware/ec/src/devices/ocmp_wrappers/ocmp_rfpowermonitor.c index f38ca300ae..029ef584d3 100644 --- a/firmware/ec/src/devices/ocmp_wrappers/ocmp_rfpowermonitor.c +++ b/firmware/ec/src/devices/ocmp_wrappers/ocmp_rfpowermonitor.c @@ -12,19 +12,18 @@ /* OCMP message handler */ static bool _ocmp_get_status(void *driver, unsigned int param_id, - void *return_buf) { + void *return_buf) +{ switch (param_id) { case FE_POWER_STATUS_FORWARD: { - if (rffe_powermonitor_read_power(driver, - RFFE_STAT_FW_POWER, + if (rffe_powermonitor_read_power(driver, RFFE_STAT_FW_POWER, return_buf) == RETURN_OK) { return true; } break; } case FE_POWER_STATUS_REVERSE: { - if (rffe_powermonitor_read_power(driver, - RFFE_STAT_REV_POWER, + if (rffe_powermonitor_read_power(driver, RFFE_STAT_REV_POWER, return_buf) == RETURN_OK) { return true; } diff --git a/firmware/ec/src/devices/ocmp_wrappers/ocmp_rfwatchdog.c b/firmware/ec/src/devices/ocmp_wrappers/ocmp_rfwatchdog.c index 0be282a360..563ff06b7a 100644 --- a/firmware/ec/src/devices/ocmp_wrappers/ocmp_rfwatchdog.c +++ b/firmware/ec/src/devices/ocmp_wrappers/ocmp_rfwatchdog.c @@ -31,8 +31,8 @@ static ePostCode _rffe_watchdog_init(void *driver, const void *config, if (OcGpio_configure(cfg->pin_alert_hb, OCGPIO_CFG_INPUT)) { return POST_DEV_CFG_FAIL; } - if (OcGpio_configure(cfg->pin_interrupt, OCGPIO_CFG_INPUT | - OCGPIO_CFG_INT_FALLING)) { + if (OcGpio_configure(cfg->pin_interrupt, + OCGPIO_CFG_INPUT | OCGPIO_CFG_INT_FALLING)) { return POST_DEV_CFG_FAIL; } @@ -43,6 +43,3 @@ static ePostCode _rffe_watchdog_init(void *driver, const void *config, const Driver_fxnTable RFFEWatchdogP_fxnTable = { .cb_init = _rffe_watchdog_init, }; - - - diff --git a/firmware/ec/src/devices/ocmp_wrappers/ocmp_se98a.c b/firmware/ec/src/devices/ocmp_wrappers/ocmp_se98a.c index 3ecc7bb65e..5605f9dc7a 100644 --- a/firmware/ec/src/devices/ocmp_wrappers/ocmp_se98a.c +++ b/firmware/ec/src/devices/ocmp_wrappers/ocmp_se98a.c @@ -28,8 +28,8 @@ typedef enum Se98aAlert { SE98A_ALERT_CRITICAL } Se98aAlert; -static bool _get_status(void *driver, unsigned int param_id, - void *return_buf) { +static bool _get_status(void *driver, unsigned int param_id, void *return_buf) +{ switch (param_id) { case SE98A_STATUS_TEMPERATURE: { int8_t *res = return_buf; @@ -45,8 +45,8 @@ static bool _get_status(void *driver, unsigned int param_id, return false; } -static bool _get_config(void *driver, unsigned int param_id, - void *return_buf) { +static bool _get_config(void *driver, unsigned int param_id, void *return_buf) +{ switch (param_id) { case SE98A_CONFIG_LIM_LOW: case SE98A_CONFIG_LIM_HIGH: @@ -64,8 +64,8 @@ static bool _get_config(void *driver, unsigned int param_id, return false; } -static bool _set_config(void *driver, unsigned int param_id, - const void *data) { +static bool _set_config(void *driver, unsigned int param_id, const void *data) +{ switch (param_id) { case SE98A_CONFIG_LIM_LOW: case SE98A_CONFIG_LIM_HIGH: @@ -88,8 +88,7 @@ static ePostCode _probe(void *driver, POSTData *postData) return se98a_probe(driver, postData); } -static void _alert_handler(SE98A_Event evt, int8_t temperature, - void *context) +static void _alert_handler(SE98A_Event evt, int8_t temperature, void *context) { unsigned int alert; switch (evt) { @@ -124,7 +123,7 @@ static ePostCode _init(void *driver, const void *config, const SE98A_Config *se98a_config = config; for (int i = 0; i < ARRAY_SIZE(se98a_config->limits); ++i) { if (se98a_set_limit(driver, i + 1, se98a_config->limits[i]) != - RETURN_OK) { + RETURN_OK) { return POST_DEV_CFG_FAIL; } } @@ -139,9 +138,7 @@ static ePostCode _init(void *driver, const void *config, const Driver_fxnTable SE98_fxnTable = { /* Message handlers */ - .cb_probe = _probe, - .cb_init = _init, - .cb_get_status = _get_status, - .cb_get_config = _get_config, + .cb_probe = _probe, .cb_init = _init, + .cb_get_status = _get_status, .cb_get_config = _get_config, .cb_set_config = _set_config, }; diff --git a/firmware/ec/src/devices/ocmp_wrappers/ocmp_syncio.c b/firmware/ec/src/devices/ocmp_wrappers/ocmp_syncio.c index 222e0b35cd..4632d078d5 100644 --- a/firmware/ec/src/devices/ocmp_wrappers/ocmp_syncio.c +++ b/firmware/ec/src/devices/ocmp_wrappers/ocmp_syncio.c @@ -15,5 +15,3 @@ const Driver_fxnTable SYNC_fxnTable = { /* Message handlers */ .cb_get_status = SYNC_GpsStatus, }; - - diff --git a/firmware/ec/src/devices/ocmp_wrappers/ocmp_testmodule.c b/firmware/ec/src/devices/ocmp_wrappers/ocmp_testmodule.c index fe0d76e5e2..ea623c902b 100644 --- a/firmware/ec/src/devices/ocmp_wrappers/ocmp_testmodule.c +++ b/firmware/ec/src/devices/ocmp_wrappers/ocmp_testmodule.c @@ -11,18 +11,18 @@ #include "inc/common/global_header.h" typedef enum { - TWOG_IMEI = 0, - TWOG_IMSI = 1, - TWOG_GETMFG = 2, - TWOG_GETMODEL = 3, - TWOG_RSSI = 4, - TWOG_BER = 5, - TWOG_REGSTATUS = 6, - TWOG_NETWORK_OP_INFO = 7, - TWOG_CELLID = 8, - TWOG_BSIC = 9, - TWOG_LASTERR = 10, - TWOG_PARAM_MAX /* Limiter */ + TWOG_IMEI = 0, + TWOG_IMSI = 1, + TWOG_GETMFG = 2, + TWOG_GETMODEL = 3, + TWOG_RSSI = 4, + TWOG_BER = 5, + TWOG_REGSTATUS = 6, + TWOG_NETWORK_OP_INFO = 7, + TWOG_CELLID = 8, + TWOG_BSIC = 9, + TWOG_LASTERR = 10, + TWOG_PARAM_MAX /* Limiter */ } eTestModule_StatusParam; static ePostCode _probe(void **driver) @@ -32,75 +32,64 @@ static ePostCode _probe(void **driver) return POST_DEV_FOUND; } - static ePostCode _init(void *driver, const void **config, const void *alert_token) { - return g510_task_init(driver, config,alert_token); + return g510_task_init(driver, config, alert_token); } static bool _get_status(void *driver, unsigned int param_id, void *return_buf) { bool ret = false; switch (param_id) { - case TWOG_IMEI: - { - ret = g510_get_imei(return_buf); - break; - } - case TWOG_IMSI: - { - ret = g510_get_imsi(return_buf); - break; - } - case TWOG_GETMFG: - { - ret = g510_get_mfg(return_buf); - break; - } - case TWOG_GETMODEL: - { - ret = g510_get_model(return_buf); - break; - } - /* TODO: optimize this - no reason to call CSQ twice */ - case TWOG_RSSI: - { - ret = g510_get_rssi(return_buf); - break; - } - case TWOG_BER: - { - ret = g510_get_ber(return_buf); - break; - } - case TWOG_REGSTATUS: - { - ret = g510_get_regStatus(return_buf); - break; - } - case TWOG_NETWORK_OP_INFO: - /* TODO: from +COPS=? */ - return false; - case TWOG_CELLID: - { - ret = g510_get_cellId(return_buf); - break; - } - case TWOG_BSIC: - { - /* TODO: from +MCELL? */ - return false; - } - case TWOG_LASTERR: - { - /* TODO: implement last error */ - return false; - } - default: - LOGGER("TESTMOD::ERROR: Unknown param %d\n", param_id); - return false; + case TWOG_IMEI: { + ret = g510_get_imei(return_buf); + break; } + case TWOG_IMSI: { + ret = g510_get_imsi(return_buf); + break; + } + case TWOG_GETMFG: { + ret = g510_get_mfg(return_buf); + break; + } + case TWOG_GETMODEL: { + ret = g510_get_model(return_buf); + break; + } + /* TODO: optimize this - no reason to call CSQ twice */ + case TWOG_RSSI: { + ret = g510_get_rssi(return_buf); + break; + } + case TWOG_BER: { + ret = g510_get_ber(return_buf); + break; + } + case TWOG_REGSTATUS: { + ret = g510_get_regStatus(return_buf); + break; + } + case TWOG_NETWORK_OP_INFO: + /* TODO: from +COPS=? */ + return false; + case TWOG_CELLID: { + ret = g510_get_cellId(return_buf); + break; + } + case TWOG_BSIC: { + /* TODO: from +MCELL? */ + return false; + } + case TWOG_LASTERR: { + /* TODO: implement last error */ + return false; + } + default: + LOGGER("TESTMOD::ERROR: Unknown param %d\n", param_id); + return false; + } return ret; } diff --git a/firmware/ec/src/devices/pca9557.c b/firmware/ec/src/devices/pca9557.c index 7d37b73eef..2b421076a9 100644 --- a/firmware/ec/src/devices/pca9557.c +++ b/firmware/ec/src/devices/pca9557.c @@ -15,10 +15,10 @@ #include "inc/common/global_header.h" /* Register Addresses */ -#define PCA9557_INPUT_PORT_REG 0x00 -#define PCA9557_OUTPUT_PORT_REG 0x01 -#define PCA9557_POL_INV_REG 0x02 -#define PCA9557_CONFIG_REG 0x03 +#define PCA9557_INPUT_PORT_REG 0x00 +#define PCA9557_OUTPUT_PORT_REG 0x01 +#define PCA9557_POL_INV_REG 0x02 +#define PCA9557_CONFIG_REG 0x03 /***************************************************************************** ** FUNCTION NAME : PCA9557_regRead @@ -31,15 +31,16 @@ ** *****************************************************************************/ static ReturnStatus PCA9557_regRead(const I2C_Dev *i2c_dev, uint8_t regAddress, - uint8_t *regValue) + uint8_t *regValue) { ReturnStatus status = RETURN_NOTOK; I2C_Handle pca9557_handle = i2c_get_handle(i2c_dev->bus); if (!pca9557_handle) { LOGGER_ERROR("IOEXP:ERROR:: Failed to get I2C Bus for IO Expander " - "0x%x on bus 0x%x.\n", i2c_dev->slave_addr, i2c_dev->bus); + "0x%x on bus 0x%x.\n", + i2c_dev->slave_addr, i2c_dev->bus); } else { - uint16_t tmpValue = 0x0000; + uint16_t tmpValue = 0x0000; status = i2c_reg_read(pca9557_handle, i2c_dev->slave_addr, regAddress, &tmpValue, 1); *regValue = (uint8_t)tmpValue; @@ -58,13 +59,14 @@ static ReturnStatus PCA9557_regRead(const I2C_Dev *i2c_dev, uint8_t regAddress, ** *****************************************************************************/ static ReturnStatus PCA9557_regWrite(const I2C_Dev *i2c_dev, uint8_t regAddress, - uint8_t regValue) + uint8_t regValue) { ReturnStatus status = RETURN_NOTOK; I2C_Handle pca9557_handle = i2c_get_handle(i2c_dev->bus); if (!pca9557_handle) { LOGGER_ERROR("IOEXP:ERROR:: Failed to get I2C Bus for IO Expander " - "0x%x on bus 0x%x.\n", i2c_dev->slave_addr, i2c_dev->bus); + "0x%x on bus 0x%x.\n", + i2c_dev->slave_addr, i2c_dev->bus); } else { status = i2c_reg_write(pca9557_handle, i2c_dev->slave_addr, regAddress, regValue, 1); @@ -83,8 +85,8 @@ static ReturnStatus PCA9557_regWrite(const I2C_Dev *i2c_dev, uint8_t regAddress, *****************************************************************************/ ReturnStatus PCA9557_getInput(const I2C_Dev *i2c_dev, uint8_t *inputRegValue) { - ReturnStatus status = PCA9557_regRead(i2c_dev, PCA9557_INPUT_PORT_REG, - inputRegValue); + ReturnStatus status = + PCA9557_regRead(i2c_dev, PCA9557_INPUT_PORT_REG, inputRegValue); if (status == RETURN_OK) { LOGGER_DEBUG("IOEXP:INFO:: IO Expander 0x%x on bus 0x%x is " "reporting Input Port Reg value of 0x%x.\n", @@ -104,8 +106,8 @@ ReturnStatus PCA9557_getInput(const I2C_Dev *i2c_dev, uint8_t *inputRegValue) *****************************************************************************/ ReturnStatus PCA9557_getOutput(const I2C_Dev *i2c_dev, uint8_t *outputRegValue) { - ReturnStatus status = PCA9557_regRead(i2c_dev, PCA9557_OUTPUT_PORT_REG, - outputRegValue); + ReturnStatus status = + PCA9557_regRead(i2c_dev, PCA9557_OUTPUT_PORT_REG, outputRegValue); if (status == RETURN_OK) { LOGGER_DEBUG("IOEXP:INFO:: IO Expander 0x%x on bus 0x%x is " "reporting Output Port Reg value of 0x%x.\n", diff --git a/firmware/ec/src/devices/powerSource.c b/firmware/ec/src/devices/powerSource.c index 5b920ecd3e..2ae3a3f9f8 100644 --- a/firmware/ec/src/devices/powerSource.c +++ b/firmware/ec/src/devices/powerSource.c @@ -24,7 +24,6 @@ *****************************************************************************/ static tPowerSource Power_SourceInfo[PWR_SRC_MAX]; - /***************************************************************************** ** FUNCTION NAME : pwr_update_source_info ** @@ -35,21 +34,20 @@ static tPowerSource Power_SourceInfo[PWR_SRC_MAX]; ** RETURN TYPE : None ** *****************************************************************************/ -static void pwr_update_source_info(ePowerSource powerSrc, ePowerSourceState pwrState) +static void pwr_update_source_info(ePowerSource powerSrc, + ePowerSourceState pwrState) { - - ePowerSource itr = PWR_SRC_AUX_OR_SOLAR ; + ePowerSource itr = PWR_SRC_AUX_OR_SOLAR; for (; itr < PWR_SRC_MAX; itr++) { if (Power_SourceInfo[itr].powerSource == powerSrc) { Power_SourceInfo[itr].state = pwrState; LOGGER("POWER:INFO:: Power State updated for Power Source %d with %d.\n", - Power_SourceInfo[itr].powerSource, - Power_SourceInfo[itr].state); + Power_SourceInfo[itr].powerSource, + Power_SourceInfo[itr].state); } } } - /****************************************************************************** ** FUNCTION NAME : pwr_source_inuse ** @@ -63,19 +61,18 @@ static void pwr_update_source_info(ePowerSource powerSrc, ePowerSourceState pwrS static ReturnStatus pwr_source_inuse(ePowerSource *inUse) { ReturnStatus ret = RETURN_NOTOK; - ePowerSource itr = PWR_SRC_AUX_OR_SOLAR ; - for ( ; itr < PWR_SRC_MAX; itr++) { + ePowerSource itr = PWR_SRC_AUX_OR_SOLAR; + for (; itr < PWR_SRC_MAX; itr++) { if (Power_SourceInfo[itr].state == PWR_SRC_AVAILABLE) { *inUse = itr; ret = RETURN_OK; break; } - } return ret; } -void pwr_source_config(PWRSRC_Dev* driver) +void pwr_source_config(PWRSRC_Dev *driver) { //Configuring GPIOS OcGpio_configure(&driver->cfg.pin_solar_aux_prsnt_n, OCGPIO_CFG_INPUT); @@ -96,14 +93,13 @@ void pwr_source_config(PWRSRC_Dev* driver) *****************************************************************************/ void pwr_source_init(void) { - ePowerSource itr = PWR_SRC_AUX_OR_SOLAR ; + ePowerSource itr = PWR_SRC_AUX_OR_SOLAR; for (; itr < PWR_SRC_MAX; itr++) { Power_SourceInfo[itr].powerSource = itr; Power_SourceInfo[itr].state = PWR_SRC_NON_AVAILABLE; } } - /****************************************************************************** * @fn pwr_check_aux_or_solar * @@ -115,15 +111,13 @@ void pwr_source_init(void) */ static ReturnStatus pwr_check_aux_or_solar(PWRSRC_Dev *pwrSrcDev) { - - ReturnStatus ret = RETURN_NOTOK; - ePowerSourceState status=PWR_SRC_NON_AVAILABLE; + ePowerSourceState status = PWR_SRC_NON_AVAILABLE; //For Checking SOLAR POWER SOURCE uint8_t value = 0; value = OcGpio_read(&pwrSrcDev->cfg.pin_solar_aux_prsnt_n); if (value == 0) { - status=PWR_SRC_AVAILABLE; + status = PWR_SRC_AVAILABLE; ret = RETURN_OK; } pwr_update_source_info(PWR_SRC_AUX_OR_SOLAR, status); @@ -143,11 +137,11 @@ static ReturnStatus pwr_check_poe(PWRSRC_Dev *pwrSrcDev) { ReturnStatus ret = RETURN_NOTOK; uint8_t value = 0; - ePowerSourceState status=PWR_SRC_NON_AVAILABLE; + ePowerSourceState status = PWR_SRC_NON_AVAILABLE; //For Checking POE POWER SOURCE value = OcGpio_read(&pwrSrcDev->cfg.pin_poe_prsnt_n); - if ( value == 0) { - status=PWR_SRC_AVAILABLE; + if (value == 0) { + status = PWR_SRC_AVAILABLE; ret = RETURN_OK; } pwr_update_source_info(PWR_SRC_POE, status); @@ -167,7 +161,7 @@ static ReturnStatus pwr_check_int_batt(PWRSRC_Dev *pwrSrcDev) { ReturnStatus ret = RETURN_NOTOK; uint8_t value = 0; - ePowerSourceState status=PWR_SRC_NON_AVAILABLE; + ePowerSourceState status = PWR_SRC_NON_AVAILABLE; //For Checking INTERNAL BATTERY SOURCE value = OcGpio_read(&pwrSrcDev->cfg.pin_int_bat_prsnt); @@ -193,11 +187,11 @@ static ReturnStatus pwr_check_ext_batt(PWRSRC_Dev *pwrSrcDev) { ReturnStatus ret = RETURN_NOTOK; uint8_t value = 0; - ePowerSourceState status=PWR_SRC_NON_AVAILABLE; + ePowerSourceState status = PWR_SRC_NON_AVAILABLE; value = OcGpio_read(&pwrSrcDev->cfg.pin_ext_bat_prsnt); if (value == 0) { /* If read fails, we'll get a negative value */ - status=PWR_SRC_AVAILABLE; + status = PWR_SRC_AVAILABLE; ret = RETURN_OK; } @@ -217,23 +211,23 @@ static ReturnStatus pwr_check_ext_batt(PWRSRC_Dev *pwrSrcDev) static void pwr_check_presence_of_source(PWRSRC_Dev *pwrSrcDev) { ReturnStatus ret = RETURN_NOTOK; - ret = pwr_check_aux_or_solar(pwrSrcDev); - LOGGER("POWER:INFO:: Power Source Aux/Solar %s.\n", - ((ret == RETURN_OK) ? "available" : "not available")); + ret = pwr_check_aux_or_solar(pwrSrcDev); + LOGGER("POWER:INFO:: Power Source Aux/Solar %s.\n", + ((ret == RETURN_OK) ? "available" : "not available")); ret = pwr_check_poe(pwrSrcDev); LOGGER("POWER:INFO:: Power Source POE %s.\n", - ((ret == RETURN_OK) ? "available" : "not available")); + ((ret == RETURN_OK) ? "available" : "not available")); ret = pwr_check_int_batt(pwrSrcDev); LOGGER("POWER:INFO:: Power Source INTERNAL BATTERY %s.\n", - ((ret == RETURN_OK) ? "available" : "not available")); + ((ret == RETURN_OK) ? "available" : "not available")); ret = pwr_check_ext_batt(pwrSrcDev); LOGGER("POWER:INFO:: Power Source EXTERNAL BATTERY %s.\n", - ((ret == RETURN_OK) ? "available" : "not available")); + ((ret == RETURN_OK) ? "available" : "not available")); - return ; + return; } /***************************************************************************** @@ -273,70 +267,64 @@ void pwr_get_source_info(PWRSRC_Dev *pwrSrcDev) ** RETURN TYPE : Success or Failure ** *****************************************************************************/ -ReturnStatus pwr_process_get_status_parameters_data( - ePower_StatusParamId paramIndex, uint8_t *pPowerStatusData) +ReturnStatus +pwr_process_get_status_parameters_data(ePower_StatusParamId paramIndex, + uint8_t *pPowerStatusData) { ReturnStatus status = RETURN_OK; switch (paramIndex) { - case PWR_STAT_POE_AVAILABILITY: - { - if ((Power_SourceInfo[PWR_SRC_POE].state == PWR_SRC_ACTIVE) - || (Power_SourceInfo[PWR_SRC_POE].state == PWR_SRC_AVAILABLE)) + case PWR_STAT_POE_AVAILABILITY: { + if ((Power_SourceInfo[PWR_SRC_POE].state == PWR_SRC_ACTIVE) || + (Power_SourceInfo[PWR_SRC_POE].state == PWR_SRC_AVAILABLE)) *pPowerStatusData = 1; break; } - case PWR_STAT_POE_ACCESSIBILITY: - { + case PWR_STAT_POE_ACCESSIBILITY: { if (Power_SourceInfo[PWR_SRC_POE].state == PWR_SRC_ACTIVE) *pPowerStatusData = 1; break; } - case PWR_STAT_SOLAR_AVAILABILITY: - { - if ((Power_SourceInfo[PWR_SRC_AUX_OR_SOLAR].state == PWR_SRC_ACTIVE) - || (Power_SourceInfo[PWR_SRC_AUX_OR_SOLAR].state - == PWR_SRC_AVAILABLE)) + case PWR_STAT_SOLAR_AVAILABILITY: { + if ((Power_SourceInfo[PWR_SRC_AUX_OR_SOLAR].state == + PWR_SRC_ACTIVE) || + (Power_SourceInfo[PWR_SRC_AUX_OR_SOLAR].state == + PWR_SRC_AVAILABLE)) *pPowerStatusData = 1; break; } - case PWR_STAT_SOLAR_ACCESSIBILITY: - { + case PWR_STAT_SOLAR_ACCESSIBILITY: { if (Power_SourceInfo[PWR_SRC_AUX_OR_SOLAR].state == PWR_SRC_ACTIVE) *pPowerStatusData = 1; break; } - case PWR_STAT_EXTBATT_AVAILABILITY: - { - if ((Power_SourceInfo[PWR_SRC_LEAD_ACID_BATT].state - == PWR_SRC_ACTIVE) - || (Power_SourceInfo[PWR_SRC_LEAD_ACID_BATT].state - == PWR_SRC_AVAILABLE)) + case PWR_STAT_EXTBATT_AVAILABILITY: { + if ((Power_SourceInfo[PWR_SRC_LEAD_ACID_BATT].state == + PWR_SRC_ACTIVE) || + (Power_SourceInfo[PWR_SRC_LEAD_ACID_BATT].state == + PWR_SRC_AVAILABLE)) *pPowerStatusData = 1; break; } - case PWR_STAT_EXTBATT_ACCESSIBILITY: - { - if (Power_SourceInfo[PWR_SRC_LEAD_ACID_BATT].state - == PWR_SRC_ACTIVE) + case PWR_STAT_EXTBATT_ACCESSIBILITY: { + if (Power_SourceInfo[PWR_SRC_LEAD_ACID_BATT].state == + PWR_SRC_ACTIVE) *pPowerStatusData = 1; break; } - case PWR_STAT_INTBATT_AVAILABILITY: - { - if ((Power_SourceInfo[PWR_SRC_LIION_BATT].state == PWR_SRC_ACTIVE) - || (Power_SourceInfo[PWR_SRC_LIION_BATT].state - == PWR_SRC_AVAILABLE)) + case PWR_STAT_INTBATT_AVAILABILITY: { + if ((Power_SourceInfo[PWR_SRC_LIION_BATT].state == + PWR_SRC_ACTIVE) || + (Power_SourceInfo[PWR_SRC_LIION_BATT].state == + PWR_SRC_AVAILABLE)) *pPowerStatusData = 1; break; } - case PWR_STAT_INTBATT_ACCESSIBILITY: - { + case PWR_STAT_INTBATT_ACCESSIBILITY: { if (Power_SourceInfo[PWR_SRC_LIION_BATT].state == PWR_SRC_ACTIVE) *pPowerStatusData = 1; break; } - default: - { + default: { LOGGER("POWER::ERROR: Invalid Power param status.\n"); } } diff --git a/firmware/ec/src/devices/sbdn9603.c b/firmware/ec/src/devices/sbdn9603.c index 37ea437bf5..842f1870cf 100644 --- a/firmware/ec/src/devices/sbdn9603.c +++ b/firmware/ec/src/devices/sbdn9603.c @@ -29,10 +29,10 @@ //***************************************************************************** // MACROS DEFINITION //***************************************************************************** -#define OBC_TASK_PRIORITY 2 -#define OBC_TASK_STACK_SIZE 2048 +#define OBC_TASK_PRIORITY 2 +#define OBC_TASK_STACK_SIZE 2048 -#define SBD_WRITE_TIMEOUT 500 +#define SBD_WRITE_TIMEOUT 500 /* TODO: move to helper? */ #define STATIC_STRLEN(s) (ARRAY_SIZE(s) - 1) @@ -45,13 +45,12 @@ extern OCSubsystem *ss_reg[]; static UART_Handle uartIridium; static SBD_Handle s_hSbd = NULL; - static UART_Handle open_comm(const Iridium_Cfg *iridium) { DEBUG("Resetting Iridium module\n"); - OcGpio_configure(&iridium->pin_enable, OCGPIO_CFG_OUTPUT | - OCGPIO_CFG_OUT_LOW); + OcGpio_configure(&iridium->pin_enable, + OCGPIO_CFG_OUTPUT | OCGPIO_CFG_OUT_LOW); OcGpio_configure(&iridium->pin_nw_avail, OCGPIO_CFG_INPUT); /* reset - for proper reset, Iridium should be disabled for ~2s */ @@ -83,20 +82,21 @@ ReturnStatus sbd_init(const Iridium_Cfg *iridium) } /* Initialize SBD layers */ -// const SbdCallbackList cbList = { -// .sbdring = sbdring_cb, -// .ciev = sbdciev_cb, -// }; + // const SbdCallbackList cbList = { + // .sbdring = sbdring_cb, + // .ciev = sbdciev_cb, + // }; s_hSbd = SBD_init(uartIridium, NULL, NULL); if (!s_hSbd) { return RETURN_NOTOK; } /* TODO: module verification? */ - if (!SBD_k(s_hSbd, SBD_FLOW_CONTROL_HW) /* Enable HW flow control */ - || !SBD_sbdmta(s_hSbd, true) /* Ring indication enable */ - || !SBD_sbdareg(s_hSbd, SBD_AREG_MODE_AUTO) /* Auto registration */ - || !SBD_cier(s_hSbd, true, false, true, false, false)) { /* Service change indications */ + if (!SBD_k(s_hSbd, SBD_FLOW_CONTROL_HW) /* Enable HW flow control */ + || !SBD_sbdmta(s_hSbd, true) /* Ring indication enable */ + || !SBD_sbdareg(s_hSbd, SBD_AREG_MODE_AUTO) /* Auto registration */ + || !SBD_cier(s_hSbd, true, false, true, false, + false)) { /* Service change indications */ /* TODO: handle cleanup */ s_hSbd = NULL; return RETURN_NOTOK; @@ -105,97 +105,96 @@ ReturnStatus sbd_init(const Iridium_Cfg *iridium) return RETURN_OK; } -bool sbd9603_get_queueLength( OBC_Iridium_Status_Data *pIridiumStatusData) +bool sbd9603_get_queueLength(OBC_Iridium_Status_Data *pIridiumStatusData) { - pIridiumStatusData->outQueueLen = 25; - return true; + pIridiumStatusData->outQueueLen = 25; + return true; } -bool sbd9603_get_lastError( OBC_Iridium_Status_Data *pIridiumStatusData) +bool sbd9603_get_lastError(OBC_Iridium_Status_Data *pIridiumStatusData) { - pIridiumStatusData->lastErr = (OBC_lastError) { - .src = ERR_RC_INTERNAL, - .code = 5, - }; - return true; + pIridiumStatusData->lastErr = (OBC_lastError){ + .src = ERR_RC_INTERNAL, + .code = 5, + }; + return true; } -bool sbd9603_get_imei( OBC_Iridium_Status_Data *pIridiumStatusData) +bool sbd9603_get_imei(OBC_Iridium_Status_Data *pIridiumStatusData) { - bool ret = true; - if (!s_hSbd) { - ret = false; - } - SbdcgsnInfo cgsnInfo; - if (!SBD_cgsn(s_hSbd, &cgsnInfo)) { - ret = false; - } - pIridiumStatusData->imei = strtoull(cgsnInfo.imei, NULL, 10); - return ret; + bool ret = true; + if (!s_hSbd) { + ret = false; + } + SbdcgsnInfo cgsnInfo; + if (!SBD_cgsn(s_hSbd, &cgsnInfo)) { + ret = false; + } + pIridiumStatusData->imei = strtoull(cgsnInfo.imei, NULL, 10); + return ret; } -bool sbd9603_get_mfg( OBC_Iridium_Status_Data *pIridiumStatusData) +bool sbd9603_get_mfg(OBC_Iridium_Status_Data *pIridiumStatusData) { - bool ret = true; - if (!s_hSbd) { - ret = false; - } - SbdCgmiInfo cgmiInfo; - if (!SBD_cgmi(s_hSbd, &cgmiInfo)) { - ret = false; - } - strncpy(pIridiumStatusData->mfg, cgmiInfo.mfg, - sizeof(pIridiumStatusData->mfg)); - return ret; + bool ret = true; + if (!s_hSbd) { + ret = false; + } + SbdCgmiInfo cgmiInfo; + if (!SBD_cgmi(s_hSbd, &cgmiInfo)) { + ret = false; + } + strncpy(pIridiumStatusData->mfg, cgmiInfo.mfg, + sizeof(pIridiumStatusData->mfg)); + return ret; } -bool sbd9603_get_model( OBC_Iridium_Status_Data *pIridiumStatusData) +bool sbd9603_get_model(OBC_Iridium_Status_Data *pIridiumStatusData) { - - bool ret = true; - if (!s_hSbd) { - ret = false; - } - SbdCgmmInfo cgmmInfo; - if (!SBD_cgmm(s_hSbd, &cgmmInfo)) { - ret = false; - } - /* Model string is verbose - if it's 9600 fam, replace with shorter + bool ret = true; + if (!s_hSbd) { + ret = false; + } + SbdCgmmInfo cgmmInfo; + if (!SBD_cgmm(s_hSbd, &cgmmInfo)) { + ret = false; + } + /* Model string is verbose - if it's 9600 fam, replace with shorter * model number since we only have 4 characters */ - char *model = cgmmInfo.model; - const char fam_str[] = "IRIDIUM 9600 Family"; - if (strncmp(model, fam_str, STATIC_STRLEN(fam_str)) == 0) { - model = "96xx"; - } - strncpy(pIridiumStatusData->model, model, - sizeof(pIridiumStatusData->model)); - return ret; + char *model = cgmmInfo.model; + const char fam_str[] = "IRIDIUM 9600 Family"; + if (strncmp(model, fam_str, STATIC_STRLEN(fam_str)) == 0) { + model = "96xx"; + } + strncpy(pIridiumStatusData->model, model, + sizeof(pIridiumStatusData->model)); + return ret; } -bool sbd9603_get_signalqual( OBC_Iridium_Status_Data *pIridiumStatusData) +bool sbd9603_get_signalqual(OBC_Iridium_Status_Data *pIridiumStatusData) { - bool ret = true; - if (!s_hSbd) { - ret = false; - } - SbdcsqInfo csqInfo; - if (!SBD_csqf(s_hSbd, &csqInfo)) { - ret = false; - } - pIridiumStatusData->rssi = csqInfo.rssi; - return ret; + bool ret = true; + if (!s_hSbd) { + ret = false; + } + SbdcsqInfo csqInfo; + if (!SBD_csqf(s_hSbd, &csqInfo)) { + ret = false; + } + pIridiumStatusData->rssi = csqInfo.rssi; + return ret; } -bool sbd9603_get_regStatus( OBC_Iridium_Status_Data *pIridiumStatusData) +bool sbd9603_get_regStatus(OBC_Iridium_Status_Data *pIridiumStatusData) { - bool ret = true; - if (!s_hSbd) { - ret = false; - } - if (!SBD_sbdregRead(s_hSbd, &pIridiumStatusData->regStat)) { - ret = false; - } - return ret; + bool ret = true; + if (!s_hSbd) { + ret = false; + } + if (!SBD_sbdregRead(s_hSbd, &pIridiumStatusData->regStat)) { + ret = false; + } + return ret; } #include "helpers/memory.h" @@ -228,7 +227,7 @@ static void loopback_test(SBD_Handle hSbd, bool debugLogs) System_abort("SBDTC Failed"); } - char ret[sizeof(msg)] = { }; + char ret[sizeof(msg)] = {}; if (SBD_sbdrb(hSbd, ret, msgLen) < msgLen) { System_abort("SBDRB Failed"); } diff --git a/firmware/ec/src/devices/se98a.c b/firmware/ec/src/devices/se98a.c index 7735c47829..15e7afa71a 100644 --- a/firmware/ec/src/devices/se98a.c +++ b/firmware/ec/src/devices/se98a.c @@ -20,38 +20,38 @@ * Register Definitions *****************************************************************************/ /* Register Addresses */ -#define SE98A_REG_CAPS 0x00 -#define SE98A_REG_CFG 0x01 -#define SE98A_REG_HIGH_LIM 0x02 -#define SE98A_REG_LOW_LIM 0x03 -#define SE98A_REG_CRIT_LIM 0x04 -#define SE98A_REG_TEMP 0x05 -#define SE98A_REG_MFG_ID 0x06 -#define SE98A_REG_DEV_ID 0x07 +#define SE98A_REG_CAPS 0x00 +#define SE98A_REG_CFG 0x01 +#define SE98A_REG_HIGH_LIM 0x02 +#define SE98A_REG_LOW_LIM 0x03 +#define SE98A_REG_CRIT_LIM 0x04 +#define SE98A_REG_TEMP 0x05 +#define SE98A_REG_MFG_ID 0x06 +#define SE98A_REG_DEV_ID 0x07 /* Temperature Sensor Info */ -#define SE98A_MFG_ID 0x1131 -#define SE98A_DEV_ID 0xA1 +#define SE98A_MFG_ID 0x1131 +#define SE98A_DEV_ID 0xA1 /* Configuration Bits */ -#define SE98A_CFG_HEN_H (1 << 10) /* Hysteresis Enable High Bit */ -#define SE98A_CFG_HEN_L (1 << 9) /* Hysteresis Enable Low Bit */ -#define SE98A_CFG_SHMD (1 << 8) /* Shutdown Mode */ +#define SE98A_CFG_HEN_H (1 << 10) /* Hysteresis Enable High Bit */ +#define SE98A_CFG_HEN_L (1 << 9) /* Hysteresis Enable Low Bit */ +#define SE98A_CFG_SHMD (1 << 8) /* Shutdown Mode */ -#define SE98A_CFG_CTLB (1 << 7) /* Critical Trip Lock Bit */ -#define SE98A_CFG_AWLB (1 << 6) /* Alarm Window Lock Bit */ -#define SE98A_CFG_CEVENT (1 << 5) /* (WO) Clear EVENT */ -#define SE98A_CFG_ESTAT (1 << 4) /* (RO) EVENT Status */ +#define SE98A_CFG_CTLB (1 << 7) /* Critical Trip Lock Bit */ +#define SE98A_CFG_AWLB (1 << 6) /* Alarm Window Lock Bit */ +#define SE98A_CFG_CEVENT (1 << 5) /* (WO) Clear EVENT */ +#define SE98A_CFG_ESTAT (1 << 4) /* (RO) EVENT Status */ -#define SE98A_CFG_EOCTL (1 << 3) /* EVENT Output Control */ -#define SE98A_CFG_CVO (1 << 2) /* Critical Event Only */ -#define SE98A_CFG_EP (1 << 1) /* EVENT Polarity */ -#define SE98A_CFG_EMD (1 << 0) /* EVENT Mode */ +#define SE98A_CFG_EOCTL (1 << 3) /* EVENT Output Control */ +#define SE98A_CFG_CVO (1 << 2) /* Critical Event Only */ +#define SE98A_CFG_EP (1 << 1) /* EVENT Polarity */ +#define SE98A_CFG_EMD (1 << 0) /* EVENT Mode */ -#define SE98A_CFG_HYS_0 (0x0 << 9) -#define SE98A_CFG_HYS_1P5 (0x1 << 9) -#define SE98A_CFG_HYS_3 (0x2 << 9) -#define SE98A_CFG_HYS_6 (0x3 << 9) +#define SE98A_CFG_HYS_0 (0x0 << 9) +#define SE98A_CFG_HYS_1P5 (0x1 << 9) +#define SE98A_CFG_HYS_3 (0x2 << 9) +#define SE98A_CFG_HYS_6 (0x3 << 9) /* Default CFG plus interrupt mode (we don't support comparator mode) */ #define SE98A_CONFIG_DEFAULT (0x0000 | SE98A_CFG_EMD | SE98A_CFG_HYS_1P5) @@ -59,16 +59,15 @@ /***************************************************************************** * Helper to read from a SE98A register *****************************************************************************/ -static ReturnStatus se98a_reg_read(const SE98A_Dev *dev, - uint8_t regAddress, +static ReturnStatus se98a_reg_read(const SE98A_Dev *dev, uint8_t regAddress, uint16_t *regValue) { ReturnStatus status = RETURN_NOTOK; I2C_Handle tempHandle = i2c_get_handle(dev->cfg.dev.bus); if (!tempHandle) { LOGGER_ERROR("SE98A:ERROR:: Failed to get I2C Bus for Temperature " - "sensor 0x%x on bus 0x%x.\n", dev->cfg.dev.slave_addr, - dev->cfg.dev.bus); + "sensor 0x%x on bus 0x%x.\n", + dev->cfg.dev.slave_addr, dev->cfg.dev.bus); } else { status = i2c_reg_read(tempHandle, dev->cfg.dev.slave_addr, regAddress, regValue, 2); @@ -80,16 +79,15 @@ static ReturnStatus se98a_reg_read(const SE98A_Dev *dev, /***************************************************************************** * Helper to write to a SE98A register *****************************************************************************/ -static ReturnStatus se98a_reg_write(const SE98A_Dev *dev, - uint8_t regAddress, +static ReturnStatus se98a_reg_write(const SE98A_Dev *dev, uint8_t regAddress, uint16_t regValue) { ReturnStatus status = RETURN_NOTOK; I2C_Handle tempHandle = i2c_get_handle(dev->cfg.dev.bus); if (!tempHandle) { LOGGER_ERROR("SE98A:ERROR:: Failed to get I2C Bus for Temperature " - "sensor 0x%x on bus 0x%x.\n", dev->cfg.dev.slave_addr, - dev->cfg.dev.bus); + "sensor 0x%x on bus 0x%x.\n", + dev->cfg.dev.slave_addr, dev->cfg.dev.bus); } else { regValue = htobe16(regValue); status = i2c_reg_write(tempHandle, dev->cfg.dev.slave_addr, regAddress, @@ -104,8 +102,7 @@ static ReturnStatus se98a_reg_write(const SE98A_Dev *dev, static ReturnStatus se98a_get_dev_id(const SE98A_Dev *dev, uint8_t *devID) { uint16_t regValue; - ReturnStatus status = se98a_reg_read(dev, SE98A_REG_DEV_ID, - ®Value); + ReturnStatus status = se98a_reg_read(dev, SE98A_REG_DEV_ID, ®Value); if (status == RETURN_OK) { /* Strip off the revision - we don't care about it right now */ *devID = HIBYTE(regValue); @@ -176,7 +173,8 @@ ReturnStatus se98a_set_limit(SE98A_Dev *dev, /***************************************************************************** * Helper to convert a SE98A register value to a temperature *****************************************************************************/ -static int8_t reg2temp(uint16_t reg) { +static int8_t reg2temp(uint16_t reg) +{ /* The limit regs have lower precision, so by making this function common, * we lose 0.125 precision... since we round to the nearest int, I'm not * worried */ @@ -221,7 +219,6 @@ ReturnStatus se98a_read(SE98A_Dev *dev, int8_t *tempValue) return status; } - /***************************************************************************** * Helper to read the configuration register *****************************************************************************/ @@ -235,7 +232,7 @@ static ReturnStatus se98a_get_config_reg(const SE98A_Dev *dev, *****************************************************************************/ ReturnStatus se98a_get_limit(SE98A_Dev *dev, eTempSensor_ConfigParamsId limitToConfig, - int8_t* tempLimitValue) + int8_t *tempLimitValue) { ReturnStatus status = RETURN_NOTOK; uint16_t regValue = 0x0000; @@ -261,7 +258,8 @@ ReturnStatus se98a_get_limit(SE98A_Dev *dev, *tempLimitValue = reg2temp(regValue); LOGGER_DEBUG("TEMPSENSOR:INFO:: Temperature sensor 0x%x on bus " "0x%x is having Limit configure to 0x%x.\n", - dev->cfg.dev.slave_addr, dev->cfg.dev.bus, *tempLimitValue); + dev->cfg.dev.slave_addr, dev->cfg.dev.bus, + *tempLimitValue); } return status; } @@ -269,21 +267,24 @@ ReturnStatus se98a_get_limit(SE98A_Dev *dev, /***************************************************************************** * Internal IRQ handler - reads in triggered interrupts and dispatches CBs *****************************************************************************/ -static void se98a_handle_irq(void *context) { +static void se98a_handle_irq(void *context) +{ SE98A_Dev *dev = context; ReturnStatus res = RETURN_NOTOK; - const IArg mutexKey = GateMutex_enter(dev->obj.mutex); { + const IArg mutexKey = GateMutex_enter(dev->obj.mutex); + { /* See if this event was from us (we can't just read the trip status * since those bits are sticky - they could be from an old event) */ uint16_t config_reg; if ((se98a_get_config_reg(dev, &config_reg) == RETURN_OK) && - (config_reg & SE98A_CFG_ESTAT)) { + (config_reg & SE98A_CFG_ESTAT)) { /* Clear the event */ config_reg |= SE98A_CFG_CEVENT; res = se98a_set_config_reg(dev, config_reg); } - } GateMutex_leave(dev->obj.mutex, mutexKey); + } + GateMutex_leave(dev->obj.mutex, mutexKey); if (res != RETURN_OK) { return; @@ -335,9 +336,8 @@ ReturnStatus se98a_init(SE98A_Dev *dev) /* The only way to truly reset this device is to cycle power - we'll just * clear out the config register to be safe and clear any interrupts from * a previous life */ - if (se98a_set_config_reg( - dev, SE98A_CONFIG_DEFAULT | SE98A_CFG_CEVENT) != - RETURN_OK) { + if (se98a_set_config_reg(dev, SE98A_CONFIG_DEFAULT | SE98A_CFG_CEVENT) != + RETURN_OK) { return RETURN_NOTOK; } @@ -371,19 +371,21 @@ ReturnStatus se98a_enable_alerts(SE98A_Dev *dev) Task_sleep(125); ReturnStatus res = RETURN_NOTOK; - const IArg mutexKey = GateMutex_enter(dev->obj.mutex); { + const IArg mutexKey = GateMutex_enter(dev->obj.mutex); + { uint16_t config_reg; if (se98a_get_config_reg(dev, &config_reg) == RETURN_OK) { config_reg |= SE98A_CFG_EOCTL; res = se98a_set_config_reg(dev, config_reg); } - } GateMutex_leave(dev->obj.mutex, mutexKey); + } + GateMutex_leave(dev->obj.mutex, mutexKey); return res; } /***************************************************************************** *****************************************************************************/ -ePostCode se98a_probe(SE98A_Dev *dev, POSTData *postData) +ePostCode se98a_probe(SE98A_Dev *dev, POSTData *postData) { uint8_t devId = 0x00; uint16_t manfId = 0x0000; @@ -400,6 +402,7 @@ ePostCode se98a_probe(SE98A_Dev *dev, POSTData *postData) if (manfId != SE98A_MFG_ID) { return POST_DEV_ID_MISMATCH; } - post_update_POSTData(postData, dev->cfg.dev.bus, dev->cfg.dev.slave_addr,manfId, devId); + post_update_POSTData(postData, dev->cfg.dev.bus, dev->cfg.dev.slave_addr, + manfId, devId); return POST_DEV_FOUND; } diff --git a/firmware/ec/src/devices/sx1509.c b/firmware/ec/src/devices/sx1509.c index 314facf906..fe8c0f7b2c 100644 --- a/firmware/ec/src/devices/sx1509.c +++ b/firmware/ec/src/devices/sx1509.c @@ -18,129 +18,152 @@ /***************************************************************************** * REGISTER DEFINITIONS *****************************************************************************/ -#define SX1509_REG_INPUT_DISABLE_B 0x00 /* Input buffer disable register I/O[15..8] (Bank B) */ -#define SX1509_REG_INPUT_DISABLE_A 0x01 /* Input buffer disable register I/O[7..0] (Bank A) */ -#define SX1509_REG_LONG_SLEW_B 0x02 /* Output buffer long slew register I/O[15..8] (Bank B) */ -#define SX1509_REG_LONG_SLEW_A 0x03 /* Output buffer long slew register I/O[7..0] (Bank A) */ -#define SX1509_REG_LOW_DRIVE_B 0x04 /* Output buffer low drive register I/O[15..8] (Bank B) */ -#define SX1509_REG_LOW_DRIVE_A 0x05 /* Output buffer low drive register I/O[7..0] (Bank A) */ -#define SX1509_REG_PULL_UP_B 0x06 /* Pull_up register I/O[15..8] (Bank B) */ -#define SX1509_REG_PULL_UP_A 0x07 /* Pull_up register I/O[7..0] (Bank A) */ -#define SX1509_REG_PULL_DOWN_B 0x08 /* Pull_down register I/O[15..8] (Bank B) */ -#define SX1509_REG_PULL_DOWN_A 0x09 /* Pull_down register I/O[7..0] (Bank A) */ -#define SX1509_REG_OPEN_DRAIN_B 0x0A /* Open drain register I/O[15..8] (Bank B) */ -#define SX1509_REG_OPEN_DRAIN_A 0x0B /* Open drain register I/O[7..0] (Bank A) */ -#define SX1509_REG_POLARITY_B 0x0C /* Polarity register I/O[15..8] (Bank B) */ -#define SX1509_REG_POLARITY_A 0x0D /* Polarity register I/O[7..0] (Bank A) */ -#define SX1509_REG_DIR_B 0x0E /* Direction register I/O[15..8] (Bank B) */ -#define SX1509_REG_DIR_A 0x0F /* Direction register I/O[7..0] (Bank A) */ -#define SX1509_REG_DATA_B 0x10 /* Data register I/O[15..8] (Bank B) */ -#define SX1509_REG_DATA_A 0x11 /* Data register I/O[7..0] (Bank A) */ -#define SX1509_REG_INTERRUPT_MASK_B 0x12 /* Interrupt mask register I/O[15..8] (Bank B) */ -#define SX1509_REG_INTERRUPT_MASK_A 0x13 /* Interrupt mask register I/O[7..0] (Bank A) */ -#define SX1509_REG_SENSE_HIGH_B 0x14 /* Sense register for I/O[15:12] (Bank B) */ -#define SX1509_REG_SENSE_LOW_B 0x15 /* Sense register for I/O[11:8] (Bank B) */ -#define SX1509_REG_SENSE_HIGH_A 0x16 /* Sense register for I/O[7:4] (Bank A) */ -#define SX1509_REG_SENSE_LOW_A 0x17 /* Sense register for I/O[3:0] (Bank A) */ -#define SX1509_REG_INTERRUPT_SOURCE_B 0x18 /* Interrupt source register I/O[15..8] (Bank B) */ -#define SX1509_REG_INTERRUPT_SOURCE_A 0x19 /* Interrupt source register I/O[7..0] (Bank A) */ -#define SX1509_REG_EVENT_STATUS_B 0x1A /* Event status register I/O[15..8] (Bank B) */ -#define SX1509_REG_EVENT_STATUS_A 0x1B /* Event status register I/O[7..0] (Bank A) */ -#define SX1509_REG_LEVEL_SHIFTER_1 0x1C /* Level shifter register 1 */ -#define SX1509_REG_LEVEL_SHIFTER_2 0x1D /* Level shifter register 2 */ -#define SX1509_REG_CLOCK 0x1E /* Clock management register */ -#define SX1509_REG_MISC 0x1F /* Miscellaneous device settings register */ -#define SX1509_REG_LED_DRIVER_ENABLE_B 0x20 /* LED driver enable register I/O[15..8] (Bank B) */ -#define SX1509_REG_LED_DRIVER_ENABLE_A 0x21 /* LED driver enable register I/O[7..0] (Bank A) */ -#define SX1509_REG_DEBOUNCE_CONFIG 0x22 /* Debounce configuration register */ -#define SX1509_REG_DEBOUNCE_ENABLE_B 0x23 /* Debounce enable register I/O[15..8] (Bank B) */ -#define SX1509_REG_DEBOUNCE_ENABLE_A 0x24 /* Debounce enable register I/O[7..0] (Bank A) */ -#define SX1509_REG_T_ON_0 0x29 /* ON time register for I/O[0] */ -#define SX1509_REG_I_ON_0 0x2A /* ON intensity register for I/O[0] */ -#define SX1509_REG_OFF_0 0x2B /* OFF time/intensity register for I/O[0] */ -#define SX1509_REG_T_ON_1 0x2C /* ON time register for I/O[1] */ -#define SX1509_REG_I_ON_1 0x2D /* ON intensity register for I/O[1] */ -#define SX1509_REG_OFF_1 0x2E /* OFF time/intensity register for I/O[1] */ -#define SX1509_REG_T_ON_2 0x2F /* ON time register for I/O[2] */ -#define SX1509_REG_I_ON_2 0x30 /* ON intensity register for I/O[2] */ -#define SX1509_REG_OFF_2 0x31 /* OFF time/intensity register for I/O[2] */ -#define SX1509_REG_T_ON_3 0x32 /* ON time register for I/O[3] */ -#define SX1509_REG_I_ON_3 0x33 /* ON intensity register for I/O[3] */ -#define SX1509_REG_OFF_3 0x34 /* OFF time/intensity register for I/O[3] */ -#define SX1509_REG_T_ON_4 0x35 /* ON time register for I/O[4] */ -#define SX1509_REG_I_ON_4 0x36 /* ON intensity register for I/O[4] */ -#define SX1509_REG_OFF_4 0x37 /* OFF time/intensity register for I/O[4] */ -#define SX1509_REG_T_RISE_4 0x38 /* Fade in register for I/O[4] */ -#define SX1509_REG_T_FALL_4 0x39 /* Fade out register for I/O[4] */ -#define SX1509_REG_T_ON_5 0x3A /* ON time register for I/O[5] */ -#define SX1509_REG_I_ON_5 0x3B /* ON intensity register for I/O[5] */ -#define SX1509_REG_OFF_5 0x3C /* OFF time/intensity register for I/O[5] */ -#define SX1509_REG_T_RISE_5 0x3D /* Fade in register for I/O[5] */ -#define SX1509_REG_T_FALL_5 0x3E /* Fade out register for I/O[5] */ -#define SX1509_REG_T_ON_6 0x3F /* ON time register for I/O[6] */ -#define SX1509_REG_I_ON_6 0x40 /* ON intensity register for I/O[6] */ -#define SX1509_REG_OFF_6 0x41 /* OFF time/intensity register for I/O[6] */ -#define SX1509_REG_T_RISE_6 0x42 /* Fade in register for I/O[6] */ -#define SX1509_REG_T_FALL_6 0x43 /* Fade out register for I/O[6] */ -#define SX1509_REG_T_ON_7 0x44 /* ON time register for I/O[7] */ -#define SX1509_REG_I_ON_7 0x45 /* ON intensity register for I/O[7] */ -#define SX1509_REG_OFF_7 0x46 /* OFF time/intensity register for I/O[7] */ -#define SX1509_REG_T_RISE_7 0x47 /* Fade in register for I/O[7] */ -#define SX1509_REG_T_FALL_7 0x48 /* Fade out register for I/O[7] */ -#define SX1509_REG_T_ON_8 0x49 /* ON time register for I/O[8] */ -#define SX1509_REG_I_ON_8 0x4A /* ON intensity register for I/O[8] */ -#define SX1509_REG_OFF_8 0x4B /* OFF time/intensity register for I/O[8] */ -#define SX1509_REG_T_ON_9 0x4C /* ON time register for I/O[9] */ -#define SX1509_REG_I_ON_9 0x4D /* ON intensity register for I/O[9] */ -#define SX1509_REG_OFF_9 0x4E /* OFF time/intensity register for I/O[9] */ -#define SX1509_REG_T_ON_10 0x4F /* ON time register for I/O[10] */ -#define SX1509_REG_I_ON_10 0x50 /* ON intensity register for I/O[10] */ -#define SX1509_REG_OFF_10 0x51 /* OFF time/intensity register for I/O[10] */ -#define SX1509_REG_T_ON_11 0x52 /* ON time register for I/O[11] */ -#define SX1509_REG_I_ON_11 0x53 /* ON intensity register for I/O[11] */ -#define SX1509_REG_OFF_11 0x54 /* OFF time/intensity register for I/O[11] */ -#define SX1509_REG_T_ON_12 0x55 /* ON time register for I/O[12] */ -#define SX1509_REG_I_ON_12 0x56 /* ON intensity register for I/O[12] */ -#define SX1509_REG_OFF_12 0x57 /* OFF time/intensity register for I/O[12] */ -#define SX1509_REG_T_RISE_12 0x58 /* Fade in register for I/O[12] */ -#define SX1509_REG_T_FALL_12 0x59 /* Fade out register for I/O[12] */ -#define SX1509_REG_T_ON_13 0x5A /* ON time register for I/O[13] */ -#define SX1509_REG_I_ON_13 0x5B /* ON intensity register for I/O[13] */ -#define SX1509_REG_OFF_13 0x5C /* OFF time/intensity register for I/O[13] */ -#define SX1509_REG_T_RISE_13 0x5D /* Fade in register for I/O[13] */ -#define SX1509_REG_T_FALL_13 0x5E /* Fade out register for I/O[13] */ -#define SX1509_REG_T_ON_14 0x5F /* ON time register for I/O[14] */ -#define SX1509_REG_I_ON_14 0x60 /* ON intensity register for I/O[14] */ -#define SX1509_REG_OFF_14 0x61 /* OFF time/intensity register for I/O[14] */ -#define SX1509_REG_T_RISE_14 0x62 /* Fade in register for I/O[14] */ -#define SX1509_REG_T_FALL_14 0x63 /* Fade out register for I/O[14] */ -#define SX1509_REG_T_ON_15 0x64 /* ON time register for I/O[15] */ -#define SX1509_REG_I_ON_15 0x65 /* ON intensity register for I/O[15] */ -#define SX1509_REG_OFF_15 0x66 /* OFF time/intensity register for I/O[15] */ -#define SX1509_REG_T_RISE_15 0x67 /* Fade in register for I/O[15] */ -#define SX1509_REG_T_FALL_15 0x68 /* Fade out register for I/O[15] */ -#define SX1509_REG_HIGH_INPUT_B 0x69 /* High input enable register I/O[15..8] (Bank B) */ -#define SX1509_REG_HIGH_INPUT_A 0x6A /* High input enable register I/O[7..0] (Bank A) */ -#define SX1509_REG_RESET 0x7D /* Software reset register */ -#define SX1509_REG_TEST_1 0x7E /* Test register 1 */ -#define SX1509_REG_TEST_2 0x7F /* Test register 2 */ +#define SX1509_REG_INPUT_DISABLE_B \ + 0x00 /* Input buffer disable register I/O[15..8] (Bank B) */ +#define SX1509_REG_INPUT_DISABLE_A \ + 0x01 /* Input buffer disable register I/O[7..0] (Bank A) */ +#define SX1509_REG_LONG_SLEW_B \ + 0x02 /* Output buffer long slew register I/O[15..8] (Bank B) */ +#define SX1509_REG_LONG_SLEW_A \ + 0x03 /* Output buffer long slew register I/O[7..0] (Bank A) */ +#define SX1509_REG_LOW_DRIVE_B \ + 0x04 /* Output buffer low drive register I/O[15..8] (Bank B) */ +#define SX1509_REG_LOW_DRIVE_A \ + 0x05 /* Output buffer low drive register I/O[7..0] (Bank A) */ +#define SX1509_REG_PULL_UP_B 0x06 /* Pull_up register I/O[15..8] (Bank B) */ +#define SX1509_REG_PULL_UP_A 0x07 /* Pull_up register I/O[7..0] (Bank A) */ +#define SX1509_REG_PULL_DOWN_B 0x08 /* Pull_down register I/O[15..8] (Bank B) */ +#define SX1509_REG_PULL_DOWN_A 0x09 /* Pull_down register I/O[7..0] (Bank A) */ +#define SX1509_REG_OPEN_DRAIN_B \ + 0x0A /* Open drain register I/O[15..8] (Bank B) */ +#define SX1509_REG_OPEN_DRAIN_A \ + 0x0B /* Open drain register I/O[7..0] (Bank A) */ +#define SX1509_REG_POLARITY_B 0x0C /* Polarity register I/O[15..8] (Bank B) */ +#define SX1509_REG_POLARITY_A 0x0D /* Polarity register I/O[7..0] (Bank A) */ +#define SX1509_REG_DIR_B 0x0E /* Direction register I/O[15..8] (Bank B) */ +#define SX1509_REG_DIR_A 0x0F /* Direction register I/O[7..0] (Bank A) */ +#define SX1509_REG_DATA_B 0x10 /* Data register I/O[15..8] (Bank B) */ +#define SX1509_REG_DATA_A 0x11 /* Data register I/O[7..0] (Bank A) */ +#define SX1509_REG_INTERRUPT_MASK_B \ + 0x12 /* Interrupt mask register I/O[15..8] (Bank B) */ +#define SX1509_REG_INTERRUPT_MASK_A \ + 0x13 /* Interrupt mask register I/O[7..0] (Bank A) */ +#define SX1509_REG_SENSE_HIGH_B \ + 0x14 /* Sense register for I/O[15:12] (Bank B) */ +#define SX1509_REG_SENSE_LOW_B 0x15 /* Sense register for I/O[11:8] (Bank B) */ +#define SX1509_REG_SENSE_HIGH_A 0x16 /* Sense register for I/O[7:4] (Bank A) */ +#define SX1509_REG_SENSE_LOW_A 0x17 /* Sense register for I/O[3:0] (Bank A) */ +#define SX1509_REG_INTERRUPT_SOURCE_B \ + 0x18 /* Interrupt source register I/O[15..8] (Bank B) */ +#define SX1509_REG_INTERRUPT_SOURCE_A \ + 0x19 /* Interrupt source register I/O[7..0] (Bank A) */ +#define SX1509_REG_EVENT_STATUS_B \ + 0x1A /* Event status register I/O[15..8] (Bank B) */ +#define SX1509_REG_EVENT_STATUS_A \ + 0x1B /* Event status register I/O[7..0] (Bank A) */ +#define SX1509_REG_LEVEL_SHIFTER_1 0x1C /* Level shifter register 1 */ +#define SX1509_REG_LEVEL_SHIFTER_2 0x1D /* Level shifter register 2 */ +#define SX1509_REG_CLOCK 0x1E /* Clock management register */ +#define SX1509_REG_MISC 0x1F /* Miscellaneous device settings register */ +#define SX1509_REG_LED_DRIVER_ENABLE_B \ + 0x20 /* LED driver enable register I/O[15..8] (Bank B) */ +#define SX1509_REG_LED_DRIVER_ENABLE_A \ + 0x21 /* LED driver enable register I/O[7..0] (Bank A) */ +#define SX1509_REG_DEBOUNCE_CONFIG 0x22 /* Debounce configuration register */ +#define SX1509_REG_DEBOUNCE_ENABLE_B \ + 0x23 /* Debounce enable register I/O[15..8] (Bank B) */ +#define SX1509_REG_DEBOUNCE_ENABLE_A \ + 0x24 /* Debounce enable register I/O[7..0] (Bank A) */ +#define SX1509_REG_T_ON_0 0x29 /* ON time register for I/O[0] */ +#define SX1509_REG_I_ON_0 0x2A /* ON intensity register for I/O[0] */ +#define SX1509_REG_OFF_0 0x2B /* OFF time/intensity register for I/O[0] */ +#define SX1509_REG_T_ON_1 0x2C /* ON time register for I/O[1] */ +#define SX1509_REG_I_ON_1 0x2D /* ON intensity register for I/O[1] */ +#define SX1509_REG_OFF_1 0x2E /* OFF time/intensity register for I/O[1] */ +#define SX1509_REG_T_ON_2 0x2F /* ON time register for I/O[2] */ +#define SX1509_REG_I_ON_2 0x30 /* ON intensity register for I/O[2] */ +#define SX1509_REG_OFF_2 0x31 /* OFF time/intensity register for I/O[2] */ +#define SX1509_REG_T_ON_3 0x32 /* ON time register for I/O[3] */ +#define SX1509_REG_I_ON_3 0x33 /* ON intensity register for I/O[3] */ +#define SX1509_REG_OFF_3 0x34 /* OFF time/intensity register for I/O[3] */ +#define SX1509_REG_T_ON_4 0x35 /* ON time register for I/O[4] */ +#define SX1509_REG_I_ON_4 0x36 /* ON intensity register for I/O[4] */ +#define SX1509_REG_OFF_4 0x37 /* OFF time/intensity register for I/O[4] */ +#define SX1509_REG_T_RISE_4 0x38 /* Fade in register for I/O[4] */ +#define SX1509_REG_T_FALL_4 0x39 /* Fade out register for I/O[4] */ +#define SX1509_REG_T_ON_5 0x3A /* ON time register for I/O[5] */ +#define SX1509_REG_I_ON_5 0x3B /* ON intensity register for I/O[5] */ +#define SX1509_REG_OFF_5 0x3C /* OFF time/intensity register for I/O[5] */ +#define SX1509_REG_T_RISE_5 0x3D /* Fade in register for I/O[5] */ +#define SX1509_REG_T_FALL_5 0x3E /* Fade out register for I/O[5] */ +#define SX1509_REG_T_ON_6 0x3F /* ON time register for I/O[6] */ +#define SX1509_REG_I_ON_6 0x40 /* ON intensity register for I/O[6] */ +#define SX1509_REG_OFF_6 0x41 /* OFF time/intensity register for I/O[6] */ +#define SX1509_REG_T_RISE_6 0x42 /* Fade in register for I/O[6] */ +#define SX1509_REG_T_FALL_6 0x43 /* Fade out register for I/O[6] */ +#define SX1509_REG_T_ON_7 0x44 /* ON time register for I/O[7] */ +#define SX1509_REG_I_ON_7 0x45 /* ON intensity register for I/O[7] */ +#define SX1509_REG_OFF_7 0x46 /* OFF time/intensity register for I/O[7] */ +#define SX1509_REG_T_RISE_7 0x47 /* Fade in register for I/O[7] */ +#define SX1509_REG_T_FALL_7 0x48 /* Fade out register for I/O[7] */ +#define SX1509_REG_T_ON_8 0x49 /* ON time register for I/O[8] */ +#define SX1509_REG_I_ON_8 0x4A /* ON intensity register for I/O[8] */ +#define SX1509_REG_OFF_8 0x4B /* OFF time/intensity register for I/O[8] */ +#define SX1509_REG_T_ON_9 0x4C /* ON time register for I/O[9] */ +#define SX1509_REG_I_ON_9 0x4D /* ON intensity register for I/O[9] */ +#define SX1509_REG_OFF_9 0x4E /* OFF time/intensity register for I/O[9] */ +#define SX1509_REG_T_ON_10 0x4F /* ON time register for I/O[10] */ +#define SX1509_REG_I_ON_10 0x50 /* ON intensity register for I/O[10] */ +#define SX1509_REG_OFF_10 0x51 /* OFF time/intensity register for I/O[10] */ +#define SX1509_REG_T_ON_11 0x52 /* ON time register for I/O[11] */ +#define SX1509_REG_I_ON_11 0x53 /* ON intensity register for I/O[11] */ +#define SX1509_REG_OFF_11 0x54 /* OFF time/intensity register for I/O[11] */ +#define SX1509_REG_T_ON_12 0x55 /* ON time register for I/O[12] */ +#define SX1509_REG_I_ON_12 0x56 /* ON intensity register for I/O[12] */ +#define SX1509_REG_OFF_12 0x57 /* OFF time/intensity register for I/O[12] */ +#define SX1509_REG_T_RISE_12 0x58 /* Fade in register for I/O[12] */ +#define SX1509_REG_T_FALL_12 0x59 /* Fade out register for I/O[12] */ +#define SX1509_REG_T_ON_13 0x5A /* ON time register for I/O[13] */ +#define SX1509_REG_I_ON_13 0x5B /* ON intensity register for I/O[13] */ +#define SX1509_REG_OFF_13 0x5C /* OFF time/intensity register for I/O[13] */ +#define SX1509_REG_T_RISE_13 0x5D /* Fade in register for I/O[13] */ +#define SX1509_REG_T_FALL_13 0x5E /* Fade out register for I/O[13] */ +#define SX1509_REG_T_ON_14 0x5F /* ON time register for I/O[14] */ +#define SX1509_REG_I_ON_14 0x60 /* ON intensity register for I/O[14] */ +#define SX1509_REG_OFF_14 0x61 /* OFF time/intensity register for I/O[14] */ +#define SX1509_REG_T_RISE_14 0x62 /* Fade in register for I/O[14] */ +#define SX1509_REG_T_FALL_14 0x63 /* Fade out register for I/O[14] */ +#define SX1509_REG_T_ON_15 0x64 /* ON time register for I/O[15] */ +#define SX1509_REG_I_ON_15 0x65 /* ON intensity register for I/O[15] */ +#define SX1509_REG_OFF_15 0x66 /* OFF time/intensity register for I/O[15] */ +#define SX1509_REG_T_RISE_15 0x67 /* Fade in register for I/O[15] */ +#define SX1509_REG_T_FALL_15 0x68 /* Fade out register for I/O[15] */ +#define SX1509_REG_HIGH_INPUT_B \ + 0x69 /* High input enable register I/O[15..8] (Bank B) */ +#define SX1509_REG_HIGH_INPUT_A \ + 0x6A /* High input enable register I/O[7..0] (Bank A) */ +#define SX1509_REG_RESET 0x7D /* Software reset register */ +#define SX1509_REG_TEST_1 0x7E /* Test register 1 */ +#define SX1509_REG_TEST_2 0x7F /* Test register 2 */ /* Values being used for Soft reset of SX1509 */ -#define SX1509_SOFT_RESET_REG_VALUE_1 0x12 -#define SX1509_SOFT_RESET_REG_VALUE_2 0x34 +#define SX1509_SOFT_RESET_REG_VALUE_1 0x12 +#define SX1509_SOFT_RESET_REG_VALUE_2 0x34 -static uint8_t SX1509_REG_T_ON[16] = { - SX1509_REG_T_ON_0, SX1509_REG_T_ON_1, SX1509_REG_T_ON_2, SX1509_REG_T_ON_3, - SX1509_REG_T_ON_4, SX1509_REG_T_ON_5, SX1509_REG_T_ON_6, SX1509_REG_T_ON_7, - SX1509_REG_T_ON_8, SX1509_REG_T_ON_9, SX1509_REG_T_ON_10, SX1509_REG_T_ON_11, - SX1509_REG_T_ON_12, SX1509_REG_T_ON_13, SX1509_REG_T_ON_14, SX1509_REG_T_ON_15 -}; +static uint8_t SX1509_REG_T_ON[16] = { SX1509_REG_T_ON_0, SX1509_REG_T_ON_1, + SX1509_REG_T_ON_2, SX1509_REG_T_ON_3, + SX1509_REG_T_ON_4, SX1509_REG_T_ON_5, + SX1509_REG_T_ON_6, SX1509_REG_T_ON_7, + SX1509_REG_T_ON_8, SX1509_REG_T_ON_9, + SX1509_REG_T_ON_10, SX1509_REG_T_ON_11, + SX1509_REG_T_ON_12, SX1509_REG_T_ON_13, + SX1509_REG_T_ON_14, SX1509_REG_T_ON_15 }; static uint8_t SX1509_REG_OFF[16] = { - SX1509_REG_OFF_0, SX1509_REG_OFF_1, SX1509_REG_OFF_2, SX1509_REG_OFF_3, - SX1509_REG_OFF_4, SX1509_REG_OFF_5, SX1509_REG_OFF_6, SX1509_REG_OFF_7, - SX1509_REG_OFF_8, SX1509_REG_OFF_9, SX1509_REG_OFF_10, SX1509_REG_OFF_11, - SX1509_REG_OFF_12, SX1509_REG_OFF_13, SX1509_REG_OFF_14, SX1509_REG_OFF_15 + SX1509_REG_OFF_0, SX1509_REG_OFF_1, SX1509_REG_OFF_2, SX1509_REG_OFF_3, + SX1509_REG_OFF_4, SX1509_REG_OFF_5, SX1509_REG_OFF_6, SX1509_REG_OFF_7, + SX1509_REG_OFF_8, SX1509_REG_OFF_9, SX1509_REG_OFF_10, SX1509_REG_OFF_11, + SX1509_REG_OFF_12, SX1509_REG_OFF_13, SX1509_REG_OFF_14, SX1509_REG_OFF_15 }; #if 0 @@ -164,15 +187,15 @@ static uint8_t SX1509_REG_I_ON[16] = { ** *****************************************************************************/ static ReturnStatus ioexp_led_raw_read(const I2C_Dev *i2c_dev, - uint8_t regAddress, - uint8_t *regValue) + uint8_t regAddress, uint8_t *regValue) { ReturnStatus status = RETURN_NOTOK; I2C_Handle sx1509_handle = i2c_get_handle(i2c_dev->bus); uint16_t value = 0x0000; if (!sx1509_handle) { LOGGER_ERROR("SX1509:ERROR:: Failed to get I2C Bus for SX1509 0x%02x " - "on bus 0x%02x.\n", i2c_dev->slave_addr, i2c_dev->bus); + "on bus 0x%02x.\n", + i2c_dev->slave_addr, i2c_dev->bus); } else { status = i2c_reg_read(sx1509_handle, i2c_dev->slave_addr, regAddress, &value, 1); @@ -196,28 +219,27 @@ static ReturnStatus ioexp_led_raw_read(const I2C_Dev *i2c_dev, ** *****************************************************************************/ static ReturnStatus ioexp_led_raw_write(const I2C_Dev *i2c_dev, - uint8_t regAddress, - uint8_t regValue1, - uint8_t regValue2, - uint8_t noOfBytes) + uint8_t regAddress, uint8_t regValue1, + uint8_t regValue2, uint8_t noOfBytes) { ReturnStatus status = RETURN_NOTOK; I2C_Handle sx1509_handle = i2c_get_handle(i2c_dev->bus); uint16_t value = 0x00; if (noOfBytes == 2) { - value = (regValue2<<8) | (regValue1); + value = (regValue2 << 8) | (regValue1); value = htobe16(value); } else { value = regValue1; } if (!sx1509_handle) { LOGGER_ERROR("SX1509:ERROR:: Failed to get I2C Bus for SX1509 0x%02x " - "on bus 0x%02x.\n", i2c_dev->slave_addr, i2c_dev->bus); + "on bus 0x%02x.\n", + i2c_dev->slave_addr, i2c_dev->bus); } else { status = i2c_reg_write(sx1509_handle, i2c_dev->slave_addr, regAddress, - value, noOfBytes); + value, noOfBytes); } -return status; + return status; } /***************************************************************************** @@ -232,13 +254,12 @@ return status; ** RETURN TYPE : Success or failure ** *****************************************************************************/ -ReturnStatus ioexp_led_get_data(const I2C_Dev *i2c_dev, - sx1509RegType regType, +ReturnStatus ioexp_led_get_data(const I2C_Dev *i2c_dev, sx1509RegType regType, uint8_t *regValue) { ReturnStatus status = RETURN_OK; - uint8_t regAddress = (regType == SX1509_REG_A) ? - (SX1509_REG_DATA_A) : (SX1509_REG_DATA_B); + uint8_t regAddress = (regType == SX1509_REG_A) ? (SX1509_REG_DATA_A) : + (SX1509_REG_DATA_B); status = ioexp_led_raw_read(i2c_dev, regAddress, regValue); return status; } @@ -255,21 +276,19 @@ ReturnStatus ioexp_led_get_data(const I2C_Dev *i2c_dev, ** RETURN TYPE : Success or failure ** *****************************************************************************/ -ReturnStatus ioexp_led_set_data(const I2C_Dev *i2c_dev, - sx1509RegType regType, - uint8_t regValue1, - uint8_t regValue2) +ReturnStatus ioexp_led_set_data(const I2C_Dev *i2c_dev, sx1509RegType regType, + uint8_t regValue1, uint8_t regValue2) { ReturnStatus status = RETURN_OK; uint8_t noOfBytes = 1; - uint8_t regAddress = (regType == SX1509_REG_A) ? - (SX1509_REG_DATA_A) : (SX1509_REG_DATA_B); + uint8_t regAddress = (regType == SX1509_REG_A) ? (SX1509_REG_DATA_A) : + (SX1509_REG_DATA_B); if (regType == SX1509_REG_AB) { noOfBytes = 2; } - status = ioexp_led_raw_write(i2c_dev, regAddress, regValue1, - regValue2, noOfBytes); + status = ioexp_led_raw_write(i2c_dev, regAddress, regValue1, regValue2, + noOfBytes); return status; } @@ -289,8 +308,8 @@ ReturnStatus ioexp_led_set_on_time(const I2C_Dev *i2c_dev, uint8_t index, uint8_t tOnRegValue) { ReturnStatus status = RETURN_OK; - status = ioexp_led_raw_write(i2c_dev, SX1509_REG_T_ON[index], - tOnRegValue, 0, 1); + status = ioexp_led_raw_write(i2c_dev, SX1509_REG_T_ON[index], tOnRegValue, + 0, 1); return status; } @@ -310,8 +329,8 @@ ReturnStatus ioexp_led_set_off_time(const I2C_Dev *i2c_dev, uint8_t index, uint8_t tOffRegValue) { ReturnStatus status = RETURN_OK; - status = ioexp_led_raw_write(i2c_dev, SX1509_REG_OFF[index], - tOffRegValue, 0, 1); + status = ioexp_led_raw_write(i2c_dev, SX1509_REG_OFF[index], tOffRegValue, + 0, 1); return status; } @@ -333,7 +352,6 @@ ReturnStatus ioexp_led_software_reset(const I2C_Dev *i2c_dev) status = ioexp_led_raw_write(i2c_dev, SX1509_REG_RESET, SX1509_SOFT_RESET_REG_VALUE_1, 0, 1); if (status == RETURN_OK) { - status = ioexp_led_raw_write(i2c_dev, SX1509_REG_RESET, SX1509_SOFT_RESET_REG_VALUE_2, 0, 1); } @@ -360,7 +378,8 @@ ReturnStatus ioexp_led_config_inputbuffer(const I2C_Dev *i2c_dev, ReturnStatus status = RETURN_OK; uint8_t noOfBytes = 1; uint8_t regAddress = (regType == SX1509_REG_A) ? - (SX1509_REG_INPUT_DISABLE_A) : (SX1509_REG_INPUT_DISABLE_B); + (SX1509_REG_INPUT_DISABLE_A) : + (SX1509_REG_INPUT_DISABLE_B); if (regType == SX1509_REG_AB) { noOfBytes = 2; } @@ -389,8 +408,8 @@ ReturnStatus ioexp_led_config_pullup(const I2C_Dev *i2c_dev, { ReturnStatus status = RETURN_OK; uint8_t noOfBytes = 1; - uint8_t regAddress = (regType == SX1509_REG_A) ? - (SX1509_REG_PULL_UP_A) : (SX1509_REG_PULL_UP_B); + uint8_t regAddress = (regType == SX1509_REG_A) ? (SX1509_REG_PULL_UP_A) : + (SX1509_REG_PULL_UP_B); if (regType == SX1509_REG_AB) { noOfBytes = 2; } @@ -419,8 +438,8 @@ ReturnStatus ioexp_led_config_pulldown(const I2C_Dev *i2c_dev, { ReturnStatus status = RETURN_OK; uint8_t noOfBytes = 1; - uint8_t regAddress = (regType == SX1509_REG_A) ? - (SX1509_REG_PULL_DOWN_A) : (SX1509_REG_PULL_DOWN_B); + uint8_t regAddress = (regType == SX1509_REG_A) ? (SX1509_REG_PULL_DOWN_A) : + (SX1509_REG_PULL_DOWN_B); if (regType == SX1509_REG_AB) { noOfBytes = 2; } @@ -449,8 +468,8 @@ ReturnStatus ioexp_led_config_opendrain(const I2C_Dev *i2c_dev, { ReturnStatus status = RETURN_OK; uint8_t noOfBytes = 1; - uint8_t regAddress = (regType == SX1509_REG_A) ? - (SX1509_REG_OPEN_DRAIN_A) : (SX1509_REG_OPEN_DRAIN_B); + uint8_t regAddress = (regType == SX1509_REG_A) ? (SX1509_REG_OPEN_DRAIN_A) : + (SX1509_REG_OPEN_DRAIN_B); if (regType == SX1509_REG_AB) { noOfBytes = 2; } @@ -479,8 +498,8 @@ ReturnStatus ioexp_led_config_data_direction(const I2C_Dev *i2c_dev, { ReturnStatus status = RETURN_OK; uint8_t noOfBytes = 1; - uint8_t regAddress = (regType == SX1509_REG_A) ? - (SX1509_REG_DIR_A) : (SX1509_REG_DIR_B); + uint8_t regAddress = + (regType == SX1509_REG_A) ? (SX1509_REG_DIR_A) : (SX1509_REG_DIR_B); if (regType == SX1509_REG_AB) { noOfBytes = 2; } @@ -509,8 +528,8 @@ ReturnStatus ioexp_led_config_polarity(const I2C_Dev *i2c_dev, { ReturnStatus status = RETURN_OK; uint8_t noOfBytes = 1; - uint8_t regAddress = (regType == SX1509_REG_A) ? - (SX1509_REG_POLARITY_A) : (SX1509_REG_POLARITY_B); + uint8_t regAddress = (regType == SX1509_REG_A) ? (SX1509_REG_POLARITY_A) : + (SX1509_REG_POLARITY_B); if (regType == SX1509_REG_AB) { noOfBytes = 2; } @@ -590,8 +609,8 @@ ReturnStatus ioexp_led_enable_leddriver(const I2C_Dev *i2c_dev, ReturnStatus status = RETURN_OK; uint8_t noOfBytes = 1; uint8_t regAddress = (regType == SX1509_REG_A) ? - (SX1509_REG_LED_DRIVER_ENABLE_A) : - (SX1509_REG_LED_DRIVER_ENABLE_B); + (SX1509_REG_LED_DRIVER_ENABLE_A) : + (SX1509_REG_LED_DRIVER_ENABLE_B); if (regType == SX1509_REG_AB) { noOfBytes = 2; } @@ -640,8 +659,8 @@ ReturnStatus ioexp_led_config_interrupt(const I2C_Dev *i2c_dev, ReturnStatus status = RETURN_OK; uint8_t noOfBytes = 1; uint8_t regAddress = (regType == SX1509_REG_A) ? - (SX1509_REG_INTERRUPT_MASK_A) : - (SX1509_REG_INTERRUPT_MASK_B); + (SX1509_REG_INTERRUPT_MASK_A) : + (SX1509_REG_INTERRUPT_MASK_B); if (regType == SX1509_REG_AB) { noOfBytes = 2; } @@ -677,7 +696,8 @@ ReturnStatus ioexp_led_config_edge_sense_A(const I2C_Dev *i2c_dev, ReturnStatus status = RETURN_OK; uint8_t noOfBytes = 1; uint8_t regAddress = (regType == SX1509_EDGE_SENSE_REG_LOW) ? - (SX1509_REG_SENSE_LOW_A) : (SX1509_REG_SENSE_HIGH_A); + (SX1509_REG_SENSE_LOW_A) : + (SX1509_REG_SENSE_HIGH_A); if (regType == SX1509_EDGE_SENSE_REG_LOW_HIGH) { noOfBytes = 2; } @@ -707,7 +727,8 @@ ReturnStatus ioexp_led_config_edge_sense_B(const I2C_Dev *i2c_dev, ReturnStatus status = RETURN_OK; uint8_t noOfBytes = 1; uint8_t regAddress = (regType == SX1509_EDGE_SENSE_REG_LOW) ? - (SX1509_REG_SENSE_LOW_B) : (SX1509_REG_SENSE_HIGH_B); + (SX1509_REG_SENSE_LOW_B) : + (SX1509_REG_SENSE_HIGH_B); if (regType == SX1509_EDGE_SENSE_REG_LOW_HIGH) { noOfBytes = 2; } @@ -749,8 +770,8 @@ ReturnStatus ioexp_led_config_debounce_time(const I2C_Dev *i2c_dev, } } - status = ioexp_led_raw_write(i2c_dev, SX1509_REG_DEBOUNCE_CONFIG, - regValue, 0, 1); + status = ioexp_led_raw_write(i2c_dev, SX1509_REG_DEBOUNCE_CONFIG, regValue, + 0, 1); return status; } @@ -774,7 +795,8 @@ ReturnStatus ioexp_led_enable_debounce(const I2C_Dev *i2c_dev, ReturnStatus status = RETURN_OK; uint8_t noOfBytes = 1; uint8_t regAddress = (regType == SX1509_REG_A) ? - (SX1509_REG_DEBOUNCE_ENABLE_A) : (SX1509_REG_DEBOUNCE_ENABLE_B); + (SX1509_REG_DEBOUNCE_ENABLE_A) : + (SX1509_REG_DEBOUNCE_ENABLE_B); if (regType == SX1509_REG_AB) { noOfBytes = 2; } @@ -810,7 +832,7 @@ ReturnStatus ioexp_led_get_interrupt_source(const I2C_Dev *i2c_dev, } status = ioexp_led_raw_read(i2c_dev, SX1509_REG_INTERRUPT_SOURCE_B, ®ValueB); - *intPins = (uint16_t) ((regValueB << 8) | regValueA); + *intPins = (uint16_t)((regValueB << 8) | regValueA); return status; } @@ -827,7 +849,7 @@ ReturnStatus ioexp_led_get_interrupt_source(const I2C_Dev *i2c_dev, ReturnStatus ioexp_led_clear_interrupt_source(const I2C_Dev *i2c_dev) { ReturnStatus status = RETURN_OK; - status = ioexp_led_raw_write(i2c_dev, SX1509_REG_INTERRUPT_SOURCE_B, - 0xFF, 0xFF, 2); + status = ioexp_led_raw_write(i2c_dev, SX1509_REG_INTERRUPT_SOURCE_B, 0xFF, + 0xFF, 2); return status; } diff --git a/firmware/ec/src/devices/uart/UartMon.c b/firmware/ec/src/devices/uart/UartMon.c index eff1cccef0..ef1571ef07 100644 --- a/firmware/ec/src/devices/uart/UartMon.c +++ b/firmware/ec/src/devices/uart/UartMon.c @@ -8,7 +8,8 @@ */ #include "UartMon.h" -static void UartMon_close(UART_Handle handle) { +static void UartMon_close(UART_Handle handle) +{ UartMon_Object *obj = handle->object; if (!obj->state.opened) { @@ -20,17 +21,20 @@ static void UartMon_close(UART_Handle handle) { obj->state.opened = false; } -static int UartMon_control(UART_Handle handle, unsigned int cmd, void *arg) { +static int UartMon_control(UART_Handle handle, unsigned int cmd, void *arg) +{ UartMon_Object *obj = handle->object; return UART_control(obj->hUart_in, cmd, arg); } -static void UartMon_init(UART_Handle handle) { +static void UartMon_init(UART_Handle handle) +{ UartMon_Object *obj = handle->object; obj->state.opened = false; } -static UART_Handle UartMon_open(UART_Handle handle, UART_Params *params) { +static UART_Handle UartMon_open(UART_Handle handle, UART_Params *params) +{ UartMon_Object *obj = handle->object; const UartMon_Cfg *cfg = handle->hwAttrs; if (obj->state.opened) { @@ -57,7 +61,8 @@ static UART_Handle UartMon_open(UART_Handle handle, UART_Params *params) { return handle; } -static int UartMon_read(UART_Handle handle, void *buffer, size_t size) { +static int UartMon_read(UART_Handle handle, void *buffer, size_t size) +{ UartMon_Object *obj = handle->object; int bytes_read = UART_read(obj->hUart_in, buffer, size); @@ -67,7 +72,8 @@ static int UartMon_read(UART_Handle handle, void *buffer, size_t size) { return bytes_read; } -static int UartMon_readPolling(UART_Handle handle, void *buffer, size_t size) { +static int UartMon_readPolling(UART_Handle handle, void *buffer, size_t size) +{ UartMon_Object *obj = handle->object; int bytes_read = UART_readPolling(obj->hUart_in, buffer, size); @@ -80,11 +86,13 @@ static int UartMon_readPolling(UART_Handle handle, void *buffer, size_t size) { return bytes_read; } -static void UartMon_readCancel(UART_Handle handle) { +static void UartMon_readCancel(UART_Handle handle) +{ return; } -static int UartMon_write(UART_Handle handle, const void *buffer, size_t size) { +static int UartMon_write(UART_Handle handle, const void *buffer, size_t size) +{ UartMon_Object *obj = handle->object; int bytes_written = UART_write(obj->hUart_in, buffer, size); @@ -96,7 +104,8 @@ static int UartMon_write(UART_Handle handle, const void *buffer, size_t size) { } static int UartMon_writePolling(UART_Handle handle, const void *buffer, - size_t size) { + size_t size) +{ UartMon_Object *obj = handle->object; int bytes_written = UART_writePolling(obj->hUart_in, buffer, size); @@ -110,19 +119,14 @@ static int UartMon_writePolling(UART_Handle handle, const void *buffer, return bytes_written; } -static void UartMon_writeCancel(UART_Handle handle) { +static void UartMon_writeCancel(UART_Handle handle) +{ return; } const UART_FxnTable UartMon_fxnTable = { - UartMon_close, - UartMon_control, - UartMon_init, - UartMon_open, - UartMon_read, - UartMon_readPolling, - UartMon_readCancel, - UartMon_write, - UartMon_writePolling, + UartMon_close, UartMon_control, UartMon_init, + UartMon_open, UartMon_read, UartMon_readPolling, + UartMon_readCancel, UartMon_write, UartMon_writePolling, UartMon_writeCancel }; diff --git a/firmware/ec/src/devices/uart/UartMon.h b/firmware/ec/src/devices/uart/UartMon.h index 2cd30e39cc..6770e515fe 100644 --- a/firmware/ec/src/devices/uart/UartMon.h +++ b/firmware/ec/src/devices/uart/UartMon.h @@ -53,17 +53,17 @@ extern const UART_FxnTable UartMon_fxnTable; typedef struct UartMon_Cfg { - unsigned int uart_in_idx; /*!< The UART we're going to monitor */ + unsigned int uart_in_idx; /*!< The UART we're going to monitor */ unsigned int uart_debug_idx; /*!< The UART we're going to forward to */ } UartMon_Cfg; /* Private data for the driver instance */ typedef struct UartMon_Object { struct { - bool opened:1; /*!< Is there an open handle to the driver */ + bool opened : 1; /*!< Is there an open handle to the driver */ } state; - UART_Handle hUart_in; /*!< Handle to the monitored UART */ + UART_Handle hUart_in; /*!< Handle to the monitored UART */ UART_Handle hUart_debug; /*!< Handle to the forwarding UART */ } UartMon_Object; diff --git a/firmware/ec/src/devices/uart/at_cmd.c b/firmware/ec/src/devices/uart/at_cmd.c index ecf705cb6e..a2e5cca3e5 100644 --- a/firmware/ec/src/devices/uart/at_cmd.c +++ b/firmware/ec/src/devices/uart/at_cmd.c @@ -73,12 +73,12 @@ typedef struct AtResultString { // These are AT standard - we want to do a full string match static const AtResultString AtResultStringMap[] = { { - .str = "OK", - .code = AT_RESULT_CODE_OK, + .str = "OK", + .code = AT_RESULT_CODE_OK, }, { - .str = "ERROR", - .code = AT_RESULT_CODE_ERROR, + .str = "ERROR", + .code = AT_RESULT_CODE_ERROR, }, }; @@ -86,38 +86,41 @@ static const AtResultString AtResultStringMap[] = { // TODO: these probably shouldn't be hardcoded in this module static const AtResultString AtCustomResultStrings[] = { { - .str = "+CMS ERROR:", - .code = AT_RESULT_CODE_ERROR_CUSTOM, + .str = "+CMS ERROR:", + .code = AT_RESULT_CODE_ERROR_CUSTOM, }, { - .str = "+CME ERROR:", - .code = AT_RESULT_CODE_ERROR_CUSTOM, + .str = "+CME ERROR:", + .code = AT_RESULT_CODE_ERROR_CUSTOM, }, }; -#define AT_READ_TASK_PRIORITY 6 -#define AT_READ_TASK_STACK_SIZE 1024 +#define AT_READ_TASK_PRIORITY 6 +#define AT_READ_TASK_STACK_SIZE 1024 -bool AT_cmd_write_data(AT_Handle handle, const void *data, size_t data_len) { +bool AT_cmd_write_data(AT_Handle handle, const void *data, size_t data_len) +{ if (!handle) { return false; } //DEBUG("Write: "); - for(int i = 0; i < data_len; ++i) { - // DEBUG("%x ", ((uint8_t *)data)[i]); + for (int i = 0; i < data_len; ++i) { + // DEBUG("%x ", ((uint8_t *)data)[i]); } //DEBUG("\n"); return (UART_write(handle->uartHandle, data, data_len) == data_len); } -bool AT_cmd_write16(AT_Handle handle, uint16_t data) { +bool AT_cmd_write16(AT_Handle handle, uint16_t data) +{ size_t size = sizeof(data); data = htobe16(data); return AT_cmd_write_data(handle, &data, size); } -int AT_cmd_read_data(AT_Handle handle, void *data, size_t data_len) { +int AT_cmd_read_data(AT_Handle handle, void *data, size_t data_len) +{ if (!handle) { return -1; } @@ -132,15 +135,15 @@ int AT_cmd_read_data(AT_Handle handle, void *data, size_t data_len) { handle->s_bufLen -= readNum; } int res = UART_read(handle->uartHandle, data, data_len) + readNum; -// if (res > 0) { -// if (*(char *)data == '\r') { -// System_printf("\\r\n"); -// } else if (*(char *)data == '\n') { -// System_printf("\\n\n"); -// } else { -// System_printf("%.*s\n", res, data); -// } -// } + // if (res > 0) { + // if (*(char *)data == '\r') { + // System_printf("\\r\n"); + // } else if (*(char *)data == '\n') { + // System_printf("\\n\n"); + // } else { + // System_printf("%.*s\n", res, data); + // } + // } if (res < 0) { LOGGER_ERROR("Fatal - unable to read from UART\n"); } @@ -148,29 +151,32 @@ int AT_cmd_read_data(AT_Handle handle, void *data, size_t data_len) { } // TODO: maybe just make this a UART helper function -void AT_cmd_clear_buf(AT_Handle handle, int bytes) { +void AT_cmd_clear_buf(AT_Handle handle, int bytes) +{ if (!handle) { return; } uint8_t tmp; if (bytes) { - while(bytes--) { + while (bytes--) { AT_cmd_read_data(handle, &tmp, sizeof(tmp)); } } else { // We can't do this with a file #if !FILE_DEBUG bool avail; - while ((UART_control(handle->uartHandle, UART_CMD_ISAVAILABLE, &avail) - == UART_STATUS_SUCCESS) && avail) { + while ((UART_control(handle->uartHandle, UART_CMD_ISAVAILABLE, + &avail) == UART_STATUS_SUCCESS) && + avail) { AT_cmd_read_data(handle, &tmp, sizeof(tmp)); } #endif } } -bool AT_cmd_read16(AT_Handle handle, uint16_t *data) { +bool AT_cmd_read16(AT_Handle handle, uint16_t *data) +{ size_t size = sizeof(*data); bool res = (AT_cmd_read_data(handle, data, size) == size); *data = ntohs(*data); @@ -204,18 +210,17 @@ typedef struct At_RawResponse { } At_RawResponse; static const DefLineType LINE_TYPES[COUNT_AT_LINE_TYPE] = { - [AT_LINE_TYPE_RESPONSE] = { - .pfx = RES_PREFIX, - .sfx = RES_SUFFIX - }, - [AT_LINE_TYPE_CMD_ECHO] = { - .pfx = CMD_PREFIX, - .sfx = CMD_SUFFIX, - }, + [AT_LINE_TYPE_RESPONSE] = { .pfx = RES_PREFIX, .sfx = RES_SUFFIX }, + [AT_LINE_TYPE_CMD_ECHO] = + { + .pfx = CMD_PREFIX, + .sfx = CMD_SUFFIX, + }, }; static AtLineType get_line_type(AT_Handle handle, char *buf, size_t buf_size, - int *idx_out) { + int *idx_out) +{ int idx = -1; // Index of the character we're checking bool ignore[COUNT_AT_LINE_TYPE] = {}; int remaining; // Number of types remaining to check @@ -231,7 +236,7 @@ static AtLineType get_line_type(AT_Handle handle, char *buf, size_t buf_size, remaining = 0; for (int type = 0; type < COUNT_AT_LINE_TYPE; ++type) { - if(ignore[type]) { + if (ignore[type]) { continue; } @@ -247,14 +252,15 @@ static AtLineType get_line_type(AT_Handle handle, char *buf, size_t buf_size, ++remaining; } } - } while(remaining); + } while (remaining); // We didn't recognize the prefix, we'll assume it's a binary response return AT_LINE_TYPE_BINARY; } void AT_cmd_register_binary_handler(AT_Handle handle, - AtBinaryReadHandler handler) { + AtBinaryReadHandler handler) +{ if (!handle) { return; } @@ -263,10 +269,12 @@ void AT_cmd_register_binary_handler(AT_Handle handle, handle->binaryReadHandler = handler; } -static bool AT_cmd_read_line(AT_Handle handle, At_RawResponse *res) { +static bool AT_cmd_read_line(AT_Handle handle, At_RawResponse *res) +{ // Figure out what type of response this is int lineLen = 0; - res->type = get_line_type(handle, handle->s_buf, sizeof(handle->s_buf), &lineLen); + res->type = get_line_type(handle, handle->s_buf, sizeof(handle->s_buf), + &lineLen); if (res->type == AT_LINE_TYPE_INVALID) { return false; @@ -277,12 +285,15 @@ static bool AT_cmd_read_line(AT_Handle handle, At_RawResponse *res) { switch (res->type) { case AT_LINE_TYPE_BINARY: if (handle->binaryReadHandler) { - handle->s_bufLen = lineLen + 1; // TODO: this is dumb, get_line_type should just know about the temp buf + handle->s_bufLen = + lineLen + + 1; // TODO: this is dumb, get_line_type should just know about the temp buf res->size = handle->binaryReadHandler(handle, res->data); handle->binaryReadHandler = NULL; return (res->size >= 0); } - LOGGER_ERROR("FATAL: Unhandled binary data: %.*s\n", lineLen+1, handle->s_buf); + LOGGER_ERROR("FATAL: Unhandled binary data: %.*s\n", lineLen + 1, + handle->s_buf); return false; case AT_LINE_TYPE_RESPONSE: if (handle->AtPrompt) { @@ -298,7 +309,7 @@ static bool AT_cmd_read_line(AT_Handle handle, At_RawResponse *res) { // Read the rest of the line until we hit the suffix const char *sfx = LINE_TYPES[res->type].sfx; int idx = 0; - while(idx < strlen(sfx)) { + while (idx < strlen(sfx)) { if (lineLen > AT_MAX_LINE_LEN) { LOGGER_ERROR("Fatal: read line buffer overflow\n"); return false; @@ -311,11 +322,12 @@ static bool AT_cmd_read_line(AT_Handle handle, At_RawResponse *res) { LOGGER_ERROR("Fatal - unable to read from UART\n"); return false; } - if (promptLen && lineLen == (promptLen-1) && strncmp(res->data, handle->AtPrompt, promptLen) == 0) { + if (promptLen && lineLen == (promptLen - 1) && + strncmp(res->data, handle->AtPrompt, promptLen) == 0) { DEBUG("Found prompt\n"); res->type = AT_LINE_TYPE_PROMPT; return true; - } else if(res->data[lineLen] == sfx[idx]) { + } else if (res->data[lineLen] == sfx[idx]) { idx++; } else { idx = 0; @@ -340,8 +352,9 @@ static bool AT_cmd_read_line(AT_Handle handle, At_RawResponse *res) { #include "helpers/memory.h" void AT_cmd_register_unsolicited(AT_Handle handle, - const AT_UnsolicitedRes *resList, - void *context) { + const AT_UnsolicitedRes *resList, + void *context) +{ if (!handle) { return; } @@ -352,8 +365,9 @@ void AT_cmd_register_unsolicited(AT_Handle handle, // TODO: more consistent naming for string buffers (str, buf, etc.) // TODO: should this really be calling the unsolicited response cb too? -static bool check_unsolicited(AT_Handle handle, At_RawResponse *rawRes) { - if(!handle->unsolicitedResponses) { +static bool check_unsolicited(AT_Handle handle, At_RawResponse *rawRes) +{ + if (!handle->unsolicitedResponses) { return false; } @@ -363,7 +377,7 @@ static bool check_unsolicited(AT_Handle handle, At_RawResponse *rawRes) { int i = 0; const char *str = (char *)rawRes->data; - while(handle->unsolicitedResponses[i].fmt) { + while (handle->unsolicitedResponses[i].fmt) { const AT_UnsolicitedRes *curItem = &handle->unsolicitedResponses[i]; // TODO: can probably clean up a bit to avoid strlen, but I'm not worried if (strncmp(curItem->fmt, str, strlen(curItem->fmt)) == 0) { @@ -385,7 +399,8 @@ static bool check_unsolicited(AT_Handle handle, At_RawResponse *rawRes) { return false; } -void ReadThread(UArg data, UArg unused) { +void ReadThread(UArg data, UArg unused) +{ AT_Handle handle = (AT_Handle)(uintptr_t)data; while (true) { At_RawResponse res; @@ -400,7 +415,8 @@ void ReadThread(UArg data, UArg unused) { } AT_Handle AT_cmd_init(UART_Handle hCom, const AT_UnsolicitedRes *resList, - void *context) { + void *context) +{ AT_Handle handle = (AT_Info *)zalloc(sizeof(AT_Info)); handle->uartHandle = hCom; handle->responseTimeout = AT_RES_DEFAULT_TIMEOUT; @@ -417,8 +433,8 @@ AT_Handle AT_cmd_init(UART_Handle hCom, const AT_UnsolicitedRes *resList, Task_Params taskParams; Task_Params_init(&taskParams); taskParams.stackSize = AT_READ_TASK_STACK_SIZE; - taskParams.priority = AT_READ_TASK_PRIORITY; - taskParams.arg0 = (uintptr_t)handle; + taskParams.priority = AT_READ_TASK_PRIORITY; + taskParams.arg0 = (uintptr_t)handle; Task_Handle thread = Task_create(ReadThread, &taskParams, NULL); if (!thread) { @@ -436,7 +452,8 @@ AT_Handle AT_cmd_init(UART_Handle hCom, const AT_UnsolicitedRes *resList, return NULL; } -static AtResultCode get_result_code(const char *str) { +static AtResultCode get_result_code(const char *str) +{ for (int i = 0; i < ARRAY_SIZE(AtResultStringMap); ++i) { if (strcmp(str, AtResultStringMap[i].str) == 0) { return AtResultStringMap[i].code; @@ -456,7 +473,8 @@ static AtResultCode get_result_code(const char *str) { #include bool AT_cmd_parse_response(const char *str, const char *cmd, - AT_Response *res_out) { + AT_Response *res_out) +{ // Information messages with numerical data are usually of the form // +: , , ... @@ -497,7 +515,7 @@ bool AT_cmd_parse_response(const char *str, const char *cmd, // See if this is a string if (*cur == '"') { - res_out->param[i] = (AT_Param) { + res_out->param[i] = (AT_Param){ .type = AT_PARAM_TYPE_STR, .pStr = pStrBuf, }; @@ -509,7 +527,7 @@ bool AT_cmd_parse_response(const char *str, const char *cmd, DEBUG("Parsing error - couldn't find enclosing quote\n"); return false; } - size_t strLen = (next - cur); + size_t strLen = (next - cur); memcpy(pStrBuf, cur, strLen); pStrBuf[strLen] = '\0'; pStrBuf += strLen + 1; // +1 to account for terminator @@ -521,14 +539,14 @@ bool AT_cmd_parse_response(const char *str, const char *cmd, uint64_t val = strtoull(cur, (char **)&next, 10); if (val > UINT32_MAX) { memcpy(pStrBuf, &val, sizeof(val)); - res_out->param[i] = (AT_Param) { + res_out->param[i] = (AT_Param){ .type = AT_PARAM_TYPE_INT64, .pInt64 = (uint64_t *)pStrBuf, }; - pStrBuf+=sizeof(val); - DEBUG("I64:%"PRIu64" ", val); + pStrBuf += sizeof(val); + DEBUG("I64:%" PRIu64 " ", val); } else { - res_out->param[i] = (AT_Param) { + res_out->param[i] = (AT_Param){ .type = AT_PARAM_TYPE_INT, .vInt = (uint32_t)val, }; @@ -552,8 +570,8 @@ bool AT_cmd_parse_response(const char *str, const char *cmd, // TODO: slightly more efficient to combine pfx&sfx into cmd, but code // will probably look more ugly :( -static bool v_write_command(AT_Handle handle, const char *cmd_fmt, - va_list argv) { +static bool v_write_command(AT_Handle handle, const char *cmd_fmt, va_list argv) +{ // Add arguments to command char cmd[CMD_MAX_LEN]; int cmd_len = vsnprintf(cmd, CMD_MAX_LEN, cmd_fmt, argv); @@ -565,14 +583,15 @@ static bool v_write_command(AT_Handle handle, const char *cmd_fmt, DEBUG("---------------------------------\n"); DEBUG("%s%s%s\n", CMD_PREFIX, cmd, CMD_SUFFIX); - return AT_cmd_write_data(handle, CMD_PREFIX, strlen(CMD_PREFIX)) && - AT_cmd_write_data(handle, cmd, cmd_len) && - AT_cmd_write_data(handle, CMD_SUFFIX, strlen(CMD_SUFFIX)); + return AT_cmd_write_data(handle, CMD_PREFIX, strlen(CMD_PREFIX)) && + AT_cmd_write_data(handle, cmd, cmd_len) && + AT_cmd_write_data(handle, CMD_SUFFIX, strlen(CMD_SUFFIX)); } // TODO: should probably ensure rx buffer is empty before sending new command, in case parser messed up // TODO: I think this is dead code now -bool AT_cmd_write_command(AT_Handle handle, const char *cmd_fmt, ...) { +bool AT_cmd_write_command(AT_Handle handle, const char *cmd_fmt, ...) +{ if (!handle) { return false; } @@ -588,7 +607,8 @@ bool AT_cmd_write_command(AT_Handle handle, const char *cmd_fmt, ...) { // TODO: this & function below are way too similar bool AtCmd_enterBinaryMode(AT_Handle handle, const char *prompt, - const char *cmd_fmt, ...) { + const char *cmd_fmt, ...) +{ if (!handle) { return false; } @@ -614,7 +634,8 @@ bool AtCmd_enterBinaryMode(AT_Handle handle, const char *prompt, case AT_LINE_TYPE_PROMPT: return true; case AT_LINE_TYPE_RESPONSE: - if (get_result_code((char *)at_res.data) != AT_RESULT_CODE_INVALID) { + if (get_result_code((char *)at_res.data) != + AT_RESULT_CODE_INVALID) { return false; } break; @@ -627,14 +648,16 @@ bool AtCmd_enterBinaryMode(AT_Handle handle, const char *prompt, return false; } -void AT_cmd_set_timeout(AT_Handle handle, uint32_t timeout) { +void AT_cmd_set_timeout(AT_Handle handle, uint32_t timeout) +{ if (handle) { handle->responseTimeout = timeout; } } // TODO: this function needs some love -bool AT_cmd_get_response(AT_Handle handle, void *res_buf, size_t res_len) { +bool AT_cmd_get_response(AT_Handle handle, void *res_buf, size_t res_len) +{ if (!handle) { return false; } @@ -665,7 +688,7 @@ bool AT_cmd_get_response(AT_Handle handle, void *res_buf, size_t res_len) { } // See if this was a result code - switch(get_result_code((char *)res.data)) { + switch (get_result_code((char *)res.data)) { case AT_RESULT_CODE_ERROR_CUSTOM: case AT_RESULT_CODE_ERROR: LOGGER_ERROR("%s: ERROR\n", res.data); @@ -677,7 +700,8 @@ bool AT_cmd_get_response(AT_Handle handle, void *res_buf, size_t res_len) { DEBUG("%s: OK\n", res.data); return true; case AT_RESULT_CODE_INVALID: - LOGGER_ERROR("Fatal error - unknown result code: %s\n", res.data); + LOGGER_ERROR("Fatal error - unknown result code: %s\n", + res.data); return false; } } @@ -688,7 +712,8 @@ bool AT_cmd_get_response(AT_Handle handle, void *res_buf, size_t res_len) { return false; } -static void empty_response_buffer(AT_Handle handle) { +static void empty_response_buffer(AT_Handle handle) +{ At_RawResponse res; while (Mailbox_pend(handle->inbox, &res, BIOS_NO_WAIT)) { LOGGER_WARNING("Unhandled AT response: %s\n", res.data); @@ -696,7 +721,8 @@ static void empty_response_buffer(AT_Handle handle) { } static bool v_at_cmd_raw(AT_Handle handle, void *res_buf, size_t res_len, - const char *cmd_fmt, va_list argv) { + const char *cmd_fmt, va_list argv) +{ empty_response_buffer(handle); /* Just in case we missed a response */ if (!v_write_command(handle, cmd_fmt, argv)) { LOGGER_ERROR("Error writing command :O\n"); @@ -705,7 +731,8 @@ static bool v_at_cmd_raw(AT_Handle handle, void *res_buf, size_t res_len, return AT_cmd_get_response(handle, res_buf, res_len); } -bool AT_cmd(AT_Handle handle, AT_Response *res_out, const char *cmd_fmt, ...) { +bool AT_cmd(AT_Handle handle, AT_Response *res_out, const char *cmd_fmt, ...) +{ if (!handle) { return false; } @@ -732,7 +759,8 @@ bool AT_cmd(AT_Handle handle, AT_Response *res_out, const char *cmd_fmt, ...) { } bool AT_cmd_raw(AT_Handle handle, void *res_buf, size_t res_len, - const char *cmd_fmt, ...) { + const char *cmd_fmt, ...) +{ if (!handle) { return false; } diff --git a/firmware/ec/src/devices/uart/gsm.c b/firmware/ec/src/devices/uart/gsm.c index 50e3ff8fdd..7a8ddbc9a5 100644 --- a/firmware/ec/src/devices/uart/gsm.c +++ b/firmware/ec/src/devices/uart/gsm.c @@ -20,8 +20,8 @@ #define CMGD_TIMEOUT 10000 #define CFUN_TIMEOUT 12000 -#define TESTMOD_TASK_PRIORITY 2 -#define TESTMOD_TASK_STACK_SIZE 2048 +#define TESTMOD_TASK_PRIORITY 2 +#define TESTMOD_TASK_STACK_SIZE 2048 static Char testmodTaskStack[TESTMOD_TASK_STACK_SIZE]; static const char CTRL_Z = 26; @@ -30,7 +30,8 @@ static GsmCallbackList gsmCallbackList = {}; // TODO: move into handle static AT_Response s_AtRes; // TODO: AT_Response const? -static bool creg(AT_Response *res, void *context) { +static bool creg(AT_Response *res, void *context) +{ /* TODO: hack to detect if this was unsolicited or request by user */ if (res->paramCount == 2 || res->paramCount == 4) { return false; @@ -46,17 +47,19 @@ static bool creg(AT_Response *res, void *context) { return true; } -static bool simReady(AT_Response *res, void *context) { +static bool simReady(AT_Response *res, void *context) +{ if (gsmCallbackList.simReady) { gsmCallbackList.simReady(context); } return true; } -static bool cmti(AT_Response *res, void *context) { +static bool cmti(AT_Response *res, void *context) +{ if (gsmCallbackList.cmti) { if (res->paramCount == 2 && res->param[0].type == AT_PARAM_TYPE_STR && - res->param[1].type == AT_PARAM_TYPE_INT) { + res->param[1].type == AT_PARAM_TYPE_INT) { GsmCmtiInfo info = { .mem = res->param[0].pStr, .index = res->param[1].vInt, @@ -67,7 +70,8 @@ static bool cmti(AT_Response *res, void *context) { return true; } -static bool ring(AT_Response *res, void *context) { +static bool ring(AT_Response *res, void *context) +{ if (gsmCallbackList.ring) { gsmCallbackList.ring(context); } @@ -77,7 +81,8 @@ static bool ring(AT_Response *res, void *context) { static char sms[160]; static GSM_Handle s_handle; // TODO: super duper temporary -static bool cmgr(AT_Response *res, void *context) { +static bool cmgr(AT_Response *res, void *context) +{ sms[0] = '\0'; /* Read size from +CMGR response */ @@ -104,7 +109,8 @@ static bool cmgr(AT_Response *res, void *context) { return true; } -static bool clcc(AT_Response *res, void *context) { +static bool clcc(AT_Response *res, void *context) +{ if (gsmCallbackList.clcc) { GsmClccInfo info = { .idx = res->param[0].vInt, @@ -118,53 +124,53 @@ static bool clcc(AT_Response *res, void *context) { // TODO: make callback process less complicated static const AT_UnsolicitedRes unsolicitedList[] = { + { // TODO: I have no idea what this is, but it's undocumented and annoying + .fmt = "^STN:" }, { - // TODO: I have no idea what this is, but it's undocumented and annoying - .fmt = "^STN:" + .fmt = "+CREG:", + .cb = creg, }, { - .fmt = "+CREG:", - .cb = creg, + .fmt = "+SIM READY", + .cb = simReady, }, { - .fmt = "+SIM READY", - .cb = simReady, + .fmt = "+SIM DROP", }, { - .fmt = "+SIM DROP", + .fmt = "+CMTI:", + .cb = cmti, }, { - .fmt = "+CMTI:", - .cb = cmti, + .fmt = "+CMGR:", + .cb = cmgr, }, { - .fmt = "+CMGR:", - .cb = cmgr, + .fmt = "RING", + .cb = ring, }, { - .fmt = "RING", - .cb = ring, + .fmt = "NO CARRIER", }, { - .fmt = "NO CARRIER", + .fmt = "BUSY", }, { - .fmt = "BUSY", + .fmt = "CONNECT", }, { - .fmt = "CONNECT", + .fmt = "NO ANSWER", }, { - .fmt = "NO ANSWER", - }, - { - .fmt = "+CLCC", - .cb = clcc, + .fmt = "+CLCC", + .cb = clcc, }, {} }; -GSM_Handle GSM_init(UART_Handle hCom, const GsmCallbackList *cbList, void *cbContext) { +GSM_Handle GSM_init(UART_Handle hCom, const GsmCallbackList *cbList, + void *cbContext) +{ if (cbList) { gsmCallbackList = *cbList; } @@ -187,7 +193,8 @@ GSM_Handle GSM_init(UART_Handle hCom, const GsmCallbackList *cbList, void *cbCon return handle; } -bool GSM_cgsn(GSM_Handle handle, GsmCgsnInfo *info_out) { +bool GSM_cgsn(GSM_Handle handle, GsmCgsnInfo *info_out) +{ if (AT_cmd(handle, &s_AtRes, "+CGSN")) { if (s_AtRes.paramCount != 1) { LOGGER_ERROR("Param count: %d != 1\n", s_AtRes.paramCount); @@ -195,12 +202,14 @@ bool GSM_cgsn(GSM_Handle handle, GsmCgsnInfo *info_out) { } if (s_AtRes.param[0].type != AT_PARAM_TYPE_STR) { - LOGGER_ERROR("Param type: %d != %d\n", s_AtRes.param[0].type, AT_PARAM_TYPE_STR); + LOGGER_ERROR("Param type: %d != %d\n", s_AtRes.param[0].type, + AT_PARAM_TYPE_STR); return false; } if (strlen(s_AtRes.param[0].pStr) >= sizeof(info_out->imei)) { - LOGGER_ERROR("strlen: %u >= %u\n", strlen(s_AtRes.param[0].pStr), sizeof(info_out->imei)); + LOGGER_ERROR("strlen: %u >= %u\n", strlen(s_AtRes.param[0].pStr), + sizeof(info_out->imei)); return false; } @@ -212,7 +221,8 @@ bool GSM_cgsn(GSM_Handle handle, GsmCgsnInfo *info_out) { return false; } -bool GSM_cimi(GSM_Handle handle, uint64_t *imsi) { +bool GSM_cimi(GSM_Handle handle, uint64_t *imsi) +{ if (AT_cmd(handle, &s_AtRes, "+CIMI")) { if (s_AtRes.paramCount != 1) { LOGGER_ERROR("Param count: %d != 1\n", s_AtRes.paramCount); @@ -220,7 +230,8 @@ bool GSM_cimi(GSM_Handle handle, uint64_t *imsi) { } if (s_AtRes.param[0].type != AT_PARAM_TYPE_INT64) { - LOGGER_ERROR("Param type: %d != %d\n", s_AtRes.param[0].type, AT_PARAM_TYPE_INT64); + LOGGER_ERROR("Param type: %d != %d\n", s_AtRes.param[0].type, + AT_PARAM_TYPE_INT64); return false; } @@ -232,16 +243,19 @@ bool GSM_cimi(GSM_Handle handle, uint64_t *imsi) { return false; } -bool GSM_cmgf(GSM_Handle handle, GsmMessageFormat fmt) { +bool GSM_cmgf(GSM_Handle handle, GsmMessageFormat fmt) +{ return AT_cmd(handle, NULL, "+CMGF=%u", fmt); } // TODO: most of these params should probably be enums or structs -bool GSM_csmp(GSM_Handle handle, int fo, int vp, int pid, int dcs) { +bool GSM_csmp(GSM_Handle handle, int fo, int vp, int pid, int dcs) +{ return AT_cmd(handle, NULL, "+CSMP=%u,%u,%u,%u", fo, vp, pid, dcs); } -int GSM_cmgs(GSM_Handle handle, const char *number, const char *msg) { +int GSM_cmgs(GSM_Handle handle, const char *number, const char *msg) +{ if (AtCmd_enterBinaryMode(handle, "> ", "+CMGS=\"%s\"", number)) { if (!AT_cmd_write_data(handle, msg, strlen(msg)) || !AT_cmd_write_data(handle, &CTRL_Z, sizeof(CTRL_Z))) { @@ -265,11 +279,13 @@ int GSM_cmgs(GSM_Handle handle, const char *number, const char *msg) { return -1; } -bool GSM_creg(GSM_Handle handle, GsmCregMode n) { +bool GSM_creg(GSM_Handle handle, GsmCregMode n) +{ return AT_cmd(handle, NULL, "+CREG=%u", n); } -bool GSM_cregRead(GSM_Handle handle, GsmCregInfo *info_out) { +bool GSM_cregRead(GSM_Handle handle, GsmCregInfo *info_out) +{ if (!AT_cmd(handle, &s_AtRes, "+CREG?")) { return false; } @@ -283,7 +299,7 @@ bool GSM_cregRead(GSM_Handle handle, GsmCregInfo *info_out) { return false; } - *info_out = (GsmCregInfo) { + *info_out = (GsmCregInfo){ .n = (GsmCregMode)s_AtRes.param[0].vInt, .stat = (GsmCregStat)s_AtRes.param[1].vInt, }; @@ -300,15 +316,18 @@ bool GSM_cregRead(GSM_Handle handle, GsmCregInfo *info_out) { return true; } -bool GSM_cnmi(GSM_Handle handle, int mode, int mt, int bm, int ds, int bfr) { +bool GSM_cnmi(GSM_Handle handle, int mode, int mt, int bm, int ds, int bfr) +{ return AT_cmd(handle, NULL, "+CNMI=%u,%u,%u,%u,%u", mode, mt, bm, ds, bfr); } -bool GSM_csdh(GSM_Handle handle, bool show) { +bool GSM_csdh(GSM_Handle handle, bool show) +{ return AT_cmd(handle, NULL, "+CSDH=%u", show); } -bool GSM_csq(GSM_Handle handle, GsmCsqInfo *info_out) { +bool GSM_csq(GSM_Handle handle, GsmCsqInfo *info_out) +{ if (!AT_cmd(handle, &s_AtRes, "+CSQ")) { return false; } @@ -322,7 +341,7 @@ bool GSM_csq(GSM_Handle handle, GsmCsqInfo *info_out) { return false; } - *info_out = (GsmCsqInfo) { + *info_out = (GsmCsqInfo){ .rssi = s_AtRes.param[0].vInt, .ber = s_AtRes.param[1].vInt, }; @@ -330,7 +349,8 @@ bool GSM_csq(GSM_Handle handle, GsmCsqInfo *info_out) { return true; } -bool GSM_cgmi(GSM_Handle handle, GsmCgmiInfo *info_out) { +bool GSM_cgmi(GSM_Handle handle, GsmCgmiInfo *info_out) +{ if (!AT_cmd(handle, &s_AtRes, "+CGMI")) { return false; } @@ -349,7 +369,8 @@ bool GSM_cgmi(GSM_Handle handle, GsmCgmiInfo *info_out) { return true; } -bool GSM_cgmm(GSM_Handle handle, GsmCgmmInfo *info_out) { +bool GSM_cgmm(GSM_Handle handle, GsmCgmmInfo *info_out) +{ if (!AT_cmd(handle, &s_AtRes, "+CGMM")) { return false; } @@ -373,7 +394,8 @@ bool GSM_cgmm(GSM_Handle handle, GsmCgmmInfo *info_out) { } bool GSM_cops(GSM_Handle handle, GsmCopsMode mode, GsmCopsFmt format, - const char *oper) { + const char *oper) +{ switch (mode) { case GSM_COPS_MODE_AUTO: case GSM_COPS_MODE_DEREG: @@ -386,48 +408,58 @@ bool GSM_cops(GSM_Handle handle, GsmCopsMode mode, GsmCopsFmt format, } } -bool GSM_copsTest(GSM_Handle handle, GsmCopsTestInfo *info_out) { +bool GSM_copsTest(GSM_Handle handle, GsmCopsTestInfo *info_out) +{ return false; } -bool GSM_a(GSM_Handle handle) { +bool GSM_a(GSM_Handle handle) +{ // TODO: actually handle error cases return AT_cmd(handle, NULL, "A"); } -bool GSM_d(GSM_Handle handle, const char *number) { +bool GSM_d(GSM_Handle handle, const char *number) +{ return AT_cmd(handle, NULL, "D%s;", number); } -bool GSM_h(GSM_Handle handle) { +bool GSM_h(GSM_Handle handle) +{ return AT_cmd(handle, NULL, "H"); } -bool GSM_cfun(GSM_Handle handle, GsmCFun fun) { +bool GSM_cfun(GSM_Handle handle, GsmCFun fun) +{ AT_cmd_set_timeout(handle, CFUN_TIMEOUT); bool res = AT_cmd(handle, NULL, "+CFUN=%u", fun); AT_cmd_set_timeout(handle, AT_RES_DEFAULT_TIMEOUT); return res; } -bool GSM_cnma(GSM_Handle handle) { +bool GSM_cnma(GSM_Handle handle) +{ return AT_cmd(handle, NULL, "+CNMA"); } -bool GSM_cmgd(GSM_Handle handle, int index, GsmCmgdFlag flag) { +bool GSM_cmgd(GSM_Handle handle, int index, GsmCmgdFlag flag) +{ AT_cmd_set_timeout(handle, CMGD_TIMEOUT); bool res = AT_cmd(handle, NULL, "+CMGD=%u,%u", index, flag); AT_cmd_set_timeout(handle, AT_RES_DEFAULT_TIMEOUT); return res; } -bool GSM_clccSet(GSM_Handle handle, bool state) { +bool GSM_clccSet(GSM_Handle handle, bool state) +{ return AT_cmd(handle, NULL, "+CLCC=%u", state); } // Read and write functions - more complicated than the other commands // ============================================================================ -bool GSM_cmgr(GSM_Handle handle, unsigned int index, char *sms_out, GsmCmgrInfo *info_out) { +bool GSM_cmgr(GSM_Handle handle, unsigned int index, char *sms_out, + GsmCmgrInfo *info_out) +{ if (!AT_cmd(handle, NULL, "+CMGR=%u", index)) { return false; } diff --git a/firmware/ec/src/devices/uart/gsm.h b/firmware/ec/src/devices/uart/gsm.h index 0c067597b6..bada54c55e 100644 --- a/firmware/ec/src/devices/uart/gsm.h +++ b/firmware/ec/src/devices/uart/gsm.h @@ -20,12 +20,12 @@ typedef struct AT_Info *AT_Handle; typedef AT_Handle GSM_Handle; typedef enum GsmCregStat { - GSM_CREG_STAT_NREG_NSEARCH = 0x00, - GSM_CREG_STAT_REG_HOME = 0x01, - GSM_CREG_STAT_NREG_SEARCH = 0x02, - GSM_CREG_STAT_DENIED = 0x03, - GSM_CREG_STAT_UNKNOWN = 0x04, - GSM_CREG_STAT_REG_ROAMING = 0x05, + GSM_CREG_STAT_NREG_NSEARCH = 0x00, + GSM_CREG_STAT_REG_HOME = 0x01, + GSM_CREG_STAT_NREG_SEARCH = 0x02, + GSM_CREG_STAT_DENIED = 0x03, + GSM_CREG_STAT_UNKNOWN = 0x04, + GSM_CREG_STAT_REG_ROAMING = 0x05, } GsmCregStat; typedef struct GsmCmtiInfo { @@ -34,14 +34,14 @@ typedef struct GsmCmtiInfo { } GsmCmtiInfo; typedef enum GsmCallState { - GSM_CALL_STATE_ACTIVE = 0, - GSM_CALL_STATE_HELD = 1, + GSM_CALL_STATE_ACTIVE = 0, + GSM_CALL_STATE_HELD = 1, - GSM_CALL_STATE_DIALING = 2, /* MO */ + GSM_CALL_STATE_DIALING = 2, /* MO */ GSM_CALL_STATE_ALERTING = 3, /* MO */ GSM_CALL_STATE_INCOMING = 4, /* MT */ - GSM_CALL_STATE_WAITING = 5, /* MT */ + GSM_CALL_STATE_WAITING = 5, /* MT */ GSM_CALL_STATE_RELEASED = 6, } GsmCallState; @@ -69,7 +69,8 @@ typedef struct GsmCallbackList { GsmClccCb clcc; } GsmCallbackList; -GSM_Handle GSM_init(UART_Handle hCom, const GsmCallbackList *cbList, void *cbContext); +GSM_Handle GSM_init(UART_Handle hCom, const GsmCallbackList *cbList, + void *cbContext); typedef struct GsmCgsnInfo { char imei[16]; @@ -93,9 +94,9 @@ int GSM_cmgs(GSM_Handle handle, const char *number, const char *msg); // Enables/disables unsolicited creg message // TODO: I'm not sold on the enum naming typedef enum GsmCregMode { - GSM_CREG_STATUS_DISABLE = 0x0, - GSM_CREG_STATUS_ENABLE = 0x1, - GSM_CREG_STATUS_ENABLE_LOC = 0x2, + GSM_CREG_STATUS_DISABLE = 0x0, + GSM_CREG_STATUS_ENABLE = 0x1, + GSM_CREG_STATUS_ENABLE_LOC = 0x2, } GsmCregMode; bool GSM_creg(GSM_Handle handle, GsmCregMode n); @@ -112,10 +113,12 @@ bool GSM_cnmi(GSM_Handle handle, int mode, int mt, int bm, int ds, int bfr); typedef struct GsmCmgrInfo { char stat[12]; char oa[15]; - char alpha[5]; // TODO: this isn't present with our module, what should it be? + char alpha + [5]; // TODO: this isn't present with our module, what should it be? char scts[16]; // service center timestamp } GsmCmgrInfo; -bool GSM_cmgr(GSM_Handle handle, unsigned int index, char *sms_out, GsmCmgrInfo *info_out); +bool GSM_cmgr(GSM_Handle handle, unsigned int index, char *sms_out, + GsmCmgrInfo *info_out); bool GSM_csdh(GSM_Handle handle, bool show); @@ -137,25 +140,25 @@ typedef struct GsmCgmmInfo { bool GSM_cgmm(GSM_Handle handle, GsmCgmmInfo *info_out); typedef enum GsmCopsMode { - GSM_COPS_MODE_AUTO = 0, - GSM_COPS_MODE_MANUAL = 1, - GSM_COPS_MODE_DEREG = 2, - GSM_COPS_MODE_SET_FMT = 3, + GSM_COPS_MODE_AUTO = 0, + GSM_COPS_MODE_MANUAL = 1, + GSM_COPS_MODE_DEREG = 2, + GSM_COPS_MODE_SET_FMT = 3, GSM_COPS_MODE_MANUAL_AUTO = 4, } GsmCopsMode; typedef enum GsmCopsFmt { - GSM_COPS_FMT_LONG_ALPHA = 0, + GSM_COPS_FMT_LONG_ALPHA = 0, GSM_COPS_FMT_SHORT_ALPHA = 1, - GSM_COPS_FMT_NUMERIC = 2, + GSM_COPS_FMT_NUMERIC = 2, } GsmCopsFmt; bool GSM_cops(GSM_Handle handle, GsmCopsMode mode, GsmCopsFmt format, const char *oper); typedef enum GsmCopsStat { - GSM_COPS_STAT_UNKNOWN = 0, + GSM_COPS_STAT_UNKNOWN = 0, GSM_COPS_STAT_AVAILABLE = 1, - GSM_COPS_STAT_CURRENT = 2, + GSM_COPS_STAT_CURRENT = 2, GSM_COPS_STAT_FORBIDDEN = 3 } GsmCopsStat; @@ -181,20 +184,20 @@ bool GSM_h(GSM_Handle handle); bool GSM_cnma(GSM_Handle handle); typedef enum GsmCmgdFlag { - GSM_CMGD_DELETE_AT_INDEX = 0, - GSM_CMGD_DELETE_ALL_READ = 1, - GSM_CMGD_DELETE_ALL_READ_AND_SENT_MO = 2, - GSM_CMGD_DELETE_ALL_READ_AND_MO = 3, - GSM_CMGD_DELETE_ALL = 4, + GSM_CMGD_DELETE_AT_INDEX = 0, + GSM_CMGD_DELETE_ALL_READ = 1, + GSM_CMGD_DELETE_ALL_READ_AND_SENT_MO = 2, + GSM_CMGD_DELETE_ALL_READ_AND_MO = 3, + GSM_CMGD_DELETE_ALL = 4, } GsmCmgdFlag; bool GSM_cmgd(GSM_Handle handle, int index, GsmCmgdFlag flag); typedef enum GsmCFun { - GSM_CFUN_OFF = 0, /*!< Power off module */ - GSM_CFUN_FULL = 1, /*!< Enable full radio functionality */ - GSM_CFUN_AIRPLANE = 4, /*!< Turn off radio functionality */ - GSM_CFUN_RESET = 15 /*!< Hardware reset */ + GSM_CFUN_OFF = 0, /*!< Power off module */ + GSM_CFUN_FULL = 1, /*!< Enable full radio functionality */ + GSM_CFUN_AIRPLANE = 4, /*!< Turn off radio functionality */ + GSM_CFUN_RESET = 15 /*!< Hardware reset */ } GsmCFun; bool GSM_cfun(GSM_Handle handle, GsmCFun fun); diff --git a/firmware/ec/src/devices/uart/sbd.c b/firmware/ec/src/devices/uart/sbd.c index 72f8a4212e..aef01ac670 100644 --- a/firmware/ec/src/devices/uart/sbd.c +++ b/firmware/ec/src/devices/uart/sbd.c @@ -33,7 +33,8 @@ static SbdCallbackList sbdCallbackList = {}; // TODO: move into handle static AT_Response s_AtRes; // No point having this large struct on the stack // Helper function to take care of all-integer responses -static bool copy_int_responses(AT_Response *atRes, int *info_out, int infoSize) { +static bool copy_int_responses(AT_Response *atRes, int *info_out, int infoSize) +{ if (atRes->paramCount != infoSize) { return false; } @@ -47,15 +48,16 @@ static bool copy_int_responses(AT_Response *atRes, int *info_out, int infoSize) return true; } - -static bool sbdring(AT_Response *res, void *context) { +static bool sbdring(AT_Response *res, void *context) +{ if (sbdCallbackList.sbdring) { sbdCallbackList.sbdring(context); } return true; } -static bool ciev(AT_Response *res, void *context) { +static bool ciev(AT_Response *res, void *context) +{ if (sbdCallbackList.ciev) { SbdCievInfo info_out; copy_int_responses(res, (int *)&info_out, NUM_RESPONSES(&info_out)); @@ -64,19 +66,19 @@ static bool ciev(AT_Response *res, void *context) { return true; } -static const AT_UnsolicitedRes unsolicitedList[] = { - { - .fmt = "SBDRING", - .cb = sbdring, - }, - { - .fmt = "+CIEV:", - .cb = ciev, - }, - {} -}; +static const AT_UnsolicitedRes unsolicitedList[] = { { + .fmt = "SBDRING", + .cb = sbdring, + }, + { + .fmt = "+CIEV:", + .cb = ciev, + }, + {} }; -SBD_Handle SBD_init(UART_Handle hCom, const SbdCallbackList *cbList, void *cbContext) { +SBD_Handle SBD_init(UART_Handle hCom, const SbdCallbackList *cbList, + void *cbContext) +{ if (cbList) { sbdCallbackList = *cbList; } @@ -91,67 +93,85 @@ SBD_Handle SBD_init(UART_Handle hCom, const SbdCallbackList *cbList, void *cbCon return hSbd; } -bool SBD_sbdix(SBD_Handle handle, SbdixInfo *info_out, bool alert_response) { +bool SBD_sbdix(SBD_Handle handle, SbdixInfo *info_out, bool alert_response) +{ const char *cmd_fmt = (alert_response) ? "+SBDIXA" : "+SBDIX"; AT_cmd_set_timeout(handle, SBDIX_TIMEOUT); bool res = AT_cmd(handle, &s_AtRes, cmd_fmt) && - copy_int_responses(&s_AtRes, (int *)info_out, - NUM_RESPONSES(info_out)); + copy_int_responses(&s_AtRes, (int *)info_out, + NUM_RESPONSES(info_out)); AT_cmd_set_timeout(handle, AT_RES_DEFAULT_TIMEOUT); return res; } -bool SBD_sbds(SBD_Handle handle, SbdsInfo *info_out) { +bool SBD_sbds(SBD_Handle handle, SbdsInfo *info_out) +{ const char *cmd_fmt = "+SBDS"; return AT_cmd(handle, &s_AtRes, cmd_fmt) && - copy_int_responses(&s_AtRes, (int *)info_out, NUM_RESPONSES(info_out)); + copy_int_responses(&s_AtRes, (int *)info_out, + NUM_RESPONSES(info_out)); } -bool SBD_sbdsx(SBD_Handle handle, SbdsxInfo *info_out) { +bool SBD_sbdsx(SBD_Handle handle, SbdsxInfo *info_out) +{ const char *cmd_fmt = "+SBDSX"; return AT_cmd(handle, &s_AtRes, cmd_fmt) && - copy_int_responses(&s_AtRes, (int *)info_out, NUM_RESPONSES(info_out)); + copy_int_responses(&s_AtRes, (int *)info_out, + NUM_RESPONSES(info_out)); } -bool SBD_cgsn(SBD_Handle handle, SbdcgsnInfo *info_out) { +bool SBD_cgsn(SBD_Handle handle, SbdcgsnInfo *info_out) +{ return AT_cmd_raw(handle, info_out->imei, sizeof(info_out->imei), "+CGSN"); } -bool SBD_cgmi(SBD_Handle handle, SbdCgmiInfo *info_out) { +bool SBD_cgmi(SBD_Handle handle, SbdCgmiInfo *info_out) +{ return AT_cmd_raw(handle, info_out->mfg, sizeof(info_out->mfg), "+CGMI"); } -bool SBD_cgmm(SBD_Handle handle, SbdCgmmInfo *info_out) { - return AT_cmd_raw(handle, info_out->model, sizeof(info_out->model), "+CGMM"); +bool SBD_cgmm(SBD_Handle handle, SbdCgmmInfo *info_out) +{ + return AT_cmd_raw(handle, info_out->model, sizeof(info_out->model), + "+CGMM"); } -bool SBD_k(SBD_Handle handle, SbdFlowControl flowControl) { +bool SBD_k(SBD_Handle handle, SbdFlowControl flowControl) +{ return AT_cmd(handle, NULL, "&K%u", flowControl); } -bool SBD_sbdd(SBD_Handle handle, SbdDeleteType deleteType) { +bool SBD_sbdd(SBD_Handle handle, SbdDeleteType deleteType) +{ char resCode; - bool res = AT_cmd_raw(handle, &resCode, sizeof(resCode), "+SBDD%u", deleteType); + bool res = AT_cmd_raw(handle, &resCode, sizeof(resCode), "+SBDD%u", + deleteType); return (res && resCode == '0'); } -bool SBD_csq(SBD_Handle handle, SbdcsqInfo *info_out) { +bool SBD_csq(SBD_Handle handle, SbdcsqInfo *info_out) +{ const char *cmd_fmt = "+CSQ"; return AT_cmd(handle, &s_AtRes, cmd_fmt) && - copy_int_responses(&s_AtRes, (int *)info_out, NUM_RESPONSES(info_out)); + copy_int_responses(&s_AtRes, (int *)info_out, + NUM_RESPONSES(info_out)); } -bool SBD_csqf(SBD_Handle handle, SbdcsqInfo *info_out) { +bool SBD_csqf(SBD_Handle handle, SbdcsqInfo *info_out) +{ const char *cmd_fmt = "+CSQF"; return AT_cmd(handle, &s_AtRes, cmd_fmt) && - copy_int_responses(&s_AtRes, (int *)info_out, NUM_RESPONSES(info_out)); + copy_int_responses(&s_AtRes, (int *)info_out, + NUM_RESPONSES(info_out)); } -bool SBD_sbdareg(SBD_Handle handle, SbdAregMode mode) { +bool SBD_sbdareg(SBD_Handle handle, SbdAregMode mode) +{ return AT_cmd(handle, NULL, "+SBDAREG=%u", mode); } -bool SBD_sbdregRead(SBD_Handle handle, SbdRegStat *status_out) { +bool SBD_sbdregRead(SBD_Handle handle, SbdRegStat *status_out) +{ if (!AT_cmd(handle, &s_AtRes, "+SBDREG?")) { return false; } @@ -162,25 +182,29 @@ bool SBD_sbdregRead(SBD_Handle handle, SbdRegStat *status_out) { return true; } -bool SBD_sbdtc(SBD_Handle handle) { +bool SBD_sbdtc(SBD_Handle handle) +{ // We will get an info response, but we don't really care about it char res[100]; return AT_cmd_raw(handle, res, sizeof(res), "+SBDTC"); } bool SBD_cier(SBD_Handle handle, bool mode, bool sigind, bool svcind, - bool antind, bool sv_beam_coords_ind) { + bool antind, bool sv_beam_coords_ind) +{ return AT_cmd(handle, NULL, "+CIER=%d,%d,%d,%d,%d", mode, sigind, svcind, antind, sv_beam_coords_ind); } -bool SBD_sbdmta(SBD_Handle handle, bool mode) { +bool SBD_sbdmta(SBD_Handle handle, bool mode) +{ return AT_cmd(handle, NULL, "+SBDMTA=%d", mode); } // Read and write functions - more complicated than the other commands // ============================================================================ -static uint16_t checksum(const void *data, size_t len) { +static uint16_t checksum(const void *data, size_t len) +{ uint16_t sum = 0; // uints wrap around on overflow, so no need to worry for (int i = 0; i < len; ++i) { sum += ((uint8_t *)data)[i]; @@ -188,7 +212,8 @@ static uint16_t checksum(const void *data, size_t len) { return sum; } -bool SBD_sbdwb(SBD_Handle handle, const void *data, int data_len) { +bool SBD_sbdwb(SBD_Handle handle, const void *data, int data_len) +{ // Enter data mode // (parse the response separately, since it's very nonstandard) if (!AtCmd_enterBinaryMode(handle, "READY\r\n", "+SBDWB=%d", data_len)) { @@ -197,7 +222,7 @@ bool SBD_sbdwb(SBD_Handle handle, const void *data, int data_len) { } // Successfully in data mode, write data - if(!AT_cmd_write_data(handle, data, data_len)) { + if (!AT_cmd_write_data(handle, data, data_len)) { return false; } @@ -227,7 +252,8 @@ typedef struct SbdBinaryRes { uint8_t *data; } SbdBinaryRes; -static int read_binary_data(AT_Handle handle, void *buf) { +static int read_binary_data(AT_Handle handle, void *buf) +{ SbdBinaryRes *res = buf; // Read length (2B) @@ -257,7 +283,8 @@ static int read_binary_data(AT_Handle handle, void *buf) { // We have to make the assumption that the start of this (the length) won't // overlap with - luckily, it can't -int SBD_sbdrb(SBD_Handle handle, void *buffer, int buffer_len) { +int SBD_sbdrb(SBD_Handle handle, void *buffer, int buffer_len) +{ SbdBinaryRes binRes = {}; int res = -1; AT_cmd_register_binary_handler(handle, read_binary_data); @@ -287,7 +314,8 @@ cleanup: return res; } -void SBD_test_invalid(SBD_Handle handle) { +void SBD_test_invalid(SBD_Handle handle) +{ char response[100]; AT_cmd_raw(handle, response, sizeof(response), "+CGsM"); } diff --git a/firmware/ec/src/devices/uart/sbd.h b/firmware/ec/src/devices/uart/sbd.h index d9faae76d7..d2d2851b0b 100644 --- a/firmware/ec/src/devices/uart/sbd.h +++ b/firmware/ec/src/devices/uart/sbd.h @@ -65,17 +65,17 @@ typedef struct SbdixInfo { typedef struct SbdsInfo { int moFlag; //!< Message in mobile originated buffer - int moMsn; //!< MO message sequence number + int moMsn; //!< MO message sequence number int mtFlag; //!< Message in mobile terminated buffer - int mtMsn; //!< MT Message sequence number + int mtMsn; //!< MT Message sequence number } SbdsInfo; typedef struct SbdsxInfo { - SbdsInfo sbdsInfo; //!< Regular SBD status info - int raFlag; //!< Ring alert still needs to be answered - int msgWaiting; //!< Number of MT messages at gateway - //!< (updated every SBD session) + SbdsInfo sbdsInfo; //!< Regular SBD status info + int raFlag; //!< Ring alert still needs to be answered + int msgWaiting; //!< Number of MT messages at gateway + //!< (updated every SBD session) } SbdsxInfo; typedef enum SbdCiev { @@ -101,7 +101,8 @@ typedef struct SbdCallbackList { SbdCievCb ciev; } SbdCallbackList; -SBD_Handle SBD_init(UART_Handle hCom, const SbdCallbackList *cbList, void *cbContext); +SBD_Handle SBD_init(UART_Handle hCom, const SbdCallbackList *cbList, + void *cbContext); bool SBD_sbdix(SBD_Handle handle, SbdixInfo *info_out, bool alert_response); @@ -163,10 +164,10 @@ typedef enum SbdAregMode { bool SBD_sbdareg(SBD_Handle handle, SbdAregMode mode); typedef enum SbdRegStat { - SBD_REG_DETACHED = 0x00, - SBD_REG_NONE = 0x01, - SBD_REG_REGISTERED = 0x02, - SBD_REG_DENIED = 0x03, + SBD_REG_DETACHED = 0x00, + SBD_REG_NONE = 0x01, + SBD_REG_REGISTERED = 0x02, + SBD_REG_DENIED = 0x03, } SbdRegStat; bool SBD_sbdregRead(SBD_Handle handle, SbdRegStat *status_out); diff --git a/firmware/ec/src/drivers/GpioNative.c b/firmware/ec/src/drivers/GpioNative.c index ff89fe3392..601ebbf60b 100644 --- a/firmware/ec/src/drivers/GpioNative.c +++ b/firmware/ec/src/drivers/GpioNative.c @@ -18,15 +18,18 @@ static GateMutex_Handle s_cb_data_mutex; -static int GpioNative_probe(void) { +static int GpioNative_probe(void) +{ //This probe function is just a dummy as we are all ready accessing EC. return OCGPIO_SUCCESS; } -void GpioNative_init(void) { +void GpioNative_init(void) +{ s_cb_data_mutex = GateMutex_create(NULL, NULL); } -static int GpioNative_write(const OcGpio_Pin *pin, bool value) { +static int GpioNative_write(const OcGpio_Pin *pin, bool value) +{ if (pin->hw_cfg & OCGPIO_CFG_INVERT) { value = !value; } @@ -34,7 +37,8 @@ static int GpioNative_write(const OcGpio_Pin *pin, bool value) { return OCGPIO_SUCCESS; } -static int GpioNative_read(const OcGpio_Pin *pin) { +static int GpioNative_read(const OcGpio_Pin *pin) +{ bool value = GPIO_read(pin->idx); if (pin->hw_cfg & OCGPIO_CFG_INVERT) { value = !value; @@ -42,7 +46,8 @@ static int GpioNative_read(const OcGpio_Pin *pin) { return value; } -static int GpioNative_configure(const OcGpio_Pin *pin, uint32_t cfg) { +static int GpioNative_configure(const OcGpio_Pin *pin, uint32_t cfg) +{ /* TODO: translate config values to account for inversion * eg. If inverted, change rising edge trigger to falling edge */ @@ -86,7 +91,8 @@ static int GpioNative_configure(const OcGpio_Pin *pin, uint32_t cfg) { } } else { ti_cfg |= GPIO_CFG_OUTPUT; - ti_cfg |= (hw_cfg.out_cfg << GPIO_CFG_IO_LSB); /* Include od/pu/pd cfg */ + ti_cfg |= + (hw_cfg.out_cfg << GPIO_CFG_IO_LSB); /* Include od/pu/pd cfg */ ti_cfg |= (hw_cfg.out_str << GPIO_CFG_OUT_STRENGTH_LSB); ti_cfg |= (io_cfg.default_val << GPIO_CFG_OUT_BIT); } @@ -113,7 +119,8 @@ static GpioCallbackData *cb_data[120]; /* Wrapper to allow us to map TI-GPIO callback to all our subscribers (with * context passing) */ -static void _nativeCallback(unsigned int idx) { +static void _nativeCallback(unsigned int idx) +{ GpioCallbackData *cbData = cb_data[idx]; while (cbData) { cbData->callback(cbData->pin, cbData->context); @@ -122,8 +129,8 @@ static void _nativeCallback(unsigned int idx) { } static int GpioNative_setCallback(const OcGpio_Pin *pin, - OcGpio_CallbackFn callback, - void *context) { + OcGpio_CallbackFn callback, void *context) +{ /* TODO: we may want to support callback removal at some point */ if (!callback) { return OCGPIO_FAILURE; @@ -160,12 +167,14 @@ static int GpioNative_setCallback(const OcGpio_Pin *pin, /* TODO: what if multiple tasks are sharing a pin and one of them * disables the interrupt? */ -static int GpioNative_disableInt(const OcGpio_Pin *pin) { +static int GpioNative_disableInt(const OcGpio_Pin *pin) +{ GPIO_disableInt(pin->idx); return OCGPIO_SUCCESS; } -static int GpioNative_enableInt(const OcGpio_Pin *pin) { +static int GpioNative_enableInt(const OcGpio_Pin *pin) +{ GPIO_enableInt(pin->idx); return OCGPIO_SUCCESS; } @@ -179,4 +188,3 @@ const OcGpio_FnTable GpioNative_fnTable = { .disableInt = GpioNative_disableInt, .enableInt = GpioNative_enableInt, }; - diff --git a/firmware/ec/src/drivers/GpioPCA9557.c b/firmware/ec/src/drivers/GpioPCA9557.c index 454a1c97e7..fdec43fb01 100644 --- a/firmware/ec/src/drivers/GpioPCA9557.c +++ b/firmware/ec/src/drivers/GpioPCA9557.c @@ -14,7 +14,8 @@ #include "inc/common/global_header.h" #include "inc/devices/pca9557.h" -static int GpioPCA9557_probe(const OcGpio_Port *port) { +static int GpioPCA9557_probe(const OcGpio_Port *port) +{ /* if we are able to read configuration register this means PCA device is accessible*/ const PCA9557_Cfg *pca_cfg = port->cfg; PCA9557_Obj *obj = port->object_data; @@ -24,7 +25,8 @@ static int GpioPCA9557_probe(const OcGpio_Port *port) { return OCGPIO_SUCCESS; } -static int GpioPCA9557_init(const OcGpio_Port *port) { +static int GpioPCA9557_init(const OcGpio_Port *port) +{ const PCA9557_Cfg *pca_cfg = port->cfg; PCA9557_Obj *obj = port->object_data; @@ -40,8 +42,9 @@ static int GpioPCA9557_init(const OcGpio_Port *port) { obj->reg_config = 0xFF; /* Just in case, we'll read the true values */ - if (PCA9557_getOutput(&pca_cfg->i2c_dev, &obj->reg_output) != RETURN_OK || - PCA9557_getPolarity(&pca_cfg->i2c_dev, &obj->reg_polarity) != RETURN_OK || + if (PCA9557_getOutput(&pca_cfg->i2c_dev, &obj->reg_output) != RETURN_OK || + PCA9557_getPolarity(&pca_cfg->i2c_dev, &obj->reg_polarity) != + RETURN_OK || PCA9557_getConfig(&pca_cfg->i2c_dev, &obj->reg_config) != RETURN_OK) { return OCGPIO_FAILURE; } @@ -49,7 +52,8 @@ static int GpioPCA9557_init(const OcGpio_Port *port) { return OCGPIO_SUCCESS; } -static int GpioPCA9557_write(const OcGpio_Pin *pin, bool value) { +static int GpioPCA9557_write(const OcGpio_Pin *pin, bool value) +{ const PCA9557_Cfg *pca_cfg = pin->port->cfg; PCA9557_Obj *obj = pin->port->object_data; int res = OCGPIO_FAILURE; @@ -75,7 +79,8 @@ cleanup: return res; } -static int GpioPCA9557_read(const OcGpio_Pin *pin) { +static int GpioPCA9557_read(const OcGpio_Pin *pin) +{ const PCA9557_Cfg *pca_cfg = pin->port->cfg; PCA9557_Obj *obj = pin->port->object_data; @@ -98,7 +103,8 @@ static int GpioPCA9557_read(const OcGpio_Pin *pin) { return (input_reg >> pin->idx) & 0x01; } -static int GpioPCA9557_configure(const OcGpio_Pin *pin, uint32_t cfg) { +static int GpioPCA9557_configure(const OcGpio_Pin *pin, uint32_t cfg) +{ const PCA9557_Cfg *pca_cfg = pin->port->cfg; PCA9557_Obj *obj = pin->port->object_data; int res = OCGPIO_FAILURE; @@ -140,8 +146,8 @@ cleanup: } static int GpioPCA9557_setCallback(const OcGpio_Pin *pin, - OcGpio_CallbackFn callback, - void *context) { + OcGpio_CallbackFn callback, void *context) +{ UNUSED(pin); UNUSED(callback); UNUSED(context); @@ -149,13 +155,15 @@ static int GpioPCA9557_setCallback(const OcGpio_Pin *pin, return OCGPIO_FAILURE; } -static int GpioPCA9557_disableInt(const OcGpio_Pin *pin) { +static int GpioPCA9557_disableInt(const OcGpio_Pin *pin) +{ UNUSED(pin); LOGGER_ERROR("disableInt not supported by PCA9557 driver\n"); return OCGPIO_FAILURE; } -static int GpioPCA9557_enableInt(const OcGpio_Pin *pin) { +static int GpioPCA9557_enableInt(const OcGpio_Pin *pin) +{ UNUSED(pin); LOGGER_ERROR("enableInt not supported by PCA9557 driver\n"); return OCGPIO_FAILURE; @@ -171,4 +179,3 @@ const OcGpio_FnTable GpioPCA9557_fnTable = { .disableInt = GpioPCA9557_disableInt, .enableInt = GpioPCA9557_enableInt, }; - diff --git a/firmware/ec/src/drivers/GpioSX1509.c b/firmware/ec/src/drivers/GpioSX1509.c index e066e5a948..3f823ad841 100644 --- a/firmware/ec/src/drivers/GpioSX1509.c +++ b/firmware/ec/src/drivers/GpioSX1509.c @@ -18,16 +18,19 @@ #include /* Helper functions to perform bank switching */ -static sx1509RegType GetBank(uint8_t pin_idx) { +static sx1509RegType GetBank(uint8_t pin_idx) +{ return (pin_idx > 7) ? SX1509_REG_B : SX1509_REG_A; } -static uint8_t RelativePinIdx(uint8_t pin_idx) { +static uint8_t RelativePinIdx(uint8_t pin_idx) +{ return (pin_idx > 7) ? (pin_idx - 8) : pin_idx; } /* IRQ handler - reads in triggered interrupts and dispatches */ -static void HandleIRQ(void *context) { +static void HandleIRQ(void *context) +{ const OcGpio_Port *port = context; const SX1509_Cfg *sx_cfg = port->cfg; SX1509_Obj *obj = port->object_data; @@ -55,7 +58,8 @@ static void HandleIRQ(void *context) { } } -static int GpioSX1509_probe(const OcGpio_Port *port) { +static int GpioSX1509_probe(const OcGpio_Port *port) +{ /* if we are able to read configuration register this means PCA device is accessible*/ const SX1509_Cfg *sx_cfg = port->cfg; uint8_t input_reg; @@ -65,7 +69,8 @@ static int GpioSX1509_probe(const OcGpio_Port *port) { return OCGPIO_SUCCESS; } -static int GpioSX1509_init(const OcGpio_Port *port) { +static int GpioSX1509_init(const OcGpio_Port *port) +{ const SX1509_Cfg *sx_cfg = port->cfg; SX1509_Obj *obj = port->object_data; @@ -82,8 +87,7 @@ static int GpioSX1509_init(const OcGpio_Port *port) { memset(obj->cb_data, 0, sizeof(obj->cb_data)); /* Make sure the IC is set to default config */ - if (ioexp_led_software_reset(&sx_cfg->i2c_dev) - != RETURN_OK) { + if (ioexp_led_software_reset(&sx_cfg->i2c_dev) != RETURN_OK) { return OCGPIO_FAILURE; } @@ -100,7 +104,8 @@ static int GpioSX1509_init(const OcGpio_Port *port) { return OCGPIO_SUCCESS; } -static int GpioSX1509_write(const OcGpio_Pin *pin, bool value) { +static int GpioSX1509_write(const OcGpio_Pin *pin, bool value) +{ const SX1509_Cfg *sx_cfg = pin->port->cfg; SX1509_Obj *obj = pin->port->object_data; int res = OCGPIO_FAILURE; @@ -112,10 +117,10 @@ static int GpioSX1509_write(const OcGpio_Pin *pin, bool value) { */ const sx1509RegType bank = GetBank(pin->idx); const uint8_t pin_idx = RelativePinIdx(pin->idx); - const uint8_t new_reg_value = set_bit8(obj->regs[bank].data, - pin_idx, value); - if (ioexp_led_set_data(&sx_cfg->i2c_dev, bank, new_reg_value, 0x00) - != RETURN_OK) { + const uint8_t new_reg_value = + set_bit8(obj->regs[bank].data, pin_idx, value); + if (ioexp_led_set_data(&sx_cfg->i2c_dev, bank, new_reg_value, 0x00) != + RETURN_OK) { goto cleanup; } obj->regs[bank].data = new_reg_value; @@ -126,7 +131,8 @@ cleanup: return res; } -static int GpioSX1509_read(const OcGpio_Pin *pin) { +static int GpioSX1509_read(const OcGpio_Pin *pin) +{ const SX1509_Cfg *sx_cfg = pin->port->cfg; /* We don't need a mutex here since i2c driver protects against @@ -143,16 +149,17 @@ static int GpioSX1509_read(const OcGpio_Pin *pin) { /* TODO: this mapping is pretty gross with the shifts */ static const uint8_t EDGE_SENSE_MAP[] = { - [OCGPIO_CFG_INT_NONE >> OCGPIO_CFG_INT_LSB] = 0x00, /* 00 */ - [OCGPIO_CFG_INT_RISING >> OCGPIO_CFG_INT_LSB] = 0x01, /* 01 */ - [OCGPIO_CFG_INT_FALLING >> OCGPIO_CFG_INT_LSB] = 0x02, /* 10 */ + [OCGPIO_CFG_INT_NONE >> OCGPIO_CFG_INT_LSB] = 0x00, /* 00 */ + [OCGPIO_CFG_INT_RISING >> OCGPIO_CFG_INT_LSB] = 0x01, /* 01 */ + [OCGPIO_CFG_INT_FALLING >> OCGPIO_CFG_INT_LSB] = 0x02, /* 10 */ [OCGPIO_CFG_INT_BOTH_EDGES >> OCGPIO_CFG_INT_LSB] = 0x03, /* 11 */ }; /* TODO: handle things nicely if we get a failure part way through config - * right now we break the rule of the other functions to only store the new * value if the IC accepted the changed value */ -static int GpioSX1509_configure(const OcGpio_Pin *pin, uint32_t cfg) { +static int GpioSX1509_configure(const OcGpio_Pin *pin, uint32_t cfg) +{ const SX1509_Cfg *sx_cfg = pin->port->cfg; SX1509_Obj *obj = pin->port->object_data; int res = OCGPIO_FAILURE; @@ -182,18 +189,16 @@ static int GpioSX1509_configure(const OcGpio_Pin *pin, uint32_t cfg) { /* Enable (1) open drain */ const bool od_en = (pin->hw_cfg & OCGPIO_CFG_OUT_OD_MASK); reg->open_drain = set_bit8(reg->open_drain, pin_idx, od_en); - if (ioexp_led_config_opendrain(&sx_cfg->i2c_dev, - bank, + if (ioexp_led_config_opendrain(&sx_cfg->i2c_dev, bank, reg->open_drain, 0x00) != RETURN_OK) { goto cleanup; } /* Disable (1) the input buffer */ - reg->input_buf_disable = set_bit8(reg->input_buf_disable, pin_idx, - 1); - if (ioexp_led_config_inputbuffer(&sx_cfg->i2c_dev, - bank, + reg->input_buf_disable = + set_bit8(reg->input_buf_disable, pin_idx, 1); + if (ioexp_led_config_inputbuffer(&sx_cfg->i2c_dev, bank, reg->input_buf_disable, 0x00) != RETURN_OK) { goto cleanup; @@ -205,15 +210,14 @@ static int GpioSX1509_configure(const OcGpio_Pin *pin, uint32_t cfg) { /* TODO: this is kind of gross, not sure if it's worth keeping * compatibility with TI-GPIO cfg */ pu_en = ((pin->hw_cfg & OCGPIO_CFG_OUT_OD_MASK) == - OCGPIO_CFG_OUT_OD_PU); + OCGPIO_CFG_OUT_OD_PU); pd_en = ((pin->hw_cfg & OCGPIO_CFG_OUT_OD_MASK) == - OCGPIO_CFG_OUT_OD_PD); + OCGPIO_CFG_OUT_OD_PD); } else { /* Enable (0) the input buffer */ - reg->input_buf_disable = set_bit8(reg->input_buf_disable, pin_idx, - 0); - if (ioexp_led_config_inputbuffer(&sx_cfg->i2c_dev, - bank, + reg->input_buf_disable = + set_bit8(reg->input_buf_disable, pin_idx, 0); + if (ioexp_led_config_inputbuffer(&sx_cfg->i2c_dev, bank, reg->input_buf_disable, 0x00) != RETURN_OK) { goto cleanup; @@ -228,19 +232,19 @@ static int GpioSX1509_configure(const OcGpio_Pin *pin, uint32_t cfg) { switch (bank) { case SX1509_REG_A: if (ioexp_led_config_edge_sense_A( - &sx_cfg->i2c_dev, - SX1509_EDGE_SENSE_REG_LOW_HIGH, - LOBYTE(reg->edge_sense), - HIBYTE(reg->edge_sense)) != RETURN_OK) { + &sx_cfg->i2c_dev, + SX1509_EDGE_SENSE_REG_LOW_HIGH, + LOBYTE(reg->edge_sense), + HIBYTE(reg->edge_sense)) != RETURN_OK) { goto cleanup; } break; case SX1509_REG_B: if (ioexp_led_config_edge_sense_B( - &sx_cfg->i2c_dev, - SX1509_EDGE_SENSE_REG_LOW_HIGH, - LOBYTE(reg->edge_sense), - HIBYTE(reg->edge_sense)) != RETURN_OK) { + &sx_cfg->i2c_dev, + SX1509_EDGE_SENSE_REG_LOW_HIGH, + LOBYTE(reg->edge_sense), + HIBYTE(reg->edge_sense)) != RETURN_OK) { goto cleanup; } break; @@ -250,32 +254,27 @@ static int GpioSX1509_configure(const OcGpio_Pin *pin, uint32_t cfg) { } pu_en = ((pin->hw_cfg & OCGPIO_CFG_IN_PULL_MASK) == - OCGPIO_CFG_IN_PU); + OCGPIO_CFG_IN_PU); pd_en = ((pin->hw_cfg & OCGPIO_CFG_IN_PULL_MASK) == - OCGPIO_CFG_IN_PD); + OCGPIO_CFG_IN_PD); } /* Set pull-up/down registers */ reg->pull_up = set_bit8(reg->pull_up, pin_idx, pu_en); - if (ioexp_led_config_pullup(&sx_cfg->i2c_dev, - bank, - reg->pull_up, + if (ioexp_led_config_pullup(&sx_cfg->i2c_dev, bank, reg->pull_up, 0x00) != RETURN_OK) { goto cleanup; } reg->pull_down = set_bit8(reg->pull_down, pin_idx, pd_en); - if (ioexp_led_config_pulldown(&sx_cfg->i2c_dev, - bank, - reg->pull_down, + if (ioexp_led_config_pulldown(&sx_cfg->i2c_dev, bank, reg->pull_down, 0x00) != RETURN_OK) { goto cleanup; } /* Set pin direction (0 output, 1 input) */ reg->direction = set_bit8(reg->direction, pin_idx, io_cfg.dir); - if (ioexp_led_config_data_direction(&sx_cfg->i2c_dev, - bank, + if (ioexp_led_config_data_direction(&sx_cfg->i2c_dev, bank, reg->direction, 0x00) != RETURN_OK) { goto cleanup; @@ -290,8 +289,8 @@ cleanup: } static int GpioSX1509_setCallback(const OcGpio_Pin *pin, - OcGpio_CallbackFn callback, - void *context) { + OcGpio_CallbackFn callback, void *context) +{ SX1509_Obj *obj = pin->port->object_data; /* TODO: we may want to support callback removal at some point */ @@ -327,7 +326,8 @@ static int GpioSX1509_setCallback(const OcGpio_Pin *pin, return OCGPIO_SUCCESS; } -static int GpioSX1509_disableInt(const OcGpio_Pin *pin) { +static int GpioSX1509_disableInt(const OcGpio_Pin *pin) +{ const SX1509_Cfg *sx_cfg = pin->port->cfg; SX1509_Obj *obj = pin->port->object_data; int res = OCGPIO_FAILURE; @@ -340,9 +340,7 @@ static int GpioSX1509_disableInt(const OcGpio_Pin *pin) { const IArg mutexKey = GateMutex_enter(obj->mutex); { const uint8_t new_reg_value = set_bit8(reg->int_mask, pin_idx, 1); - if (ioexp_led_config_interrupt(&sx_cfg->i2c_dev, - bank, - new_reg_value, + if (ioexp_led_config_interrupt(&sx_cfg->i2c_dev, bank, new_reg_value, 0x00) != RETURN_OK) { goto cleanup; } @@ -354,7 +352,8 @@ cleanup: return res; } -static int GpioSX1509_enableInt(const OcGpio_Pin *pin) { +static int GpioSX1509_enableInt(const OcGpio_Pin *pin) +{ const SX1509_Cfg *sx_cfg = pin->port->cfg; SX1509_Obj *obj = pin->port->object_data; int res = OCGPIO_FAILURE; @@ -367,9 +366,7 @@ static int GpioSX1509_enableInt(const OcGpio_Pin *pin) { const IArg mutexKey = GateMutex_enter(obj->mutex); { const uint8_t new_reg_value = set_bit8(reg->int_mask, pin_idx, 0); - if (ioexp_led_config_interrupt(&sx_cfg->i2c_dev, - bank, - new_reg_value, + if (ioexp_led_config_interrupt(&sx_cfg->i2c_dev, bank, new_reg_value, 0x00) != RETURN_OK) { goto cleanup; } diff --git a/firmware/ec/src/drivers/GpioSX1509.h b/firmware/ec/src/drivers/GpioSX1509.h index 054a476f6e..77ad548769 100644 --- a/firmware/ec/src/drivers/GpioSX1509.h +++ b/firmware/ec/src/drivers/GpioSX1509.h @@ -17,9 +17,9 @@ #include -#define SX1509_NUM_BANKS 2 -#define SX1509_PINS_PER_BANK 8 -#define SX1509_PIN_COUNT (SX1509_NUM_BANKS * SX1509_PINS_PER_BANK) +#define SX1509_NUM_BANKS 2 +#define SX1509_PINS_PER_BANK 8 +#define SX1509_PIN_COUNT (SX1509_NUM_BANKS * SX1509_PINS_PER_BANK) extern const OcGpio_FnTable GpioSX1509_fnTable; diff --git a/firmware/ec/src/drivers/OcGpio.c b/firmware/ec/src/drivers/OcGpio.c index 579f53cd9b..bf338d9d6e 100644 --- a/firmware/ec/src/drivers/OcGpio.c +++ b/firmware/ec/src/drivers/OcGpio.c @@ -7,4 +7,3 @@ * of patent rights can be found in the PATENTS file in the same directory. */ #include "drivers/OcGpio.h" - diff --git a/firmware/ec/src/drivers/OcGpio.h b/firmware/ec/src/drivers/OcGpio.h index 1f881ff7a2..428d73e228 100644 --- a/firmware/ec/src/drivers/OcGpio.h +++ b/firmware/ec/src/drivers/OcGpio.h @@ -19,24 +19,23 @@ typedef struct OcGpio_Pin OcGpio_Pin; typedef struct OcGpio_Port OcGpio_Port; -typedef void (*OcGpio_CallbackFn) (const OcGpio_Pin *pin, void *context); +typedef void (*OcGpio_CallbackFn)(const OcGpio_Pin *pin, void *context); /* Interface virtual function definitions */ -typedef int (*OcGpio_initFn) (const OcGpio_Port *port); -typedef int (*OcGpio_writeFn) (const OcGpio_Pin *pin, bool value); -typedef int (*OcGpio_readFn) (const OcGpio_Pin *pin); -typedef int (*OcGpio_configFn) (const OcGpio_Pin *pin, uint32_t cfg); -typedef int (*OcGpio_setCallbackFn) (const OcGpio_Pin *pin, - OcGpio_CallbackFn callback, - void *context); -typedef int (*OcGpio_disableIntFn) (const OcGpio_Pin *pin); -typedef int (*OcGpio_enableIntFn) (const OcGpio_Pin *pin); +typedef int (*OcGpio_initFn)(const OcGpio_Port *port); +typedef int (*OcGpio_writeFn)(const OcGpio_Pin *pin, bool value); +typedef int (*OcGpio_readFn)(const OcGpio_Pin *pin); +typedef int (*OcGpio_configFn)(const OcGpio_Pin *pin, uint32_t cfg); +typedef int (*OcGpio_setCallbackFn)(const OcGpio_Pin *pin, + OcGpio_CallbackFn callback, void *context); +typedef int (*OcGpio_disableIntFn)(const OcGpio_Pin *pin); +typedef int (*OcGpio_enableIntFn)(const OcGpio_Pin *pin); typedef struct OcGpio_FnTable { - OcGpio_initFn probe; - OcGpio_initFn init; /*!< Port initialization - called once */ - OcGpio_writeFn write; - OcGpio_readFn read; + OcGpio_initFn probe; + OcGpio_initFn init; /*!< Port initialization - called once */ + OcGpio_writeFn write; + OcGpio_readFn read; OcGpio_configFn configure; OcGpio_setCallbackFn setCallback; OcGpio_disableIntFn disableInt; @@ -46,8 +45,8 @@ typedef struct OcGpio_FnTable { /*! A port defines a specific driver instance to route through */ struct OcGpio_Port { const OcGpio_FnTable *fn_table; /*!< virtual table for driver */ - const void *cfg; /*!< driver-specific config settings */ - void *object_data; /*!< driver-specific data (in RAM) */ + const void *cfg; /*!< driver-specific config settings */ + void *object_data; /*!< driver-specific data (in RAM) */ }; /*! A pin provides us with everything we need to route data to the appropriate @@ -56,7 +55,7 @@ struct OcGpio_Port { */ struct OcGpio_Pin { const OcGpio_Port *port; /*!< Pointer to IO driver instance */ - uint16_t idx; /*!< Driver-specific index */ + uint16_t idx; /*!< Driver-specific index */ uint16_t hw_cfg; /*!< Any special attributes for the pin (eg. invert) */ }; @@ -71,39 +70,53 @@ struct OcGpio_Pin { */ typedef union OcGpio_HwCfg { struct { - bool invert:1; - uint16_t in_cfg:3; - uint16_t out_cfg:3; - uint16_t out_str:2; + bool invert : 1; + uint16_t in_cfg : 3; + uint16_t out_cfg : 3; + uint16_t out_str : 2; }; uint16_t uint16; } OcGpio_HwCfg; -#define OCGPIO_CFG_POL_MASK (((uint32_t) 1) << OCGPIO_CFG_POL_LSB) -#define OCGPIO_CFG_IN_PULL_MASK (((uint32_t) 6) << OCGPIO_CFG_IN_LSB) -#define OCGPIO_CFG_OUT_OD_MASK (((uint32_t) 7) << OCGPIO_CFG_OUT_LSB) -#define OCGPIO_CFG_OUT_STR_MASK (((uint32_t) 3) << OCGPIO_CFG_OUT_STR_LSB) +#define OCGPIO_CFG_POL_MASK (((uint32_t)1) << OCGPIO_CFG_POL_LSB) +#define OCGPIO_CFG_IN_PULL_MASK (((uint32_t)6) << OCGPIO_CFG_IN_LSB) +#define OCGPIO_CFG_OUT_OD_MASK (((uint32_t)7) << OCGPIO_CFG_OUT_LSB) +#define OCGPIO_CFG_OUT_STR_MASK (((uint32_t)3) << OCGPIO_CFG_OUT_STR_LSB) -#define OCGPIO_CFG_POL_LSB 0 -#define OCGPIO_CFG_IN_LSB 1 -#define OCGPIO_CFG_OUT_LSB 4 -#define OCGPIO_CFG_OUT_STR_LSB 7 +#define OCGPIO_CFG_POL_LSB 0 +#define OCGPIO_CFG_IN_LSB 1 +#define OCGPIO_CFG_OUT_LSB 4 +#define OCGPIO_CFG_OUT_STR_LSB 7 -#define OCGPIO_CFG_POL_STD (((uint32_t) 0) << OCGPIO_CFG_POL_LSB) /*!< Standard polarity */ -#define OCGPIO_CFG_INVERT (((uint32_t) 1) << OCGPIO_CFG_POL_LSB) /*!< Polarity inverted */ +#define OCGPIO_CFG_POL_STD \ + (((uint32_t)0) << OCGPIO_CFG_POL_LSB) /*!< Standard polarity */ +#define OCGPIO_CFG_INVERT \ + (((uint32_t)1) << OCGPIO_CFG_POL_LSB) /*!< Polarity inverted */ -#define OCGPIO_CFG_IN_NOPULL (((uint32_t) 0) << OCGPIO_CFG_IN_LSB) /*!< Input pin has no PU/PD */ -#define OCGPIO_CFG_IN_PU (((uint32_t) 2) << OCGPIO_CFG_IN_LSB) /*!< Input pin has Pullup */ -#define OCGPIO_CFG_IN_PD (((uint32_t) 4) << OCGPIO_CFG_IN_LSB) /*!< Input pin has Pulldown */ +#define OCGPIO_CFG_IN_NOPULL \ + (((uint32_t)0) << OCGPIO_CFG_IN_LSB) /*!< Input pin has no PU/PD */ +#define OCGPIO_CFG_IN_PU \ + (((uint32_t)2) << OCGPIO_CFG_IN_LSB) /*!< Input pin has Pullup */ +#define OCGPIO_CFG_IN_PD \ + (((uint32_t)4) << OCGPIO_CFG_IN_LSB) /*!< Input pin has Pulldown */ -#define OCGPIO_CFG_OUT_STD (((uint32_t) 0) << OCGPIO_CFG_OUT_LSB) /*!< Output pin is not Open Drain */ -#define OCGPIO_CFG_OUT_OD_NOPULL (((uint32_t) 2) << OCGPIO_CFG_OUT_LSB) /*!< Output pin is Open Drain */ -#define OCGPIO_CFG_OUT_OD_PU (((uint32_t) 4) << OCGPIO_CFG_OUT_LSB) /*!< Output pin is Open Drain w/ pull up */ -#define OCGPIO_CFG_OUT_OD_PD (((uint32_t) 6) << OCGPIO_CFG_OUT_LSB) /*!< Output pin is Open Drain w/ pull dn */ +#define OCGPIO_CFG_OUT_STD \ + (((uint32_t)0) << OCGPIO_CFG_OUT_LSB) /*!< Output pin is not Open Drain */ +#define OCGPIO_CFG_OUT_OD_NOPULL \ + (((uint32_t)2) << OCGPIO_CFG_OUT_LSB) /*!< Output pin is Open Drain */ +#define OCGPIO_CFG_OUT_OD_PU \ + (((uint32_t)4) \ + << OCGPIO_CFG_OUT_LSB) /*!< Output pin is Open Drain w/ pull up */ +#define OCGPIO_CFG_OUT_OD_PD \ + (((uint32_t)6) \ + << OCGPIO_CFG_OUT_LSB) /*!< Output pin is Open Drain w/ pull dn */ -#define OCGPIO_CFG_OUT_STR_LOW (((uint32_t) 0) << OCGPIO_CFG_OUT_STR_LSB) /*!< Low drive strength */ -#define OCGPIO_CFG_OUT_STR_MED (((uint32_t) 1) << OCGPIO_CFG_OUT_STR_LSB) /*!< Medium drive strength */ -#define OCGPIO_CFG_OUT_STR_HIGH (((uint32_t) 2) << OCGPIO_CFG_OUT_STR_LSB) /*!< High drive strength */ +#define OCGPIO_CFG_OUT_STR_LOW \ + (((uint32_t)0) << OCGPIO_CFG_OUT_STR_LSB) /*!< Low drive strength */ +#define OCGPIO_CFG_OUT_STR_MED \ + (((uint32_t)1) << OCGPIO_CFG_OUT_STR_LSB) /*!< Medium drive strength */ +#define OCGPIO_CFG_OUT_STR_HIGH \ + (((uint32_t)2) << OCGPIO_CFG_OUT_STR_LSB) /*!< High drive strength */ /* * OC GPIO I/O configuration settings - these are to be used by drivers that @@ -114,9 +127,9 @@ typedef union OcGpio_HwCfg { */ typedef union OcGpio_ioCfg { struct { - uint32_t dir:1; - uint32_t default_val:1; - uint32_t int_cfg:3; + uint32_t dir : 1; + uint32_t default_val : 1; + uint32_t int_cfg : 3; }; uint32_t uint32; } OcGpio_ioCfg; @@ -125,18 +138,28 @@ typedef union OcGpio_ioCfg { #define OCGPIO_CFG_OUT_BIT 1 #define OCGPIO_CFG_INT_LSB 2 -#define OCGPIO_CFG_OUTPUT (((uint32_t) 0) << OCGPIO_CFG_DIR_BIT) /*!< Pin is an output. */ -#define OCGPIO_CFG_INPUT (((uint32_t) 1) << OCGPIO_CFG_DIR_BIT) /*!< Pin is an input. */ +#define OCGPIO_CFG_OUTPUT \ + (((uint32_t)0) << OCGPIO_CFG_DIR_BIT) /*!< Pin is an output. */ +#define OCGPIO_CFG_INPUT \ + (((uint32_t)1) << OCGPIO_CFG_DIR_BIT) /*!< Pin is an input. */ -#define OCGPIO_CFG_OUT_LOW (((uint32_t) 0) << OCGPIO_CFG_OUT_BIT) /*!< Output low by default */ -#define OCGPIO_CFG_OUT_HIGH (((uint32_t) 1) << OCGPIO_CFG_OUT_BIT) /*!< Output high by default */ +#define OCGPIO_CFG_OUT_LOW \ + (((uint32_t)0) << OCGPIO_CFG_OUT_BIT) /*!< Output low by default */ +#define OCGPIO_CFG_OUT_HIGH \ + (((uint32_t)1) << OCGPIO_CFG_OUT_BIT) /*!< Output high by default */ -#define OCGPIO_CFG_INT_NONE (((uint32_t) 0) << OCGPIO_CFG_INT_LSB) /*!< No Interrupt */ -#define OCGPIO_CFG_INT_FALLING (((uint32_t) 1) << OCGPIO_CFG_INT_LSB) /*!< Interrupt on falling edge */ -#define OCGPIO_CFG_INT_RISING (((uint32_t) 2) << OCGPIO_CFG_INT_LSB) /*!< Interrupt on rising edge */ -#define OCGPIO_CFG_INT_BOTH_EDGES (((uint32_t) 3) << OCGPIO_CFG_INT_LSB) /*!< Interrupt on both edges */ -#define OCGPIO_CFG_INT_LOW (((uint32_t) 4) << OCGPIO_CFG_INT_LSB) /*!< Interrupt on low level */ -#define OCGPIO_CFG_INT_HIGH (((uint32_t) 5) << OCGPIO_CFG_INT_LSB) /*!< Interrupt on high level */ +#define OCGPIO_CFG_INT_NONE \ + (((uint32_t)0) << OCGPIO_CFG_INT_LSB) /*!< No Interrupt */ +#define OCGPIO_CFG_INT_FALLING \ + (((uint32_t)1) << OCGPIO_CFG_INT_LSB) /*!< Interrupt on falling edge */ +#define OCGPIO_CFG_INT_RISING \ + (((uint32_t)2) << OCGPIO_CFG_INT_LSB) /*!< Interrupt on rising edge */ +#define OCGPIO_CFG_INT_BOTH_EDGES \ + (((uint32_t)3) << OCGPIO_CFG_INT_LSB) /*!< Interrupt on both edges */ +#define OCGPIO_CFG_INT_LOW \ + (((uint32_t)4) << OCGPIO_CFG_INT_LSB) /*!< Interrupt on low level */ +#define OCGPIO_CFG_INT_HIGH \ + (((uint32_t)5) << OCGPIO_CFG_INT_LSB) /*!< Interrupt on high level */ /* Wrapper functions to dispatch call to appropriate v-table * ================================================================== @@ -153,8 +176,9 @@ typedef union OcGpio_ioCfg { * @param pin OcGPio_Port pointer to the driver instance to find the device * @return 0 on success, negative on failure */ -static inline int OcGpio_probe(const OcGpio_Port *port) { - if( port && port->fn_table && port->fn_table->probe) { +static inline int OcGpio_probe(const OcGpio_Port *port) +{ + if (port && port->fn_table && port->fn_table->probe) { return port->fn_table->probe(port); } else { return OCGPIO_FAILURE; @@ -166,8 +190,9 @@ static inline int OcGpio_probe(const OcGpio_Port *port) { * @param pin OcGPio_Port pointer to the driver instance to initialize * @return 0 on success, negative on failure */ -static inline int OcGpio_init(const OcGpio_Port *port) { - if( port && port->fn_table && port->fn_table->init) { +static inline int OcGpio_init(const OcGpio_Port *port) +{ + if (port && port->fn_table && port->fn_table->init) { return port->fn_table->init(port); } else { return OCGPIO_FAILURE; @@ -179,9 +204,9 @@ static inline int OcGpio_init(const OcGpio_Port *port) { * @param value Boolean value to write to the pin * @return 0 on success, negative on failure */ -static inline int OcGpio_write(const OcGpio_Pin *pin, bool value) { - if( pin && pin->port && pin->port->fn_table && - pin->port->fn_table->write) { +static inline int OcGpio_write(const OcGpio_Pin *pin, bool value) +{ + if (pin && pin->port && pin->port->fn_table && pin->port->fn_table->write) { return pin->port->fn_table->write(pin, value); } else { return OCGPIO_FAILURE; @@ -192,9 +217,9 @@ static inline int OcGpio_write(const OcGpio_Pin *pin, bool value) { * @param pin OcGPio_Pin pointer for the pin to read * @return Boolean value of pin, or negative if failure */ -static inline int OcGpio_read(const OcGpio_Pin *pin) { - if( pin && pin->port && pin->port->fn_table && - pin->port->fn_table->read) { +static inline int OcGpio_read(const OcGpio_Pin *pin) +{ + if (pin && pin->port && pin->port->fn_table && pin->port->fn_table->read) { return pin->port->fn_table->read(pin); } else { return OCGPIO_FAILURE; @@ -207,9 +232,10 @@ static inline int OcGpio_read(const OcGpio_Pin *pin) { * @param cfg Bitfield of OCGPIO_CFG io values (direction, interrupt edge) * @return 0 on success, negative on failure */ -static inline int OcGpio_configure(const OcGpio_Pin *pin, uint32_t cfg) { - if( pin && pin->port && pin->port->fn_table && - pin->port->fn_table->configure) { +static inline int OcGpio_configure(const OcGpio_Pin *pin, uint32_t cfg) +{ + if (pin && pin->port && pin->port->fn_table && + pin->port->fn_table->configure) { return pin->port->fn_table->configure(pin, cfg); } else { return OCGPIO_FAILURE; @@ -223,11 +249,11 @@ static inline int OcGpio_configure(const OcGpio_Pin *pin, uint32_t cfg) { * @param context Context pointer that is passed to callback function * @return 0 on success, negative on failure */ -static inline int OcGpio_setCallback (const OcGpio_Pin *pin, - OcGpio_CallbackFn callback, - void *context) { - if( pin && pin->port && pin->port->fn_table && - pin->port->fn_table->setCallback) { +static inline int OcGpio_setCallback(const OcGpio_Pin *pin, + OcGpio_CallbackFn callback, void *context) +{ + if (pin && pin->port && pin->port->fn_table && + pin->port->fn_table->setCallback) { return pin->port->fn_table->setCallback(pin, callback, context); } else { return OCGPIO_FAILURE; @@ -238,9 +264,10 @@ static inline int OcGpio_setCallback (const OcGpio_Pin *pin, * @param pin OcGPio_Pin pointer for the pin to disable the interrupt on * @return 0 on success, negative on failure */ -static inline int OcGpio_disableInt(const OcGpio_Pin *pin) { - if( pin && pin->port && pin->port->fn_table && - pin->port->fn_table->disableInt) { +static inline int OcGpio_disableInt(const OcGpio_Pin *pin) +{ + if (pin && pin->port && pin->port->fn_table && + pin->port->fn_table->disableInt) { return pin->port->fn_table->disableInt(pin); } else { return OCGPIO_FAILURE; @@ -253,9 +280,10 @@ static inline int OcGpio_disableInt(const OcGpio_Pin *pin) { * @param pin OcGPio_Pin pointer for the pin to enable the interrupt on * @return 0 on success, negative on failure */ -static inline int OcGpio_enableInt(const OcGpio_Pin *pin) { - if( pin && pin->port && pin->port->fn_table && - pin->port->fn_table->enableInt) { +static inline int OcGpio_enableInt(const OcGpio_Pin *pin) +{ + if (pin && pin->port && pin->port->fn_table && + pin->port->fn_table->enableInt) { return pin->port->fn_table->enableInt(pin); } else { return OCGPIO_FAILURE; diff --git a/firmware/ec/src/drivers/PinGroup.c b/firmware/ec/src/drivers/PinGroup.c index 0de4f7c5e9..829662be56 100644 --- a/firmware/ec/src/drivers/PinGroup.c +++ b/firmware/ec/src/drivers/PinGroup.c @@ -27,7 +27,7 @@ ReturnStatus PinGroup_write(const PinGroup *group, uint8_t value) if (group->pins[i].port) { /* FIXME: There isn't a great way to gracefully handle failure */ if (OcGpio_write(&group->pins[i], (value >> i) & 0x01) != - OCGPIO_SUCCESS) { + OCGPIO_SUCCESS) { return RETURN_NOTOK; } } diff --git a/firmware/ec/src/drivers/PinGroup.h b/firmware/ec/src/drivers/PinGroup.h index 10155ddf23..080bb8f1b4 100644 --- a/firmware/ec/src/drivers/PinGroup.h +++ b/firmware/ec/src/drivers/PinGroup.h @@ -19,8 +19,8 @@ #include "OcGpio.h" typedef struct PinGroup { - int num_pin; - const OcGpio_Pin *pins; + int num_pin; + const OcGpio_Pin *pins; } PinGroup; /*! Configure a group of OC-GPIO Pins diff --git a/firmware/ec/src/drivers/mdio_bb.c b/firmware/ec/src/drivers/mdio_bb.c index 0a8cecf52f..44baeca1d0 100644 --- a/firmware/ec/src/drivers/mdio_bb.c +++ b/firmware/ec/src/drivers/mdio_bb.c @@ -17,16 +17,16 @@ #include #include -#define MDIO_READ 2 -#define MDIO_WRITE 1 +#define MDIO_READ 2 +#define MDIO_WRITE 1 #define MDIO_SETUP_TIME 10 -#define MDIO_HOLD_TIME 10 +#define MDIO_HOLD_TIME 10 /* Minimum MDC period is 400 ns, plus some margin for error. MDIO_DELAY * is done twice per period. */ -#define MDIO_DELAY 40 +#define MDIO_DELAY 40 /* The PHY may take up to 300 ns to produce data, plus some margin * for error. @@ -190,8 +190,8 @@ void mdiobb_write_by_paging(int smi_device, int reg_addr, int data) mdiobb_write(0x7, 0x19, data); - write_reg = (0x1 << 15) | (0x1 << 12) | (0x1 << 10) | (smi_device << 5) - | reg_addr; + write_reg = (0x1 << 15) | (0x1 << 12) | (0x1 << 10) | (smi_device << 5) | + reg_addr; mdiobb_write(0x7, 0x18, write_reg); do { @@ -215,8 +215,8 @@ int mdiobb_read_by_paging(int smi_device, int reg_addr) break; } while (1); - write_reg = (1 << 15) | (1 << 12) | (0x2 << 10) | (smi_device << 5) - | reg_addr; + write_reg = + (1 << 15) | (1 << 12) | (0x2 << 10) | (smi_device << 5) | reg_addr; mdiobb_write(0x7, 0x18, write_reg); /* @@ -233,9 +233,8 @@ int mdiobb_read_by_paging(int smi_device, int reg_addr) } /* Try to write directly using 0x18 and 0x19 registers */ -void mdiobb_write_by_paging_c45( int smi_device, - unsigned int reg_addr, - unsigned int data) +void mdiobb_write_by_paging_c45(int smi_device, unsigned int reg_addr, + unsigned int data) { unsigned int read_val = 0xf00f; unsigned int write_reg = 0; @@ -313,7 +312,6 @@ void mdiobb_write_by_paging_c45( int smi_device, if (!(read_val & (1 << 15))) break; } while (1); - } /* try to read the C45 registers using 13 and 14 registers */ @@ -422,8 +420,8 @@ void mdiobb_set_bits(int smi_device, int reg_addr, int datamask) mdiobb_write(0x7, 0x19, datamask); - write_reg = (0x1 << 15) | (0x1 << 12) | (0x1 << 10) | (smi_device << 5) - | reg_addr; + write_reg = (0x1 << 15) | (0x1 << 12) | (0x1 << 10) | (smi_device << 5) | + reg_addr; mdiobb_write(0x7, 0x18, write_reg); do { @@ -455,8 +453,8 @@ void mdiobb_clear_bits(int smi_device, int reg_addr, int datamask) mdiobb_write(0x7, 0x19, datamask); - write_reg = (0x1 << 15) | (0x1 << 12) | (0x1 << 10) | (smi_device << 5) - | reg_addr; + write_reg = (0x1 << 15) | (0x1 << 12) | (0x1 << 10) | (smi_device << 5) | + reg_addr; mdiobb_write(0x7, 0x18, write_reg); do { @@ -466,9 +464,8 @@ void mdiobb_clear_bits(int smi_device, int reg_addr, int datamask) } while (1); } -void mdiobb_set_bits_C45( int smi_device, - unsigned int reg_addr, - unsigned int datamask) +void mdiobb_set_bits_C45(int smi_device, unsigned int reg_addr, + unsigned int datamask) { int read_val = 0; @@ -482,9 +479,8 @@ void mdiobb_set_bits_C45( int smi_device, mdiobb_write_by_paging_c45(smi_device, reg_addr, datamask); } -void mdiobb_clear_bits_C45( int smi_device, - unsigned int reg_addr, - unsigned int datamask) +void mdiobb_clear_bits_C45(int smi_device, unsigned int reg_addr, + unsigned int datamask) { int read_val = 0; @@ -524,6 +520,6 @@ void prepare_mdio(void) */ TimerConfigure(TIMER0_BASE, TIMER_CFG_ONE_SHOT); delay = 0x700000; - while (delay--) - ; + while (delay--) + ; } diff --git a/firmware/ec/src/helpers/attribute.h b/firmware/ec/src/helpers/attribute.h index 380ce47aee..acaa53237e 100644 --- a/firmware/ec/src/helpers/attribute.h +++ b/firmware/ec/src/helpers/attribute.h @@ -11,7 +11,7 @@ #ifndef HELPERS_ATTRIBUTE_H_ #define HELPERS_ATTRIBUTE_H_ -#define PACKED __attribute__ ((__packed__)) +#define PACKED __attribute__((__packed__)) #define UNUSED(x) (void)(x) diff --git a/firmware/ec/src/helpers/i2c.c b/firmware/ec/src/helpers/i2c.c index c57d86bd06..65b4ec0049 100644 --- a/firmware/ec/src/helpers/i2c.c +++ b/firmware/ec/src/helpers/i2c.c @@ -14,9 +14,11 @@ typedef struct I2C_Message { } I2C_Message; bool I2C_write(I2C_Handle handle, uint8_t reg, unsigned char slaveAddress, - const void *buffer, size_t size) { + const void *buffer, size_t size) +{ const size_t msg_size = sizeof(I2C_Message) + size; - uint8_t data[msg_size]; // TODO: should probably use malloc instead of using stack + uint8_t data + [msg_size]; // TODO: should probably use malloc instead of using stack I2C_Message *msg = (I2C_Message *)data; msg->subAddr = reg; memcpy(&msg->data, buffer, size); @@ -31,7 +33,8 @@ bool I2C_write(I2C_Handle handle, uint8_t reg, unsigned char slaveAddress, } bool I2C_read(I2C_Handle handle, uint8_t reg, unsigned char slaveAddress, - void *buffer, size_t size) { + void *buffer, size_t size) +{ I2C_Transaction i2cTransaction; i2cTransaction.slaveAddress = slaveAddress; i2cTransaction.writeBuf = ® @@ -41,4 +44,3 @@ bool I2C_read(I2C_Handle handle, uint8_t reg, unsigned char slaveAddress, return I2C_transfer(handle, &i2cTransaction); } - diff --git a/firmware/ec/src/helpers/memory.c b/firmware/ec/src/helpers/memory.c index 20260a96d8..4fc54e0cc2 100644 --- a/firmware/ec/src/helpers/memory.c +++ b/firmware/ec/src/helpers/memory.c @@ -10,20 +10,22 @@ #include "inc/common/global_header.h" -void printMemory(const void *start, size_t size) { +void printMemory(const void *start, size_t size) +{ for (size_t i = 0; i < size; ++i) { DEBUG("0x%02x ", ((uint8_t *)start)[i]); - if ((i+1) % 8 == 0) { + if ((i + 1) % 8 == 0) { DEBUG("\n"); - } else if ((i+1) % 4 == 0) { + } else if ((i + 1) % 4 == 0) { DEBUG(" "); } } DEBUG("\n"); } -uint8_t set_bit8(uint8_t byte, uint8_t bit, bool value) { +uint8_t set_bit8(uint8_t byte, uint8_t bit, bool value) +{ const uint8_t mask = 1 << bit; if (value) { byte |= mask; diff --git a/firmware/ec/src/helpers/memory.h b/firmware/ec/src/helpers/memory.h index a24c30e312..056586e7f4 100644 --- a/firmware/ec/src/helpers/memory.h +++ b/firmware/ec/src/helpers/memory.h @@ -16,19 +16,19 @@ #include #ifndef HIWORD - #define HIWORD(x) ((uint16_t)((x) >> 16)) +#define HIWORD(x) ((uint16_t)((x) >> 16)) #endif #ifndef LOWORD - #define LOWORD(x) ((uint16_t)(x)) +#define LOWORD(x) ((uint16_t)(x)) #endif #ifndef HIBYTE - #define HIBYTE(x) ((uint8_t)((x) >> 8)) +#define HIBYTE(x) ((uint8_t)((x) >> 8)) #endif #ifndef LOBYTE - #define LOBYTE(x) ((uint8_t)(x)) +#define LOBYTE(x) ((uint8_t)(x)) #endif #define zalloc(size) calloc((size), 1) diff --git a/firmware/ec/src/helpers/uart.c b/firmware/ec/src/helpers/uart.c index d1d0f32a6e..71f69dd70e 100644 --- a/firmware/ec/src/helpers/uart.c +++ b/firmware/ec/src/helpers/uart.c @@ -12,10 +12,12 @@ #include -void UART_flush(UART_Handle handle) { +void UART_flush(UART_Handle handle) +{ int rxCount; - while ((UART_control(handle, UART_CMD_GETRXCOUNT, &rxCount) - == UART_STATUS_SUCCESS) && rxCount) { + while ((UART_control(handle, UART_CMD_GETRXCOUNT, &rxCount) == + UART_STATUS_SUCCESS) && + rxCount) { char buf[20]; UART_read(handle, buf, MIN(rxCount, sizeof(buf))); Task_sleep(1); // Small delay so more data can come in diff --git a/firmware/ec/src/interfaces/Ethernet/tcp_tx_rx.c b/firmware/ec/src/interfaces/Ethernet/tcp_tx_rx.c index cf4bce485c..e7363864e7 100644 --- a/firmware/ec/src/interfaces/Ethernet/tcp_tx_rx.c +++ b/firmware/ec/src/interfaces/Ethernet/tcp_tx_rx.c @@ -32,10 +32,10 @@ #include #include -#define TCPPORT 1000 +#define TCPPORT 1000 #define TCPHANDLERSTACK 1024 -#define TCPPACKETSIZE OCMP_FRAME_TOTAL_LENGTH -#define NUMTCPWORKERS 3 +#define TCPPACKETSIZE OCMP_FRAME_TOTAL_LENGTH +#define NUMTCPWORKERS 3 Semaphore_Handle ethTxsem; Semaphore_Handle ethRxsem; @@ -58,7 +58,7 @@ Void tcpHandler(UArg arg0, UArg arg1); */ Void tcp_Tx_Worker(UArg arg0, UArg arg1) { - int clientfd = (int) arg0; + int clientfd = (int)arg0; int bytesSent; uint8_t *buffer; @@ -85,12 +85,12 @@ Void tcp_Tx_Worker(UArg arg0, UArg arg1) */ Void tcp_Rx_Worker(UArg arg0, UArg arg1) { - int clientfd = (int) arg0; + int clientfd = (int)arg0; char buffer[TCPPACKETSIZE]; LOGGER_DEBUG("tcpWorker: start clientfd = 0x%x\n", clientfd); while ((bytesRcvd = recv(clientfd, buffer, TCPPACKETSIZE, 0)) > 0) { - Util_enqueueMsg(gossiperRxMsgQueue, semGossiperMsg, (uint8_t *) buffer); + Util_enqueueMsg(gossiperRxMsgQueue, semGossiperMsg, (uint8_t *)buffer); } LOGGER_DEBUG("tcpWorker stop clientfd = 0x%x\n", clientfd); @@ -101,7 +101,8 @@ Void tcp_Rx_Worker(UArg arg0, UArg arg1) #include "utils/swupdate.h" #include #include -static void sw_update_cb(void) { +static void sw_update_cb(void) +{ /* Gate whole system, start update */ /* Note: Types_FreqHz contains a hi and lo 32 bit int, not sure why, * but we should only have to worry about the low bits @@ -130,18 +131,19 @@ Void tcpHandler_client(UArg arg0, UArg arg1) LOGGER_DEBUG("tcpHandler: socket failed\n"); Task_exit(); return; - }else { + } else { LOGGER_DEBUG(" %d socket success\n", fdError()); } System_flush(); memset((char *)&sLocalAddr, 0, sizeof(sLocalAddr)); - LOGGER_DEBUG(" Ip in client: %s\n",destIp); + LOGGER_DEBUG(" Ip in client: %s\n", destIp); sLocalAddr.sin_family = AF_INET; sLocalAddr.sin_addr.s_addr = inet_addr(destIp); sLocalAddr.sin_port = htons(arg0); - while(connect(lSocket, (struct sockaddr *)&sLocalAddr, sizeof(sLocalAddr)) < 0){ - SysCtlDelay(g_ui32SysClock/100/3); + while (connect(lSocket, (struct sockaddr *)&sLocalAddr, + sizeof(sLocalAddr)) < 0) { + SysCtlDelay(g_ui32SysClock / 100 / 3); } System_flush(); /* Test pattern to be sent across the TCP connection to external server */ @@ -149,13 +151,13 @@ Void tcpHandler_client(UArg arg0, UArg arg1) int nbytes = 14; /* Test Pattern length */ while (numRepeat > 0) { - send(lSocket, (char *)buffer, nbytes, 0 ); + send(lSocket, (char *)buffer, nbytes, 0); Task_sleep(500); numRepeat--; System_flush(); } if (lSocket > 0) - close(lSocket); + close(lSocket); fdCloseSession(TaskSelf()); } @@ -190,7 +192,7 @@ Void tcpHandler(UArg arg0, UArg arg1) localAddr.sin_addr.s_addr = htonl(INADDR_ANY); localAddr.sin_port = htons(arg0); - status = bind(server, (struct sockaddr *) &localAddr, sizeof(localAddr)); + status = bind(server, (struct sockaddr *)&localAddr, sizeof(localAddr)); if (status == -1) { LOGGER_DEBUG("Error: bind failed.\n"); goto shutdown; @@ -208,9 +210,8 @@ Void tcpHandler(UArg arg0, UArg arg1) goto shutdown; } - while ((clientfd = accept(server, (struct sockaddr *) &clientAddr, &addrlen)) - != -1) { - + while ((clientfd = accept(server, (struct sockaddr *)&clientAddr, + &addrlen)) != -1) { LOGGER_DEBUG("tcpHandler: Creating thread clientfd = %d\n", clientfd); /* Init the Error_Block */ @@ -218,10 +219,10 @@ Void tcpHandler(UArg arg0, UArg arg1) /* Initialize the defaults and set the parameters. */ Task_Params_init(&task_Tx_Params); - task_Tx_Params.arg0 = (UArg) clientfd; + task_Tx_Params.arg0 = (UArg)clientfd; task_Tx_Params.stackSize = 1280; - task_Tx_Handle = Task_create((Task_FuncPtr) tcp_Tx_Worker, - &task_Tx_Params, &eb); + task_Tx_Handle = + Task_create((Task_FuncPtr)tcp_Tx_Worker, &task_Tx_Params, &eb); if (task_Tx_Handle == NULL) { LOGGER_DEBUG("Error: Failed to create new Task\n"); close(clientfd); @@ -229,10 +230,10 @@ Void tcpHandler(UArg arg0, UArg arg1) /* Initialize the defaults and set the parameters. */ Task_Params_init(&task_Rx_Params); - task_Rx_Params.arg0 = (UArg) clientfd; + task_Rx_Params.arg0 = (UArg)clientfd; task_Rx_Params.stackSize = 1280; - task_Rx_Handle = Task_create((Task_FuncPtr) tcp_Rx_Worker, - &task_Rx_Params, &eb); + task_Rx_Handle = + Task_create((Task_FuncPtr)tcp_Rx_Worker, &task_Rx_Params, &eb); if (task_Rx_Handle == NULL) { LOGGER_DEBUG("Error: Failed to create new Task\n"); close(clientfd); @@ -244,7 +245,8 @@ Void tcpHandler(UArg arg0, UArg arg1) LOGGER_DEBUG("Error: accept failed.\n"); - shutdown: if (server > 0) { +shutdown: + if (server > 0) { close(server); } } @@ -306,7 +308,7 @@ void netOpenHook() taskParams.stackSize = TCPHANDLERSTACK; taskParams.priority = 1; taskParams.arg0 = TCPPORT; - taskHandle = Task_create((Task_FuncPtr) tcpHandler, &taskParams, &eb); + taskHandle = Task_create((Task_FuncPtr)tcpHandler, &taskParams, &eb); if (taskHandle == NULL) { LOGGER_DEBUG("netOpenHook: Failed to create tcpHandler Task\n"); } diff --git a/firmware/ec/src/interfaces/UART/uartdma.c b/firmware/ec/src/interfaces/UART/uartdma.c index 872b88f74c..45e7596f62 100644 --- a/firmware/ec/src/interfaces/UART/uartdma.c +++ b/firmware/ec/src/interfaces/UART/uartdma.c @@ -105,26 +105,24 @@ void UART4IntHandler(void) /*Primary Buffer*/ ui32Mode = uDMAChannelModeGet(UDMA_CHANNEL_TMR0A | UDMA_PRI_SELECT); if (ui32Mode == UDMA_MODE_STOP) { - uDMAChannelTransferSet(UDMA_CHANNEL_TMR0A | UDMA_PRI_SELECT, - UDMA_MODE_PINGPONG, - (void *)(UART4_BASE + UART_O_DR), - ui8RxBufA, sizeof(ui8RxBufA)); + uDMAChannelTransferSet( + UDMA_CHANNEL_TMR0A | UDMA_PRI_SELECT, UDMA_MODE_PINGPONG, + (void *)(UART4_BASE + UART_O_DR), ui8RxBufA, sizeof(ui8RxBufA)); /*Preparing message to send to UART RX Queue*/ - memset(ui8uartdmaRxBuf,'\0',UART_RXBUF_SIZE); - memcpy(ui8uartdmaRxBuf,ui8RxBufA,sizeof(ui8RxBufA)); + memset(ui8uartdmaRxBuf, '\0', UART_RXBUF_SIZE); + memcpy(ui8uartdmaRxBuf, ui8RxBufA, sizeof(ui8RxBufA)); Semaphore_post(semUART); } /*Alternate Buffer*/ ui32Mode = uDMAChannelModeGet(UDMA_CHANNEL_TMR0A | UDMA_ALT_SELECT); - if(ui32Mode == UDMA_MODE_STOP) { - uDMAChannelTransferSet(UDMA_CHANNEL_TMR0A | UDMA_ALT_SELECT, - UDMA_MODE_PINGPONG, - (void *)(UART4_BASE + UART_O_DR), - ui8RxBufB, sizeof(ui8RxBufB)); + if (ui32Mode == UDMA_MODE_STOP) { + uDMAChannelTransferSet( + UDMA_CHANNEL_TMR0A | UDMA_ALT_SELECT, UDMA_MODE_PINGPONG, + (void *)(UART4_BASE + UART_O_DR), ui8RxBufB, sizeof(ui8RxBufB)); /*Preparing message to send to UART RX Queue*/ - memset(ui8uartdmaRxBuf,'\0',UART_RXBUF_SIZE); - memcpy(ui8uartdmaRxBuf,ui8RxBufB,sizeof(ui8RxBufB)); + memset(ui8uartdmaRxBuf, '\0', UART_RXBUF_SIZE); + memcpy(ui8uartdmaRxBuf, ui8RxBufB, sizeof(ui8RxBufB)); Semaphore_post(semUART); } } @@ -149,7 +147,8 @@ void resetUARTDMA(void) *****************************************************************************/ void ConfigureUART(void) { - LOGGER_DEBUG("UARTDMACTR:INFO::Configuring UART interface for communication.\n"); + LOGGER_DEBUG( + "UARTDMACTR:INFO::Configuring UART interface for communication.\n"); /* Enable the GPIO Peripheral used by the UART.*/ SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOK); @@ -170,7 +169,8 @@ void ConfigureUART(void) *****************************************************************************/ void InitUART4Transfer(void) { - LOGGER_DEBUG("UARTDMACTR:INFO::Configuring UART interrupt and uDMA channel for communication to GPP.\n"); + LOGGER_DEBUG( + "UARTDMACTR:INFO::Configuring UART interrupt and uDMA channel for communication to GPP.\n"); uint_fast16_t ui16Idx; const uint32_t SysClock = 120000000; @@ -187,8 +187,8 @@ void InitUART4Transfer(void) /* Configure the UART communication parameters.*/ UARTConfigSetExpClk(UART4_BASE, SysClock, 115200, - UART_CONFIG_WLEN_8 | UART_CONFIG_STOP_ONE | - UART_CONFIG_PAR_NONE); + UART_CONFIG_WLEN_8 | UART_CONFIG_STOP_ONE | + UART_CONFIG_PAR_NONE); /* Set both the TX and RX trigger thresholds to 4. */ UARTFIFOLevelSet(UART4_BASE, UART_FIFO_TX4_8, UART_FIFO_RX4_8); @@ -198,40 +198,40 @@ void InitUART4Transfer(void) UARTEnable(UART4_BASE); UARTDMAEnable(UART4_BASE, UART_DMA_RX | UART_DMA_TX); - uDMAChannelAttributeDisable(UDMA_CHANNEL_TMR0A, UDMA_ATTR_ALTSELECT - | UDMA_ATTR_USEBURST | UDMA_ATTR_HIGH_PRIORITY - | UDMA_ATTR_REQMASK); + uDMAChannelAttributeDisable(UDMA_CHANNEL_TMR0A, + UDMA_ATTR_ALTSELECT | UDMA_ATTR_USEBURST | + UDMA_ATTR_HIGH_PRIORITY | + UDMA_ATTR_REQMASK); uDMAChannelControlSet(UDMA_CHANNEL_TMR0A | UDMA_PRI_SELECT, - UDMA_SIZE_8 | UDMA_SRC_INC_NONE | UDMA_DST_INC_8 | - UDMA_ARB_4); + UDMA_SIZE_8 | UDMA_SRC_INC_NONE | UDMA_DST_INC_8 | + UDMA_ARB_4); uDMAChannelControlSet(UDMA_CHANNEL_TMR0A | UDMA_ALT_SELECT, - UDMA_SIZE_8 | UDMA_SRC_INC_NONE | UDMA_DST_INC_8 | - UDMA_ARB_4); + UDMA_SIZE_8 | UDMA_SRC_INC_NONE | UDMA_DST_INC_8 | + UDMA_ARB_4); uDMAChannelTransferSet(UDMA_CHANNEL_TMR0A | UDMA_PRI_SELECT, - UDMA_MODE_PINGPONG, - (void *)(UART4_BASE + UART_O_DR), - ui8RxBufA, sizeof(ui8RxBufA)); + UDMA_MODE_PINGPONG, (void *)(UART4_BASE + UART_O_DR), + ui8RxBufA, sizeof(ui8RxBufA)); uDMAChannelTransferSet(UDMA_CHANNEL_TMR0A | UDMA_ALT_SELECT, - UDMA_MODE_PINGPONG, - (void *)(UART4_BASE + UART_O_DR), - ui8RxBufB, sizeof(ui8RxBufB)); + UDMA_MODE_PINGPONG, (void *)(UART4_BASE + UART_O_DR), + ui8RxBufB, sizeof(ui8RxBufB)); uDMAChannelAttributeDisable(UDMA_CHANNEL_TMR0B, - UDMA_ATTR_ALTSELECT | UDMA_ATTR_HIGH_PRIORITY | UDMA_ATTR_REQMASK); + UDMA_ATTR_ALTSELECT | UDMA_ATTR_HIGH_PRIORITY | + UDMA_ATTR_REQMASK); uDMAChannelAttributeEnable(UDMA_CHANNEL_TMR0B, UDMA_ATTR_USEBURST); uDMAChannelControlSet(UDMA_CHANNEL_TMR0B | UDMA_PRI_SELECT, - UDMA_SIZE_8 | UDMA_SRC_INC_8 | UDMA_DST_INC_NONE | UDMA_ARB_4); + UDMA_SIZE_8 | UDMA_SRC_INC_8 | UDMA_DST_INC_NONE | + UDMA_ARB_4); uDMAChannelTransferSet(UDMA_CHANNEL_TMR0B | UDMA_PRI_SELECT, - UDMA_MODE_BASIC, ui8TxBuf, - (void *)(UART4_BASE + UART_O_DR), - sizeof(ui8TxBuf)); + UDMA_MODE_BASIC, ui8TxBuf, + (void *)(UART4_BASE + UART_O_DR), sizeof(ui8TxBuf)); uDMAChannelAssign(UDMA_CH18_UART4RX); uDMAChannelAssign(UDMA_CH19_UART4TX); @@ -240,13 +240,12 @@ void InitUART4Transfer(void) uDMAChannelEnable(UDMA_CHANNEL_TMR0B); /* Enable the UART DMA TX/RX interrupts.*/ - UARTIntEnable(UART4_BASE, UART_INT_DMARX ); + UARTIntEnable(UART4_BASE, UART_INT_DMARX); /* Enable the UART peripheral interrupts.*/ IntEnable(INT_UART4); } - /***************************************************************************** * Intialize UART uDMA for the data transfer. This will initialise both Tx and * Rx Channel associated with UART Tx and Rx @@ -282,7 +281,8 @@ void uartDMAinterface_init(void) /*UART OCMP RX Message Queue*/ uartRxMsgQueue = Util_constructQueue(&uartRxMsg); - LOGGER_DEBUG("UARTDMACTR:INFO::Constructing message Queue 0x%x for UART RX OCMP Messages.\n", + LOGGER_DEBUG( + "UARTDMACTR:INFO::Constructing message Queue 0x%x for UART RX OCMP Messages.\n", uartRxMsgQueue); LOGGER_DEBUG("UARTDMACTR:INFO::Waiting for OCMP UART RX messgaes....!!!\n"); @@ -304,9 +304,9 @@ static void uartdma_rx_taskfxn(UArg arg0, UArg arg1) resetUARTDMA(); } else { /* OCMP UART RX Messgaes */ - uint8_t * pWrite = NULL; - pWrite = (uint8_t *) malloc( - sizeof(OCMPMessageFrame) + OCMP_FRAME_MSG_LENGTH); + uint8_t *pWrite = NULL; + pWrite = (uint8_t *)malloc(sizeof(OCMPMessageFrame) + + OCMP_FRAME_MSG_LENGTH); if (pWrite != NULL) { memset(pWrite, '\0', UART_RXBUF_SIZE); memcpy(pWrite, ui8uartdmaRxBuf, UART_RXBUF_SIZE); @@ -321,7 +321,8 @@ static void uartdma_rx_taskfxn(UArg arg0, UArg arg1) #endif Util_enqueueMsg(gossiperRxMsgQueue, semGossiperMsg, pWrite); } else { - LOGGER_ERROR("UARTDMACTR:ERROR:: No memory left for Msg Length %d.\n", + LOGGER_ERROR( + "UARTDMACTR:ERROR:: No memory left for Msg Length %d.\n", UART_RXBUF_SIZE); } } @@ -344,8 +345,9 @@ void uartdma_tx_taskinit(void) /*UART OCMP TX Message Queue*/ uartTxMsgQueue = Util_constructQueue(&uartTxMsg); - LOGGER_DEBUG("UARTDMACTR:INFO::Constructing message Queue 0x%x for UART TX OCMP Messages.\n", - uartTxMsgQueue); + LOGGER_DEBUG( + "UARTDMACTR:INFO::Constructing message Queue 0x%x for UART TX OCMP Messages.\n", + uartTxMsgQueue); } /***************************************************************************** @@ -374,9 +376,9 @@ static ReturnStatus uartdma_process_tx_message(uint8_t *pMsg) } LOGGER_DEBUG("\n"); #endif - uDMAChannelTransferSet(UDMA_CHANNEL_TMR0B | UDMA_PRI_SELECT, - UDMA_MODE_BASIC, ui8TxBuf, - (void *) (UART4_BASE + UART_O_DR), sizeof(ui8TxBuf)); + uDMAChannelTransferSet( + UDMA_CHANNEL_TMR0B | UDMA_PRI_SELECT, UDMA_MODE_BASIC, ui8TxBuf, + (void *)(UART4_BASE + UART_O_DR), sizeof(ui8TxBuf)); uDMAChannelEnable(UDMA_CHANNEL_TMR0B); } else { status = RETURN_NOTOK; @@ -397,7 +399,7 @@ static void uartdma_tx_taskfxn(UArg arg0, UArg arg1) if (Semaphore_pend(semUARTTX, BIOS_WAIT_FOREVER)) { /* OCMP UART TX Messgaes */ while (!Queue_empty(uartTxMsgQueue)) { - uint8_t *pWrite = (uint8_t *) Util_dequeueMsg(uartTxMsgQueue); + uint8_t *pWrite = (uint8_t *)Util_dequeueMsg(uartTxMsgQueue); if (pWrite) { uartdma_process_tx_message(pWrite); } @@ -425,8 +427,8 @@ void uartdma_rx_createtask(void) taskParams.stack = &ocUARTDMATaskStack; taskParams.instance->name = "UART_DMA_TASK"; taskParams.priority = OCUARTDMA_TASK_PRIORITY; - Task_construct(&ocUARTDMATask, (Task_FuncPtr) uartdma_rx_taskfxn, - &taskParams, NULL); + Task_construct(&ocUARTDMATask, (Task_FuncPtr)uartdma_rx_taskfxn, + &taskParams, NULL); LOGGER_DEBUG("UARTDMACTRl:INFO::Creating UART DMA task function.\n"); } @@ -448,7 +450,7 @@ void uartdma_tx_createtask(void) taskParams.stack = &ocUARTDMATxTaskStack; taskParams.instance->name = "UART_DMA_TX_TASK"; taskParams.priority = OCUARTDMATX_TASK_PRIORITY; - Task_construct(&ocUARTDMATxTask, (Task_FuncPtr) uartdma_tx_taskfxn, - &taskParams, NULL); + Task_construct(&ocUARTDMATxTask, (Task_FuncPtr)uartdma_tx_taskfxn, + &taskParams, NULL); LOGGER_DEBUG("UARTDMACTRl:INFO::Creating UART DMA TX task function.\n"); } diff --git a/firmware/ec/src/interfaces/USB/usb.c b/firmware/ec/src/interfaces/USB/usb.c index e892ea4ec3..01dd6bd591 100644 --- a/firmware/ec/src/interfaces/USB/usb.c +++ b/firmware/ec/src/interfaces/USB/usb.c @@ -26,13 +26,13 @@ //***************************************************************************** // MACROS DEFINITION //***************************************************************************** -#define OCUSB_TX_TASK_PRIORITY 4 -#define OCUSB_TX_TASK_STACK_SIZE 1024 +#define OCUSB_TX_TASK_PRIORITY 4 +#define OCUSB_TX_TASK_STACK_SIZE 1024 -#define OCUSB_RX_TASK_PRIORITY 5 -#define OCUSB_RX_TASK_STACK_SIZE 1024 +#define OCUSB_RX_TASK_PRIORITY 5 +#define OCUSB_RX_TASK_STACK_SIZE 1024 -#define USB_FRAME_LENGTH OCMP_FRAME_TOTAL_LENGTH +#define USB_FRAME_LENGTH OCMP_FRAME_TOTAL_LENGTH //***************************************************************************** // HANDLES DEFINITION @@ -86,9 +86,11 @@ void usb_tx_taskinit(void) /* Create USB TX Message Queue for TX Messages */ usbTxMsgQueue = Util_constructQueue(&usbtTxMsg); if (usbTxMsgQueue == NULL) { - LOGGER_DEBUG("USBTX:ERROR:: Failed in Constructing USB TX Message Queue for TX Messages.\n"); + LOGGER_DEBUG( + "USBTX:ERROR:: Failed in Constructing USB TX Message Queue for TX Messages.\n"); } else { - LOGGER_DEBUG("USBTX:INFO:: Constructing message Queue for 0x%x USB TX Messages.\n", + LOGGER_DEBUG( + "USBTX:INFO:: Constructing message Queue for 0x%x USB TX Messages.\n", usbTxMsgQueue); } } @@ -114,9 +116,11 @@ void usb_rx_taskinit(void) /* Create USB RX Message Queue for RX Messages */ usbRxMsgQueue = Util_constructQueue(&usbRxMsg); if (usbRxMsgQueue == NULL) { - LOGGER_DEBUG("USBRX:ERROR:: Failed in Constructing USB RX Message Queue for RX Messages.\n"); + LOGGER_DEBUG( + "USBRX:ERROR:: Failed in Constructing USB RX Message Queue for RX Messages.\n"); } else { - LOGGER_DEBUG("USBRX:INFO:: Constructing message Queue for 0x%x USB RX Messages.\n", + LOGGER_DEBUG( + "USBRX:INFO:: Constructing message Queue for 0x%x USB RX Messages.\n", usbRxMsgQueue); } } @@ -143,7 +147,7 @@ void usb_tx_taskfxn(UArg arg0, UArg arg1) if (Semaphore_pend(semUSBTX, BIOS_WAIT_FOREVER)) { /* OCMP UART TX Messgaes */ while (!Queue_empty(usbTxMsgQueue)) { - uint8_t *pWrite = (uint8_t *) Util_dequeueMsg(usbTxMsgQueue); + uint8_t *pWrite = (uint8_t *)Util_dequeueMsg(usbTxMsgQueue); if (pWrite) { memset(ui8TxBuf, '\0', USB_FRAME_LENGTH); memcpy(ui8TxBuf, pWrite, USB_FRAME_LENGTH); @@ -157,7 +161,7 @@ void usb_tx_taskfxn(UArg arg0, UArg arg1) LOGGER_DEBUG("\n"); #endif USBCDCD_sendData(pWrite, USB_FRAME_LENGTH, - BIOS_WAIT_FOREVER); + BIOS_WAIT_FOREVER); } free(pWrite); } @@ -192,13 +196,13 @@ void usb_rx_taskfxn(UArg arg0, UArg arg1) USBCDCD_waitForConnect(BIOS_WAIT_FOREVER); received = USBCDCD_receiveData(ui8RxBuf, USB_FRAME_LENGTH, - BIOS_WAIT_FOREVER); + BIOS_WAIT_FOREVER); ui8RxBuf[received] = '\0'; if (received && (ui8RxBuf[0] == 0x55)) { /* OCMP USB RX Messgaes */ - uint8_t * pWrite = NULL; - pWrite = (uint8_t *) malloc( - sizeof(OCMPMessageFrame) + OCMP_FRAME_MSG_LENGTH); + uint8_t *pWrite = NULL; + pWrite = (uint8_t *)malloc(sizeof(OCMPMessageFrame) + + OCMP_FRAME_MSG_LENGTH); if (pWrite != NULL) { memset(pWrite, '\0', USB_FRAME_LENGTH); memcpy(pWrite, ui8RxBuf, USB_FRAME_LENGTH); @@ -213,9 +217,9 @@ void usb_rx_taskfxn(UArg arg0, UArg arg1) #endif Util_enqueueMsg(gossiperRxMsgQueue, semGossiperMsg, pWrite); } else { - LOGGER_ERROR("USBRX:ERROR:: No memory left for Msg Length %d.\n", + LOGGER_ERROR( + "USBRX:ERROR:: No memory left for Msg Length %d.\n", USB_FRAME_LENGTH); - } } } @@ -239,8 +243,8 @@ void usb_tx_createtask(void) taskParams.stack = &ocUSBTxTaskStack; taskParams.instance->name = "USB_TX_TASK"; taskParams.priority = OCUSB_TX_TASK_PRIORITY; - Task_construct(&ocUSBTxTask, (Task_FuncPtr) usb_tx_taskfxn, &taskParams, - NULL); + Task_construct(&ocUSBTxTask, (Task_FuncPtr)usb_tx_taskfxn, &taskParams, + NULL); LOGGER_DEBUG("USBTX:INFO:: Creating USB TX task function.\n"); } @@ -262,7 +266,7 @@ void usb_rx_createtask(void) taskParams.stack = &ocUSBRxTaskStack; taskParams.instance->name = "USB_RX_TASK"; taskParams.priority = OCUSB_RX_TASK_PRIORITY; - Task_construct(&ocUSBRxTask, (Task_FuncPtr) usb_rx_taskfxn, &taskParams, - NULL); + Task_construct(&ocUSBRxTask, (Task_FuncPtr)usb_rx_taskfxn, &taskParams, + NULL); LOGGER_DEBUG("USBRX:INFO:: Creating USB RX task function.\n"); } diff --git a/firmware/ec/src/interfaces/USB/usbcdcd.c b/firmware/ec/src/interfaces/USB/usbcdcd.c index cda9d76706..df42cbb2ac 100644 --- a/firmware/ec/src/interfaces/USB/usbcdcd.c +++ b/firmware/ec/src/interfaces/USB/usbcdcd.c @@ -61,14 +61,14 @@ /* Example/Board Header files */ #if defined(TIVAWARE) -typedef uint32_t USBCDCDEventType; +typedef uint32_t USBCDCDEventType; #else #define eUSBModeForceDevice USB_MODE_FORCE_DEVICE -typedef unsigned long USBCDCDEventType; +typedef unsigned long USBCDCDEventType; #endif /* Defines */ -#define USBBUFFERSIZE 256 +#define USBBUFFERSIZE 256 /* Typedefs */ typedef volatile enum { @@ -100,81 +100,134 @@ static USBCDCDEventType cbTxHandler(void *cbData, USBCDCDEventType event, USBCDCDEventType eventMsg, void *eventMsgPtr); static Void USBCDCD_hwiHandler(UArg arg0); -static unsigned int rxData(unsigned char *pStr, - unsigned int length, +static unsigned int rxData(unsigned char *pStr, unsigned int length, + unsigned int timeout); +static unsigned int txData(const unsigned char *pStr, int length, unsigned int timeout); -static unsigned int txData(const unsigned char *pStr, - int length, unsigned int timeout); void USBCDCD_init(void); -unsigned int USBCDCD_receiveData(unsigned char *pStr, - unsigned int length, +unsigned int USBCDCD_receiveData(unsigned char *pStr, unsigned int length, unsigned int timeout); -unsigned int USBCDCD_sendData(const unsigned char *pStr, - unsigned int length, +unsigned int USBCDCD_sendData(const unsigned char *pStr, unsigned int length, unsigned int timeout); bool USBCDCD_waitForConnect(unsigned int timeout); /* The languages supported by this device. */ -const unsigned char langDescriptor[] = { - 4, - USB_DTYPE_STRING, - USBShort(USB_LANG_EN_US) -}; +const unsigned char langDescriptor[] = { 4, USB_DTYPE_STRING, + USBShort(USB_LANG_EN_US) }; /* The manufacturer string. */ const unsigned char manufacturerString[] = { - (17 + 1) * 2, - USB_DTYPE_STRING, - 'T', 0, 'e', 0, 'x', 0, 'a', 0, 's', 0, ' ', 0, 'I', 0, 'n', 0, 's', 0, - 't', 0, 'r', 0, 'u', 0, 'm', 0, 'e', 0, 'n', 0, 't', 0, 's', 0, + (17 + 1) * 2, USB_DTYPE_STRING, + 'T', 0, + 'e', 0, + 'x', 0, + 'a', 0, + 's', 0, + ' ', 0, + 'I', 0, + 'n', 0, + 's', 0, + 't', 0, + 'r', 0, + 'u', 0, + 'm', 0, + 'e', 0, + 'n', 0, + 't', 0, + 's', 0, }; /* The product string. */ -const unsigned char productString[] = { - 2 + (16 * 2), - USB_DTYPE_STRING, - 'V', 0, 'i', 0, 'r', 0, 't', 0, 'u', 0, 'a', 0, 'l', 0, ' ', 0, - 'C', 0, 'O', 0, 'M', 0, ' ', 0, 'P', 0, 'o', 0, 'r', 0, 't', 0 -}; +const unsigned char productString[] = { 2 + (16 * 2), USB_DTYPE_STRING, + 'V', 0, + 'i', 0, + 'r', 0, + 't', 0, + 'u', 0, + 'a', 0, + 'l', 0, + ' ', 0, + 'C', 0, + 'O', 0, + 'M', 0, + ' ', 0, + 'P', 0, + 'o', 0, + 'r', 0, + 't', 0 }; /* The serial number string. */ -const unsigned char serialNumberString[] = { - (8 + 1) * 2, - USB_DTYPE_STRING, - '1', 0, '2', 0, '3', 0, '4', 0, '5', 0, '6', 0, '7', 0, '8', 0 -}; +const unsigned char serialNumberString[] = { (8 + 1) * 2, USB_DTYPE_STRING, + '1', 0, + '2', 0, + '3', 0, + '4', 0, + '5', 0, + '6', 0, + '7', 0, + '8', 0 }; /* The interface description string. */ -const unsigned char controlInterfaceString[] = { - 2 + (21 * 2), - USB_DTYPE_STRING, - 'A', 0, 'C', 0, 'M', 0, ' ', 0, 'C', 0, 'o', 0, 'n', 0, 't', 0, - 'r', 0, 'o', 0, 'l', 0, ' ', 0, 'I', 0, 'n', 0, 't', 0, 'e', 0, - 'r', 0, 'f', 0, 'a', 0, 'c', 0, 'e', 0 -}; +const unsigned char controlInterfaceString[] = { 2 + (21 * 2), USB_DTYPE_STRING, + 'A', 0, + 'C', 0, + 'M', 0, + ' ', 0, + 'C', 0, + 'o', 0, + 'n', 0, + 't', 0, + 'r', 0, + 'o', 0, + 'l', 0, + ' ', 0, + 'I', 0, + 'n', 0, + 't', 0, + 'e', 0, + 'r', 0, + 'f', 0, + 'a', 0, + 'c', 0, + 'e', 0 }; /* The configuration description string. */ -const unsigned char configString[] = { - 2 + (26 * 2), - USB_DTYPE_STRING, - 'S', 0, 'e', 0, 'l', 0, 'f', 0, ' ', 0, 'P', 0, 'o', 0, 'w', 0, - 'e', 0, 'r', 0, 'e', 0, 'd', 0, ' ', 0, 'C', 0, 'o', 0, 'n', 0, - 'f', 0, 'i', 0, 'g', 0, 'u', 0, 'r', 0, 'a', 0, 't', 0, 'i', 0, - 'o', 0, 'n', 0 -}; +const unsigned char configString[] = { 2 + (26 * 2), USB_DTYPE_STRING, + 'S', 0, + 'e', 0, + 'l', 0, + 'f', 0, + ' ', 0, + 'P', 0, + 'o', 0, + 'w', 0, + 'e', 0, + 'r', 0, + 'e', 0, + 'd', 0, + ' ', 0, + 'C', 0, + 'o', 0, + 'n', 0, + 'f', 0, + 'i', 0, + 'g', 0, + 'u', 0, + 'r', 0, + 'a', 0, + 't', 0, + 'i', 0, + 'o', 0, + 'n', 0 }; /* The descriptor string table. */ -const unsigned char * const stringDescriptors[] = { - langDescriptor, - manufacturerString, - productString, - serialNumberString, - controlInterfaceString, - configString +const unsigned char *const stringDescriptors[] = { + langDescriptor, manufacturerString, productString, + serialNumberString, controlInterfaceString, configString }; -#define STRINGDESCRIPTORSCOUNT (sizeof(stringDescriptors) / \ - sizeof(unsigned char *)) +#define STRINGDESCRIPTORSCOUNT \ + (sizeof(stringDescriptors) / sizeof(unsigned char *)) #if defined(TIVAWARE) tUSBBuffer txBuffer; @@ -182,47 +235,45 @@ tUSBBuffer rxBuffer; static tUSBDCDCDevice serialDevice; tUSBBuffer rxBuffer = { - false, /* This is a receive buffer. */ - cbRxHandler, /* pfnCallback */ - (void *)&serialDevice, /* Callback data is our device pointer. */ - USBDCDCPacketRead, /* pfnTransfer */ - USBDCDCRxPacketAvailable, /* pfnAvailable */ - (void *)&serialDevice, /* pvHandle */ - receiveBuffer, /* pcBuffer */ - USBBUFFERSIZE, /* ulBufferSize */ - {{0, 0, 0, 0}, 0, 0} /* private data workspace */ + false, /* This is a receive buffer. */ + cbRxHandler, /* pfnCallback */ + (void *)&serialDevice, /* Callback data is our device pointer. */ + USBDCDCPacketRead, /* pfnTransfer */ + USBDCDCRxPacketAvailable, /* pfnAvailable */ + (void *)&serialDevice, /* pvHandle */ + receiveBuffer, /* pcBuffer */ + USBBUFFERSIZE, /* ulBufferSize */ + { { 0, 0, 0, 0 }, 0, 0 } /* private data workspace */ }; tUSBBuffer txBuffer = { - true, /* This is a transmit buffer. */ - cbTxHandler, /* pfnCallback */ - (void *)&serialDevice, /* Callback data is our device pointer. */ - USBDCDCPacketWrite, /* pfnTransfer */ - USBDCDCTxPacketAvailable, /* pfnAvailable */ - (void *)&serialDevice, /* pvHandle */ - transmitBuffer, /* pcBuffer */ - USBBUFFERSIZE, /* ulBufferSize */ - {{0, 0, 0, 0}, 0, 0} /* private data workspace */ + true, /* This is a transmit buffer. */ + cbTxHandler, /* pfnCallback */ + (void *)&serialDevice, /* Callback data is our device pointer. */ + USBDCDCPacketWrite, /* pfnTransfer */ + USBDCDCTxPacketAvailable, /* pfnAvailable */ + (void *)&serialDevice, /* pvHandle */ + transmitBuffer, /* pcBuffer */ + USBBUFFERSIZE, /* ulBufferSize */ + { { 0, 0, 0, 0 }, 0, 0 } /* private data workspace */ }; -static tUSBDCDCDevice serialDevice = { - USB_VID_TI_1CBE, - USB_PID_SERIAL, - 0, - USB_CONF_ATTR_SELF_PWR, +static tUSBDCDCDevice serialDevice = { USB_VID_TI_1CBE, + USB_PID_SERIAL, + 0, + USB_CONF_ATTR_SELF_PWR, - cbSerialHandler, - NULL, + cbSerialHandler, + NULL, - USBBufferEventCallback, - (void *)&rxBuffer, + USBBufferEventCallback, + (void *)&rxBuffer, - USBBufferEventCallback, - (void *)&txBuffer, + USBBufferEventCallback, + (void *)&txBuffer, - stringDescriptors, - STRINGDESCRIPTORSCOUNT -}; + stringDescriptors, + STRINGDESCRIPTORSCOUNT }; #else const tUSBBuffer rxBuffer; const tUSBBuffer txBuffer; @@ -233,27 +284,27 @@ static tCDCSerInstance serialInstance; const tUSBDCDCDevice serialDevice; const tUSBBuffer rxBuffer = { - false, /* This is a receive buffer. */ - cbRxHandler, /* pfnCallback */ - (void *)&serialDevice, /* Callback data is our device pointer. */ - USBDCDCPacketRead, /* pfnTransfer */ - USBDCDCRxPacketAvailable, /* pfnAvailable */ - (void *)&serialDevice, /* pvHandle */ - receiveBuffer, /* pcBuffer */ - USBBUFFERSIZE, /* ulBufferSize */ - receiveBufferWorkspace /* pvWorkspace */ + false, /* This is a receive buffer. */ + cbRxHandler, /* pfnCallback */ + (void *)&serialDevice, /* Callback data is our device pointer. */ + USBDCDCPacketRead, /* pfnTransfer */ + USBDCDCRxPacketAvailable, /* pfnAvailable */ + (void *)&serialDevice, /* pvHandle */ + receiveBuffer, /* pcBuffer */ + USBBUFFERSIZE, /* ulBufferSize */ + receiveBufferWorkspace /* pvWorkspace */ }; const tUSBBuffer txBuffer = { - true, /* This is a transmit buffer. */ - cbTxHandler, /* pfnCallback */ - (void *)&serialDevice, /* Callback data is our device pointer. */ - USBDCDCPacketWrite, /* pfnTransfer */ - USBDCDCTxPacketAvailable, /* pfnAvailable */ - (void *)&serialDevice, /* pvHandle */ - transmitBuffer, /* pcBuffer */ - USBBUFFERSIZE, /* ulBufferSize */ - transmitBufferWorkspace /* pvWorkspace */ + true, /* This is a transmit buffer. */ + cbTxHandler, /* pfnCallback */ + (void *)&serialDevice, /* Callback data is our device pointer. */ + USBDCDCPacketWrite, /* pfnTransfer */ + USBDCDCTxPacketAvailable, /* pfnAvailable */ + (void *)&serialDevice, /* pvHandle */ + transmitBuffer, /* pcBuffer */ + USBBUFFERSIZE, /* ulBufferSize */ + transmitBufferWorkspace /* pvWorkspace */ }; const tUSBDCDCDevice serialDevice = { @@ -279,10 +330,10 @@ const tUSBDCDCDevice serialDevice = { #endif static tLineCoding g_sLineCoding = { - 115200, /* 115200 baud rate. */ - 1, /* 1 Stop Bit. */ - 0, /* No Parity. */ - 8 /* 8 Bits of data. */ + 115200, /* 115200 baud rate. */ + 1, /* 1 Stop Bit. */ + 0, /* No Parity. */ + 8 /* 8 Bits of data. */ }; /* @@ -448,25 +499,24 @@ static Void USBCDCD_hwiHandler(UArg arg0) /* * ======== rxData ======== */ -static unsigned int rxData(unsigned char *pStr, - unsigned int length, +static unsigned int rxData(unsigned char *pStr, unsigned int length, unsigned int timeout) { unsigned int read = 0; - if (USBBufferDataAvailable(&rxBuffer) || Semaphore_pend(semRxSerial, timeout)) { - read = USBBufferRead(&rxBuffer, pStr, length); + if (USBBufferDataAvailable(&rxBuffer) || + Semaphore_pend(semRxSerial, timeout)) { + read = USBBufferRead(&rxBuffer, pStr, length); } return (read); } - /* * ======== txData ======== */ -static unsigned int txData(const unsigned char *pStr, - int length, unsigned int timeout) +static unsigned int txData(const unsigned char *pStr, int length, + unsigned int timeout) { unsigned int buffAvailSize; unsigned int bufferedCount = 0; @@ -480,8 +530,7 @@ static unsigned int txData(const unsigned char *pStr, /* Determine how much needs to be sent */ if ((length - bufferedCount) > buffAvailSize) { sendCount = buffAvailSize; - } - else { + } else { sendCount = length - bufferedCount; } @@ -568,8 +617,7 @@ void USBCDCD_init(void) /* * ======== USBCDCD_receiveData ======== */ -unsigned int USBCDCD_receiveData(unsigned char *pStr, - unsigned int length, +unsigned int USBCDCD_receiveData(unsigned char *pStr, unsigned int length, unsigned int timeout) { unsigned int retValue = 0; @@ -615,8 +663,7 @@ unsigned int USBCDCD_receiveData(unsigned char *pStr, /* * ======== USBCDCD_sendData ======== */ -unsigned int USBCDCD_sendData(const unsigned char *pStr, - unsigned int length, +unsigned int USBCDCD_sendData(const unsigned char *pStr, unsigned int length, unsigned int timeout) { unsigned int retValue = 0; diff --git a/firmware/ec/src/main.c b/firmware/ec/src/main.c index 1f3c3e9f2e..9e153c0f19 100644 --- a/firmware/ec/src/main.c +++ b/firmware/ec/src/main.c @@ -26,23 +26,32 @@ extern int ethernet_start(void); static void openCellular_init(void) { - LOGGER_DEBUG("|||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||\n"); - LOGGER_DEBUG("|||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||\n"); - LOGGER_DEBUG("|||| |||| |||| ||||| |||||| |||| |||| |||| ||||||||| ||||||||| |||| |||| ||||||||| |||| ||||\n"); - LOGGER_DEBUG("|||| |||| |||| |||| |||| |||||||||| | ||||| |||| ||||||||| ||||||||| ||||||||| ||||||||| |||| |||| ||||||||| |||| |||| |||| ||||\n"); - LOGGER_DEBUG("|||| |||| |||| |||| |||| |||||||||| || |||| |||| ||||||||| ||||||||| ||||||||| ||||||||| |||| |||| ||||||||| |||| |||| |||| ||||\n"); - LOGGER_DEBUG("|||| |||| |||| |||| ||||| ||| ||| |||| ||||||||| |||| ||||||||| ||||||||| |||| |||| ||||||||| |||| ||||\n"); - LOGGER_DEBUG("|||| |||| |||| |||||||||| |||||||||| |||| || |||| ||||||||| ||||||||| ||||||||| ||||||||| |||| |||| ||||||||| |||| |||| || ||||||\n"); - LOGGER_DEBUG("|||| |||| |||| |||||||||| |||||||||| ||||| | |||| ||||||||| ||||||||| ||||||||| ||||||||| |||| |||| ||||||||| |||| |||| ||| |||||\n"); - LOGGER_DEBUG("|||| |||| |||||||||| ||||| |||||| |||| |||| |||| |||| |||| |||| |||| |||| |||| |||| ||||\n"); - LOGGER_DEBUG("|||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||\n"); - LOGGER_DEBUG("|||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||\n"); - LOGGER_DEBUG("\nOCWare v" - xstr(_FW_REV_MAJOR_)"." - xstr(_FW_REV_MINOR_)"." - xstr(_FW_REV_BUGFIX_)"-" - xstr(_FW_REV_TAG_)"\n"); - LOGGER_DEBUG("Build Date: "__DATE__" "__TIME__"\n\n"); + LOGGER_DEBUG( + "|||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||\n"); + LOGGER_DEBUG( + "|||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||\n"); + LOGGER_DEBUG( + "|||| |||| |||| ||||| |||||| |||| |||| |||| ||||||||| ||||||||| |||| |||| ||||||||| |||| ||||\n"); + LOGGER_DEBUG( + "|||| |||| |||| |||| |||| |||||||||| | ||||| |||| ||||||||| ||||||||| ||||||||| ||||||||| |||| |||| ||||||||| |||| |||| |||| ||||\n"); + LOGGER_DEBUG( + "|||| |||| |||| |||| |||| |||||||||| || |||| |||| ||||||||| ||||||||| ||||||||| ||||||||| |||| |||| ||||||||| |||| |||| |||| ||||\n"); + LOGGER_DEBUG( + "|||| |||| |||| |||| ||||| ||| ||| |||| ||||||||| |||| ||||||||| ||||||||| |||| |||| ||||||||| |||| ||||\n"); + LOGGER_DEBUG( + "|||| |||| |||| |||||||||| |||||||||| |||| || |||| ||||||||| ||||||||| ||||||||| ||||||||| |||| |||| ||||||||| |||| |||| || ||||||\n"); + LOGGER_DEBUG( + "|||| |||| |||| |||||||||| |||||||||| ||||| | |||| ||||||||| ||||||||| ||||||||| ||||||||| |||| |||| ||||||||| |||| |||| ||| |||||\n"); + LOGGER_DEBUG( + "|||| |||| |||||||||| ||||| |||||| |||| |||| |||| |||| |||| |||| |||| |||| |||| |||| ||||\n"); + LOGGER_DEBUG( + "|||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||\n"); + LOGGER_DEBUG( + "|||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||\n"); + LOGGER_DEBUG( + "\nOCWare v" xstr(_FW_REV_MAJOR_) "." xstr(_FW_REV_MINOR_) "." xstr( + _FW_REV_BUGFIX_) "-" xstr(_FW_REV_TAG_) "\n"); + LOGGER_DEBUG("Build Date: " __DATE__ " " __TIME__ "\n\n"); } static void exit_handler(int unused) diff --git a/firmware/ec/src/post/post.c b/firmware/ec/src/post/post.c index 354b0b9ca3..70da7da2d9 100644 --- a/firmware/ec/src/post/post.c +++ b/firmware/ec/src/post/post.c @@ -66,7 +66,7 @@ extern POSTData PostResult[POST_RECORDS]; static void post_taskfxn(UArg a0, UArg a1); static void post_task_init(void); static ReturnStatus post_process_msg(OCMPSubsystem OC_subSystem); -static OCMPMessageFrame* post_create_execute_msg(OCMPSubsystem OC_subSystem); +static OCMPMessageFrame *post_create_execute_msg(OCMPSubsystem OC_subSystem); static void post_activate(OCMPMessageFrame *pPOSTMsg); static void post_process_rx_msg(OCMPMessageFrame *pPOSTMsg); static void post_move_to_next_subsystem(); @@ -86,21 +86,25 @@ void _post_complete() { uint8_t iter = 0; LOGGER_DEBUG("POST:INFO::POST test is completed.\n"); - LOGGER_DEBUG("||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||\n"); - LOGGER_DEBUG("|||||||||||||||||||||||||||||||||||||||||||||||||||||||POST TABLE|||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||\n"); + LOGGER_DEBUG( + "||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||\n"); + LOGGER_DEBUG( + "|||||||||||||||||||||||||||||||||||||||||||||||||||||||POST TABLE|||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||\n"); /* POST results */ for (iter = 0; iter < POST_RECORDS; iter++) { - LOGGER_DEBUG("\t POST:INFO:: POSTRESULT SS: 0x%x Device S.No: 0x%x I2C Bus: 0x%x Device Addr: 0x%x Device Id: 0x%x Manufacture Id: 0x%x Status: 0x%x.\n", - PostResult[iter].subsystem, PostResult[iter].devSno, - PostResult[iter].i2cBus, PostResult[iter].devAddr, - PostResult[iter].devId, PostResult[iter].manId, - PostResult[iter].status); + LOGGER_DEBUG( + "\t POST:INFO:: POSTRESULT SS: 0x%x Device S.No: 0x%x I2C Bus: 0x%x Device Addr: 0x%x Device Id: 0x%x Manufacture Id: 0x%x Status: 0x%x.\n", + PostResult[iter].subsystem, PostResult[iter].devSno, + PostResult[iter].i2cBus, PostResult[iter].devAddr, + PostResult[iter].devId, PostResult[iter].manId, + PostResult[iter].status); } - LOGGER_DEBUG("||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||\n"); - LOGGER_DEBUG("||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||\n"); + LOGGER_DEBUG( + "||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||\n"); + LOGGER_DEBUG( + "||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||\n"); } - /***************************************************************************** ** FUNCTION NAME : post_data_init ** @@ -111,7 +115,8 @@ void _post_complete() ** RETURN TYPE : None ** *****************************************************************************/ -void post_init_POSTData(POSTData *pData,OCMPSubsystem subsystem, uint8_t devSno) +void post_init_POSTData(POSTData *pData, OCMPSubsystem subsystem, + uint8_t devSno) { pData->subsystem = subsystem; pData->devSno = devSno; @@ -133,7 +138,8 @@ void post_init_POSTData(POSTData *pData,OCMPSubsystem subsystem, uint8_t devSno) ** RETURN TYPE : None ** *****************************************************************************/ -void post_update_POSTData(POSTData *pData, uint8_t I2CBus, uint8_t devAddress, uint16_t manId, uint16_t devId) +void post_update_POSTData(POSTData *pData, uint8_t I2CBus, uint8_t devAddress, + uint16_t manId, uint16_t devId) { pData->i2cBus = I2CBus; pData->devAddr = devAddress; @@ -168,7 +174,7 @@ void post_update_POSTStatus(POSTData *pData, ePostCode status) *****************************************************************************/ static void post_move_to_next_subsystem() { - POST_subSystem = (OCMPSubsystem) (POST_subSystem + (OCMPSubsystem) 1); + POST_subSystem = (OCMPSubsystem)(POST_subSystem + (OCMPSubsystem)1); if (POST_subSystem > OC_SS_MAX_LIMIT) { POST_subSystem = OC_SS_SYS; } @@ -186,10 +192,11 @@ static void post_move_to_next_subsystem() *****************************************************************************/ static void post_update_result_to_bigbrother(OCMPMessageFrame *pPOSTMsg) { - pPOSTMsg->message.subsystem = OC_SS_SYS; //OC_SUBSYSTEM_MAX_LIMIT subsystem number taken for bigbrother + pPOSTMsg->message.subsystem = + OC_SS_SYS; //OC_SUBSYSTEM_MAX_LIMIT subsystem number taken for bigbrother memcpy((pPOSTMsg->message.ocmp_data), &postState, 1); Util_enqueueMsg(bigBrotherRxMsgQueue, semBigBrotherMsg, - (uint8_t*) pPOSTMsg); + (uint8_t *)pPOSTMsg); } /***************************************************************************** @@ -233,13 +240,12 @@ static ReturnStatus post_process_msg(OCMPSubsystem OC_subSystem) ** RETURN TYPE : None ** *****************************************************************************/ -static OCMPMessageFrame* post_create_execute_msg(OCMPSubsystem OC_subSystem) +static OCMPMessageFrame *post_create_execute_msg(OCMPSubsystem OC_subSystem) { - LOGGER_DEBUG("POST:INFO::Activation POST for SS %d.",OC_subSystem); - OCMPMessageFrame *postExeMsg = create_ocmp_msg_frame(OC_subSystem, - OCMP_MSG_TYPE_POST, - OCMP_AXN_TYPE_ACTIVE, - 0x00,0x00,1); + LOGGER_DEBUG("POST:INFO::Activation POST for SS %d.", OC_subSystem); + OCMPMessageFrame *postExeMsg = + create_ocmp_msg_frame(OC_subSystem, OCMP_MSG_TYPE_POST, + OCMP_AXN_TYPE_ACTIVE, 0x00, 0x00, 1); return postExeMsg; } @@ -253,24 +259,22 @@ static OCMPMessageFrame* post_create_execute_msg(OCMPSubsystem OC_subSystem) ** RETURN TYPE : None ** *****************************************************************************/ -static OCMPMessageFrame* post_create_enable_msg(OCMPSubsystem OC_subSystem) +static OCMPMessageFrame *post_create_enable_msg(OCMPSubsystem OC_subSystem) { uint8_t dummyByte = 0xff; OCMPActionType actionType = OCMP_AXN_TYPE_ENABLE; LOGGER_DEBUG("POST:INFO::Enabling system for POST."); - if(OC_subSystem == OC_SS_MAX_LIMIT) { + if (OC_subSystem == OC_SS_MAX_LIMIT) { OC_subSystem = OC_SS_SYS; actionType = OCMP_AXN_TYPE_REPLY; } else { actionType = OCMP_AXN_TYPE_ENABLE; } - OCMPMessageFrame *postExeMsg = create_ocmp_msg_frame(OC_subSystem, - OCMP_MSG_TYPE_POST, - actionType,0x00,0x00,1); + OCMPMessageFrame *postExeMsg = create_ocmp_msg_frame( + OC_subSystem, OCMP_MSG_TYPE_POST, actionType, 0x00, 0x00, 1); return postExeMsg; } - /***************************************************************************** ** FUNCTION NAME : post_activate ** @@ -285,20 +289,21 @@ static void post_activate(OCMPMessageFrame *pPOSTMsg) { ReturnStatus POSTAckstatus = RETURN_NOTOK; LOGGER_DEBUG("POST:INFO:: Processing POST Ack received from the " - "Subsystem %d.\n",POST_subSystem); + "Subsystem %d.\n", + POST_subSystem); System_flush(); //Do the casting for the pMsg //POSTAckstatus = (ReturnStatus) (pPOSTMsg->message.ocmp_data); memcpy(&POSTAckstatus, pPOSTMsg->message.ocmp_data, 1); - if ( (pPOSTMsg->message.subsystem == OC_SS_SYS) - && (pPOSTMsg->message.action == OCMP_AXN_TYPE_ACTIVE) ){ + if ((pPOSTMsg->message.subsystem == OC_SS_SYS) && + (pPOSTMsg->message.action == OCMP_AXN_TYPE_ACTIVE)) { post_process_msg(POST_subSystem); } else { if (pPOSTMsg->message.subsystem == POST_subSystem) { postState = (!POSTAckstatus) & postState; LOGGER_DEBUG("POST:INFO:: POST status for 0x%x Subsystem is 0x%x" - " and OC POST status is 0x%x.\n", - POST_subSystem, POSTAckstatus, postState); + " and OC POST status is 0x%x.\n", + POST_subSystem, POSTAckstatus, postState); if (pPOSTMsg) { free(pPOSTMsg); } @@ -324,12 +329,12 @@ static void post_process_rx_msg(OCMPMessageFrame *pPOSTMsg) switch (pPOSTMsg->message.action) { case OCMP_AXN_TYPE_ACTIVE: case OCMP_AXN_TYPE_REPLY: - post_activate(pPOSTMsg); - break; - default: - { + post_activate(pPOSTMsg); + break; + default: { LOGGER_ERROR("POST::ERROR::Unkown action type 0x%x for POST" - " message.\n", pPOSTMsg->message.action); + " message.\n", + pPOSTMsg->message.action); /*TODO: Return POST fail to BB*/ } } @@ -354,22 +359,19 @@ static void post_task_init(void) } /*Creating RX Message Queue*/ postRxMsgQueue = Util_constructQueue(&postRxMsg); - LOGGER_DEBUG("POST:INFO::Constructing message Queue for 0x%x POST RX Messages.\n", - postRxMsgQueue); + LOGGER_DEBUG( + "POST:INFO::Constructing message Queue for 0x%x POST RX Messages.\n", + postRxMsgQueue); /* Reset POST state to fail */ postState = 0; POST_subSystem = OC_SS_SYS; - OCMPMessageFrame *postEnableMsg = create_ocmp_msg_frame(OC_SS_SYS, - OCMP_MSG_TYPE_POST, - OCMP_AXN_TYPE_ACTIVE, - 0x00, - 0x00, - 1); + OCMPMessageFrame *postEnableMsg = create_ocmp_msg_frame( + OC_SS_SYS, OCMP_MSG_TYPE_POST, OCMP_AXN_TYPE_ACTIVE, 0x00, 0x00, 1); /*Ask for activate permission from BB system*/ if (postEnableMsg) { Util_enqueueMsg(bigBrotherRxMsgQueue, semBigBrotherMsg, - (uint8_t*) postEnableMsg); + (uint8_t *)postEnableMsg); } } @@ -389,8 +391,8 @@ static void post_taskfxn(UArg a0, UArg a1) while (true) { if (Semaphore_pend(semPOSTMsg, BIOS_WAIT_FOREVER)) { while (!Queue_empty(postRxMsgQueue)) { - OCMPMessageFrame *pWrite = (OCMPMessageFrame *) Util_dequeueMsg( - postRxMsgQueue); + OCMPMessageFrame *pWrite = + (OCMPMessageFrame *)Util_dequeueMsg(postRxMsgQueue); if (pWrite) { post_process_rx_msg(pWrite); } diff --git a/firmware/ec/src/post/post_util.c b/firmware/ec/src/post/post_util.c index 4a1fbb8dd2..77aecc36ab 100644 --- a/firmware/ec/src/post/post_util.c +++ b/firmware/ec/src/post/post_util.c @@ -30,7 +30,8 @@ void post_update_POSTStatus(POSTData *pData, ePostCode status) pData->status = status; } -void post_init_POSTData(POSTData *pData,OCMPSubsystem subsystem, uint8_t devSno) +void post_init_POSTData(POSTData *pData, OCMPSubsystem subsystem, + uint8_t devSno) { pData->subsystem = subsystem; pData->devSno = devSno; @@ -41,7 +42,8 @@ void post_init_POSTData(POSTData *pData,OCMPSubsystem subsystem, uint8_t devSno) pData->status = POST_DEV_MISSING; } -void post_update_POSTData(POSTData *pData, uint8_t I2CBus, uint8_t devAddress, uint16_t manId, uint16_t devId) +void post_update_POSTData(POSTData *pData, uint8_t I2CBus, uint8_t devAddress, + uint16_t manId, uint16_t devId) { pData->i2cBus = I2CBus; pData->devAddr = devAddress; @@ -52,10 +54,9 @@ void post_update_POSTData(POSTData *pData, uint8_t I2CBus, uint8_t devAddress, u static uint8_t deviceCount = 0; /* Execute POST for a given device driver (performs deep copy of alert_data) */ -static ePostCode _postDriver(const Component *subsystem, - const Component *dev, - const AlertData *alert_data, - POSTData* postData, OCSubsystem *ss) +static ePostCode _postDriver(const Component *subsystem, const Component *dev, + const AlertData *alert_data, POSTData *postData, + OCSubsystem *ss) { #if 0 if (!dev->driver) { @@ -64,36 +65,36 @@ static ePostCode _postDriver(const Component *subsystem, #endif ePostCode postcode = POST_DEV_FOUND; if (dev->driver->fxnTable->cb_probe) { - postcode = dev->driver->fxnTable->cb_probe(dev->driver_cfg,postData); + postcode = dev->driver->fxnTable->cb_probe(dev->driver_cfg, postData); post_update_POSTStatus(postData, postcode); } - LOGGER_DEBUG("%s:INFO:: %s (%s) %s\n", subsystem->name, - dev->name, dev->driver->name, - (postcode == POST_DEV_FOUND) ? "found" : "not found"); + LOGGER_DEBUG("%s:INFO:: %s (%s) %s\n", subsystem->name, dev->name, + dev->driver->name, + (postcode == POST_DEV_FOUND) ? "found" : "not found"); if (postcode == POST_DEV_FOUND) { if (ss->state == SS_STATE_INIT) { if (dev->driver->fxnTable->cb_init) { AlertData *alert_data_cp = malloc(sizeof(AlertData)); *alert_data_cp = *alert_data; - postcode = dev->driver->fxnTable->cb_init(dev->driver_cfg, - dev->factory_config, - alert_data_cp); + postcode = dev->driver->fxnTable->cb_init( + dev->driver_cfg, dev->factory_config, alert_data_cp); } else { postcode = POST_DEV_NO_CFG_REQ; } post_update_POSTStatus(postData, postcode); LOGGER_DEBUG("%s:INFO:: Configuration for %s (%s) is %s\n", - subsystem->name, - dev->name, - dev->driver->name, - (postcode == POST_DEV_CFG_DONE) ? "ok":(postcode == POST_DEV_NO_CFG_REQ) ? "not required." : "failed."); + subsystem->name, dev->name, dev->driver->name, + (postcode == POST_DEV_CFG_DONE) ? + "ok" : + (postcode == POST_DEV_NO_CFG_REQ) ? + "not required." : + "failed."); } } } -ReturnStatus _execPost(OCMPMessageFrame *pMsg, - unsigned int subsystem_id) +ReturnStatus _execPost(OCMPMessageFrame *pMsg, unsigned int subsystem_id) { const Component *subsystem = &sys_schema[subsystem_id]; OCSubsystem *ss = ss_reg[subsystem_id]; @@ -106,10 +107,10 @@ ReturnStatus _execPost(OCMPMessageFrame *pMsg, /* Iterate over each component & device within the subsystem, calling * its post callback */ ReturnStatus status = RETURN_OK; - if((subsystem->ssHookSet)&& - (ss->state == SS_STATE_INIT)) { - if(subsystem->ssHookSet->preInitFxn) { - if (!(subsystem->ssHookSet->preInitFxn(subsystem->driver_cfg, &(ss->state)))) { + if ((subsystem->ssHookSet) && (ss->state == SS_STATE_INIT)) { + if (subsystem->ssHookSet->preInitFxn) { + if (!(subsystem->ssHookSet->preInitFxn(subsystem->driver_cfg, + &(ss->state)))) { status = RETURN_NOTOK; return status; } @@ -119,49 +120,54 @@ ReturnStatus _execPost(OCMPMessageFrame *pMsg, ePostCode postcode = POST_DEV_MISSING; uint8_t devSno = 0; const Component *comp = &subsystem->components[0]; - for (uint8_t comp_id = 0; (comp && comp->name); ++comp, ++comp_id) { /* Component level (ec, ap, ch1, etc.) */ + for (uint8_t comp_id = 0; (comp && comp->name); + ++comp, ++comp_id) { /* Component level (ec, ap, ch1, etc.) */ /* If we have a driver at the component level, init */ AlertData alert_data = { .subsystem = (OCMPSubsystem)subsystem_id, .componentId = comp_id, .deviceId = 0, }; - if(!comp->components) { - if (comp->postDisabled == POST_DISABLED ) { - continue ; - } - devSno++; - post_init_POSTData(&postData,subsystem_id,devSno); - //TODO: If postcode is configuration failure what should beth recovery action. - if (_postDriver(subsystem, comp, &alert_data, &postData, ss) == POST_DEV_NO_DRIVER_EXIST) { - devSno--; - } else { - post_update_POSTresult(&postData); - } - } else { - const Component *dev = &comp->components[0]; - for (uint8_t dev_id = 0; (dev && dev->name); ++dev, ++dev_id) { /* Device level (ts, ina, etc) */ - AlertData alert_data = { - .subsystem = (OCMPSubsystem)subsystem_id, - .componentId = comp_id, - .deviceId = dev_id, - }; - if(dev->postDisabled == POST_DISABLED ) { + if (!comp->components) { + if (comp->postDisabled == POST_DISABLED) { continue; } devSno++; - post_init_POSTData(&postData,subsystem_id,devSno); - if(_postDriver(subsystem, dev, &alert_data, &postData, ss) == POST_DEV_NO_DRIVER_EXIST) { + post_init_POSTData(&postData, subsystem_id, devSno); + //TODO: If postcode is configuration failure what should beth recovery action. + if (_postDriver(subsystem, comp, &alert_data, &postData, ss) == + POST_DEV_NO_DRIVER_EXIST) { devSno--; } else { post_update_POSTresult(&postData); } + } else { + const Component *dev = &comp->components[0]; + for (uint8_t dev_id = 0; (dev && dev->name); + ++dev, ++dev_id) { /* Device level (ts, ina, etc) */ + AlertData alert_data = { + .subsystem = (OCMPSubsystem)subsystem_id, + .componentId = comp_id, + .deviceId = dev_id, + }; + if (dev->postDisabled == POST_DISABLED) { + continue; + } + devSno++; + post_init_POSTData(&postData, subsystem_id, devSno); + if (_postDriver(subsystem, dev, &alert_data, &postData, ss) == + POST_DEV_NO_DRIVER_EXIST) { + devSno--; + } else { + post_update_POSTresult(&postData); + } + } } - } } - if((subsystem->ssHookSet)&&(ss->state == SS_STATE_INIT)) { - if(subsystem->ssHookSet->postInitFxn){ - if (!(subsystem->ssHookSet->postInitFxn(subsystem->driver_cfg, &(ss->state)))) { + if ((subsystem->ssHookSet) && (ss->state == SS_STATE_INIT)) { + if (subsystem->ssHookSet->postInitFxn) { + if (!(subsystem->ssHookSet->postInitFxn(subsystem->driver_cfg, + &(ss->state)))) { ss->state = SS_STATE_FAULTY; } } @@ -177,7 +183,6 @@ ReturnStatus _execPost(OCMPMessageFrame *pMsg, return status; } - /* ***************************************************************************** ** FUNCTION NAME : post_update_POSTresult ** @@ -190,11 +195,10 @@ ReturnStatus _execPost(OCMPMessageFrame *pMsg, ******************************************************************************/ void post_update_POSTresult(POSTData *postData) { - /* Write a device info to flash but use a dummy function for REV B boards.*/ uint8_t iter = 0; /* Dump structure at particular location*/ - if ( (postData->subsystem == OC_SS_SYS) && (postData->devSno == 1 ) ) { + if ((postData->subsystem == OC_SS_SYS) && (postData->devSno == 1)) { deviceCount = 0; memset(PostResult, '\0', (POST_RECORDS * sizeof(POSTData))); } else { @@ -202,6 +206,6 @@ void post_update_POSTresult(POSTData *postData) } //LOGGER_DEBUG("POST:INFO:: Updating POST results for the Subsystem %d , Device Serial offset %d , Total Number of records %d.\n", // postData->subsystem,postData->devSno,deviceCount+1); - memcpy(&PostResult[deviceCount],postData,sizeof(POSTData)); + memcpy(&PostResult[deviceCount], postData, sizeof(POSTData)); } #endif diff --git a/firmware/ec/src/registry/SSRegistry.c b/firmware/ec/src/registry/SSRegistry.c index 75c94ed486..ebda3d5544 100644 --- a/firmware/ec/src/registry/SSRegistry.c +++ b/firmware/ec/src/registry/SSRegistry.c @@ -17,9 +17,9 @@ #include "inc/utils/ocmp_util.h" #include "inc/utils/util.h" -#define OCMP_ACTION_TYPE_GET 1 -#define OCMP_ACTION_TYPE_SET 2 -#define OCMP_ACTION_TYPE_REPLY 3 +#define OCMP_ACTION_TYPE_GET 1 +#define OCMP_ACTION_TYPE_SET 2 +#define OCMP_ACTION_TYPE_REPLY 3 #define OCMP_ACTION_TYPE_ACTIVE 4 /* TODO: configurable directory (allow us to target different platforms) */ @@ -27,8 +27,8 @@ #include -#define OC_TASK_STACK_SIZE 2048 -#define OC_TASK_PRIORITY 2 +#define OC_TASK_STACK_SIZE 2048 +#define OC_TASK_PRIORITY 2 static char OC_task_stack[SUBSYSTEM_COUNT][OC_TASK_STACK_SIZE]; @@ -52,7 +52,8 @@ static const size_t PARAM_SIZE_MAP[] = { iterate over definition to determine size requirement*/ }; -static unsigned int _subcompCount(const Component *comp) { +static unsigned int _subcompCount(const Component *comp) +{ unsigned int i = 0; if (comp) { while (comp->components[i].name) { @@ -62,7 +63,8 @@ static unsigned int _subcompCount(const Component *comp) { return i; } -static size_t _paramSize(const Parameter *param) { +static size_t _paramSize(const Parameter *param) +{ if (!param || (param->type >= ARRAY_SIZE(PARAM_SIZE_MAP))) { return 0; } @@ -83,8 +85,7 @@ static bool _paramIsValid(const Parameter *param) return param && param->name; } -void OCMP_GenerateAlert(const AlertData *alert_data, - unsigned int alert_id, +void OCMP_GenerateAlert(const AlertData *alert_data, unsigned int alert_id, const void *data) { if (!alert_data) { @@ -92,7 +93,8 @@ void OCMP_GenerateAlert(const AlertData *alert_data, } const Component *subsystem = &sys_schema[alert_data->subsystem]; - const Component *component = &subsystem->components[alert_data->componentId]; + const Component *component = + &subsystem->components[alert_data->componentId]; const Driver *driver = component->components[alert_data->deviceId].driver; const Parameter *param = &driver->alerts[alert_id]; @@ -110,16 +112,15 @@ void OCMP_GenerateAlert(const AlertData *alert_data, /* Align to 4 byte boundary (bug in host) */ size_t param_size = (_paramSize(param) + 3) & ~0x03; - OCMPMessageFrame *pMsg = create_ocmp_msg_frame(alert_data->subsystem, - OCMP_MSG_TYPE_ALERT, - OCMP_AXN_TYPE_ACTIVE, - alert_data->componentId + 1, /* TODO: inconsistency indexing in host */ - parameters, - param_size); + OCMPMessageFrame *pMsg = create_ocmp_msg_frame( + alert_data->subsystem, OCMP_MSG_TYPE_ALERT, OCMP_AXN_TYPE_ACTIVE, + alert_data->componentId + + 1, /* TODO: inconsistency indexing in host */ + parameters, param_size); if (pMsg) { memcpy(pMsg->message.ocmp_data, data, _paramSize(param)); Util_enqueueMsg(bigBrotherTxMsgQueue, semBigBrotherMsg, - (uint8_t*) pMsg); + (uint8_t *)pMsg); } else { LOGGER_ERROR("ERROR::Unable to allocate alert packet\n"); } @@ -131,7 +132,7 @@ static bool _handleMsgTypeCmd(OCMPMessageFrame *pMsg, const Component *comp) Component *dev; if (comp) { if (pMsg->message.parameters > 0) { - dev = &comp->components[(pMsg->message.parameters)-1]; + dev = &comp->components[(pMsg->message.parameters) - 1]; } else { dev = comp; } @@ -154,12 +155,12 @@ static bool _handle_cmd_get(OCMPMessageFrame *pMsg, const Component *comp, switch (pMsg->message.msgtype) { case OCMP_MSG_TYPE_CONFIG: return (comp->driver->fxnTable->cb_get_config && - comp->driver->fxnTable->cb_get_config(comp->driver_cfg, param_id, - buf_ptr)); + comp->driver->fxnTable->cb_get_config(comp->driver_cfg, + param_id, buf_ptr)); case OCMP_MSG_TYPE_STATUS: return (comp->driver->fxnTable->cb_get_status && - comp->driver->fxnTable->cb_get_status(comp->driver_cfg, param_id, - buf_ptr)); + comp->driver->fxnTable->cb_get_status(comp->driver_cfg, + param_id, buf_ptr)); default: return false; } @@ -171,8 +172,8 @@ static bool _handle_cmd_set(OCMPMessageFrame *pMsg, const Component *comp, switch (pMsg->message.msgtype) { case OCMP_MSG_TYPE_CONFIG: return (comp->driver->fxnTable->cb_set_config && - comp->driver->fxnTable->cb_set_config(comp->driver_cfg, param_id, - data)); + comp->driver->fxnTable->cb_set_config(comp->driver_cfg, + param_id, data)); default: return false; } @@ -207,16 +208,14 @@ static bool _handleDevStatCfg(OCMPMessageFrame *pMsg, const Component *dev, if (pMsg->message.parameters & (1 << *param_id)) { switch (pMsg->message.action) { case OCMP_ACTION_TYPE_GET: - if (_handle_cmd_get(pMsg, dev, normalized_id, - *buf_ptr)) { + if (_handle_cmd_get(pMsg, dev, normalized_id, *buf_ptr)) { dev_handled = true; } else { pMsg->message.parameters &= ~(1 << *param_id); } break; case OCMP_ACTION_TYPE_SET: - if (_handle_cmd_set(pMsg, dev, normalized_id, - *buf_ptr)) { + if (_handle_cmd_set(pMsg, dev, normalized_id, *buf_ptr)) { dev_handled = true; } else { pMsg->message.parameters &= ~(1 << *param_id); @@ -240,27 +239,29 @@ static bool _handle_post_enable(const Component *comp, OCMPMessageFrame *pMsg) { bool ret = false; OCMPMessageFrame *buffer; - const Post *postCmd = &comp->driver->post[(pMsg->message.action)-1]; + const Post *postCmd = &comp->driver->post[(pMsg->message.action) - 1]; if (postCmd && postCmd->cb_postCmd) { ret = postCmd->cb_postCmd(&buffer); if (ret) { - Util_enqueueMsg(postRxMsgQueue, semPOSTMsg, (uint8_t*)buffer); + Util_enqueueMsg(postRxMsgQueue, semPOSTMsg, (uint8_t *)buffer); } } pMsg->message.ocmp_data[0] = !(ret); //RETURN_OK =0; return ret; } -static bool _handle_post_active(OCMPMessageFrame *pMsg,unsigned int subsystem_id) +static bool _handle_post_active(OCMPMessageFrame *pMsg, + unsigned int subsystem_id) { ReturnStatus status = _execPost(pMsg, subsystem_id); return (status == RETURN_OK); } -static bool _handle_post_get_results(const Component *comp,OCMPMessageFrame *pMsg) +static bool _handle_post_get_results(const Component *comp, + OCMPMessageFrame *pMsg) { bool ret = false; - const Post *postCmd = &comp->driver->post[(pMsg->message.action)-1]; + const Post *postCmd = &comp->driver->post[(pMsg->message.action) - 1]; if (postCmd && postCmd->cb_postCmd) { postCmd->cb_postCmd(pMsg); ret = true; @@ -268,7 +269,8 @@ static bool _handle_post_get_results(const Component *comp,OCMPMessageFrame *pMs return ret; } -static bool _handleMsgTypePOST(OCMPMessageFrame *pMsg, const Component *comp, unsigned int subsystem_id) +static bool _handleMsgTypePOST(OCMPMessageFrame *pMsg, const Component *comp, + unsigned int subsystem_id) { /* Determine driver & parameter */ unsigned int param_id = 0; @@ -281,7 +283,7 @@ static bool _handleMsgTypePOST(OCMPMessageFrame *pMsg, const Component *comp, un } break; case OCMP_ACTION_TYPE_ACTIVE: - if (_handle_post_active(pMsg,subsystem_id)) { + if (_handle_post_active(pMsg, subsystem_id)) { dev_handled = true; } break; @@ -290,7 +292,7 @@ static bool _handleMsgTypePOST(OCMPMessageFrame *pMsg, const Component *comp, un dev_handled = true; } break; -/* case OCMP_ACTION_REPLY: + /* case OCMP_ACTION_REPLY: if (_handle_post_reply(pMsg, *buf_ptr)) { dev_handled = true; } @@ -331,7 +333,8 @@ static bool ocmp_route(OCMPMessageFrame *pMsg, unsigned int subsystem_id) LOGGER_ERROR("Component %d out of bounds\n", pMsg->message.componentID); return false; } - const Component *comp = &subsystem->components[(pMsg->message.componentID)-1]; + const Component *comp = + &subsystem->components[(pMsg->message.componentID) - 1]; /* TODO: clean up special handling for commands */ bool dev_handled = false; switch (pMsg->message.msgtype) { @@ -356,13 +359,15 @@ static bool ocmp_route(OCMPMessageFrame *pMsg, unsigned int subsystem_id) pMsg->message.parameters = 0x00; } /* The main exception to the flow right now is POST - check for it first */ - if ((pMsg->message.msgtype == OCMP_MSG_TYPE_POST) && (pMsg->message.action == OCMP_ACTION_TYPE_ACTIVE)) { + if ((pMsg->message.msgtype == OCMP_MSG_TYPE_POST) && + (pMsg->message.action == OCMP_ACTION_TYPE_ACTIVE)) { pMsg->message.action = OCMP_ACTION_TYPE_REPLY; - Util_enqueueMsg(postRxMsgQueue, semPOSTMsg, (uint8_t*) pMsg); + Util_enqueueMsg(postRxMsgQueue, semPOSTMsg, (uint8_t *)pMsg); } else { /* Send reply to the middleware */ pMsg->message.action = OCMP_ACTION_TYPE_REPLY; - Util_enqueueMsg(bigBrotherTxMsgQueue, semBigBrotherMsg, (uint8_t *)pMsg); + Util_enqueueMsg(bigBrotherTxMsgQueue, semBigBrotherMsg, + (uint8_t *)pMsg); } return true; } @@ -380,7 +385,7 @@ static void _subsystem_event_loop(UArg a0, UArg a1) if (Semaphore_pend(ss->sem, BIOS_WAIT_FOREVER)) { while (!Queue_empty(ss->msgQueue)) { OCMPMessageFrame *pMsg = - (OCMPMessageFrame *) Util_dequeueMsg(ss->msgQueue); + (OCMPMessageFrame *)Util_dequeueMsg(ss->msgQueue); if (pMsg) { /* Attempt to route the message to the correct driver @@ -395,8 +400,9 @@ static void _subsystem_event_loop(UArg a0, UArg a1) } } -static void subsystem_init(OCMPSubsystem ss_id) { - OCSubsystem *ss = (OCSubsystem*)malloc(sizeof(OCSubsystem)); +static void subsystem_init(OCMPSubsystem ss_id) +{ + OCSubsystem *ss = (OCSubsystem *)malloc(sizeof(OCSubsystem)); if (!ss) { return; } @@ -408,22 +414,24 @@ static void subsystem_init(OCMPSubsystem ss_id) { ss->sem = Semaphore_handle(&ss->semStruct); if (!ss->sem) { LOGGER_DEBUG("SS REG:ERROR:: Failed in Creating RX Semaphore for " - "subsystem %d\n", ss_id); + "subsystem %d\n", + ss_id); } /* Create Message Queue for RX Messages */ ss->msgQueue = Util_constructQueue(&ss->queueStruct); if (!ss->msgQueue) { LOGGER_ERROR("SS REG:ERROR:: Failed in Constructing Message Queue for " - "RX Message for subsystem %d\n", ss_id); + "RX Message for subsystem %d\n", + ss_id); } /* Spin up the task */ Task_Params taskParams; Task_Params_init(&taskParams); - taskParams.stack = OC_task_stack[ss_id];// ss->taskStack; - taskParams.stackSize = OC_TASK_STACK_SIZE;//ss->taskStackSize; - taskParams.priority = OC_TASK_PRIORITY;//ss->taskPriority; + taskParams.stack = OC_task_stack[ss_id]; // ss->taskStack; + taskParams.stackSize = OC_TASK_STACK_SIZE; //ss->taskStackSize; + taskParams.priority = OC_TASK_PRIORITY; //ss->taskPriority; taskParams.arg0 = (UArg)ss; taskParams.arg1 = ss_id; @@ -431,24 +439,27 @@ static void subsystem_init(OCMPSubsystem ss_id) { LOGGER_DEBUG("SS REG:DEBUG:: Creating Task for Subsystem %d\n", ss_id); } -void SSRegistry_init(void) { +void SSRegistry_init(void) +{ for (OCMPSubsystem i = (OCMPSubsystem)0; i < SUBSYSTEM_COUNT; ++i) { subsystem_init(i); } } -OCSubsystem* SSRegistry_Get(OCMPSubsystem ss_id) { +OCSubsystem *SSRegistry_Get(OCMPSubsystem ss_id) +{ if (ss_id >= SUBSYSTEM_COUNT) { return NULL; } return ss_reg[ss_id]; } -bool SSRegistry_sendMessage(OCMPSubsystem ss_id, void *pMsg) { +bool SSRegistry_sendMessage(OCMPSubsystem ss_id, void *pMsg) +{ OCSubsystem *ss = SSRegistry_Get(ss_id); if (!ss) { return false; } - return Util_enqueueMsg(ss->msgQueue, ss->sem, (uint8_t*) pMsg); + return Util_enqueueMsg(ss->msgQueue, ss->sem, (uint8_t *)pMsg); } diff --git a/firmware/ec/src/registry/SSRegistry.h b/firmware/ec/src/registry/SSRegistry.h index e19d345073..bf03d8aef6 100644 --- a/firmware/ec/src/registry/SSRegistry.h +++ b/firmware/ec/src/registry/SSRegistry.h @@ -46,7 +46,7 @@ void SSRegistry_init(void); * @param ss_id The ID of the requested subsystem * @return #OCSubsystem pointer if valid ID, else NULL */ -OCSubsystem* SSRegistry_Get(OCMPSubsystem ss_id); +OCSubsystem *SSRegistry_Get(OCMPSubsystem ss_id); /** * Enters a message into the desired subsystem's message queue diff --git a/firmware/ec/src/subsystem/gpp/ebmp.c b/firmware/ec/src/subsystem/gpp/ebmp.c index 6622239ddd..248a530216 100644 --- a/firmware/ec/src/subsystem/gpp/ebmp.c +++ b/firmware/ec/src/subsystem/gpp/ebmp.c @@ -172,51 +172,49 @@ void ebmp_check_soc_plt_reset(void) *****************************************************************************/ void ebmp_check_boot_pin_status(void) { - int32_t bootstatus_1 = 0; int32_t bootstatus_2 = 0; bootstatus_1 = OcGpio_read(pin_ap_boot_alert1); bootstatus_2 = OcGpio_read(pin_ap_boot_alert2); if (!secondIteration) { - if (bootstatus_2 == 0) { - if (bootstatus_1) { - apState = STATE_T2; // s5_09(PL3) = 0 , s0_59(PE3) = 1 - } else { - apState = STATE_T1; // s5_09(PL3) = 0 , s0_59(PE3) = 0 - } + if (bootstatus_2 == 0) { + if (bootstatus_1) { + apState = STATE_T2; // s5_09(PL3) = 0 , s0_59(PE3) = 1 } else { - if (bootstatus_1) { - apState = STATE_T3; // s5_09(PL3) = 1 , s0_59(PE3) = 1 - } - else { - apState = STATE_T4; // s5_09(PL3) = 1 , s0_59(PE3) = 0, - secondIteration = 1; - } + apState = STATE_T1; // s5_09(PL3) = 0 , s0_59(PE3) = 0 } } else { - if (bootstatus_2 == 0) { - if (bootstatus_1) { - apState = STATE_T6; // 5_09(PL3) = 0, s0_59(PE3) = 1 - } else { - apState = STATE_T5; // s5_09(PL3) = 0, s0_59(PE3) = 0 - } + if (bootstatus_1) { + apState = STATE_T3; // s5_09(PL3) = 1 , s0_59(PE3) = 1 } else { - if (bootstatus_1) { - apState = STATE_T7; // s5_09(PL3) = 1, s0_59(PE3) = 1 - secondIteration = 0; - } else { - apState = STATE_INVALID; // s5_09(PL3) = 1, s0_59(PE3) = 0, - } + apState = STATE_T4; // s5_09(PL3) = 1 , s0_59(PE3) = 0, + secondIteration = 1; } } + } else { + if (bootstatus_2 == 0) { + if (bootstatus_1) { + apState = STATE_T6; // 5_09(PL3) = 0, s0_59(PE3) = 1 + } else { + apState = STATE_T5; // s5_09(PL3) = 0, s0_59(PE3) = 0 + } + } else { + if (bootstatus_1) { + apState = STATE_T7; // s5_09(PL3) = 1, s0_59(PE3) = 1 + secondIteration = 0; + } else { + apState = STATE_INVALID; // s5_09(PL3) = 1, s0_59(PE3) = 0, + } + } + } } - /***************************************************************************** * Internal IRQ handler - reads in triggered interrupts and dispatches CBs *****************************************************************************/ -static void ebmp_handle_irq(void *context) { +static void ebmp_handle_irq(void *context) +{ apBootMonitor alertPin = (apBootMonitor)context; if (alertPin == AP_RESET) { ebmp_check_soc_plt_reset(); @@ -234,31 +232,38 @@ static void ebmp_handle_irq(void *context) { *****************************************************************************/ void ebmp_init(Gpp_gpioCfg *driver) { - pin_ap_boot_alert1 = &driver->pin_ap_boot_alert1; - pin_ap_boot_alert2 = &driver->pin_ap_boot_alert2; - pin_soc_pltrst_n = &driver->pin_soc_pltrst_n; - pin_soc_corepwr_ok = &driver->pin_soc_corepwr_ok; + pin_ap_boot_alert1 = &driver->pin_ap_boot_alert1; + pin_ap_boot_alert2 = &driver->pin_ap_boot_alert2; + pin_soc_pltrst_n = &driver->pin_soc_pltrst_n; + pin_soc_corepwr_ok = &driver->pin_soc_corepwr_ok; - if (pin_ap_boot_alert1->port) { - const uint32_t pin_evt_cfg = OCGPIO_CFG_INPUT | OCGPIO_CFG_INT_BOTH_EDGES; - if (OcGpio_configure(pin_ap_boot_alert1, pin_evt_cfg) < OCGPIO_SUCCESS) { + if (pin_ap_boot_alert1->port) { + const uint32_t pin_evt_cfg = + OCGPIO_CFG_INPUT | OCGPIO_CFG_INT_BOTH_EDGES; + if (OcGpio_configure(pin_ap_boot_alert1, pin_evt_cfg) < + OCGPIO_SUCCESS) { return RETURN_NOTOK; } /* Use a threaded interrupt to handle IRQ */ - ThreadedInt_Init(pin_ap_boot_alert1, ebmp_handle_irq, (void *)AP_BOOT_PROGRESS_MONITOR_1); + ThreadedInt_Init(pin_ap_boot_alert1, ebmp_handle_irq, + (void *)AP_BOOT_PROGRESS_MONITOR_1); } if (pin_ap_boot_alert2->port) { - const uint32_t pin_evt_cfg = OCGPIO_CFG_INPUT | OCGPIO_CFG_INT_BOTH_EDGES; - if (OcGpio_configure(pin_ap_boot_alert2, pin_evt_cfg) < OCGPIO_SUCCESS) { + const uint32_t pin_evt_cfg = + OCGPIO_CFG_INPUT | OCGPIO_CFG_INT_BOTH_EDGES; + if (OcGpio_configure(pin_ap_boot_alert2, pin_evt_cfg) < + OCGPIO_SUCCESS) { return RETURN_NOTOK; } /* Use a threaded interrupt to handle IRQ */ - ThreadedInt_Init(pin_ap_boot_alert2, ebmp_handle_irq, (void *)AP_BOOT_PROGRESS_MONITOR_2); + ThreadedInt_Init(pin_ap_boot_alert2, ebmp_handle_irq, + (void *)AP_BOOT_PROGRESS_MONITOR_2); } if (pin_soc_pltrst_n->port) { - const uint32_t pin_evt_cfg = OCGPIO_CFG_INPUT | OCGPIO_CFG_INT_BOTH_EDGES; + const uint32_t pin_evt_cfg = + OCGPIO_CFG_INPUT | OCGPIO_CFG_INT_BOTH_EDGES; if (OcGpio_configure(pin_soc_pltrst_n, pin_evt_cfg) < OCGPIO_SUCCESS) { return RETURN_NOTOK; } @@ -306,32 +311,27 @@ void ebmp_task_fxn(UArg a0, UArg a1) */ // What is the difference between T0 to T1? Nothing! So better // to start counter with T1 - case STATE_T0: - { + case STATE_T0: { //oldState = apState; ebmp_restart_timer(500); break; } - case STATE_T1: - { + case STATE_T1: { DEBUG("EBMP:INFO::STATE_T1 AP out of reset.\n"); ebmp_restart_timer(500); break; } - case STATE_T2: - { + case STATE_T2: { DEBUG("EBMP:INFO::STATE_T2 Coreboot ROM Stage.\n"); ebmp_restart_timer(500); break; } - case STATE_T3: - { + case STATE_T3: { DEBUG("EBMP:INFO::STATE_T3 Coreboot RAM stage.\n"); ebmp_restart_timer(500); break; } - case STATE_T4: - { + case STATE_T4: { DEBUG("EBMP:INFO::STATE_T4 Coreboot configures SeaBIOS to load OS.\n"); ebmp_restart_timer(1000); /* @@ -342,8 +342,7 @@ void ebmp_task_fxn(UArg a0, UArg a1) //bootOption(); break; } - case STATE_T5: - { + case STATE_T5: { DEBUG("EBMP:INFO::STATE_T5 SeaBIOS loads OS.\n"); ebmp_restart_timer(10000); /* @@ -354,16 +353,14 @@ void ebmp_task_fxn(UArg a0, UArg a1) //bootOption(); break; } - case STATE_T6: - { + case STATE_T6: { DEBUG("EBMP:INFO::STATE_T6 Watchdog Daemon started.\n"); /* OC-Watchdog started */ ebmp_restart_timer(10000); break; } /*Fully booted */ - case STATE_T7: - { + case STATE_T7: { DEBUG("EBMP:INFO:: STATE_T7 AP Watchdog daemon process responds to EP request.\n"); //Semaphore_post(apStateSem); /* Stop timer. It will be used by OCWatchdog */ @@ -373,15 +370,14 @@ void ebmp_task_fxn(UArg a0, UArg a1) // Semaphore_OCWatchdog(); break; } - default: - { + default: { DEBUG("EBMP:ERROR:: Invalid state\n"); } } DEBUG("EBMP:INFO:: Boot Monitor Pin 1 [PE3] : %d Boot Monitor Pin 2 [PL3] : %d SOC PLTRST : %d.\n", - OcGpio_read(pin_ap_boot_alert1)? 1: 0, - OcGpio_read(pin_ap_boot_alert2)? 1: 0, - OcGpio_read(pin_soc_pltrst_n)? 1: 0); + OcGpio_read(pin_ap_boot_alert1) ? 1 : 0, + OcGpio_read(pin_ap_boot_alert2) ? 1 : 0, + OcGpio_read(pin_soc_pltrst_n) ? 1 : 0); oldState = apState; } } diff --git a/firmware/ec/src/subsystem/gpp/gpp.c b/firmware/ec/src/subsystem/gpp/gpp.c index d493856d4c..8a49cfa5dc 100644 --- a/firmware/ec/src/subsystem/gpp/gpp.c +++ b/firmware/ec/src/subsystem/gpp/gpp.c @@ -52,7 +52,7 @@ bool gpp_pmic_control(Gpp_gpioCfg *driver, uint8_t control) { bool ret = false; - if(control == OC_PMIC_ENABLE) { + if (control == OC_PMIC_ENABLE) { /*TODO:: Disabling for USB debugging*/ OcGpio_write(&driver->pin_ap_12v_onoff, false); @@ -67,10 +67,10 @@ bool gpp_pmic_control(Gpp_gpioCfg *driver, uint8_t control) OcGpio_write(&driver->pin_ap_12v_onoff, true); SysCtlDelay(100); - if(gpp_check_core_power(driver)) { + if (gpp_check_core_power(driver)) { //OcGpio_write(&cfg->pin_ec_reset_to_proc, true); //SysCtlDelay(10); - if(gpp_check_processor_reset(driver)) { + if (gpp_check_processor_reset(driver)) { ret = true; LOGGER_DEBUG("GPP:INFO:: Processor out of reset.\n"); } @@ -104,39 +104,40 @@ bool gpp_pwrgd_protection(Gpp_gpioCfg *driver) /***************************************************************************** * gpp_pre_init : Intiliazes all GPIO's required for initialization. *****************************************************************************/ -bool gpp_pre_init(void* driver, void *returnValue) +bool gpp_pre_init(void *driver, void *returnValue) { Gpp_gpioCfg *gpioCfg = (Gpp_gpioCfg *)driver; OcGpio_configure(&gpioCfg->pin_soc_pltrst_n, OCGPIO_CFG_INPUT); OcGpio_configure(&gpioCfg->pin_soc_corepwr_ok, OCGPIO_CFG_INPUT); OcGpio_configure(&gpioCfg->pin_msata_ec_das, OCGPIO_CFG_INPUT); OcGpio_configure(&gpioCfg->pin_lt4256_ec_pwrgd, OCGPIO_CFG_INPUT); - OcGpio_configure(&gpioCfg->pin_ap_12v_onoff, OCGPIO_CFG_OUTPUT | - OCGPIO_CFG_OUT_LOW); - OcGpio_configure(&gpioCfg->pin_ec_reset_to_proc, OCGPIO_CFG_OUTPUT | - OCGPIO_CFG_OUT_HIGH); + OcGpio_configure(&gpioCfg->pin_ap_12v_onoff, + OCGPIO_CFG_OUTPUT | OCGPIO_CFG_OUT_LOW); + OcGpio_configure(&gpioCfg->pin_ec_reset_to_proc, + OCGPIO_CFG_OUTPUT | OCGPIO_CFG_OUT_HIGH); return true; } /***************************************************************************** * gpp_post_init : power on devices required after GPP init is success. *****************************************************************************/ -bool gpp_post_init(void* driver, void *ssState) +bool gpp_post_init(void *driver, void *ssState) { bool ret = false; - eSubSystemStates *newState = (eSubSystemStates*)ssState; + eSubSystemStates *newState = (eSubSystemStates *)ssState; if (!gpp_pwrgd_protection(driver)) { - LOGGER_DEBUG("GPP:INFO:: LT4256 EC power good is for genration of 12V ok.\n"); + LOGGER_DEBUG( + "GPP:INFO:: LT4256 EC power good is for genration of 12V ok.\n"); } else { *newState = SS_STATE_FAULTY; return ret; } //Power on processor. - if(gpp_pmic_control(driver, OC_PMIC_ENABLE)) { + if (gpp_pmic_control(driver, OC_PMIC_ENABLE)) { *newState = SS_STATE_CFG; ret = true; } else { - *newState = SS_STATE_FAULTY; + *newState = SS_STATE_FAULTY; } /*mSATA DAS not helping with anything as of now.*/ // if (!gpp_msata_das()) { @@ -165,6 +166,7 @@ static bool gpp_ap_reset(Gpp_gpioCfg *driver) /***************************************************************************** * gpp_ap_reset : Calls application processor reset function. *****************************************************************************/ -bool GPP_ap_Reset(void *driver, void *params){ +bool GPP_ap_Reset(void *driver, void *params) +{ return (gpp_ap_reset(driver) == RETURN_OK); } diff --git a/firmware/ec/src/subsystem/hci/hci.c b/firmware/ec/src/subsystem/hci/hci.c index 56e6ca5f02..7a10fde671 100644 --- a/firmware/ec/src/subsystem/hci/hci.c +++ b/firmware/ec/src/subsystem/hci/hci.c @@ -18,9 +18,8 @@ *****************************************************************************/ /* Global Task Configuration Variables */ -bool HCI_Init(void* driver, void *return_buf) +bool HCI_Init(void *driver, void *return_buf) { HciBuzzer_init(); return true; } - diff --git a/firmware/ec/src/subsystem/hci/hci_buzzer.c b/firmware/ec/src/subsystem/hci/hci_buzzer.c index 0d312b40c4..e6addb27d9 100644 --- a/firmware/ec/src/subsystem/hci/hci_buzzer.c +++ b/firmware/ec/src/subsystem/hci/hci_buzzer.c @@ -13,9 +13,9 @@ extern HciBuzzer_Cfg gbc_hci_buzzer; #define HCI gbc_hci_buzzer -ReturnStatus HciBuzzer_init(void) { - if (OcGpio_configure(&HCI.pin_en, OCGPIO_CFG_OUTPUT) < - OCGPIO_SUCCESS) { +ReturnStatus HciBuzzer_init(void) +{ + if (OcGpio_configure(&HCI.pin_en, OCGPIO_CFG_OUTPUT) < OCGPIO_SUCCESS) { return RETURN_NOTOK; } return RETURN_OK; diff --git a/firmware/ec/src/subsystem/hci/led/hci_led.c b/firmware/ec/src/subsystem/hci/led/hci_led.c index f87906e7d5..45701867a1 100644 --- a/firmware/ec/src/subsystem/hci/led/hci_led.c +++ b/firmware/ec/src/subsystem/hci/led/hci_led.c @@ -19,7 +19,7 @@ #include extern void *led_hci_ioexp; -#define HCI ((HciLedCfg*)led_hci_ioexp) +#define HCI ((HciLedCfg *)led_hci_ioexp) //***************************************************************************** // HANDLES DEFINITION @@ -28,8 +28,8 @@ ledSystemState s_ledState = SYSTEM_BOOT; /* TODO: Change the following approach for booting up and resetting led counter * for synchronization in future if needed */ -#define HCI_LED_TASK_PRIORITY 2 -#define HCI_LED_TASK_STACK_SIZE 1024 +#define HCI_LED_TASK_PRIORITY 2 +#define HCI_LED_TASK_STACK_SIZE 1024 static Char hciLedTaskStack[HCI_LED_TASK_STACK_SIZE]; @@ -48,8 +48,8 @@ static void HCI_LedTaskFxn(UArg a0, UArg a1) while (true) { if (s_ledState == SYSTEM_BOOT) { //hci_led_system_boot(); - } else if ((s_ledState == SYSTEM_RUNNING) - || (s_ledState == SYSTEM_FAILURE)) { + } else if ((s_ledState == SYSTEM_RUNNING) || + (s_ledState == SYSTEM_FAILURE)) { OcGpio_write(&HCI->pin_ec_gpio, false); Task_sleep(100); OcGpio_write(&HCI->pin_ec_gpio, true); diff --git a/firmware/ec/src/subsystem/obc/obc.c b/firmware/ec/src/subsystem/obc/obc.c index 055f9f56e8..b4984c5e78 100644 --- a/firmware/ec/src/subsystem/obc/obc.c +++ b/firmware/ec/src/subsystem/obc/obc.c @@ -23,43 +23,43 @@ extern const Sdr_gpioCfg sdr_gpioCfg; -bool obc_pre_init(void* driver, void *returnValue); +bool obc_pre_init(void *driver, void *returnValue); ReturnStatus iridium_sw_reset(const Iridium_Cfg *iridium) { - DEBUG("Resetting Iridium module wait\n"); + DEBUG("Resetting Iridium module wait\n"); - OcGpio_configure(&iridium->pin_enable, OCGPIO_CFG_OUTPUT | - OCGPIO_CFG_OUT_LOW); - OcGpio_configure(&iridium->pin_nw_avail, OCGPIO_CFG_INPUT); + OcGpio_configure(&iridium->pin_enable, + OCGPIO_CFG_OUTPUT | OCGPIO_CFG_OUT_LOW); + OcGpio_configure(&iridium->pin_nw_avail, OCGPIO_CFG_INPUT); - /* reset - for proper reset, Iridium should be disabled for ~2s */ - OcGpio_write(&iridium->pin_enable, false); /* Just to be sure it's low */ - Task_sleep(2100); // TODO: should be ~2s - OcGpio_write(&iridium->pin_enable, true); - Task_sleep(200); // TODO: idk...probably doesn't need to be lon - return RETURN_OK; + /* reset - for proper reset, Iridium should be disabled for ~2s */ + OcGpio_write(&iridium->pin_enable, false); /* Just to be sure it's low */ + Task_sleep(2100); // TODO: should be ~2s + OcGpio_write(&iridium->pin_enable, true); + Task_sleep(200); // TODO: idk...probably doesn't need to be lon + return RETURN_OK; } bool IRIDIUM_reset(void *driver, void *params) { - ReturnStatus status = RETURN_OK; - status = iridium_sw_reset(driver); - return status; + ReturnStatus status = RETURN_OK; + status = iridium_sw_reset(driver); + return status; } -bool obc_pre_init(void* driver, void *returnValue) +bool obc_pre_init(void *driver, void *returnValue) { /* TODO: temporary */ /* TODO: this is a problem - need 12V for Iridium (plus 5v reg enabled) * I'm not sold on OBC directly enabling these lines, but there isn't * a great alternative at this point */ - Obc_gpioCfg *gpioCfg = (Obc_gpioCfg*)driver; - sdr_pwr_control(&sdr_gpioCfg,OC_SDR_ENABLE); + Obc_gpioCfg *gpioCfg = (Obc_gpioCfg *)driver; + sdr_pwr_control(&sdr_gpioCfg, OC_SDR_ENABLE); if (gpioCfg->pin_pwr_en) { if (OcGpio_configure(gpioCfg->pin_pwr_en, - OCGPIO_CFG_OUTPUT | OCGPIO_CFG_OUT_HIGH) - < OCGPIO_SUCCESS) { + OCGPIO_CFG_OUTPUT | OCGPIO_CFG_OUT_HIGH) < + OCGPIO_SUCCESS) { return false; } } diff --git a/firmware/ec/src/subsystem/rffe/rffe.c b/firmware/ec/src/subsystem/rffe/rffe.c index fccad0f510..1c2945e054 100644 --- a/firmware/ec/src/subsystem/rffe/rffe.c +++ b/firmware/ec/src/subsystem/rffe/rffe.c @@ -38,7 +38,7 @@ ** RETURN TYPE : ReturnStatus ** *****************************************************************************/ -void rffe_pwr_control(Fe_gpioCfg* feCfg, uint8_t control) +void rffe_pwr_control(Fe_gpioCfg *feCfg, uint8_t control) { if (control == OC_FE_ENABLE) { OcGpio_write(&feCfg->pin_fe_12v_ctrl, true); @@ -59,30 +59,30 @@ void rffe_pwr_control(Fe_gpioCfg* feCfg, uint8_t control) *****************************************************************************/ bool rffe_pre_init(void *driver, void *returnValue) { - Fe_Cfg* feCfg = (Fe_Cfg*)driver; + Fe_Cfg *feCfg = (Fe_Cfg *)driver; /* Initialize IO pins */ OcGpio_configure(&feCfg->fe_gpio_cfg->pin_rf_pgood_ldo, OCGPIO_CFG_INPUT); - OcGpio_configure(&feCfg->fe_gpio_cfg->pin_fe_12v_ctrl, OCGPIO_CFG_OUTPUT | - OCGPIO_CFG_OUT_LOW); + OcGpio_configure(&feCfg->fe_gpio_cfg->pin_fe_12v_ctrl, + OCGPIO_CFG_OUTPUT | OCGPIO_CFG_OUT_LOW); /* RF power on */ - rffe_pwr_control(feCfg->fe_gpio_cfg,OC_FE_ENABLE); + rffe_pwr_control(feCfg->fe_gpio_cfg, OC_FE_ENABLE); NOP_DELAY(); /* Check Powergood status(SDR_REG_LDO_PGOOD) */ - if(OcGpio_read(&feCfg->fe_gpio_cfg->pin_rf_pgood_ldo)) { + if (OcGpio_read(&feCfg->fe_gpio_cfg->pin_rf_pgood_ldo)) { LOGGER("RFFE:INFO:: PowerGood Status is OK.\n"); - } - else { + } else { LOGGER("RFFE:INFO:: PowerGood Status is NOT OK.\n"); } /* Initilize FE IO Expander GPIO Controls (those not already controlled * by a driver) */ - Fe_Ch2_Gain_Cfg* feCh2GainCfg = (Fe_Ch2_Gain_Cfg*)(feCfg->fe_ch2_gain_cfg); - Fe_Ch2_Lna_Cfg* feCh2LnaCfg = (Fe_Ch2_Lna_Cfg*)(feCfg->fe_ch2_lna_cfg); - Fe_Watchdog_Cfg* feWatchDogCfg = (Fe_Watchdog_Cfg*)(feCfg->fe_watchdog_cfg); + Fe_Ch2_Gain_Cfg *feCh2GainCfg = (Fe_Ch2_Gain_Cfg *)(feCfg->fe_ch2_gain_cfg); + Fe_Ch2_Lna_Cfg *feCh2LnaCfg = (Fe_Ch2_Lna_Cfg *)(feCfg->fe_ch2_lna_cfg); + Fe_Watchdog_Cfg *feWatchDogCfg = + (Fe_Watchdog_Cfg *)(feCfg->fe_watchdog_cfg); OcGpio_configure(&feCh2GainCfg->pin_ch1_2g_lb_band_sel_l, OCGPIO_CFG_OUTPUT); OcGpio_configure(&feCh2LnaCfg->pin_ch1_rf_pwr_off, @@ -99,21 +99,17 @@ bool rffe_pre_init(void *driver, void *returnValue) return true; } -bool rffe_post_init(void* driver, void *ssState) +bool rffe_post_init(void *driver, void *ssState) { ReturnStatus status = RETURN_OK; - eSubSystemStates *newState = (eSubSystemStates*)ssState; + eSubSystemStates *newState = (eSubSystemStates *)ssState; - Fe_Ch_Pwr_Cfg fe_ch1_pwrcfg = { - .channel = RFFE_CHANNEL1, - .fe_Rffecfg = (Fe_Cfg*)driver - }; + Fe_Ch_Pwr_Cfg fe_ch1_pwrcfg = { .channel = RFFE_CHANNEL1, + .fe_Rffecfg = (Fe_Cfg *)driver }; + + Fe_Ch_Pwr_Cfg fe_ch2_pwrcfg = { .channel = RFFE_CHANNEL2, + .fe_Rffecfg = (Fe_Cfg *)driver }; - Fe_Ch_Pwr_Cfg fe_ch2_pwrcfg = { - .channel = RFFE_CHANNEL2, - .fe_Rffecfg = (Fe_Cfg*)driver - }; - status |= rffe_ctrl_configure_power_amplifier(&fe_ch1_pwrcfg, RFFE_ACTIVATE_PA); @@ -124,7 +120,7 @@ bool rffe_post_init(void* driver, void *ssState) /*Updating subsystem sate info*/ LOGGER_DEBUG("RFFE:INFO:: Subsystem device check and configuration is %s\n", - ((status == RETURN_OK) ? "successful" : "unsuccessful")); + ((status == RETURN_OK) ? "successful" : "unsuccessful")); if (status == RETURN_OK) { *newState = SS_STATE_CFG; diff --git a/firmware/ec/src/subsystem/rffe/rffe_ctrl.c b/firmware/ec/src/subsystem/rffe/rffe_ctrl.c index 8617e1f7d7..30b524b954 100644 --- a/firmware/ec/src/subsystem/rffe/rffe_ctrl.c +++ b/firmware/ec/src/subsystem/rffe/rffe_ctrl.c @@ -42,8 +42,9 @@ ReturnStatus rffe_ctrl_configure_power_amplifier(Fe_Ch_Pwr_Cfg *pwrCfg, { ReturnStatus status = RETURN_OK; rffeBand band = RFFE_SHUTDOWN; - rffeChannel channel = pwrCfg->channel; - const Fe_Ch2_Gain_Cfg *fe_ch1_rf_band_sel = pwrCfg->fe_Rffecfg->fe_ch2_gain_cfg; + rffeChannel channel = pwrCfg->channel; + const Fe_Ch2_Gain_Cfg *fe_ch1_rf_band_sel = + pwrCfg->fe_Rffecfg->fe_ch2_gain_cfg; const Fe_Ch2_Lna_Cfg *fe_ch1_rf_pwr = pwrCfg->fe_Rffecfg->fe_ch2_lna_cfg; const Fe_Watchdog_Cfg *fe_ch2_rf_pwr = pwrCfg->fe_Rffecfg->fe_watchdog_cfg; @@ -80,14 +81,14 @@ ReturnStatus rffe_ctrl_configure_power_amplifier(Fe_Ch_Pwr_Cfg *pwrCfg, bool RFFE_enablePA(void *driver, void *params) { - Fe_Ch_Pwr_Cfg *channel = (Fe_Ch_Pwr_Cfg*)driver; - return (rffe_ctrl_configure_power_amplifier(channel, - RFFE_ACTIVATE_PA) == RETURN_OK); + Fe_Ch_Pwr_Cfg *channel = (Fe_Ch_Pwr_Cfg *)driver; + return (rffe_ctrl_configure_power_amplifier(channel, RFFE_ACTIVATE_PA) == + RETURN_OK); } bool RFFE_disablePA(void *driver, void *params) { - Fe_Ch_Pwr_Cfg *channel = (Fe_Ch_Pwr_Cfg*)driver; - return (rffe_ctrl_configure_power_amplifier(channel, - RFFE_DEACTIVATE_PA) == RETURN_OK); + Fe_Ch_Pwr_Cfg *channel = (Fe_Ch_Pwr_Cfg *)driver; + return (rffe_ctrl_configure_power_amplifier(channel, RFFE_DEACTIVATE_PA) == + RETURN_OK); } \ No newline at end of file diff --git a/firmware/ec/src/subsystem/rffe/rffe_powermonitor.c b/firmware/ec/src/subsystem/rffe/rffe_powermonitor.c index 84bb3f2cf2..4b6c779777 100644 --- a/firmware/ec/src/subsystem/rffe/rffe_powermonitor.c +++ b/firmware/ec/src/subsystem/rffe/rffe_powermonitor.c @@ -19,8 +19,8 @@ #include /* RFFE device config */ -extern void* fe_ch1_ads7830; -extern void* fe_ch2_ads7830; +extern void *fe_ch1_ads7830; +extern void *fe_ch2_ads7830; /***************************************************************************** * HANDLES DEFINITION @@ -49,7 +49,8 @@ static ReturnStatus rffe_powermonitor_read_adcpower(const I2C_Dev *i2c_dev, uint16_t *rfpower) { DEBUG("RFPOWERMONITOR:INFO:: Configuring ADS7830 device 0x%x with " - "Command Byte Value 0x%x\n", i2c_dev->slave_addr, adcConfigValue); + "Command Byte Value 0x%x\n", + i2c_dev->slave_addr, adcConfigValue); I2C_Handle adcHandle = i2c_get_handle(i2c_dev->bus); if (!adcHandle) { @@ -66,7 +67,8 @@ static ReturnStatus rffe_powermonitor_read_adcpower(const I2C_Dev *i2c_dev, adcConfigValue, rfpower, 1); if (status != RETURN_OK) { LOGGER_ERROR("RFPOWERMONITOR:ERROR:: Failed reading power value from " - "ADS7830 device 0x%x.\n", i2c_dev->slave_addr); + "ADS7830 device 0x%x.\n", + i2c_dev->slave_addr); return RETURN_NOTOK; } @@ -85,8 +87,8 @@ static ReturnStatus rffe_powermonitor_read_adcpower(const I2C_Dev *i2c_dev, ** *****************************************************************************/ ReturnStatus rffe_powermonitor_read_power(const I2C_Dev *i2c_dev, - eRffeStatusParamId rfPowerSelect, - uint16_t *rfpower) + eRffeStatusParamId rfPowerSelect, + uint16_t *rfpower) { ReturnStatus status = RETURN_OK; uint8_t adcConfigValue = 0x00; @@ -178,8 +180,7 @@ static void rffe_powermonitor_task_fxn(UArg a0, UArg a1) /* Read RF FE Forward Power on channel 1 */ status = rffe_powermonitor_read_power(fe_ch1_ads7830, - RFFE_STAT_FW_POWER, - &rfPower); + RFFE_STAT_FW_POWER, &rfPower); if (status == RETURN_OK) { DEBUG("RFPOWERMONITOR:INFO:: RF Channel 1 Forward Power is %d.\n", rfPower); @@ -187,8 +188,7 @@ static void rffe_powermonitor_task_fxn(UArg a0, UArg a1) /* Read RF FE Forward Power on channel 2 */ status = rffe_powermonitor_read_power(fe_ch2_ads7830, - RFFE_STAT_FW_POWER, - &rfPower); + RFFE_STAT_FW_POWER, &rfPower); if (status == RETURN_OK) { DEBUG("RFPOWERMONITOR:INFO:: RF Channel 2 Forward Power is %d.\n", rfPower); diff --git a/firmware/ec/src/subsystem/sdr/sdr.c b/firmware/ec/src/subsystem/sdr/sdr.c index cb36f4cbee..7c0000a7a0 100644 --- a/firmware/ec/src/subsystem/sdr/sdr.c +++ b/firmware/ec/src/subsystem/sdr/sdr.c @@ -26,7 +26,6 @@ /* SDR device config */ - /***************************************************************************** ** FUNCTION NAME : sdr_pwr_control ** @@ -43,11 +42,11 @@ void sdr_pwr_control(Sdr_gpioCfg *sdr_gpioCfg, uint8_t control) * OBC and we don't want to configure then write if OBC has already * configured it (it'll reset Iridium that way) */ if (control == OC_SDR_ENABLE) { - OcGpio_configure(&sdr_gpioCfg->pin_trxfe_12v_onoff, OCGPIO_CFG_OUTPUT | - OCGPIO_CFG_OUT_HIGH); + OcGpio_configure(&sdr_gpioCfg->pin_trxfe_12v_onoff, + OCGPIO_CFG_OUTPUT | OCGPIO_CFG_OUT_HIGH); } else { - OcGpio_configure(&sdr_gpioCfg->pin_trxfe_12v_onoff, OCGPIO_CFG_OUTPUT | - OCGPIO_CFG_OUT_LOW); + OcGpio_configure(&sdr_gpioCfg->pin_trxfe_12v_onoff, + OCGPIO_CFG_OUTPUT | OCGPIO_CFG_OUT_LOW); } } @@ -106,7 +105,6 @@ static void sdr_control_reset(Sdr_gpioCfg *sdr_gpioCfg, uint8_t control) } else { OcGpio_write(&sdr_gpioCfg->pin_ec_trxfe_reset, false); } - } /***************************************************************************** @@ -119,7 +117,7 @@ static void sdr_control_reset(Sdr_gpioCfg *sdr_gpioCfg, uint8_t control) ** RETURN TYPE : Success or Failure ** *****************************************************************************/ -static ReturnStatus sdr_fx3_reset(Sdr_gpioCfg* fx3_cfg) +static ReturnStatus sdr_fx3_reset(Sdr_gpioCfg *fx3_cfg) { /*TODO: We need to figure out a way for configuring PCA pins on Intel reset.*/ OcGpio_configure(&fx3_cfg->pin_fx3_reset, OCGPIO_CFG_OUTPUT); @@ -137,7 +135,8 @@ static ReturnStatus sdr_fx3_reset(Sdr_gpioCfg* fx3_cfg) return RETURN_OK; } -bool SDR_fx3Reset(void *driver, void *params) { +bool SDR_fx3Reset(void *driver, void *params) +{ return (sdr_fx3_reset(driver) == RETURN_OK); } @@ -151,17 +150,17 @@ bool SDR_fx3Reset(void *driver, void *params) { ** RETURN TYPE : ePostCode ** *****************************************************************************/ -bool SDR_Init(void* driver, void *return_buf) +bool SDR_Init(void *driver, void *return_buf) { - Sdr_gpioCfg *sdr_gpioCfg = (Sdr_gpioCfg*)driver; + Sdr_gpioCfg *sdr_gpioCfg = (Sdr_gpioCfg *)driver; /* Initialize IO pins */ OcGpio_configure(&sdr_gpioCfg->pin_sdr_reg_ldo_pgood, OCGPIO_CFG_INPUT); - OcGpio_configure(&sdr_gpioCfg->pin_rf_fe_io_reset, OCGPIO_CFG_OUTPUT | - OCGPIO_CFG_OUT_LOW); - OcGpio_configure(&sdr_gpioCfg->pin_sdr_reset_in, OCGPIO_CFG_OUTPUT | - OCGPIO_CFG_OUT_LOW); - OcGpio_configure(&sdr_gpioCfg->pin_ec_trxfe_reset, OCGPIO_CFG_OUTPUT | - OCGPIO_CFG_OUT_LOW); + OcGpio_configure(&sdr_gpioCfg->pin_rf_fe_io_reset, + OCGPIO_CFG_OUTPUT | OCGPIO_CFG_OUT_LOW); + OcGpio_configure(&sdr_gpioCfg->pin_sdr_reset_in, + OCGPIO_CFG_OUTPUT | OCGPIO_CFG_OUT_LOW); + OcGpio_configure(&sdr_gpioCfg->pin_ec_trxfe_reset, + OCGPIO_CFG_OUTPUT | OCGPIO_CFG_OUT_LOW); /* Power On SDR */ sdr_pwr_control(sdr_gpioCfg, OC_SDR_ENABLE); @@ -183,10 +182,9 @@ bool SDR_Init(void* driver, void *return_buf) NOP_DELAY(); /* Check Powergood status(SDR_REG_LDO_PGOOD) */ - if(OcGpio_read(&sdr_gpioCfg->pin_sdr_reg_ldo_pgood)) { + if (OcGpio_read(&sdr_gpioCfg->pin_sdr_reg_ldo_pgood)) { LOGGER("SDR:INFO:: PowerGood Status is OK.\n"); - } - else { + } else { LOGGER("SDR:INFO:: PowerGood Status is NOT OK.\n"); } @@ -200,8 +198,9 @@ bool SDR_Init(void* driver, void *return_buf) return true; } -bool SDR_reset(void *driver, void *params) { - Sdr_gpioCfg *sdr_gpioCfg = (Sdr_gpioCfg*)driver; +bool SDR_reset(void *driver, void *params) +{ + Sdr_gpioCfg *sdr_gpioCfg = (Sdr_gpioCfg *)driver; if (OcGpio_write(&sdr_gpioCfg->pin_sdr_reset_in, false) <= OCGPIO_FAILURE) { return false; } diff --git a/firmware/ec/src/subsystem/sync/sync.c b/firmware/ec/src/subsystem/sync/sync.c index 678983d2ff..37fb4a30fb 100644 --- a/firmware/ec/src/subsystem/sync/sync.c +++ b/firmware/ec/src/subsystem/sync/sync.c @@ -29,7 +29,8 @@ static Sync_gpioCfg s_sync_gpiocfg; static Char syncGpsTaskStack[SYNC_GPS_TASK_STACK_SIZE]; Semaphore_Handle gpsSem; -static ReturnStatus SYNC_GpsCheckLock(Sync_gpioCfg *sync_gpiocfg, gpsStatus *gpsStatus) +static ReturnStatus SYNC_GpsCheckLock(Sync_gpioCfg *sync_gpiocfg, + gpsStatus *gpsStatus) { /* Get the "lock OK" status from LTE-LITE GPIO pin */ int locked = OcGpio_read(&(sync_gpiocfg->pin_r_lock_ok_ioexp)); @@ -78,7 +79,7 @@ static void SYNC_GpsTaskFxn(UArg a0, UArg a1) while (true) { if (Semaphore_pend(gpsSem, BIOS_WAIT_FOREVER)) { gpsStatus gpsStatus; - SYNC_GpsCheckLock(&s_sync_gpiocfg,&gpsStatus); + SYNC_GpsCheckLock(&s_sync_gpiocfg, &gpsStatus); DEBUG("SYNC:INFO:: GPS is %s.\n", (gpsStatus == GPS_LOCKED) ? "Locked" : "Not Locked"); } @@ -124,7 +125,7 @@ static void SYNC_GpsTaskInit(void) clkParams.startFlag = FALSE; /* Create a periodic Clock Instance with initial timeout= 10000(10 Secs) * and period = 10000(10 Secs) system time units */ - Clock_Handle clk = Clock_create((Clock_FuncPtr) SYNC_GpsClkFxn, 10000, + Clock_Handle clk = Clock_create((Clock_FuncPtr)SYNC_GpsClkFxn, 10000, &clkParams, NULL); if (!clk) { DEBUG("SYNC::Can't create GPS Polling clock\n"); @@ -139,12 +140,12 @@ static void SYNC_GpsTaskInit(void) bool SYNC_GpsStatus(void *driver, unsigned int param_id, void *return_buf) { - switch (param_id) { case 0: /* TODO: gross magic number */ if (SYNC_GpsCheckLock(driver, return_buf) == RETURN_OK) { DEBUG("SYNC:INFO:: GPS is %s.\n", - (*(gpsStatus *)return_buf == GPS_LOCKED) ? "Locked" : "Not Locked"); + (*(gpsStatus *)return_buf == GPS_LOCKED) ? "Locked" : + "Not Locked"); return true; } break; @@ -157,36 +158,40 @@ bool SYNC_GpsStatus(void *driver, unsigned int param_id, void *return_buf) bool SYNC_reset(void *driver, void *params) { - Sync_gpioCfg *sync_gpiocfg = (Sync_gpioCfg*)driver; - if (OcGpio_write(&sync_gpiocfg->pin_ec_sync_reset, false) <= OCGPIO_FAILURE) { + Sync_gpioCfg *sync_gpiocfg = (Sync_gpioCfg *)driver; + if (OcGpio_write(&sync_gpiocfg->pin_ec_sync_reset, false) <= + OCGPIO_FAILURE) { return false; } Task_sleep(100); - if (OcGpio_write(&sync_gpiocfg->pin_ec_sync_reset, true) <= OCGPIO_FAILURE) { + if (OcGpio_write(&sync_gpiocfg->pin_ec_sync_reset, true) <= + OCGPIO_FAILURE) { return false; } return true; } -bool SYNC_Init(void*driver, void *return_buf) +bool SYNC_Init(void *driver, void *return_buf) { - Sync_gpioCfg *sync_gpiocfg = (Sync_gpioCfg*)driver; + Sync_gpioCfg *sync_gpiocfg = (Sync_gpioCfg *)driver; /* Initialize IO pins */ - OcGpio_configure(&sync_gpiocfg->pin_ec_sync_reset, OCGPIO_CFG_OUTPUT | - OCGPIO_CFG_OUT_HIGH); + OcGpio_configure(&sync_gpiocfg->pin_ec_sync_reset, + OCGPIO_CFG_OUTPUT | OCGPIO_CFG_OUT_HIGH); OcGpio_configure(&sync_gpiocfg->pin_spdt_cntrl_lvl, OCGPIO_CFG_OUTPUT); - OcGpio_configure(&sync_gpiocfg->pin_warmup_survey_init_sel, OCGPIO_CFG_OUTPUT); + OcGpio_configure(&sync_gpiocfg->pin_warmup_survey_init_sel, + OCGPIO_CFG_OUTPUT); OcGpio_configure(&sync_gpiocfg->pin_r_phase_lock_ioexp, OCGPIO_CFG_INPUT); OcGpio_configure(&sync_gpiocfg->pin_r_lock_ok_ioexp, OCGPIO_CFG_INPUT); OcGpio_configure(&sync_gpiocfg->pin_r_alarm_ioexp, OCGPIO_CFG_INPUT); - OcGpio_configure(&sync_gpiocfg->pin_12v_reg_enb, OCGPIO_CFG_OUTPUT | - OCGPIO_CFG_OUT_HIGH); + OcGpio_configure(&sync_gpiocfg->pin_12v_reg_enb, + OCGPIO_CFG_OUTPUT | OCGPIO_CFG_OUT_HIGH); OcGpio_configure(&sync_gpiocfg->pin_temp_alert, OCGPIO_CFG_INPUT); - OcGpio_configure(&sync_gpiocfg->pin_spdt_cntrl_lte_cpu_gps_lvl, OCGPIO_CFG_OUTPUT); + OcGpio_configure(&sync_gpiocfg->pin_spdt_cntrl_lte_cpu_gps_lvl, + OCGPIO_CFG_OUTPUT); OcGpio_configure(&sync_gpiocfg->pin_init_survey_sel, OCGPIO_CFG_OUTPUT); - + /*Initiaize the local static driver config for the task*/ - s_sync_gpiocfg = *(Sync_gpioCfg*)driver; + s_sync_gpiocfg = *(Sync_gpioCfg *)driver; /* TODO: Launch task for GPS */ SYNC_GpsTaskInit(); return true; diff --git a/firmware/ec/src/subsystem/sys/sys.c b/firmware/ec/src/subsystem/sys/sys.c index b57f3c1ac9..1726f67781 100644 --- a/firmware/ec/src/subsystem/sys/sys.c +++ b/firmware/ec/src/subsystem/sys/sys.c @@ -19,13 +19,11 @@ #include #include -#define OC_MAC_ADDRESS_SIZE 13 +#define OC_MAC_ADDRESS_SIZE 13 extern POSTData PostResult[POST_RECORDS]; -typedef enum { - OC_SYS_CONF_MAC_ADDRESS = 0 -} eOCConfigParamId; +typedef enum { OC_SYS_CONF_MAC_ADDRESS = 0 } eOCConfigParamId; /* Resets the AP and then the EC */ bool SYS_cmdReset(void *driver, void *params) @@ -70,17 +68,13 @@ bool SYS_post_enable(void **postActivate) LOGGER("SYS:INFO:: Starting POST test for OpenCellular.\n"); //Permission granted from the System. //Sending the activate POST message to POST subsystem. - OCMPMessageFrame *postExeMsg = create_ocmp_msg_frame(OC_SS_SYS, - OCMP_MSG_TYPE_POST, - OCMP_AXN_TYPE_ACTIVE, - 0x00, - 0x00, - 1); + OCMPMessageFrame *postExeMsg = create_ocmp_msg_frame( + OC_SS_SYS, OCMP_MSG_TYPE_POST, OCMP_AXN_TYPE_ACTIVE, 0x00, 0x00, 1); if (postExeMsg != NULL) { status = RETURN_OK; *postActivate = (OCMPMessageFrame *)postExeMsg; } - return (status == RETURN_OK) ; + return (status == RETURN_OK); } /***************************************************************************** @@ -103,27 +97,28 @@ bool SYS_post_get_results(void **getpostResult) /* Get the subsystem info for which message is required */ OCMPMessageFrame *postResultMsg = create_ocmp_msg_frame( getpostResultMsg->message.subsystem, OCMP_MSG_TYPE_POST, - OCMP_AXN_TYPE_REPLY,0x00,0x00,40); + OCMP_AXN_TYPE_REPLY, 0x00, 0x00, 40); if (postResultMsg) { /* Getting data assigned*/ postResultMsg->header.ocmpSof = getpostResultMsg->header.ocmpSof; - postResultMsg->header.ocmpInterface = getpostResultMsg->header - .ocmpInterface; - postResultMsg->header.ocmpSeqNumber = getpostResultMsg->header - .ocmpSeqNumber; + postResultMsg->header.ocmpInterface = + getpostResultMsg->header.ocmpInterface; + postResultMsg->header.ocmpSeqNumber = + getpostResultMsg->header.ocmpSeqNumber; for (iter = 0; iter < POST_RECORDS; iter++) { - if (PostResult[iter].subsystem - == getpostResultMsg->message.ocmp_data[0]) { + if (PostResult[iter].subsystem == + getpostResultMsg->message.ocmp_data[0]) { postResultMsg->message.ocmp_data[(3 * index) + 0] = - PostResult[iter].subsystem; + PostResult[iter].subsystem; postResultMsg->message.ocmp_data[(3 * index) + 1] = - PostResult[iter].devSno; //Device serial Number + PostResult[iter].devSno; //Device serial Number postResultMsg->message.ocmp_data[(3 * index) + 2] = - PostResult[iter].status; //Status ok + PostResult[iter].status; //Status ok index++; } } - LOGGER_DEBUG("BIGBROTHER:INFO::POST message sent for subsystem 0x%x.\n"); + LOGGER_DEBUG( + "BIGBROTHER:INFO::POST message sent for subsystem 0x%x.\n"); /*Size of payload*/ postResultMsg->header.ocmpFrameLen = index * 3; /*Updating Subsystem*/ @@ -134,6 +129,6 @@ bool SYS_post_get_results(void **getpostResult) } else { LOGGER("BIGBROTHER:ERROR:: Failed to allocate memory for POST results.\n"); } - memcpy(((OCMPMessageFrame*)getpostResult), postResultMsg, 64); + memcpy(((OCMPMessageFrame *)getpostResult), postResultMsg, 64); return status; } diff --git a/firmware/ec/src/subsystem/watchdog/watchdog.c b/firmware/ec/src/subsystem/watchdog/watchdog.c index a7191f45c4..f2d06c1d4c 100644 --- a/firmware/ec/src/subsystem/watchdog/watchdog.c +++ b/firmware/ec/src/subsystem/watchdog/watchdog.c @@ -82,7 +82,7 @@ void watchdog_reset_ap(void) OcGpio_write(&cfg->pin_ec_reset_to_proc, true); -// OCMPMessageFrame * pWatchdogMsg = (OCMPMessageFrame *) malloc(sizeof(32)); + // OCMPMessageFrame * pWatchdogMsg = (OCMPMessageFrame *) malloc(sizeof(32)); /* For now only AP reset is being applied directly to see the effect*/ return; } @@ -90,11 +90,11 @@ void watchdog_reset_ap(void) /******************************************************************************* * watchdog_send_messages : Processes the watchdog TX Messages ******************************************************************************/ -void watchdog_send_messages(OCMPMessageFrame * pWatchdogMsg) +void watchdog_send_messages(OCMPMessageFrame *pWatchdogMsg) { if (pWatchdogMsg != NULL) { Util_enqueueMsg(bigBrotherTxMsgQueue, semBigBrotherMsg, - (uint8_t*) pWatchdogMsg); + (uint8_t *)pWatchdogMsg); } else { LOGGER_DEBUG("WATCHDOG:ERROR:: pointer NULL!!??"); } @@ -105,7 +105,7 @@ void watchdog_send_messages(OCMPMessageFrame * pWatchdogMsg) ****************************************************************************/ void watchdog_send_cmd_message(void) { - OCMPMessageFrame *pWatchdogMsg = (OCMPMessageFrame *) malloc(32); + OCMPMessageFrame *pWatchdogMsg = (OCMPMessageFrame *)malloc(32); pWatchdogMsg->header.ocmpInterface = OCMP_COMM_IFACE_UART; pWatchdogMsg->header.ocmpSof = OCMP_MSG_SOF; pWatchdogMsg->message.subsystem = OC_SS_WD; @@ -130,12 +130,12 @@ Void watchdog_call(UArg arg0) localCounter += 1; if ((localCounter % reinterationTime) == 0) Semaphore_post(watchdogSem); -// send_wdt_cmd(); + // send_wdt_cmd(); } } else { apUp = localCounter = 0; /* Reset the AP as it is hanged */ -// reset_ap(); + // reset_ap(); } } @@ -152,7 +152,7 @@ void watchdog_process_msg(OCMPMessageFrame *pWatchdogMsg) watchdog_send_messages(pWatchdogMsg); } else if (pWatchdogMsg->message.msgtype == OCMP_MSG_TYPE_STATUS) { watchdogCmdReceived = 1; - free((uint8_t *) pWatchdogMsg); + free((uint8_t *)pWatchdogMsg); } } @@ -164,12 +164,14 @@ void watchdog_task_init(void) /* Create Semaphore for RX Watchdog Message Queue */ watchdogSem = Semaphore_create(0, NULL, NULL); if (watchdogSem == NULL) - LOGGER_DEBUG("WATCHDOG:ERROR:: Failed in Creating Watchdog Semaphore.\n"); + LOGGER_DEBUG( + "WATCHDOG:ERROR:: Failed in Creating Watchdog Semaphore.\n"); /* Create Wathcdog control Queue used by Big brother */ watchdogMsgQueue = Queue_create(NULL, NULL); if (watchdogMsgQueue == NULL) - LOGGER_DEBUG("WATCHDOG:ERROR:: Failed in Constructing Watchdog Message Queue.\n"); + LOGGER_DEBUG( + "WATCHDOG:ERROR:: Failed in Constructing Watchdog Message Queue.\n"); } /***************************************************************************** @@ -179,13 +181,13 @@ void watchdog_task_fxn(UArg a0, UArg a1) { watchdog_task_init(); -// Clock_start(watchdog); + // Clock_start(watchdog); while (1) { if (Semaphore_pend(watchdogSem, BIOS_WAIT_FOREVER)) { if (!Queue_empty(watchdogMsgQueue)) { - OCMPMessageFrame * pWatchdogMsg = - (OCMPMessageFrame *) Util_dequeueMsg(watchdogMsgQueue); + OCMPMessageFrame *pWatchdogMsg = + (OCMPMessageFrame *)Util_dequeueMsg(watchdogMsgQueue); if (pWatchdogMsg) { watchdog_process_msg(pWatchdogMsg); diff --git a/firmware/ec/src/utils/ocmp_util.c b/firmware/ec/src/utils/ocmp_util.c index af4b19c718..6a6d0113d4 100644 --- a/firmware/ec/src/utils/ocmp_util.c +++ b/firmware/ec/src/utils/ocmp_util.c @@ -22,11 +22,11 @@ ** RETURN TYPE : OCMPMessageFrame ** *****************************************************************************/ -OCMPMessageFrame * OCMP_mallocFrame(uint16_t len) +OCMPMessageFrame *OCMP_mallocFrame(uint16_t len) { OCMPMessageFrame *pMsg; // Allocate memory for NPI Frame - pMsg = (OCMPMessageFrame *)malloc(sizeof(OCMPMessageFrame)+len); + pMsg = (OCMPMessageFrame *)malloc(sizeof(OCMPMessageFrame) + len); if (pMsg != NULL) { // Assign Data Length of Frame pMsg->header.ocmpFrameLen = len; @@ -39,7 +39,6 @@ OCMPMessageFrame * OCMP_mallocFrame(uint16_t len) return pMsg; } - /***************************************************************************** ** FUNCTION NAME : create_ocmp_msg_frame ** @@ -55,38 +54,37 @@ OCMPMessageFrame * OCMP_mallocFrame(uint16_t len) ** RETURN TYPE : OCMPMessageFrame ** *****************************************************************************/ -OCMPMessageFrame* create_ocmp_msg_frame(OCMPSubsystem subSystem, - OCMPMsgType msgtype, - OCMPActionType actionType, - uint8_t componentId, - uint16_t parameters, - uint8_t payloadSize) +OCMPMessageFrame * +create_ocmp_msg_frame(OCMPSubsystem subSystem, OCMPMsgType msgtype, + OCMPActionType actionType, uint8_t componentId, + uint16_t parameters, uint8_t payloadSize) { - OCMPMessageFrame *ocmp_msg = (OCMPMessageFrame *) OCMP_mallocFrame( - payloadSize); + OCMPMessageFrame *ocmp_msg = + (OCMPMessageFrame *)OCMP_mallocFrame(payloadSize); if (ocmp_msg) { - *ocmp_msg = (OCMPMessageFrame){ - .header = { - .ocmpSof = OCMP_MSG_SOF, - .ocmpInterface = OCMP_COMM_IFACE_USB, - .ocmpFrameLen = payloadSize, - //.ocmp_seqNumber = 0x00; - //.ocmp_timestamp = 0x00; //Get RTC TimeStamp - }, - .message = { - .subsystem = subSystem, - .componentID = componentId, - .parameters = parameters, - .msgtype = msgtype, - .action = actionType, - } - }; - memset(&(ocmp_msg->message.ocmp_data[0]),0x00,payloadSize); - } + *ocmp_msg = (OCMPMessageFrame){ + .header = + { + .ocmpSof = OCMP_MSG_SOF, + .ocmpInterface = OCMP_COMM_IFACE_USB, + .ocmpFrameLen = payloadSize, + //.ocmp_seqNumber = 0x00; + //.ocmp_timestamp = 0x00; //Get RTC TimeStamp + }, + .message = + { + .subsystem = subSystem, + .componentID = componentId, + .parameters = parameters, + .msgtype = msgtype, + .action = actionType, + } + }; + memset(&(ocmp_msg->message.ocmp_data[0]), 0x00, payloadSize); + } return ocmp_msg; } - /***************************************************************************** ** FUNCTION NAME : create_ocmp_alert_from_Evt ** @@ -99,22 +97,17 @@ OCMPMessageFrame* create_ocmp_msg_frame(OCMPSubsystem subSystem, ** RETURN TYPE : OCMPMessageFrame ** *****************************************************************************/ -OCMPMessageFrame* create_ocmp_alert_from_Evt(OCMPMessageFrame* ocmpEventMsg, - uint8_t componentId, - uint16_t parameters ) +OCMPMessageFrame *create_ocmp_alert_from_Evt(OCMPMessageFrame *ocmpEventMsg, + uint8_t componentId, + uint16_t parameters) { - OCMPMessageFrame *ocmpAlertMsg = - (OCMPMessageFrame *) OCMP_mallocFrame(1); + OCMPMessageFrame *ocmpAlertMsg = (OCMPMessageFrame *)OCMP_mallocFrame(1); if (ocmpAlertMsg != NULL) { - memset(ocmpAlertMsg, 0x00, (sizeof(OCMPMessageFrame))); - memcpy(ocmpAlertMsg, ocmpEventMsg, - (sizeof(OCMPMessageFrame)) + 1); - ocmpAlertMsg->message.msgtype = OCMP_MSG_TYPE_ALERT; - ocmpAlertMsg->message.componentID = componentId; - ocmpAlertMsg->message.parameters = parameters; + memset(ocmpAlertMsg, 0x00, (sizeof(OCMPMessageFrame))); + memcpy(ocmpAlertMsg, ocmpEventMsg, (sizeof(OCMPMessageFrame)) + 1); + ocmpAlertMsg->message.msgtype = OCMP_MSG_TYPE_ALERT; + ocmpAlertMsg->message.componentID = componentId; + ocmpAlertMsg->message.parameters = parameters; } return ocmpAlertMsg; } - - - diff --git a/firmware/ec/src/utils/swupdate.c b/firmware/ec/src/utils/swupdate.c index 308a9f6c1c..b07993e09c 100644 --- a/firmware/ec/src/utils/swupdate.c +++ b/firmware/ec/src/utils/swupdate.c @@ -55,7 +55,7 @@ // by some Wake-On-LAN implementations. // //***************************************************************************** -#define MPACKET_PORT 9 +#define MPACKET_PORT 9 //***************************************************************************** // @@ -64,11 +64,10 @@ // copies of the target MAC address. // //***************************************************************************** -#define MPACKET_HEADER_LEN 6 -#define MPACKET_MAC_REP 4 -#define MPACKET_MAC_LEN 6 -#define MPACKET_LEN (MPACKET_HEADER_LEN + \ - (MPACKET_MAC_REP * MPACKET_MAC_LEN)) +#define MPACKET_HEADER_LEN 6 +#define MPACKET_MAC_REP 4 +#define MPACKET_MAC_LEN 6 +#define MPACKET_LEN (MPACKET_HEADER_LEN + (MPACKET_MAC_REP * MPACKET_MAC_LEN)) //***************************************************************************** // @@ -76,7 +75,7 @@ // MPACKET_HEADER_LEN times. // //***************************************************************************** -#define MPACKET_MARKER 0xAA +#define MPACKET_MARKER 0xAA //***************************************************************************** // @@ -109,8 +108,7 @@ static uint8_t g_pui8MACAddr[6]; // \return None. // //***************************************************************************** -static void -SoftwareUpdateUDPReceive(int8_t *pi8Data, size_t plen) +static void SoftwareUpdateUDPReceive(int8_t *pi8Data, size_t plen) { uint32_t ui32Loop, ui32MACLoop; @@ -118,35 +116,28 @@ SoftwareUpdateUDPReceive(int8_t *pi8Data, size_t plen) // Check that the packet length is what we expect. If not, ignore the // packet. // - if(plen == MPACKET_LEN) - { + if (plen == MPACKET_LEN) { // // The length matches so now look for the 6 byte header // - for(ui32Loop = 0; ui32Loop < MPACKET_HEADER_LEN; ui32Loop++) - { + for (ui32Loop = 0; ui32Loop < MPACKET_HEADER_LEN; ui32Loop++) { // // Does this header byte match the expected marker? // - if((*pi8Data & 0x000000FF)!= MPACKET_MARKER) - { + if ((*pi8Data & 0x000000FF) != MPACKET_MARKER) { // // No - free the buffer and return - this is not a packet // we are interested in. // return; - } - else - { + } else { // // Byte matched so move on to the next one. // pi8Data++; } } - } - else - { + } else { // // No - free the buffer and return - this is not a packet // we are interested in. @@ -164,26 +155,21 @@ SoftwareUpdateUDPReceive(int8_t *pi8Data, size_t plen) // // Loop through each of the expected MAC address copies. // - for(ui32Loop = 0; ui32Loop < MPACKET_MAC_REP; ui32Loop++) - { + for (ui32Loop = 0; ui32Loop < MPACKET_MAC_REP; ui32Loop++) { // // Loop through each byte of the MAC address in this // copy. // - for(ui32MACLoop = 0; ui32MACLoop < MPACKET_MAC_LEN; ui32MACLoop++) - { + for (ui32MACLoop = 0; ui32MACLoop < MPACKET_MAC_LEN; ui32MACLoop++) { // // Does the payload MAC address byte match what we expect? // - if((*pi8Data & 0x000000FF) != g_pui8MACAddr[ui32MACLoop]) - { + if ((*pi8Data & 0x000000FF) != g_pui8MACAddr[ui32MACLoop]) { // // No match - free the packet and return. // return; - } - else - { + } else { // // Byte matched so move on to the next one. // @@ -197,8 +183,7 @@ SoftwareUpdateUDPReceive(int8_t *pi8Data, size_t plen) // request targetted at this board. Signal this to the application // if we have a valid callback pointer. // - if(g_pfnUpdateCallback) - { + if (g_pfnUpdateCallback) { g_pfnUpdateCallback(); } } @@ -206,13 +191,13 @@ SoftwareUpdateUDPReceive(int8_t *pi8Data, size_t plen) /* arg0 contains port to listen on */ static void sw_update_worker(UArg arg0, UArg arg1) { - int bytesRcvd; - int status; - int server; - fd_set readSet; + int bytesRcvd; + int status; + int server; + fd_set readSet; struct sockaddr_in localAddr; struct sockaddr_in clientAddr; - socklen_t addrlen; + socklen_t addrlen; int8_t buffer[MPACKET_LEN]; @@ -227,7 +212,7 @@ static void sw_update_worker(UArg arg0, UArg arg1) localAddr.sin_addr.s_addr = htonl(INADDR_ANY); localAddr.sin_port = htons(arg0); - status = bind(server, (struct sockaddr *) &localAddr, sizeof(localAddr)); + status = bind(server, (struct sockaddr *)&localAddr, sizeof(localAddr)); if (status == -1) { System_printf("Error: bind failed.\n"); goto shutdown; @@ -247,7 +232,7 @@ static void sw_update_worker(UArg arg0, UArg arg1) if (status > 0) { if (FD_ISSET(server, &readSet)) { bytesRcvd = recvfrom(server, buffer, MPACKET_LEN, 0, - (struct sockaddr *)&clientAddr, &addrlen); + (struct sockaddr *)&clientAddr, &addrlen); if (bytesRcvd > 0) { SoftwareUpdateUDPReceive(buffer, bytesRcvd); @@ -262,7 +247,6 @@ shutdown: } } - //***************************************************************************** // //! Initializes the remote Ethernet software update notification feature. @@ -304,8 +288,7 @@ shutdown: //! \return None. // //***************************************************************************** -void -SoftwareUpdateInit(tSoftwareUpdateRequested pfnCallback) +void SoftwareUpdateInit(tSoftwareUpdateRequested pfnCallback) { uint32_t ui32User0, ui32User1; @@ -338,7 +321,6 @@ SoftwareUpdateInit(tSoftwareUpdateRequested pfnCallback) if (!Task_create(sw_update_worker, &task_sw_update_Params, NULL)) { System_printf("Error: Failed to create sw update task\n"); } - } //***************************************************************************** @@ -364,8 +346,7 @@ SoftwareUpdateInit(tSoftwareUpdateRequested pfnCallback) //! \return Never returns. // //***************************************************************************** -void -SoftwareUpdateBegin(uint32_t ui32SysClock) +void SoftwareUpdateBegin(uint32_t ui32SysClock) { // // Disable all processor interrupts. Instead of disabling them diff --git a/firmware/ec/src/utils/swupdate.h b/firmware/ec/src/utils/swupdate.h index ed7cb29c1f..f157c0912c 100644 --- a/firmware/ec/src/utils/swupdate.h +++ b/firmware/ec/src/utils/swupdate.h @@ -34,8 +34,7 @@ // //***************************************************************************** #ifdef __cplusplus -extern "C" -{ +extern "C" { #endif //***************************************************************************** diff --git a/firmware/ec/src/utils/util.c b/firmware/ec/src/utils/util.c index e94482af90..1ab547afac 100644 --- a/firmware/ec/src/utils/util.c +++ b/firmware/ec/src/utils/util.c @@ -53,10 +53,9 @@ */ // RTOS queue for profile/app messages. -typedef struct _queueRec_ -{ - Queue_Elem _elem; // queue element - uint8_t *pData; // pointer to app data +typedef struct _queueRec_ { + Queue_Elem _elem; // queue element + uint8_t *pData; // pointer to app data } queueRec_t; /********************************************************************* @@ -91,35 +90,32 @@ typedef struct _queueRec_ * * @return Clock_Handle - a handle to the clock instance. */ -Clock_Handle Util_constructClock(Clock_Struct *pClock, - Clock_FuncPtr clockCB, - uint32_t clockDuration, - uint32_t clockPeriod, - uint8_t startFlag, - UArg arg) +Clock_Handle Util_constructClock(Clock_Struct *pClock, Clock_FuncPtr clockCB, + uint32_t clockDuration, uint32_t clockPeriod, + uint8_t startFlag, UArg arg) { - Clock_Params clockParams; + Clock_Params clockParams; - // Convert clockDuration in milliseconds to ticks. - uint32_t clockTicks = clockDuration * (1000 / Clock_tickPeriod); + // Convert clockDuration in milliseconds to ticks. + uint32_t clockTicks = clockDuration * (1000 / Clock_tickPeriod); - // Setup parameters. - Clock_Params_init(&clockParams); + // Setup parameters. + Clock_Params_init(&clockParams); - // Setup argument. - clockParams.arg = arg; + // Setup argument. + clockParams.arg = arg; - // If period is 0, this is a one-shot timer. - clockParams.period = clockPeriod * (1000 / Clock_tickPeriod); + // If period is 0, this is a one-shot timer. + clockParams.period = clockPeriod * (1000 / Clock_tickPeriod); - // Starts immediately after construction if true, otherwise wait for a call - // to start. - clockParams.startFlag = startFlag; + // Starts immediately after construction if true, otherwise wait for a call + // to start. + clockParams.startFlag = startFlag; - // Initialize clock instance. - Clock_construct(pClock, clockCB, clockTicks, &clockParams); + // Initialize clock instance. + Clock_construct(pClock, clockCB, clockTicks, &clockParams); - return Clock_handle(pClock); + return Clock_handle(pClock); } /********************************************************************* @@ -133,10 +129,10 @@ Clock_Handle Util_constructClock(Clock_Struct *pClock, */ void Util_startClock(Clock_Struct *pClock) { - Clock_Handle handle = Clock_handle(pClock); + Clock_Handle handle = Clock_handle(pClock); - // Start clock instance - Clock_start(handle); + // Start clock instance + Clock_start(handle); } /********************************************************************* @@ -151,25 +147,24 @@ void Util_startClock(Clock_Struct *pClock) */ void Util_restartClock(Clock_Struct *pClock, uint32_t clockTimeout) { - uint32_t clockTicks; - Clock_Handle handle; + uint32_t clockTicks; + Clock_Handle handle; - handle = Clock_handle(pClock); + handle = Clock_handle(pClock); - if (Clock_isActive(handle)) - { - // Stop clock first - Clock_stop(handle); - } + if (Clock_isActive(handle)) { + // Stop clock first + Clock_stop(handle); + } - // Convert timeout in milliseconds to ticks. - clockTicks = clockTimeout * (1000 / Clock_tickPeriod); + // Convert timeout in milliseconds to ticks. + clockTicks = clockTimeout * (1000 / Clock_tickPeriod); - // Set the initial timeout - Clock_setTimeout(handle, clockTicks); + // Set the initial timeout + Clock_setTimeout(handle, clockTicks); - // Start clock instance - Clock_start(handle); + // Start clock instance + Clock_start(handle); } /********************************************************************* @@ -183,10 +178,10 @@ void Util_restartClock(Clock_Struct *pClock, uint32_t clockTimeout) */ bool Util_isActive(Clock_Struct *pClock) { - Clock_Handle handle = Clock_handle(pClock); + Clock_Handle handle = Clock_handle(pClock); - // Start clock instance - return Clock_isActive(handle); + // Start clock instance + return Clock_isActive(handle); } /********************************************************************* @@ -200,10 +195,10 @@ bool Util_isActive(Clock_Struct *pClock) */ void Util_stopClock(Clock_Struct *pClock) { - Clock_Handle handle = Clock_handle(pClock); + Clock_Handle handle = Clock_handle(pClock); - // Stop clock instance - Clock_stop(handle); + // Stop clock instance + Clock_stop(handle); } /********************************************************************* @@ -217,28 +212,26 @@ void Util_stopClock(Clock_Struct *pClock) */ void Util_rescheduleClock(Clock_Struct *pClock, uint32_t clockPeriod) { - bool running; - uint32_t clockTicks; - Clock_Handle handle; + bool running; + uint32_t clockTicks; + Clock_Handle handle; - handle = Clock_handle(pClock); - running = Clock_isActive(handle); + handle = Clock_handle(pClock); + running = Clock_isActive(handle); - if (running) - { - Clock_stop(handle); - } + if (running) { + Clock_stop(handle); + } - // Convert period in milliseconds to ticks. - clockTicks = clockPeriod * (1000 / Clock_tickPeriod); + // Convert period in milliseconds to ticks. + clockTicks = clockPeriod * (1000 / Clock_tickPeriod); - Clock_setTimeout(handle, clockTicks); - Clock_setPeriod(handle, clockTicks); + Clock_setTimeout(handle, clockTicks); + Clock_setPeriod(handle, clockTicks); - if (running) - { - Clock_start(handle); - } + if (running) { + Clock_start(handle); + } } /********************************************************************* @@ -252,10 +245,10 @@ void Util_rescheduleClock(Clock_Struct *pClock, uint32_t clockPeriod) */ Queue_Handle Util_constructQueue(Queue_Struct *pQueue) { - // Construct a Queue instance. - Queue_construct(pQueue, NULL); + // Construct a Queue instance. + Queue_construct(pQueue, NULL); - return Queue_handle(pQueue); + return Queue_handle(pQueue); } /********************************************************************* @@ -273,31 +266,28 @@ Queue_Handle Util_constructQueue(Queue_Struct *pQueue) uint8_t Util_enqueueMsg(Queue_Handle msgQueue, Semaphore_Handle sem, uint8_t *pMsg) { - queueRec_t *pRec; + queueRec_t *pRec; - // Allocated space for queue node. + // Allocated space for queue node. - if (pRec = (queueRec_t *)malloc(sizeof(queueRec_t))) - { - pRec->pData = pMsg; + if (pRec = (queueRec_t *)malloc(sizeof(queueRec_t))) { + pRec->pData = pMsg; - Queue_enqueue(msgQueue, &pRec->_elem); + Queue_enqueue(msgQueue, &pRec->_elem); - // Wake up the application thread event handler. - if (sem) - { - Semaphore_post(sem); + // Wake up the application thread event handler. + if (sem) { + Semaphore_post(sem); + } + + return TRUE; } - return TRUE; - } + // Free the message. - // Free the message. + free(pMsg); - free(pMsg); - - - return FALSE; + return FALSE; } /********************************************************************* @@ -311,19 +301,16 @@ uint8_t Util_enqueueMsg(Queue_Handle msgQueue, Semaphore_Handle sem, */ uint8_t *Util_dequeueMsg(Queue_Handle msgQueue) { - if (!Queue_empty(msgQueue)) - { - queueRec_t *pRec = Queue_dequeue(msgQueue); - uint8_t *pData = pRec->pData; + if (!Queue_empty(msgQueue)) { + queueRec_t *pRec = Queue_dequeue(msgQueue); + uint8_t *pData = pRec->pData; - // Free the queue node - // Note: this does not free space allocated by data within the node. - free(pRec); + // Free the queue node + // Note: this does not free space allocated by data within the node. + free(pRec); + return pData; + } - return pData; - } - - return NULL; + return NULL; } - diff --git a/firmware/ec/test/fake/fake_GPIO.c b/firmware/ec/test/fake/fake_GPIO.c index 7175d1282c..b91cd3a49a 100644 --- a/firmware/ec/test/fake/fake_GPIO.c +++ b/firmware/ec/test/fake/fake_GPIO.c @@ -15,7 +15,8 @@ static bool *FakeGpio_reg; static uint32_t *FakeGpio_cfg_reg; -void FakeGpio_registerDevSimple(void *GpioPins, void *GpioConfig) { +void FakeGpio_registerDevSimple(void *GpioPins, void *GpioConfig) +{ if (GpioPins) { FakeGpio_reg = GpioPins; } @@ -25,14 +26,16 @@ void FakeGpio_registerDevSimple(void *GpioPins, void *GpioConfig) { return; } -static int FakeGpio_init(const OcGpio_Port *port) { +static int FakeGpio_init(const OcGpio_Port *port) +{ FakeGpio_Obj *obj = port->object_data; *obj = (FakeGpio_Obj){}; return OCGPIO_SUCCESS; } -static int FakeGpio_write(const OcGpio_Pin *pin, bool value) { - uint16_t final_pin=pin->idx; +static int FakeGpio_write(const OcGpio_Pin *pin, bool value) +{ + uint16_t final_pin = pin->idx; if (pin->hw_cfg & OCGPIO_CFG_INVERT) { value = !value; } @@ -40,9 +43,10 @@ static int FakeGpio_write(const OcGpio_Pin *pin, bool value) { return OCGPIO_SUCCESS; } -static int FakeGpio_read(const OcGpio_Pin *pin) { - bool chk =0; - uint16_t final_pin=pin->idx; +static int FakeGpio_read(const OcGpio_Pin *pin) +{ + bool chk = 0; + uint16_t final_pin = pin->idx; chk = FakeGpio_reg[final_pin]; if (pin->hw_cfg & OCGPIO_CFG_INVERT) { chk = !chk; @@ -50,15 +54,16 @@ static int FakeGpio_read(const OcGpio_Pin *pin) { return chk; } -static int FakeGpio_configure(const OcGpio_Pin *pin, uint32_t cfg) { - uint16_t final_pin=pin->idx; +static int FakeGpio_configure(const OcGpio_Pin *pin, uint32_t cfg) +{ + uint16_t final_pin = pin->idx; FakeGpio_cfg_reg[final_pin] = cfg; return OCGPIO_SUCCESS; } static int FakeGpio_setCallback(const OcGpio_Pin *pin, - OcGpio_CallbackFn callback, - void *context) { + OcGpio_CallbackFn callback, void *context) +{ FakeGpio_Obj *obj = pin->port->object_data; if (!obj) { @@ -70,12 +75,14 @@ static int FakeGpio_setCallback(const OcGpio_Pin *pin, return OCGPIO_SUCCESS; } -static int FakeGpio_disableInt(const OcGpio_Pin *pin) { +static int FakeGpio_disableInt(const OcGpio_Pin *pin) +{ UNUSED(pin); return OCGPIO_SUCCESS; } -static int FakeGpio_enableInt(const OcGpio_Pin *pin) { +static int FakeGpio_enableInt(const OcGpio_Pin *pin) +{ UNUSED(pin); return OCGPIO_SUCCESS; } @@ -93,7 +100,8 @@ const OcGpio_FnTable FakeGpio_fnTable = { /****************************************************************************** * Hooks into the driver for faking things such as interrupts ******************************************************************************/ -void FakeGpio_triggerInterrupt(const OcGpio_Pin *pin) { +void FakeGpio_triggerInterrupt(const OcGpio_Pin *pin) +{ FakeGpio_Obj *obj = pin->port->object_data; if (obj->callback[pin->idx].fn) { obj->callback[pin->idx].fn(pin, obj->callback[pin->idx].context); diff --git a/firmware/ec/test/fake/fake_I2C.c b/firmware/ec/test/fake/fake_I2C.c index d6e399f554..e519c7e9e2 100644 --- a/firmware/ec/test/fake/fake_I2C.c +++ b/firmware/ec/test/fake/fake_I2C.c @@ -40,11 +40,13 @@ typedef struct Fake_I2C_Bus { /* TODO: if we can target XDC for Linux, we can simply provide this fake i2c * as an alternative i2c implementation */ -void fake_I2C_init(void) { +void fake_I2C_init(void) +{ memset(dummy_bus, 0x00, sizeof(dummy_bus)); } -void fake_I2C_deinit(void) { +void fake_I2C_deinit(void) +{ for (int i = 0; i < NUM_I2C_BUS; ++i) { if (dummy_bus[i].object) { free(dummy_bus[i].object); @@ -53,10 +55,11 @@ void fake_I2C_deinit(void) { } } -void fake_I2C_registerDevSimple(unsigned int bus, uint8_t addr, - void *reg_table, size_t tbl_size, - size_t reg_size, size_t addr_size, - Fake_I2C_Endianness endianness) { +void fake_I2C_registerDevSimple(unsigned int bus, uint8_t addr, void *reg_table, + size_t tbl_size, size_t reg_size, + size_t addr_size, + Fake_I2C_Endianness endianness) +{ if (bus >= NUM_I2C_BUS) { return; } @@ -80,7 +83,8 @@ void fake_I2C_registerDevSimple(unsigned int bus, uint8_t addr, }; } -void fake_I2C_unregisterDev(unsigned int bus, uint8_t addr) { +void fake_I2C_unregisterDev(unsigned int bus, uint8_t addr) +{ Fake_I2C_Bus *fake_bus = dummy_bus[bus].object; Fake_I2C_Dev *dev_tbl = fake_bus->devs; if (dev_tbl) { @@ -90,12 +94,14 @@ void fake_I2C_unregisterDev(unsigned int bus, uint8_t addr) { /* ========================== Faked Functions =============================== */ -void I2C_close(I2C_Handle handle) { +void I2C_close(I2C_Handle handle) +{ Fake_I2C_Bus *fake_bus = handle->object; fake_bus->open = false; } -I2C_Handle I2C_open(unsigned int index, I2C_Params *params) { +I2C_Handle I2C_open(unsigned int index, I2C_Params *params) +{ UNUSED(params); if (index >= NUM_I2C_BUS) { @@ -110,14 +116,15 @@ I2C_Handle I2C_open(unsigned int index, I2C_Params *params) { return &dummy_bus[index]; } -void I2C_Params_init(I2C_Params *params) { +void I2C_Params_init(I2C_Params *params) +{ UNUSED(params); } /* Inverts arbitrarily large chunk of memory */ -static void reverse_bytes(const void *restrict data_in, - void *restrict data_out, - size_t size) { +static void reverse_bytes(const void *restrict data_in, void *restrict data_out, + size_t size) +{ for (size_t i = 0; i < size; ++i) { ((uint8_t *)data_out)[i] = ((uint8_t *)data_in)[size - i - 1]; } @@ -149,7 +156,8 @@ static void endian_conversion(const void *restrict data_in, size_t in_size, } } -bool I2C_transfer(I2C_Handle handle, I2C_Transaction *transaction) { +bool I2C_transfer(I2C_Handle handle, I2C_Transaction *transaction) +{ if (!handle) { return false; /* This is actually a crash in the proper driver */ } @@ -210,8 +218,8 @@ bool I2C_transfer(I2C_Handle handle, I2C_Transaction *transaction) { /* Read requested data into read buffer */ /* TODO: what address do we read from if we also wrote data? */ if (transaction->readCount > 0) { - size_t read_size = MIN(transaction->readCount, - dev->tbl_size - reg_addr); + size_t read_size = + MIN(transaction->readCount, dev->tbl_size - reg_addr); for (size_t i = 0; i < read_size / dev->reg_size; i += 2) { endian_conversion(mem_addr + i, dev->reg_size, __BYTE_ORDER__, read_buf + i, dev->reg_size, dev->endianness); diff --git a/firmware/ec/test/fake/fake_I2C.h b/firmware/ec/test/fake/fake_I2C.h index 1bb263cbdf..7679bfdcc5 100644 --- a/firmware/ec/test/fake/fake_I2C.h +++ b/firmware/ec/test/fake/fake_I2C.h @@ -32,9 +32,9 @@ void fake_I2C_deinit(void); * @param reg_size Size of each register in the device * @param addr_size Size of register addresses (typically 1-2B) */ -void fake_I2C_registerDevSimple(unsigned int bus, uint8_t addr, - void *reg_table, size_t tbl_size, - size_t reg_size, size_t addr_size, +void fake_I2C_registerDevSimple(unsigned int bus, uint8_t addr, void *reg_table, + size_t tbl_size, size_t reg_size, + size_t addr_size, Fake_I2C_Endianness endianness); /*! diff --git a/firmware/ec/test/fake/fake_ThreadedISR.c b/firmware/ec/test/fake/fake_ThreadedISR.c index 607a464f23..78cbc70394 100644 --- a/firmware/ec/test/fake/fake_ThreadedISR.c +++ b/firmware/ec/test/fake/fake_ThreadedISR.c @@ -23,7 +23,8 @@ typedef struct ISR_Data { } ISR_Data; static ISR_Data s_isr_data[NUM_ISR]; -static void gpioIntFxn(const OcGpio_Pin *pin, void *context) { +static void gpioIntFxn(const OcGpio_Pin *pin, void *context) +{ UNUSED(pin); ISR_Data *isr_data = context; @@ -37,7 +38,8 @@ static void gpioIntFxn(const OcGpio_Pin *pin, void *context) { } void ThreadedInt_Init(OcGpio_Pin *irqPin, ThreadedInt_Callback cb, - void *context) { + void *context) +{ UNUSED(irqPin); s_isr_data[s_isr_count].cb = cb; diff --git a/firmware/ec/test/stub/stub_GateMutex.c b/firmware/ec/test/stub/stub_GateMutex.c index e8dafe19b8..f77d6edb32 100644 --- a/firmware/ec/test/stub/stub_GateMutex.c +++ b/firmware/ec/test/stub/stub_GateMutex.c @@ -21,15 +21,16 @@ ti_sysbios_gates_GateMutex_Handle ti_sysbios_gates_GateMutex_create( /* Doesn't matter, as long as it's not NULL */ return (ti_sysbios_gates_GateMutex_Handle)1; } -xdc_IArg ti_sysbios_gates_GateMutex_enter__E( - ti_sysbios_gates_GateMutex_Handle __inst) +xdc_IArg +ti_sysbios_gates_GateMutex_enter__E(ti_sysbios_gates_GateMutex_Handle __inst) { UNUSED(__inst); return 0; } -xdc_Void ti_sysbios_gates_GateMutex_leave__E( - ti_sysbios_gates_GateMutex_Handle __inst, xdc_IArg key) +xdc_Void +ti_sysbios_gates_GateMutex_leave__E(ti_sysbios_gates_GateMutex_Handle __inst, + xdc_IArg key) { UNUSED(__inst); UNUSED(key); diff --git a/firmware/ec/test/suites/Test_GpioPCA9557.c b/firmware/ec/test/suites/Test_GpioPCA9557.c index 3073552036..a869b28894 100644 --- a/firmware/ec/test/suites/Test_GpioPCA9557.c +++ b/firmware/ec/test/suites/Test_GpioPCA9557.c @@ -30,17 +30,19 @@ static uint8_t PCA9557_regs[] = { static const OcGpio_Port s_pca9557_ioexp = { .fn_table = &GpioPCA9557_fnTable, - .cfg = &(PCA9557_Cfg) { - .i2c_dev = { I2C_BUS, I2C_ADDR }, - }, + .cfg = + &(PCA9557_Cfg){ + .i2c_dev = { I2C_BUS, I2C_ADDR }, + }, .object_data = &(PCA9557_Obj){}, }; static const OcGpio_Port s_invalid_ioexp = { .fn_table = &GpioPCA9557_fnTable, - .cfg = &(PCA9557_Cfg) { - .i2c_dev = { I2C_BUS, 0x01 }, - }, + .cfg = + &(PCA9557_Cfg){ + .i2c_dev = { I2C_BUS, 0x01 }, + }, .object_data = &(PCA9557_Obj){}, }; @@ -63,7 +65,7 @@ void setUp(void) OcGpio_init(&s_pca9557_ioexp); for (size_t i = 0; i < ARRAY_SIZE(s_test_pins); ++i) { - s_test_pins[i] = (OcGpio_Pin) { + s_test_pins[i] = (OcGpio_Pin){ &s_pca9557_ioexp, i, }; @@ -102,15 +104,16 @@ void test_OcGpio_configure(void) TEST_ASSERT_EQUAL_HEX8(0x00, PCA9557_regs[0x02]); /* Test some arbitrary outputs - check cfg & output default value*/ - TEST_ASSERT_EQUAL(OCGPIO_SUCCESS, - OcGpio_configure(&s_test_pins[0],OCGPIO_CFG_OUTPUT | - OCGPIO_CFG_OUT_HIGH)); + TEST_ASSERT_EQUAL( + OCGPIO_SUCCESS, + OcGpio_configure(&s_test_pins[0], + OCGPIO_CFG_OUTPUT | OCGPIO_CFG_OUT_HIGH)); TEST_ASSERT_EQUAL_HEX8(0xFE, PCA9557_regs[0x03]); TEST_ASSERT_EQUAL_HEX8(0x01, PCA9557_regs[0x01]); TEST_ASSERT_EQUAL(OCGPIO_SUCCESS, - OcGpio_configure(&s_test_pins[6], OCGPIO_CFG_OUTPUT | - OCGPIO_CFG_OUT_LOW)); + OcGpio_configure(&s_test_pins[6], + OCGPIO_CFG_OUTPUT | OCGPIO_CFG_OUT_LOW)); TEST_ASSERT_EQUAL_HEX8(0xBE, PCA9557_regs[0x03]); TEST_ASSERT_EQUAL_HEX8(0x01, PCA9557_regs[0x01]); @@ -169,8 +172,7 @@ void test_GpioPCA9557_write(void) } /* Test failure */ - TEST_ASSERT_EQUAL(OCGPIO_FAILURE, - OcGpio_write(&s_invalid_pin, true)); + TEST_ASSERT_EQUAL(OCGPIO_FAILURE, OcGpio_write(&s_invalid_pin, true)); } void test_GpioPCA9557_read_input(void) @@ -189,8 +191,7 @@ void test_GpioPCA9557_read_input(void) /* Test failure */ /* Can't use s_invalid_pin since we need to configure pin first */ fake_I2C_unregisterDev(I2C_BUS, I2C_ADDR); - TEST_ASSERT_EQUAL(OCGPIO_FAILURE, - OcGpio_read(&s_test_pins[0])); + TEST_ASSERT_EQUAL(OCGPIO_FAILURE, OcGpio_read(&s_test_pins[0])); fake_I2C_registerDevSimple(I2C_BUS, I2C_ADDR, PCA9557_regs, sizeof(PCA9557_regs), sizeof(PCA9557_regs[0]), sizeof(uint8_t), FAKE_I2C_DEV_LITTLE_ENDIAN); diff --git a/firmware/ec/test/suites/Test_GpioSX1509.c b/firmware/ec/test/suites/Test_GpioSX1509.c index 8e05ff29a8..4f16368487 100644 --- a/firmware/ec/test/suites/Test_GpioSX1509.c +++ b/firmware/ec/test/suites/Test_GpioSX1509.c @@ -141,9 +141,10 @@ static uint8_t SX1509_regs[] = { static const OcGpio_Port s_sx1509_ioexp = { .fn_table = &GpioSX1509_fnTable, - .cfg = &(SX1509_Cfg) { - .i2c_dev = { I2C_BUS, I2C_ADDR }, - }, + .cfg = + &(SX1509_Cfg){ + .i2c_dev = { I2C_BUS, I2C_ADDR }, + }, .object_data = &(SX1509_Obj){}, }; @@ -169,7 +170,7 @@ void setUp(void) OcGpio_init(&s_sx1509_ioexp); for (size_t i = 0; i < ARRAY_SIZE(s_test_pins); ++i) { - s_test_pins[i] = (OcGpio_Pin) { + s_test_pins[i] = (OcGpio_Pin){ &s_sx1509_ioexp, i, }; @@ -186,7 +187,8 @@ void suite_tearDown(void) } /* ================================ Tests =================================== */ -static void _test_cfg_helper(uint32_t pin_cfg) { +static void _test_cfg_helper(uint32_t pin_cfg) +{ for (size_t i = 0; i < ARRAY_SIZE(s_test_pins); ++i) { TEST_ASSERT_EQUAL(OCGPIO_SUCCESS, OcGpio_configure(&s_test_pins[i], pin_cfg)); @@ -253,4 +255,3 @@ void test_OcGpio_configure_outputs(void) TEST_ASSERT_EQUAL_HEX8(0x55, SX1509_regs[0x0A]); /* B */ TEST_ASSERT_EQUAL_HEX8(0xA2, SX1509_regs[0x0B]); /* A */ } - diff --git a/firmware/ec/test/suites/Test_OcGpio.c b/firmware/ec/test/suites/Test_OcGpio.c index 3ff06b0012..68723b3b80 100644 --- a/firmware/ec/test/suites/Test_OcGpio.c +++ b/firmware/ec/test/suites/Test_OcGpio.c @@ -30,13 +30,13 @@ static uint32_t OcGpio_GpioConfig[] = { }; static OcGpio_Pin s_fake_pin = { - .port = &s_fake_io_port, + .port = &s_fake_io_port, .idx = 1, }; /* ============================= Boilerplate ================================ */ void suite_setUp(void) { - FakeGpio_registerDevSimple(OcGpio_GpioPins, OcGpio_GpioConfig); + FakeGpio_registerDevSimple(OcGpio_GpioPins, OcGpio_GpioConfig); } void setUp(void) diff --git a/firmware/ec/test/suites/Test_PinGroup_driver.c b/firmware/ec/test/suites/Test_PinGroup_driver.c index 46ab0726b9..fe78ef7dba 100644 --- a/firmware/ec/test/suites/Test_PinGroup_driver.c +++ b/firmware/ec/test/suites/Test_PinGroup_driver.c @@ -29,9 +29,11 @@ static uint8_t PCA9557_regs[] = { }; OcGpio_Port fe_ch1_gain_io = { .fn_table = &GpioPCA9557_fnTable, - .cfg = &(PCA9557_Cfg) { - .i2c_dev = { OC_CONNECT1_I2C2, RFFE_CHANNEL1_IO_TX_ATTEN_ADDR }, - }, + .cfg = + &(PCA9557_Cfg){ + .i2c_dev = { OC_CONNECT1_I2C2, + RFFE_CHANNEL1_IO_TX_ATTEN_ADDR }, + }, .object_data = &(PCA9557_Obj){}, }; @@ -41,20 +43,19 @@ Fe_Gain_Cfg fe_ch1_gain = { /* CH1_TX_ATTN_P5DB */ .pin_tx_attn_p5db = { &fe_ch1_gain_io, 2 }, /* CH1_TX_ATTN_1DB */ - .pin_tx_attn_1db = { &fe_ch1_gain_io, 3 }, + .pin_tx_attn_1db = { &fe_ch1_gain_io, 3 }, /* CH1_TX_ATTN_2DB */ - .pin_tx_attn_2db = { &fe_ch1_gain_io, 4 }, + .pin_tx_attn_2db = { &fe_ch1_gain_io, 4 }, /* CH1_TX_ATTN_4DB */ - .pin_tx_attn_4db = { &fe_ch1_gain_io, 5 }, + .pin_tx_attn_4db = { &fe_ch1_gain_io, 5 }, /* CH1_TX_ATTN_8DB */ - .pin_tx_attn_8db = { &fe_ch1_gain_io, 6 }, + .pin_tx_attn_8db = { &fe_ch1_gain_io, 6 }, /* CH1_TX_ATTN_ENB */ - .pin_tx_attn_enb = { &fe_ch1_gain_io, 7 }, + .pin_tx_attn_enb = { &fe_ch1_gain_io, 7 }, }; const DATR5APP_Cfg *cfg_1 = (DATR5APP_Cfg *)&fe_ch1_gain; - /* ============================= Boilerplate ================================ */ void suite_setUp(void) { @@ -78,52 +79,46 @@ void suite_tearDown(void) fake_I2C_deinit(); /* This will automatically unregister devices */ } - -void test_PinGroup_configure(void) +void test_PinGroup_configure(void) { - PinGroup pin_group = { - .num_pin = 6, /* DATR5APP_PIN_COUNT */ - .pins = cfg_1->pin_group - }; - - PCA9557_regs[0] = 0xFF; /* Input values */ - PCA9557_regs[1] = 0xFF; /* Output values */ + PinGroup pin_group = { .num_pin = 6, /* DATR5APP_PIN_COUNT */ + .pins = cfg_1->pin_group }; + + PCA9557_regs[0] = 0xFF; /* Input values */ + PCA9557_regs[1] = 0xFF; /* Output values */ PCA9557_regs[2] = 0xFF; /* Polarity */ PCA9557_regs[3] = 0xFF; /* Dir Config */ - - TEST_ASSERT_EQUAL(RETURN_OK, PinGroup_configure(&pin_group, - OCGPIO_CFG_OUTPUT | OCGPIO_CFG_OUT_HIGH)); - TEST_ASSERT_EQUAL_HEX8(0x7E, PCA9557_regs[0x01]); - TEST_ASSERT_EQUAL_HEX8(0x00, PCA9557_regs[0x02]); - TEST_ASSERT_EQUAL_HEX8(0x00, PCA9557_regs[0x03]); + TEST_ASSERT_EQUAL( + RETURN_OK, + PinGroup_configure(&pin_group, + OCGPIO_CFG_OUTPUT | OCGPIO_CFG_OUT_HIGH)); + TEST_ASSERT_EQUAL_HEX8(0x7E, PCA9557_regs[0x01]); + TEST_ASSERT_EQUAL_HEX8(0x00, PCA9557_regs[0x02]); + TEST_ASSERT_EQUAL_HEX8(0x00, PCA9557_regs[0x03]); } -void test_PinGroup_read(void) +void test_PinGroup_read(void) { - PinGroup pin_group = { - .num_pin = 6, /* DATR5APP_PIN_COUNT */ - .pins = cfg_1->pin_group - }; + PinGroup pin_group = { .num_pin = 6, /* DATR5APP_PIN_COUNT */ + .pins = cfg_1->pin_group }; uint8_t value = 0x00; TEST_ASSERT_EQUAL(RETURN_OK, PinGroup_read(&pin_group, &value)); TEST_ASSERT_EQUAL_HEX8(0x3F, value); } -void test_PinGroup_write(void) +void test_PinGroup_write(void) { - PinGroup pin_group = { - .num_pin = 6, /* DATR5APP_PIN_COUNT */ - .pins = cfg_1->pin_group - }; - - PCA9557_regs[0] = 0xFF; /* Input values */ - PCA9557_regs[1] = 0xFF; /* Output values */ + PinGroup pin_group = { .num_pin = 6, /* DATR5APP_PIN_COUNT */ + .pins = cfg_1->pin_group }; + + PCA9557_regs[0] = 0xFF; /* Input values */ + PCA9557_regs[1] = 0xFF; /* Output values */ PCA9557_regs[2] = 0xFF; /* Polarity */ PCA9557_regs[3] = 0xFF; /* Dir Config */ - + TEST_ASSERT_EQUAL(RETURN_OK, PinGroup_write(&pin_group, 1)); TEST_ASSERT_EQUAL_HEX8(0xFF, PCA9557_regs[0x00]); TEST_ASSERT_EQUAL_HEX8(0x04, PCA9557_regs[0x01]); diff --git a/firmware/ec/test/suites/Test_eeprom.c b/firmware/ec/test/suites/Test_eeprom.c index 3f9da535d2..4889ad49e4 100644 --- a/firmware/ec/test/suites/Test_eeprom.c +++ b/firmware/ec/test/suites/Test_eeprom.c @@ -9,8 +9,8 @@ #include "unity.h" #include "inc/devices/eeprom.h" #include "drivers/GpioSX1509.h" -#include -#include +#include +#include #include "fake/fake_GPIO.h" #include "fake/fake_I2C.h" #include "fake/fake_ThreadedISR.h" @@ -24,7 +24,7 @@ #include unsigned int s_task_sleep_ticks; -xdc_Void ti_sysbios_knl_Task_sleep__E( xdc_UInt32 nticks ) +xdc_Void ti_sysbios_knl_Task_sleep__E(xdc_UInt32 nticks) { s_task_sleep_ticks += nticks; } @@ -45,10 +45,11 @@ static const I2C_Dev I2C_DEV_1 = { .slave_addr = 0x51, }; static Eeprom_Cfg s_dev = { - .i2c_dev = { - .bus = 6, - .slave_addr = 0x50, - }, + .i2c_dev = + { + .bus = 6, + .slave_addr = 0x50, + }, }; static uint16_t EEPROM_regs[] = { @@ -187,40 +188,41 @@ extern const OcGpio_FnTable GpioSX1509_fnTable; OcGpio_Port s_fake_io_exp = { .fn_table = &GpioSX1509_fnTable, - .cfg = &(SX1509_Cfg) { - .i2c_dev = { 6, 0x45 }, - .pin_irq = NULL, - }, + .cfg = + &(SX1509_Cfg){ + .i2c_dev = { 6, 0x45 }, + .pin_irq = NULL, + }, .object_data = &(SX1509_Obj){}, }; -OcGpio_Pin pin_inven_eeprom_wp = { &s_fake_io_exp, 2, 32 }; +OcGpio_Pin pin_inven_eeprom_wp = { &s_fake_io_exp, 2, 32 }; Eeprom_Cfg eeprom_gbc_sid = { .i2c_dev = { 6, 0x51 }, .pin_wp = &(OcGpio_Pin){ &s_fake_io_port, 5 }, - .type = {0, 0}, + .type = { 0, 0 }, .ss = 0, }; Eeprom_Cfg eeprom_gbc_inv = { .i2c_dev = { 6, 0x50 }, .pin_wp = &(OcGpio_Pin){ &s_fake_io_port, 5 }, - .type = {0, 0}, + .type = { 0, 0 }, .ss = 0, }; Eeprom_Cfg eeprom_sdr_inv = { .i2c_dev = { 3, 0x50 }, .pin_wp = NULL, - .type = {0, 0}, + .type = { 0, 0 }, .ss = 0, }; Eeprom_Cfg eeprom_fe_inv = { .i2c_dev = { 4, 0x50 }, .pin_wp = &(OcGpio_Pin){ &s_fake_io_port, 5 }, - .type = {0, 0}, + .type = { 0, 0 }, .ss = 8, }; @@ -237,9 +239,9 @@ void suite_setUp(void) fake_I2C_registerDevSimple(I2C_DEV_1.bus, I2C_DEV_1.slave_addr, EEPROM_regs, sizeof(EEPROM_regs), sizeof(EEPROM_regs[0]), sizeof(uint16_t), FAKE_I2C_DEV_LITTLE_ENDIAN); - fake_I2C_registerDevSimple(6, 0x45, SX1509_regs, - sizeof(SX1509_regs), sizeof(SX1509_regs[0]), - sizeof(uint8_t), FAKE_I2C_DEV_LITTLE_ENDIAN); + fake_I2C_registerDevSimple(6, 0x45, SX1509_regs, sizeof(SX1509_regs), + sizeof(SX1509_regs[0]), sizeof(uint8_t), + FAKE_I2C_DEV_LITTLE_ENDIAN); } void setUp(void) @@ -273,15 +275,16 @@ void test_eeprom_init(void) eeprom_init(&e_dev); TEST_ASSERT_EQUAL(1, eeprom_init(&e_dev)); - TEST_ASSERT_EQUAL(OCGPIO_CFG_OUTPUT | OCGPIO_CFG_OUT_HIGH, Eeprom_GpioConfig[0x02]); - + TEST_ASSERT_EQUAL(OCGPIO_CFG_OUTPUT | OCGPIO_CFG_OUT_HIGH, + Eeprom_GpioConfig[0x02]); } void test_eeprom_read(void) { uint16_t buffer; EEPROM_regs[0xC601] = 0x0505; - TEST_ASSERT_EQUAL(RETURN_OK, eeprom_read(&s_dev, 0x01C6, &buffer,sizeof(buffer))); + TEST_ASSERT_EQUAL(RETURN_OK, + eeprom_read(&s_dev, 0x01C6, &buffer, sizeof(buffer))); TEST_ASSERT_EQUAL_HEX8(0x0505, buffer); } @@ -295,7 +298,7 @@ void test_eeprom_write(void) }; uint16_t buffer = 0x0505; - TEST_ASSERT_EQUAL(RETURN_OK, eeprom_write(&p_dev, 0x01C6, &buffer,0x0A)); + TEST_ASSERT_EQUAL(RETURN_OK, eeprom_write(&p_dev, 0x01C6, &buffer, 0x0A)); TEST_ASSERT_EQUAL_HEX8(0x0505, EEPROM_regs[0xC601]); TEST_ASSERT_EQUAL(RETURN_OK, eeprom_write(&p_dev, 0x01C6, &buffer, 0xCA)); @@ -310,7 +313,7 @@ void test_eeprom_disable_write(void) Eeprom_Cfg i_dev = { .i2c_dev = { 6, 0x45 }, .pin_wp = &pin_inven_eeprom_wp, - .type = {0, 0}, + .type = { 0, 0 }, .ss = 0, }; @@ -326,7 +329,7 @@ void test_eeprom_enable_write(void) Eeprom_Cfg i_dev = { .i2c_dev = { 6, 0x45 }, .pin_wp = &pin_inven_eeprom_wp, - .type = {0, 0}, + .type = { 0, 0 }, .ss = 0, }; TEST_ASSERT_EQUAL(RETURN_OK, eeprom_enable_write(&i_dev)); @@ -335,12 +338,12 @@ void test_eeprom_enable_write(void) void test_eeprom_read_board_info(void) { - uint8_t rominfo=0xff; + uint8_t rominfo = 0xff; EEPROM_regs[0xAC01] = 0x05; Eeprom_Cfg b1_dev = { .i2c_dev = { 6, 0x50 }, .pin_wp = &(OcGpio_Pin){ &s_fake_io_port, 5 }, - .type = {0, 0}, + .type = { 0, 0 }, .ss = 0, }; TEST_ASSERT_EQUAL(RETURN_OK, eeprom_read_board_info(&b1_dev, &rominfo)); @@ -349,7 +352,7 @@ void test_eeprom_read_board_info(void) Eeprom_Cfg b2_dev = { .i2c_dev = { 6, 0x50 }, .pin_wp = &(OcGpio_Pin){ &s_fake_io_port, 5 }, - .type = {0, 0}, + .type = { 0, 0 }, .ss = 7, }; EEPROM_regs[0xAC01] = 0x06; @@ -359,17 +362,16 @@ void test_eeprom_read_board_info(void) Eeprom_Cfg b3_dev = { .i2c_dev = { 6, 0x50 }, .pin_wp = &(OcGpio_Pin){ &s_fake_io_port, 5 }, - .type = {0, 0}, + .type = { 0, 0 }, .ss = 8, }; EEPROM_regs[0xAC01] = 0x07; TEST_ASSERT_EQUAL(RETURN_OK, eeprom_read_board_info(&b3_dev, &rominfo)); TEST_ASSERT_EQUAL_HEX8(0x07, rominfo); - } void test_eeprom_read_oc_info(void) { - uint8_t ocserial=0x00; + uint8_t ocserial = 0x00; EEPROM_regs[0xC601] = 0x05; @@ -380,86 +382,92 @@ void test_eeprom_read_oc_info(void) void test_eeprom_read_device_info_record(void) { - uint8_t recordno= 1; - EEPROM_regs[0x0A01] = 0x4153 ; - char *deviceinfo = (char *) malloc(10); + uint8_t recordno = 1; + EEPROM_regs[0x0A01] = 0x4153; + char *deviceinfo = (char *)malloc(10); Eeprom_Cfg c1_dev = { .i2c_dev = { 6, 0x50 }, .pin_wp = &(OcGpio_Pin){ &s_fake_io_port, 5 }, - .type = {0, 0}, + .type = { 0, 0 }, .ss = 0, }; - memset(deviceinfo,0,10); - TEST_ASSERT_EQUAL(RETURN_OK, eeprom_read_device_info_record(&c1_dev, recordno, deviceinfo)); + memset(deviceinfo, 0, 10); + TEST_ASSERT_EQUAL(RETURN_OK, eeprom_read_device_info_record( + &c1_dev, recordno, deviceinfo)); TEST_ASSERT_EQUAL_STRING("SA", deviceinfo); - uint8_t recordno1= 1; - EEPROM_regs[0x0A01] = 0x4153 ; - char *deviceinfo1 = (char *) malloc(10); + uint8_t recordno1 = 1; + EEPROM_regs[0x0A01] = 0x4153; + char *deviceinfo1 = (char *)malloc(10); Eeprom_Cfg c2_dev = { .i2c_dev = { 6, 0x50 }, .pin_wp = &(OcGpio_Pin){ &s_fake_io_port, 5 }, - .type = {0, 0}, + .type = { 0, 0 }, .ss = 7, }; - memset(deviceinfo1,0,10); - TEST_ASSERT_EQUAL(RETURN_OK, eeprom_read_device_info_record(&c2_dev, recordno1, deviceinfo1)); + memset(deviceinfo1, 0, 10); + TEST_ASSERT_EQUAL(RETURN_OK, eeprom_read_device_info_record( + &c2_dev, recordno1, deviceinfo1)); TEST_ASSERT_EQUAL_STRING("SA", deviceinfo1); - uint8_t recordno2= 1; - EEPROM_regs[0x0A01] = 0x4153 ; - char *deviceinfo2 = (char *) malloc(10); + uint8_t recordno2 = 1; + EEPROM_regs[0x0A01] = 0x4153; + char *deviceinfo2 = (char *)malloc(10); Eeprom_Cfg c3_dev = { .i2c_dev = { 6, 0x50 }, .pin_wp = &(OcGpio_Pin){ &s_fake_io_port, 5 }, - .type = {0, 0}, + .type = { 0, 0 }, .ss = 8, }; - memset(deviceinfo2,0,10); - TEST_ASSERT_EQUAL(RETURN_OK, eeprom_read_device_info_record(&c3_dev, recordno2, deviceinfo2)); + memset(deviceinfo2, 0, 10); + TEST_ASSERT_EQUAL(RETURN_OK, eeprom_read_device_info_record( + &c3_dev, recordno2, deviceinfo2)); TEST_ASSERT_EQUAL_STRING("SA", deviceinfo2); } void test_eeprom_write_device_info_record(void) { - uint8_t recordno= 1; - char *deviceinfo = (char *) malloc(10); - memset(deviceinfo,0,10); + uint8_t recordno = 1; + char *deviceinfo = (char *)malloc(10); + memset(deviceinfo, 0, 10); - strcpy(deviceinfo,"SA"); + strcpy(deviceinfo, "SA"); Eeprom_Cfg d1_dev = { .i2c_dev = { 6, 0x51 }, .pin_wp = &(OcGpio_Pin){ &s_fake_io_port, 5 }, - .type = {0, 0}, + .type = { 0, 0 }, .ss = 0, }; - TEST_ASSERT_EQUAL(RETURN_OK, eeprom_write_device_info_record(&d1_dev, recordno, deviceinfo)); + TEST_ASSERT_EQUAL(RETURN_OK, eeprom_write_device_info_record( + &d1_dev, recordno, deviceinfo)); TEST_ASSERT_EQUAL(0x4153, EEPROM_regs[0x0A01]); strcpy(deviceinfo, "SB"); Eeprom_Cfg d2_dev = { .i2c_dev = { 6, 0x51 }, .pin_wp = &(OcGpio_Pin){ &s_fake_io_port, 5 }, - .type = {0, 0}, + .type = { 0, 0 }, .ss = 0, }; - TEST_ASSERT_EQUAL(RETURN_OK, eeprom_write_device_info_record(&d2_dev, recordno, deviceinfo)); + TEST_ASSERT_EQUAL(RETURN_OK, eeprom_write_device_info_record( + &d2_dev, recordno, deviceinfo)); TEST_ASSERT_EQUAL(0x4253, EEPROM_regs[0x0A01]); strcpy(deviceinfo, "SC"); Eeprom_Cfg d3_dev = { .i2c_dev = { 6, 0x51 }, .pin_wp = &(OcGpio_Pin){ &s_fake_io_port, 5 }, - .type = {0, 0}, + .type = { 0, 0 }, .ss = 0, }; - TEST_ASSERT_EQUAL(RETURN_OK, eeprom_write_device_info_record(&d3_dev, recordno, deviceinfo)); + TEST_ASSERT_EQUAL(RETURN_OK, eeprom_write_device_info_record( + &d3_dev, recordno, deviceinfo)); TEST_ASSERT_EQUAL(0x4353, EEPROM_regs[0x0A01]); } diff --git a/firmware/ec/test/suites/Test_ina226.c b/firmware/ec/test/suites/Test_ina226.c index f8bf36b474..b1308acb09 100644 --- a/firmware/ec/test/suites/Test_ina226.c +++ b/firmware/ec/test/suites/Test_ina226.c @@ -22,21 +22,25 @@ static OcGpio_Port s_fake_io_port = { }; static INA226_Dev s_dev = { - .cfg = { - .dev = { - .bus = 4, - .slave_addr = 0x01, - }, - }, + .cfg = + { + .dev = + { + .bus = 4, + .slave_addr = 0x01, + }, + }, }; static INA226_Dev s_invalid_dev = { - .cfg = { - .dev = { - .bus = 4, - .slave_addr = 0x02, - }, - }, + .cfg = + { + .dev = + { + .bus = 4, + .slave_addr = 0x02, + }, + }, }; static uint16_t INA226_regs[] = { @@ -107,10 +111,11 @@ void test_ina226_init(void) /* Now try to init with a pin associated */ INA226_Dev alerted_dev = { - .cfg = { - .dev = s_dev.cfg.dev, - .pin_alert = &(OcGpio_Pin){ &s_fake_io_port, 5 }, - }, + .cfg = + { + .dev = s_dev.cfg.dev, + .pin_alert = &(OcGpio_Pin){ &s_fake_io_port, 5 }, + }, }; TEST_ASSERT_EQUAL(RETURN_OK, ina226_init(&alerted_dev)); } @@ -133,8 +138,8 @@ static void _ina226_alert_handler(INA226_Event evt, uint16_t value, }; } -static void _test_alert(INA226_Dev *dev, INA226_Event evt, - uint16_t alert_mask, uint16_t val, uint16_t new_mask) +static void _test_alert(INA226_Dev *dev, INA226_Event evt, uint16_t alert_mask, + uint16_t val, uint16_t new_mask) { INA226_regs[0x06] |= 0xF800; /* Enable all interrupts to see how we do */ TEST_ASSERT_EQUAL(RETURN_OK, ina226_enableAlert(dev, evt)); @@ -158,7 +163,7 @@ static void _test_alert(INA226_Dev *dev, INA226_Event evt, FakeGpio_triggerInterrupt(dev->cfg.pin_alert); TEST_ASSERT_EQUAL(0, s_alert_data.triggered); - INA226_regs[0x06] |= (1 << 4); /* Fault caused alert */ + INA226_regs[0x06] |= (1 << 4); /* Fault caused alert */ alert_mask = INA226_regs[0x06]; /* Store reg value for later comparison */ FakeGpio_triggerInterrupt(dev->cfg.pin_alert); @@ -176,10 +181,11 @@ void test_ina226_alerts(void) /* Create a device with an interrupt pin */ INA226_Dev alerted_dev = { - .cfg = { - .dev = s_dev.cfg.dev, - .pin_alert = &(OcGpio_Pin){ &s_fake_io_port, 5 }, - }, + .cfg = + { + .dev = s_dev.cfg.dev, + .pin_alert = &(OcGpio_Pin){ &s_fake_io_port, 5 }, + }, }; TEST_ASSERT_EQUAL(RETURN_OK, ina226_init(&alerted_dev)); @@ -208,19 +214,20 @@ void test_ina226_probe(void) /* Test with the actual values */ INA226_regs[0xFF] = 0x2260; INA226_regs[0xFE] = 0x5449; - TEST_ASSERT_EQUAL(POST_DEV_FOUND, ina226_probe(&s_dev,&postData)); + TEST_ASSERT_EQUAL(POST_DEV_FOUND, ina226_probe(&s_dev, &postData)); /* Test with an incorrect device ID */ INA226_regs[0xFF] = 0xC802; - TEST_ASSERT_EQUAL(POST_DEV_ID_MISMATCH, ina226_probe(&s_dev,&postData)); + TEST_ASSERT_EQUAL(POST_DEV_ID_MISMATCH, ina226_probe(&s_dev, &postData)); /* Test with an incorrect mfg ID */ INA226_regs[0xFF] = 0x2260; INA226_regs[0xFE] = 0x5DC7; - TEST_ASSERT_EQUAL(POST_DEV_ID_MISMATCH, ina226_probe(&s_dev,&postData)); + TEST_ASSERT_EQUAL(POST_DEV_ID_MISMATCH, ina226_probe(&s_dev, &postData)); /* Test with a missing device */ - TEST_ASSERT_EQUAL(POST_DEV_MISSING, ina226_probe(&s_invalid_dev,&postData)); + TEST_ASSERT_EQUAL(POST_DEV_MISSING, + ina226_probe(&s_invalid_dev, &postData)); } void test_current_limit(void) @@ -228,23 +235,19 @@ void test_current_limit(void) uint16_t current_val = 0xffff; INA226_regs[0x07] = 0x0320; //800 - TEST_ASSERT_EQUAL(RETURN_OK, - ina226_readCurrentLim(&s_dev, ¤t_val)); + TEST_ASSERT_EQUAL(RETURN_OK, ina226_readCurrentLim(&s_dev, ¤t_val)); TEST_ASSERT_EQUAL(1000, current_val); //1000mA - TEST_ASSERT_EQUAL(RETURN_OK, - ina226_setCurrentLim(&s_dev, 3000)); //3000mA + TEST_ASSERT_EQUAL(RETURN_OK, ina226_setCurrentLim(&s_dev, 3000)); //3000mA TEST_ASSERT_EQUAL_HEX16(0x0960, INA226_regs[0x07]); //2400 - TEST_ASSERT_EQUAL(RETURN_OK, - ina226_readCurrentLim(&s_dev, ¤t_val)); + TEST_ASSERT_EQUAL(RETURN_OK, ina226_readCurrentLim(&s_dev, ¤t_val)); TEST_ASSERT_EQUAL(3000, current_val); //3000mA } void test_ina226_enableAlert(void) { - TEST_ASSERT_EQUAL(RETURN_OK, - ina226_enableAlert(&s_dev, 0x8001)); + TEST_ASSERT_EQUAL(RETURN_OK, ina226_enableAlert(&s_dev, 0x8001)); TEST_ASSERT_EQUAL_HEX16(0x8001, INA226_regs[0x06]); } @@ -283,13 +286,11 @@ void test_curr_sens_current(void) uint16_t current_val = 0xffff; INA226_regs[0x04] = 0x1388; //5000 - TEST_ASSERT_EQUAL(RETURN_OK, - ina226_readCurrent(&s_dev, ¤t_val)); - TEST_ASSERT_EQUAL_HEX16(500, current_val); //500mA + TEST_ASSERT_EQUAL(RETURN_OK, ina226_readCurrent(&s_dev, ¤t_val)); + TEST_ASSERT_EQUAL_HEX16(500, current_val); //500mA INA226_regs[0x04] = 0x2EE0; //12000 - TEST_ASSERT_EQUAL(RETURN_OK, - ina226_readCurrent(&s_dev, ¤t_val)); + TEST_ASSERT_EQUAL(RETURN_OK, ina226_readCurrent(&s_dev, ¤t_val)); TEST_ASSERT_EQUAL_HEX16(1200, current_val); //1200mA } @@ -298,13 +299,11 @@ void test_curr_sens_power(void) uint16_t power_val = 0xffff; INA226_regs[0x03] = 0x02A8; //680 - TEST_ASSERT_EQUAL(RETURN_OK, - ina226_readPower(&s_dev, &power_val)); + TEST_ASSERT_EQUAL(RETURN_OK, ina226_readPower(&s_dev, &power_val)); TEST_ASSERT_EQUAL_HEX16(1700, power_val); //1700mW INA226_regs[0x03] = 0x04B0; //1200 - TEST_ASSERT_EQUAL(RETURN_OK, - ina226_readPower(&s_dev, &power_val)); + TEST_ASSERT_EQUAL(RETURN_OK, ina226_readPower(&s_dev, &power_val)); TEST_ASSERT_EQUAL_HEX16(3000, power_val); } @@ -314,7 +313,7 @@ void test_curr_sens_not_present(void) uint16_t dummy_val; POSTData postData; TEST_ASSERT_EQUAL(POST_DEV_MISSING, - ina226_probe(&s_invalid_dev,&postData)); + ina226_probe(&s_invalid_dev, &postData)); TEST_ASSERT_EQUAL(RETURN_NOTOK, ina226_readCurrentLim(&s_invalid_dev, &dummy_val)); TEST_ASSERT_EQUAL(RETURN_NOTOK, diff --git a/firmware/ec/test/suites/Test_ltc4015.c b/firmware/ec/test/suites/Test_ltc4015.c index 01283cd0d6..569c2e0e63 100644 --- a/firmware/ec/test/suites/Test_ltc4015.c +++ b/firmware/ec/test/suites/Test_ltc4015.c @@ -27,21 +27,25 @@ static const I2C_Dev I2C_DEV = { }; static LTC4015_Dev s_dev = { - .cfg = { - .i2c_dev = { - .bus = 0, - .slave_addr = 0x68, - }, - }, + .cfg = + { + .i2c_dev = + { + .bus = 0, + .slave_addr = 0x68, + }, + }, }; static LTC4015_Dev s_invalid_dev = { - .cfg = { - .i2c_dev = { - .bus = 2, - .slave_addr = 0x52, - }, - }, + .cfg = + { + .i2c_dev = + { + .bus = 2, + .slave_addr = 0x52, + }, + }, }; static uint16_t LTC4015_regs[] = { @@ -73,8 +77,10 @@ static uint16_t LTC4015_regs[] = { [0x1A] = 0x00, /* Charge current target */ [0x1B] = 0x00, /* Charge voltage target */ [0x1C] = 0x00, /* Low IBAT Threshold for C/x termination */ - [0x1D] = 0x00, /* Time in seconds with battery charger in the CV state before timer termination */ - [0x1E] = 0x00, /* Time in seconds before a max_charge_time fault is declared */ + [0x1D] = + 0x00, /* Time in seconds with battery charger in the CV state before timer termination */ + [0x1E] = + 0x00, /* Time in seconds before a max_charge_time fault is declared */ [0x1F] = 0x00, /* JEITA_T1 */ [0x20] = 0x00, /* JEITA_T2 */ [0x21] = 0x00, /* JEITA_T3 */ @@ -110,7 +116,8 @@ static uint16_t LTC4015_regs[] = { [0x3F] = 0x00, /* Die temperature */ [0x40] = 0x00, /* NTC thermistor ratio */ [0x41] = 0x00, /* Battery series resistance */ - [0x42] = 0x00, /* JEITA temperature region of the NTC thermistor (Li Only) */ + [0x42] = + 0x00, /* JEITA temperature region of the NTC thermistor (Li Only) */ [0x43] = 0x00, /* CHEM and CELLS pin settings */ [0x44] = 0x00, /* Charge current control DAC control bits */ [0x45] = 0x00, /* Charge voltage control DAC control bits */ @@ -165,10 +172,11 @@ void test_ltc4015_init(void) /* Now try to init with a pin associated */ LTC4015_Dev alerted_dev = { - .cfg = { - .i2c_dev = s_dev.cfg.i2c_dev, - .pin_alert = &(OcGpio_Pin){ &s_fake_io_port, 5 }, - }, + .cfg = + { + .i2c_dev = s_dev.cfg.i2c_dev, + .pin_alert = &(OcGpio_Pin){ &s_fake_io_port, 5 }, + }, }; TEST_ASSERT_EQUAL(RETURN_OK, LTC4015_init(&alerted_dev)); } @@ -210,7 +218,7 @@ static void _test_alert(LTC4015_Dev *dev, LTC4015_Event evt, FakeGpio_triggerInterrupt(dev->cfg.pin_alert); TEST_ASSERT_EQUAL(0, s_alert_data.triggered); - LTC4015_regs[0x36] |= alert_mask; /* Fault caused alert */ + LTC4015_regs[0x36] |= alert_mask; /* Fault caused alert */ FakeGpio_triggerInterrupt(dev->cfg.pin_alert); TEST_ASSERT_EQUAL(1, s_alert_data.triggered); @@ -224,14 +232,15 @@ void test_LTC4015_alerts(void) /* Now try to init with a pin associated */ LTC4015_Dev alerted_dev = { - .cfg = { - .i2c_dev = s_dev.cfg.i2c_dev, - .chem = LTC4015_CHEM_LEAD_ACID, - .r_snsb = 3, - .r_snsi = 7, - .cellcount = 6, - .pin_alert = &(OcGpio_Pin){ &s_fake_io_port, 5 }, - }, + .cfg = + { + .i2c_dev = s_dev.cfg.i2c_dev, + .chem = LTC4015_CHEM_LEAD_ACID, + .r_snsb = 3, + .r_snsi = 7, + .cellcount = 6, + .pin_alert = &(OcGpio_Pin){ &s_fake_io_port, 5 }, + }, }; TEST_ASSERT_EQUAL(RETURN_OK, LTC4015_init(&alerted_dev)); @@ -251,11 +260,11 @@ void test_LTC4015_alerts(void) LTC4015_setAlertHandler(&alerted_dev, _alert_handler, NULL); - LTC4015_regs[0x3A] = 0x3040; /* VBAT 9500mV */ - LTC4015_regs[0x3B] = 0x2666; /* VIN 16200mV */ - LTC4015_regs[0x3D] = 0x0FFF; /* IBAT 2000mA */ - LTC4015_regs[0x3E] = 0x5D54; /* IIN 5000mA */ - LTC4015_regs[0x3F] = 0x3D2A; /* T 80C */ + LTC4015_regs[0x3A] = 0x3040; /* VBAT 9500mV */ + LTC4015_regs[0x3B] = 0x2666; /* VIN 16200mV */ + LTC4015_regs[0x3D] = 0x0FFF; /* IBAT 2000mA */ + LTC4015_regs[0x3E] = 0x5D54; /* IIN 5000mA */ + LTC4015_regs[0x3F] = 0x3D2A; /* T 80C */ _test_alert(&alerted_dev, LTC4015_EVT_BVL, 0x0800, 9499); _test_alert(&alerted_dev, LTC4015_EVT_BVH, 0x0400, 9499); @@ -268,8 +277,8 @@ void test_LTC4015_alerts(void) void test_LTC4015_enableLimitAlerts(void) { TEST_ASSERT_EQUAL(RETURN_OK, - LTC4015_enableLimitAlerts(&s_dev, - LTC4015_EVT_BVL | LTC4015_EVT_ICH)); + LTC4015_enableLimitAlerts( + &s_dev, LTC4015_EVT_BVL | LTC4015_EVT_ICH)); TEST_ASSERT_EQUAL_HEX16(0x0820, LTC4015_regs[0x0D]); } @@ -278,14 +287,15 @@ void test_LTC4015_probe(void) POSTData postData; /* Test with the actual value */ LTC4015_regs[0x39] = LTC4015_CHARGER_ENABLED; - TEST_ASSERT_EQUAL(POST_DEV_FOUND, LTC4015_probe(&s_dev,&postData)); + TEST_ASSERT_EQUAL(POST_DEV_FOUND, LTC4015_probe(&s_dev, &postData)); /* Test with an incorrect value */ LTC4015_regs[0x39] = ~LTC4015_CHARGER_ENABLED; - TEST_ASSERT_EQUAL(POST_DEV_MISSING, LTC4015_probe(&s_dev,&postData)); + TEST_ASSERT_EQUAL(POST_DEV_MISSING, LTC4015_probe(&s_dev, &postData)); /* Test with a missing device */ - TEST_ASSERT_EQUAL(POST_DEV_MISSING, LTC4015_probe(&s_invalid_dev,&postData)); + TEST_ASSERT_EQUAL(POST_DEV_MISSING, + LTC4015_probe(&s_invalid_dev, &postData)); } void test_LTC4015_cfg_icharge(void) @@ -293,10 +303,11 @@ void test_LTC4015_cfg_icharge(void) /* Maximum charge current target = (ICHARGE_TARGET + 1) • 1mV/RSNSB */ /* The only thing that matters for this calc is Rsnsb */ LTC4015_Dev charger = { - .cfg = { - .i2c_dev = I2C_DEV, - .r_snsb = 3, - }, + .cfg = + { + .i2c_dev = I2C_DEV, + .r_snsb = 3, + }, }; TEST_ASSERT_EQUAL(RETURN_OK, LTC4015_cfg_icharge(&charger, 3000)); @@ -327,10 +338,11 @@ void test_LTC4015_get_cfg_icharge(void) /* Maximum charge current target = (ICHARGE_TARGET + 1) • 1mV/RSNSB */ /* The only thing that matters for this calc is Rsnsb */ LTC4015_Dev charger = { - .cfg = { - .i2c_dev = I2C_DEV, - .r_snsb = 3, - }, + .cfg = + { + .i2c_dev = I2C_DEV, + .r_snsb = 3, + }, }; uint16_t max_chargeCurrent; @@ -361,9 +373,10 @@ void test_LTC4015_cfg_vcharge(void) { /* Chemistry and #cells affect this calc */ LTC4015_Dev charger = { - .cfg = { - .i2c_dev = I2C_DEV, - }, + .cfg = + { + .i2c_dev = I2C_DEV, + }, }; /* TODO: check if we're using temperature comp. / if the driver should @@ -419,9 +432,10 @@ void test_LTC4015_get_cfg_vcharge(void) { /* Chemistry and #cells affect this calc */ LTC4015_Dev charger = { - .cfg = { - .i2c_dev = I2C_DEV, - }, + .cfg = + { + .i2c_dev = I2C_DEV, + }, }; uint16_t vcharge; @@ -469,9 +483,10 @@ void test_LTC4015_cfg_battery_voltage_low(void) { /* Chemistry and #cells affect this calc */ LTC4015_Dev charger = { - .cfg = { - .i2c_dev = I2C_DEV, - }, + .cfg = + { + .i2c_dev = I2C_DEV, + }, }; /* Test lithium ion chemistry */ @@ -513,9 +528,10 @@ void test_LTC4015_get_cfg_battery_voltage_low(void) { /* Chemistry and #cells affect this calc */ LTC4015_Dev charger = { - .cfg = { - .i2c_dev = I2C_DEV, - }, + .cfg = + { + .i2c_dev = I2C_DEV, + }, }; int16_t underVoltage; @@ -524,15 +540,13 @@ void test_LTC4015_get_cfg_battery_voltage_low(void) charger.cfg.chem = LTC4015_CHEM_LI_ION; charger.cfg.cellcount = 3; LTC4015_regs[0x01] = 15603; - TEST_ASSERT_EQUAL( - RETURN_OK, - LTC4015_get_cfg_battery_voltage_low(&charger, &underVoltage)); + TEST_ASSERT_EQUAL(RETURN_OK, LTC4015_get_cfg_battery_voltage_low( + &charger, &underVoltage)); TEST_ASSERT_EQUAL(8999, underVoltage); LTC4015_regs[0x01] = 31208; - TEST_ASSERT_EQUAL( - RETURN_OK, - LTC4015_get_cfg_battery_voltage_low(&charger, &underVoltage)); + TEST_ASSERT_EQUAL(RETURN_OK, LTC4015_get_cfg_battery_voltage_low( + &charger, &underVoltage)); TEST_ASSERT_EQUAL(18000, underVoltage); /* Test lead acid chemistry */ @@ -540,15 +554,13 @@ void test_LTC4015_get_cfg_battery_voltage_low(void) charger.cfg.chem = LTC4015_CHEM_LEAD_ACID; charger.cfg.cellcount = 6; LTC4015_regs[0x01] = 13458; - TEST_ASSERT_EQUAL( - RETURN_OK, - LTC4015_get_cfg_battery_voltage_low(&charger, &underVoltage)); + TEST_ASSERT_EQUAL(RETURN_OK, LTC4015_get_cfg_battery_voltage_low( + &charger, &underVoltage)); TEST_ASSERT_EQUAL(10349, underVoltage); LTC4015_regs[0x01] = 12353; - TEST_ASSERT_EQUAL( - RETURN_OK, - LTC4015_get_cfg_battery_voltage_low(&charger, &underVoltage)); + TEST_ASSERT_EQUAL(RETURN_OK, LTC4015_get_cfg_battery_voltage_low( + &charger, &underVoltage)); TEST_ASSERT_EQUAL(9500, underVoltage); } @@ -556,9 +568,10 @@ void test_LTC4015_cfg_battery_voltage_high(void) { /* Chemistry and #cells affect this calc */ LTC4015_Dev charger = { - .cfg = { - .i2c_dev = I2C_DEV, - }, + .cfg = + { + .i2c_dev = I2C_DEV, + }, }; /* Test lithium ion chemistry */ @@ -600,9 +613,10 @@ void test_LTC4015_get_cfg_battery_voltage_high(void) { /* Chemistry and #cells affect this calc */ LTC4015_Dev charger = { - .cfg = { - .i2c_dev = I2C_DEV, - }, + .cfg = + { + .i2c_dev = I2C_DEV, + }, }; int16_t overVoltage; @@ -611,15 +625,13 @@ void test_LTC4015_get_cfg_battery_voltage_high(void) charger.cfg.chem = LTC4015_CHEM_LI_ION; charger.cfg.cellcount = 3; LTC4015_regs[0x02] = 21845; - TEST_ASSERT_EQUAL( - RETURN_OK, - LTC4015_get_cfg_battery_voltage_high(&charger, &overVoltage)); + TEST_ASSERT_EQUAL(RETURN_OK, LTC4015_get_cfg_battery_voltage_high( + &charger, &overVoltage)); TEST_ASSERT_EQUAL(12600, overVoltage); LTC4015_regs[0x02] = 15603; - TEST_ASSERT_EQUAL( - RETURN_OK, - LTC4015_get_cfg_battery_voltage_high(&charger, &overVoltage)); + TEST_ASSERT_EQUAL(RETURN_OK, LTC4015_get_cfg_battery_voltage_high( + &charger, &overVoltage)); TEST_ASSERT_EQUAL(8999, overVoltage); /* Test lead acid chemistry */ @@ -627,24 +639,23 @@ void test_LTC4015_get_cfg_battery_voltage_high(void) charger.cfg.chem = LTC4015_CHEM_LEAD_ACID; charger.cfg.cellcount = 6; LTC4015_regs[0x02] = 17945; - TEST_ASSERT_EQUAL( - RETURN_OK, - LTC4015_get_cfg_battery_voltage_high(&charger, &overVoltage)); + TEST_ASSERT_EQUAL(RETURN_OK, LTC4015_get_cfg_battery_voltage_high( + &charger, &overVoltage)); TEST_ASSERT_EQUAL(13800, overVoltage); LTC4015_regs[0x02] = 390; - TEST_ASSERT_EQUAL( - RETURN_OK, - LTC4015_get_cfg_battery_voltage_high(&charger, &overVoltage)); + TEST_ASSERT_EQUAL(RETURN_OK, LTC4015_get_cfg_battery_voltage_high( + &charger, &overVoltage)); TEST_ASSERT_EQUAL(299, overVoltage); } void test_LTC4015_cfg_input_voltage_low(void) { LTC4015_Dev charger = { - .cfg = { - .i2c_dev = I2C_DEV, - }, + .cfg = + { + .i2c_dev = I2C_DEV, + }, }; /* VIN_LO_ALERT_LIMIT = limit/1.648mV */ @@ -663,23 +674,22 @@ void test_LTC4015_cfg_input_voltage_low(void) void test_LTC4015_get_cfg_input_voltage_low(void) { LTC4015_Dev charger = { - .cfg = { - .i2c_dev = I2C_DEV, - }, + .cfg = + { + .i2c_dev = I2C_DEV, + }, }; int16_t inputVoltage; /* VIN_LO_ALERT_LIMIT = limit/1.648mV */ LTC4015_regs[0x03] = 3034; - TEST_ASSERT_EQUAL( - RETURN_OK, - LTC4015_get_cfg_input_voltage_low(&charger, &inputVoltage)); + TEST_ASSERT_EQUAL(RETURN_OK, LTC4015_get_cfg_input_voltage_low( + &charger, &inputVoltage)); TEST_ASSERT_EQUAL(5000, inputVoltage); LTC4015_regs[0x03] = 60; - TEST_ASSERT_EQUAL( - RETURN_OK, - LTC4015_get_cfg_input_voltage_low(&charger, &inputVoltage)); + TEST_ASSERT_EQUAL(RETURN_OK, LTC4015_get_cfg_input_voltage_low( + &charger, &inputVoltage)); TEST_ASSERT_EQUAL(98, inputVoltage); } @@ -687,10 +697,11 @@ void test_LTC4015_cfg_input_current_high(void) { /* Rsnsi value affects this calculation */ LTC4015_Dev charger = { - .cfg = { - .i2c_dev = I2C_DEV, - .r_snsi = 7, - }, + .cfg = + { + .i2c_dev = I2C_DEV, + .r_snsi = 7, + }, }; /* IIN_HI_ALERT_LIMIT = (limit*RSNSI)/1.46487uV */ @@ -713,24 +724,25 @@ void test_LTC4015_get_cfg_input_current_high(void) { /* Rsnsi value affects this calculation */ LTC4015_Dev charger = { - .cfg = { - .i2c_dev = I2C_DEV, - .r_snsi = 7, - }, + .cfg = + { + .i2c_dev = I2C_DEV, + .r_snsi = 7, + }, }; int16_t inputCurrent; /* IIN_HI_ALERT_LIMIT = (limit*RSNSI)/1.46487uV */ LTC4015_regs[0x07] = 23892; - TEST_ASSERT_EQUAL(RETURN_OK, - LTC4015_get_cfg_input_current_high(&charger, &inputCurrent)); + TEST_ASSERT_EQUAL(RETURN_OK, LTC4015_get_cfg_input_current_high( + &charger, &inputCurrent)); TEST_ASSERT_EQUAL(4999, inputCurrent); charger.cfg.r_snsi = 2; LTC4015_regs[0x07] = 23211; - TEST_ASSERT_EQUAL(RETURN_OK, - LTC4015_get_cfg_input_current_high(&charger, &inputCurrent)); + TEST_ASSERT_EQUAL(RETURN_OK, LTC4015_get_cfg_input_current_high( + &charger, &inputCurrent)); TEST_ASSERT_EQUAL(17000, inputCurrent); } @@ -738,10 +750,11 @@ void test_LTC4015_cfg_battery_current_low(void) { /* Rsnsb value affects this calculation */ LTC4015_Dev charger = { - .cfg = { - .i2c_dev = I2C_DEV, - .r_snsb = 30, - }, + .cfg = + { + .i2c_dev = I2C_DEV, + .r_snsb = 30, + }, }; /* IBAT_LO_ALERT_LIMIT = (limit*RSNSB)/1.46487uV */ @@ -764,35 +777,35 @@ void test_LTC4015_get_cfg_battery_current_low(void) { /* Rsnsb value affects this calculation */ LTC4015_Dev charger = { - .cfg = { - .i2c_dev = I2C_DEV, - .r_snsb = 30, - }, + .cfg = + { + .i2c_dev = I2C_DEV, + .r_snsb = 30, + }, }; int16_t batteryCurrent; /* IBAT_LO_ALERT_LIMIT = (limit*RSNSB)/1.46487uV */ LTC4015_regs[0x08] = 2048; - TEST_ASSERT_EQUAL( - RETURN_OK, - LTC4015_get_cfg_battery_current_low(&charger, &batteryCurrent)); + TEST_ASSERT_EQUAL(RETURN_OK, LTC4015_get_cfg_battery_current_low( + &charger, &batteryCurrent)); TEST_ASSERT_EQUAL(100, batteryCurrent); charger.cfg.r_snsb = 4; LTC4015_regs[0x08] = 8276; - TEST_ASSERT_EQUAL( - RETURN_OK, - LTC4015_get_cfg_battery_current_low(&charger, &batteryCurrent)); + TEST_ASSERT_EQUAL(RETURN_OK, LTC4015_get_cfg_battery_current_low( + &charger, &batteryCurrent)); TEST_ASSERT_EQUAL(3030, batteryCurrent); } void test_LTC4015_cfg_die_temperature_high(void) { LTC4015_Dev charger = { - .cfg = { - .i2c_dev = I2C_DEV, - }, + .cfg = + { + .i2c_dev = I2C_DEV, + }, }; /* DIE_TEMP_HI_ALERT_LIMIT = (DIE_TEMP – 12010)/45.6°C */ @@ -809,31 +822,29 @@ void test_LTC4015_cfg_die_temperature_high(void) TEST_ASSERT_EQUAL(15658, LTC4015_regs[0x09]); /* Make sure too-low values don't do anything bad */ - TEST_ASSERT_EQUAL(RETURN_OK, - LTC4015_cfg_die_temperature_high(&charger, 0)); + TEST_ASSERT_EQUAL(RETURN_OK, LTC4015_cfg_die_temperature_high(&charger, 0)); TEST_ASSERT_EQUAL(12010, LTC4015_regs[0x09]); } void test_LTC4015_get_die_temperature_high(void) { LTC4015_Dev charger = { - .cfg = { - .i2c_dev = I2C_DEV, - }, + .cfg = + { + .i2c_dev = I2C_DEV, + }, }; int16_t dieTemperature; /* DIE_TEMP_HI_ALERT_LIMIT = (DIE_TEMP – 12010)/45.6°C */ LTC4015_regs[0x09] = 15658; - TEST_ASSERT_EQUAL( - RETURN_OK, - LTC4015_get_cfg_die_temperature_high(&charger, &dieTemperature)); + TEST_ASSERT_EQUAL(RETURN_OK, LTC4015_get_cfg_die_temperature_high( + &charger, &dieTemperature)); TEST_ASSERT_EQUAL(80, dieTemperature); LTC4015_regs[0x09] = 11554; - TEST_ASSERT_EQUAL( - RETURN_OK, - LTC4015_get_cfg_die_temperature_high(&charger, &dieTemperature)); + TEST_ASSERT_EQUAL(RETURN_OK, LTC4015_get_cfg_die_temperature_high( + &charger, &dieTemperature)); TEST_ASSERT_EQUAL(-10, dieTemperature); } @@ -841,10 +852,11 @@ void test_LTC4015_cfg_input_current_limit(void) { /* Rsnsi value affects this calculation */ LTC4015_Dev charger = { - .cfg = { - .i2c_dev = I2C_DEV, - .r_snsi = 7, - }, + .cfg = + { + .i2c_dev = I2C_DEV, + .r_snsi = 7, + }, }; /* IIN_LIMIT_SETTING = (limit * RSNSI / 500uV) - 1 */ @@ -868,35 +880,35 @@ void test_LTC4015_get_cfg_input_current_limit(void) { /* Rsnsi value affects this calculation */ LTC4015_Dev charger = { - .cfg = { - .i2c_dev = I2C_DEV, - .r_snsi = 7, - }, + .cfg = + { + .i2c_dev = I2C_DEV, + .r_snsi = 7, + }, }; uint16_t inputCurrent; /* IIN_LIMIT_SETTING = (limit * RSNSI / 500uV) - 1 */ LTC4015_regs[0x15] = 76; - TEST_ASSERT_EQUAL( - RETURN_OK, - LTC4015_get_cfg_input_current_limit(&charger, &inputCurrent)); + TEST_ASSERT_EQUAL(RETURN_OK, LTC4015_get_cfg_input_current_limit( + &charger, &inputCurrent)); TEST_ASSERT_EQUAL(5500, inputCurrent); charger.cfg.r_snsi = 2; LTC4015_regs[0x15] = 200; - TEST_ASSERT_EQUAL( - RETURN_OK, - LTC4015_get_cfg_input_current_limit(&charger, &inputCurrent)); + TEST_ASSERT_EQUAL(RETURN_OK, LTC4015_get_cfg_input_current_limit( + &charger, &inputCurrent)); TEST_ASSERT_EQUAL(50250, inputCurrent); } void test_LTC4015_get_die_temp(void) { LTC4015_Dev charger = { - .cfg = { - .i2c_dev = I2C_DEV, - }, + .cfg = + { + .i2c_dev = I2C_DEV, + }, }; int16_t dieTemperature; @@ -916,10 +928,11 @@ void test_LTC4015_get_battery_current(void) { /* Rsnsb value affects this calculation */ LTC4015_Dev charger = { - .cfg = { - .i2c_dev = I2C_DEV, - .r_snsb = 30, - }, + .cfg = + { + .i2c_dev = I2C_DEV, + .r_snsb = 30, + }, }; int16_t batteryCurrent; @@ -941,10 +954,11 @@ void test_LTC4015_get_input_current(void) { /* Rsnsi value affects this calculation */ LTC4015_Dev charger = { - .cfg = { - .i2c_dev = I2C_DEV, - .r_snsi = 7, - }, + .cfg = + { + .i2c_dev = I2C_DEV, + .r_snsi = 7, + }, }; int16_t inputCurrent; @@ -962,15 +976,14 @@ void test_LTC4015_get_input_current(void) TEST_ASSERT_EQUAL(17000, inputCurrent); } - void test_LTC4015_get_battery_voltage(void) { - /* Chemistry and #cells affect this calc */ LTC4015_Dev charger = { - .cfg = { - .i2c_dev = I2C_DEV, - }, + .cfg = + { + .i2c_dev = I2C_DEV, + }, }; int16_t batteryVoltage; @@ -996,9 +1009,10 @@ void test_LTC4015_get_battery_voltage(void) void test_LTC4015_get_input_voltage(void) { LTC4015_Dev charger = { - .cfg = { - .i2c_dev = I2C_DEV, - }, + .cfg = + { + .i2c_dev = I2C_DEV, + }, }; int16_t inputVoltage; @@ -1017,9 +1031,10 @@ void test_LTC4015_get_input_voltage(void) void test_LTC4015_get_system_voltage(void) { LTC4015_Dev charger = { - .cfg = { - .i2c_dev = I2C_DEV, - }, + .cfg = + { + .i2c_dev = I2C_DEV, + }, }; int16_t systemVoltage; @@ -1039,10 +1054,11 @@ void test_LTC4015_get_icharge_dac(void) { /* Rsnsb value affects this calculation */ LTC4015_Dev charger = { - .cfg = { - .i2c_dev = I2C_DEV, - .r_snsb = 30, - }, + .cfg = + { + .i2c_dev = I2C_DEV, + .r_snsb = 30, + }, }; int16_t iCharge; @@ -1061,9 +1077,10 @@ void test_LTC4015_get_icharge_dac(void) void test_LTC4015_get_bat_presence(void) { LTC4015_Dev charger = { - .cfg = { - .i2c_dev = I2C_DEV, - }, + .cfg = + { + .i2c_dev = I2C_DEV, + }, }; bool present; diff --git a/firmware/ec/test/suites/Test_ltc4275.c b/firmware/ec/test/suites/Test_ltc4275.c index 385eb2c192..1fb45accb5 100644 --- a/firmware/ec/test/suites/Test_ltc4275.c +++ b/firmware/ec/test/suites/Test_ltc4275.c @@ -30,7 +30,7 @@ static uint32_t LTC4275_GpioConfig[] = { unsigned int s_task_sleep_ticks; -xdc_Void ti_sysbios_knl_Task_sleep__E( xdc_UInt32 nticks ) +xdc_Void ti_sysbios_knl_Task_sleep__E(xdc_UInt32 nticks) { s_task_sleep_ticks += nticks; } @@ -39,17 +39,17 @@ void test_alert(void) { } -// Parameters are not used as this is just used to test assigning the +// Parameters are not used as this is just used to test assigning the // alert_handler right now. #pragma GCC diagnostic push #pragma GCC diagnostic ignored "-Wunused-parameter" static void alert_handler(LTC4275_Event evt, void *context) { - } #pragma GCC diagnostic pop -void post_update_POSTData(POSTData *pData, uint8_t I2CBus, uint8_t devAddress, uint16_t manId, uint16_t devId) +void post_update_POSTData(POSTData *pData, uint8_t I2CBus, uint8_t devAddress, + uint16_t manId, uint16_t devId) { pData->i2cBus = I2CBus; pData->devAddr = devAddress; @@ -69,7 +69,6 @@ void suite_setUp(void) void setUp(void) { - } void tearDown(void) @@ -81,14 +80,14 @@ void suite_tearDown(void) } LTC4275_Dev l_dev = { - .cfg = { - .pin_evt = &(OcGpio_Pin){ &s_fake_io_port, 0x60 }, - .pin_detect = &(OcGpio_Pin){ &s_fake_io_port, 0x40 }, + .cfg = + { + .pin_evt = &(OcGpio_Pin){ &s_fake_io_port, 0x60 }, + .pin_detect = &(OcGpio_Pin){ &s_fake_io_port, 0x40 }, - }, + }, }; - /* ================================ Tests =================================== */ void test_ltc4275_init(void) { @@ -98,7 +97,8 @@ void test_ltc4275_init(void) TEST_ASSERT_EQUAL(RETURN_OK, ltc4275_init(&l_dev)); TEST_ASSERT_EQUAL(0, PDStatus_Info.pdStatus.powerGoodStatus); - TEST_ASSERT_EQUAL(OCGPIO_CFG_INPUT | OCGPIO_CFG_INT_BOTH_EDGES, LTC4275_GpioConfig[0x60]); + TEST_ASSERT_EQUAL(OCGPIO_CFG_INPUT | OCGPIO_CFG_INT_BOTH_EDGES, + LTC4275_GpioConfig[0x60]); } void test_ltc4275_get_power_good(void) @@ -106,13 +106,12 @@ void test_ltc4275_get_power_good(void) ePDPowerState val; LTC4275_GpioPins[0x60] = 0; - TEST_ASSERT_EQUAL(RETURN_OK, ltc4275_get_power_good(&l_dev,&val)); + TEST_ASSERT_EQUAL(RETURN_OK, ltc4275_get_power_good(&l_dev, &val)); TEST_ASSERT_EQUAL(LTC4275_POWERGOOD, val); LTC4275_GpioPins[0x60] = 1; - TEST_ASSERT_EQUAL(RETURN_OK, ltc4275_get_power_good(&l_dev,&val)); + TEST_ASSERT_EQUAL(RETURN_OK, ltc4275_get_power_good(&l_dev, &val)); TEST_ASSERT_EQUAL(LTC4275_POWERGOOD_NOTOK, val); - } void test_ltc4275_probe(void) diff --git a/firmware/ec/test/suites/Test_ocmp_adt7481.c b/firmware/ec/test/suites/Test_ocmp_adt7481.c index 5f3da4a5d2..540488850c 100644 --- a/firmware/ec/test/suites/Test_ocmp_adt7481.c +++ b/firmware/ec/test/suites/Test_ocmp_adt7481.c @@ -39,15 +39,15 @@ typedef enum Adt7481Status { ADT7481_STATUS_TEMPERATURE = 0, } Adt7481Status; -typedef enum Adt7481SConfig { - ADT7481_CONFIG_LIM_LOW = 0, +typedef enum Adt7481SConfig { + ADT7481_CONFIG_LIM_LOW = 0, ADT7481_CONFIG_LIM_HIGH, - ADT7481_CONFIG_LIM_CRIT, + ADT7481_CONFIG_LIM_CRIT, } Adt7481SConfig; -typedef enum Adt7481SAlert { +typedef enum Adt7481SAlert { ADT7481_ALERT_LOW = 0, - ADT7481_ALERT_HIGH, + ADT7481_ALERT_HIGH, ADT7481_ALERT_CRITICAL } Adt7481SAlert; @@ -89,18 +89,18 @@ static uint8_t ADT7481_regs[] = { [0x37] = 0x00, /* Remote 2 Temp Low Limit Low Byte R*/ [0x39] = 0x00, /* Remote 2 THERM Limit R*/ [0x3D] = 0x00, /* Device ID R */ - [0x3E] = 0x00, /* Manufacturer ID R */ + [0x3E] = 0x00, /* Manufacturer ID R */ }; /* ============================= Fake Functions ============================= */ #include unsigned int s_task_sleep_ticks; -xdc_Void ti_sysbios_knl_Task_sleep__E( xdc_UInt32 nticks ) +xdc_Void ti_sysbios_knl_Task_sleep__E(xdc_UInt32 nticks) { s_task_sleep_ticks += nticks; } -void test_alert(void) +void test_alert(void) { } @@ -108,10 +108,9 @@ void test_alert(void) void suite_setUp(void) { fake_I2C_init(); - fake_I2C_registerDevSimple(I2C_DEV.bus, I2C_DEV.slave_addr, - ADT7481_regs, sizeof(ADT7481_regs), - sizeof(ADT7481_regs[0]), sizeof(uint8_t), - FAKE_I2C_DEV_BIG_ENDIAN); + fake_I2C_registerDevSimple(I2C_DEV.bus, I2C_DEV.slave_addr, ADT7481_regs, + sizeof(ADT7481_regs), sizeof(ADT7481_regs[0]), + sizeof(uint8_t), FAKE_I2C_DEV_BIG_ENDIAN); } void setUp(void) @@ -125,11 +124,9 @@ void tearDown(void) void suite_tearDown(void) { - fake_I2C_deinit(); /* This will automatically unregister devices */ + fake_I2C_deinit(); /* This will automatically unregister devices */ } - - /* ================================ Tests =================================== */ void test_probe(void) @@ -137,71 +134,79 @@ void test_probe(void) POSTData postData; /* Correct Dev id */ - ADT7481_regs[0x3D] = 0x81; /* Device ID */ - ADT7481_regs[0x3E] = 0x41; /* MFG ID */ - - TEST_ASSERT_EQUAL(POST_DEV_FOUND, ADT7481_fxnTable.cb_probe(&I2C_DEV, - &postData)); - + ADT7481_regs[0x3D] = 0x81; /* Device ID */ + ADT7481_regs[0x3E] = 0x41; /* MFG ID */ + + TEST_ASSERT_EQUAL(POST_DEV_FOUND, + ADT7481_fxnTable.cb_probe(&I2C_DEV, &postData)); + /* Invalid device */ - TEST_ASSERT_EQUAL(POST_DEV_MISSING, ADT7481_fxnTable.cb_probe(&s_invalid_dev, - &postData)); + TEST_ASSERT_EQUAL(POST_DEV_MISSING, + ADT7481_fxnTable.cb_probe(&s_invalid_dev, &postData)); /* Invalid bus */ - TEST_ASSERT_EQUAL(POST_DEV_MISSING, ADT7481_fxnTable.cb_probe(&s_invalid_bus, - &postData)); + TEST_ASSERT_EQUAL(POST_DEV_MISSING, + ADT7481_fxnTable.cb_probe(&s_invalid_bus, &postData)); /* Incorrect Dev id */ - ADT7481_regs[0x3D] = 0x80; /* Device ID */ - ADT7481_regs[0x3E] = 0x40; /* MFG ID */ + ADT7481_regs[0x3D] = 0x80; /* Device ID */ + ADT7481_regs[0x3E] = 0x40; /* MFG ID */ TEST_ASSERT_EQUAL(POST_DEV_ID_MISMATCH, - ADT7481_fxnTable.cb_probe(&I2C_DEV, &postData)); + ADT7481_fxnTable.cb_probe(&I2C_DEV, &postData)); } void test_get_status(void) { uint8_t tempvalue = 0xff; ADT7481_regs[0x30] = 0x73; - + /* ADT7481_STATUS_TEMPERATURE */ - TEST_ASSERT_EQUAL(true, ADT7481_fxnTable.cb_get_status(&I2C_DEV, - ADT7481_STATUS_TEMPERATURE, &tempvalue)); + TEST_ASSERT_EQUAL( + true, ADT7481_fxnTable.cb_get_status( + &I2C_DEV, ADT7481_STATUS_TEMPERATURE, &tempvalue)); TEST_ASSERT_EQUAL_HEX8(0x33, tempvalue); - + /* Invalid device */ - TEST_ASSERT_EQUAL(false, ADT7481_fxnTable.cb_get_status(&s_invalid_dev, - ADT7481_STATUS_TEMPERATURE, &tempvalue)); + TEST_ASSERT_EQUAL(false, ADT7481_fxnTable.cb_get_status( + &s_invalid_dev, ADT7481_STATUS_TEMPERATURE, + &tempvalue)); /* Invalid bus */ - TEST_ASSERT_EQUAL(false, ADT7481_fxnTable.cb_get_status(&s_invalid_bus, - ADT7481_STATUS_TEMPERATURE, &tempvalue)); + TEST_ASSERT_EQUAL(false, ADT7481_fxnTable.cb_get_status( + &s_invalid_bus, ADT7481_STATUS_TEMPERATURE, + &tempvalue)); /* Invalid parameter */ - TEST_ASSERT_EQUAL(false, ADT7481_fxnTable.cb_get_status(&I2C_DEV, - 40, &tempvalue)); + TEST_ASSERT_EQUAL(false, + ADT7481_fxnTable.cb_get_status(&I2C_DEV, 40, &tempvalue)); } void test_set_config(void) { int8_t limit = 0x62; - + ADT7481_regs[0x32] = 0x00; - TEST_ASSERT_EQUAL(true, ADT7481_fxnTable.cb_set_config(&I2C_DEV, ADT7481_CONFIG_LIM_LOW, &limit)); + TEST_ASSERT_EQUAL(true, ADT7481_fxnTable.cb_set_config( + &I2C_DEV, ADT7481_CONFIG_LIM_LOW, &limit)); TEST_ASSERT_EQUAL_HEX8(0xA2, ADT7481_regs[0x32]); - + ADT7481_regs[0x31] = 0x00; - TEST_ASSERT_EQUAL(true, ADT7481_fxnTable.cb_set_config(&I2C_DEV, ADT7481_CONFIG_LIM_HIGH, &limit)); + TEST_ASSERT_EQUAL(true, ADT7481_fxnTable.cb_set_config( + &I2C_DEV, ADT7481_CONFIG_LIM_HIGH, &limit)); TEST_ASSERT_EQUAL_HEX8(0xA2, ADT7481_regs[0x31]); ADT7481_regs[0x39] = 0x00; - TEST_ASSERT_EQUAL(true, ADT7481_fxnTable.cb_set_config(&I2C_DEV, ADT7481_CONFIG_LIM_CRIT, &limit)); + TEST_ASSERT_EQUAL(true, ADT7481_fxnTable.cb_set_config( + &I2C_DEV, ADT7481_CONFIG_LIM_CRIT, &limit)); TEST_ASSERT_EQUAL_HEX8(0xA2, ADT7481_regs[0x39]); /* Invalid Device */ - TEST_ASSERT_EQUAL(false, ADT7481_fxnTable.cb_set_config(&s_invalid_dev, - ADT7481_CONFIG_LIM_LOW, &limit)); + TEST_ASSERT_EQUAL(false, + ADT7481_fxnTable.cb_set_config( + &s_invalid_dev, ADT7481_CONFIG_LIM_LOW, &limit)); /* Invalid bus */ - TEST_ASSERT_EQUAL(false, ADT7481_fxnTable.cb_set_config(&s_invalid_bus, - ADT7481_CONFIG_LIM_LOW, &limit)); + TEST_ASSERT_EQUAL(false, + ADT7481_fxnTable.cb_set_config( + &s_invalid_bus, ADT7481_CONFIG_LIM_LOW, &limit)); /* Invalid Parameter */ - TEST_ASSERT_EQUAL(false, ADT7481_fxnTable.cb_set_config(&I2C_DEV, - 40, &limit)); + TEST_ASSERT_EQUAL(false, + ADT7481_fxnTable.cb_set_config(&I2C_DEV, 40, &limit)); } void test_get_config(void) @@ -211,26 +216,31 @@ void test_get_config(void) ADT7481_regs[0x32] = 0xA2; ADT7481_regs[0x39] = 0xA2; - TEST_ASSERT_EQUAL(true, ADT7481_fxnTable.cb_get_config(&I2C_DEV, ADT7481_CONFIG_LIM_LOW, &limit)); + TEST_ASSERT_EQUAL(true, ADT7481_fxnTable.cb_get_config( + &I2C_DEV, ADT7481_CONFIG_LIM_LOW, &limit)); TEST_ASSERT_EQUAL_HEX8(0x62, limit); limit = 0xFF; - TEST_ASSERT_EQUAL(true, ADT7481_fxnTable.cb_get_config(&I2C_DEV, ADT7481_CONFIG_LIM_HIGH, &limit)); + TEST_ASSERT_EQUAL(true, ADT7481_fxnTable.cb_get_config( + &I2C_DEV, ADT7481_CONFIG_LIM_HIGH, &limit)); TEST_ASSERT_EQUAL_HEX8(0x62, limit); limit = 0xFF; - TEST_ASSERT_EQUAL(true, ADT7481_fxnTable.cb_get_config(&I2C_DEV, ADT7481_CONFIG_LIM_CRIT, &limit)); + TEST_ASSERT_EQUAL(true, ADT7481_fxnTable.cb_get_config( + &I2C_DEV, ADT7481_CONFIG_LIM_CRIT, &limit)); TEST_ASSERT_EQUAL_HEX8(0x62, limit); /* Invalid Device */ - TEST_ASSERT_EQUAL(false, ADT7481_fxnTable.cb_get_config(&s_invalid_dev, - ADT7481_CONFIG_LIM_LOW, &limit)); + TEST_ASSERT_EQUAL(false, + ADT7481_fxnTable.cb_get_config( + &s_invalid_dev, ADT7481_CONFIG_LIM_LOW, &limit)); /* Invalid bus */ - TEST_ASSERT_EQUAL(false, ADT7481_fxnTable.cb_get_config(&s_invalid_bus, - ADT7481_CONFIG_LIM_LOW, &limit)); + TEST_ASSERT_EQUAL(false, + ADT7481_fxnTable.cb_get_config( + &s_invalid_bus, ADT7481_CONFIG_LIM_LOW, &limit)); /* Invalid Parameter */ - TEST_ASSERT_EQUAL(false, ADT7481_fxnTable.cb_get_config(&I2C_DEV, - 40, &limit)); + TEST_ASSERT_EQUAL(false, + ADT7481_fxnTable.cb_get_config(&I2C_DEV, 40, &limit)); } void test_init(void) @@ -240,20 +250,25 @@ void test_init(void) .highlimit = 75, .critlimit = 85, }; - TEST_ASSERT_EQUAL(POST_DEV_CFG_DONE, ADT7481_fxnTable.cb_init(&I2C_DEV, &fact_sdr_fpga_adt7481_cfg, NULL)); + TEST_ASSERT_EQUAL(POST_DEV_CFG_DONE, + ADT7481_fxnTable.cb_init( + &I2C_DEV, &fact_sdr_fpga_adt7481_cfg, NULL)); TEST_ASSERT_EQUAL_HEX8(0x2C, ADT7481_regs[0x32]); TEST_ASSERT_EQUAL_HEX8(0x8B, ADT7481_regs[0x31]); TEST_ASSERT_EQUAL_HEX8(0x95, ADT7481_regs[0x39]); TEST_ASSERT_EQUAL_HEX8(ADT7481_CONFIGURATION_REG_VALUE, ADT7481_regs[0x09]); - TEST_ASSERT_EQUAL_HEX8(ADT7481_CONVERSION_RATE_REG_VALUE, ADT7481_regs[0x0A]); + TEST_ASSERT_EQUAL_HEX8(ADT7481_CONVERSION_RATE_REG_VALUE, + ADT7481_regs[0x0A]); /* Invalid Device */ - TEST_ASSERT_EQUAL(POST_DEV_CFG_FAIL, ADT7481_fxnTable.cb_init(&s_invalid_dev, - ADT7481_CONFIG_LIM_LOW, NULL)); - TEST_ASSERT_EQUAL(POST_DEV_CFG_FAIL, ADT7481_fxnTable.cb_init(&s_invalid_bus, - ADT7481_CONFIG_LIM_LOW, NULL)); - /* Invalid Parameter */ - TEST_ASSERT_EQUAL(POST_DEV_CFG_FAIL, ADT7481_fxnTable.cb_init(&I2C_DEV, - NULL, NULL)); + TEST_ASSERT_EQUAL(POST_DEV_CFG_FAIL, + ADT7481_fxnTable.cb_init(&s_invalid_dev, + ADT7481_CONFIG_LIM_LOW, NULL)); + TEST_ASSERT_EQUAL(POST_DEV_CFG_FAIL, + ADT7481_fxnTable.cb_init(&s_invalid_bus, + ADT7481_CONFIG_LIM_LOW, NULL)); + /* Invalid Parameter */ + TEST_ASSERT_EQUAL(POST_DEV_CFG_FAIL, + ADT7481_fxnTable.cb_init(&I2C_DEV, NULL, NULL)); } diff --git a/firmware/ec/test/suites/Test_ocmp_ltc4274.c b/firmware/ec/test/suites/Test_ocmp_ltc4274.c index 963017e36f..0645cedffd 100644 --- a/firmware/ec/test/suites/Test_ocmp_ltc4274.c +++ b/firmware/ec/test/suites/Test_ocmp_ltc4274.c @@ -41,23 +41,27 @@ static I2C_Dev I2C_INVALID_BUS = { }; static LTC4274_Dev s_dev = { - .cfg = { - .i2c_dev = { - .bus = 7, - .slave_addr = 0x2F, - }, - .pin_evt = &(OcGpio_Pin){ &s_fake_io_port, 27}, - .reset_pin ={ &s_fake_io_port, 27 }, - }, + .cfg = + { + .i2c_dev = + { + .bus = 7, + .slave_addr = 0x2F, + }, + .pin_evt = &(OcGpio_Pin){ &s_fake_io_port, 27 }, + .reset_pin = { &s_fake_io_port, 27 }, + }, }; static LTC4274_Dev s_invalid_dev = { - .cfg = { - .i2c_dev = { - .bus = 7, - .slave_addr = 0x52, - }, - }, + .cfg = + { + .i2c_dev = + { + .bus = 7, + .slave_addr = 0x52, + }, + }, }; static uint8_t LTC4274_regs[] = { @@ -110,7 +114,7 @@ static uint32_t LTC7274_GpioConfig[] = { typedef enum LTC7274Status { LTC7274_STATUS_DETECT = 0, - LTC7274_STATUS_CLASS , + LTC7274_STATUS_CLASS, LTC7274_STATUS_POWERGOOD, } LTC7274Status; @@ -127,7 +131,7 @@ typedef enum LTC7274Alert { LTC4274_ALERT_POWER_ENABLE, LTC4274_ALERT_POWERGOOD, LTC4274_ALERT_DISCONNECT, - LTC4274_ALERT_DETECTION , + LTC4274_ALERT_DETECTION, LTC4274_ALERT_CLASS, LTC4274_ALERT_TCUT, LTC4274_ALERT_TSTART, @@ -137,12 +141,12 @@ typedef enum LTC7274Alert { /* ============================= Fake Functions ============================= */ #include unsigned int s_task_sleep_ticks; -xdc_Void ti_sysbios_knl_Task_sleep__E( xdc_UInt32 nticks ) +xdc_Void ti_sysbios_knl_Task_sleep__E(xdc_UInt32 nticks) { s_task_sleep_ticks += nticks; } -void test_alert(void) +void test_alert(void) { } @@ -167,16 +171,15 @@ void tearDown(void) void suite_tearDown(void) { - fake_I2C_deinit(); /* This will automatically unregister devices */ + fake_I2C_deinit(); /* This will automatically unregister devices */ } /* ================================ Tests =================================== */ -// Parameters are not used as this is just used to test assigning the +// Parameters are not used as this is just used to test assigning the // alert_handler right now. #pragma GCC diagnostic push #pragma GCC diagnostic ignored "-Wunused-parameter" -void OCMP_GenerateAlert(const AlertData *alert_data, - unsigned int alert_id, +void OCMP_GenerateAlert(const AlertData *alert_data, unsigned int alert_id, const void *data) { return; @@ -190,20 +193,20 @@ void test_probe(void) /* Correct Dev id */ LTC4274_regs[0x1B] = (0x0c << 3); LTC4274_GpioPins[27] = 1; - TEST_ASSERT_EQUAL(POST_DEV_FOUND, LTC4274_fxnTable.cb_probe(&s_dev, - &postData)); - TEST_ASSERT_EQUAL(LTC7274_GpioConfig[27], OCGPIO_CFG_OUTPUT | - OCGPIO_CFG_OUT_HIGH); + TEST_ASSERT_EQUAL(POST_DEV_FOUND, + LTC4274_fxnTable.cb_probe(&s_dev, &postData)); + TEST_ASSERT_EQUAL(LTC7274_GpioConfig[27], + OCGPIO_CFG_OUTPUT | OCGPIO_CFG_OUT_HIGH); TEST_ASSERT_EQUAL(0, LTC4274_GpioPins[27]); /* Missing device */ - TEST_ASSERT_EQUAL(POST_DEV_MISSING, LTC4274_fxnTable.cb_probe(&s_invalid_dev, - &postData)); + TEST_ASSERT_EQUAL(POST_DEV_MISSING, + LTC4274_fxnTable.cb_probe(&s_invalid_dev, &postData)); /* Incorrect Dev id */ - LTC4274_regs[0x1B] = (0x0D << 3); + LTC4274_regs[0x1B] = (0x0D << 3); TEST_ASSERT_EQUAL(POST_DEV_ID_MISMATCH, - LTC4274_fxnTable.cb_probe(&s_dev, &postData)); + LTC4274_fxnTable.cb_probe(&s_dev, &postData)); } void test_get_status(void) @@ -213,166 +216,203 @@ void test_get_status(void) /* success values */ LTC4274_regs[0x04] = 0xFF; LTC4274_regs[0x0C] = 0x01; - TEST_ASSERT_EQUAL(true, LTC4274_fxnTable.cb_get_status(&I2C_DEV, - LTC7274_STATUS_DETECT, &value)); + TEST_ASSERT_EQUAL(true, LTC4274_fxnTable.cb_get_status( + &I2C_DEV, LTC7274_STATUS_DETECT, &value)); TEST_ASSERT_EQUAL_HEX8(0x01, value); - + LTC4274_regs[0x04] = 0xFF; - LTC4274_regs[0x0C] = 0x2B; - TEST_ASSERT_EQUAL(true, LTC4274_fxnTable.cb_get_status(&I2C_DEV, - LTC7274_STATUS_CLASS, &value)); + LTC4274_regs[0x0C] = 0x2B; + TEST_ASSERT_EQUAL(true, LTC4274_fxnTable.cb_get_status( + &I2C_DEV, LTC7274_STATUS_CLASS, &value)); TEST_ASSERT_EQUAL_HEX8(0x02, value); - + LTC4274_regs[0x04] = 0xFF; - LTC4274_regs[0x10] = 0x00; - TEST_ASSERT_EQUAL(true, LTC4274_fxnTable.cb_get_status(&I2C_DEV, - LTC7274_STATUS_POWERGOOD, &value)); + LTC4274_regs[0x10] = 0x00; + TEST_ASSERT_EQUAL(true, + LTC4274_fxnTable.cb_get_status( + &I2C_DEV, LTC7274_STATUS_POWERGOOD, &value)); TEST_ASSERT_EQUAL_HEX8(0x01, value); /* invalid paramid */ LTC4274_regs[0x04] = 0xFF; LTC4274_regs[0x0C] = 0x01; - TEST_ASSERT_EQUAL(false, LTC4274_fxnTable.cb_get_status(&I2C_DEV, - 0XFF, &value)); + TEST_ASSERT_EQUAL(false, + LTC4274_fxnTable.cb_get_status(&I2C_DEV, 0XFF, &value)); /* invalid dev-id */ - TEST_ASSERT_EQUAL(false, LTC4274_fxnTable.cb_get_status(&I2C_INVALID_DEV, - LTC7274_STATUS_CLASS, &value)); - TEST_ASSERT_EQUAL(false, LTC4274_fxnTable.cb_get_status(&I2C_INVALID_DEV, - LTC7274_STATUS_POWERGOOD, &value)); - TEST_ASSERT_EQUAL(false, LTC4274_fxnTable.cb_get_status(&I2C_INVALID_DEV, - LTC7274_STATUS_POWERGOOD, &value)); + TEST_ASSERT_EQUAL(false, + LTC4274_fxnTable.cb_get_status( + &I2C_INVALID_DEV, LTC7274_STATUS_CLASS, &value)); + TEST_ASSERT_EQUAL( + false, LTC4274_fxnTable.cb_get_status( + &I2C_INVALID_DEV, LTC7274_STATUS_POWERGOOD, &value)); + TEST_ASSERT_EQUAL( + false, LTC4274_fxnTable.cb_get_status( + &I2C_INVALID_DEV, LTC7274_STATUS_POWERGOOD, &value)); /* invalid bus */ - TEST_ASSERT_EQUAL(false, LTC4274_fxnTable.cb_get_status(&I2C_INVALID_BUS, - LTC7274_STATUS_CLASS, &value)); - TEST_ASSERT_EQUAL(false, LTC4274_fxnTable.cb_get_status(&I2C_INVALID_BUS, - LTC7274_STATUS_POWERGOOD, &value)); - TEST_ASSERT_EQUAL(false, LTC4274_fxnTable.cb_get_status(&I2C_INVALID_BUS, - LTC7274_STATUS_POWERGOOD, &value)); - + TEST_ASSERT_EQUAL(false, + LTC4274_fxnTable.cb_get_status( + &I2C_INVALID_BUS, LTC7274_STATUS_CLASS, &value)); + TEST_ASSERT_EQUAL( + false, LTC4274_fxnTable.cb_get_status( + &I2C_INVALID_BUS, LTC7274_STATUS_POWERGOOD, &value)); + TEST_ASSERT_EQUAL( + false, LTC4274_fxnTable.cb_get_status( + &I2C_INVALID_BUS, LTC7274_STATUS_POWERGOOD, &value)); } void test_set_config(void) { uint8_t value = 0x00; - + /* success values */ LTC4274_regs[0x12] = 0x00; value = 0x51; - TEST_ASSERT_EQUAL(true, LTC4274_fxnTable.cb_set_config(&I2C_DEV, - LTC4274_CONFIG_OPERATING_MODE, &value)); + TEST_ASSERT_EQUAL(true, + LTC4274_fxnTable.cb_set_config( + &I2C_DEV, LTC4274_CONFIG_OPERATING_MODE, &value)); TEST_ASSERT_EQUAL_HEX8(LTC4274_regs[0x12], value); LTC4274_regs[0x14] = 0xFF; value = 0x53; - TEST_ASSERT_EQUAL(true, LTC4274_fxnTable.cb_set_config(&I2C_DEV, - LTC4274_CONFIG_DETECT_ENABLE, &value)); + TEST_ASSERT_EQUAL(true, + LTC4274_fxnTable.cb_set_config( + &I2C_DEV, LTC4274_CONFIG_DETECT_ENABLE, &value)); TEST_ASSERT_EQUAL_HEX8(LTC4274_regs[0x14], value); LTC4274_regs[0x01] = 0xFF; value = 0x54; - TEST_ASSERT_EQUAL(true, LTC4274_fxnTable.cb_set_config(&I2C_DEV, - LTC4274_CONFIG_INTERRUPT_MASK, &value)); + TEST_ASSERT_EQUAL(true, + LTC4274_fxnTable.cb_set_config( + &I2C_DEV, LTC4274_CONFIG_INTERRUPT_MASK, &value)); TEST_ASSERT_EQUAL_HEX8(LTC4274_regs[0x01], value); LTC4274_regs[0x17] = 0xFF; value = true; - TEST_ASSERT_EQUAL(true, LTC4274_fxnTable.cb_set_config(&I2C_DEV, - LTC4274_CONFIG_INTERRUPT_ENABLE, &value)); + TEST_ASSERT_EQUAL( + true, LTC4274_fxnTable.cb_set_config( + &I2C_DEV, LTC4274_CONFIG_INTERRUPT_ENABLE, &value)); TEST_ASSERT_EQUAL_HEX8(0x80, LTC4274_regs[0x17]); LTC4274_regs[0x44] = 0xFF; value = 0x56; - TEST_ASSERT_EQUAL(true, LTC4274_fxnTable.cb_set_config(&I2C_DEV, - LTC4274_CONFIG_HP_ENABLE, &value)); + TEST_ASSERT_EQUAL(true, + LTC4274_fxnTable.cb_set_config( + &I2C_DEV, LTC4274_CONFIG_HP_ENABLE, &value)); TEST_ASSERT_EQUAL_HEX8(LTC4274_regs[0x44], value); /* Invalid paramid */ - TEST_ASSERT_EQUAL(false, LTC4274_fxnTable.cb_set_config(&I2C_DEV, 0xFF, &value)); + TEST_ASSERT_EQUAL(false, + LTC4274_fxnTable.cb_set_config(&I2C_DEV, 0xFF, &value)); - TEST_ASSERT_EQUAL(false, LTC4274_fxnTable.cb_set_config(&I2C_INVALID_DEV, - LTC4274_CONFIG_OPERATING_MODE, &value)); - TEST_ASSERT_EQUAL(false, LTC4274_fxnTable.cb_set_config(&I2C_INVALID_DEV, - LTC4274_CONFIG_DETECT_ENABLE, &value)); - TEST_ASSERT_EQUAL(false, LTC4274_fxnTable.cb_set_config(&I2C_INVALID_DEV, - LTC4274_CONFIG_INTERRUPT_MASK, &value)); - TEST_ASSERT_EQUAL(false, LTC4274_fxnTable.cb_set_config(&I2C_INVALID_DEV, - LTC4274_CONFIG_INTERRUPT_ENABLE, &value)); - TEST_ASSERT_EQUAL(false, LTC4274_fxnTable.cb_set_config(&I2C_INVALID_DEV, - LTC4274_CONFIG_HP_ENABLE, &value)); + TEST_ASSERT_EQUAL(false, LTC4274_fxnTable.cb_set_config( + &I2C_INVALID_DEV, + LTC4274_CONFIG_OPERATING_MODE, &value)); + TEST_ASSERT_EQUAL(false, LTC4274_fxnTable.cb_set_config( + &I2C_INVALID_DEV, + LTC4274_CONFIG_DETECT_ENABLE, &value)); + TEST_ASSERT_EQUAL(false, LTC4274_fxnTable.cb_set_config( + &I2C_INVALID_DEV, + LTC4274_CONFIG_INTERRUPT_MASK, &value)); + TEST_ASSERT_EQUAL(false, LTC4274_fxnTable.cb_set_config( + &I2C_INVALID_DEV, + LTC4274_CONFIG_INTERRUPT_ENABLE, &value)); + TEST_ASSERT_EQUAL( + false, LTC4274_fxnTable.cb_set_config( + &I2C_INVALID_DEV, LTC4274_CONFIG_HP_ENABLE, &value)); - /* invalid bus */ - TEST_ASSERT_EQUAL(false, LTC4274_fxnTable.cb_set_config(&I2C_INVALID_BUS, - LTC4274_CONFIG_OPERATING_MODE, &value)); - TEST_ASSERT_EQUAL(false, LTC4274_fxnTable.cb_set_config(&I2C_INVALID_BUS, - LTC4274_CONFIG_DETECT_ENABLE, &value)); - TEST_ASSERT_EQUAL(false, LTC4274_fxnTable.cb_set_config(&I2C_INVALID_BUS, - LTC4274_CONFIG_INTERRUPT_MASK, &value)); - TEST_ASSERT_EQUAL(false, LTC4274_fxnTable.cb_set_config(&I2C_INVALID_BUS, - LTC4274_CONFIG_INTERRUPT_ENABLE, &value)); - TEST_ASSERT_EQUAL(false, LTC4274_fxnTable.cb_set_config(&I2C_INVALID_BUS, - LTC4274_CONFIG_HP_ENABLE, &value)); + /* invalid bus */ + TEST_ASSERT_EQUAL(false, LTC4274_fxnTable.cb_set_config( + &I2C_INVALID_BUS, + LTC4274_CONFIG_OPERATING_MODE, &value)); + TEST_ASSERT_EQUAL(false, LTC4274_fxnTable.cb_set_config( + &I2C_INVALID_BUS, + LTC4274_CONFIG_DETECT_ENABLE, &value)); + TEST_ASSERT_EQUAL(false, LTC4274_fxnTable.cb_set_config( + &I2C_INVALID_BUS, + LTC4274_CONFIG_INTERRUPT_MASK, &value)); + TEST_ASSERT_EQUAL(false, LTC4274_fxnTable.cb_set_config( + &I2C_INVALID_BUS, + LTC4274_CONFIG_INTERRUPT_ENABLE, &value)); + TEST_ASSERT_EQUAL( + false, LTC4274_fxnTable.cb_set_config( + &I2C_INVALID_BUS, LTC4274_CONFIG_HP_ENABLE, &value)); } void test_get_config(void) { uint8_t value = 0x00; - + /* success values */ LTC4274_regs[0x12] = 0x51; - TEST_ASSERT_EQUAL(true, LTC4274_fxnTable.cb_get_config(&I2C_DEV, - LTC4274_CONFIG_OPERATING_MODE, &value)); + TEST_ASSERT_EQUAL(true, + LTC4274_fxnTable.cb_get_config( + &I2C_DEV, LTC4274_CONFIG_OPERATING_MODE, &value)); TEST_ASSERT_EQUAL_HEX8(LTC4274_regs[0x12], value); LTC4274_regs[0x14] = 0x53; - TEST_ASSERT_EQUAL(true, LTC4274_fxnTable.cb_get_config(&I2C_DEV, - LTC4274_CONFIG_DETECT_ENABLE, &value)); + TEST_ASSERT_EQUAL(true, + LTC4274_fxnTable.cb_get_config( + &I2C_DEV, LTC4274_CONFIG_DETECT_ENABLE, &value)); TEST_ASSERT_EQUAL_HEX8((LTC4274_regs[0x14] & 07), value); LTC4274_regs[0x01] = 0x54; - TEST_ASSERT_EQUAL(true, LTC4274_fxnTable.cb_get_config(&I2C_DEV, - LTC4274_CONFIG_INTERRUPT_MASK, &value)); + TEST_ASSERT_EQUAL(true, + LTC4274_fxnTable.cb_get_config( + &I2C_DEV, LTC4274_CONFIG_INTERRUPT_MASK, &value)); TEST_ASSERT_EQUAL_HEX8(LTC4274_regs[0x01], value); LTC4274_regs[0x17] = 0x80; - TEST_ASSERT_EQUAL(true, LTC4274_fxnTable.cb_get_config(&I2C_DEV, - LTC4274_CONFIG_INTERRUPT_ENABLE, &value)); + TEST_ASSERT_EQUAL( + true, LTC4274_fxnTable.cb_get_config( + &I2C_DEV, LTC4274_CONFIG_INTERRUPT_ENABLE, &value)); TEST_ASSERT_EQUAL_HEX8(LTC4274_regs[0x17], value); LTC4274_regs[0x44] = 0x56; - TEST_ASSERT_EQUAL(true, LTC4274_fxnTable.cb_get_config(&I2C_DEV, - LTC4274_CONFIG_HP_ENABLE, &value)); + TEST_ASSERT_EQUAL(true, + LTC4274_fxnTable.cb_get_config( + &I2C_DEV, LTC4274_CONFIG_HP_ENABLE, &value)); TEST_ASSERT_EQUAL_HEX8(LTC4274_regs[0x44], value); /* Invalid paramid */ - TEST_ASSERT_EQUAL(false, LTC4274_fxnTable.cb_get_config(&I2C_DEV, 0xFF, &value)); + TEST_ASSERT_EQUAL(false, + LTC4274_fxnTable.cb_get_config(&I2C_DEV, 0xFF, &value)); - TEST_ASSERT_EQUAL(false, LTC4274_fxnTable.cb_get_config(&I2C_INVALID_DEV, - LTC4274_CONFIG_OPERATING_MODE, &value)); - TEST_ASSERT_EQUAL(false, LTC4274_fxnTable.cb_get_config(&I2C_INVALID_DEV, - LTC4274_CONFIG_DETECT_ENABLE, &value)); - TEST_ASSERT_EQUAL(false, LTC4274_fxnTable.cb_get_config(&I2C_INVALID_DEV, - LTC4274_CONFIG_INTERRUPT_MASK, &value)); - TEST_ASSERT_EQUAL(false, LTC4274_fxnTable.cb_get_config(&I2C_INVALID_DEV, - LTC4274_CONFIG_INTERRUPT_ENABLE, &value)); - TEST_ASSERT_EQUAL(false, LTC4274_fxnTable.cb_get_config(&I2C_INVALID_DEV, - LTC4274_CONFIG_HP_ENABLE, &value)); - /* Invalid bus */ - TEST_ASSERT_EQUAL(false, LTC4274_fxnTable.cb_get_config(&I2C_INVALID_BUS, - LTC4274_CONFIG_OPERATING_MODE, &value)); - TEST_ASSERT_EQUAL(false, LTC4274_fxnTable.cb_get_config(&I2C_INVALID_BUS, - LTC4274_CONFIG_DETECT_ENABLE, &value)); - TEST_ASSERT_EQUAL(false, LTC4274_fxnTable.cb_get_config(&I2C_INVALID_BUS, - LTC4274_CONFIG_INTERRUPT_MASK, &value)); - TEST_ASSERT_EQUAL(false, LTC4274_fxnTable.cb_get_config(&I2C_INVALID_BUS, - LTC4274_CONFIG_INTERRUPT_ENABLE, &value)); - TEST_ASSERT_EQUAL(false, LTC4274_fxnTable.cb_get_config(&I2C_INVALID_BUS, - LTC4274_CONFIG_HP_ENABLE, &value)); + TEST_ASSERT_EQUAL(false, LTC4274_fxnTable.cb_get_config( + &I2C_INVALID_DEV, + LTC4274_CONFIG_OPERATING_MODE, &value)); + TEST_ASSERT_EQUAL(false, LTC4274_fxnTable.cb_get_config( + &I2C_INVALID_DEV, + LTC4274_CONFIG_DETECT_ENABLE, &value)); + TEST_ASSERT_EQUAL(false, LTC4274_fxnTable.cb_get_config( + &I2C_INVALID_DEV, + LTC4274_CONFIG_INTERRUPT_MASK, &value)); + TEST_ASSERT_EQUAL(false, LTC4274_fxnTable.cb_get_config( + &I2C_INVALID_DEV, + LTC4274_CONFIG_INTERRUPT_ENABLE, &value)); + TEST_ASSERT_EQUAL( + false, LTC4274_fxnTable.cb_get_config( + &I2C_INVALID_DEV, LTC4274_CONFIG_HP_ENABLE, &value)); + /* Invalid bus */ + TEST_ASSERT_EQUAL(false, LTC4274_fxnTable.cb_get_config( + &I2C_INVALID_BUS, + LTC4274_CONFIG_OPERATING_MODE, &value)); + TEST_ASSERT_EQUAL(false, LTC4274_fxnTable.cb_get_config( + &I2C_INVALID_BUS, + LTC4274_CONFIG_DETECT_ENABLE, &value)); + TEST_ASSERT_EQUAL(false, LTC4274_fxnTable.cb_get_config( + &I2C_INVALID_BUS, + LTC4274_CONFIG_INTERRUPT_MASK, &value)); + TEST_ASSERT_EQUAL(false, LTC4274_fxnTable.cb_get_config( + &I2C_INVALID_BUS, + LTC4274_CONFIG_INTERRUPT_ENABLE, &value)); + TEST_ASSERT_EQUAL( + false, LTC4274_fxnTable.cb_get_config( + &I2C_INVALID_BUS, LTC4274_CONFIG_HP_ENABLE, &value)); } void test_init(void) { - const int alert_token; const LTC4274_Config fact_ltc4274_cfg = { @@ -382,9 +422,10 @@ void test_init(void) .interruptEnable = true, .pseHpEnable = LTC4274_HP_ENABLE, }; - - TEST_ASSERT_EQUAL(POST_DEV_CFG_DONE, LTC4274_fxnTable.cb_init(&s_dev, - &fact_ltc4274_cfg, &alert_token)); + + TEST_ASSERT_EQUAL( + POST_DEV_CFG_DONE, + LTC4274_fxnTable.cb_init(&s_dev, &fact_ltc4274_cfg, &alert_token)); TEST_ASSERT_EQUAL_HEX8(LTC4274_regs[0x12], LTC4274_AUTO_MODE); TEST_ASSERT_EQUAL_HEX8(LTC4274_regs[0x14], LTC4274_DETECT_ENABLE); @@ -392,10 +433,11 @@ void test_init(void) TEST_ASSERT_EQUAL_HEX8(0x80, LTC4274_regs[0x17]); TEST_ASSERT_EQUAL_HEX8(LTC4274_regs[0x44], LTC4274_HP_ENABLE); TEST_ASSERT_EQUAL(OCGPIO_CFG_INPUT | OCGPIO_CFG_INT_FALLING, - LTC7274_GpioConfig[27]); - - TEST_ASSERT_EQUAL(POST_DEV_CFG_FAIL, LTC4274_fxnTable.cb_init(&s_invalid_dev, - &fact_ltc4274_cfg, &alert_token)); - TEST_ASSERT_EQUAL(POST_DEV_CFG_DONE, LTC4274_fxnTable.cb_init(&s_dev, - NULL, &alert_token)); + LTC7274_GpioConfig[27]); + + TEST_ASSERT_EQUAL(POST_DEV_CFG_FAIL, + LTC4274_fxnTable.cb_init( + &s_invalid_dev, &fact_ltc4274_cfg, &alert_token)); + TEST_ASSERT_EQUAL(POST_DEV_CFG_DONE, + LTC4274_fxnTable.cb_init(&s_dev, NULL, &alert_token)); } diff --git a/firmware/ec/test/suites/Test_pca9557.c b/firmware/ec/test/suites/Test_pca9557.c index b48d09a855..7c5bb24c1c 100644 --- a/firmware/ec/test/suites/Test_pca9557.c +++ b/firmware/ec/test/suites/Test_pca9557.c @@ -92,8 +92,7 @@ void test_PCA9557_polarity(void) PCA9557_getPolarity(&pca9557_dev, &polarity_val)); TEST_ASSERT_EQUAL_HEX8(0xFB, polarity_val); - TEST_ASSERT_EQUAL(RETURN_OK, - PCA9557_setPolarity(&pca9557_dev, 0x56)); + TEST_ASSERT_EQUAL(RETURN_OK, PCA9557_setPolarity(&pca9557_dev, 0x56)); TEST_ASSERT_EQUAL_HEX8(0x56, PCA9557_regs[0x02]); TEST_ASSERT_EQUAL(RETURN_OK, @@ -107,16 +106,13 @@ void test_PCA9557_config(void) uint8_t config_val = 0xff; PCA9557_regs[0x03] = 0xAB; - TEST_ASSERT_EQUAL(RETURN_OK, - PCA9557_getConfig(&pca9557_dev, &config_val)); + TEST_ASSERT_EQUAL(RETURN_OK, PCA9557_getConfig(&pca9557_dev, &config_val)); TEST_ASSERT_EQUAL_HEX8(0xAB, config_val); - TEST_ASSERT_EQUAL(RETURN_OK, - PCA9557_setConfig(&pca9557_dev, 0xCD)); + TEST_ASSERT_EQUAL(RETURN_OK, PCA9557_setConfig(&pca9557_dev, 0xCD)); TEST_ASSERT_EQUAL_HEX8(0xCD, PCA9557_regs[0x03]); - TEST_ASSERT_EQUAL(RETURN_OK, - PCA9557_getConfig(&pca9557_dev, &config_val)); + TEST_ASSERT_EQUAL(RETURN_OK, PCA9557_getConfig(&pca9557_dev, &config_val)); TEST_ASSERT_EQUAL_HEX8(0xCD, config_val); } @@ -127,14 +123,11 @@ void test_PCA9557_not_present(void) I2C_Dev invalid_dev = pca9557_dev; invalid_dev.slave_addr = 0x01; - TEST_ASSERT_EQUAL(RETURN_NOTOK, - PCA9557_getInput(&invalid_dev, &dummy_val)); + TEST_ASSERT_EQUAL(RETURN_NOTOK, PCA9557_getInput(&invalid_dev, &dummy_val)); TEST_ASSERT_EQUAL(RETURN_NOTOK, PCA9557_getOutput(&invalid_dev, &dummy_val)); - TEST_ASSERT_EQUAL(RETURN_NOTOK, - PCA9557_setOutput(&invalid_dev, dummy_val)); - TEST_ASSERT_EQUAL(RETURN_NOTOK, - PCA9557_setConfig(&invalid_dev, dummy_val)); + TEST_ASSERT_EQUAL(RETURN_NOTOK, PCA9557_setOutput(&invalid_dev, dummy_val)); + TEST_ASSERT_EQUAL(RETURN_NOTOK, PCA9557_setConfig(&invalid_dev, dummy_val)); TEST_ASSERT_EQUAL(RETURN_NOTOK, PCA9557_getConfig(&invalid_dev, &dummy_val)); TEST_ASSERT_EQUAL(RETURN_NOTOK, diff --git a/firmware/ec/test/suites/Test_powerSource.c b/firmware/ec/test/suites/Test_powerSource.c index 1914378cd9..b85d6988cb 100644 --- a/firmware/ec/test/suites/Test_powerSource.c +++ b/firmware/ec/test/suites/Test_powerSource.c @@ -162,9 +162,10 @@ static OcGpio_Port s_fake_io_port = { static OcGpio_Port s_fake_io_exp = { .fn_table = &GpioSX1509_fnTable, - .cfg = &(SX1509_Cfg) { - .i2c_dev = { I2C_BUS, I2C_ADDR }, - }, + .cfg = + &(SX1509_Cfg){ + .i2c_dev = { I2C_BUS, I2C_ADDR }, + }, .object_data = &(SX1509_Obj){}, }; @@ -193,26 +194,27 @@ void suite_tearDown(void) } static PWRSRC_Dev p_dev = { - .cfg = { - /* SOLAR_AUX_PRSNT_N */ - .pin_solar_aux_prsnt_n = { &s_fake_io_port, 0x1E }, - /* POE_PRSNT_N */ - .pin_poe_prsnt_n = { &s_fake_io_port, 0x55 }, - /* INT_BAT_PRSNT */ - .pin_int_bat_prsnt = { &s_fake_io_exp, 11 }, - /* EXT_BAT_PRSNT */ - .pin_ext_bat_prsnt = { &s_fake_io_exp, 12 }, - }, + .cfg = + { + /* SOLAR_AUX_PRSNT_N */ + .pin_solar_aux_prsnt_n = { &s_fake_io_port, 0x1E }, + /* POE_PRSNT_N */ + .pin_poe_prsnt_n = { &s_fake_io_port, 0x55 }, + /* INT_BAT_PRSNT */ + .pin_int_bat_prsnt = { &s_fake_io_exp, 11 }, + /* EXT_BAT_PRSNT */ + .pin_ext_bat_prsnt = { &s_fake_io_exp, 12 }, + }, }; /* ================================ Tests =================================== */ void test_pwr_process_get_status_parameters_data_poeavailable(void) { uint8_t powerStatus = 0; - uint8_t index = 0x00; //PoE Availability - PWR_GpioPins[0x55] = 0x0; //PoE Enable - PWR_GpioPins[0x1E] = 0x1; //Aux/solar Disable - SX1509_regs[0x10] = 0x18; //Int/Ext Battery Disable + uint8_t index = 0x00; //PoE Availability + PWR_GpioPins[0x55] = 0x0; //PoE Enable + PWR_GpioPins[0x1E] = 0x1; //Aux/solar Disable + SX1509_regs[0x10] = 0x18; //Int/Ext Battery Disable SX1509_regs[0x11] = 0x00; pwr_source_init(); @@ -225,12 +227,12 @@ void test_pwr_process_get_status_parameters_data_poeavailable(void) void test_pwr_process_get_status_parameters_data_poeaccessible(void) { uint8_t powerStatus = 0; - uint8_t index = 0x01; //PoE Accessibility - PWR_GpioPins[0x55] = 0x0; //PoE Enable - PWR_GpioPins[0x1E] = 0x1; //Aux/solar Disable - SX1509_regs[0x10] = 0x18; //Int/Ext Battery Disable + uint8_t index = 0x01; //PoE Accessibility + PWR_GpioPins[0x55] = 0x0; //PoE Enable + PWR_GpioPins[0x1E] = 0x1; //Aux/solar Disable + SX1509_regs[0x10] = 0x18; //Int/Ext Battery Disable SX1509_regs[0x11] = 0x00; - + pwr_source_init(); pwr_get_source_info(&p_dev); pwr_process_get_status_parameters_data(index, &powerStatus); @@ -241,10 +243,10 @@ void test_pwr_process_get_status_parameters_data_poeaccessible(void) void test_pwr_process_get_status_parameters_data_solaravailable(void) { uint8_t powerStatus = 0; - uint8_t index = 0x02; //SOLAR Availability - PWR_GpioPins[0x55] = 0x1; //PoE Disable - PWR_GpioPins[0x1E] = 0x0; //Aux/solar Enable - SX1509_regs[0x10] = 0x18; //Int/Ext Battery Disable + uint8_t index = 0x02; //SOLAR Availability + PWR_GpioPins[0x55] = 0x1; //PoE Disable + PWR_GpioPins[0x1E] = 0x0; //Aux/solar Enable + SX1509_regs[0x10] = 0x18; //Int/Ext Battery Disable SX1509_regs[0x11] = 0x00; pwr_source_init(); @@ -256,11 +258,11 @@ void test_pwr_process_get_status_parameters_data_solaravailable(void) void test_pwr_process_get_status_parameters_data_solaraccessible(void) { - uint8_t powerStatus = 0; - uint8_t index = 0x03; //SOLAR Accessibility - PWR_GpioPins[0x55] = 0x1; //PoE Disable - PWR_GpioPins[0x1E] = 0x0; //Aux/solar Enable - SX1509_regs[0x10] = 0x18; //Int/Ext Battery Disable + uint8_t powerStatus = 0; + uint8_t index = 0x03; //SOLAR Accessibility + PWR_GpioPins[0x55] = 0x1; //PoE Disable + PWR_GpioPins[0x1E] = 0x0; //Aux/solar Enable + SX1509_regs[0x10] = 0x18; //Int/Ext Battery Disable SX1509_regs[0x11] = 0x00; pwr_source_init(); @@ -273,10 +275,10 @@ void test_pwr_process_get_status_parameters_data_solaraccessible(void) void test_pwr_process_get_status_parameters_data_extavailable(void) { uint8_t powerStatus = 0; - uint8_t index = 0x04; //Ext Batt availability - PWR_GpioPins[0x55] = 0x1; //PoE Disable - PWR_GpioPins[0x1E] = 0x1; //Aux/solar Disable - SX1509_regs[0x10] = 0x08; //Int Batt OFF, Ext batt ON + uint8_t index = 0x04; //Ext Batt availability + PWR_GpioPins[0x55] = 0x1; //PoE Disable + PWR_GpioPins[0x1E] = 0x1; //Aux/solar Disable + SX1509_regs[0x10] = 0x08; //Int Batt OFF, Ext batt ON SX1509_regs[0x11] = 0x00; pwr_source_init(); @@ -289,10 +291,10 @@ void test_pwr_process_get_status_parameters_data_extavailable(void) void test_pwr_process_get_status_parameters_data_extaccessible(void) { uint8_t powerStatus = 0; - uint8_t index = 0x05; //Ext Batt accessibility - PWR_GpioPins[0x55] = 0x1; //PoE Disable - PWR_GpioPins[0x1E] = 0x1; //Aux/solar Disable - SX1509_regs[0x10] = 0x08; //Int Batt OFF, Ext batt ON + uint8_t index = 0x05; //Ext Batt accessibility + PWR_GpioPins[0x55] = 0x1; //PoE Disable + PWR_GpioPins[0x1E] = 0x1; //Aux/solar Disable + SX1509_regs[0x10] = 0x08; //Int Batt OFF, Ext batt ON SX1509_regs[0x11] = 0x00; pwr_source_init(); @@ -303,28 +305,28 @@ void test_pwr_process_get_status_parameters_data_extaccessible(void) } void test_pwr_process_get_status_parameters_data_intavailable(void) -{ - uint8_t powerStatus = 0; - uint8_t index = 0x06; //Int Batt Availability - PWR_GpioPins[0x55] = 0x1; //PoE Disable - PWR_GpioPins[0x1E] = 0x1; //Aux/solar Disable - SX1509_regs[0x10] = 0x10; //Ext Batt OFF, Int batt ON - SX1509_regs[0x11] = 0x00; - - pwr_source_init(); - pwr_get_source_info(&p_dev); - pwr_process_get_status_parameters_data(index, &powerStatus); - - TEST_ASSERT_EQUAL(1, powerStatus); -} - -void test_pwr_process_get_status_parameters_data_intaccessible(void) { uint8_t powerStatus = 0; - uint8_t index = 0x07; //Int Batt Accessibility - PWR_GpioPins[0x55] = 0x1; //PoE Disable - PWR_GpioPins[0x1E] = 0x1; //Aux/solar Disable - SX1509_regs[0x10] = 0x10; //Ext Batt OFF, Int batt ON + uint8_t index = 0x06; //Int Batt Availability + PWR_GpioPins[0x55] = 0x1; //PoE Disable + PWR_GpioPins[0x1E] = 0x1; //Aux/solar Disable + SX1509_regs[0x10] = 0x10; //Ext Batt OFF, Int batt ON + SX1509_regs[0x11] = 0x00; + + pwr_source_init(); + pwr_get_source_info(&p_dev); + pwr_process_get_status_parameters_data(index, &powerStatus); + + TEST_ASSERT_EQUAL(1, powerStatus); +} + +void test_pwr_process_get_status_parameters_data_intaccessible(void) +{ + uint8_t powerStatus = 0; + uint8_t index = 0x07; //Int Batt Accessibility + PWR_GpioPins[0x55] = 0x1; //PoE Disable + PWR_GpioPins[0x1E] = 0x1; //Aux/solar Disable + SX1509_regs[0x10] = 0x10; //Ext Batt OFF, Int batt ON SX1509_regs[0x11] = 0x00; pwr_source_init(); diff --git a/firmware/ec/test/suites/Test_se98a.c b/firmware/ec/test/suites/Test_se98a.c index e6693a8e69..4d06780904 100644 --- a/firmware/ec/test/suites/Test_se98a.c +++ b/firmware/ec/test/suites/Test_se98a.c @@ -23,20 +23,24 @@ static OcGpio_Port s_fake_io_port = { }; static SE98A_Dev s_dev = { - .cfg = { - .dev = { - .bus = 3, - .slave_addr = 0x1A, - }, - }, + .cfg = + { + .dev = + { + .bus = 3, + .slave_addr = 0x1A, + }, + }, }; static SE98A_Dev s_invalid = { - .cfg = { - .dev = { - .bus = 3, - .slave_addr = 0xFF, - }, - }, + .cfg = + { + .dev = + { + .bus = 3, + .slave_addr = 0xFF, + }, + }, }; static uint16_t SE98A_regs[] = { @@ -59,7 +63,7 @@ static uint32_t SE98A_GpioConfig[] = { /* ============================= Fake Functions ============================= */ #include unsigned int s_task_sleep_ticks; -xdc_Void ti_sysbios_knl_Task_sleep__E( xdc_UInt32 nticks ) +xdc_Void ti_sysbios_knl_Task_sleep__E(xdc_UInt32 nticks) { s_task_sleep_ticks += nticks; } @@ -114,10 +118,11 @@ void test_se98a_init(void) /* Now try to init with a pin associated */ SE98A_Dev alerted_dev = { - .cfg = { - .dev = s_dev.cfg.dev, - .pin_evt = &(OcGpio_Pin){ &s_fake_io_port, 5 }, - }, + .cfg = + { + .dev = s_dev.cfg.dev, + .pin_evt = &(OcGpio_Pin){ &s_fake_io_port, 5 }, + }, }; TEST_ASSERT_EQUAL(RETURN_OK, se98a_init(&alerted_dev)); } @@ -163,20 +168,23 @@ void test_se98a_alerts(void) /* Now try to init with a pin associated */ SE98A_Dev alerted_dev = { - .cfg = { - .dev = s_dev.cfg.dev, - .pin_evt = &(OcGpio_Pin){ &s_fake_io_port, 5 }, - }, + .cfg = + { + .dev = s_dev.cfg.dev, + .pin_evt = &(OcGpio_Pin){ &s_fake_io_port, 5 }, + }, }; TEST_ASSERT_EQUAL(RETURN_OK, se98a_init(&alerted_dev)); - TEST_ASSERT_EQUAL(RETURN_OK, se98a_set_limit(&alerted_dev, - CONF_TEMP_SE98A_LOW_LIMIT_REG, -10)); - TEST_ASSERT_EQUAL(RETURN_OK, se98a_set_limit(&alerted_dev, - CONF_TEMP_SE98A_HIGH_LIMIT_REG, 75)); - TEST_ASSERT_EQUAL(RETURN_OK, se98a_set_limit(&alerted_dev, - CONF_TEMP_SE98A_CRITICAL_LIMIT_REG, - 80)); + TEST_ASSERT_EQUAL( + RETURN_OK, + se98a_set_limit(&alerted_dev, CONF_TEMP_SE98A_LOW_LIMIT_REG, -10)); + TEST_ASSERT_EQUAL( + RETURN_OK, + se98a_set_limit(&alerted_dev, CONF_TEMP_SE98A_HIGH_LIMIT_REG, 75)); + TEST_ASSERT_EQUAL(RETURN_OK, + se98a_set_limit(&alerted_dev, + CONF_TEMP_SE98A_CRITICAL_LIMIT_REG, 80)); se98a_set_alert_handler(&alerted_dev, alert_handler, NULL); s_task_sleep_ticks = 0; TEST_ASSERT_EQUAL(RETURN_OK, se98a_enable_alerts(&alerted_dev)); @@ -193,20 +201,20 @@ void test_se98a_alerts(void) TEST_ASSERT_FALSE(s_alert_data.triggered); /* Test alert below window */ - _test_alert(&alerted_dev, 0x2000 | 0x1E64 /* LOW | -25.75 */, - SE98A_EVT_BAW, -26); + _test_alert(&alerted_dev, 0x2000 | 0x1E64 /* LOW | -25.75 */, SE98A_EVT_BAW, + -26); /* Test alert above window */ - _test_alert(&alerted_dev, 0x4000 | (76 << 4) /* HIGH | 75 */, - SE98A_EVT_AAW, 76); + _test_alert(&alerted_dev, 0x4000 | (76 << 4) /* HIGH | 75 */, SE98A_EVT_AAW, + 76); /* Test alert critical */ - _test_alert(&alerted_dev, 0x8000 | (90 << 4) /* CRIT | 90 */, - SE98A_EVT_ACT, 90); + _test_alert(&alerted_dev, 0x8000 | (90 << 4) /* CRIT | 90 */, SE98A_EVT_ACT, + 90); /* Make sure the critical alert takes precedence */ - _test_alert(&alerted_dev, 0xE000 | (90 << 4) /* CRIT | 90 */, - SE98A_EVT_ACT, 90); + _test_alert(&alerted_dev, 0xE000 | (90 << 4) /* CRIT | 90 */, SE98A_EVT_ACT, + 90); } void test_se98a_probe(void) @@ -217,19 +225,19 @@ void test_se98a_probe(void) POSTData postData; SE98A_regs[0x07] = 0xA102; SE98A_regs[0x06] = 0x1131; - TEST_ASSERT_EQUAL(POST_DEV_FOUND, se98a_probe(&s_dev,&postData)); + TEST_ASSERT_EQUAL(POST_DEV_FOUND, se98a_probe(&s_dev, &postData)); /* Test with an incorrect device ID */ SE98A_regs[0x07] = 0xFACE; - TEST_ASSERT_EQUAL(POST_DEV_ID_MISMATCH, se98a_probe(&s_dev,&postData)); + TEST_ASSERT_EQUAL(POST_DEV_ID_MISMATCH, se98a_probe(&s_dev, &postData)); /* Test with an incorrect mfg ID */ SE98A_regs[0x07] = 0xA102; SE98A_regs[0x06] = 0xABCD; - TEST_ASSERT_EQUAL(POST_DEV_ID_MISMATCH, se98a_probe(&s_dev,&postData)); + TEST_ASSERT_EQUAL(POST_DEV_ID_MISMATCH, se98a_probe(&s_dev, &postData)); /* Test with a missing device */ - TEST_ASSERT_EQUAL(POST_DEV_MISSING, se98a_probe(&s_invalid,&postData)); + TEST_ASSERT_EQUAL(POST_DEV_MISSING, se98a_probe(&s_invalid, &postData)); } /* Helper to let us run through the various limits we can set */ @@ -330,44 +338,44 @@ static void test_get_x_limit(eTempSensor_ConfigParamsId limitToConfig, int8_t limit; SE98A_regs[reg_addr] = 0x0000; - TEST_ASSERT_EQUAL(RETURN_OK, se98a_get_limit(&s_dev, limitToConfig, - &limit)); + TEST_ASSERT_EQUAL(RETURN_OK, + se98a_get_limit(&s_dev, limitToConfig, &limit)); TEST_ASSERT_EQUAL(0, limit); SE98A_regs[reg_addr] = 1 << 4; - TEST_ASSERT_EQUAL(RETURN_OK, se98a_get_limit(&s_dev, limitToConfig, - &limit)); + TEST_ASSERT_EQUAL(RETURN_OK, + se98a_get_limit(&s_dev, limitToConfig, &limit)); TEST_ASSERT_EQUAL(1, limit); SE98A_regs[reg_addr] = 75 << 4; - TEST_ASSERT_EQUAL(RETURN_OK, se98a_get_limit(&s_dev, limitToConfig, - &limit)); + TEST_ASSERT_EQUAL(RETURN_OK, + se98a_get_limit(&s_dev, limitToConfig, &limit)); TEST_ASSERT_EQUAL(75, limit); SE98A_regs[reg_addr] = 0x019C; /* 25.75 */ - TEST_ASSERT_EQUAL(RETURN_OK, se98a_get_limit(&s_dev, limitToConfig, - &limit)); + TEST_ASSERT_EQUAL(RETURN_OK, + se98a_get_limit(&s_dev, limitToConfig, &limit)); TEST_ASSERT_EQUAL(26, limit); SE98A_regs[reg_addr] = 0x1B50; - TEST_ASSERT_EQUAL(RETURN_OK, se98a_get_limit(&s_dev, limitToConfig, - &limit)); + TEST_ASSERT_EQUAL(RETURN_OK, + se98a_get_limit(&s_dev, limitToConfig, &limit)); TEST_ASSERT_EQUAL(-75, limit); SE98A_regs[reg_addr] = 0x07F0; - TEST_ASSERT_EQUAL(RETURN_OK, se98a_get_limit(&s_dev, limitToConfig, - &limit)); + TEST_ASSERT_EQUAL(RETURN_OK, + se98a_get_limit(&s_dev, limitToConfig, &limit)); TEST_ASSERT_EQUAL(127, limit); SE98A_regs[reg_addr] = 0x1800; - TEST_ASSERT_EQUAL(RETURN_OK, se98a_get_limit(&s_dev, limitToConfig, - &limit)); + TEST_ASSERT_EQUAL(RETURN_OK, + se98a_get_limit(&s_dev, limitToConfig, &limit)); TEST_ASSERT_EQUAL(-128, limit); /* Make sure we mask the RFU bits out */ SE98A_regs[reg_addr] = 0x07FC; - TEST_ASSERT_EQUAL(RETURN_OK, se98a_get_limit(&s_dev, limitToConfig, - &limit)); + TEST_ASSERT_EQUAL(RETURN_OK, + se98a_get_limit(&s_dev, limitToConfig, &limit)); TEST_ASSERT_EQUAL(127, limit); } diff --git a/firmware/ec/test/suites/Test_sx1509.c b/firmware/ec/test/suites/Test_sx1509.c index 4d466ce2c2..0ffd0f5763 100644 --- a/firmware/ec/test/suites/Test_sx1509.c +++ b/firmware/ec/test/suites/Test_sx1509.c @@ -15,8 +15,8 @@ #include /* ======================== Constants & variables =========================== */ -#define I2C_BUS 7 -#define I2C_ADDR 0x00 +#define I2C_BUS 7 +#define I2C_ADDR 0x00 static const I2C_Dev s_sx1509_dev = { .bus = I2C_BUS, @@ -171,15 +171,13 @@ void test_ioexp_led_input(void) uint8_t input_val = 0xff; SX1509_regs[0x11] = 0xF2; - TEST_ASSERT_EQUAL(RETURN_OK, - ioexp_led_get_data(&s_sx1509_dev, - SX1509_REG_A, &input_val)); + TEST_ASSERT_EQUAL(RETURN_OK, ioexp_led_get_data(&s_sx1509_dev, SX1509_REG_A, + &input_val)); TEST_ASSERT_EQUAL_HEX8(0xF2, input_val); SX1509_regs[0x10] = 0x04; - TEST_ASSERT_EQUAL(RETURN_OK, - ioexp_led_get_data(&s_sx1509_dev, - SX1509_REG_B, &input_val)); + TEST_ASSERT_EQUAL(RETURN_OK, ioexp_led_get_data(&s_sx1509_dev, SX1509_REG_B, + &input_val)); TEST_ASSERT_EQUAL_HEX8(0x04, input_val); } @@ -189,19 +187,16 @@ void test_ioexp_led_output(void) uint8_t output_val = 0xff; SX1509_regs[0x11] = 0x0C; - TEST_ASSERT_EQUAL(RETURN_OK, - ioexp_led_get_data(&s_sx1509_dev, - SX1509_REG_A, &output_val)); + TEST_ASSERT_EQUAL(RETURN_OK, ioexp_led_get_data(&s_sx1509_dev, SX1509_REG_A, + &output_val)); TEST_ASSERT_EQUAL_HEX8(0x0C, output_val); - TEST_ASSERT_EQUAL(RETURN_OK, - ioexp_led_set_data(&s_sx1509_dev, - SX1509_REG_A, 0xAA, 0x00)); + TEST_ASSERT_EQUAL(RETURN_OK, ioexp_led_set_data(&s_sx1509_dev, SX1509_REG_A, + 0xAA, 0x00)); TEST_ASSERT_EQUAL_HEX8(0xAA, SX1509_regs[0x11]); - TEST_ASSERT_EQUAL(RETURN_OK, - ioexp_led_get_data(&s_sx1509_dev, - SX1509_REG_A, &output_val)); + TEST_ASSERT_EQUAL(RETURN_OK, ioexp_led_get_data(&s_sx1509_dev, SX1509_REG_A, + &output_val)); TEST_ASSERT_EQUAL_HEX8(0xAA, output_val); } @@ -209,8 +204,8 @@ void test_ioexp_led_on_time(void) { /* Test setting on time value */ TEST_ASSERT_EQUAL(RETURN_OK, - ioexp_led_set_on_time(&s_sx1509_dev, - 0, 0x10)); // ON time register I/O[0] + ioexp_led_set_on_time(&s_sx1509_dev, 0, + 0x10)); // ON time register I/O[0] TEST_ASSERT_EQUAL_HEX8(0x10, SX1509_regs[0x29]); } @@ -218,106 +213,104 @@ void test_ioexp_led_off_time(void) { /* Test setting off time value */ TEST_ASSERT_EQUAL(RETURN_OK, - ioexp_led_set_off_time(&s_sx1509_dev, - 0, 0x80)); // OFF time register I/O[0] + ioexp_led_set_off_time(&s_sx1509_dev, 0, + 0x80)); // OFF time register I/O[0] TEST_ASSERT_EQUAL_HEX8(0x80, SX1509_regs[0x2B]); } - void test_ioexp_led_software_reset(void) { /* Test software reset */ - TEST_ASSERT_EQUAL(RETURN_OK, - ioexp_led_software_reset(&s_sx1509_dev)); + TEST_ASSERT_EQUAL(RETURN_OK, ioexp_led_software_reset(&s_sx1509_dev)); } void test_ioexp_led_inputbuffer(void) { /* Test setting input buffer values */ - TEST_ASSERT_EQUAL(RETURN_OK, - ioexp_led_config_inputbuffer(&s_sx1509_dev, - SX1509_REG_AB, 0x55, 0xAA)); // LSB(Reg A), LSB(Reg B) + TEST_ASSERT_EQUAL(RETURN_OK, ioexp_led_config_inputbuffer( + &s_sx1509_dev, SX1509_REG_AB, 0x55, + 0xAA)); // LSB(Reg A), LSB(Reg B) TEST_ASSERT_EQUAL_HEX8(0x55, SX1509_regs[0x01]); // Reg A TEST_ASSERT_EQUAL_HEX8(0xAA, SX1509_regs[0x00]); // Reg B TEST_ASSERT_EQUAL(RETURN_OK, - ioexp_led_config_inputbuffer(&s_sx1509_dev, - SX1509_REG_B, 0x7F, 0x00)); // Reg B + ioexp_led_config_inputbuffer(&s_sx1509_dev, SX1509_REG_B, + 0x7F, 0x00)); // Reg B TEST_ASSERT_EQUAL_HEX8(0x7F, SX1509_regs[0x00]); } void test_ioexp_led_pullup(void) { /* Test setting pull up values */ - TEST_ASSERT_EQUAL(RETURN_OK, - ioexp_led_config_pullup(&s_sx1509_dev, - SX1509_REG_AB, 0x27, 0x82)); // LSB(Reg A), MSB(Reg B) + TEST_ASSERT_EQUAL(RETURN_OK, ioexp_led_config_pullup( + &s_sx1509_dev, SX1509_REG_AB, 0x27, + 0x82)); // LSB(Reg A), MSB(Reg B) TEST_ASSERT_EQUAL_HEX8(0x27, SX1509_regs[0x07]); // Reg A TEST_ASSERT_EQUAL_HEX8(0x82, SX1509_regs[0x06]); // Reg B TEST_ASSERT_EQUAL(RETURN_OK, - ioexp_led_config_pullup(&s_sx1509_dev, - SX1509_REG_A, 0x23, 0x00)); // Reg A + ioexp_led_config_pullup(&s_sx1509_dev, SX1509_REG_A, 0x23, + 0x00)); // Reg A TEST_ASSERT_EQUAL_HEX8(0x23, SX1509_regs[0x07]); } void test_ioexp_led_pulldown(void) { /* Test setting pull down values */ - TEST_ASSERT_EQUAL(RETURN_OK, - ioexp_led_config_pulldown(&s_sx1509_dev, - SX1509_REG_AB, 0x32, 0x5F)); // LSB(Reg A), MSB(Reg B) + TEST_ASSERT_EQUAL(RETURN_OK, ioexp_led_config_pulldown( + &s_sx1509_dev, SX1509_REG_AB, 0x32, + 0x5F)); // LSB(Reg A), MSB(Reg B) TEST_ASSERT_EQUAL_HEX8(0x32, SX1509_regs[0x09]); // Reg A TEST_ASSERT_EQUAL_HEX8(0x5F, SX1509_regs[0x08]); // Reg B TEST_ASSERT_EQUAL(RETURN_OK, - ioexp_led_config_pulldown(&s_sx1509_dev, - SX1509_REG_A, 0xFF, 0x00)); // Reg A + ioexp_led_config_pulldown(&s_sx1509_dev, SX1509_REG_A, + 0xFF, 0x00)); // Reg A TEST_ASSERT_EQUAL_HEX8(0xFF, SX1509_regs[0x09]); } void test_ioexp_led_opendrain(void) { /* Test setting open drain values */ - TEST_ASSERT_EQUAL(RETURN_OK, - ioexp_led_config_opendrain(&s_sx1509_dev, - SX1509_REG_AB, 0x45, 0x54)); // LSB(Reg A), MSB(Reg B) + TEST_ASSERT_EQUAL(RETURN_OK, ioexp_led_config_opendrain( + &s_sx1509_dev, SX1509_REG_AB, 0x45, + 0x54)); // LSB(Reg A), MSB(Reg B) TEST_ASSERT_EQUAL_HEX8(0x45, SX1509_regs[0x0B]); // Reg A TEST_ASSERT_EQUAL_HEX8(0x54, SX1509_regs[0x0A]); // Reg B TEST_ASSERT_EQUAL(RETURN_OK, - ioexp_led_config_opendrain(&s_sx1509_dev, - SX1509_REG_B, 0x00, 0x00)); // Reg A + ioexp_led_config_opendrain(&s_sx1509_dev, SX1509_REG_B, + 0x00, 0x00)); // Reg A TEST_ASSERT_EQUAL_HEX8(0x00, SX1509_regs[0x0A]); } void test_ioexp_led_data_direction(void) { /* Test setting data direction values */ - TEST_ASSERT_EQUAL(RETURN_OK, - ioexp_led_config_data_direction(&s_sx1509_dev, - SX1509_REG_AB, 0xAB, 0xD9)); // LSB(Reg A), MSB(Reg B) + TEST_ASSERT_EQUAL(RETURN_OK, ioexp_led_config_data_direction( + &s_sx1509_dev, SX1509_REG_AB, 0xAB, + 0xD9)); // LSB(Reg A), MSB(Reg B) TEST_ASSERT_EQUAL_HEX8(0xAB, SX1509_regs[0x0F]); // Reg A TEST_ASSERT_EQUAL_HEX8(0xD9, SX1509_regs[0x0E]); // Reg B - TEST_ASSERT_EQUAL(RETURN_OK, - ioexp_led_config_data_direction(&s_sx1509_dev, - SX1509_REG_B, 0x98, 0x00)); // Reg A + TEST_ASSERT_EQUAL(RETURN_OK, ioexp_led_config_data_direction( + &s_sx1509_dev, SX1509_REG_B, 0x98, + 0x00)); // Reg A TEST_ASSERT_EQUAL_HEX8(0x98, SX1509_regs[0x0E]); } void test_ioexp_led_polarity(void) { /* Test setting polarity values */ - TEST_ASSERT_EQUAL(RETURN_OK, - ioexp_led_config_polarity(&s_sx1509_dev, - SX1509_REG_AB, 0x67, 0xCD)); // LSB(Reg A), MSB(Reg B) + TEST_ASSERT_EQUAL(RETURN_OK, ioexp_led_config_polarity( + &s_sx1509_dev, SX1509_REG_AB, 0x67, + 0xCD)); // LSB(Reg A), MSB(Reg B) TEST_ASSERT_EQUAL_HEX8(0x67, SX1509_regs[0x0D]); // Reg A TEST_ASSERT_EQUAL_HEX8(0xCD, SX1509_regs[0x0C]); // Reg B TEST_ASSERT_EQUAL(RETURN_OK, - ioexp_led_config_polarity(&s_sx1509_dev, - SX1509_REG_A, 0xAB, 0x00)); // Reg A + ioexp_led_config_polarity(&s_sx1509_dev, SX1509_REG_A, + 0xAB, 0x00)); // Reg A TEST_ASSERT_EQUAL_HEX8(0xAB, SX1509_regs[0x0D]); } @@ -326,17 +319,19 @@ void test_ioexp_led_clock(void) /* Test setting clock settings */ TEST_ASSERT_EQUAL(RETURN_OK, ioexp_led_config_clock(&s_sx1509_dev, - SX1509_INTERNAL_CLOCK_2MHZ, SX1509_CLOCK_OSC_IN)); + SX1509_INTERNAL_CLOCK_2MHZ, + SX1509_CLOCK_OSC_IN)); TEST_ASSERT_EQUAL_HEX8(0x40, SX1509_regs[0x1E]); //0100 0000 - TEST_ASSERT_EQUAL(RETURN_OK, - ioexp_led_config_clock(&s_sx1509_dev, - SX1509_EXTERNAL_CLOCK, SX1509_CLOCK_OSC_IN)); + TEST_ASSERT_EQUAL(RETURN_OK, ioexp_led_config_clock(&s_sx1509_dev, + SX1509_EXTERNAL_CLOCK, + SX1509_CLOCK_OSC_IN)); TEST_ASSERT_EQUAL_HEX8(0x20, SX1509_regs[0x1E]); //0010 0000 TEST_ASSERT_EQUAL(RETURN_OK, ioexp_led_config_clock(&s_sx1509_dev, - SX1509_INTERNAL_CLOCK_2MHZ, SX1509_CLOCK_OSC_OUT)); + SX1509_INTERNAL_CLOCK_2MHZ, + SX1509_CLOCK_OSC_OUT)); TEST_ASSERT_EQUAL_HEX8(0x50, SX1509_regs[0x1E]); //0101 0000 //How to configure clock frequency on OSCOUT pin? @@ -345,19 +340,22 @@ void test_ioexp_led_clock(void) void test_ioexp_led_misc(void) { /* Test setting misc settings */ - TEST_ASSERT_EQUAL(RETURN_OK, - ioexp_led_config_misc(&s_sx1509_dev, - 0x24)); //Clkx-1MHz, Fading-Linear(Bank A, B) + TEST_ASSERT_EQUAL( + RETURN_OK, + ioexp_led_config_misc(&s_sx1509_dev, + 0x24)); //Clkx-1MHz, Fading-Linear(Bank A, B) TEST_ASSERT_EQUAL_HEX8(0x24, SX1509_regs[0x1F]); TEST_ASSERT_EQUAL(RETURN_OK, - ioexp_led_config_misc(&s_sx1509_dev, - 0x54)); //Clkx-125KHz, Fading-Linear(Bank A, B) + ioexp_led_config_misc( + &s_sx1509_dev, + 0x54)); //Clkx-125KHz, Fading-Linear(Bank A, B) TEST_ASSERT_EQUAL_HEX8(0x54, SX1509_regs[0x1F]); //0010 0000 TEST_ASSERT_EQUAL(RETURN_OK, - ioexp_led_config_misc(&s_sx1509_dev, - 0xAC)); //Clkx-1MHz, Fading-Loarithmic(Bank A, B) + ioexp_led_config_misc( + &s_sx1509_dev, + 0xAC)); //Clkx-1MHz, Fading-Loarithmic(Bank A, B) TEST_ASSERT_EQUAL_HEX8(0xAC, SX1509_regs[0x1F]); //0101 0000 //How to configure multiple things on RegMisc settings? @@ -366,15 +364,15 @@ void test_ioexp_led_misc(void) void test_ioexp_led_enable_leddriver(void) { /* Test setting led driver values */ - TEST_ASSERT_EQUAL(RETURN_OK, - ioexp_led_enable_leddriver(&s_sx1509_dev, - SX1509_REG_AB, 0x52, 0xF8)); // LSB(Reg A), MSB(Reg B) + TEST_ASSERT_EQUAL(RETURN_OK, ioexp_led_enable_leddriver( + &s_sx1509_dev, SX1509_REG_AB, 0x52, + 0xF8)); // LSB(Reg A), MSB(Reg B) TEST_ASSERT_EQUAL_HEX8(0x52, SX1509_regs[0x21]); // Reg A TEST_ASSERT_EQUAL_HEX8(0xF8, SX1509_regs[0x20]); // Reg B TEST_ASSERT_EQUAL(RETURN_OK, - ioexp_led_enable_leddriver(&s_sx1509_dev, - SX1509_REG_B, 0x9C, 0x00)); // Reg B + ioexp_led_enable_leddriver(&s_sx1509_dev, SX1509_REG_B, + 0x9C, 0x00)); // Reg B TEST_ASSERT_EQUAL_HEX8(0x9C, SX1509_regs[0x20]); } @@ -397,15 +395,15 @@ void test_ioexp_led_testregister_1(void) void test_ioexp_led_interrupt(void) { /* Test setting interrupt values */ - TEST_ASSERT_EQUAL(RETURN_OK, - ioexp_led_config_interrupt(&s_sx1509_dev, - SX1509_REG_AB, 0x27, 0x28)); // LSB(Reg A), MSB(Reg B) + TEST_ASSERT_EQUAL(RETURN_OK, ioexp_led_config_interrupt( + &s_sx1509_dev, SX1509_REG_AB, 0x27, + 0x28)); // LSB(Reg A), MSB(Reg B) TEST_ASSERT_EQUAL_HEX8(0x27, SX1509_regs[0x13]); // Reg A TEST_ASSERT_EQUAL_HEX8(0x28, SX1509_regs[0x12]); // Reg B TEST_ASSERT_EQUAL(RETURN_OK, - ioexp_led_config_interrupt(&s_sx1509_dev, - SX1509_REG_A, 0x38, 0x00)); // Reg A + ioexp_led_config_interrupt(&s_sx1509_dev, SX1509_REG_A, + 0x38, 0x00)); // Reg A TEST_ASSERT_EQUAL_HEX8(0x38, SX1509_regs[0x13]); } @@ -413,22 +411,22 @@ void test_ioexp_led_edge_sense_A(void) { /* Test setting Edge sense A values */ /* Rising edge */ - TEST_ASSERT_EQUAL(RETURN_OK, - ioexp_led_config_edge_sense_A(&s_sx1509_dev, - SX1509_REG_AB, 0x55, 0x55)); // Low(Reg A), High(Reg A) + TEST_ASSERT_EQUAL(RETURN_OK, ioexp_led_config_edge_sense_A( + &s_sx1509_dev, SX1509_REG_AB, 0x55, + 0x55)); // Low(Reg A), High(Reg A) TEST_ASSERT_EQUAL_HEX8(0x55, SX1509_regs[0x17]); // Low Reg A TEST_ASSERT_EQUAL_HEX8(0x55, SX1509_regs[0x16]); // High Reg A /* Falling edge */ TEST_ASSERT_EQUAL(RETURN_OK, - ioexp_led_config_edge_sense_A(&s_sx1509_dev, - SX1509_REG_A, 0xAA, 0x00)); // Low Reg A + ioexp_led_config_edge_sense_A(&s_sx1509_dev, SX1509_REG_A, + 0xAA, 0x00)); // Low Reg A TEST_ASSERT_EQUAL_HEX8(0xAA, SX1509_regs[0x17]); /* Both edges */ TEST_ASSERT_EQUAL(RETURN_OK, - ioexp_led_config_edge_sense_A(&s_sx1509_dev, - SX1509_REG_B, 0xFF, 0x00)); // High Reg A + ioexp_led_config_edge_sense_A(&s_sx1509_dev, SX1509_REG_B, + 0xFF, 0x00)); // High Reg A TEST_ASSERT_EQUAL_HEX8(0xFF, SX1509_regs[0x16]); } @@ -436,22 +434,22 @@ void test_ioexp_led_edge_sense_B(void) { /* Test setting Edge sense A values */ /* Falling edge */ - TEST_ASSERT_EQUAL(RETURN_OK, - ioexp_led_config_edge_sense_B(&s_sx1509_dev, - SX1509_REG_AB, 0xAA, 0xAA)); // Low(Reg B), High(Reg B) + TEST_ASSERT_EQUAL(RETURN_OK, ioexp_led_config_edge_sense_B( + &s_sx1509_dev, SX1509_REG_AB, 0xAA, + 0xAA)); // Low(Reg B), High(Reg B) TEST_ASSERT_EQUAL_HEX8(0xAA, SX1509_regs[0x15]); // Low Reg B TEST_ASSERT_EQUAL_HEX8(0xAA, SX1509_regs[0x14]); // High Reg B /* Rising edge */ TEST_ASSERT_EQUAL(RETURN_OK, - ioexp_led_config_edge_sense_B(&s_sx1509_dev, - SX1509_REG_B, 0x55, 0x00)); // High Reg B + ioexp_led_config_edge_sense_B(&s_sx1509_dev, SX1509_REG_B, + 0x55, 0x00)); // High Reg B TEST_ASSERT_EQUAL_HEX8(0x55, SX1509_regs[0x14]); /* Both edges */ TEST_ASSERT_EQUAL(RETURN_OK, - ioexp_led_config_edge_sense_B(&s_sx1509_dev, - SX1509_REG_A, 0xFF, 0x00)); // Low Reg B + ioexp_led_config_edge_sense_B(&s_sx1509_dev, SX1509_REG_A, + 0xFF, 0x00)); // Low Reg B TEST_ASSERT_EQUAL_HEX8(0xFF, SX1509_regs[0x15]); } @@ -472,15 +470,15 @@ void test_ioexp_led_debounce_time(void) void test_ioexp_led_enable_debounce(void) { /* Test enabling debounce values */ - TEST_ASSERT_EQUAL(RETURN_OK, - ioexp_led_enable_debounce(&s_sx1509_dev, - SX1509_REG_AB, 0x4B, 0x2C)); // LSB(Reg A), MSB(Reg B) + TEST_ASSERT_EQUAL(RETURN_OK, ioexp_led_enable_debounce( + &s_sx1509_dev, SX1509_REG_AB, 0x4B, + 0x2C)); // LSB(Reg A), MSB(Reg B) TEST_ASSERT_EQUAL_HEX8(0x4B, SX1509_regs[0x24]); // Reg A TEST_ASSERT_EQUAL_HEX8(0x2C, SX1509_regs[0x23]); // Reg B TEST_ASSERT_EQUAL(RETURN_OK, - ioexp_led_enable_debounce(&s_sx1509_dev, - SX1509_REG_B, 0x61, 0x00)); // Reg B + ioexp_led_enable_debounce(&s_sx1509_dev, SX1509_REG_B, + 0x61, 0x00)); // Reg B TEST_ASSERT_EQUAL_HEX8(0x61, SX1509_regs[0x23]); } @@ -517,18 +515,17 @@ void test_ioexp_led_not_present(void) /* Ensure that we fail properly if the device isn't on the bus */ uint8_t dummy_val; - TEST_ASSERT_EQUAL(RETURN_NOTOK, - ioexp_led_get_data(&invalid_dev, SX1509_REG_A, - &dummy_val)); - TEST_ASSERT_EQUAL(RETURN_NOTOK, - ioexp_led_set_data(&invalid_dev, SX1509_REG_A, - dummy_val, 0x00)); + TEST_ASSERT_EQUAL( + RETURN_NOTOK, + ioexp_led_get_data(&invalid_dev, SX1509_REG_A, &dummy_val)); + TEST_ASSERT_EQUAL( + RETURN_NOTOK, + ioexp_led_set_data(&invalid_dev, SX1509_REG_A, dummy_val, 0x00)); TEST_ASSERT_EQUAL(RETURN_NOTOK, ioexp_led_set_on_time(&invalid_dev, 0, dummy_val)); TEST_ASSERT_EQUAL(RETURN_NOTOK, ioexp_led_set_off_time(&invalid_dev, 0, dummy_val)); - TEST_ASSERT_EQUAL(RETURN_NOTOK, - ioexp_led_software_reset(&invalid_dev)); + TEST_ASSERT_EQUAL(RETURN_NOTOK, ioexp_led_software_reset(&invalid_dev)); TEST_ASSERT_EQUAL(RETURN_NOTOK, ioexp_led_config_inputbuffer(&invalid_dev, SX1509_REG_A, dummy_val, 0x00)); @@ -547,17 +544,14 @@ void test_ioexp_led_not_present(void) TEST_ASSERT_EQUAL(RETURN_NOTOK, ioexp_led_config_polarity(&invalid_dev, SX1509_REG_A, dummy_val, 0x00)); + TEST_ASSERT_EQUAL(RETURN_NOTOK, ioexp_led_config_clock(&invalid_dev, 0, 1)); TEST_ASSERT_EQUAL(RETURN_NOTOK, - ioexp_led_config_clock(&invalid_dev, 0, 1)); - TEST_ASSERT_EQUAL(RETURN_NOTOK, - ioexp_led_config_misc(&invalid_dev, - dummy_val)); + ioexp_led_config_misc(&invalid_dev, dummy_val)); TEST_ASSERT_EQUAL(RETURN_NOTOK, ioexp_led_enable_leddriver(&invalid_dev, SX1509_REG_A, dummy_val, 0x00)); TEST_ASSERT_EQUAL(RETURN_NOTOK, - ioexp_led_read_testregister_1(&invalid_dev, - &dummy_val)); + ioexp_led_read_testregister_1(&invalid_dev, &dummy_val)); TEST_ASSERT_EQUAL(RETURN_NOTOK, ioexp_led_config_interrupt(&invalid_dev, SX1509_REG_A, dummy_val, 0x00)); diff --git a/firmware/ec/test/xdc_stubs/xdc_target_posix.h b/firmware/ec/test/xdc_stubs/xdc_target_posix.h index d749fa3e00..90c84cb2a5 100644 --- a/firmware/ec/test/xdc_stubs/xdc_target_posix.h +++ b/firmware/ec/test/xdc_stubs/xdc_target_posix.h @@ -17,7 +17,6 @@ typedef uint32_t xdc_UInt32; typedef int64_t xdc_Int64; typedef uint64_t xdc_UInt64; - #define xdc__LONGLONG__ #define xdc__BITS8__ #define xdc__BITS16__ @@ -29,20 +28,20 @@ typedef uint64_t xdc_UInt64; * ======== Bits ======== */ #ifdef xdc__BITS8__ - typedef uint8_t xdc_Bits8; +typedef uint8_t xdc_Bits8; #endif #ifdef xdc__BITS16__ - typedef uint16_t xdc_Bits16; +typedef uint16_t xdc_Bits16; #endif #ifdef xdc__BITS32__ - typedef uint32_t xdc_Bits32; +typedef uint32_t xdc_Bits32; #endif #ifdef xdc__BITS64__ - typedef uint64_t xdc_Bits64; +typedef uint64_t xdc_Bits64; #endif /* * ======== [UI]Arg ======== */ -typedef intptr_t xdc_IArg; -typedef uintptr_t xdc_UArg; +typedef intptr_t xdc_IArg; +typedef uintptr_t xdc_UArg; From 26e898e7fb2a4725f35385eb59548ed910352c23 Mon Sep 17 00:00:00 2001 From: mdlewisfb Date: Fri, 19 Oct 2018 12:59:13 -0700 Subject: [PATCH 3/5] Adding lint flag to makefile. --- firmware/ec/Makefile | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/firmware/ec/Makefile b/firmware/ec/Makefile index 4c2d4c5bdc..a7d3273d21 100644 --- a/firmware/ec/Makefile +++ b/firmware/ec/Makefile @@ -77,6 +77,11 @@ LLIBS += -Wl,--end-group .PRECIOUS: $(OUT)%/compiler.opt $(OUT)%/linker.cmd OBJCOPY = $(TOOLCHAIN)/bin/arm-none-eabi-objcopy +ALL_FILE = $(shell find . -name '*.c' -o -name '*.h') +LINT = clang-format +LINT_FLAGS = -i -style=file -fallback-style=none + +.PRECIOUS: %/compiler.opt %/linker.cmd all: oc_connect1 oc_connect1: $(OUT)/OpenCellular.bin @@ -94,6 +99,9 @@ $(OUT)/OpenCellular.out: $(OUT)/$(CONFIG)/linker.cmd $(MAIN_OBJS) $(OUT)/OpenCellular.bin: $(OUT)/OpenCellular.out $(OBJCOPY) -S -O binary $< $@ +lint: + $(LINT) $(LINT_FLAGS) $(ALL_FILE) + clean: -rm -rf *.o *.out *.d *.rov.xs $(OUT) $(MAIN_OBJS) From 04a7d7265636cbfad282ad79085179ad3fd9b1d6 Mon Sep 17 00:00:00 2001 From: mdlewisfb Date: Tue, 23 Oct 2018 12:28:09 -0700 Subject: [PATCH 4/5] Updated .clang-format based on comments. Ran linter on all files --- firmware/ec/.clang-format | 9 +- firmware/ec/common/inc/global/Framework.h | 30 +- firmware/ec/common/inc/global/OC_CONNECT1.h | 36 +- firmware/ec/common/inc/global/ocmp_frame.h | 38 +- .../common/inc/ocmp_wrappers/ocmp_adt7481.h | 16 +- .../inc/ocmp_wrappers/ocmp_dat-xxr5a-pp.h | 14 +- .../common/inc/ocmp_wrappers/ocmp_debugi2c.h | 8 +- .../common/inc/ocmp_wrappers/ocmp_debugmdio.h | 8 +- .../inc/ocmp_wrappers/ocmp_debugocgpio.h | 8 +- .../inc/ocmp_wrappers/ocmp_eeprom_cat24c04.h | 45 +- .../ec/common/inc/ocmp_wrappers/ocmp_eth_sw.h | 38 +- .../ec/common/inc/ocmp_wrappers/ocmp_ina226.h | 16 +- .../common/inc/ocmp_wrappers/ocmp_iridium.h | 57 +- .../ec/common/inc/ocmp_wrappers/ocmp_led.h | 18 +- .../common/inc/ocmp_wrappers/ocmp_ltc4015.h | 34 +- .../common/inc/ocmp_wrappers/ocmp_ltc4274.h | 18 +- .../common/inc/ocmp_wrappers/ocmp_ltc4275.h | 14 +- .../inc/ocmp_wrappers/ocmp_powersource.h | 33 +- .../inc/ocmp_wrappers/ocmp_rfpowermonitor.h | 14 +- .../inc/ocmp_wrappers/ocmp_rfwatchdog.h | 2 +- .../ec/common/inc/ocmp_wrappers/ocmp_se98a.h | 16 +- .../ec/common/inc/ocmp_wrappers/ocmp_syncio.h | 17 +- .../inc/ocmp_wrappers/ocmp_testmodule.h | 136 +- firmware/ec/inc/common/byteorder.h | 54 +- firmware/ec/inc/common/global_header.h | 98 +- firmware/ec/inc/devices/88E6071_registers.h | 20 +- firmware/ec/inc/devices/adt7481.h | 17 +- firmware/ec/inc/devices/dat-xxr5a-pp.h | 2 +- firmware/ec/inc/devices/ext_battery.h | 23 +- firmware/ec/inc/devices/fe_param.h | 2 +- firmware/ec/inc/devices/ina226.h | 26 +- firmware/ec/inc/devices/int_battery.h | 16 +- firmware/ec/inc/devices/ltc4015.h | 2 +- firmware/ec/inc/devices/sbd.h | 14 +- firmware/ec/inc/subsystem/gpp/ebmp.h | 5 +- firmware/ec/inc/subsystem/sys/sys.h | 14 +- firmware/ec/inc/utils/util.h | 4 +- firmware/ec/platform/oc-sdr/cfg/OC_CONNECT1.c | 209 +- .../ec/platform/oc-sdr/cfg/OC_CONNECT_FE.c | 78 +- .../ec/platform/oc-sdr/cfg/OC_CONNECT_GBC.c | 266 ++- .../ec/platform/oc-sdr/cfg/OC_CONNECT_LED.c | 32 +- .../ec/platform/oc-sdr/cfg/OC_CONNECT_SDR.c | 41 +- .../ec/platform/oc-sdr/cfg/OC_CONNECT_SYNC.c | 6 +- firmware/ec/platform/oc-sdr/schema/schema.c | 1828 ++++++++--------- firmware/ec/src/bigbrother.c | 65 +- firmware/ec/src/comm/gossiper.c | 32 +- firmware/ec/src/devices/adt7481.c | 131 +- firmware/ec/src/devices/eeprom.c | 38 +- firmware/ec/src/devices/eth_sw.c | 132 +- firmware/ec/src/devices/g510.c | 8 +- firmware/ec/src/devices/i2c/XR20M1170.c | 9 +- firmware/ec/src/devices/i2c/XR20M1170.h | 35 +- .../ec/src/devices/i2c/XR20M1170_Registers.h | 11 +- firmware/ec/src/devices/i2c/threaded_int.h | 4 +- firmware/ec/src/devices/i2cbus.c | 14 +- firmware/ec/src/devices/ina226.c | 9 +- firmware/ec/src/devices/led.c | 263 +-- firmware/ec/src/devices/ltc4015.c | 66 +- firmware/ec/src/devices/ltc4015_registers.h | 76 +- firmware/ec/src/devices/ltc4274.c | 49 +- firmware/ec/src/devices/ltc4275.c | 5 +- .../src/devices/ocmp_wrappers/ocmp_adt7481.c | 20 +- .../devices/ocmp_wrappers/ocmp_dat-xxr5a-pp.c | 5 +- .../devices/ocmp_wrappers/ocmp_debugmdio.c | 24 +- .../devices/ocmp_wrappers/ocmp_debugocgpio.c | 22 +- .../src/devices/ocmp_wrappers/ocmp_eth_sw.c | 2 +- .../src/devices/ocmp_wrappers/ocmp_ltc4015.c | 19 +- .../src/devices/ocmp_wrappers/ocmp_ltc4274.c | 23 +- .../ec/src/devices/ocmp_wrappers/ocmp_mac.c | 22 +- .../devices/ocmp_wrappers/ocmp_powerSource.c | 5 +- firmware/ec/src/devices/pca9557.c | 4 +- firmware/ec/src/devices/powerSource.c | 14 +- firmware/ec/src/devices/sbdn9603.c | 2 +- firmware/ec/src/devices/se98a.c | 2 +- firmware/ec/src/devices/sx1509.c | 62 +- firmware/ec/src/devices/uart/at_cmd.c | 56 +- firmware/ec/src/devices/uart/at_cmd.h | 14 +- firmware/ec/src/devices/uart/gsm.c | 34 +- firmware/ec/src/devices/uart/gsm.h | 12 +- firmware/ec/src/devices/uart/sbd.c | 20 +- firmware/ec/src/devices/uart/sbd.h | 2 +- firmware/ec/src/drivers/GpioNative.c | 4 +- firmware/ec/src/drivers/GpioPCA9557.c | 5 +- firmware/ec/src/drivers/GpioSX1509.c | 40 +- firmware/ec/src/drivers/mdio_bb.c | 14 +- firmware/ec/src/helpers/array.h | 4 +- firmware/ec/src/helpers/attribute.h | 6 +- firmware/ec/src/helpers/i2c.c | 4 +- firmware/ec/src/helpers/i2c.h | 4 +- firmware/ec/src/helpers/math.h | 8 +- firmware/ec/src/helpers/memory.h | 34 +- .../ec/src/interfaces/Ethernet/tcp_tx_rx.c | 4 +- firmware/ec/src/interfaces/UART/uartdma.c | 45 +- firmware/ec/src/interfaces/USB/usb.c | 22 +- firmware/ec/src/interfaces/USB/usbcdcd.c | 2 +- firmware/ec/src/main.c | 27 +- firmware/ec/src/post/post.c | 47 +- firmware/ec/src/post/post_util.c | 29 +- firmware/ec/src/registry/SSRegistry.c | 39 +- firmware/ec/src/subsystem/gpp/ebmp.c | 38 +- firmware/ec/src/subsystem/gpp/gpp.c | 17 +- firmware/ec/src/subsystem/hci/led/hci_led.c | 2 +- firmware/ec/src/subsystem/rffe/rffe.c | 12 +- firmware/ec/src/subsystem/rffe/rffe_ctrl.c | 2 +- .../ec/src/subsystem/rffe/rffe_powermonitor.c | 2 +- firmware/ec/src/subsystem/sdr/sdr.c | 3 +- firmware/ec/src/subsystem/sync/sync.c | 4 +- firmware/ec/src/subsystem/sys/sys.c | 28 +- firmware/ec/src/subsystem/watchdog/watchdog.c | 11 +- firmware/ec/src/utils/ocmp_util.c | 34 +- firmware/ec/test/fake/fake_I2C.c | 2 +- firmware/ec/test/stub/stub_GateMutex.c | 4 +- firmware/ec/test/suites/Test_GpioPCA9557.c | 18 +- firmware/ec/test/suites/Test_GpioSX1509.c | 6 +- .../ec/test/suites/Test_PinGroup_driver.c | 14 +- firmware/ec/test/suites/Test_eeprom.c | 28 +- firmware/ec/test/suites/Test_ina226.c | 84 +- firmware/ec/test/suites/Test_ltc4015.c | 288 +-- firmware/ec/test/suites/Test_ltc4275.c | 8 +- firmware/ec/test/suites/Test_ocmp_adt7481.c | 70 +- firmware/ec/test/suites/Test_ocmp_ltc4274.c | 217 +- firmware/ec/test/suites/Test_powerSource.c | 90 +- firmware/ec/test/suites/Test_se98a.c | 58 +- firmware/ec/test/suites/Test_sx1509.c | 169 +- 124 files changed, 3081 insertions(+), 3159 deletions(-) diff --git a/firmware/ec/.clang-format b/firmware/ec/.clang-format index 32866a4377..50c72d789d 100644 --- a/firmware/ec/.clang-format +++ b/firmware/ec/.clang-format @@ -50,8 +50,8 @@ BreakStringLiterals: false ColumnLimit: 80 CommentPragmas: '^ IWYU pragma:' ConstructorInitializerAllOnOneLineOrOnePerLine: false -ConstructorInitializerIndentWidth: 8 -ContinuationIndentWidth: 8 +ConstructorInitializerIndentWidth: 4 +ContinuationIndentWidth: 4 Cpp11BracedListStyle: false DerivePointerAlignment: false DisableFormat: false @@ -74,6 +74,7 @@ IncludeCategories: Priority: 4 IncludeIsMainRegex: '(Test)?$' IndentCaseLabels: true +IndentPPDirectives: AfterHash IndentWidth: 4 IndentWrappedFunctionNames: false JavaScriptQuotes: Leave @@ -84,11 +85,11 @@ MacroBlockEnd: '' MaxEmptyLinesToKeep: 1 NamespaceIndentation: Inner #ObjCBinPackProtocolList: Auto # Unknown to clang-format-5.0 -ObjCBlockIndentWidth: 8 +ObjCBlockIndentWidth: 4 ObjCSpaceAfterProperty: true ObjCSpaceBeforeProtocolList: true PointerAlignment: Right -ReflowComments: false +ReflowComments: true SortIncludes: false SpaceAfterCStyleCast: false SpaceAfterTemplateKeyword: true diff --git a/firmware/ec/common/inc/global/Framework.h b/firmware/ec/common/inc/global/Framework.h index cbfa220a4e..84ffcb1223 100644 --- a/firmware/ec/common/inc/global/Framework.h +++ b/firmware/ec/common/inc/global/Framework.h @@ -21,14 +21,16 @@ /* For enabling schema sharing between host and firmware we need to import the * factory config and driver config to schema.c as weak attribute from - * OC_CONNECT1.C. This helps host compilation as it doesn't need to know symbol definition for the configs - * and schema sharing can be achived with limited common files. + * OC_CONNECT1.C. This helps host compilation as it doesn't need to know symbol + * definition for the configs and schema sharing can be achived with limited + * common files. */ #define SCHEMA_IMPORT extern __attribute__((weak)) /* DriverStruct acts as a generic datatype. - * In schema we are more intreseted in the address of structure so we use this datatype DriverStruct - * to avoid the include header for the devices in the system. + * In schema we are more intreseted in the address of structure so we use this + * datatype DriverStruct to avoid the include header for the devices in the + * system. */ typedef char DriverStruct; @@ -78,9 +80,10 @@ typedef struct Post { const CB_POST cb_postCmd; } Post; -// To avoid the awkward situation of not knowing how much to allocate for the return value (think -// string returns), we instead rely on the 'get' and 'set' functions to allocate and return a -// pointer to the value it wants to return via OCMP +// To avoid the awkward situation of not knowing how much to allocate for the +// return value (think string returns), we instead rely on the 'get' and 'set' +// functions to allocate and return a pointer to the value it wants to return +// via OCMP typedef bool (*StatusGet_Cb)(void *driver, unsigned int param_id, void *return_buf); typedef bool (*ConfigGet_Cb)(void *driver, unsigned int param_id, @@ -95,8 +98,8 @@ typedef ePostCode (*CB_Init)(void *driver, const void *config, typedef bool (*ssHook_Cb)(void *driver, void *return_buf); typedef struct Driver_fxnTable { - // TODO: These callbacks are a bit rough. They'll get the job done, but we should revisit other - // options (per-parameter callbacks for example) + // TODO: These callbacks are a bit rough. They'll get the job done, but we + // should revisit other options (per-parameter callbacks for example) StatusGet_Cb cb_get_status; ConfigGet_Cb cb_get_config; ConfigSet_Cb cb_set_config; @@ -128,13 +131,14 @@ typedef struct Component { const char *name; const struct Component *components; const Driver *driver; - void *driver_cfg; // TODO: this could be turned into a standard polymorphism struct to hold the - // driver, hw config & driver object data (like we did for GPIO) + void *driver_cfg; // TODO: this could be turned into a standard polymorphism + // struct to hold the driver, hw config & driver object data (like we did + // for GPIO) const void *factory_config; /* Factory defaults for the device */ const Command - *commands; /* TODO: super gross hack to fit into current CLI */ + *commands; /* TODO: super gross hack to fit into current CLI */ const SSHookSet *ssHookSet; - bool postDisabled; //Flag for POST execution. + bool postDisabled; // Flag for POST execution. void *ss; } Component; diff --git a/firmware/ec/common/inc/global/OC_CONNECT1.h b/firmware/ec/common/inc/global/OC_CONNECT1.h index 30664a1bda..9a6a5e8590 100644 --- a/firmware/ec/common/inc/global/OC_CONNECT1.h +++ b/firmware/ec/common/inc/global/OC_CONNECT1.h @@ -85,7 +85,7 @@ typedef enum OC_EC_PORTGroupName { } OC_EC_PORTGroupName; typedef enum OC_CONNECT1_GPIOName { - //PA + // PA OC_EC_DEBUG_UART_RX = 0, OC_EC_DEBUG_UART_TX, OC_EC_PSE_I2C6_SCLK, @@ -94,12 +94,12 @@ typedef enum OC_CONNECT1_GPIOName { OC_EC_SOC_UART3_TX, OC_EC_PWRMNTR_I2C6_SCLK, OC_EC_PWRMNTR_I2C6_SDA, - //PB + // PB OC_EC_LT4015_I2C0_SCLK = 8, OC_EC_LT40515I2C0_SDA, OC_EC_FLASH_nCS, OC_EC_FLASH_CLK, - //PC + // PC OC_EC_JTAG_TCK = 16, OC_EC_JTAG_TMS, OC_EC_JTAG_TDI, @@ -108,7 +108,7 @@ typedef enum OC_CONNECT1_GPIOName { OC_EC_SYNCCONN_UART_TX, OC_EC_ETHSW_MDC, OC_EC_ETHSW_MDIO, - //PD + // PD OC_EC_SYNCCONN_I2C7_SCLK = 24, OC_EC_SYNCCONN_I2C7_SDA, OC_EC_SDR_INA_ALERT, @@ -117,31 +117,31 @@ typedef enum OC_CONNECT1_GPIOName { OC_NOC_2, OC_EC_PWR_PRSNT_SOLAR_AUX, OC_EC_SYNC_IOEXP_ALERT, - //PE + // PE OC_EC_GBC_IOEXP71_ALERT = 32, - OC_EC_FE_CONTROL, //OC_CONNECT1_GBC_TEMP_ALERT2, + OC_EC_FE_CONTROL, // OC_CONNECT1_GBC_TEMP_ALERT2, OC_EC_AP_GPIO1, OC_EC_GPP_AP_BM_1, OC_EC_FLASH_MOSI, OC_EC_FLASH_MISO, - //PF + // PF OC_EC_JTAG_TRD2 = 40, OC_EC_JTAG_TRD1, OC_EC_JTAG_TRD0, OC_EC_JTAG_TRCLK, OC_EC_JTAG_TRD3, - //PG + // PG OC_EC_TEMPSEN_I2C1_SCLK = 48, OC_EC_TEMPSEN_I2C1_SDA, - //PH + // PH OC_EC_GPP_PMIC_CORE_PWR = 56, - OC_EC_GPP_SOC_PLTRST, //OC_CONNECT1_PLT_RST_STATUS,//OC_GPP_SOC_PLTRST,OC_CONNECT1_PLT_RST_STATUS + OC_EC_GPP_SOC_PLTRST, // OC_CONNECT1_PLT_RST_STATUS,//OC_GPP_SOC_PLTRST,OC_CONNECT1_PLT_RST_STATUS OC_EC_GPP_PMIC_CTRL, OC_EC_GBC_INA_ALERT, - //PJ + // PJ OC_EC_PWR_PD_NT2P = 64, OC_EC_GBC_AP_INA_ALERT, - //PK + // PK OC_EC_UART4_RXD = 72, OC_EC_UART4_CTS, OC_EC_UART4_RTS, @@ -150,7 +150,7 @@ typedef enum OC_CONNECT1_GPIOName { OC_EC_TRXFECONN_I2C3_SDA, OC_EC_TRXFECONN_I2C4_SCLK, OC_EC_TRXFECONN_I2C4_SDA, - //PL + // PL OC_EC_TRXFECONN_I2C2_SCLK = 80, OC_EC_TRXFECONN_I2C2_SDA, OC_EC_GBC_PSE_ALERT, @@ -159,7 +159,7 @@ typedef enum OC_CONNECT1_GPIOName { OC_EC_PWR_PRSNT_POE, OC_EC_USB_DP3, OC_EC_USB_DN3, - //PM + // PM OC_EC_PWR_LION_ALERT = 88, OC_EC_HCI_LED_RESET, OC_EC_PWR_MPPT_LION, @@ -168,22 +168,22 @@ typedef enum OC_CONNECT1_GPIOName { OC_EC_ETH_SW_RESET, OC_EC_GBC_IOEXP70_INT, OC_EC_PWR_BATT_SELECT, - //PN + // PN OC_EC_PD_PWRGD_ALERT = 96, OC_EC_SDR_FPGA_TEMP_INA_ALERT, OC_EC_SDR_DEVICE_CONTROL, OC_EC_SDR_PWR_GD, OC_EC_FE_PWR_GD, OC_EC_MODULE_UART1_RIN, - //PP + // PP OC_EC_SDR_FE_IO_RESET_CTRL = - 104, //OC_EC_MPPT_LACID = 104, //OC_SDR_FE_IO_RESET_CTRL + 104, // OC_EC_MPPT_LACID = 104, //OC_SDR_FE_IO_RESET_CTRL OC_EC_FE_RESET_OUT, OC_EC_SDR_PWR_CNTRL, OC_EC_GPP_PWRGD_PROTECTION, OC_EC_RFFE_RESET, OC_EC_GBC_DEBUG, - //PQ + // PQ OC_EC_FE_TRXFE_CONN_RESET = 112, OC_EC_GPP_MSATA_DAS, OC_EC_POE_OVERRIDE, diff --git a/firmware/ec/common/inc/global/ocmp_frame.h b/firmware/ec/common/inc/global/ocmp_frame.h index 3a5999f7f1..a7c5e1f782 100644 --- a/firmware/ec/common/inc/global/ocmp_frame.h +++ b/firmware/ec/common/inc/global/ocmp_frame.h @@ -29,7 +29,7 @@ *****************************************************************************/ typedef enum { - OC_SS_BB = -1, //Hack around the fact that IPC reuses OCMP to allow us + OC_SS_BB = -1, // Hack around the fact that IPC reuses OCMP to allow us // to split BB (internal) and SYS (CLI) message handling OC_SS_SYS = 0, OC_SS_PWR, @@ -43,10 +43,10 @@ typedef enum { OC_SS_SYNC, OC_SS_TEST_MODULE, OC_SS_DEBUG, - OC_SS_MAX_LIMIT, //TODO:REV C Change + OC_SS_MAX_LIMIT, // TODO:REV C Change OC_SS_WD - //OC_SS_ALERT_MNGR, - //OC_SS_MAX_LIMIT + // OC_SS_ALERT_MNGR, + // OC_SS_MAX_LIMIT } OCMPSubsystem; typedef enum { @@ -60,11 +60,15 @@ typedef enum { * OCMPMsgType - msg type specifies what is the communication all about. * It can be Configuration, Status, Alert, Command, Watchdog, Debug * OCMPMsgType 1 byte message. - * ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| - * || 7 || 6 || 5 || 4 || 3 || 2 || 1 || 0 || - * ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| - || Message Type || - * ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| + * + ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| + * || 7 || 6 || 5 || 4 || 3 || + 2 || 1 || 0 || + * + ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| + || Message Type || + * + ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| */ typedef enum { OCMP_MSG_TYPE_CONFIG = 1, @@ -127,14 +131,14 @@ typedef enum { OCMP_DEBUG_READ = 1, OCMP_DEBUG_WRITE } eOCMPDebugOperation; /* TODO::This OCWARE_HOST has to be removed with OCMP cleanUp*/ #ifndef OCWARE_HOST -#define OC_SS OCMPSubsystem -#define OC_MSG_TYP OCMPMsgType -#define OC_AXN_TYP OCMPActionType +# define OC_SS OCMPSubsystem +# define OC_MSG_TYP OCMPMsgType +# define OC_AXN_TYP OCMPActionType #else -#define OC_SS uint8_t -#define OC_MSG_TYP uint8_t -#define OC_AXN_TYP uint8_t -#define OC_IFACE_TYP uint8_t +# define OC_SS uint8_t +# define OC_MSG_TYP uint8_t +# define OC_AXN_TYP uint8_t +# define OC_IFACE_TYP uint8_t #endif /* * Header is the field which will be containing SOF, Framelen, @@ -155,7 +159,7 @@ typedef struct __attribute__((packed, aligned(1))) { OC_SS subsystem; // RF/GPP/BMS/Watchdog etc.. uint8_t componentID; // Compononent ID. Different for different subsystem. OCMPMsgType - msgtype; // Msg type is Config/Status/Alert/Command/Watchdog/Debug + msgtype; // Msg type is Config/Status/Alert/Command/Watchdog/Debug uint8_t action; // Action is - Get/Set/Reply. uint16_t parameters; // List of Parameters to be set or get. #ifndef OCWARE_HOST diff --git a/firmware/ec/common/inc/ocmp_wrappers/ocmp_adt7481.h b/firmware/ec/common/inc/ocmp_wrappers/ocmp_adt7481.h index e249ff6f43..387ae7220e 100644 --- a/firmware/ec/common/inc/ocmp_wrappers/ocmp_adt7481.h +++ b/firmware/ec/common/inc/ocmp_wrappers/ocmp_adt7481.h @@ -1,11 +1,11 @@ /** -* Copyright (c) 2017-present, Facebook, Inc. -* All rights reserved. -* -* This source code is licensed under the BSD-style license found in the -* LICENSE file in the root directory of this source tree. An additional grant -* of patent rights can be found in the PATENTS file in the same directory. -*/ + * Copyright (c) 2017-present, Facebook, Inc. + * All rights reserved. + * + * This source code is licensed under the BSD-style license found in the + * LICENSE file in the root directory of this source tree. An additional grant + * of patent rights can be found in the PATENTS file in the same directory. + */ #ifndef _OCMP_ADT7481_H #define _OCMP_ADT7481_H @@ -29,7 +29,7 @@ SCHEMA_IMPORT const Driver_fxnTable ADT7481_fxnTable; static const Driver ADT7481 = { .name = "ADT7481", .status = - (Parameter[]){ { .name = "temperature", .type = TYPE_UINT8 }, {} }, + (Parameter[]){ { .name = "temperature", .type = TYPE_UINT8 }, {} }, .config = (Parameter[]){ { .name = "lowlimit", .type = TYPE_INT8 }, { .name = "highlimit", .type = TYPE_UINT8 }, { .name = "critlimit", .type = TYPE_UINT8 }, diff --git a/firmware/ec/common/inc/ocmp_wrappers/ocmp_dat-xxr5a-pp.h b/firmware/ec/common/inc/ocmp_wrappers/ocmp_dat-xxr5a-pp.h index 934ea50854..8dc7abf137 100644 --- a/firmware/ec/common/inc/ocmp_wrappers/ocmp_dat-xxr5a-pp.h +++ b/firmware/ec/common/inc/ocmp_wrappers/ocmp_dat-xxr5a-pp.h @@ -1,11 +1,11 @@ /** -* Copyright (c) 2017-present, Facebook, Inc. -* All rights reserved. -* -* This source code is licensed under the BSD-style license found in the -* LICENSE file in the root directory of this source tree. An additional grant -* of patent rights can be found in the PATENTS file in the same directory. -*/ + * Copyright (c) 2017-present, Facebook, Inc. + * All rights reserved. + * + * This source code is licensed under the BSD-style license found in the + * LICENSE file in the root directory of this source tree. An additional grant + * of patent rights can be found in the PATENTS file in the same directory. + */ #ifndef _OCMP_DATXXR5APP_H #define _OCMP_DATXXR5APP_H diff --git a/firmware/ec/common/inc/ocmp_wrappers/ocmp_debugi2c.h b/firmware/ec/common/inc/ocmp_wrappers/ocmp_debugi2c.h index b6bb181b63..826503a7c1 100644 --- a/firmware/ec/common/inc/ocmp_wrappers/ocmp_debugi2c.h +++ b/firmware/ec/common/inc/ocmp_wrappers/ocmp_debugi2c.h @@ -22,12 +22,12 @@ static const Driver OC_I2C = { { .name = "reg_values", .type = TYPE_UINT16 }, {} }, .commands = (Command[]){ { - .name = "get", - .cb_cmd = i2c_read, + .name = "get", + .cb_cmd = i2c_read, }, { - .name = "set", - .cb_cmd = i2c_write, + .name = "set", + .cb_cmd = i2c_write, }, {} }, }; diff --git a/firmware/ec/common/inc/ocmp_wrappers/ocmp_debugmdio.h b/firmware/ec/common/inc/ocmp_wrappers/ocmp_debugmdio.h index 17adb9f13a..d816607e23 100644 --- a/firmware/ec/common/inc/ocmp_wrappers/ocmp_debugmdio.h +++ b/firmware/ec/common/inc/ocmp_wrappers/ocmp_debugmdio.h @@ -20,12 +20,12 @@ static const Driver OC_MDIO = { { .name = "reg_values", .type = TYPE_UINT16 }, {} }, .commands = (Command[]){ { - .name = "get", - .cb_cmd = mdio_read, + .name = "get", + .cb_cmd = mdio_read, }, { - .name = "set", - .cb_cmd = mdio_write, + .name = "set", + .cb_cmd = mdio_write, }, {} }, }; diff --git a/firmware/ec/common/inc/ocmp_wrappers/ocmp_debugocgpio.h b/firmware/ec/common/inc/ocmp_wrappers/ocmp_debugocgpio.h index 56b17e79d4..cba38d9da0 100644 --- a/firmware/ec/common/inc/ocmp_wrappers/ocmp_debugocgpio.h +++ b/firmware/ec/common/inc/ocmp_wrappers/ocmp_debugocgpio.h @@ -22,12 +22,12 @@ static const Driver OC_GPIO = { { .name = "value", .type = TYPE_UINT8 }, {} }, .commands = (Command[]){ { - .name = "get", - .cb_cmd = ocgpio_get, + .name = "get", + .cb_cmd = ocgpio_get, }, { - .name = "set", - .cb_cmd = ocgpio_set, + .name = "set", + .cb_cmd = ocgpio_set, }, {} }, .fxnTable = &DEBUG_OCGPIO_fxnTable, diff --git a/firmware/ec/common/inc/ocmp_wrappers/ocmp_eeprom_cat24c04.h b/firmware/ec/common/inc/ocmp_wrappers/ocmp_eeprom_cat24c04.h index 25acdae380..9febbfd7ee 100644 --- a/firmware/ec/common/inc/ocmp_wrappers/ocmp_eeprom_cat24c04.h +++ b/firmware/ec/common/inc/ocmp_wrappers/ocmp_eeprom_cat24c04.h @@ -21,10 +21,10 @@ SCHEMA_IMPORT const Driver_fxnTable CAT24C04_fe_inv_fxnTable; static const Driver CAT24C04_gbc_sid = { .name = "EEPROM", .status = - (Parameter[]){ - { .name = "ocserialinfo", .type = TYPE_STR, .size = 21 }, - { .name = "gbcboardinfo", .type = TYPE_STR, .size = 21 }, - }, + (Parameter[]){ + { .name = "ocserialinfo", .type = TYPE_STR, .size = 21 }, + { .name = "gbcboardinfo", .type = TYPE_STR, .size = 21 }, + }, .fxnTable = &CAT24C04_gbc_sid_fxnTable, }; @@ -34,32 +34,31 @@ static const Driver CAT24C04_gbc_inv = { }; static const Driver CAT24C04_sdr_inv = { .name = "Inventory", - .status = (Parameter[]){ { .name = "dev_id", .type = TYPE_STR, .size = 19 }, - {} }, + .status = + (Parameter[]){ { .name = "dev_id", .type = TYPE_STR, .size = 19 }, {} }, .fxnTable = &CAT24C04_sdr_inv_fxnTable, }; static const Driver CAT24C04_fe_inv = { .name = "Inventory", - .status = (Parameter[]){ { .name = "dev_id", .type = TYPE_STR, .size = 18 }, - {} }, + .status = + (Parameter[]){ { .name = "dev_id", .type = TYPE_STR, .size = 18 }, {} }, .fxnTable = &CAT24C04_fe_inv_fxnTable, }; -static const Driver SYSTEMDRV = { - .name = "SYSTEMDRV", - .status = (Parameter[]){ {} }, - .config = (Parameter[]){ {} }, - .alerts = (Parameter[]){ {} }, - .post = (Post[]){ { - .name = "results", - .cb_postCmd = SYS_post_get_results, - }, - { - .name = "enable", - .cb_postCmd = SYS_post_enable, - }, - {} } -}; +static const Driver SYSTEMDRV = { .name = "SYSTEMDRV", + .status = (Parameter[]){ {} }, + .config = (Parameter[]){ {} }, + .alerts = (Parameter[]){ {} }, + .post = (Post[]){ + { + .name = "results", + .cb_postCmd = SYS_post_get_results, + }, + { + .name = "enable", + .cb_postCmd = SYS_post_enable, + }, + {} } }; #endif /* INC_DEVICES_OCMP_EEPROM_H_ */ diff --git a/firmware/ec/common/inc/ocmp_wrappers/ocmp_eth_sw.h b/firmware/ec/common/inc/ocmp_wrappers/ocmp_eth_sw.h index 33b4e045a1..5f7aa669f0 100644 --- a/firmware/ec/common/inc/ocmp_wrappers/ocmp_eth_sw.h +++ b/firmware/ec/common/inc/ocmp_wrappers/ocmp_eth_sw.h @@ -1,11 +1,11 @@ /** -* Copyright (c) 2017-present, Facebook, Inc. -* All rights reserved. -* -* This source code is licensed under the BSD-style license found in the -* LICENSE file in the root directory of this source tree. An additional grant -* of patent rights can be found in the PATENTS file in the same directory. -*/ + * Copyright (c) 2017-present, Facebook, Inc. + * All rights reserved. + * + * This source code is licensed under the BSD-style license found in the + * LICENSE file in the root directory of this source tree. An additional grant + * of patent rights can be found in the PATENTS file in the same directory. + */ #ifndef OCMP_ETH_SW_H_ #define OCMP_ETH_SW_H_ #include "common/inc/global/Framework.h" @@ -44,28 +44,28 @@ static const Driver ETH_SW = { { .name = "jabber_det", .type = TYPE_UINT8 }, {} }, .commands = (Command[]){ { - .name = "reset", - .cb_cmd = ETHERNET_reset, + .name = "reset", + .cb_cmd = ETHERNET_reset, }, { - .name = "en_loopBk", - .cb_cmd = ETHERNET_enLoopBk, + .name = "en_loopBk", + .cb_cmd = ETHERNET_enLoopBk, }, { - .name = "dis_loopBk", - .cb_cmd = ETHERNET_disLoopBk, + .name = "dis_loopBk", + .cb_cmd = ETHERNET_disLoopBk, }, { - .name = "en_pktGen", - .cb_cmd = ETHERNET_enPktGen, + .name = "en_pktGen", + .cb_cmd = ETHERNET_enPktGen, }, { - .name = "dis_pktGen", - .cb_cmd = ETHERNET_disPktGen, + .name = "dis_pktGen", + .cb_cmd = ETHERNET_disPktGen, }, { - .name = "en_tivaClient", - .cb_cmd = ETHERNET_tivaClient, + .name = "en_tivaClient", + .cb_cmd = ETHERNET_tivaClient, }, {} }, .fxnTable = ð_fxnTable, diff --git a/firmware/ec/common/inc/ocmp_wrappers/ocmp_ina226.h b/firmware/ec/common/inc/ocmp_wrappers/ocmp_ina226.h index 96f102d984..ad09e4ce7a 100644 --- a/firmware/ec/common/inc/ocmp_wrappers/ocmp_ina226.h +++ b/firmware/ec/common/inc/ocmp_wrappers/ocmp_ina226.h @@ -1,11 +1,11 @@ /** -* Copyright (c) 2017-present, Facebook, Inc. -* All rights reserved. -* -* This source code is licensed under the BSD-style license found in the -* LICENSE file in the root directory of this source tree. An additional grant -* of patent rights can be found in the PATENTS file in the same directory. -*/ + * Copyright (c) 2017-present, Facebook, Inc. + * All rights reserved. + * + * This source code is licensed under the BSD-style license found in the + * LICENSE file in the root directory of this source tree. An additional grant + * of patent rights can be found in the PATENTS file in the same directory. + */ #ifndef _OCMP_INA226_H #define _OCMP_INA226_H @@ -26,7 +26,7 @@ static const Driver INA226 = { {} }, .config = (Parameter[]){ { .name = "currlimit", .type = TYPE_UINT16 }, {} }, .alerts = - (Parameter[]){ { .name = "Overcurrent", .type = TYPE_UINT16 }, {} }, + (Parameter[]){ { .name = "Overcurrent", .type = TYPE_UINT16 }, {} }, .fxnTable = &INA226_fxnTable, }; diff --git a/firmware/ec/common/inc/ocmp_wrappers/ocmp_iridium.h b/firmware/ec/common/inc/ocmp_wrappers/ocmp_iridium.h index 3342c14cb9..4db270c3ef 100644 --- a/firmware/ec/common/inc/ocmp_wrappers/ocmp_iridium.h +++ b/firmware/ec/common/inc/ocmp_wrappers/ocmp_iridium.h @@ -1,11 +1,11 @@ /** -* Copyright (c) 2017-present, Facebook, Inc. -* All rights reserved. -* -* This source code is licensed under the BSD-style license found in the -* LICENSE file in the root directory of this source tree. An additional grant -* of patent rights can be found in the PATENTS file in the same directory. -*/ + * Copyright (c) 2017-present, Facebook, Inc. + * All rights reserved. + * + * This source code is licensed under the BSD-style license found in the + * LICENSE file in the root directory of this source tree. An additional grant + * of patent rights can be found in the PATENTS file in the same directory. + */ #ifndef OCMP_IRIDIUM_H_ #define OCMP_IRIDIUM_H_ @@ -17,29 +17,28 @@ SCHEMA_IMPORT bool IRIDIUM_reset(void *driver, void *params); static const Driver OBC_Iridium = { .name = "Iridium 96xx", .status = - (Parameter[]){ - { .name = "imei", .type = TYPE_UINT64 }, - { .name = "mfg", .type = TYPE_STR, .size = 10 }, - { .name = "model", .type = TYPE_STR, .size = 4 }, - { .name = "signal_quality", .type = TYPE_UINT8 }, - { - .name = "registration", - .type = TYPE_ENUM, - .values = - (Enum_Map[]){ { 0, "Detached" }, - { 1, "None" }, - { 2, "Registered" }, - { 3, "Registration Denied" }, - {} }, - }, - { .name = "numberofoutgoingmessage", .type = TYPE_UINT8 }, - { .name = "lasterror", - .type = TYPE_UINT8, - .size = 3 }, /* TODO: this is a complex type */ - {} }, + (Parameter[]){ + { .name = "imei", .type = TYPE_UINT64 }, + { .name = "mfg", .type = TYPE_STR, .size = 10 }, + { .name = "model", .type = TYPE_STR, .size = 4 }, + { .name = "signal_quality", .type = TYPE_UINT8 }, + { + .name = "registration", + .type = TYPE_ENUM, + .values = (Enum_Map[]){ { 0, "Detached" }, + { 1, "None" }, + { 2, "Registered" }, + { 3, "Registration Denied" }, + {} }, + }, + { .name = "numberofoutgoingmessage", .type = TYPE_UINT8 }, + { .name = "lasterror", + .type = TYPE_UINT8, + .size = 3 }, /* TODO: this is a complex type */ + {} }, .commands = (Command[]){ { - .name = "reset", - .cb_cmd = IRIDIUM_reset, + .name = "reset", + .cb_cmd = IRIDIUM_reset, }, {} }, .fxnTable = &OBC_fxnTable, diff --git a/firmware/ec/common/inc/ocmp_wrappers/ocmp_led.h b/firmware/ec/common/inc/ocmp_wrappers/ocmp_led.h index 26b699b150..dfc54e41a8 100644 --- a/firmware/ec/common/inc/ocmp_wrappers/ocmp_led.h +++ b/firmware/ec/common/inc/ocmp_wrappers/ocmp_led.h @@ -1,11 +1,11 @@ /** -* Copyright (c) 2017-present, Facebook, Inc. -* All rights reserved. -* -* This source code is licensed under the BSD-style license found in the -* LICENSE file in the root directory of this source tree. An additional grant -* of patent rights can be found in the PATENTS file in the same directory. -*/ + * Copyright (c) 2017-present, Facebook, Inc. + * All rights reserved. + * + * This source code is licensed under the BSD-style license found in the + * LICENSE file in the root directory of this source tree. An additional grant + * of patent rights can be found in the PATENTS file in the same directory. + */ #ifndef _OCMP_LED_H #define _OCMP_LED_H @@ -19,8 +19,8 @@ static const Driver HCI_LED = { .config = NULL, .alerts = NULL, .commands = (Command[]){ { - .name = "set", - .cb_cmd = led_testpattern_control, + .name = "set", + .cb_cmd = led_testpattern_control, }, {} }, .fxnTable = &LED_fxnTable, diff --git a/firmware/ec/common/inc/ocmp_wrappers/ocmp_ltc4015.h b/firmware/ec/common/inc/ocmp_wrappers/ocmp_ltc4015.h index 4ca522bf25..c5709b53fc 100644 --- a/firmware/ec/common/inc/ocmp_wrappers/ocmp_ltc4015.h +++ b/firmware/ec/common/inc/ocmp_wrappers/ocmp_ltc4015.h @@ -1,11 +1,11 @@ /** -* Copyright (c) 2017-present, Facebook, Inc. -* All rights reserved. -* -* This source code is licensed under the BSD-style license found in the -* LICENSE file in the root directory of this source tree. An additional grant -* of patent rights can be found in the PATENTS file in the same directory. -*/ + * Copyright (c) 2017-present, Facebook, Inc. + * All rights reserved. + * + * This source code is licensed under the BSD-style license found in the + * LICENSE file in the root directory of this source tree. An additional grant + * of patent rights can be found in the PATENTS file in the same directory. + */ #ifndef _OCMP_LTC4015_H #define _OCMP_LTC4015_H @@ -35,16 +35,16 @@ static const Driver LTC4015 = { { .name = "ichargeDAC", .type = TYPE_INT16 }, {} }, .config = - (Parameter[]){ { .name = "batteryVoltageLow", .type = TYPE_INT16 }, - { .name = "batteryVoltageHigh", .type = TYPE_INT16 }, - { .name = "batteryCurrentLow", .type = TYPE_INT16 }, - { .name = "inputVoltageLow", .type = TYPE_INT16 }, - { .name = "inputCurrentHigh", .type = TYPE_INT16 }, - { .name = "inputCurrentLimit", .type = TYPE_UINT16 }, - { .name = "icharge", .type = TYPE_UINT16 }, - { .name = "vcharge", .type = TYPE_UINT16 }, - { .name = "dieTemperature", .type = TYPE_INT16 }, - {} }, + (Parameter[]){ { .name = "batteryVoltageLow", .type = TYPE_INT16 }, + { .name = "batteryVoltageHigh", .type = TYPE_INT16 }, + { .name = "batteryCurrentLow", .type = TYPE_INT16 }, + { .name = "inputVoltageLow", .type = TYPE_INT16 }, + { .name = "inputCurrentHigh", .type = TYPE_INT16 }, + { .name = "inputCurrentLimit", .type = TYPE_UINT16 }, + { .name = "icharge", .type = TYPE_UINT16 }, + { .name = "vcharge", .type = TYPE_UINT16 }, + { .name = "dieTemperature", .type = TYPE_INT16 }, + {} }, .alerts = (Parameter[]){ { .name = "BVL", .type = TYPE_INT16 }, { .name = "BVH", .type = TYPE_INT16 }, { .name = "BCL", .type = TYPE_INT16 }, diff --git a/firmware/ec/common/inc/ocmp_wrappers/ocmp_ltc4274.h b/firmware/ec/common/inc/ocmp_wrappers/ocmp_ltc4274.h index b7968c705b..09c1590942 100644 --- a/firmware/ec/common/inc/ocmp_wrappers/ocmp_ltc4274.h +++ b/firmware/ec/common/inc/ocmp_wrappers/ocmp_ltc4274.h @@ -1,11 +1,11 @@ /** -* Copyright (c) 2017-present, Facebook, Inc. -* All rights reserved. -* -* This source code is licensed under the BSD-style license found in the -* LICENSE file in the root directory of this source tree. An additional grant -* of patent rights can be found in the PATENTS file in the same directory. -*/ + * Copyright (c) 2017-present, Facebook, Inc. + * All rights reserved. + * + * This source code is licensed under the BSD-style license found in the + * LICENSE file in the root directory of this source tree. An additional grant + * of patent rights can be found in the PATENTS file in the same directory. + */ #ifndef _OCMP_LTC4274_H_ #define _OCMP_LTC4274_H_ @@ -51,8 +51,8 @@ static const Driver LTC4274 = { { .name = "SupplyAlert", .type = TYPE_UINT8 }, {} }, .commands = (Command[]){ { - .name = "reset", - .cb_cmd = LTC4274_reset, + .name = "reset", + .cb_cmd = LTC4274_reset, }, {} }, .fxnTable = <C4274_fxnTable, diff --git a/firmware/ec/common/inc/ocmp_wrappers/ocmp_ltc4275.h b/firmware/ec/common/inc/ocmp_wrappers/ocmp_ltc4275.h index eb4cf65d40..2688d7d3f7 100644 --- a/firmware/ec/common/inc/ocmp_wrappers/ocmp_ltc4275.h +++ b/firmware/ec/common/inc/ocmp_wrappers/ocmp_ltc4275.h @@ -1,11 +1,11 @@ /** -* Copyright (c) 2017-present, Facebook, Inc. -* All rights reserved. -* -* This source code is licensed under the BSD-style license found in the -* LICENSE file in the root directory of this source tree. An additional grant -* of patent rights can be found in the PATENTS file in the same directory. -*/ + * Copyright (c) 2017-present, Facebook, Inc. + * All rights reserved. + * + * This source code is licensed under the BSD-style license found in the + * LICENSE file in the root directory of this source tree. An additional grant + * of patent rights can be found in the PATENTS file in the same directory. + */ #ifndef COMMON_INC_OCMP_WRAPPERS_OCMP_LTC4275_H_ #define COMMON_INC_OCMP_WRAPPERS_OCMP_LTC4275_H_ diff --git a/firmware/ec/common/inc/ocmp_wrappers/ocmp_powersource.h b/firmware/ec/common/inc/ocmp_wrappers/ocmp_powersource.h index 3b9c834974..b998e2c8d1 100644 --- a/firmware/ec/common/inc/ocmp_wrappers/ocmp_powersource.h +++ b/firmware/ec/common/inc/ocmp_wrappers/ocmp_powersource.h @@ -1,11 +1,11 @@ /** -* Copyright (c) 2017-present, Facebook, Inc. -* All rights reserved. -* -* This source code is licensed under the BSD-style license found in the -* LICENSE file in the root directory of this source tree. An additional grant -* of patent rights can be found in the PATENTS file in the same directory. -*/ + * Copyright (c) 2017-present, Facebook, Inc. + * All rights reserved. + * + * This source code is licensed under the BSD-style license found in the + * LICENSE file in the root directory of this source tree. An additional grant + * of patent rights can be found in the PATENTS file in the same directory. + */ #ifndef _OCMP_POWERSOURCE_H_ #define _OCMP_POWERSOURCE_H_ @@ -16,16 +16,15 @@ SCHEMA_IMPORT const Driver_fxnTable PWRSRC_fxnTable; static const Driver PWRSRC = { .name = "powerSource", .status = - (Parameter[]){ - { .name = "poeAvailability", .type = TYPE_UINT8 }, - { .name = "poeAccessebility", .type = TYPE_UINT8 }, - { .name = "solarAvailability", .type = TYPE_UINT8 }, - { .name = "solarAccessebility", .type = TYPE_UINT8 }, - { .name = "extBattAvailability", .type = TYPE_UINT8 }, - { .name = "extBattAccessebility", .type = TYPE_UINT8 }, - { .name = "intBattAvailability", .type = TYPE_UINT8 }, - { .name = "intBattAccessebility", .type = TYPE_UINT8 }, - {} }, + (Parameter[]){ { .name = "poeAvailability", .type = TYPE_UINT8 }, + { .name = "poeAccessebility", .type = TYPE_UINT8 }, + { .name = "solarAvailability", .type = TYPE_UINT8 }, + { .name = "solarAccessebility", .type = TYPE_UINT8 }, + { .name = "extBattAvailability", .type = TYPE_UINT8 }, + { .name = "extBattAccessebility", .type = TYPE_UINT8 }, + { .name = "intBattAvailability", .type = TYPE_UINT8 }, + { .name = "intBattAccessebility", .type = TYPE_UINT8 }, + {} }, .fxnTable = &PWRSRC_fxnTable, }; #endif /* _OCMP_POWERSOURCE_H_ */ diff --git a/firmware/ec/common/inc/ocmp_wrappers/ocmp_rfpowermonitor.h b/firmware/ec/common/inc/ocmp_wrappers/ocmp_rfpowermonitor.h index 6d47466688..bc333cec59 100644 --- a/firmware/ec/common/inc/ocmp_wrappers/ocmp_rfpowermonitor.h +++ b/firmware/ec/common/inc/ocmp_wrappers/ocmp_rfpowermonitor.h @@ -1,11 +1,11 @@ /** -* Copyright (c) 2017-present, Facebook, Inc. -* All rights reserved. -* -* This source code is licensed under the BSD-style license found in the -* LICENSE file in the root directory of this source tree. An additional grant -* of patent rights can be found in the PATENTS file in the same directory. -*/ + * Copyright (c) 2017-present, Facebook, Inc. + * All rights reserved. + * + * This source code is licensed under the BSD-style license found in the + * LICENSE file in the root directory of this source tree. An additional grant + * of patent rights can be found in the PATENTS file in the same directory. + */ #ifndef OCMP_RFPOWERMONITOR_H_ #define OCMP_RFPOWERMONITOR_H_ diff --git a/firmware/ec/common/inc/ocmp_wrappers/ocmp_rfwatchdog.h b/firmware/ec/common/inc/ocmp_wrappers/ocmp_rfwatchdog.h index 7f5d69d15e..f07bf5c22e 100644 --- a/firmware/ec/common/inc/ocmp_wrappers/ocmp_rfwatchdog.h +++ b/firmware/ec/common/inc/ocmp_wrappers/ocmp_rfwatchdog.h @@ -16,7 +16,7 @@ SCHEMA_IMPORT const Driver_fxnTable RFFEWatchdogP_fxnTable; static const Driver RFFEWatchdog = { .name = "RFFE Watchdog", .alerts = - (Parameter[]){ { .name = "LB_R_PWR" }, { .name = "HB_R_PWR" }, {} }, + (Parameter[]){ { .name = "LB_R_PWR" }, { .name = "HB_R_PWR" }, {} }, .fxnTable = &RFFEWatchdogP_fxnTable, }; diff --git a/firmware/ec/common/inc/ocmp_wrappers/ocmp_se98a.h b/firmware/ec/common/inc/ocmp_wrappers/ocmp_se98a.h index 9a2b6a9840..0e84164c3c 100644 --- a/firmware/ec/common/inc/ocmp_wrappers/ocmp_se98a.h +++ b/firmware/ec/common/inc/ocmp_wrappers/ocmp_se98a.h @@ -1,11 +1,11 @@ /** -* Copyright (c) 2017-present, Facebook, Inc. -* All rights reserved. -* -* This source code is licensed under the BSD-style license found in the -* LICENSE file in the root directory of this source tree. An additional grant -* of patent rights can be found in the PATENTS file in the same directory. -*/ + * Copyright (c) 2017-present, Facebook, Inc. + * All rights reserved. + * + * This source code is licensed under the BSD-style license found in the + * LICENSE file in the root directory of this source tree. An additional grant + * of patent rights can be found in the PATENTS file in the same directory. + */ #ifndef _OCMP_SE98A_H #define _OCMP_SE98A_H @@ -25,7 +25,7 @@ SCHEMA_IMPORT const Driver_fxnTable SE98_fxnTable; static const Driver SE98A = { .name = "SE98A", .status = - (Parameter[]){ { .name = "temperature", .type = TYPE_UINT8 }, {} }, + (Parameter[]){ { .name = "temperature", .type = TYPE_UINT8 }, {} }, .config = (Parameter[]){ { .name = "lowlimit", .type = TYPE_INT8 }, { .name = "highlimit", .type = TYPE_UINT8 }, { .name = "critlimit", .type = TYPE_UINT8 }, diff --git a/firmware/ec/common/inc/ocmp_wrappers/ocmp_syncio.h b/firmware/ec/common/inc/ocmp_wrappers/ocmp_syncio.h index f50a49c191..13200daacd 100644 --- a/firmware/ec/common/inc/ocmp_wrappers/ocmp_syncio.h +++ b/firmware/ec/common/inc/ocmp_wrappers/ocmp_syncio.h @@ -15,15 +15,14 @@ SCHEMA_IMPORT const Driver_fxnTable SYNC_fxnTable; static const Driver Sync_IO = { .name = "sync_ioexp", .status = - (Parameter[]){ - { - .name = "gps_lock", - .type = TYPE_ENUM, - .values = (Enum_Map[]){ { 0, "Gps Not Locked" }, - { 1, "Gps Locked" }, - {} }, - }, - {} }, + (Parameter[]){ { + .name = "gps_lock", + .type = TYPE_ENUM, + .values = (Enum_Map[]){ { 0, "Gps Not Locked" }, + { 1, "Gps Locked" }, + {} }, + }, + {} }, .fxnTable = &SYNC_fxnTable, }; diff --git a/firmware/ec/common/inc/ocmp_wrappers/ocmp_testmodule.h b/firmware/ec/common/inc/ocmp_wrappers/ocmp_testmodule.h index 1233b46443..a40d169cd3 100644 --- a/firmware/ec/common/inc/ocmp_wrappers/ocmp_testmodule.h +++ b/firmware/ec/common/inc/ocmp_wrappers/ocmp_testmodule.h @@ -1,11 +1,11 @@ /** -* Copyright (c) 2017-present, Facebook, Inc. -* All rights reserved. -* -* This source code is licensed under the BSD-style license found in the -* LICENSE file in the root directory of this source tree. An additional grant -* of patent rights can be found in the PATENTS file in the same directory. -*/ + * Copyright (c) 2017-present, Facebook, Inc. + * All rights reserved. + * + * This source code is licensed under the BSD-style license found in the + * LICENSE file in the root directory of this source tree. An additional grant + * of patent rights can be found in the PATENTS file in the same directory. + */ #ifndef OCMP_TESTMODULE_H_ #define OCMP_TESTMODULE_H_ @@ -25,71 +25,67 @@ SCHEMA_IMPORT bool TestMod_cmdReset(void *driver, void *params); static const Driver Testmod_G510 = { .name = "Fibocom G510", .status = - (Parameter[]){ - { .name = "imei", .type = TYPE_UINT64 }, - { .name = "imsi", .type = TYPE_UINT64 }, - { .name = "mfg", .type = TYPE_STR, .size = 10 }, - { .name = "model", .type = TYPE_STR, .size = 5 }, - { .name = "rssi", .type = TYPE_UINT8 }, - { .name = "ber", .type = TYPE_UINT8 }, - { - .name = "registration", - .type = TYPE_ENUM, - .values = - (Enum_Map[]){ - { 0, - "Not Registered, Not Searching" }, - { 1, "Registered, Home Network" }, - { 2, "Not Registered, Searching" }, - { 3, "Registration Denied" }, - { 4, "Status Unknown" }, - { 5, "Registered, Roaming" }, - {} }, - }, - { .name = "network_operatorinfo", - .type = TYPE_UINT8, - .size = 3 }, /* TODO: this is a complex type */ - { .name = "cellid", .type = TYPE_UINT32 }, - { .name = "bsic", .type = TYPE_UINT8 }, - { .name = "lasterror", - .type = TYPE_UINT8, - .size = 3 }, /* TODO: this is a complex type */ - {} }, + (Parameter[]){ + { .name = "imei", .type = TYPE_UINT64 }, + { .name = "imsi", .type = TYPE_UINT64 }, + { .name = "mfg", .type = TYPE_STR, .size = 10 }, + { .name = "model", .type = TYPE_STR, .size = 5 }, + { .name = "rssi", .type = TYPE_UINT8 }, + { .name = "ber", .type = TYPE_UINT8 }, + { + .name = "registration", + .type = TYPE_ENUM, + .values = (Enum_Map[]){ { 0, "Not Registered, Not Searching" }, + { 1, "Registered, Home Network" }, + { 2, "Not Registered, Searching" }, + { 3, "Registration Denied" }, + { 4, "Status Unknown" }, + { 5, "Registered, Roaming" }, + {} }, + }, + { .name = "network_operatorinfo", + .type = TYPE_UINT8, + .size = 3 }, /* TODO: this is a complex type */ + { .name = "cellid", .type = TYPE_UINT32 }, + { .name = "bsic", .type = TYPE_UINT8 }, + { .name = "lasterror", + .type = TYPE_UINT8, + .size = 3 }, /* TODO: this is a complex type */ + {} }, .alerts = - (Parameter[]){ - { - .name = "Call State Changed", - .type = TYPE_ENUM, - .values = (Enum_Map[]){ { 0, "Ringing" }, - { 1, "Call End" }, - {} }, - }, - /* TODO: var len str */ - { .name = "Incoming SMS", .type = TYPE_STR, .size = 20 }, - {} }, + (Parameter[]){ + { + .name = "Call State Changed", + .type = TYPE_ENUM, + .values = + (Enum_Map[]){ { 0, "Ringing" }, { 1, "Call End" }, {} }, + }, + /* TODO: var len str */ + { .name = "Incoming SMS", .type = TYPE_STR, .size = 20 }, + {} }, .commands = - (Command[]){ { .name = "disconnect_nw", - .cb_cmd = TestMod_cmdDisconnect }, - { .name = "connect_nw", .cb_cmd = TestMod_cmdConnect }, - { .name = "send", .cb_cmd = TestMod_cmdSendSms }, - { .name = "dial", .cb_cmd = TestMod_cmdDial }, - { - .name = "answer", - .cb_cmd = TestMod_cmdAnswer, - }, - { - .name = "hangup", - .cb_cmd = TestMod_cmdHangup, - }, - { - .name = "enable", - .cb_cmd = TestMod_cmdEnable, - }, - { - .name = "disable", - .cb_cmd = TestMod_cmdDisable, - }, - {} }, + (Command[]){ + { .name = "disconnect_nw", .cb_cmd = TestMod_cmdDisconnect }, + { .name = "connect_nw", .cb_cmd = TestMod_cmdConnect }, + { .name = "send", .cb_cmd = TestMod_cmdSendSms }, + { .name = "dial", .cb_cmd = TestMod_cmdDial }, + { + .name = "answer", + .cb_cmd = TestMod_cmdAnswer, + }, + { + .name = "hangup", + .cb_cmd = TestMod_cmdHangup, + }, + { + .name = "enable", + .cb_cmd = TestMod_cmdEnable, + }, + { + .name = "disable", + .cb_cmd = TestMod_cmdDisable, + }, + {} }, .fxnTable = &G510_fxnTable, .payload_fmt_union = true, /* Testmodule breaks serialization pattern :( */ }; diff --git a/firmware/ec/inc/common/byteorder.h b/firmware/ec/inc/common/byteorder.h index d886572e94..3736f64151 100644 --- a/firmware/ec/inc/common/byteorder.h +++ b/firmware/ec/inc/common/byteorder.h @@ -12,44 +12,44 @@ /* Detect endianness if using TI compiler */ #ifndef __BYTE_ORDER__ -#define __ORDER_LITTLE_ENDIAN__ 1234 -#define __ORDER_BIG_ENDIAN__ 4321 -#ifdef __little_endian__ -#define __BYTE_ORDER__ __ORDER_LITTLE_ENDIAN__ -#else -#ifdef __big_endian__ -#define __BYTE_ORDER__ __ORDER_BIG_ENDIAN__ -#else -#error Unable to detect byte order! -#endif -#endif +# define __ORDER_LITTLE_ENDIAN__ 1234 +# define __ORDER_BIG_ENDIAN__ 4321 +# ifdef __little_endian__ +# define __BYTE_ORDER__ __ORDER_LITTLE_ENDIAN__ +# else +# ifdef __big_endian__ +# define __BYTE_ORDER__ __ORDER_BIG_ENDIAN__ +# else +# error Unable to detect byte order! +# endif +# endif #endif #if __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__ /* Little endian host functions here */ -#define htobe16(a) ((((a) >> 8) & 0xff) + (((a) << 8) & 0xff00)) -#define betoh16(a) htobe16(a) +# define htobe16(a) ((((a) >> 8) & 0xff) + (((a) << 8) & 0xff00)) +# define betoh16(a) htobe16(a) -#define htobe32(a) \ - ((((a)&0xff000000) >> 24) | (((a)&0x00ff0000) >> 8) | \ - (((a)&0x0000ff00) << 8) | (((a)&0x000000ff) << 24)) -#define betoh32(a) htobe32(a) +# define htobe32(a) \ + ((((a)&0xff000000) >> 24) | (((a)&0x00ff0000) >> 8) | \ + (((a)&0x0000ff00) << 8) | (((a)&0x000000ff) << 24)) +# define betoh32(a) htobe32(a) -#define htole16(a) a; // Host is a little endian. -#define letoh16(a) htole16(a) +# define htole16(a) a; // Host is a little endian. +# define letoh16(a) htole16(a) #else /* Big endian host functions here */ -#define htole16(a) ((((a) >> 8) & 0xff) + (((a) << 8) & 0xff00)) -#define letoh16(a) htobe16(a) +# define htole16(a) ((((a) >> 8) & 0xff) + (((a) << 8) & 0xff00)) +# define letoh16(a) htobe16(a) -#define htole32(a) \ - ((((a)&0xff000000) >> 24) | (((a)&0x00ff0000) >> 8) | \ - (((a)&0x0000ff00) << 8) | (((a)&0x000000ff) << 24)) -#define letoh32(a) htobe32(a) +# define htole32(a) \ + ((((a)&0xff000000) >> 24) | (((a)&0x00ff0000) >> 8) | \ + (((a)&0x0000ff00) << 8) | (((a)&0x000000ff) << 24)) +# define letoh32(a) htobe32(a) -#define htobe16(a) a; // Host is a little endian. -#define betoh16(a) htole16(a) +# define htobe16(a) a; // Host is a little endian. +# define betoh16(a) htole16(a) #endif diff --git a/firmware/ec/inc/common/global_header.h b/firmware/ec/inc/common/global_header.h index 42701d80f9..1d519ff5c2 100644 --- a/firmware/ec/inc/common/global_header.h +++ b/firmware/ec/inc/common/global_header.h @@ -21,59 +21,59 @@ #include /* For System_printf */ #if 1 -#define DEBUG(...) \ - { \ - System_printf(__VA_ARGS__); \ - System_flush(); \ - } +# define DEBUG(...) \ + { \ + System_printf(__VA_ARGS__); \ + System_flush(); \ + } -#define LOGGER(...) \ - { \ - System_printf(__VA_ARGS__); \ - System_flush(); \ - } -#define LOGGER_WARNING(...) \ - { \ - System_printf(__VA_ARGS__); \ - System_flush(); \ - } -#define LOGGER_ERROR(...) \ - { \ - System_printf(__VA_ARGS__); \ - System_flush(); \ - } -#ifdef DEBUG_LOGS -#define LOGGER_DEBUG(...) \ - { \ - System_printf(__VA_ARGS__); \ - System_flush(); \ - } +# define LOGGER(...) \ + { \ + System_printf(__VA_ARGS__); \ + System_flush(); \ + } +# define LOGGER_WARNING(...) \ + { \ + System_printf(__VA_ARGS__); \ + System_flush(); \ + } +# define LOGGER_ERROR(...) \ + { \ + System_printf(__VA_ARGS__); \ + System_flush(); \ + } +# ifdef DEBUG_LOGS +# define LOGGER_DEBUG(...) \ + { \ + System_printf(__VA_ARGS__); \ + System_flush(); \ + } -#define NOP_DELAY() \ - { \ - uint32_t delay = 7000000; \ - while (delay--) \ - ; \ - } +# define NOP_DELAY() \ + { \ + uint32_t delay = 7000000; \ + while (delay--) \ + ; \ + } +# else +# define LOGGER_DEBUG(...) +# define NOP_DELAY() +# endif #else -#define LOGGER_DEBUG(...) -#define NOP_DELAY() -#endif -#else -#define DEBUG(...) // +# define DEBUG(...) // -#define LOGGER(...) // -#define LOGGER_WARNING(...) // -#define LOGGER_ERROR(...) // -#ifdef DEBUG_LOGS -#define LOGGER_DEBUG(...) // -#endif -#define NOP_DELAY() \ - { \ - uint32_t delay = 7000000; \ - while (delay--) \ - ; \ - } +# define LOGGER(...) // +# define LOGGER_WARNING(...) // +# define LOGGER_ERROR(...) // +# ifdef DEBUG_LOGS +# define LOGGER_DEBUG(...) // +# endif +# define NOP_DELAY() \ + { \ + uint32_t delay = 7000000; \ + while (delay--) \ + ; \ + } #endif #define RET_OK 0 #define RET_NOT_OK 1 diff --git a/firmware/ec/inc/devices/88E6071_registers.h b/firmware/ec/inc/devices/88E6071_registers.h index e7cf51adca..6b8bbb902f 100644 --- a/firmware/ec/inc/devices/88E6071_registers.h +++ b/firmware/ec/inc/devices/88E6071_registers.h @@ -106,7 +106,7 @@ /* * PHY Register fields SMI Device address 0x0 to 0x4 */ -//REG_PHY_CONTROL - 0x0 +// REG_PHY_CONTROL - 0x0 #define SOFT_RESET (1 << 0xF) #define LOOPBACK_EN (1 << 0xE) #define SPEED (1 << 0xD) @@ -115,15 +115,15 @@ #define RESTART_AUTONEG (1 << 0xA) #define DUPLEX (1 << 0x8) -//REG_PHY_STATUS - 0x1 +// REG_PHY_STATUS - 0x1 #define AUTONEG_DONE (1 << 0x5) #define LINK_UP (1 << 0x2) -//REG_MMD_ACCESS_CNTRL - 0xD +// REG_MMD_ACCESS_CNTRL - 0xD #define DEVADDR (0x1F << 0x0) #define FUNCTION (0x03 << 0xD) -//REG_PHY_SPEC_CONTROL - 0x10 +// REG_PHY_SPEC_CONTROL - 0x10 #define ENERGY_DET (1 << 0xE) #define DIS_NLP_CHECK (1 << 0xD) #define EXT_DISTANCE (1 << 0x7) @@ -131,7 +131,7 @@ #define AUTOMDI_CROSSOVER (0x03 << 0x4) #define AUTOPOL_REVERSE (1 << 0x1) -//REG_PHY_SPEC_STATUS - 0x11 +// REG_PHY_SPEC_STATUS - 0x11 #define RES_SPEED (1 << 0xE) #define RES_DUPLEX (1 << 0xD) #define RT_LINK (1 << 0xA) @@ -140,7 +140,7 @@ #define POLARITY (1 << 0x1) #define JABBER_DET (1 << 0x0) -//REG_PHY_INTERRUPT_EN - 0x12 +// REG_PHY_INTERRUPT_EN - 0x12 #define SPEED_INT_EN (1 << 0xE) #define DUPLEX_INT_EN (1 << 0xD) #define PAGE_RX_INT_STATUS_EN (1 << 0xC) @@ -151,7 +151,7 @@ #define POLARITY_INT_EN (1 << 0x1) #define JABBER_INT_EN (1 << 0x0) -//REG_PHY_INTERRUPT_STATUS - 0x13 +// REG_PHY_INTERRUPT_STATUS - 0x13 #define SPEED_INT_STATUS (1 << 0xE) #define DUPLEX_INT_STATUS (1 << 0xD) #define PAGE_RX_INT_STATUS (1 << 0xC) @@ -192,7 +192,7 @@ /* * GLOBAL - 2 Register fields (SMI Device address 0x7) */ -//REG_INTERRUPT_SOURCE 0x0 +// REG_INTERRUPT_SOURCE 0x0 #define WATCHDOG_INT (1 << 15) #define JAM_INT (1 << 14) #define WAKE_EVENT_INT (1 << 12) @@ -202,7 +202,7 @@ #define PHY_1_INT (1 << 1) #define PHY_0_INT (1 << 0) -//REG_INTERRUPT_MASK 0x1 +// REG_INTERRUPT_MASK 0x1 #define WATCHDOG_INT_EN (1 << 15) #define JAM_INT_EN (1 << 14) #define WAKE_EVENT_INT_EN (1 << 12) @@ -212,7 +212,7 @@ #define PHY_1_INT_EN (1 << 1) #define PHY_0_INT_EN (1 << 0) -//REG_C45_PACKET_GEN 0x8030 +// REG_C45_PACKET_GEN 0x8030 #define CRC_ENABLE (1 << 6) #define FRAME_COUNT_EN (1 << 5) #define FORCE_BURST_STOP (1 << 4) diff --git a/firmware/ec/inc/devices/adt7481.h b/firmware/ec/inc/devices/adt7481.h index 83e69433b8..8d6f52fbb9 100644 --- a/firmware/ec/inc/devices/adt7481.h +++ b/firmware/ec/inc/devices/adt7481.h @@ -41,15 +41,14 @@ * Setting this bit to 1 configures Pin 8 as the THERM2 pin. * 4 - (Reserved) - Reserved for future use. * 3 - (Remote 1/2)- Setting this bit to 1 enables the user to read the Remote 2 - * values from the Remote 1 registers. When default = 0, Remote 1 temperature - * values and limits are read from these registers. - * 2 - (Temp Range) - Setting this bit to 1 enables the extended temperature - * measurement range of -64°C to +191°C. When using the default = 0, the - * temperature range is 0°C to +127°C. - * 1 - (Mask R1) - 1 - Setting this bit to 1 masks ALERTs due to the Remote 1 - * temperature exceeding a programmed limit. Default = 0. - * 0 - (Mask R2) - 0 - Setting this bit to 1 masks ALERTs due to the Remote 2 - * temperature exceeding a programmed limit. Default = 0. + * values from the Remote 1 registers. When default = 0, Remote 1 + * temperature values and limits are read from these registers. 2 - (Temp Range) + * - Setting this bit to 1 enables the extended temperature measurement range of + * -64°C to +191°C. When using the default = 0, the temperature range is 0°C to + * +127°C. 1 - (Mask R1) - 1 - Setting this bit to 1 masks ALERTs due to the + * Remote 1 temperature exceeding a programmed limit. Default = 0. 0 - (Mask R2) + * - 0 - Setting this bit to 1 masks ALERTs due to the Remote 2 temperature + * exceeding a programmed limit. Default = 0. */ #define ADT7481_CONFIGURATION_REG_VALUE \ (ADT7481_EXTENDED_FLAG << 2) /* Set/Clear Only Temp Range bit */ diff --git a/firmware/ec/inc/devices/dat-xxr5a-pp.h b/firmware/ec/inc/devices/dat-xxr5a-pp.h index f6d455636d..07a3042156 100644 --- a/firmware/ec/inc/devices/dat-xxr5a-pp.h +++ b/firmware/ec/inc/devices/dat-xxr5a-pp.h @@ -27,7 +27,7 @@ typedef struct DATR5APP_Cfg { OcGpio_Pin pin_4db; OcGpio_Pin pin_8db; OcGpio_Pin pin_16db; /* Optional */ - //OcGpio_Pin pin_tx_attn_enb; + // OcGpio_Pin pin_tx_attn_enb; }; OcGpio_Pin pin_group[DATR5APP_PIN_COUNT]; }; diff --git a/firmware/ec/inc/devices/ext_battery.h b/firmware/ec/inc/devices/ext_battery.h index 06112461cd..fa1f80ea47 100644 --- a/firmware/ec/inc/devices/ext_battery.h +++ b/firmware/ec/inc/devices/ext_battery.h @@ -14,11 +14,12 @@ *****************************************************************************/ #define PWR_LEAD_ACID_BATT_DEV_TEMP_SENS_ADDR 0x18 -#define PWR_EXT_BATT_RSNSB 3 //milli ohms -#define PWR_EXT_BATT_RSNSI 2 //milli ohms +#define PWR_EXT_BATT_RSNSB 3 // milli ohms +#define PWR_EXT_BATT_RSNSI 2 // milli ohms /* - * External Battery Temperature sensors Low, High and Critical Temeprature Alert Limits + * External Battery Temperature sensors Low, High and Critical Temeprature Alert + * Limits */ #define PWR_EXT_BATT_TEMP_LOW_LIMIT -20 //(in Celcius) #define PWR_EXT_BATT_TEMP_HIGH_LIMIT 75 //(in Celcius) @@ -26,13 +27,13 @@ #define PWR_EXT_BATT_DIE_TEMP_LIMIT 60 /* Config parameters for External battery charger */ -#define PWR_EXTBATT_ICHARGE_VAL 10660 //milliAmps -#define PWR_EXTBATT_VCHARGE_VAL 12000 //milliVolts -#define PWR_EXTBATT_UNDERVOLTAGE_VAL 9500 //milliVolts -#define PWR_EXTBATT_OVERVOLTAGE_VAL 13800 //milliVolts -#define PWR_EXTBATT_INPUTBATTUNDERVOLATGE_VAL 16200 //milliVolts -#define PWR_EXTBATT_INPUTHICURRENT_VAL 17000 //milliAmps -#define PWR_EXTBATT_LOWBATTCURRENT_VAL 100 //milliAmps -#define PWR_EXTBATT_INPUTCURRENTLIMIT_VAL 16500 //milliAmps +#define PWR_EXTBATT_ICHARGE_VAL 10660 // milliAmps +#define PWR_EXTBATT_VCHARGE_VAL 12000 // milliVolts +#define PWR_EXTBATT_UNDERVOLTAGE_VAL 9500 // milliVolts +#define PWR_EXTBATT_OVERVOLTAGE_VAL 13800 // milliVolts +#define PWR_EXTBATT_INPUTBATTUNDERVOLATGE_VAL 16200 // milliVolts +#define PWR_EXTBATT_INPUTHICURRENT_VAL 17000 // milliAmps +#define PWR_EXTBATT_LOWBATTCURRENT_VAL 100 // milliAmps +#define PWR_EXTBATT_INPUTCURRENTLIMIT_VAL 16500 // milliAmps #endif /* EXT_BATTERY_H_ */ diff --git a/firmware/ec/inc/devices/fe_param.h b/firmware/ec/inc/devices/fe_param.h index b73e81def0..49396dea0e 100644 --- a/firmware/ec/inc/devices/fe_param.h +++ b/firmware/ec/inc/devices/fe_param.h @@ -9,6 +9,6 @@ #ifndef FE_PARAM_H_ #define FE_PARAM_H_ -//TODO: As of now no declarations are present here +// TODO: As of now no declarations are present here #endif /* INC_DEVICES_FE_PARAM_H_ */ diff --git a/firmware/ec/inc/devices/ina226.h b/firmware/ec/inc/devices/ina226.h index fa42eee110..eec869969b 100644 --- a/firmware/ec/inc/devices/ina226.h +++ b/firmware/ec/inc/devices/ina226.h @@ -26,22 +26,22 @@ #define INA_MSK_BOL (1 << 13) /* Bus over-voltage */ #define INA_MSK_BUL (1 << 12) /* Bus under-voltage */ #define INA_MSK_POL (1 << 11) /* Power over limit */ -#define INA_MSK_CNVR \ - (1 << 10) /* Conversion ready - enable alert when - * CVRF is set (ready for next conversion) */ +#define INA_MSK_CNVR \ + (1 << 10) /* Conversion ready - enable alert when \ + * CVRF is set (ready for next conversion) */ -#define INA_MSK_AFF \ - (1 << 4) /* Alert Function Flag (caused by alert) - * In latch mode, cleared on mask read */ -#define INA_MSK_CVRF \ - (1 << 3) /* Conversion Ready Flag, cleared when - * writing to cfg reg or mask read */ +#define INA_MSK_AFF \ + (1 << 4) /* Alert Function Flag (caused by alert) \ + * In latch mode, cleared on mask read */ +#define INA_MSK_CVRF \ + (1 << 3) /* Conversion Ready Flag, cleared when \ + * writing to cfg reg or mask read */ #define INA_MSK_OVF (1 << 2) /* Math Overflow Flag (data may be invalid) */ #define INA_MSK_APOL (1 << 1) /* Alert Polarity (1 = invert, active high) */ -#define INA_MSK_LEN \ - (1 << 0) /* Alert Latch Enable - * 1 Latch (alert only cleared by read to msk) - * 0 Transparent (auto-clear on fault clear) */ +#define INA_MSK_LEN \ + (1 << 0) /* Alert Latch Enable \ + * 1 Latch (alert only cleared by read to msk) \ + * 0 Transparent (auto-clear on fault clear) */ #define INA_HYSTERESIS \ 30 /* 30mA TODO: need to make more robust, maybe percentage based */ diff --git a/firmware/ec/inc/devices/int_battery.h b/firmware/ec/inc/devices/int_battery.h index 74dc5cb743..8b5405ca47 100644 --- a/firmware/ec/inc/devices/int_battery.h +++ b/firmware/ec/inc/devices/int_battery.h @@ -12,15 +12,15 @@ /***************************************************************************** * MACRO DEFINITIONS *****************************************************************************/ -#define PWR_INT_BATT_RSNSB 30 //milli ohms -#define PWR_INT_BATT_RSNSI 7 //milli ohms +#define PWR_INT_BATT_RSNSB 30 // milli ohms +#define PWR_INT_BATT_RSNSI 7 // milli ohms /* Config parameters for Internal battery charger */ -#define PWR_INTBATT_UNDERVOLTAGE_VAL 9000 //milliVolts -#define PWR_INTBATT_OVERVOLTAGE_VAL 12600 //milliVolts -#define PWR_INTBATT_INPUTUNDERVOLATGE_VAL 16200 //milliVolts -#define PWR_INTBATT_INPUTOVERCURRENT_VAL 5000 //milliAmps -#define PWR_INTBATT_LOWBATTERYCURRENT_VAL 100 //milliAmps -#define PWR_INTBATT_INPUTCURRENTLIMIT_VAL 5570 //milliAmps +#define PWR_INTBATT_UNDERVOLTAGE_VAL 9000 // milliVolts +#define PWR_INTBATT_OVERVOLTAGE_VAL 12600 // milliVolts +#define PWR_INTBATT_INPUTUNDERVOLATGE_VAL 16200 // milliVolts +#define PWR_INTBATT_INPUTOVERCURRENT_VAL 5000 // milliAmps +#define PWR_INTBATT_LOWBATTERYCURRENT_VAL 100 // milliAmps +#define PWR_INTBATT_INPUTCURRENTLIMIT_VAL 5570 // milliAmps #endif /* INT_BATTERY_H_ */ diff --git a/firmware/ec/inc/devices/ltc4015.h b/firmware/ec/inc/devices/ltc4015.h index c93aafe205..a9e5196bbb 100644 --- a/firmware/ec/inc/devices/ltc4015.h +++ b/firmware/ec/inc/devices/ltc4015.h @@ -85,7 +85,7 @@ typedef struct LTC4015_HWCfg { /* TODO: this can be read from the IC itself */ LTC4015_Chem - chem; /* Battery chemistry we're controlling (verified during init) */ + chem; /* Battery chemistry we're controlling (verified during init) */ uint8_t r_snsb; /* Value of SNSB resistor in milli-ohms */ uint8_t r_snsi; /* Value of SNSI resistor in milli-ohms */ diff --git a/firmware/ec/inc/devices/sbd.h b/firmware/ec/inc/devices/sbd.h index 96b6336f66..20015d0f27 100644 --- a/firmware/ec/inc/devices/sbd.h +++ b/firmware/ec/inc/devices/sbd.h @@ -1,11 +1,11 @@ /** -* Copyright (c) 2017-present, Facebook, Inc. -* All rights reserved. -* -* This source code is licensed under the BSD-style license found in the -* LICENSE file in the root directory of this source tree. An additional grant -* of patent rights can be found in the PATENTS file in the same directory. -*/ + * Copyright (c) 2017-present, Facebook, Inc. + * All rights reserved. + * + * This source code is licensed under the BSD-style license found in the + * LICENSE file in the root directory of this source tree. An additional grant + * of patent rights can be found in the PATENTS file in the same directory. + */ #ifndef INC_DEVICES_SBD_H_ #define INC_DEVICES_SBD_H_ diff --git a/firmware/ec/inc/subsystem/gpp/ebmp.h b/firmware/ec/inc/subsystem/gpp/ebmp.h index 5904a4d12c..0515b5b60a 100644 --- a/firmware/ec/inc/subsystem/gpp/ebmp.h +++ b/firmware/ec/inc/subsystem/gpp/ebmp.h @@ -21,9 +21,8 @@ * STRUCT/ENUM DEFINITIONS *****************************************************************************/ /* - * GPP states are define here. Where we define various states GPP or AP can be in. - * S0_SC[059] and S5[09] are the inputs - * T0: AP SOC under Reset. (0,0) + * GPP states are define here. Where we define various states GPP or AP can be + * in. S0_SC[059] and S5[09] are the inputs T0: AP SOC under Reset. (0,0) * T1: AP starts the booting. (0,0) * T2: AP starts DDR init. (0,1) * T3: PCIe and SPC init. (1,1) diff --git a/firmware/ec/inc/subsystem/sys/sys.h b/firmware/ec/inc/subsystem/sys/sys.h index e014d5b82b..40481ac6d0 100644 --- a/firmware/ec/inc/subsystem/sys/sys.h +++ b/firmware/ec/inc/subsystem/sys/sys.h @@ -1,11 +1,11 @@ /** -* Copyright (c) 2017-present, Facebook, Inc. -* All rights reserved. -* -* This source code is licensed under the BSD-style license found in the -* LICENSE file in the root directory of this source tree. An additional grant -* of patent rights can be found in the PATENTS file in the same directory. -*/ + * Copyright (c) 2017-present, Facebook, Inc. + * All rights reserved. + * + * This source code is licensed under the BSD-style license found in the + * LICENSE file in the root directory of this source tree. An additional grant + * of patent rights can be found in the PATENTS file in the same directory. + */ #ifndef _SYS_H #define _SYS_H #include "common/inc/global/Framework.h" diff --git a/firmware/ec/inc/utils/util.h b/firmware/ec/inc/utils/util.h index 514d468a0e..60c0851d07 100644 --- a/firmware/ec/inc/utils/util.h +++ b/firmware/ec/inc/utils/util.h @@ -55,8 +55,8 @@ extern "C" { #include /********************************************************************* -* EXTERNAL VARIABLES -*/ + * EXTERNAL VARIABLES + */ /********************************************************************* * CONSTANTS diff --git a/firmware/ec/platform/oc-sdr/cfg/OC_CONNECT1.c b/firmware/ec/platform/oc-sdr/cfg/OC_CONNECT1.c index 09caabd224..a3968aa2b9 100644 --- a/firmware/ec/platform/oc-sdr/cfg/OC_CONNECT1.c +++ b/firmware/ec/platform/oc-sdr/cfg/OC_CONNECT1.c @@ -66,11 +66,11 @@ #include #ifndef TI_DRIVERS_UART_DMA -#define TI_DRIVERS_UART_DMA 0 +# define TI_DRIVERS_UART_DMA 0 #endif #ifndef TI_EXAMPLES_PPP -#define TI_EXAMPLES_PPP 0 +# define TI_EXAMPLES_PPP 0 #else /* prototype for NIMU init function */ extern int USBSerialPPP_NIMUInit(); @@ -80,9 +80,9 @@ extern int USBSerialPPP_NIMUInit(); * =============================== DMA =============================== */ #if defined(__TI_COMPILER_VERSION__) -#pragma DATA_ALIGN(dmaControlTable, 1024) +# pragma DATA_ALIGN(dmaControlTable, 1024) #elif defined(__IAR_SYSTEMS_ICC__) -#pragma data_alignment = 1024 +# pragma data_alignment = 1024 #elif defined(__GNUC__) __attribute__((aligned(1024))) #endif @@ -155,9 +155,9 @@ void OC_CONNECT1_initGeneral(void) SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOQ); // TODO: why did we comment this out? - //SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOR); - //SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOS); - //SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOT); + // SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOR); + // SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOS); + // SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOT); } /* @@ -165,9 +165,9 @@ void OC_CONNECT1_initGeneral(void) */ /* Place into subsections to allow the TI linker to remove items properly */ #if defined(__TI_COMPILER_VERSION__) -#pragma DATA_SECTION(EMAC_config, ".const:EMAC_config") -#pragma DATA_SECTION(emacHWAttrs, ".const:emacHWAttrs") -#pragma DATA_SECTION(NIMUDeviceTable, ".data:NIMUDeviceTable") +# pragma DATA_SECTION(EMAC_config, ".const:EMAC_config") +# pragma DATA_SECTION(emacHWAttrs, ".const:emacHWAttrs") +# pragma DATA_SECTION(NIMUDeviceTable, ".data:NIMUDeviceTable") #endif #include @@ -182,11 +182,11 @@ void OC_CONNECT1_initGeneral(void) NIMU_DEVICE_TABLE_ENTRY NIMUDeviceTable[2] = { { #if TI_EXAMPLES_PPP - /* Use PPP driver for PPP example only */ - .init = USBSerialPPP_NIMUInit + /* Use PPP driver for PPP example only */ + .init = USBSerialPPP_NIMUInit #else - /* Default: use Ethernet driver */ - .init = EMACSnow_NIMUInit + /* Default: use Ethernet driver */ + .init = EMACSnow_NIMUInit #endif }, { NULL } @@ -257,7 +257,7 @@ void OC_CONNECT1_initEMAC(void) */ /* Place into subsections to allow the TI linker to remove items properly */ #if defined(__TI_COMPILER_VERSION__) -#pragma DATA_SECTION(GPIOTiva_config, ".const:GPIOTiva_config") +# pragma DATA_SECTION(GPIOTiva_config, ".const:GPIOTiva_config") #endif #include @@ -273,51 +273,51 @@ extern GPIO_PinConfig gpioPinConfigs[]; */ GPIO_PinConfig gpioPinConfigs[OC_EC_GPIOCOUNT] = { [OC_EC_SOC_UART3_TX] = - GPIOTiva_PA_5 | GPIO_CFG_IN_NOPULL | GPIO_CFG_IN_INT_BOTH_EDGES, + GPIOTiva_PA_5 | GPIO_CFG_IN_NOPULL | GPIO_CFG_IN_INT_BOTH_EDGES, [OC_EC_SDR_INA_ALERT] = - GPIOTiva_PD_2 | GPIO_CFG_IN_NOPULL | GPIO_CFG_IN_INT_FALLING, + GPIOTiva_PD_2 | GPIO_CFG_IN_NOPULL | GPIO_CFG_IN_INT_FALLING, [OC_EC_PWR_PSE_RESET] = GPIOTiva_PD_3 | GPIO_CFG_OUT_STD | GPIO_CFG_OUT_STR_HIGH | GPIO_CFG_OUT_HIGH, [OC_EC_PWR_PRSNT_SOLAR_AUX] = GPIOTiva_PD_6 | GPIO_CFG_IN_PU, [OC_EC_SYNC_IOEXP_ALERT] = - GPIOTiva_PD_7 | GPIO_CFG_IN_PU | GPIO_CFG_IN_INT_FALLING, + GPIOTiva_PD_7 | GPIO_CFG_IN_PU | GPIO_CFG_IN_INT_FALLING, [OC_EC_GBC_IOEXP71_ALERT] = - GPIOTiva_PE_0 | GPIO_CFG_IN_NOPULL | GPIO_CFG_IN_INT_FALLING, + GPIOTiva_PE_0 | GPIO_CFG_IN_NOPULL | GPIO_CFG_IN_INT_FALLING, [OC_EC_FE_CONTROL] = GPIOTiva_PE_1 | GPIO_CFG_OUT_STD | GPIO_CFG_OUT_STR_HIGH | GPIO_CFG_OUT_LOW, [OC_EC_GPP_AP_BM_1] = - GPIOTiva_PE_3 | GPIO_CFG_IN_NOPULL | GPIO_CFG_IN_INT_BOTH_EDGES, + GPIOTiva_PE_3 | GPIO_CFG_IN_NOPULL | GPIO_CFG_IN_INT_BOTH_EDGES, [OC_EC_GPP_PMIC_CORE_PWR] = GPIOTiva_PH_0 | GPIO_CFG_IN_PU, [OC_EC_GPP_SOC_PLTRST] = - GPIOTiva_PH_1 | GPIO_CFG_IN_NOPULL | GPIO_CFG_IN_INT_BOTH_EDGES, + GPIOTiva_PH_1 | GPIO_CFG_IN_NOPULL | GPIO_CFG_IN_INT_BOTH_EDGES, [OC_EC_GPP_PMIC_CTRL] = GPIOTiva_PH_2 | GPIO_CFG_OUT_STD | GPIO_CFG_OUT_STR_HIGH | GPIO_CFG_OUT_LOW, [OC_EC_GBC_INA_ALERT] = - GPIOTiva_PH_3 | GPIO_CFG_IN_NOPULL | GPIO_CFG_IN_INT_FALLING, + GPIOTiva_PH_3 | GPIO_CFG_IN_NOPULL | GPIO_CFG_IN_INT_FALLING, [OC_EC_PWR_PD_NT2P] = GPIOTiva_PJ_0 | GPIO_CFG_IN_PU, [OC_EC_GBC_AP_INA_ALERT] = - GPIOTiva_PJ_1 | GPIO_CFG_IN_NOPULL | GPIO_CFG_IN_INT_FALLING, + GPIOTiva_PJ_1 | GPIO_CFG_IN_NOPULL | GPIO_CFG_IN_INT_FALLING, [OC_EC_GBC_PSE_ALERT] = - GPIOTiva_PL_2 | GPIO_CFG_IN_NOPULL | GPIO_CFG_IN_INT_FALLING, + GPIOTiva_PL_2 | GPIO_CFG_IN_NOPULL | GPIO_CFG_IN_INT_FALLING, [OC_EC_GPP_AP_BM_2] = - GPIOTiva_PL_3 | GPIO_CFG_IN_NOPULL | GPIO_CFG_IN_INT_BOTH_EDGES, + GPIOTiva_PL_3 | GPIO_CFG_IN_NOPULL | GPIO_CFG_IN_INT_BOTH_EDGES, [OC_EC_PWR_PRSNT_POE] = GPIOTiva_PL_5 | GPIO_CFG_IN_PU, [OC_EC_PWR_LION_ALERT] = - GPIOTiva_PM_0 | GPIO_CFG_IN_NOPULL | GPIO_CFG_IN_INT_FALLING, + GPIOTiva_PM_0 | GPIO_CFG_IN_NOPULL | GPIO_CFG_IN_INT_FALLING, [OC_EC_HCI_LED_RESET] = GPIOTiva_PM_1 | GPIO_CFG_OUT_STD | GPIO_CFG_OUT_STR_HIGH | GPIO_CFG_OUT_HIGH, [OC_EC_PWR_LACID_ALERT] = - GPIOTiva_PM_3 | GPIO_CFG_IN_NOPULL | GPIO_CFG_IN_INT_FALLING, + GPIOTiva_PM_3 | GPIO_CFG_IN_NOPULL | GPIO_CFG_IN_INT_FALLING, [OC_EC_RFFE_TEMP_INA_ALERT] = - GPIOTiva_PM_4 | GPIO_CFG_IN_NOPULL | GPIO_CFG_IN_INT_FALLING, + GPIOTiva_PM_4 | GPIO_CFG_IN_NOPULL | GPIO_CFG_IN_INT_FALLING, [OC_EC_ETH_SW_RESET] = GPIOTiva_PM_5 | GPIO_CFG_OUT_STD | GPIO_CFG_OUT_STR_HIGH | GPIO_CFG_OUT_HIGH, [OC_EC_PWR_BATT_SELECT] = GPIOTiva_PM_7 | GPIO_CFG_OUT_STD | GPIO_CFG_OUT_STR_HIGH | GPIO_CFG_OUT_HIGH, [OC_EC_PD_PWRGD_ALERT] = - GPIOTiva_PN_0 | GPIO_CFG_IN_NOPULL | GPIO_CFG_IN_INT_BOTH_EDGES, + GPIOTiva_PN_0 | GPIO_CFG_IN_NOPULL | GPIO_CFG_IN_INT_BOTH_EDGES, [OC_EC_SDR_FPGA_TEMP_INA_ALERT] = - GPIOTiva_PN_1 | GPIO_CFG_IN_NOPULL | GPIO_CFG_IN_INT_FALLING, + GPIOTiva_PN_1 | GPIO_CFG_IN_NOPULL | GPIO_CFG_IN_INT_FALLING, [OC_EC_SDR_PWR_GD] = GPIOTiva_PN_3 | GPIO_CFG_IN_NOPULL, [OC_EC_SDR_DEVICE_CONTROL] = GPIOTiva_PN_2 | GPIO_CFG_OUT_STD | GPIO_CFG_OUT_STR_HIGH | GPIO_CFG_OUT_LOW, @@ -355,7 +355,7 @@ const GPIOTiva_Config GPIOTiva_config = { .callbacks = (GPIO_CallbackFxn *)gpioCallbackFunctions, .numberOfPinConfigs = sizeof(gpioPinConfigs) / sizeof(GPIO_PinConfig), .numberOfCallbacks = - sizeof(gpioCallbackFunctions) / sizeof(GPIO_CallbackFxn), + sizeof(gpioCallbackFunctions) / sizeof(GPIO_CallbackFxn), .intPriority = (~0) }; @@ -372,7 +372,7 @@ OcGpio_Port ec_io; OcGpio_Port gbc_io_1; OcGpio_Port gbc_io_0; OcGpio_Port sdr_fx3_io; -//OcGpio_Port sdr_eeprom_wp_io; +// OcGpio_Port sdr_eeprom_wp_io; OcGpio_Port fe_ch1_gain_io; OcGpio_Port fe_ch2_gain_io; OcGpio_Port fe_ch1_lna_io; @@ -387,30 +387,29 @@ OcGpio_Port ec_io = { OcGpio_Port gbc_io_0 = { .fn_table = &GpioSX1509_fnTable, .cfg = - &(SX1509_Cfg){ - .i2c_dev = { OC_CONNECT1_I2C6, BIGBROTHER_IOEXP0_ADDRESS }, - .pin_irq = &(OcGpio_Pin){ &ec_io, OC_EC_GBC_IOEXP71_ALERT }, - }, + &(SX1509_Cfg){ + .i2c_dev = { OC_CONNECT1_I2C6, BIGBROTHER_IOEXP0_ADDRESS }, + .pin_irq = &(OcGpio_Pin){ &ec_io, OC_EC_GBC_IOEXP71_ALERT }, + }, .object_data = &(SX1509_Obj){}, }; OcGpio_Port gbc_io_1 = { .fn_table = &GpioSX1509_fnTable, .cfg = - &(SX1509_Cfg){ - .i2c_dev = { OC_CONNECT1_I2C6, BIGBROTHER_IOEXP1_ADDRESS }, - .pin_irq = - NULL, /* This IO expander doesn't provide interrupts */ - }, + &(SX1509_Cfg){ + .i2c_dev = { OC_CONNECT1_I2C6, BIGBROTHER_IOEXP1_ADDRESS }, + .pin_irq = NULL, /* This IO expander doesn't provide interrupts */ + }, .object_data = &(SX1509_Obj){}, }; OcGpio_Port sdr_fx3_io = { .fn_table = &GpioPCA9557_fnTable, .cfg = - &(PCA9557_Cfg){ - .i2c_dev = { OC_CONNECT1_I2C3, SDR_FX3_IOEXP_ADDRESS }, - }, + &(PCA9557_Cfg){ + .i2c_dev = { OC_CONNECT1_I2C3, SDR_FX3_IOEXP_ADDRESS }, + }, .object_data = &(PCA9557_Obj){}, }; @@ -426,60 +425,55 @@ OcGpio_Port sdr_fx3_io = { OcGpio_Port fe_ch1_gain_io = { .fn_table = &GpioPCA9557_fnTable, .cfg = - &(PCA9557_Cfg){ - .i2c_dev = { OC_CONNECT1_I2C2, - RFFE_CHANNEL1_IO_TX_ATTEN_ADDR }, - }, + &(PCA9557_Cfg){ + .i2c_dev = { OC_CONNECT1_I2C2, RFFE_CHANNEL1_IO_TX_ATTEN_ADDR }, + }, .object_data = &(PCA9557_Obj){}, }; OcGpio_Port fe_ch2_gain_io = { .fn_table = &GpioPCA9557_fnTable, .cfg = - &(PCA9557_Cfg){ - .i2c_dev = { OC_CONNECT1_I2C2, - RFFE_CHANNEL2_IO_TX_ATTEN_ADDR }, - }, + &(PCA9557_Cfg){ + .i2c_dev = { OC_CONNECT1_I2C2, RFFE_CHANNEL2_IO_TX_ATTEN_ADDR }, + }, .object_data = &(PCA9557_Obj){}, }; OcGpio_Port fe_ch1_lna_io = { .fn_table = &GpioPCA9557_fnTable, .cfg = - &(PCA9557_Cfg){ - .i2c_dev = { OC_CONNECT1_I2C2, - RFFE_CHANNEL1_IO_RX_ATTEN_ADDR }, - }, + &(PCA9557_Cfg){ + .i2c_dev = { OC_CONNECT1_I2C2, RFFE_CHANNEL1_IO_RX_ATTEN_ADDR }, + }, .object_data = &(PCA9557_Obj){}, }; OcGpio_Port fe_ch2_lna_io = { .fn_table = &GpioPCA9557_fnTable, .cfg = - &(PCA9557_Cfg){ - .i2c_dev = { OC_CONNECT1_I2C2, - RFFE_CHANNEL2_IO_RX_ATTEN_ADDR }, - }, + &(PCA9557_Cfg){ + .i2c_dev = { OC_CONNECT1_I2C2, RFFE_CHANNEL2_IO_RX_ATTEN_ADDR }, + }, .object_data = &(PCA9557_Obj){}, }; OcGpio_Port fe_watchdog_io = { .fn_table = &GpioPCA9557_fnTable, .cfg = - &(PCA9557_Cfg){ - .i2c_dev = { OC_CONNECT1_I2C2, - RFFE_IO_REVPOWER_ALERT_ADDR }, - }, + &(PCA9557_Cfg){ + .i2c_dev = { OC_CONNECT1_I2C2, RFFE_IO_REVPOWER_ALERT_ADDR }, + }, .object_data = &(PCA9557_Obj){}, }; OcGpio_Port sync_io = { .fn_table = &GpioSX1509_fnTable, .cfg = - &(SX1509_Cfg){ - .i2c_dev = { OC_CONNECT1_I2C7, SYNC_IO_DEVICE_ADDR }, - .pin_irq = &(OcGpio_Pin){ &ec_io, OC_EC_SYNC_IOEXP_ALERT }, - }, + &(SX1509_Cfg){ + .i2c_dev = { OC_CONNECT1_I2C7, SYNC_IO_DEVICE_ADDR }, + .pin_irq = &(OcGpio_Pin){ &ec_io, OC_EC_SYNC_IOEXP_ALERT }, + }, .object_data = &(SX1509_Obj){}, }; @@ -499,8 +493,8 @@ void OC_CONNECT1_initGPIO(void) */ /* Place into subsections to allow the TI linker to remove items properly */ #if defined(__TI_COMPILER_VERSION__) -#pragma DATA_SECTION(I2C_config, ".const:I2C_config") -#pragma DATA_SECTION(i2cTivaHWAttrs, ".const:i2cTivaHWAttrs") +# pragma DATA_SECTION(I2C_config, ".const:I2C_config") +# pragma DATA_SECTION(i2cTivaHWAttrs, ".const:i2cTivaHWAttrs") #endif #include @@ -662,24 +656,24 @@ void OC_CONNECT1_initI2C(void) */ /* Place into subsections to allow the TI linker to remove items properly */ #if defined(__TI_COMPILER_VERSION__) -#pragma DATA_SECTION(UART_config, ".const:UART_config") -#pragma DATA_SECTION(uartTivaHWAttrs, ".const:uartTivaHWAttrs") +# pragma DATA_SECTION(UART_config, ".const:UART_config") +# pragma DATA_SECTION(uartTivaHWAttrs, ".const:uartTivaHWAttrs") #endif #include #if TI_DRIVERS_UART_DMA -#include +# include UARTTivaDMA_Object uartTivaObjects[OC_CONNECT1_UARTCOUNT]; const UARTTivaDMA_HWAttrs uartTivaHWAttrs[OC_CONNECT1_UARTCOUNT] = - { [OC_CONNECT1_UART3] = { - .baseAddr = UART0_BASE, - .intNum = INT_UART0, - .intPriority = (~0), - .rxChannelIndex = UDMA_CH8_UART0RX, - .txChannelIndex = UDMA_CH9_UART0TX, - } }; + { [OC_CONNECT1_UART3] = { + .baseAddr = UART0_BASE, + .intNum = INT_UART0, + .intPriority = (~0), + .rxChannelIndex = UDMA_CH8_UART0RX, + .txChannelIndex = UDMA_CH9_UART0TX, + } }; const UART_Config UART_config[] = { [OC_CONNECT1_UART3] = { .fxnTablePtr = &UARTTivaDMA_fxnTable, @@ -688,9 +682,9 @@ const UART_Config UART_config[] = { { NULL, NULL, NULL } }; #else -#include -#include "devices/i2c/XR20M1170.h" // TODO: is devices the right directory? also, is it confusing to have this in i2c? -#include "devices/uart/UartMon.h" +# include +# include "devices/i2c/XR20M1170.h" // TODO: is devices the right directory? also, is it confusing to have this in i2c? +# include "devices/uart/UartMon.h" UARTTiva_Object uartTivaObjects[3]; unsigned char uartTivaRingBuffer[3][64]; @@ -731,7 +725,7 @@ const XR20M1170_HWAttrs XR20M1170HWAttrs = { // uart interrupt .i2cIndex = OC_CONNECT1_I2C7, .i2cSlaveAddress = - 0x60 >> 1, // TODO: i2c driver uses 7-bit address...sort of annoying + 0x60 >> 1, // TODO: i2c driver uses 7-bit address...sort of annoying .xtal1_freq = 14745600, // 14.7456 MHz .pin_irq = &(OcGpio_Pin){ &gbc_io_0, 0, OCGPIO_CFG_IN_PU }, .flowControl = XR20M1170_FLOWCONTROL_TX | XR20M1170_FLOWCONTROL_RX, @@ -759,11 +753,11 @@ const UART_Config UART_config[OC_CONNECT1_UARTCOUNT + 1] = { .object = &XR20M1170Objects, .hwAttrs = &XR20M1170HWAttrs }, [OC_CONNECT1_UARTMON] = - { - .fxnTablePtr = &UartMon_fxnTable, - .object = &uart_mon_obj, - .hwAttrs = &uart_mon_cfg, - }, + { + .fxnTablePtr = &UartMon_fxnTable, + .object = &uart_mon_obj, + .hwAttrs = &uart_mon_cfg, + }, { NULL, NULL, NULL } }; @@ -779,13 +773,13 @@ void OC_CONNECT1_initUART(void) GPIOPinTypeUART(GPIO_PORTA_BASE, GPIO_PIN_0 | GPIO_PIN_1); // AP UART - //SysCtlPeripheralEnable(SYSCTL_PERIPH_UART3); - //GPIOPinConfigure(GPIO_PA4_U3RX); - //GPIOPinConfigure(GPIO_PA5_U3TX); - //GPIOPinTypeUART(GPIO_PORTA_BASE, GPIO_PIN_4 | GPIO_PIN_5); + // SysCtlPeripheralEnable(SYSCTL_PERIPH_UART3); + // GPIOPinConfigure(GPIO_PA4_U3RX); + // GPIOPinConfigure(GPIO_PA5_U3TX); + // GPIOPinTypeUART(GPIO_PORTA_BASE, GPIO_PIN_4 | GPIO_PIN_5); // XR20M1170 IRQ pin - //GPIOPinTypeGPIOInput(GPIO_PORTE_BASE, GPIO_PIN_5); + // GPIOPinTypeGPIOInput(GPIO_PORTE_BASE, GPIO_PIN_5); // GSM Module UART SysCtlPeripheralEnable(SYSCTL_PERIPH_UART4); @@ -797,9 +791,9 @@ void OC_CONNECT1_initUART(void) GPIO_PIN_0 | GPIO_PIN_1 | GPIO_PIN_2 | GPIO_PIN_3); /* Initialize the UART driver */ -#if TI_DRIVERS_UART_DMA +# if TI_DRIVERS_UART_DMA OC_CONNECT1_initDMA(); -#endif +# endif UART_init(); } #endif /* TI_DRIVERS_UART_DMA */ @@ -873,8 +867,8 @@ void OC_CONNECT1_initUSB(OC_CONNECT1_USBMode usbMode) */ /* Place into subsections to allow the TI linker to remove items properly */ #if defined(__TI_COMPILER_VERSION__) -#pragma DATA_SECTION(Watchdog_config, ".const:Watchdog_config") -#pragma DATA_SECTION(watchdogTivaHWAttrs, ".const:watchdogTivaHWAttrs") +# pragma DATA_SECTION(Watchdog_config, ".const:Watchdog_config") +# pragma DATA_SECTION(watchdogTivaHWAttrs, ".const:watchdogTivaHWAttrs") #endif #include @@ -884,20 +878,19 @@ WatchdogTiva_Object watchdogTivaObjects[OC_CONNECT1_WATCHDOGCOUNT]; const WatchdogTiva_HWAttrs watchdogTivaHWAttrs[OC_CONNECT1_WATCHDOGCOUNT] = { [OC_CONNECT1_WATCHDOG0] = - { - .baseAddr = WATCHDOG0_BASE, - .intNum = INT_WATCHDOG, - .intPriority = (~0), - .reloadValue = - 80000000 // 1 second period at default CPU clock freq - }, + { + .baseAddr = WATCHDOG0_BASE, + .intNum = INT_WATCHDOG, + .intPriority = (~0), + .reloadValue = 80000000 // 1 second period at default CPU clock freq + }, }; const Watchdog_Config Watchdog_config[] = { [OC_CONNECT1_WATCHDOG0] = - { .fxnTablePtr = &WatchdogTiva_fxnTable, - .object = &watchdogTivaObjects[OC_CONNECT1_WATCHDOG0], - .hwAttrs = &watchdogTivaHWAttrs[OC_CONNECT1_WATCHDOG0] }, + { .fxnTablePtr = &WatchdogTiva_fxnTable, + .object = &watchdogTivaObjects[OC_CONNECT1_WATCHDOG0], + .hwAttrs = &watchdogTivaHWAttrs[OC_CONNECT1_WATCHDOG0] }, { NULL, NULL, NULL }, }; diff --git a/firmware/ec/platform/oc-sdr/cfg/OC_CONNECT_FE.c b/firmware/ec/platform/oc-sdr/cfg/OC_CONNECT_FE.c index 2944a2b782..3224f3d436 100644 --- a/firmware/ec/platform/oc-sdr/cfg/OC_CONNECT_FE.c +++ b/firmware/ec/platform/oc-sdr/cfg/OC_CONNECT_FE.c @@ -43,54 +43,52 @@ Eeprom_Cfg eeprom_fe_inv = { INA226_Dev fe_ch1_ps_5_7v = { /* CH1 5.7V Sensor */ .cfg = - { - .dev = - { - .bus = OC_CONNECT1_I2C4, - .slave_addr = RFFE_INA226_CH1_5_7V_ADDR, - }, - .pin_alert = - &(OcGpio_Pin){ &ec_io, OC_EC_RFFE_TEMP_INA_ALERT }, - }, + { + .dev = + { + .bus = OC_CONNECT1_I2C4, + .slave_addr = RFFE_INA226_CH1_5_7V_ADDR, + }, + .pin_alert = &(OcGpio_Pin){ &ec_io, OC_EC_RFFE_TEMP_INA_ALERT }, + }, }; -//FE Channel 2 Power sensor. +// FE Channel 2 Power sensor. INA226_Dev fe_ch2_ps_5_7v = { /* CH2 5.7V Sensor */ .cfg = - { - .dev = - { - .bus = OC_CONNECT1_I2C4, - .slave_addr = RFFE_INA226_CH2_5_7V_ADDR, - }, - .pin_alert = - &(OcGpio_Pin){ &ec_io, OC_EC_RFFE_TEMP_INA_ALERT }, - }, + { + .dev = + { + .bus = OC_CONNECT1_I2C4, + .slave_addr = RFFE_INA226_CH2_5_7V_ADDR, + }, + .pin_alert = &(OcGpio_Pin){ &ec_io, OC_EC_RFFE_TEMP_INA_ALERT }, + }, }; -//FE Channel 1 temperature sensor. +// FE Channel 1 temperature sensor. I2C_Dev fe_ch1_ts = { .bus = OC_CONNECT1_I2C4, .slave_addr = RFFE_CH1_TEMP_SENSOR_ADDR, }; -//FE Channel 2 temperature sensor. +// FE Channel 2 temperature sensor. I2C_Dev fe_ch2_ts = (I2C_Dev){ .bus = OC_CONNECT1_I2C4, .slave_addr = RFFE_CH2_TEMP_SENSOR_ADDR, }; -//FE EEPROM inventory +// FE EEPROM inventory void *fe_eeprom_inventory = &eeprom_fe_inv; -//FE Channel 1 ADC +// FE Channel 1 ADC I2C_Dev fe_ch1_ads7830 = { .bus = OC_CONNECT1_I2C4, .slave_addr = RFFE_CHANNEL1_ADC_ADDR, }; -//FE Channel 2 ADC +// FE Channel 2 ADC I2C_Dev fe_ch2_ads7830 = { .bus = OC_CONNECT1_I2C4, .slave_addr = RFFE_CHANNEL2_ADC_ADDR, @@ -160,7 +158,7 @@ Fe_Lna_Cfg fe_ch2_lna = { .pin_rx_attn_enb = { &fe_ch2_lna_io, 7 }, }; -//FE watch dog +// FE watch dog Fe_Watchdog_Cfg fe_watchdog_cfg = { /* AOSEL_FPGA */ .pin_aosel_fpga = { &fe_watchdog_io, 0 }, @@ -188,24 +186,24 @@ Fe_gpioCfg fe_gpiocfg = { .pin_trxfe_conn_reset = { &ec_io, OC_EC_FE_TRXFE_CONN_RESET }, }; -//FE Ch1 TX Gain control +// FE Ch1 TX Gain control Fe_Ch1_Gain_Cfg fe_ch1_tx_gain_cfg = (Fe_Ch1_Gain_Cfg){ .fe_gain_cfg = &fe_ch1_gain, }; -//FE Ch2 TX Gain control +// FE Ch2 TX Gain control Fe_Ch2_Gain_Cfg fe_ch2_tx_gain_cfg = (Fe_Ch2_Gain_Cfg){ /* CH1_2G_LB_BAND_SEL_L */ .pin_ch1_2g_lb_band_sel_l = { &fe_ch2_gain_io, 0 }, .fe_gain_cfg = &fe_ch2_gain, }; -//FE Ch1 LNA config +// FE Ch1 LNA config Fe_Ch1_Lna_Cfg fe_ch1_rx_gain_cfg = (Fe_Ch1_Lna_Cfg){ .fe_lna_cfg = &fe_ch1_lna, }; -//FE Ch2 LNA config +// FE Ch2 LNA config Fe_Ch2_Lna_Cfg fe_ch2_rx_gain_cfg = (Fe_Ch2_Lna_Cfg){ /* CH1_RF_PWR_OFF */ .pin_ch1_rf_pwr_off = { &fe_ch2_lna_io, 1 }, @@ -253,17 +251,17 @@ Fe_Ch_Pwr_Cfg fe_ch2_pwrcfg = { .channel = RFFE_CHANNEL2, // TestModule TestMod_Cfg testModuleCfg = (TestMod_Cfg){ .g510_cfg = - { - .uart = OC_CONNECT1_UART4, - /* 2G_SIM_PRESENCE */ - .pin_sim_present = { &gbc_io_1, 0, OCGPIO_CFG_IN_PU }, + { + .uart = OC_CONNECT1_UART4, + /* 2G_SIM_PRESENCE */ + .pin_sim_present = { &gbc_io_1, 0, OCGPIO_CFG_IN_PU }, - /* NOTE: enable & power go through MOSFETs, inverting them */ - /* 2GMODULE_POWEROFF */ - .pin_enable = { &gbc_io_1, 2, OCGPIO_CFG_INVERT }, - /* EC_2GMODULE_PWR_ON */ - .pin_pwr_en = { &gbc_io_1, 1, OCGPIO_CFG_INVERT }, - }, + /* NOTE: enable & power go through MOSFETs, inverting them */ + /* 2GMODULE_POWEROFF */ + .pin_enable = { &gbc_io_1, 2, OCGPIO_CFG_INVERT }, + /* EC_2GMODULE_PWR_ON */ + .pin_pwr_en = { &gbc_io_1, 1, OCGPIO_CFG_INVERT }, + }, .pin_ant_sw = {}, }; @@ -288,7 +286,7 @@ S_OCGPIO_Cfg debug_fe_ioexpanderx1D = { .port = &fe_ch2_lna_io, }; -//FE Factory config +// FE Factory config const ADT7481_Config fact_fe_ch1_adt7481_cfg = { .lowlimit = -20, .highlimit = 80, diff --git a/firmware/ec/platform/oc-sdr/cfg/OC_CONNECT_GBC.c b/firmware/ec/platform/oc-sdr/cfg/OC_CONNECT_GBC.c index 5e534282ee..2f5528e1c7 100644 --- a/firmware/ec/platform/oc-sdr/cfg/OC_CONNECT_GBC.c +++ b/firmware/ec/platform/oc-sdr/cfg/OC_CONNECT_GBC.c @@ -64,144 +64,138 @@ Eeprom_Cfg eeprom_gbc_inv = { * SYSTEM CONFIG *****************************************************************************/ /* Power SubSystem Config */ -//Lead Acid Temperature sensor. +// Lead Acid Temperature sensor. SE98A_Dev gbc_pwr_lead_acid_ts = { .cfg = - { - .dev = { .bus = OC_CONNECT1_I2C1, - .slave_addr = - PWR_LEAD_ACID_BATT_DEV_TEMP_SENS_ADDR }, - .pin_evt = &pin_tempsen_evt1, - }, + { + .dev = { .bus = OC_CONNECT1_I2C1, + .slave_addr = PWR_LEAD_ACID_BATT_DEV_TEMP_SENS_ADDR }, + .pin_evt = &pin_tempsen_evt1, + }, .obj = {}, }; -//Lead acid battery charge controller. +// Lead acid battery charge controller. LTC4015_Dev gbc_pwr_ext_bat_charger = { .cfg = - { - .i2c_dev = - { - .bus = OC_CONNECT1_I2C0, - .slave_addr = - 0x68, /* LTC4015 I2C address in 7-bit format */ - }, - .chem = LTC4015_CHEM_LEAD_ACID, - .r_snsb = PWR_EXT_BATT_RSNSB, - .r_snsi = PWR_EXT_BATT_RSNSI, - .cellcount = 6, - .pin_lt4015_i2c_sel = { &gbc_io_1, 4, - OCGPIO_CFG_OUT_OD_NOPULL }, - .pin_alert = &(OcGpio_Pin){ &ec_io, OC_EC_PWR_LACID_ALERT }, - }, + { + .i2c_dev = + { + .bus = OC_CONNECT1_I2C0, + .slave_addr = + 0x68, /* LTC4015 I2C address in 7-bit format */ + }, + .chem = LTC4015_CHEM_LEAD_ACID, + .r_snsb = PWR_EXT_BATT_RSNSB, + .r_snsi = PWR_EXT_BATT_RSNSI, + .cellcount = 6, + .pin_lt4015_i2c_sel = { &gbc_io_1, 4, OCGPIO_CFG_OUT_OD_NOPULL }, + .pin_alert = &(OcGpio_Pin){ &ec_io, OC_EC_PWR_LACID_ALERT }, + }, .obj = {}, }; -//Lithium ion battery charge controller. +// Lithium ion battery charge controller. LTC4015_Dev gbc_pwr_int_bat_charger = { .cfg = - { - .i2c_dev = - { - .bus = OC_CONNECT1_I2C0, - .slave_addr = - 0x68, /* LTC4015 I2C address in 7-bit format */ - }, - .chem = LTC4015_CHEM_LI_ION, - .r_snsb = PWR_INT_BATT_RSNSB, - .r_snsi = PWR_INT_BATT_RSNSI, - .cellcount = 3, - .pin_lt4015_i2c_sel = { &gbc_io_1, 4, - OCGPIO_CFG_OUT_OD_NOPULL }, - .pin_alert = &(OcGpio_Pin){ &ec_io, OC_EC_PWR_LION_ALERT }, - }, + { + .i2c_dev = + { + .bus = OC_CONNECT1_I2C0, + .slave_addr = + 0x68, /* LTC4015 I2C address in 7-bit format */ + }, + .chem = LTC4015_CHEM_LI_ION, + .r_snsb = PWR_INT_BATT_RSNSB, + .r_snsi = PWR_INT_BATT_RSNSI, + .cellcount = 3, + .pin_lt4015_i2c_sel = { &gbc_io_1, 4, OCGPIO_CFG_OUT_OD_NOPULL }, + .pin_alert = &(OcGpio_Pin){ &ec_io, OC_EC_PWR_LION_ALERT }, + }, .obj = {}, }; -//Power Source Equipment +// Power Source Equipment LTC4274_Dev gbc_pwr_pse = { .cfg = - { - .i2c_dev = - { - .bus = OC_CONNECT1_I2C8, - .slave_addr = - 0x2F, /* LTC4274 I2C address in 7-bit format */ - }, - .pin_evt = &(OcGpio_Pin){ &ec_io, OC_EC_GBC_PSE_ALERT }, - .reset_pin = { &ec_io, OC_EC_PWR_PSE_RESET }, - }, + { + .i2c_dev = + { + .bus = OC_CONNECT1_I2C8, + .slave_addr = + 0x2F, /* LTC4274 I2C address in 7-bit format */ + }, + .pin_evt = &(OcGpio_Pin){ &ec_io, OC_EC_GBC_PSE_ALERT }, + .reset_pin = { &ec_io, OC_EC_PWR_PSE_RESET }, + }, .obj = {}, }; -//Power Device +// Power Device LTC4275_Dev gbc_pwr_pd = { .cfg = - { - .pin_evt = &(OcGpio_Pin){ &ec_io, OC_EC_PD_PWRGD_ALERT }, - .pin_detect = &(OcGpio_Pin){ &ec_io, OC_EC_PWR_PD_NT2P }, + { + .pin_evt = &(OcGpio_Pin){ &ec_io, OC_EC_PD_PWRGD_ALERT }, + .pin_detect = &(OcGpio_Pin){ &ec_io, OC_EC_PWR_PD_NT2P }, - }, + }, .obj = {}, }; -//Power Source +// Power Source PWRSRC_Dev gbc_pwr_powerSource = { /*Added as a place holder for now.*/ .cfg = - { - /* SOLAR_AUX_PRSNT_N */ - .pin_solar_aux_prsnt_n = { &ec_io, - OC_EC_PWR_PRSNT_SOLAR_AUX }, - /* POE_PRSNT_N */ - .pin_poe_prsnt_n = { &ec_io, OC_EC_PWR_PRSNT_POE }, - /* INT_BAT_PRSNT */ - .pin_int_bat_prsnt = { &gbc_io_0, 11 }, - /* EXT_BAT_PRSNT */ - .pin_ext_bat_prsnt = { &gbc_io_0, 12 }, - }, + { + /* SOLAR_AUX_PRSNT_N */ + .pin_solar_aux_prsnt_n = { &ec_io, OC_EC_PWR_PRSNT_SOLAR_AUX }, + /* POE_PRSNT_N */ + .pin_poe_prsnt_n = { &ec_io, OC_EC_PWR_PRSNT_POE }, + /* INT_BAT_PRSNT */ + .pin_int_bat_prsnt = { &gbc_io_0, 11 }, + /* EXT_BAT_PRSNT */ + .pin_ext_bat_prsnt = { &gbc_io_0, 12 }, + }, .obj = {}, }; /* BMS SubSystem Config */ -//EC Power sensor for 12V rail. +// EC Power sensor for 12V rail. INA226_Dev gbc_bms_ec_ps_12v = { /* 12V Power Sensor */ .cfg = - { - .dev = - { - .bus = OC_CONNECT1_I2C6, - .slave_addr = - BMS_EC_CURRENT_SENSOR_12V_ADDR, - }, - .pin_alert = &(OcGpio_Pin){ &ec_io, OC_EC_GBC_INA_ALERT }, - }, + { + .dev = + { + .bus = OC_CONNECT1_I2C6, + .slave_addr = BMS_EC_CURRENT_SENSOR_12V_ADDR, + }, + .pin_alert = &(OcGpio_Pin){ &ec_io, OC_EC_GBC_INA_ALERT }, + }, }; -//EC Power sensor for 3.3V rail. +// EC Power sensor for 3.3V rail. INA226_Dev gbc_bms_ec_ps_3p3v = { /* 3.3V Power Sensor */ .cfg = - { - .dev = - { - .bus = OC_CONNECT1_I2C7, - .slave_addr = - BMS_EC_CURRENT_SENSOR_3P3V_ADDR, - }, - .pin_alert = &(OcGpio_Pin){ &ec_io, OC_EC_GBC_INA_ALERT }, - }, + { + .dev = + { + .bus = OC_CONNECT1_I2C7, + .slave_addr = BMS_EC_CURRENT_SENSOR_3P3V_ADDR, + }, + .pin_alert = &(OcGpio_Pin){ &ec_io, OC_EC_GBC_INA_ALERT }, + }, }; // EC Temperature sensor. SE98A_Dev gbc_bms_ec_ts = { .cfg = - { - .dev = { .bus = OC_CONNECT1_I2C1, - .slave_addr = BMS_EC_TEMP_SENSOR_ADDR }, - .pin_evt = &pin_tempsen_evt2, - }, + { + .dev = { .bus = OC_CONNECT1_I2C1, + .slave_addr = BMS_EC_TEMP_SENSOR_ADDR }, + .pin_evt = &pin_tempsen_evt2, + }, .obj = {}, }; @@ -218,94 +212,92 @@ Eth_Sw_Cfg g_eth_cfg = { .eth_switch = {}, }; -//PORT 0 +// PORT 0 Eth_cfg gbc_eth_port0 = { .eth_sw_cfg = &g_eth_cfg, .eth_sw_port = PORT0, }; -//PORT 1 +// PORT 1 Eth_cfg gbc_eth_port1 = { .eth_sw_cfg = &g_eth_cfg, .eth_sw_port = PORT1, }; -//PORT 2 +// PORT 2 Eth_cfg gbc_eth_port2 = { .eth_sw_cfg = &g_eth_cfg, .eth_sw_port = PORT2, }; -//PORT 3 +// PORT 3 Eth_cfg gbc_eth_port3 = { .eth_sw_cfg = &g_eth_cfg, .eth_sw_port = PORT3, }; -//PORT 4 +// PORT 4 Eth_cfg gbc_eth_port4 = { .eth_sw_cfg = &g_eth_cfg, .eth_sw_port = PORT4, }; /* GPP Subsystem Config*/ -//EC Power sensor for 12V rail. +// EC Power sensor for 12V rail. INA226_Dev gbc_gpp_ap_ps = { .cfg = - { - .dev = - { - .bus = OC_CONNECT1_I2C6, - .slave_addr = GPP_AP_CURRENT_SENSOR_ADDR, - }, - .pin_alert = - &(OcGpio_Pin){ &ec_io, OC_EC_GBC_AP_INA_ALERT }, - }, + { + .dev = + { + .bus = OC_CONNECT1_I2C6, + .slave_addr = GPP_AP_CURRENT_SENSOR_ADDR, + }, + .pin_alert = &(OcGpio_Pin){ &ec_io, OC_EC_GBC_AP_INA_ALERT }, + }, }; // AP Temperature sensor SE98A_Dev gbc_gpp_ap_ts1 = { .cfg = - { - .dev = { .bus = OC_CONNECT1_I2C1, - .slave_addr = GPP_AP_TEMPSENS1_ADDR }, - .pin_evt = &pin_tempsen_evt3, - }, + { + .dev = { .bus = OC_CONNECT1_I2C1, + .slave_addr = GPP_AP_TEMPSENS1_ADDR }, + .pin_evt = &pin_tempsen_evt3, + }, .obj = {}, }; SE98A_Dev gbc_gpp_ap_ts2 = { .cfg = - { - .dev = { .bus = OC_CONNECT1_I2C1, - .slave_addr = GPP_AP_TEMPSENS2_ADDR }, - .pin_evt = &pin_tempsen_evt5, - }, + { + .dev = { .bus = OC_CONNECT1_I2C1, + .slave_addr = GPP_AP_TEMPSENS2_ADDR }, + .pin_evt = &pin_tempsen_evt5, + }, .obj = {}, }; SE98A_Dev gbc_gpp_ap_ts3 = { .cfg = - { - .dev = { .bus = OC_CONNECT1_I2C1, - .slave_addr = GPP_AP_TEMPSENS3_ADDR }, - .pin_evt = &pin_tempsen_evt4, - }, + { + .dev = { .bus = OC_CONNECT1_I2C1, + .slave_addr = GPP_AP_TEMPSENS3_ADDR }, + .pin_evt = &pin_tempsen_evt4, + }, .obj = {}, }; -//mSATA power sensor +// mSATA power sensor INA226_Dev gbc_gpp_msata_ps = { .cfg = - { - .dev = - { - .bus = OC_CONNECT1_I2C6, - .slave_addr = GPP_MSATA_CURRENT_SENSOR_ADDR, - }, - .pin_alert = - &(OcGpio_Pin){ &ec_io, OC_EC_GBC_AP_INA_ALERT }, - }, + { + .dev = + { + .bus = OC_CONNECT1_I2C6, + .slave_addr = GPP_MSATA_CURRENT_SENSOR_ADDR, + }, + .pin_alert = &(OcGpio_Pin){ &ec_io, OC_EC_GBC_AP_INA_ALERT }, + }, }; Gpp_gpioCfg gbc_gpp_gpioCfg = (Gpp_gpioCfg){ @@ -328,7 +320,7 @@ Gpp_gpioCfg gbc_gpp_gpioCfg = (Gpp_gpioCfg){ }; /* Debug Subsystem Config.*/ -//I2C Bus +// I2C Bus S_I2C_Cfg debug_I2C0 = { .bus = OC_CONNECT1_I2C0, }; @@ -418,7 +410,7 @@ S_MDIO_Cfg debug_mdio_global1 = { .port = OC_CONNECT1_GLOBAL1, }; -//Native GPIO +// Native GPIO S_OCGPIO_Cfg debug_ec_gpio_pa = { .port = &ec_io, .group = PA, @@ -504,7 +496,7 @@ S_OCGPIO_Cfg debug_gbc_ioexpanderx71 = { }; /* Factory Configuration for the Devices*/ -//Power Factory Config. +// Power Factory Config. const SE98A_Config fact_bc_se98a = { .lowlimit = -20, .highlimit = 75, @@ -539,7 +531,7 @@ const LTC4274_Config fact_ltc4274_cfg = { .pseHpEnable = LTC4274_HP_ENABLE, }; -//BMS factory config. +// BMS factory config. const SE98A_Config fact_ec_se98a_cfg = { .lowlimit = -20, .highlimit = 75, @@ -554,7 +546,7 @@ const INA226_Config fact_ec_3v_ps_cfg = { .current_lim = 1000, }; -//GPP fact config +// GPP fact config const SE98A_Config fact_ap_se98a_ts1_cfg = { .lowlimit = -20, .highlimit = 75, diff --git a/firmware/ec/platform/oc-sdr/cfg/OC_CONNECT_LED.c b/firmware/ec/platform/oc-sdr/cfg/OC_CONNECT_LED.c index 8ab172b295..96f05ebe63 100644 --- a/firmware/ec/platform/oc-sdr/cfg/OC_CONNECT_LED.c +++ b/firmware/ec/platform/oc-sdr/cfg/OC_CONNECT_LED.c @@ -15,34 +15,34 @@ SCHEMA_IMPORT OcGpio_Port sync_io; /***************************************************************************** * SYSTEM CONFIG *****************************************************************************/ -//LED Temperature sensor +// LED Temperature sensor SE98A_Dev led_hci_ts = { .cfg = - { - .dev = { .bus = OC_CONNECT1_I2C8, - .slave_addr = HCI_LED_TEMP_SENSOR_ADDR }, - .pin_evt = NULL, - }, + { + .dev = { .bus = OC_CONNECT1_I2C8, + .slave_addr = HCI_LED_TEMP_SENSOR_ADDR }, + .pin_evt = NULL, + }, .obj = {}, }; -//LED IO Expander +// LED IO Expander HciLedCfg led_hci_ioexp = { .sx1509_dev[HCI_LED_DRIVER_LEFT] = - { - .bus = OC_CONNECT1_I2C8, - .slave_addr = LED_SX1509_LEFT_ADDRESS, - }, + { + .bus = OC_CONNECT1_I2C8, + .slave_addr = LED_SX1509_LEFT_ADDRESS, + }, .sx1509_dev[HCI_LED_DRIVER_RIGHT] = - { - .bus = OC_CONNECT1_I2C8, - .slave_addr = LED_SX1509_RIGHT_ADDRESS, - }, + { + .bus = OC_CONNECT1_I2C8, + .slave_addr = LED_SX1509_RIGHT_ADDRESS, + }, /* EC_GPIO */ .pin_ec_gpio = { &ec_io, OC_EC_HCI_LED_RESET }, }; -//HCI factory Config +// HCI factory Config const SE98A_Config fact_led_se98a_cfg = { .lowlimit = -20, .highlimit = 75, diff --git a/firmware/ec/platform/oc-sdr/cfg/OC_CONNECT_SDR.c b/firmware/ec/platform/oc-sdr/cfg/OC_CONNECT_SDR.c index 774a74682c..bc9e5b25dc 100644 --- a/firmware/ec/platform/oc-sdr/cfg/OC_CONNECT_SDR.c +++ b/firmware/ec/platform/oc-sdr/cfg/OC_CONNECT_SDR.c @@ -31,37 +31,36 @@ Eeprom_Cfg eeprom_sdr_inv = { // SDR FPGA power sensor. INA226_Dev sdr_fpga_ps = { .cfg = - { - .dev = - { - .bus = OC_CONNECT1_I2C3, - .slave_addr = SDR_FPGA_CURRENT_SENSOR_ADDR, - }, - .pin_alert = &(OcGpio_Pin){ &ec_io, - OC_EC_SDR_FPGA_TEMP_INA_ALERT }, - }, + { + .dev = + { + .bus = OC_CONNECT1_I2C3, + .slave_addr = SDR_FPGA_CURRENT_SENSOR_ADDR, + }, + .pin_alert = &(OcGpio_Pin){ &ec_io, OC_EC_SDR_FPGA_TEMP_INA_ALERT }, + }, }; -//SDR FPGA temperature sensor +// SDR FPGA temperature sensor I2C_Dev sdr_fpga_ts = { .bus = OC_CONNECT1_I2C3, .slave_addr = SDR_FPGA_TEMP_SENSOR_ADDR, }; -//SDR EEPROM +// SDR EEPROM void *sdr_eeprom_inventory = &eeprom_sdr_inv; -//SDR Power sensor +// SDR Power sensor INA226_Dev sdr_ps = { .cfg = - { - .dev = - { - .bus = OC_CONNECT1_I2C6, - .slave_addr = SDR_CURRENT_SENSOR_ADDR, - }, - .pin_alert = &(OcGpio_Pin){ &ec_io, OC_EC_SDR_INA_ALERT }, - }, + { + .dev = + { + .bus = OC_CONNECT1_I2C6, + .slave_addr = SDR_CURRENT_SENSOR_ADDR, + }, + .pin_alert = &(OcGpio_Pin){ &ec_io, OC_EC_SDR_INA_ALERT }, + }, }; // SDR IO EXPANDERS @@ -69,7 +68,7 @@ S_OCGPIO_Cfg debug_sdr_ioexpanderx1E = { .port = &sdr_fx3_io, }; -//SDR Factory config +// SDR Factory config const INA226_Config fact_sdr_3v_ps_cfg = { .current_lim = 3000, }; diff --git a/firmware/ec/platform/oc-sdr/cfg/OC_CONNECT_SYNC.c b/firmware/ec/platform/oc-sdr/cfg/OC_CONNECT_SYNC.c index 4952481223..90d07e3010 100644 --- a/firmware/ec/platform/oc-sdr/cfg/OC_CONNECT_SYNC.c +++ b/firmware/ec/platform/oc-sdr/cfg/OC_CONNECT_SYNC.c @@ -18,7 +18,7 @@ SCHEMA_IMPORT OcGpio_Port sync_io; * SYSTEM CONFIG *****************************************************************************/ /* OBC Subsystem Config.*/ -//Irridium +// Irridium Iridium_Cfg obc_irridium = { .uart = OC_CONNECT1_UARTXR0, /* IRIDIUM_RSTIOEXP */ @@ -28,7 +28,7 @@ Iridium_Cfg obc_irridium = { }; /* Sync Subsystem Config.*/ -//Temperature sensor. +// Temperature sensor. I2C_Dev sync_gps_ts = { .bus = OC_CONNECT1_I2C7, .slave_addr = SYNC_TEMP_SENSOR_ADDR, @@ -44,7 +44,7 @@ S_OCGPIO_Cfg debug_sync_ioexpanderx71 = { .port = &sync_io, }; -//Sync Factory config +// Sync Factory config const ADT7481_Config fact_sync_ts_cfg = { .lowlimit = -20, .highlimit = 80, diff --git a/firmware/ec/platform/oc-sdr/schema/schema.c b/firmware/ec/platform/oc-sdr/schema/schema.c index 9d853ac1e0..4b50ae7398 100644 --- a/firmware/ec/platform/oc-sdr/schema/schema.c +++ b/firmware/ec/platform/oc-sdr/schema/schema.c @@ -197,7 +197,7 @@ SCHEMA_IMPORT const DriverStruct fact_ch1_band_cfg; SCHEMA_IMPORT const DriverStruct fact_ch2_band_cfg; SCHEMA_IMPORT const DriverStruct fact_sync_ts_cfg; -//Function Type +// Function Type SCHEMA_IMPORT bool gpp_pre_init(void *driver, void *returnValue); SCHEMA_IMPORT bool gpp_post_init(void *driver, void *returnValue); SCHEMA_IMPORT bool GPP_ap_Reset(void *driver, void *params); @@ -229,1023 +229,893 @@ SCHEMA_IMPORT bool SYS_post_enable(void **postActivate); const Component sys_schema[] = { { - .name = "system", - .components = - (Component[]){ + .name = "system", + .components = + (Component[]){ + { + .name = "comp_all", + .driver = &SYSTEMDRV, + .driver_cfg = + &gbc_gpp_gpioCfg, /* For reset pin, will revise */ + .components = + (Component[]){ { + .name = "eeprom_sid", + .driver = &CAT24C04_gbc_sid, + .driver_cfg = &eeprom_gbc_sid, + }, + { + .name = "eeprom_inv", + .driver = &CAT24C04_gbc_inv, + .driver_cfg = &eeprom_gbc_inv, + }, + { + .name = "eeprom_mac", + .driver = &Driver_MAC, + }, + {} }, + .commands = (Command[]){ { + .name = "reset", + .cb_cmd = SYS_cmdReset, + }, + { + .name = "echo", + .cb_cmd = SYS_cmdEcho, + }, + {} }, + }, + {} }, + }, + { + .name = "power", + .components = + (Component[]){ + { + .name = "comp_all", + .components = + (Component[]){ { + .name = "powerSource", + .driver = &PWRSRC, + .driver_cfg = &gbc_pwr_powerSource, + .postDisabled = POST_DISABLED, + }, + {} }, + }, + { .name = "leadacid_sensor", + .components = + (Component[]){ + { + .name = "temp_sensor1", + .driver = &SE98A, + .driver_cfg = &gbc_pwr_lead_acid_ts, + .factory_config = &fact_bc_se98a, + }, + {} } }, + { .name = "leadacid", + .components = + (Component[]){ + { + .name = "battery", + .driver = <C4015, + .driver_cfg = &gbc_pwr_ext_bat_charger, + .factory_config = &fact_leadAcid_cfg, + }, + {} } }, + { .name = "lion", + .components = + (Component[]){ + { + .name = "battery", + .driver = <C4015, + .driver_cfg = &gbc_pwr_int_bat_charger, + .factory_config = &fact_lithiumIon_cfg, + }, + {} } }, + { + .name = "pse", + .driver = <C4274, + .driver_cfg = &gbc_pwr_pse, + .factory_config = &fact_ltc4274_cfg, + }, + { + .name = "pd", + .driver = <C4275, + .driver_cfg = &gbc_pwr_pd, + }, + {} }, + }, + { + .name = "bms", + .components = + (Component[]){ + { + .name = "comp_all", + .postDisabled = POST_DISABLED, + }, + { .name = "ec", + .components = + (Component[]){ + { + .name = "temp_sensor1", + .driver = &SE98A, + .driver_cfg = &gbc_bms_ec_ts, + .factory_config = &fact_ec_se98a_cfg, + }, + { + .name = "current_sensor1", + .driver = &INA226, + .driver_cfg = &gbc_bms_ec_ps_12v, + .factory_config = &fact_ec_12v_ps_cfg, + }, + { + .name = "current_sensor2", + .driver = &INA226, + .driver_cfg = &gbc_bms_ec_ps_3p3v, + .factory_config = &fact_ec_3v_ps_cfg, + }, + {} } }, + {} }, + }, + { + .name = "hci", + .ssHookSet = + &(SSHookSet){ + .preInitFxn = (ssHook_Cb)HCI_Init, + .postInitFxn = NULL, + }, + .components = + (Component[]){ + { + .name = "comp_all", + .postDisabled = POST_DISABLED, + }, + { + .name = "led", + .components = + (Component[]){ { - .name = "comp_all", - .driver = &SYSTEMDRV, - .driver_cfg = - &gbc_gpp_gpioCfg, /* For reset pin, will revise */ - .components = - (Component[]){ - { - .name = "eeprom_sid", - .driver = - &CAT24C04_gbc_sid, - .driver_cfg = - &eeprom_gbc_sid, - }, - { - .name = "eeprom_inv", - .driver = - &CAT24C04_gbc_inv, - .driver_cfg = - &eeprom_gbc_inv, - }, - { - .name = "eeprom_mac", - .driver = - &Driver_MAC, - }, - {} }, - .commands = - (Command[]){ - { - .name = "reset", - .cb_cmd = - SYS_cmdReset, - }, - { - .name = "echo", - .cb_cmd = - SYS_cmdEcho, - }, - {} }, + .name = "temp_sensor1", + .driver = &SE98A, + .driver_cfg = &led_hci_ts, + .factory_config = &fact_led_se98a_cfg, + .postDisabled = POST_DISABLED, + }, + { + .name = "fw", + .driver = &HCI_LED, + .driver_cfg = &led_hci_ioexp, }, {} }, + }, + { + /* TODO: Remove buzzer component if there is no OCMP message + * required */ + .name = "buzzer", + .driver_cfg = &gbc_hci_buzzer, + .postDisabled = POST_DISABLED, + }, + {} }, }, { - .name = "power", - .components = - (Component[]){ - { - .name = "comp_all", - .components = - (Component[]){ - { - .name = "powerSource", - .driver = &PWRSRC, - .driver_cfg = - &gbc_pwr_powerSource, - .postDisabled = - POST_DISABLED, - }, - {} }, - }, - { .name = "leadacid_sensor", - .components = - (Component[]){ - { - .name = "temp_sensor1", - .driver = &SE98A, - .driver_cfg = - &gbc_pwr_lead_acid_ts, - .factory_config = - &fact_bc_se98a, - }, - {} } }, - { .name = "leadacid", - .components = - (Component[]){ - { - .name = "battery", - .driver = <C4015, - .driver_cfg = - &gbc_pwr_ext_bat_charger, - .factory_config = - &fact_leadAcid_cfg, - }, - {} } }, - { .name = "lion", - .components = - (Component[]){ - { - .name = "battery", - .driver = <C4015, - .driver_cfg = - &gbc_pwr_int_bat_charger, - .factory_config = - &fact_lithiumIon_cfg, - }, - {} } }, - { - .name = "pse", - .driver = <C4274, - .driver_cfg = &gbc_pwr_pse, - .factory_config = &fact_ltc4274_cfg, - }, - { - .name = "pd", - .driver = <C4275, - .driver_cfg = &gbc_pwr_pd, - }, - {} }, + .name = "ethernet", + .components = (Component[]){ { + .name = "comp_all", + .postDisabled = POST_DISABLED, + }, + { + .name = "port0", + .driver = Ð_SW, + .driver_cfg = &gbc_eth_port0, + }, + { + .name = "port1", + .driver = Ð_SW, + .driver_cfg = &gbc_eth_port1, + }, + { + .name = "port2", + .driver = Ð_SW, + .driver_cfg = &gbc_eth_port2, + }, + { + .name = "port3", + .driver = Ð_SW, + .driver_cfg = &gbc_eth_port3, + }, + { + .name = "port4", + .driver = Ð_SW, + .driver_cfg = &gbc_eth_port4, + }, + {} }, }, { - .name = "bms", - .components = - (Component[]){ - { - .name = "comp_all", - .postDisabled = POST_DISABLED, - }, - { .name = "ec", - .components = - (Component[]){ - { - .name = "temp_sensor1", - .driver = &SE98A, - .driver_cfg = - &gbc_bms_ec_ts, - .factory_config = - &fact_ec_se98a_cfg, - }, - { - .name = "current_sensor1", - .driver = &INA226, - .driver_cfg = - &gbc_bms_ec_ps_12v, - .factory_config = - &fact_ec_12v_ps_cfg, - }, - { - .name = "current_sensor2", - .driver = &INA226, - .driver_cfg = - &gbc_bms_ec_ps_3p3v, - .factory_config = - &fact_ec_3v_ps_cfg, - }, - {} } }, - {} }, + .name = "obc", + .ssHookSet = + &(SSHookSet){ + .preInitFxn = (ssHook_Cb)obc_pre_init, + .postInitFxn = NULL, + }, + .driver_cfg = &sync_obc_gpiocfg, + .components = (Component[]){ { + .name = "comp_all", + .postDisabled = POST_DISABLED, + }, + { + .name = "iridium", + .driver = &OBC_Iridium, + .driver_cfg = &obc_irridium, + }, + {} }, }, { - .name = "hci", - .ssHookSet = - &(SSHookSet){ - .preInitFxn = (ssHook_Cb)HCI_Init, - .postInitFxn = NULL, - }, - .components = - (Component[]){ - { - .name = "comp_all", - .postDisabled = POST_DISABLED, - }, - { - .name = "led", - .components = - (Component[]){ - { - .name = "temp_sensor1", - .driver = &SE98A, - .driver_cfg = - &led_hci_ts, - .factory_config = - &fact_led_se98a_cfg, - .postDisabled = - POST_DISABLED, - }, - { - .name = "fw", - .driver = &HCI_LED, - .driver_cfg = - &led_hci_ioexp, - }, - {} }, - }, - { - /* TODO: Remove buzzer component if there is no OCMP message - * required */ - .name = "buzzer", - .driver_cfg = &gbc_hci_buzzer, - .postDisabled = POST_DISABLED, - }, - {} }, - }, - { - .name = "ethernet", - .components = (Component[]){ { - .name = "comp_all", - .postDisabled = POST_DISABLED, - }, - { - .name = "port0", - .driver = Ð_SW, - .driver_cfg = &gbc_eth_port0, - }, - { - .name = "port1", - .driver = Ð_SW, - .driver_cfg = &gbc_eth_port1, - }, - { - .name = "port2", - .driver = Ð_SW, - .driver_cfg = &gbc_eth_port2, - }, - { - .name = "port3", - .driver = Ð_SW, - .driver_cfg = &gbc_eth_port3, - }, - { - .name = "port4", - .driver = Ð_SW, - .driver_cfg = &gbc_eth_port4, - }, - {} }, - }, - { - .name = "obc", - .ssHookSet = - &(SSHookSet){ - .preInitFxn = (ssHook_Cb)obc_pre_init, - .postInitFxn = NULL, - }, - .driver_cfg = &sync_obc_gpiocfg, - .components = (Component[]){ { - .name = "comp_all", - .postDisabled = POST_DISABLED, - }, - { - .name = "iridium", - .driver = &OBC_Iridium, - .driver_cfg = &obc_irridium, - }, - {} }, - }, - { - .name = "gpp", - .components = - (Component[]){ - { - .name = "comp_all", - .postDisabled = POST_DISABLED, - }, + .name = "gpp", + .components = + (Component[]){ + { + .name = "comp_all", + .postDisabled = POST_DISABLED, + }, + { + .name = "ap", + .components = + (Component[]){ { - .name = "ap", - .components = - (Component[]){ - { - .name = "temp_sensor1", - .driver = &SE98A, - .driver_cfg = - &gbc_gpp_ap_ts1, - .factory_config = - &fact_ap_se98a_ts1_cfg, - }, - { - .name = "temp_sensor2", - .driver = &SE98A, - .driver_cfg = - &gbc_gpp_ap_ts2, - .factory_config = - &fact_ap_se98a_ts2_cfg, - }, - { - .name = "temp_sensor3", - .driver = &SE98A, - .driver_cfg = - &gbc_gpp_ap_ts3, - .factory_config = - &fact_ap_se98a_ts3_cfg, - }, - { - .name = "current_sensor1", - .driver = &INA226, - .driver_cfg = - &gbc_gpp_ap_ps, - .factory_config = - &fact_ap_3v_ps_cfg, - }, - {} }, - .driver_cfg = &gbc_gpp_gpioCfg, - .commands = - (Command[]){ - { - .name = "reset", - .cb_cmd = - GPP_ap_Reset, - }, - {} }, + .name = "temp_sensor1", + .driver = &SE98A, + .driver_cfg = &gbc_gpp_ap_ts1, + .factory_config = &fact_ap_se98a_ts1_cfg, + }, + { + .name = "temp_sensor2", + .driver = &SE98A, + .driver_cfg = &gbc_gpp_ap_ts2, + .factory_config = &fact_ap_se98a_ts2_cfg, + }, + { + .name = "temp_sensor3", + .driver = &SE98A, + .driver_cfg = &gbc_gpp_ap_ts3, + .factory_config = &fact_ap_se98a_ts3_cfg, + }, + { + .name = "current_sensor1", + .driver = &INA226, + .driver_cfg = &gbc_gpp_ap_ps, + .factory_config = &fact_ap_3v_ps_cfg, }, - { .name = "msata", - .components = - (Component[]){ - { - .name = "current_sensor1", - .driver = &INA226, - .driver_cfg = - &gbc_gpp_msata_ps, - .factory_config = - &fact_msata_3v_ps_cfg, - }, - {} } }, {} }, - .driver_cfg = &gbc_gpp_gpioCfg, - .ssHookSet = - &(SSHookSet){ - .preInitFxn = (ssHook_Cb)gpp_pre_init, - .postInitFxn = (ssHook_Cb)gpp_post_init, - }, + .driver_cfg = &gbc_gpp_gpioCfg, + .commands = (Command[]){ { + .name = "reset", + .cb_cmd = GPP_ap_Reset, + }, + {} }, + }, + { .name = "msata", + .components = + (Component[]){ + { + .name = "current_sensor1", + .driver = &INA226, + .driver_cfg = &gbc_gpp_msata_ps, + .factory_config = &fact_msata_3v_ps_cfg, + }, + {} } }, + {} }, + .driver_cfg = &gbc_gpp_gpioCfg, + .ssHookSet = + &(SSHookSet){ + .preInitFxn = (ssHook_Cb)gpp_pre_init, + .postInitFxn = (ssHook_Cb)gpp_post_init, + }, }, { - .name = "sdr", - .components = - (Component[]){ + .name = "sdr", + .components = + (Component[]){ + { + .name = "comp_all", + .components = + (Component[]){ { - .name = "comp_all", - .components = - (Component[]){ - { - .name = "current_sensor1", - .driver = &INA226, - .driver_cfg = - &sdr_ps, - .factory_config = - &fact_sdr_3v_ps_cfg, - }, - { - /* TODO: this is pretty hw-specific, I think we can - * dedupe for the other boards, but I don't think - * a framework level driver is appropriate (although, - * a proper OC-DB driver might have us revisit this) */ - /* TODO: "eeprom" makes the CLI command pretty verbose, - * maybe see about a way of making this better: - * sdr.comp_all.eeprom.dev_id is kind of long */ - .name = "eeprom", - .driver_cfg = - &eeprom_sdr_inv, - .driver = &CAT24C04_sdr_inv, - }, - {} }, - .driver_cfg = &sdr_gpioCfg, - .commands = - (Command[]){ - { - .name = "reset", - .cb_cmd = SDR_reset, - }, - {} }, + .name = "current_sensor1", + .driver = &INA226, + .driver_cfg = &sdr_ps, + .factory_config = &fact_sdr_3v_ps_cfg, }, - { .name = "fpga", - .components = - (Component[]){ - { - .name = "temp_sensor1", - .driver = &ADT7481, - .driver_cfg = - &sdr_fpga_ts, - .factory_config = - &fact_sdr_fpga_adt7481_cfg, - }, - { - .name = "current_sensor1", - .driver = &INA226, - .driver_cfg = - &sdr_fpga_ps, - .factory_config = - &fact_sdr_fpga_ps_cfg, - }, - {} } }, { - .name = "fx3", - .driver_cfg = &sdr_gpioCfg, - .commands = - (Command[]){ - { - .name = "reset", - .cb_cmd = - SDR_fx3Reset, - }, - {} }, - .postDisabled = POST_DISABLED, + /* TODO: this is pretty hw-specific, I think we + * can dedupe for the other boards, but I don't + * think a framework level driver is appropriate + * (although, a proper OC-DB driver might have + * us revisit this) */ + /* TODO: "eeprom" makes the CLI command pretty + * verbose, maybe see about a way of making this + * better: + * sdr.comp_all.eeprom.dev_id is kind of long */ + .name = "eeprom", + .driver_cfg = &eeprom_sdr_inv, + .driver = &CAT24C04_sdr_inv, }, {} }, - .driver_cfg = &sdr_gpioCfg, - .ssHookSet = - &(SSHookSet){ - .preInitFxn = (ssHook_Cb)SDR_Init, - .postInitFxn = NULL, - }, + .driver_cfg = &sdr_gpioCfg, + .commands = (Command[]){ { + .name = "reset", + .cb_cmd = SDR_reset, + }, + {} }, + }, + { .name = "fpga", + .components = + (Component[]){ + { + .name = "temp_sensor1", + .driver = &ADT7481, + .driver_cfg = &sdr_fpga_ts, + .factory_config = &fact_sdr_fpga_adt7481_cfg, + }, + { + .name = "current_sensor1", + .driver = &INA226, + .driver_cfg = &sdr_fpga_ps, + .factory_config = &fact_sdr_fpga_ps_cfg, + }, + {} } }, + { + .name = "fx3", + .driver_cfg = &sdr_gpioCfg, + .commands = (Command[]){ { + .name = "reset", + .cb_cmd = SDR_fx3Reset, + }, + {} }, + .postDisabled = POST_DISABLED, + }, + {} }, + .driver_cfg = &sdr_gpioCfg, + .ssHookSet = + &(SSHookSet){ + .preInitFxn = (ssHook_Cb)SDR_Init, + .postInitFxn = NULL, + }, }, { - .name = "rffe", - .driver_cfg = &fe_rffecfg, - .components = - (Component[]){ + .name = "rffe", + .driver_cfg = &fe_rffecfg, + .components = + (Component[]){ + { + .name = "comp_all", + .components = (Component[]){ { + .name = "eeprom", + .driver = &CAT24C04_fe_inv, + .driver_cfg = + &eeprom_fe_inv, + }, + {} }, + .driver_cfg = &sdr_gpioCfg, + .commands = (Command[]){ { + .name = "reset", + .cb_cmd = RFFE_reset, + }, + {} }, + }, + { .name = "ch1_sensor", + .components = + (Component[]){ + { + .name = "temp_sensor1", + .driver = &ADT7481, + .driver_cfg = &fe_ch1_ts, + .factory_config = &fact_fe_ch1_adt7481_cfg, + }, + { + .name = "current_sensor1", + .driver = &INA226, + .driver_cfg = &fe_ch1_ps_5_7v, + .factory_config = &fact_fe_ch1_ps_cfg, + }, + {} } }, + { .name = "ch2_sensor", + .components = + (Component[]){ + { + .name = "temp_sensor1", + .driver = &ADT7481, + .driver_cfg = &fe_ch2_ts, + .factory_config = &fact_fe_ch2_adt7481_cfg, + }, + { + .name = "current_sensor1", + .driver = &INA226, + .driver_cfg = &fe_ch2_ps_5_7v, + .factory_config = &fact_fe_ch2_ps_cfg, + }, + {} } }, + { + .name = "ch1_fe", + .driver_cfg = &fe_ch1_pwrcfg, /* For en/dis context */ + .components = + (Component[]){ { - .name = "comp_all", - .components = - (Component[]){ - { - .name = "eeprom", - .driver = - &CAT24C04_fe_inv, - .driver_cfg = - &eeprom_fe_inv, - }, - {} }, - .driver_cfg = &sdr_gpioCfg, - .commands = - (Command[]){ - { - .name = "reset", - .cb_cmd = - RFFE_reset, - }, - {} }, - }, - { .name = "ch1_sensor", - .components = - (Component[]){ - { - .name = "temp_sensor1", - .driver = &ADT7481, - .driver_cfg = &fe_ch1_ts, - .factory_config = - &fact_fe_ch1_adt7481_cfg, - }, - { - .name = "current_sensor1", - .driver = &INA226, - .driver_cfg = - &fe_ch1_ps_5_7v, - .factory_config = - &fact_fe_ch1_ps_cfg, - }, - {} } }, - { .name = "ch2_sensor", - .components = - (Component[]){ - { - .name = "temp_sensor1", - .driver = &ADT7481, - .driver_cfg = &fe_ch2_ts, - .factory_config = - &fact_fe_ch2_adt7481_cfg, - }, - { - .name = "current_sensor1", - .driver = &INA226, - .driver_cfg = - &fe_ch2_ps_5_7v, - .factory_config = - &fact_fe_ch2_ps_cfg, - }, - {} } }, - { - .name = "ch1_fe", - .driver_cfg = - &fe_ch1_pwrcfg, /* For en/dis context */ - .components = - (Component[]){ - { - .name = "ch1_band", - /* Placeholder driver to let us test the DAT driver */ - .driver = &FE_Param, - .driver_cfg = - &fe_ch1_bandcfg, - .factory_config = - &fact_ch1_band_cfg, - }, - { - .name = "watchdog", - .driver = - &RFFEWatchdog, - .driver_cfg = - &fe_ch1_watchdog, - }, - { - .name = "power", - .driver = - &RFPowerMonitor, - .driver_cfg = - &fe_ch1_ads7830, - }, - { - .name = "tx", - .driver = - &DATXXR5APP, - /* this struct should be compatible with the DAT cfg struct */ - .driver_cfg = - &fe_ch1_gain, - .factory_config = - &fact_ch1_tx_gain_cfg, - }, - { - .name = "rx", - .driver = - &DATXXR5APP, - /* this struct should be compatible with the DAT cfg struct */ - .driver_cfg = - &fe_ch1_lna, - .factory_config = - &fact_ch1_rx_gain_cfg, - }, - {} }, - .commands = - (Command[]){ - { - .name = "enable", - .cb_cmd = - RFFE_enablePA, - }, - { - .name = "disable", - .cb_cmd = RFFE_disablePA, - }, - {} }, + .name = "ch1_band", + /* Placeholder driver to let us test the DAT + driver */ + .driver = &FE_Param, + .driver_cfg = &fe_ch1_bandcfg, + .factory_config = &fact_ch1_band_cfg, }, { - .name = "ch2_fe", - .driver_cfg = - &fe_ch2_pwrcfg, /* For en/dis context */ - .components = - (Component[]){ - { - .name = "ch2_band", - /* Placeholder driver to let us test the DAT driver */ - .driver = &FE_Param, - .driver_cfg = - &fe_ch2_bandcfg, - .factory_config = - &fact_ch2_band_cfg, - }, - { - .name = "watchdog", - .driver = &RFFEWatchdog, - .driver_cfg = - &fe_ch2_watchdog, - }, - { - .name = "power", - .driver = &RFPowerMonitor, - .driver_cfg = - &fe_ch2_ads7830, - }, - { - .name = "tx", - .driver = &DATXXR5APP, - /* this struct should be compatible with the DAT cfg struct */ - .driver_cfg = - &fe_ch2_gain, - .factory_config = - &fact_ch2_tx_gain_cfg, - }, - { - .name = "rx", - .driver = &DATXXR5APP, - /* this struct should be compatible with the DAT cfg struct */ - .driver_cfg = - &fe_ch2_lna, - .factory_config = - &fact_ch2_rx_gain_cfg, - }, - {} }, - .commands = - (Command[]){ { - .name = "enable", - .cb_cmd = - RFFE_enablePA, - }, - { - .name = "disable", - .cb_cmd = - RFFE_disablePA, - }, - {} }, + .name = "watchdog", + .driver = &RFFEWatchdog, + .driver_cfg = &fe_ch1_watchdog, + }, + { + .name = "power", + .driver = &RFPowerMonitor, + .driver_cfg = &fe_ch1_ads7830, + }, + { + .name = "tx", + .driver = &DATXXR5APP, + /* this struct should be compatible with the DAT + cfg struct */ + .driver_cfg = &fe_ch1_gain, + .factory_config = &fact_ch1_tx_gain_cfg, + }, + { + .name = "rx", + .driver = &DATXXR5APP, + /* this struct should be compatible with the DAT + cfg struct */ + .driver_cfg = &fe_ch1_lna, + .factory_config = &fact_ch1_rx_gain_cfg, }, {} }, - .driver_cfg = &fe_rffecfg, - .ssHookSet = - &(SSHookSet){ - .preInitFxn = (ssHook_Cb)rffe_pre_init, - .postInitFxn = (ssHook_Cb)rffe_post_init, - }, + .commands = (Command[]){ { + .name = "enable", + .cb_cmd = RFFE_enablePA, + }, + { + .name = "disable", + .cb_cmd = RFFE_disablePA, + }, + {} }, + }, + { + .name = "ch2_fe", + .driver_cfg = &fe_ch2_pwrcfg, /* For en/dis context */ + .components = + (Component[]){ + { + .name = "ch2_band", + /* Placeholder driver to let us test the DAT + driver */ + .driver = &FE_Param, + .driver_cfg = &fe_ch2_bandcfg, + .factory_config = &fact_ch2_band_cfg, + }, + { + .name = "watchdog", + .driver = &RFFEWatchdog, + .driver_cfg = &fe_ch2_watchdog, + }, + { + .name = "power", + .driver = &RFPowerMonitor, + .driver_cfg = &fe_ch2_ads7830, + }, + { + .name = "tx", + .driver = &DATXXR5APP, + /* this struct should be compatible with the DAT + cfg struct */ + .driver_cfg = &fe_ch2_gain, + .factory_config = &fact_ch2_tx_gain_cfg, + }, + { + .name = "rx", + .driver = &DATXXR5APP, + /* this struct should be compatible with the DAT + cfg struct */ + .driver_cfg = &fe_ch2_lna, + .factory_config = &fact_ch2_rx_gain_cfg, + }, + {} }, + .commands = (Command[]){ { + .name = "enable", + .cb_cmd = RFFE_enablePA, + }, + { + .name = "disable", + .cb_cmd = RFFE_disablePA, + }, + {} }, + }, + {} }, + .driver_cfg = &fe_rffecfg, + .ssHookSet = + &(SSHookSet){ + .preInitFxn = (ssHook_Cb)rffe_pre_init, + .postInitFxn = (ssHook_Cb)rffe_post_init, + }, }, { .name = "sync", .driver_cfg = &sync_gpiocfg, .ssHookSet = - &(SSHookSet){ - .preInitFxn = (ssHook_Cb)SYNC_Init, - .postInitFxn = NULL, - }, + &(SSHookSet){ + .preInitFxn = (ssHook_Cb)SYNC_Init, + .postInitFxn = NULL, + }, .components = - (Component[]){ - { - .name = "comp_all", - .driver_cfg = &sync_gpiocfg, - .commands = - (Command[]){ - { - .name = "reset", - .cb_cmd = SYNC_reset, + (Component[]){ { + .name = "comp_all", + .driver_cfg = &sync_gpiocfg, + .commands = (Command[]){ { + .name = "reset", + .cb_cmd = SYNC_reset, + }, + {} }, + .postDisabled = POST_DISABLED, + }, + { + .name = "gps", + .driver_cfg = &sync_gpiocfg, + .driver = &Sync_IO, + }, + { .name = "sensor", + .components = + (Component[]){ { + .name = "temp_sensor1", + .driver = &ADT7481, + .driver_cfg = &sync_gps_ts, + .factory_config = + &fact_sync_ts_cfg, }, - {} }, - .postDisabled = POST_DISABLED, - }, - { - .name = "gps", - .driver_cfg = &sync_gpiocfg, - .driver = &Sync_IO, - }, - { .name = "sensor", - .components = - (Component[]){ - { - .name = "temp_sensor1", - .driver = &ADT7481, - .driver_cfg = &sync_gps_ts, - .factory_config = - &fact_sync_ts_cfg, - }, - {} } }, - {} } }, + {} } }, + {} } }, { .name = "testmodule", .components = - (Component[]){ - { - .name = "comp_all", - .commands = - (Command[]){ - { - .name = "reset", - .cb_cmd = - TestMod_cmdReset, + (Component[]){ { + .name = "comp_all", + .commands = + (Command[]){ { + .name = "reset", + .cb_cmd = TestMod_cmdReset, }, {} }, - .postDisabled = POST_DISABLED, - }, - { - .name = "2gsim", - .driver = &Testmod_G510, - .driver_cfg = &testModuleCfg, - }, - {} } }, + .postDisabled = POST_DISABLED, + }, + { + .name = "2gsim", + .driver = &Testmod_G510, + .driver_cfg = &testModuleCfg, + }, + {} } }, { - .name = "debug", - .components = - (Component[]){ - { - .name = "comp_all", - .postDisabled = POST_DISABLED, - }, - { - .name = "I2C", - .components = - (Component[]){ - { .name = "comp_all", - .postDisabled = POST_DISABLED }, - { .name = "bus0", - .driver = &OC_I2C, - .driver_cfg = &debug_I2C0, - .postDisabled = POST_DISABLED }, - { .name = "bus1", - .driver = &OC_I2C, - .driver_cfg = &debug_I2C1, - .postDisabled = POST_DISABLED }, - { .name = "bus2", - .driver = &OC_I2C, - .driver_cfg = &debug_I2C2, - .postDisabled = POST_DISABLED }, - { .name = "bus3", - .driver = &OC_I2C, - .driver_cfg = &debug_I2C3, - .postDisabled = POST_DISABLED }, - { .name = "bus4", - .driver = &OC_I2C, - .driver_cfg = &debug_I2C4, - .postDisabled = POST_DISABLED }, - { .name = "bus6", - .driver = &OC_I2C, - .driver_cfg = &debug_I2C6, - .postDisabled = POST_DISABLED }, - { .name = "bus7", - .driver = &OC_I2C, - .driver_cfg = &debug_I2C7, - .postDisabled = POST_DISABLED }, - { .name = "bus8", - .driver = &OC_I2C, - .driver_cfg = &debug_I2C8, - .postDisabled = POST_DISABLED }, - {} }, - }, - { - .name = "ec", - .components = - (Component[]){ - { - .name = "comp_all", - .postDisabled = POST_DISABLED, - }, - { - .name = "PA", - .driver = &OC_GPIO, - .driver_cfg = - &debug_ec_gpio_pa, - .postDisabled = POST_DISABLED, - }, - { - .name = "PB", - .driver = &OC_GPIO, - .driver_cfg = - &debug_ec_gpio_pb, - .postDisabled = POST_DISABLED, - }, - { - .name = "PC", - .driver = &OC_GPIO, - .driver_cfg = - &debug_ec_gpio_pc, - .postDisabled = POST_DISABLED, - }, - { - .name = "PD", - .driver = &OC_GPIO, - .driver_cfg = - &debug_ec_gpio_pd, - .postDisabled = POST_DISABLED, - }, - { - .name = "PE", - .driver = &OC_GPIO, - .driver_cfg = - &debug_ec_gpio_pe, - .postDisabled = POST_DISABLED, - }, - { - .name = "PF", - .driver = &OC_GPIO, - .driver_cfg = - &debug_ec_gpio_pf, - .postDisabled = POST_DISABLED, - }, - { - .name = "PG", - .driver = &OC_GPIO, - .driver_cfg = - &debug_ec_gpio_pg, - .postDisabled = POST_DISABLED, - }, - { - .name = "PH", - .driver = &OC_GPIO, - .driver_cfg = - &debug_ec_gpio_ph, - .postDisabled = POST_DISABLED, - }, - { - .name = "PJ", - .driver = &OC_GPIO, - .driver_cfg = - &debug_ec_gpio_pj, - .postDisabled = POST_DISABLED, - }, - { - .name = "PK", - .driver = &OC_GPIO, - .driver_cfg = - &debug_ec_gpio_pk, - .postDisabled = POST_DISABLED, - }, - { - .name = "PL", - .driver = &OC_GPIO, - .driver_cfg = - &debug_ec_gpio_pl, - .postDisabled = POST_DISABLED, - }, - { - .name = "PM", - .driver = &OC_GPIO, - .driver_cfg = - &debug_ec_gpio_pm, - .postDisabled = POST_DISABLED, - }, - { - .name = "PN", - .driver = &OC_GPIO, - .driver_cfg = - &debug_ec_gpio_pn, - .postDisabled = POST_DISABLED, - }, - { - .name = "PP", - .driver = &OC_GPIO, - .driver_cfg = - &debug_ec_gpio_pn, - .postDisabled = POST_DISABLED, - }, - { - .name = "PQ", - .driver = &OC_GPIO, - .driver_cfg = - &debug_ec_gpio_pq, - .postDisabled = POST_DISABLED, - }, - {} }, - }, - { - .name = "gbc", - .components = - (Component[]){ - { - .name = "comp_all", - .postDisabled = POST_DISABLED, - }, - { - .name = "ioexpanderx70", - .driver = &OC_GPIO, - .driver_cfg = - &debug_gbc_ioexpanderx70, - }, - { - .name = "ioexpanderx71", - .driver = &OC_GPIO, - .driver_cfg = - &debug_gbc_ioexpanderx71, - }, - {} }, - }, - { .name = "sdr", - .components = - (Component[]){ - { - .name = "comp_all", - .postDisabled = POST_DISABLED, - }, - { - .name = "ioexpanderx1E", - .driver = &OC_GPIO, - .driver_cfg = - &debug_sdr_ioexpanderx1E, - }, - {} } }, - { .name = "fe", - .components = - (Component[]){ - { - .name = "comp_all", - .postDisabled = POST_DISABLED, - }, - { - .name = "ioexpanderx18", - .driver = &OC_GPIO, - .driver_cfg = - &debug_sdr_ioexpanderx1E, - }, - { - .name = "ioexpanderx1C", - .driver = &OC_GPIO, - .driver_cfg = - &debug_fe_ioexpanderx1C, - }, - { - .name = "ioexpanderx1B", - .driver = &OC_GPIO, - .driver_cfg = - &debug_fe_ioexpanderx1B, - }, - { - .name = "ioexpanderx1A", - .driver = &OC_GPIO, - .driver_cfg = - &debug_fe_ioexpanderx1A, - }, - { - .name = "ioexpanderx1D", - .driver = &OC_GPIO, - .driver_cfg = - &debug_fe_ioexpanderx1D, - }, - {} - - } }, - { .name = "sync", - .components = - (Component[]){ - { - .name = "comp_all", - .postDisabled = POST_DISABLED, - }, - { - .name = "ioexpanderx71", - .driver = &OC_GPIO, - .driver_cfg = - &debug_sync_ioexpanderx71, - }, - {} } }, - { .name = "ethernet", - .components = - (Component[]){ - { - .name = "comp_all", - .postDisabled = POST_DISABLED, - }, - { - .name = "port0", - .driver = &OC_MDIO, - .driver_cfg = - &debug_mdio_phyport0, - .postDisabled = POST_DISABLED, - }, - { - .name = "port1", - .driver = &OC_MDIO, - .driver_cfg = - &debug_mdio_phyport1, - .postDisabled = POST_DISABLED, - }, - { - .name = "port2", - .driver = &OC_MDIO, - .driver_cfg = - &debug_mdio_phyport2, - .postDisabled = POST_DISABLED, - }, - { - .name = "port3", - .driver = &OC_MDIO, - .driver_cfg = - &debug_mdio_phyport3, - .postDisabled = POST_DISABLED, - }, - { - .name = "port4", - .driver = &OC_MDIO, - .driver_cfg = - &debug_mdio_phyport4, - .postDisabled = POST_DISABLED, - }, - { - .name = "global1", - .driver = &OC_MDIO, - .driver_cfg = - &debug_mdio_global1, - .postDisabled = POST_DISABLED, - }, - { - .name = "global2", - .driver = &OC_MDIO, - .driver_cfg = - &debug_mdio_global2, - .postDisabled = POST_DISABLED, - }, - { - .name = "swport0", - .driver = &OC_MDIO, - .driver_cfg = - &debug_mdio_swport0, - .postDisabled = POST_DISABLED, - }, - { - .name = "swport1", - .driver = &OC_MDIO, - .driver_cfg = - &debug_mdio_swport1, - .postDisabled = POST_DISABLED, - }, - { - .name = "swport2", - .driver = &OC_MDIO, - .driver_cfg = - &debug_mdio_swport2, - .postDisabled = POST_DISABLED, - }, - { - .name = "swport3", - .driver = &OC_MDIO, - .driver_cfg = - &debug_mdio_swport3, - .postDisabled = POST_DISABLED, - }, - { - .name = "swport4", - .driver = &OC_MDIO, - .driver_cfg = - &debug_mdio_swport4, - .postDisabled = POST_DISABLED, - }, - { - .name = "swport5", - .driver = &OC_MDIO, - .driver_cfg = - &debug_mdio_swport5, - .postDisabled = POST_DISABLED, - }, - { - .name = "swport6", - .driver = &OC_MDIO, - .driver_cfg = - &debug_mdio_swport6, - .postDisabled = POST_DISABLED, - }, - {} } }, + .name = "debug", + .components = + (Component[]){ + { + .name = "comp_all", + .postDisabled = POST_DISABLED, + }, + { + .name = "I2C", + .components = + (Component[]){ + { .name = "comp_all", + .postDisabled = POST_DISABLED }, + { .name = "bus0", + .driver = &OC_I2C, + .driver_cfg = &debug_I2C0, + .postDisabled = POST_DISABLED }, + { .name = "bus1", + .driver = &OC_I2C, + .driver_cfg = &debug_I2C1, + .postDisabled = POST_DISABLED }, + { .name = "bus2", + .driver = &OC_I2C, + .driver_cfg = &debug_I2C2, + .postDisabled = POST_DISABLED }, + { .name = "bus3", + .driver = &OC_I2C, + .driver_cfg = &debug_I2C3, + .postDisabled = POST_DISABLED }, + { .name = "bus4", + .driver = &OC_I2C, + .driver_cfg = &debug_I2C4, + .postDisabled = POST_DISABLED }, + { .name = "bus6", + .driver = &OC_I2C, + .driver_cfg = &debug_I2C6, + .postDisabled = POST_DISABLED }, + { .name = "bus7", + .driver = &OC_I2C, + .driver_cfg = &debug_I2C7, + .postDisabled = POST_DISABLED }, + { .name = "bus8", + .driver = &OC_I2C, + .driver_cfg = &debug_I2C8, + .postDisabled = POST_DISABLED }, {} }, + }, + { + .name = "ec", + .components = + (Component[]){ + { + .name = "comp_all", + .postDisabled = POST_DISABLED, + }, + { + .name = "PA", + .driver = &OC_GPIO, + .driver_cfg = &debug_ec_gpio_pa, + .postDisabled = POST_DISABLED, + }, + { + .name = "PB", + .driver = &OC_GPIO, + .driver_cfg = &debug_ec_gpio_pb, + .postDisabled = POST_DISABLED, + }, + { + .name = "PC", + .driver = &OC_GPIO, + .driver_cfg = &debug_ec_gpio_pc, + .postDisabled = POST_DISABLED, + }, + { + .name = "PD", + .driver = &OC_GPIO, + .driver_cfg = &debug_ec_gpio_pd, + .postDisabled = POST_DISABLED, + }, + { + .name = "PE", + .driver = &OC_GPIO, + .driver_cfg = &debug_ec_gpio_pe, + .postDisabled = POST_DISABLED, + }, + { + .name = "PF", + .driver = &OC_GPIO, + .driver_cfg = &debug_ec_gpio_pf, + .postDisabled = POST_DISABLED, + }, + { + .name = "PG", + .driver = &OC_GPIO, + .driver_cfg = &debug_ec_gpio_pg, + .postDisabled = POST_DISABLED, + }, + { + .name = "PH", + .driver = &OC_GPIO, + .driver_cfg = &debug_ec_gpio_ph, + .postDisabled = POST_DISABLED, + }, + { + .name = "PJ", + .driver = &OC_GPIO, + .driver_cfg = &debug_ec_gpio_pj, + .postDisabled = POST_DISABLED, + }, + { + .name = "PK", + .driver = &OC_GPIO, + .driver_cfg = &debug_ec_gpio_pk, + .postDisabled = POST_DISABLED, + }, + { + .name = "PL", + .driver = &OC_GPIO, + .driver_cfg = &debug_ec_gpio_pl, + .postDisabled = POST_DISABLED, + }, + { + .name = "PM", + .driver = &OC_GPIO, + .driver_cfg = &debug_ec_gpio_pm, + .postDisabled = POST_DISABLED, + }, + { + .name = "PN", + .driver = &OC_GPIO, + .driver_cfg = &debug_ec_gpio_pn, + .postDisabled = POST_DISABLED, + }, + { + .name = "PP", + .driver = &OC_GPIO, + .driver_cfg = &debug_ec_gpio_pn, + .postDisabled = POST_DISABLED, + }, + { + .name = "PQ", + .driver = &OC_GPIO, + .driver_cfg = &debug_ec_gpio_pq, + .postDisabled = POST_DISABLED, + }, + {} }, + }, + { + .name = "gbc", + .components = + (Component[]){ + { + .name = "comp_all", + .postDisabled = POST_DISABLED, + }, + { + .name = "ioexpanderx70", + .driver = &OC_GPIO, + .driver_cfg = &debug_gbc_ioexpanderx70, + }, + { + .name = "ioexpanderx71", + .driver = &OC_GPIO, + .driver_cfg = &debug_gbc_ioexpanderx71, + }, + {} }, + }, + { .name = "sdr", + .components = + (Component[]){ { + .name = "comp_all", + .postDisabled = POST_DISABLED, + }, + { + .name = "ioexpanderx1E", + .driver = + &OC_GPIO, + .driver_cfg = &debug_sdr_ioexpanderx1E, + }, + {} } }, + { .name = "fe", + .components = + (Component[]){ { + .name = "comp_all", + .postDisabled = POST_DISABLED, + }, + { + .name = "ioexpanderx18", + .driver = + &OC_GPIO, + .driver_cfg = &debug_sdr_ioexpanderx1E, + }, + { + .name = "ioexpanderx1C", + .driver = &OC_GPIO, + .driver_cfg = &debug_fe_ioexpanderx1C, + }, + { + .name = "ioexpanderx1B", + .driver = &OC_GPIO, + .driver_cfg = &debug_fe_ioexpanderx1B, + }, + { + .name = "ioexpanderx1A", + .driver = &OC_GPIO, + .driver_cfg = &debug_fe_ioexpanderx1A, + }, + { + .name = "ioexpanderx1D", + .driver = &OC_GPIO, + .driver_cfg = &debug_fe_ioexpanderx1D, + }, + {} + + } }, + { .name = "sync", + .components = + (Component[]){ + { + .name = "comp_all", + .postDisabled = + POST_DISABLED, + }, + { + .name = "ioexpanderx71", + .driver = &OC_GPIO, + .driver_cfg = &debug_sync_ioexpanderx71, + }, + {} } }, + { .name = "ethernet", + .components = + (Component[]){ { + .name = "comp_all", + .postDisabled = POST_DISABLED, + }, + { + .name = "port0", + .driver = + &OC_MDIO, + .driver_cfg = &debug_mdio_phyport0, + .postDisabled = POST_DISABLED, + }, + { + .name = "port1", + .driver = &OC_MDIO, + .driver_cfg = &debug_mdio_phyport1, + .postDisabled = POST_DISABLED, + }, + { + .name = "port2", + .driver = &OC_MDIO, + .driver_cfg = &debug_mdio_phyport2, + .postDisabled = POST_DISABLED, + }, + { + .name = "port3", + .driver = &OC_MDIO, + .driver_cfg = &debug_mdio_phyport3, + .postDisabled = POST_DISABLED, + }, + { + .name = "port4", + .driver = &OC_MDIO, + .driver_cfg = &debug_mdio_phyport4, + .postDisabled = POST_DISABLED, + }, + { + .name = "global1", + .driver = &OC_MDIO, + .driver_cfg = &debug_mdio_global1, + .postDisabled = POST_DISABLED, + }, + { + .name = "global2", + .driver = &OC_MDIO, + .driver_cfg = &debug_mdio_global2, + .postDisabled = POST_DISABLED, + }, + { + .name = "swport0", + .driver = &OC_MDIO, + .driver_cfg = &debug_mdio_swport0, + .postDisabled = POST_DISABLED, + }, + { + .name = "swport1", + .driver = &OC_MDIO, + .driver_cfg = &debug_mdio_swport1, + .postDisabled = POST_DISABLED, + }, + { + .name = "swport2", + .driver = &OC_MDIO, + .driver_cfg = &debug_mdio_swport2, + .postDisabled = POST_DISABLED, + }, + { + .name = "swport3", + .driver = &OC_MDIO, + .driver_cfg = &debug_mdio_swport3, + .postDisabled = POST_DISABLED, + }, + { + .name = "swport4", + .driver = &OC_MDIO, + .driver_cfg = &debug_mdio_swport4, + .postDisabled = POST_DISABLED, + }, + { + .name = "swport5", + .driver = &OC_MDIO, + .driver_cfg = &debug_mdio_swport5, + .postDisabled = POST_DISABLED, + }, + { + .name = "swport6", + .driver = &OC_MDIO, + .driver_cfg = &debug_mdio_swport6, + .postDisabled = POST_DISABLED, + }, + {} } }, + {} }, }, {} }; diff --git a/firmware/ec/src/bigbrother.c b/firmware/ec/src/bigbrother.c index aa56c78674..5bb2d95266 100644 --- a/firmware/ec/src/bigbrother.c +++ b/firmware/ec/src/bigbrother.c @@ -187,18 +187,19 @@ extern OcGpio_Port gbc_io_0; /* These pins aren't properly referenced in a subsystem yet, so we'll define * them here for now */ -//OcGpio_Pin pin_r_irq_intrpt = { &gbc_io_0, 0, OCGPIO_CFG_IN_PU }; -//OcGpio_Pin pin_inven_eeprom_wp = { &gbc_io_0, 1, OCGPIO_CFG_OUT_OD_NOPULL }; -//OcGpio_Pin pin_s_id_eeprom_wp = { &gbc_io_0, 2, OCGPIO_CFG_OUT_OD_NOPULL }; +// OcGpio_Pin pin_r_irq_intrpt = { &gbc_io_0, 0, OCGPIO_CFG_IN_PU }; +// OcGpio_Pin pin_inven_eeprom_wp = { &gbc_io_0, 1, +// OCGPIO_CFG_OUT_OD_NOPULL }; OcGpio_Pin pin_s_id_eeprom_wp = { &gbc_io_0, +// 2, OCGPIO_CFG_OUT_OD_NOPULL }; OcGpio_Pin pin_uart_sel = { &gbc_io_0, 3, OCGPIO_CFG_OUT_OD_NOPULL }; -//OcGpio_Pin pin_tempsen_evt1 = { &gbc_io_0, 4 }; -//OcGpio_Pin pin_tempsen_evt2 = { &gbc_io_0, 5 }; -//OcGpio_Pin pin_tempsen_evt3 = { &gbc_io_0, 6 }; -//OcGpio_Pin pin_tempsen_evt4 = { &gbc_io_0, 7 }; -//OcGpio_Pin pin_tempsen_evt5 = { &gbc_io_0, 8 }; -//OcGpio_Pin pin_buzzer_on = { &gbc_io_0, 10, OCGPIO_CFG_OUT_OD_NOPULL }; -//OcGpio_Pin pin_int_bat_prsnt = { &gbc_io_0, 11 }; -//OcGpio_Pin pin_ext_bat_prsnt = { &gbc_io_0, 12 }; +// OcGpio_Pin pin_tempsen_evt1 = { &gbc_io_0, 4 }; +// OcGpio_Pin pin_tempsen_evt2 = { &gbc_io_0, 5 }; +// OcGpio_Pin pin_tempsen_evt3 = { &gbc_io_0, 6 }; +// OcGpio_Pin pin_tempsen_evt4 = { &gbc_io_0, 7 }; +// OcGpio_Pin pin_tempsen_evt5 = { &gbc_io_0, 8 }; +// OcGpio_Pin pin_buzzer_on = { &gbc_io_0, 10, +// OCGPIO_CFG_OUT_OD_NOPULL }; OcGpio_Pin pin_int_bat_prsnt = { &gbc_io_0, +// 11 }; OcGpio_Pin pin_ext_bat_prsnt = { &gbc_io_0, 12 }; OcGpio_Pin pin_ec_syncconn_gpio1 = { &gbc_io_0, 13, OCGPIO_CFG_OUT_OD_NOPULL }; OcGpio_Pin pin_eth_sw_ec_intn = { &gbc_io_0, 14 }; @@ -234,7 +235,7 @@ ReturnStatus bigbrother_ioexp_init(void) * IO13 - NA * IO14 - NA * IO15 - NA - */ + */ /* TODO: we need a better spot to init. our IO expanders, but this works * for now @@ -272,18 +273,18 @@ ReturnStatus bigbrother_ioexp_init(void) */ OcGpio_init(&gbc_io_0); - //OcGpio_configure(&pin_r_irq_intrpt, OCGPIO_CFG_INPUT); - //OcGpio_configure(&pin_inven_eeprom_wp, OCGPIO_CFG_OUTPUT); - //OcGpio_configure(&pin_s_id_eeprom_wp, OCGPIO_CFG_OUTPUT); + // OcGpio_configure(&pin_r_irq_intrpt, OCGPIO_CFG_INPUT); + // OcGpio_configure(&pin_inven_eeprom_wp, OCGPIO_CFG_OUTPUT); + // OcGpio_configure(&pin_s_id_eeprom_wp, OCGPIO_CFG_OUTPUT); OcGpio_configure(&pin_uart_sel, OCGPIO_CFG_OUTPUT); - //OcGpio_configure(&pin_tempsen_evt1, OCGPIO_CFG_INPUT); - //OcGpio_configure(&pin_tempsen_evt2, OCGPIO_CFG_INPUT); - //OcGpio_configure(&pin_tempsen_evt3, OCGPIO_CFG_INPUT); - //OcGpio_configure(&pin_tempsen_evt4, OCGPIO_CFG_INPUT); - //OcGpio_configure(&pin_tempsen_evt5, OCGPIO_CFG_INPUT); - //OcGpio_configure(&pin_buzzer_on, OCGPIO_CFG_OUTPUT); - //OcGpio_configure(&pin_int_bat_prsnt, OCGPIO_CFG_INPUT); - //OcGpio_configure(&pin_ext_bat_prsnt, OCGPIO_CFG_INPUT); + // OcGpio_configure(&pin_tempsen_evt1, OCGPIO_CFG_INPUT); + // OcGpio_configure(&pin_tempsen_evt2, OCGPIO_CFG_INPUT); + // OcGpio_configure(&pin_tempsen_evt3, OCGPIO_CFG_INPUT); + // OcGpio_configure(&pin_tempsen_evt4, OCGPIO_CFG_INPUT); + // OcGpio_configure(&pin_tempsen_evt5, OCGPIO_CFG_INPUT); + // OcGpio_configure(&pin_buzzer_on, OCGPIO_CFG_OUTPUT); + // OcGpio_configure(&pin_int_bat_prsnt, OCGPIO_CFG_INPUT); + // OcGpio_configure(&pin_ext_bat_prsnt, OCGPIO_CFG_INPUT); OcGpio_configure(&pin_ec_syncconn_gpio1, OCGPIO_CFG_OUTPUT); OcGpio_configure(&pin_eth_sw_ec_intn, OCGPIO_CFG_INPUT); @@ -334,19 +335,19 @@ static void bigbrother_init(void) semBigBrotherMsg = Semaphore_create(0, NULL, NULL); if (semBigBrotherMsg == NULL) { LOGGER_ERROR( - "BIGBROTHER:ERROR::BIGBROTHER RX Semaphore creation failed.\n"); + "BIGBROTHER:ERROR::BIGBROTHER RX Semaphore creation failed.\n"); } /*Creating RX Message Queue*/ bigBrotherRxMsgQueue = Util_constructQueue(&bigBrotherRxMsg); LOGGER_DEBUG( - "BIGBROTHER:INFO::Constructing message Queue for 0x%x Big Brother RX Messages.\n", - bigBrotherRxMsgQueue); + "BIGBROTHER:INFO::Constructing message Queue for 0x%x Big Brother RX Messages.\n", + bigBrotherRxMsgQueue); /*Creating TX Message Queue*/ bigBrotherTxMsgQueue = Util_constructQueue(&bigBrotherTxMsg); LOGGER_DEBUG( - "BIGBROTHER:INFO::Constructing message Queue for 0x%x Big Brother RX Messages.\n", - bigBrotherTxMsgQueue); + "BIGBROTHER:INFO::Constructing message Queue for 0x%x Big Brother RX Messages.\n", + bigBrotherTxMsgQueue); } /***************************************************************************** @@ -367,22 +368,22 @@ static void bigbrother_taskfxn(UArg a0, UArg a1) bigbrother_ioexp_init(); hci_buzzer_beep(1); - //Create Tasks. + // Create Tasks. bigborther_spwan_task(); - //Perform POST + // Perform POST bigborther_initiate_post(); while (true) { if (Semaphore_pend(semBigBrotherMsg, BIOS_WAIT_FOREVER)) { while (!Queue_empty(bigBrotherRxMsgQueue)) { uint8_t *pWrite = - (uint8_t *)Util_dequeueMsg(bigBrotherRxMsgQueue); + (uint8_t *)Util_dequeueMsg(bigBrotherRxMsgQueue); if (pWrite) { bigbrother_process_rx_msg(pWrite); } } while (!Queue_empty(bigBrotherTxMsgQueue)) { uint8_t *pWrite = - (uint8_t *)Util_dequeueMsg(bigBrotherTxMsgQueue); + (uint8_t *)Util_dequeueMsg(bigBrotherTxMsgQueue); if (pWrite) { bigbrother_process_tx_msg(pWrite); } diff --git a/firmware/ec/src/comm/gossiper.c b/firmware/ec/src/comm/gossiper.c index 9dc04627ff..2fc033c134 100644 --- a/firmware/ec/src/comm/gossiper.c +++ b/firmware/ec/src/comm/gossiper.c @@ -112,20 +112,20 @@ static void gossiper_init(void) semGossiperMsg = Semaphore_create(0, NULL, NULL); if (semGossiperMsg == NULL) { LOGGER_ERROR( - "GOSSIPER:ERROR::GOSSIPER RX Semaphore creation failed.\n"); + "GOSSIPER:ERROR::GOSSIPER RX Semaphore creation failed.\n"); } /*Creating RX Message Queue*/ gossiperRxMsgQueue = Util_constructQueue(&gossiperRxMsg); LOGGER_DEBUG( - "GOSSIPER:INFO::Constructing message Queue 0x%x for RX Gossiper Messages.\n", - gossiperRxMsgQueue); + "GOSSIPER:INFO::Constructing message Queue 0x%x for RX Gossiper Messages.\n", + gossiperRxMsgQueue); /*Creating TX Message Queue*/ gossiperTxMsgQueue = Util_constructQueue(&gossiperTxMsg); LOGGER_DEBUG( - "GOSSIPER:INFO::Constructing message Queue 0x%x for TX Gossiper Messages.\n", - gossiperTxMsgQueue); + "GOSSIPER:INFO::Constructing message Queue 0x%x for TX Gossiper Messages.\n", + gossiperTxMsgQueue); } /***************************************************************************** @@ -146,7 +146,7 @@ static void gossiper_taskfxn(UArg a0, UArg a1) /* Gossiper RX Messgaes */ while (!Queue_empty(gossiperRxMsgQueue)) { uint8_t *pWrite = - (uint8_t *)Util_dequeueMsg(gossiperRxMsgQueue); + (uint8_t *)Util_dequeueMsg(gossiperRxMsgQueue); if (pWrite) { gossiper_process_rx_msg(pWrite); } else { @@ -157,7 +157,7 @@ static void gossiper_taskfxn(UArg a0, UArg a1) /* Gossiper TX Messgaes */ while (!Queue_empty(gossiperTxMsgQueue)) { uint8_t *pWrite = - (uint8_t *)Util_dequeueMsg(gossiperTxMsgQueue); + (uint8_t *)Util_dequeueMsg(gossiperTxMsgQueue); if (pWrite) { gossiper_process_tx_msg(pWrite); } else { @@ -186,13 +186,13 @@ static ReturnStatus gossiper_process_rx_msg(uint8_t *pMsg) OCMPMessageFrame *pOCMPMessageFrame = (OCMPMessageFrame *)pMsg; if (pOCMPMessageFrame != NULL) { LOGGER_DEBUG( - "GOSSIPER:INFO:: RX Msg recieved with Length: 0x%x, Interface: 0x%x, Seq.No: 0x%x, TimeStamp: 0x%x.\n", - pOCMPMessageFrame->header.ocmpFrameLen, - pOCMPMessageFrame->header.ocmpInterface, - pOCMPMessageFrame->header.ocmpSeqNumber, - pOCMPMessageFrame->header.ocmpTimestamp); + "GOSSIPER:INFO:: RX Msg recieved with Length: 0x%x, Interface: 0x%x, Seq.No: 0x%x, TimeStamp: 0x%x.\n", + pOCMPMessageFrame->header.ocmpFrameLen, + pOCMPMessageFrame->header.ocmpInterface, + pOCMPMessageFrame->header.ocmpSeqNumber, + pOCMPMessageFrame->header.ocmpTimestamp); /*Update the Debug info required based on the debug jumper connected*/ - //status = CheckDebugEnabled() + // status = CheckDebugEnabled() if (pOCMPMessageFrame->message.msgtype == OCMP_MSG_TYPE_DEBUG) { #if 0 if (!IN_DEBUGMODE()) { @@ -259,7 +259,7 @@ static ReturnStatus gossiper_ethernet_send_msg(uint8_t *pMsg) { ReturnStatus status = RETURN_OK; LOGGER_DEBUG( - "GOSSIPER:INFO:: Forwarding TX message to the ETH Interface.\n"); + "GOSSIPER:INFO:: Forwarding TX message to the ETH Interface.\n"); if (pMsg != NULL) { Util_enqueueMsg(ethTxMsgQueue, ethTxsem, (uint8_t *)pMsg); } else { @@ -282,7 +282,7 @@ static ReturnStatus gossiper_uart_send_msg(uint8_t *pMsg) { ReturnStatus status = RETURN_OK; LOGGER_DEBUG( - "GOSSIPER:INFO:: Forwarding TX message to the UART Interface.\n"); + "GOSSIPER:INFO:: Forwarding TX message to the UART Interface.\n"); if (pMsg != NULL) { Util_enqueueMsg(uartTxMsgQueue, semUARTTX, (uint8_t *)pMsg); } else { @@ -305,7 +305,7 @@ static ReturnStatus gossiper_usb_send_msg(uint8_t *pMsg) { ReturnStatus status = RETURN_OK; LOGGER_DEBUG( - "GOSSIPER:INFO:: Forwarding TX message to the USB Interface.\n"); + "GOSSIPER:INFO:: Forwarding TX message to the USB Interface.\n"); if (pMsg != NULL) { Util_enqueueMsg(usbTxMsgQueue, semUSBTX, (uint8_t *)pMsg); } else { diff --git a/firmware/ec/src/devices/adt7481.c b/firmware/ec/src/devices/adt7481.c index af9314195d..7c498998dc 100644 --- a/firmware/ec/src/devices/adt7481.c +++ b/firmware/ec/src/devices/adt7481.c @@ -110,21 +110,22 @@ * binary data format are offset by +64. */ #ifdef ADT7481_EXTENDED_FLAG -#define TEMP_TO_REG_U8(x) (x + 64) -#define TEMP_TO_REG_U16(x) ((x + 64) << 8) -#define REG_U8_TO_TEMP(y) (y - 64) -#define REG_U16_TO_TEMP(y) (y - 64) +# define TEMP_TO_REG_U8(x) (x + 64) +# define TEMP_TO_REG_U16(x) ((x + 64) << 8) +# define REG_U8_TO_TEMP(y) (y - 64) +# define REG_U16_TO_TEMP(y) (y - 64) #else -#define TEMP_TO_REG_U8(x) (x) -#define TEMP_TO_REG_U16(x) (x << 8) -#define REG_U8_TO_TEMP(y) (y) -#define REG_U16_TO_TEMP(y) (y) +# define TEMP_TO_REG_U8(x) (x) +# define TEMP_TO_REG_U16(x) (x << 8) +# define REG_U8_TO_TEMP(y) (y) +# define REG_U16_TO_TEMP(y) (y) #endif /***************************************************************************** ** FUNCTION NAME : adt7481_raw_read ** - ** DESCRIPTION : Read the register value from Temperature sensor ADT7481. + ** DESCRIPTION : Read the register value from Temperature sensor + *ADT7481. ** ** ARGUMENTS : OCSubsystem, Slave address, Register address and ** pointer to value read. @@ -151,7 +152,8 @@ static ReturnStatus adt7481_raw_read(const I2C_Dev *i2c_dev, uint8_t regAddress, /***************************************************************************** ** FUNCTION NAME : adt7481_raw_write ** - ** DESCRIPTION : Write the register value into Temperature sensor ADT7481. + ** DESCRIPTION : Write the register value into Temperature sensor + *ADT7481. ** ** ARGUMENTS : OCSubsystem, Slave address, Register address and value ** to be written. @@ -199,7 +201,8 @@ ReturnStatus adt7481_get_dev_id(const I2C_Dev *i2c_dev, uint8_t *devID) /***************************************************************************** ** FUNCTION NAME : adt7481_get_mfg_id ** - ** DESCRIPTION : Read the Manufacturer ID from Temperature sensor ADT7481. + ** DESCRIPTION : Read the Manufacturer ID from Temperature sensor + *ADT7481. ** ** ARGUMENTS : OCSubsystem, Slave address and pointer to manufacturing ** id. @@ -220,7 +223,8 @@ ReturnStatus adt7481_get_mfg_id(const I2C_Dev *i2c_dev, uint8_t *mfgID) /***************************************************************************** ** FUNCTION NAME : adt7481_probe ** - ** DESCRIPTION : Read the Manufacturer ID from Temperature sensor ADT7481. + ** DESCRIPTION : Read the Manufacturer ID from Temperature sensor + *ADT7481. ** ** ARGUMENTS : I2C driver config and POST Data struct ** id. @@ -252,9 +256,11 @@ ePostCode adt7481_probe(const I2C_Dev *i2c_dev, POSTData *postData) /****************************************************************************** * @fn adt7481_get_config1 * - * @brief Read configuration 1 register value of temperature sensor ADT7481. + * @brief Read configuration 1 register value of temperature sensor + *ADT7481. * - * @args OCSubsystem, Slave address and pointer to the configuation value. + * @args OCSubsystem, Slave address and pointer to the configuation + *value. * * @return ReturnStatus *****************************************************************************/ @@ -271,7 +277,8 @@ ReturnStatus adt7481_get_config1(const I2C_Dev *i2c_dev, uint8_t *configValue) /****************************************************************************** * @fn adt7481_set_config1 * - * @brief Configure configuration 1 register of temperature sensor ADT7481. + * @brief Configure configuration 1 register of temperature sensor + *ADT7481. * * @args OCSubsystem, Slave address and configuration register value. * @@ -299,8 +306,8 @@ ReturnStatus adt7481_get_conv_rate(const I2C_Dev *i2c_dev, uint8_t *convRateValue) { ReturnStatus status = RETURN_OK; - status = adt7481_raw_read(i2c_dev, ADT7481_REG_R_CONVERSION_RATE, - convRateValue); + status = + adt7481_raw_read(i2c_dev, ADT7481_REG_R_CONVERSION_RATE, convRateValue); if (status != RETURN_OK) { convRateValue = NULL; } @@ -331,7 +338,8 @@ ReturnStatus adt7481_set_conv_rate(const I2C_Dev *i2c_dev, * * @brief Read status 1 register value of temperature sensor ADT7481. * - * @args OCSubsystem, Slave address and pointer to the configuation value. + * @args OCSubsystem, Slave address and pointer to the configuation + *value. * * @return ReturnStatus *****************************************************************************/ @@ -350,7 +358,8 @@ ReturnStatus adt7481_get_status1(const I2C_Dev *i2c_dev, uint8_t *statusValue) * * @brief Read status 2 register value of temperature sensor ADT7481. * - * @args OCSubsystem, Slave address and pointer to the configuation value. + * @args OCSubsystem, Slave address and pointer to the configuation + *value. * * @return ReturnStatus *****************************************************************************/ @@ -403,12 +412,12 @@ ReturnStatus adt7481_get_remote1_temp_val(const I2C_Dev *i2c_dev, uint8_t lRegValue = 0x00; uint8_t hRegValue = 0x00; status = - adt7481_raw_read(i2c_dev, ADT7481_REG_R_REMOTE1_TEMP_L, &lRegValue); + adt7481_raw_read(i2c_dev, ADT7481_REG_R_REMOTE1_TEMP_L, &lRegValue); if (status != RETURN_OK) { tempValue = NULL; } else { - status = adt7481_raw_read(i2c_dev, ADT7481_REG_R_REMOTE1_TEMP_H, - &hRegValue); + status = + adt7481_raw_read(i2c_dev, ADT7481_REG_R_REMOTE1_TEMP_H, &hRegValue); if (status != RETURN_OK) { tempValue = NULL; } else { @@ -434,12 +443,12 @@ ReturnStatus adt7481_get_remote2_temp_val(const I2C_Dev *i2c_dev, uint8_t lRegValue = 0x00; uint8_t hRegValue = 0x00; status = - adt7481_raw_read(i2c_dev, ADT7481_REG_R_REMOTE2_TEMP_L, &lRegValue); + adt7481_raw_read(i2c_dev, ADT7481_REG_R_REMOTE2_TEMP_L, &lRegValue); if (status != RETURN_OK) { tempValue = NULL; } else { - status = adt7481_raw_read(i2c_dev, ADT7481_REG_R_REMOTE2_TEMP_H, - &hRegValue); + status = + adt7481_raw_read(i2c_dev, ADT7481_REG_R_REMOTE2_TEMP_H, &hRegValue); if (status != RETURN_OK) { tempValue = NULL; } else { @@ -558,8 +567,8 @@ ReturnStatus adt7481_get_remote1_temp_low_limit(const I2C_Dev *i2c_dev, uint8_t hRegValue = 0x00; /* Read LSB data */ - status = adt7481_raw_read(i2c_dev, ADT7481_REG_R_REMOTE1_LOWLIMIT_L, - &lRegValue); + status = + adt7481_raw_read(i2c_dev, ADT7481_REG_R_REMOTE1_LOWLIMIT_L, &lRegValue); if (status != RETURN_OK) { tempLimitValue = NULL; } else { @@ -626,8 +635,8 @@ ReturnStatus adt7481_get_remote1_temp_therm_limit(const I2C_Dev *i2c_dev, ReturnStatus status = RETURN_NOTOK; uint8_t regValue = 0x00; - status = adt7481_raw_read(i2c_dev, ADT7481_REG_R_REMOTE1_THERMLIMIT, - ®Value); + status = + adt7481_raw_read(i2c_dev, ADT7481_REG_R_REMOTE1_THERMLIMIT, ®Value); if (status != RETURN_OK) { tempLimitValue = NULL; } else { @@ -658,17 +667,17 @@ adt7481_get_remote1_temp_limit(const I2C_Dev *i2c_dev, switch (limitToConfig) { case CONF_TEMP_ADT7481_LOW_LIMIT_REG: { status = - adt7481_get_remote1_temp_low_limit(i2c_dev, tempLimitValue); + adt7481_get_remote1_temp_low_limit(i2c_dev, tempLimitValue); break; } case CONF_TEMP_ADT7481_HIGH_LIMIT_REG: { - status = adt7481_get_remote1_temp_high_limit(i2c_dev, - tempLimitValue); + status = + adt7481_get_remote1_temp_high_limit(i2c_dev, tempLimitValue); break; } case CONF_TEMP_ADT7481_THERM_LIMIT_REG: { - status = adt7481_get_remote1_temp_therm_limit(i2c_dev, - tempLimitValue); + status = + adt7481_get_remote1_temp_therm_limit(i2c_dev, tempLimitValue); break; } default: { @@ -757,8 +766,8 @@ ReturnStatus adt7481_set_remote1_temp_therm_limit(const I2C_Dev *i2c_dev, /* Converting Temp limit into the register value */ regValue = TEMP_TO_REG_U8(tempLimitValue); - status = adt7481_raw_write(i2c_dev, ADT7481_REG_W_REMOTE1_THERMLIMIT, - regValue); + status = + adt7481_raw_write(i2c_dev, ADT7481_REG_W_REMOTE1_THERMLIMIT, regValue); return status; } @@ -782,17 +791,17 @@ adt7481_set_remote1_temp_limit(const I2C_Dev *i2c_dev, switch (limitToConfig) { case CONF_TEMP_ADT7481_LOW_LIMIT_REG: { status = - adt7481_set_remote1_temp_low_limit(i2c_dev, tempLimitValue); + adt7481_set_remote1_temp_low_limit(i2c_dev, tempLimitValue); break; } case CONF_TEMP_ADT7481_HIGH_LIMIT_REG: { - status = adt7481_set_remote1_temp_high_limit(i2c_dev, - tempLimitValue); + status = + adt7481_set_remote1_temp_high_limit(i2c_dev, tempLimitValue); break; } case CONF_TEMP_ADT7481_THERM_LIMIT_REG: { - status = adt7481_set_remote1_temp_therm_limit(i2c_dev, - tempLimitValue); + status = + adt7481_set_remote1_temp_therm_limit(i2c_dev, tempLimitValue); break; } default: { @@ -820,8 +829,8 @@ ReturnStatus adt7481_get_remote2_temp_low_limit(const I2C_Dev *i2c_dev, uint8_t hRegValue = 0x00; /* Read LSB data */ - status = adt7481_raw_read(i2c_dev, ADT7481_REG_R_REMOTE2_LOWLIMIT_L, - &lRegValue); + status = + adt7481_raw_read(i2c_dev, ADT7481_REG_R_REMOTE2_LOWLIMIT_L, &lRegValue); if (status != RETURN_OK) { tempLimitValue = NULL; } else { @@ -888,8 +897,8 @@ ReturnStatus adt7481_get_remote2_temp_therm_limit(const I2C_Dev *i2c_dev, ReturnStatus status = RETURN_NOTOK; uint8_t regValue = 0x00; - status = adt7481_raw_read(i2c_dev, ADT7481_REG_R_REMOTE2_THERMLIMIT, - ®Value); + status = + adt7481_raw_read(i2c_dev, ADT7481_REG_R_REMOTE2_THERMLIMIT, ®Value); if (status != RETURN_OK) { tempLimitValue = NULL; } else { @@ -920,17 +929,17 @@ adt7481_get_remote2_temp_limit(const I2C_Dev *i2c_dev, switch (limitToConfig) { case CONF_TEMP_ADT7481_LOW_LIMIT_REG: { status = - adt7481_get_remote2_temp_low_limit(i2c_dev, tempLimitValue); + adt7481_get_remote2_temp_low_limit(i2c_dev, tempLimitValue); break; } case CONF_TEMP_ADT7481_HIGH_LIMIT_REG: { - status = adt7481_get_remote2_temp_high_limit(i2c_dev, - tempLimitValue); + status = + adt7481_get_remote2_temp_high_limit(i2c_dev, tempLimitValue); break; } case CONF_TEMP_ADT7481_THERM_LIMIT_REG: { - status = adt7481_get_remote2_temp_therm_limit(i2c_dev, - tempLimitValue); + status = + adt7481_get_remote2_temp_therm_limit(i2c_dev, tempLimitValue); break; } default: { @@ -1019,8 +1028,8 @@ ReturnStatus adt7481_set_remote2_temp_therm_limit(const I2C_Dev *i2c_dev, /* Converting Temp limit into the register value */ regValue = TEMP_TO_REG_U8(tempLimitValue); - status = adt7481_raw_write(i2c_dev, ADT7481_REG_W_REMOTE2_THERMLIMIT, - regValue); + status = + adt7481_raw_write(i2c_dev, ADT7481_REG_W_REMOTE2_THERMLIMIT, regValue); return status; } @@ -1044,17 +1053,17 @@ adt7481_set_remote2_temp_limit(const I2C_Dev *i2c_dev, switch (limitToConfig) { case CONF_TEMP_ADT7481_LOW_LIMIT_REG: { status = - adt7481_set_remote2_temp_low_limit(i2c_dev, tempLimitValue); + adt7481_set_remote2_temp_low_limit(i2c_dev, tempLimitValue); break; } case CONF_TEMP_ADT7481_HIGH_LIMIT_REG: { - status = adt7481_set_remote2_temp_high_limit(i2c_dev, - tempLimitValue); + status = + adt7481_set_remote2_temp_high_limit(i2c_dev, tempLimitValue); break; } case CONF_TEMP_ADT7481_THERM_LIMIT_REG: { - status = adt7481_set_remote2_temp_therm_limit(i2c_dev, - tempLimitValue); + status = + adt7481_set_remote2_temp_therm_limit(i2c_dev, tempLimitValue); break; } default: { @@ -1082,8 +1091,8 @@ ReturnStatus adt7481_get_remote1_temp_offset(const I2C_Dev *i2c_dev, uint8_t hRegValue = 0x00; /* Read LSB data */ - status = adt7481_raw_read(i2c_dev, ADT7481_REG_R_REMOTE1_OFFSET_L, - &lRegValue); + status = + adt7481_raw_read(i2c_dev, ADT7481_REG_R_REMOTE1_OFFSET_L, &lRegValue); if (status != RETURN_OK) { tempOffsetValue = NULL; } else { @@ -1147,8 +1156,8 @@ ReturnStatus adt7481_get_remote2_temp_offset(const I2C_Dev *i2c_dev, uint8_t hRegValue = 0x00; /* Read LSB data */ - status = adt7481_raw_read(i2c_dev, ADT7481_REG_R_REMOTE2_OFFSET_L, - &lRegValue); + status = + adt7481_raw_read(i2c_dev, ADT7481_REG_R_REMOTE2_OFFSET_L, &lRegValue); if (status != RETURN_OK) { tempOffsetValue = NULL; } else { diff --git a/firmware/ec/src/devices/eeprom.c b/firmware/ec/src/devices/eeprom.c index 323f0496d8..2b477de504 100644 --- a/firmware/ec/src/devices/eeprom.c +++ b/firmware/ec/src/devices/eeprom.c @@ -18,7 +18,7 @@ #include #ifndef UT_FRAMEWORK -#include /* TODO: for htons - clean up this random include */ +# include /* TODO: for htons - clean up this random include */ #endif #include @@ -164,13 +164,13 @@ static ReturnStatus i2c_eeprom_write(I2C_Handle i2cHandle, uint8_t slaveAddress, i2cTransaction.readCount = 0; if (I2C_transfer(i2cHandle, &i2cTransaction)) { LOGGER_DEBUG( - "EEPROM:INFO:: I2C write success for device: 0x%x reg Addr: 0x%x\n", - slaveAddress, memAddress); + "EEPROM:INFO:: I2C write success for device: 0x%x reg Addr: 0x%x\n", + slaveAddress, memAddress); status = RETURN_OK; } else { LOGGER_ERROR( - "EEPROM:ERROR:: I2C write failed for for device: 0x%x reg Addr: 0x%x\n", - slaveAddress, memAddress); + "EEPROM:ERROR:: I2C write failed for for device: 0x%x reg Addr: 0x%x\n", + slaveAddress, memAddress); status = RETURN_NOTOK; } return status; @@ -201,13 +201,13 @@ static ReturnStatus i2c_eeprom_read(I2C_Handle i2cHandle, uint16_t slaveAddress, i2cTransaction.readCount = numofbytes; if (I2C_transfer(i2cHandle, &i2cTransaction)) { LOGGER_DEBUG( - "EEPROM:INFO:: I2C read success for device: 0x%x reg Addr: 0x%x\n", - slaveAddress, memAddress); + "EEPROM:INFO:: I2C read success for device: 0x%x reg Addr: 0x%x\n", + slaveAddress, memAddress); status = RETURN_OK; } else { LOGGER_ERROR( - "EEPROM:ERROR:: I2C write failed for for device: 0x%x reg Addr: 0x%x\n", - slaveAddress, memAddress); + "EEPROM:ERROR:: I2C write failed for for device: 0x%x reg Addr: 0x%x\n", + slaveAddress, memAddress); status = RETURN_NOTOK; } return status; @@ -256,7 +256,8 @@ ReturnStatus eeprom_enable_write(Eeprom_Cfg *cfg) /***************************************************************************** ** FUNCTION NAME : eeprom_read_oc_info ** - ** DESCRIPTION : Read the info about OC connect1 box from the EEPROM register. + ** DESCRIPTION : Read the info about OC connect1 box from the EEPROM + *register. ** ** ARGUMENTS : EEPROM (Slave) address, Register address and ** pointer to value read. @@ -271,7 +272,7 @@ ReturnStatus eeprom_read_oc_info(uint8_t *oc_serial) OC_CONNECT1_SERIAL_SIZE); if (status != RETURN_OK) { LOGGER_ERROR( - "EEPROM:ERROR:: Failed to get I2C Bus for GBC serial ID EEPROM.\n"); + "EEPROM:ERROR:: Failed to get I2C Bus for GBC serial ID EEPROM.\n"); } else { LOGGER_ERROR("EEPROM:Info:: OC Connect1 %d.\n", *oc_serial); } @@ -281,7 +282,8 @@ ReturnStatus eeprom_read_oc_info(uint8_t *oc_serial) /***************************************************************************** ** FUNCTION NAME : eeprom_read_board_info ** - ** DESCRIPTION : Read the info about various board from the EEPROM register. + ** DESCRIPTION : Read the info about various board from the EEPROM + *register. ** ** ARGUMENTS : EEPROM (Slave) address, Register address and ** pointer to value read. @@ -317,8 +319,8 @@ ReturnStatus eeprom_read_board_info(const Eeprom_Cfg *cfg, uint8_t *rom_info) status = eeprom_read(cfg, eepromOffset, rom_info, info_size); if (status != RETURN_OK) { LOGGER_ERROR( - "EEPROM:ERROR:: Failed to get I2C Bus for EEPROM device 0x%x.\n", - cfg->i2c_dev.slave_addr); + "EEPROM:ERROR:: Failed to get I2C Bus for EEPROM device 0x%x.\n", + cfg->i2c_dev.slave_addr); } else { LOGGER_ERROR("EEPROM:Info:: OC Connect1 %s.\n", rom_info); } @@ -363,8 +365,8 @@ ReturnStatus eeprom_read_device_info_record(const Eeprom_Cfg *cfg, status = eeprom_read(cfg, eepromOffset, device_info, info_size); if (status != RETURN_OK) { LOGGER_ERROR( - "EEPROM:ERROR:: Failed to get I2C Bus for EEPROM device 0x%x.\n", - cfg->i2c_dev.slave_addr); + "EEPROM:ERROR:: Failed to get I2C Bus for EEPROM device 0x%x.\n", + cfg->i2c_dev.slave_addr); } else { LOGGER_ERROR("EEPROM:Info:: Record read for 0x%x.\n", cfg->i2c_dev.slave_addr); @@ -410,8 +412,8 @@ ReturnStatus eeprom_write_device_info_record(Eeprom_Cfg *cfg, uint8_t recordNo, status = eeprom_write(cfg, eepromOffset, device_info, info_size); if (status != RETURN_OK) { LOGGER_ERROR( - "EEPROM:ERROR:: Failed to get I2C Bus for EEPROM device 0x%x.\n", - cfg->i2c_dev.slave_addr); + "EEPROM:ERROR:: Failed to get I2C Bus for EEPROM device 0x%x.\n", + cfg->i2c_dev.slave_addr); } else { LOGGER_ERROR("EEPROM:Info:: Record written for 0x%x.\n", cfg->i2c_dev.slave_addr); diff --git a/firmware/ec/src/devices/eth_sw.c b/firmware/ec/src/devices/eth_sw.c index 63ed3e6a0a..aa37001a12 100644 --- a/firmware/ec/src/devices/eth_sw.c +++ b/firmware/ec/src/devices/eth_sw.c @@ -46,7 +46,7 @@ void eth_sw_configure(Eth_cfg *ethCfg) if (!s_eth_sw_linkup) { OcGpio_configure(ðCfg->eth_sw_cfg->pin_ec_ethsw_reset, OCGPIO_CFG_OUTPUT | OCGPIO_CFG_OUT_HIGH); - SysCtlDelay(16000000); //400ms delay + SysCtlDelay(16000000); // 400ms delay } read_val = mdiobb_read_by_paging(PHY_PORT_0, REG_PHY_SPEC_STATUS); link_up = (RT_LINK & read_val) ? 1 : 0; @@ -110,16 +110,16 @@ static void _ethernet_sw_isr(void *context) uint16_t read_val = mdiobb_read(GLOBAL_2, REG_INTERRUPT_MASK); read_val = mdiobb_read(GLOBAL_2, REG_INTERRUPT_SOURCE); LOGGER_DEBUG( - "ETHSW::INFO:: Ethernet switch Interrupt mask register shows 0x%x.\n", - read_val); + "ETHSW::INFO:: Ethernet switch Interrupt mask register shows 0x%x.\n", + read_val); if (read_val & 0x1F) { while (!((read_val >> port) & 1)) { port++; } } LOGGER_DEBUG( - "ETHSW::INFO:: Ethernet switch context report interrupt from 0x%x.\n", - ethCfg->eth_sw_port); + "ETHSW::INFO:: Ethernet switch context report interrupt from 0x%x.\n", + ethCfg->eth_sw_port); uint16_t interrupt_status = 0; uint16_t i = 0; Eth_Sw_Events eth_Evt; @@ -129,32 +129,30 @@ static void _ethernet_sw_isr(void *context) case SPEED_INT_STATUS: { if (mdiobb_read_by_paging(port, REG_PHY_CONTROL) & AUTONEG_EN) { - value = (RES_SPEED & - mdiobb_read_by_paging(port, - REG_PHY_SPEC_STATUS)) ? - SPEED_100M : - SPEED_10M; + value = (RES_SPEED & mdiobb_read_by_paging( + port, REG_PHY_SPEC_STATUS)) ? + SPEED_100M : + SPEED_10M; } else { value = (SPEED & mdiobb_read_by_paging(port, REG_PHY_CONTROL)) ? - SPEED_100M : - SPEED_10M; + SPEED_100M : + SPEED_10M; } eth_Evt = ETH_EVT_SPEED; } break; case DUPLEX_INT_STATUS: { if (mdiobb_read_by_paging(port, REG_PHY_CONTROL) & AUTONEG_EN) { - value = (RES_DUPLEX & - mdiobb_read_by_paging(port, - REG_PHY_SPEC_STATUS)) ? - FULL_DUPLEX : - HALF_DUPLEX; + value = (RES_DUPLEX & mdiobb_read_by_paging( + port, REG_PHY_SPEC_STATUS)) ? + FULL_DUPLEX : + HALF_DUPLEX; } else { value = (DUPLEX & mdiobb_read_by_paging(port, REG_PHY_CONTROL)) ? - FULL_DUPLEX : - HALF_DUPLEX; + FULL_DUPLEX : + HALF_DUPLEX; } eth_Evt = ETH_EVT_DUPLEX; } break; @@ -195,8 +193,7 @@ static void _ethernet_sw_isr(void *context) } } ethCfg->eth_sw_cfg->eth_switch.obj.alert_cb( - eth_Evt, value, - ethCfg->eth_sw_cfg->eth_switch.obj.cb_context); + eth_Evt, value, ethCfg->eth_sw_cfg->eth_switch.obj.cb_context); } } } @@ -213,15 +210,15 @@ void eth_sw_setAlertHandler(Eth_cfg *ethCfg, Eth_Sw_CallbackFn alert_cb, ePostCode eth_sw_init(Eth_cfg *ethCfg) { ePostCode ret = POST_DEV_CFG_DONE; - //TODO: Enabling of the ethernet interrupts requires some more work. + // TODO: Enabling of the ethernet interrupts requires some more work. /* if (ethCfg->eth_sw_cfg.pin_evt) { const uint32_t pin_evt_cfg = OCGPIO_CFG_INPUT | OCGPIO_CFG_INT_FALLING; - if (OcGpio_configure(ethCfg->eth_sw_cfg.pin_evt, pin_evt_cfg) < OCGPIO_SUCCESS) { - ret = POST_DEV_CFG_FAIL; - } else { + if (OcGpio_configure(ethCfg->eth_sw_cfg.pin_evt, pin_evt_cfg) < + OCGPIO_SUCCESS) { ret = POST_DEV_CFG_FAIL; } else { // Use a threaded interrupt to handle IRQ - ThreadedInt_Init(ethCfg->eth_sw_cfg.pin_evt, _ethernet_sw_isr, (void *)ethCfg); + ThreadedInt_Init(ethCfg->eth_sw_cfg.pin_evt, _ethernet_sw_isr, (void + *)ethCfg); } } */ @@ -233,13 +230,13 @@ ReturnStatus eth_sw_get_status_speed(uint8_t port, port_speed *speed) ReturnStatus ret = RETURN_OK; if (mdiobb_read_by_paging(port, REG_PHY_CONTROL) & AUTONEG_EN) *speed = - (RES_SPEED & mdiobb_read_by_paging(port, REG_PHY_SPEC_STATUS)) ? - SPEED_100M : - SPEED_10M; + (RES_SPEED & mdiobb_read_by_paging(port, REG_PHY_SPEC_STATUS)) ? + SPEED_100M : + SPEED_10M; else *speed = (SPEED & mdiobb_read_by_paging(port, REG_PHY_CONTROL)) ? - SPEED_100M : - SPEED_10M; + SPEED_100M : + SPEED_10M; return ret; } @@ -247,14 +244,14 @@ ReturnStatus eth_sw_get_status_duplex(uint8_t port, port_duplex *duplex) { ReturnStatus ret = RETURN_OK; if (mdiobb_read_by_paging(port, REG_PHY_CONTROL) & AUTONEG_EN) - *duplex = (RES_DUPLEX & - mdiobb_read_by_paging(port, REG_PHY_SPEC_STATUS)) ? - FULL_DUPLEX : - HALF_DUPLEX; + *duplex = + (RES_DUPLEX & mdiobb_read_by_paging(port, REG_PHY_SPEC_STATUS)) ? + FULL_DUPLEX : + HALF_DUPLEX; else *duplex = (DUPLEX & mdiobb_read_by_paging(port, REG_PHY_CONTROL)) ? - FULL_DUPLEX : - HALF_DUPLEX; + FULL_DUPLEX : + HALF_DUPLEX; return ret; } @@ -262,7 +259,7 @@ ReturnStatus eth_sw_get_status_auto_neg(uint8_t port, uint8_t *autoneg_on) { ReturnStatus ret = RETURN_OK; *autoneg_on = - (AUTONEG_EN & mdiobb_read_by_paging(port, REG_PHY_CONTROL)) ? 1 : 0; + (AUTONEG_EN & mdiobb_read_by_paging(port, REG_PHY_CONTROL)) ? 1 : 0; return ret; } @@ -270,9 +267,7 @@ ReturnStatus eth_sw_get_status_sleep_mode(uint8_t port, uint8_t *sleep_mode_en) { ReturnStatus ret = RETURN_OK; *sleep_mode_en = - (SLEEP_MODE & mdiobb_read_by_paging(port, REG_PHY_SPEC_STATUS)) ? - 1 : - 0; + (SLEEP_MODE & mdiobb_read_by_paging(port, REG_PHY_SPEC_STATUS)) ? 1 : 0; return ret; } @@ -281,8 +276,7 @@ ReturnStatus eth_sw_get_status_auto_neg_complete(uint8_t port, { ReturnStatus ret = RETURN_OK; *autoneg_complete = - (AUTONEG_DONE & mdiobb_read_by_paging(port, REG_PHY_STATUS)) ? 1 : - 0; + (AUTONEG_DONE & mdiobb_read_by_paging(port, REG_PHY_STATUS)) ? 1 : 0; return ret; } @@ -396,43 +390,43 @@ ReturnStatus eth_sw_set_config_interrupt_enable(uint8_t port, switch ((1 << i)) { case ETH_ALERT_SPEED_CHANGE: (*interrupt_mask & ETH_ALERT_SPEED_CHANGE) ? - (write_val |= SPEED_INT_EN) : - (write_val &= ~SPEED_INT_EN); + (write_val |= SPEED_INT_EN) : + (write_val &= ~SPEED_INT_EN); break; case ETH_ALERT_DUPLEX_CHANGE: (*interrupt_mask & ETH_ALERT_DUPLEX_CHANGE) ? - (write_val |= DUPLEX_INT_EN) : - (write_val &= ~DUPLEX_INT_EN); + (write_val |= DUPLEX_INT_EN) : + (write_val &= ~DUPLEX_INT_EN); break; case ETH_ALERT_AUTONEG_DONE: (*interrupt_mask & ETH_ALERT_AUTONEG_DONE) ? - (write_val |= AUTONEG_COMPLETE_INT_EN) : - (write_val &= ~AUTONEG_COMPLETE_INT_EN); + (write_val |= AUTONEG_COMPLETE_INT_EN) : + (write_val &= ~AUTONEG_COMPLETE_INT_EN); break; case ETH_ALERT_LINK_CHANGE: (*interrupt_mask & ETH_ALERT_LINK_CHANGE) ? - (write_val |= LINK_CHANGE_INT_EN) : - (write_val &= ~LINK_CHANGE_INT_EN); + (write_val |= LINK_CHANGE_INT_EN) : + (write_val &= ~LINK_CHANGE_INT_EN); break; case ETH_ALERT_CROSSOVER_DET: (*interrupt_mask & ETH_ALERT_CROSSOVER_DET) ? - (write_val |= MDI_CROSSOVER_INT_EN) : - (write_val &= ~MDI_CROSSOVER_INT_EN); + (write_val |= MDI_CROSSOVER_INT_EN) : + (write_val &= ~MDI_CROSSOVER_INT_EN); break; case ETH_ALERT_ENERGY_DET: (*interrupt_mask & ETH_ALERT_ENERGY_DET) ? - (write_val |= ENERGY_DET_INT_EN) : - (write_val &= ~ENERGY_DET_INT_EN); + (write_val |= ENERGY_DET_INT_EN) : + (write_val &= ~ENERGY_DET_INT_EN); break; case ETH_ALERT_POLARITY_DET: (*interrupt_mask & ETH_ALERT_POLARITY_DET) ? - (write_val |= POLARITY_INT_EN) : - (write_val &= ~POLARITY_INT_EN); + (write_val |= POLARITY_INT_EN) : + (write_val &= ~POLARITY_INT_EN); break; case ETH_ALERT_JABBER_DET: (*interrupt_mask & ETH_ALERT_JABBER_DET) ? - (write_val |= JABBER_INT_EN) : - (write_val &= ~JABBER_INT_EN); + (write_val |= JABBER_INT_EN) : + (write_val &= ~JABBER_INT_EN); default: DEBUG("Interrupt not supported"); return RETURN_NOTOK; @@ -508,7 +502,8 @@ ReturnStatus eth_sw_enable_packet_gen(void *driver, void *params) ReturnStatus ret = RETURN_OK; Eth_cfg *s_eth_cfg = (Eth_cfg *)driver; Eth_PacketGen_Params *s_eth_packetParams = (Eth_PacketGen_Params *)params; - /*Packet generator params such as packet length, payload type, frame count etc are set in REG_C45_PACKET_GEN*/ + /*Packet generator params such as packet length, payload type, frame count + * etc are set in REG_C45_PACKET_GEN*/ mdiobb_write_by_paging_c45(s_eth_cfg->eth_sw_port, REG_C45_PACKET_GEN, s_eth_packetParams->reg_value); return ret; @@ -566,7 +561,7 @@ ReturnStatus eth_sw_config_tiva_client(void *driver, void *params) taskParams.arg0 = s_eth_tcpParams->tcpPort; taskHandle_client = - Task_create((Task_FuncPtr)tcpHandler_client, &taskParams, &eb); + Task_create((Task_FuncPtr)tcpHandler_client, &taskParams, &eb); if (taskHandle_client == NULL) { System_printf("Failed to create taskHandle_client Task\n"); } @@ -590,8 +585,8 @@ ReturnStatus eth_sw_get_config_speed(uint8_t port, port_speed *speed) *speed = SPEED_AUTONEG; else *speed = SPEED & mdiobb_read_by_paging(port, REG_PHY_CONTROL) ? - SPEED_100M : - SPEED_10M; + SPEED_100M : + SPEED_10M; return ret; } @@ -602,8 +597,8 @@ ReturnStatus eth_sw_get_config_duplex(uint8_t port, port_duplex *duplex) *duplex = DUPLEX_AUTONEG; else *duplex = (DUPLEX & mdiobb_read_by_paging(port, REG_PHY_CONTROL)) ? - FULL_DUPLEX : - HALF_DUPLEX; + FULL_DUPLEX : + HALF_DUPLEX; return ret; } @@ -611,7 +606,7 @@ ReturnStatus eth_sw_get_config_power_down(uint8_t port, uint8_t *power_dwn) { ReturnStatus ret = RETURN_OK; *power_dwn = - (PWR_DOWN & mdiobb_read_by_paging(port, REG_PHY_CONTROL)) ? 1 : 0; + (PWR_DOWN & mdiobb_read_by_paging(port, REG_PHY_CONTROL)) ? 1 : 0; return ret; } @@ -619,9 +614,8 @@ ReturnStatus eth_sw_get_config_sleep_mode(uint8_t port, uint8_t *sleep_mode) { ReturnStatus ret = RETURN_OK; *sleep_mode = - (ENERGY_DET & mdiobb_read_by_paging(port, REG_PHY_SPEC_CONTROL)) ? - 1 : - 0; + (ENERGY_DET & mdiobb_read_by_paging(port, REG_PHY_SPEC_CONTROL)) ? 1 : + 0; return ret; } diff --git a/firmware/ec/src/devices/g510.c b/firmware/ec/src/devices/g510.c index 776757631a..2d75207a82 100644 --- a/firmware/ec/src/devices/g510.c +++ b/firmware/ec/src/devices/g510.c @@ -107,7 +107,7 @@ static void call_state_cb(const GsmClccInfo *info, void *context) /* Configures the various IO pins associated with this subsystem */ static bool configure_io(TestMod_Cfg *testmod_cfg) { - //const TestMod_Cfg *testmod_cfg = (TestMod_Cfg *)testModuleCfg; + // const TestMod_Cfg *testmod_cfg = (TestMod_Cfg *)testModuleCfg; G510_Cfg *cfg = &testmod_cfg->g510_cfg; OcGpio_configure(&cfg->pin_sim_present, OCGPIO_CFG_INPUT); @@ -119,7 +119,7 @@ static bool configure_io(TestMod_Cfg *testmod_cfg) static UART_Handle open_comm(TestMod_Cfg *testmod_cfg) { - //const TestMod_Cfg *testmod_cfg = (TestMod_Cfg *)testModuleCfg; + // const TestMod_Cfg *testmod_cfg = (TestMod_Cfg *)testModuleCfg; // Open GSM UART UART_Params uartParams; @@ -139,7 +139,7 @@ static UART_Handle open_comm(TestMod_Cfg *testmod_cfg) static bool g510_reset(TestMod_Cfg *testmod_cfg) { - //const TestMod_Cfg *testmod_cfg = (TestMod_Cfg *)testModuleCfg; + // const TestMod_Cfg *testmod_cfg = (TestMod_Cfg *)testModuleCfg; const G510_Cfg *cfg = &testmod_cfg->g510_cfg; /* Ensure the enable line is high (deasserted) so the module doesn't @@ -275,7 +275,7 @@ static void testModule_task(UArg a0, UArg a1) GSM_cmgd(s_hGsm, sms_idx, GSM_CMGD_DELETE_AT_INDEX); sms_idx = -1; - //if (GSM_cmgs(s_hGsm, "29913", "Hello from GSM :)") < 0) { + // if (GSM_cmgs(s_hGsm, "29913", "Hello from GSM :)") < 0) { // LOGGER_ERROR("TESTMOD:Error sending SMS\n"); //} } diff --git a/firmware/ec/src/devices/i2c/XR20M1170.c b/firmware/ec/src/devices/i2c/XR20M1170.c index c8d3ef2dde..e8ebcd9931 100644 --- a/firmware/ec/src/devices/i2c/XR20M1170.c +++ b/firmware/ec/src/devices/i2c/XR20M1170.c @@ -209,7 +209,7 @@ static void processIrq(void *context) for (int i = 0; i < bytesToRead; ++i) { RingBuf_put(&object->ringBuffer, buf[i]); Semaphore_post( - object->readSem); // TODO: move out of mutex lock? + object->readSem); // TODO: move out of mutex lock? } } GateMutex_leave(object->ringBufMutex, mutexKey); @@ -262,7 +262,8 @@ static bool register_config(UART_Handle handle, UART_Params *params) /* TODO: handle i2c failures better */ - // Enable modifications to enhanced function registers and enable HW flow control (might as well) + // Enable modifications to enhanced function registers and enable HW flow + // control (might as well) uint8_t bf = 0xBF; // TODO: hack - required to modify this register if (!writeData(handle, XR_REG_LCR, &bf, 1)) { return false; @@ -336,7 +337,7 @@ static bool register_config(UART_Handle handle, UART_Params *params) .op1 = true, /* Select access to TCR from MSR */ .loopbackEn = false, .clkPrescaler = - ((prescaler > 1) ? XR_CLK_PRESCALER_4x : XR_CLK_PRESCALER_1x), + ((prescaler > 1) ? XR_CLK_PRESCALER_4x : XR_CLK_PRESCALER_1x), }; writeData(handle, XR_REG_MCR, &mcr, sizeof(mcr)); @@ -390,7 +391,7 @@ UART_Handle XR20M1170_open(UART_Handle handle, UART_Params *params) const XR20M1170_HWAttrs *hwAttrs = handle->hwAttrs; if (object->state.opened == true) { - //Log_warning1("UART:(%p) already in use.", hwAttrs->baseAddr); + // Log_warning1("UART:(%p) already in use.", hwAttrs->baseAddr); return NULL; } diff --git a/firmware/ec/src/devices/i2c/XR20M1170.h b/firmware/ec/src/devices/i2c/XR20M1170.h index 4ace1044ca..c11e98c78a 100644 --- a/firmware/ec/src/devices/i2c/XR20M1170.h +++ b/firmware/ec/src/devices/i2c/XR20M1170.h @@ -11,17 +11,17 @@ #pragma once #ifndef XR20M1170_H_ -#define XR20M1170_H_ +# define XR20M1170_H_ -#include "drivers/OcGpio.h" +# include "drivers/OcGpio.h" -#include -#include -#include -#include -#include +# include +# include +# include +# include +# include -#include +# include typedef enum XR20M1170_FlowControl { XR20M1170_FLOWCONTROL_TX = 0x01, // Enable auto CTS @@ -88,8 +88,8 @@ typedef struct XR20M1170_Object { I2C_Handle i2cHandle; // TODO: these are from UART_Tiva - need to revise the struct members - // Clock_Struct timeoutClk; /* Clock object to for timeouts */ - // uint32_t baudRate; /* Baud rate for UART */ + // Clock_Struct timeoutClk; /* Clock object to for timeouts + // */ uint32_t baudRate; /* Baud rate for UART */ // UART_LEN dataLength; /* Data length for UART */ // UART_STOP stopBits; /* Stop bits for UART */ // UART_PAR parityType; /* Parity bit type for UART */ @@ -97,11 +97,11 @@ typedef struct XR20M1170_Object { // /* UART read variables */ RingBuf_Object ringBuffer; /* local circular buffer object */ GateMutex_Handle ringBufMutex; // Mutex for accessing ring buffer - // /* A complement pair of read functions for both the ISR and UART_read() */ - // UARTTiva_FxnSet readFxns; - // unsigned char *readBuf; /* Buffer data pointer */ - // size_t readSize; /* Desired number of bytes to read */ - // size_t readCount; /* Number of bytes left to read */ + // /* A complement pair of read functions for both the ISR and + // UART_read() */ UARTTiva_FxnSet readFxns; unsigned char *readBuf; + // /* Buffer data pointer */ size_t readSize; /* + // Desired number of bytes to read */ size_t readCount; /* + // Number of bytes left to read */ Semaphore_Handle readSem; /* UART read semaphore */ unsigned int readTimeout; /* Timeout for read semaphore */ @@ -109,8 +109,9 @@ typedef struct XR20M1170_Object { // // /* UART write variables */ // const unsigned char *writeBuf; /* Buffer data pointer */ - // size_t writeSize; /* Desired number of bytes to write*/ - // size_t writeCount; /* Number of bytes left to write */ + // size_t writeSize; /* Desired number of bytes to + // write*/ size_t writeCount; /* Number of bytes left + // to write */ Semaphore_Handle writeSem; /* UART write semaphore*/ unsigned int writeTimeout; /* Timeout for write semaphore */ // UART_Callback writeCallback; /* Pointer to write callback */ diff --git a/firmware/ec/src/devices/i2c/XR20M1170_Registers.h b/firmware/ec/src/devices/i2c/XR20M1170_Registers.h index d657139952..9e82cfc2ff 100644 --- a/firmware/ec/src/devices/i2c/XR20M1170_Registers.h +++ b/firmware/ec/src/devices/i2c/XR20M1170_Registers.h @@ -15,12 +15,12 @@ #pragma once #ifndef XR20M1170_REGISTERS_H_ -#define XR20M1170_REGISTERS_H_ +# define XR20M1170_REGISTERS_H_ -#include -#include +# include +# include -#include "helpers/attribute.h" +# include "helpers/attribute.h" typedef enum XrRegister { XR_REG_RHR = 0x00, // LCR[7] = 0 (read only) @@ -224,7 +224,8 @@ typedef enum ISR_SRC { typedef struct PACKED XrRegIsr { ISR_SRC source : 6; - uint8_t fifo_en : 2; // TODO: not sure why there's 2...datasheet doesn't elaborate - possibly TX vs RX, but it doesn't say + uint8_t fifo_en : 2; // TODO: not sure why there's 2...datasheet doesn't + // elaborate - possibly TX vs RX, but it doesn't say } XrRegIsr; // General struct for configuring gpio pins diff --git a/firmware/ec/src/devices/i2c/threaded_int.h b/firmware/ec/src/devices/i2c/threaded_int.h index 891b77587e..a0362c4426 100644 --- a/firmware/ec/src/devices/i2c/threaded_int.h +++ b/firmware/ec/src/devices/i2c/threaded_int.h @@ -10,9 +10,9 @@ #pragma once #ifndef DEVICES_I2C_THREADED_INT_H_ -#define DEVICES_I2C_THREADED_INT_H_ +# define DEVICES_I2C_THREADED_INT_H_ -#include "drivers/OcGpio.h" +# include "drivers/OcGpio.h" typedef void (*ThreadedInt_Callback)(void *context); diff --git a/firmware/ec/src/devices/i2cbus.c b/firmware/ec/src/devices/i2cbus.c index 0e8232602a..0e8054ef84 100644 --- a/firmware/ec/src/devices/i2cbus.c +++ b/firmware/ec/src/devices/i2cbus.c @@ -98,13 +98,14 @@ ReturnStatus i2c_reg_write(I2C_Handle i2cHandle, uint8_t deviceAddress, i2cTransaction.readBuf = NULL; i2cTransaction.readCount = 0; if (I2C_transfer(i2cHandle, &i2cTransaction)) { - //LOGGER_DEBUG("I2CBUS:INFO:: I2C write success for device: 0x%x reg Addr: 0x%x value: 0x%x.\n", + // LOGGER_DEBUG("I2CBUS:INFO:: I2C write success for device: 0x%x reg + // Addr: 0x%x value: 0x%x.\n", // deviceAddress, regAddress, value); status = RETURN_OK; } else { LOGGER_ERROR( - "I2CBUS:ERROR:: I2C write failed for for device: 0x%x reg Addr: 0x%x value: 0x%x.\n", - deviceAddress, regAddress, value); + "I2CBUS:ERROR:: I2C write failed for for device: 0x%x reg Addr: 0x%x value: 0x%x.\n", + deviceAddress, regAddress, value); status = RETURN_NOTOK; } return status; @@ -136,13 +137,14 @@ ReturnStatus i2c_reg_read(I2C_Handle i2cHandle, uint8_t deviceAddress, i2cTransaction.readCount = numofBytes; if (I2C_transfer(i2cHandle, &i2cTransaction)) { memcpy(value, rxBuffer, numofBytes); - //LOGGER_DEBUG("I2CBUS:INFO:: I2C read success for device: 0x%x reg Addr: 0x%x value : 0x%x.\n", + // LOGGER_DEBUG("I2CBUS:INFO:: I2C read success for device: 0x%x reg + // Addr: 0x%x value : 0x%x.\n", // deviceAddress, regAddress, *value); status = RETURN_OK; } else { LOGGER_ERROR( - "I2CBUS:ERROR:: I2C read failed for for device: 0x%x reg Addr: 0x%x.\n", - deviceAddress, regAddress); + "I2CBUS:ERROR:: I2C read failed for for device: 0x%x reg Addr: 0x%x.\n", + deviceAddress, regAddress); status = RETURN_NOTOK; } return status; diff --git a/firmware/ec/src/devices/ina226.c b/firmware/ec/src/devices/ina226.c index a0ff69eb88..492aa07ba1 100644 --- a/firmware/ec/src/devices/ina226.c +++ b/firmware/ec/src/devices/ina226.c @@ -69,9 +69,9 @@ /* Configure Calibration register with shunt resistor value and current LSB. Current_LSB = Maximum Expected Current/2^15 - Current_LSB = 2A/2^15 = 0.00006103515625 = 61uA ~ 100uA(Maximum Expected Current = 2A) - Calibration Register(CAL) = 0.00512/(Current_LSB*RSHUNT) - CAL = 0.00512/(100uA*2mOhm) = = 25600 = 0x6400.(RSHUNT = 2mohm) + Current_LSB = 2A/2^15 = 0.00006103515625 = 61uA ~ 100uA(Maximum Expected + Current = 2A) Calibration Register(CAL) = 0.00512/(Current_LSB*RSHUNT) CAL = + 0.00512/(100uA*2mOhm) = = 25600 = 0x6400.(RSHUNT = 2mohm) */ #define INA226_CAL_REG_VALUE 0x6400 @@ -543,7 +543,8 @@ ReturnStatus ina226_enableAlert(INA226_Dev *dev, INA226_Event evt) } alert_mask &= (~INA_ALERT_EN_MASK); /* Wipe out previous alert EN bits */ - //alert_mask |= (INA_MSK_LEN); /* Enable latch mode (never miss an alert) */ + // alert_mask |= (INA_MSK_LEN); /* Enable latch mode (never miss an alert) + // */ dev->obj.evt_to_monitor = evt; switch (evt) { case INA226_EVT_COL: diff --git a/firmware/ec/src/devices/led.c b/firmware/ec/src/devices/led.c index e307d9ce1c..92640f7e78 100644 --- a/firmware/ec/src/devices/led.c +++ b/firmware/ec/src/devices/led.c @@ -47,8 +47,9 @@ */ /* LED arrangements - Left: D8 => D17 => D18 => D19 => D20 => D21 => D22 ( From Left Bottom to Top Centre) - Right: D23 => D31 => D24 => D25 => D26 => D27 => D28 ( From Top centre to Right Bottom) + Left: D8 => D17 => D18 => D19 => D20 => D21 => D22 ( From Left Bottom to Top + Centre) Right: D23 => D31 => D24 => D25 => D26 => D27 => D28 ( From Top centre + to Right Bottom) Green from D8 to D28: Left: IO5 => IO3 => IO13 => IO1 => IO7 => IO9 => IO11 @@ -64,117 +65,117 @@ IO14 & IO15 = 1(Not connected IOs; Reg Data should be 11xxxxxx). */ static const hciLedData ledData[HCI_LED_TOTAL_NOS] = - { [HCI_LED_1] = - { - .ioexpDev = HCI_LED_DRIVER_LEFT, - .ledReg = SX1509_REG_A, - .ledGreen = ~SX1509_IO_PIN_5, // IO5 - .ledRed = ~SX1509_IO_PIN_4, // IO4 - .ledOff = SX1509_IO_PIN_5 | SX1509_IO_PIN_4, - }, - [HCI_LED_2] = - { - .ioexpDev = HCI_LED_DRIVER_LEFT, - .ledReg = SX1509_REG_A, - .ledGreen = ~SX1509_IO_PIN_3, // IO3 - .ledRed = ~SX1509_IO_PIN_2, // IO2 - .ledOff = SX1509_IO_PIN_3 | SX1509_IO_PIN_2, - }, - [HCI_LED_3] = - { - .ioexpDev = HCI_LED_DRIVER_LEFT, - .ledReg = SX1509_REG_B, - .ledGreen = ~SX1509_IO_PIN_13, // IO13 - .ledRed = ~SX1509_IO_PIN_12, // IO12 - .ledOff = SX1509_IO_PIN_13 | SX1509_IO_PIN_12, - }, - [HCI_LED_4] = - { - .ioexpDev = HCI_LED_DRIVER_LEFT, - .ledReg = SX1509_REG_A, - .ledGreen = ~SX1509_IO_PIN_1, // IO1 - .ledRed = ~SX1509_IO_PIN_0, // IO0 - .ledOff = SX1509_IO_PIN_1 | SX1509_IO_PIN_0, - }, - [HCI_LED_5] = - { - .ioexpDev = HCI_LED_DRIVER_LEFT, - .ledReg = SX1509_REG_A, - .ledGreen = ~SX1509_IO_PIN_7, // IO7 - .ledRed = ~SX1509_IO_PIN_6, // IO6 - .ledOff = SX1509_IO_PIN_7 | SX1509_IO_PIN_6, - }, - [HCI_LED_6] = - { - .ioexpDev = HCI_LED_DRIVER_LEFT, - .ledReg = SX1509_REG_B, - .ledGreen = ~SX1509_IO_PIN_9, // IO9 - .ledRed = ~SX1509_IO_PIN_8, // IO8 - .ledOff = SX1509_IO_PIN_9 | SX1509_IO_PIN_8, - }, - [HCI_LED_7] = - { - .ioexpDev = HCI_LED_DRIVER_LEFT, - .ledReg = SX1509_REG_B, - .ledGreen = ~SX1509_IO_PIN_11, // IO11 - .ledRed = ~SX1509_IO_PIN_10, // I010 - .ledOff = SX1509_IO_PIN_11 | SX1509_IO_PIN_10, - }, - [HCI_LED_8] = - { - .ioexpDev = HCI_LED_DRIVER_RIGHT, - .ledReg = SX1509_REG_A, - .ledGreen = ~SX1509_IO_PIN_5, // IO5 - .ledRed = ~SX1509_IO_PIN_4, // IO4 - .ledOff = SX1509_IO_PIN_5 | SX1509_IO_PIN_4, - }, - [HCI_LED_9] = - { - .ioexpDev = HCI_LED_DRIVER_RIGHT, - .ledReg = SX1509_REG_A, - .ledGreen = ~SX1509_IO_PIN_3, // IO3 - .ledRed = ~SX1509_IO_PIN_2, // IO2 - .ledOff = SX1509_IO_PIN_3 | SX1509_IO_PIN_2, - }, - [HCI_LED_10] = - { - .ioexpDev = HCI_LED_DRIVER_RIGHT, - .ledReg = SX1509_REG_A, - .ledGreen = ~SX1509_IO_PIN_1, // IO1 - .ledRed = ~SX1509_IO_PIN_0, // IO0 - .ledOff = SX1509_IO_PIN_1 | SX1509_IO_PIN_0, - }, - [HCI_LED_11] = - { - .ioexpDev = HCI_LED_DRIVER_RIGHT, - .ledReg = SX1509_REG_A, - .ledGreen = ~SX1509_IO_PIN_7, // IO7 - .ledRed = ~SX1509_IO_PIN_6, // IO6 - .ledOff = SX1509_IO_PIN_7 | SX1509_IO_PIN_6, - }, - [HCI_LED_12] = - { - .ioexpDev = HCI_LED_DRIVER_RIGHT, - .ledReg = SX1509_REG_B, - .ledGreen = ~SX1509_IO_PIN_9, // IO9 - .ledRed = ~SX1509_IO_PIN_8, // IO8 - .ledOff = SX1509_IO_PIN_9 | SX1509_IO_PIN_8, - }, - [HCI_LED_13] = - { - .ioexpDev = HCI_LED_DRIVER_RIGHT, - .ledReg = SX1509_REG_B, - .ledGreen = ~SX1509_IO_PIN_11, // IO11 - .ledRed = ~SX1509_IO_PIN_10, // IO10 - .ledOff = SX1509_IO_PIN_11 | SX1509_IO_PIN_10, - }, - [HCI_LED_14] = { - .ioexpDev = HCI_LED_DRIVER_RIGHT, - .ledReg = SX1509_REG_B, - .ledGreen = ~SX1509_IO_PIN_13, // IO13 - .ledRed = ~SX1509_IO_PIN_12, // IO12 - .ledOff = SX1509_IO_PIN_13 | SX1509_IO_PIN_12, - } }; + { [HCI_LED_1] = + { + .ioexpDev = HCI_LED_DRIVER_LEFT, + .ledReg = SX1509_REG_A, + .ledGreen = ~SX1509_IO_PIN_5, // IO5 + .ledRed = ~SX1509_IO_PIN_4, // IO4 + .ledOff = SX1509_IO_PIN_5 | SX1509_IO_PIN_4, + }, + [HCI_LED_2] = + { + .ioexpDev = HCI_LED_DRIVER_LEFT, + .ledReg = SX1509_REG_A, + .ledGreen = ~SX1509_IO_PIN_3, // IO3 + .ledRed = ~SX1509_IO_PIN_2, // IO2 + .ledOff = SX1509_IO_PIN_3 | SX1509_IO_PIN_2, + }, + [HCI_LED_3] = + { + .ioexpDev = HCI_LED_DRIVER_LEFT, + .ledReg = SX1509_REG_B, + .ledGreen = ~SX1509_IO_PIN_13, // IO13 + .ledRed = ~SX1509_IO_PIN_12, // IO12 + .ledOff = SX1509_IO_PIN_13 | SX1509_IO_PIN_12, + }, + [HCI_LED_4] = + { + .ioexpDev = HCI_LED_DRIVER_LEFT, + .ledReg = SX1509_REG_A, + .ledGreen = ~SX1509_IO_PIN_1, // IO1 + .ledRed = ~SX1509_IO_PIN_0, // IO0 + .ledOff = SX1509_IO_PIN_1 | SX1509_IO_PIN_0, + }, + [HCI_LED_5] = + { + .ioexpDev = HCI_LED_DRIVER_LEFT, + .ledReg = SX1509_REG_A, + .ledGreen = ~SX1509_IO_PIN_7, // IO7 + .ledRed = ~SX1509_IO_PIN_6, // IO6 + .ledOff = SX1509_IO_PIN_7 | SX1509_IO_PIN_6, + }, + [HCI_LED_6] = + { + .ioexpDev = HCI_LED_DRIVER_LEFT, + .ledReg = SX1509_REG_B, + .ledGreen = ~SX1509_IO_PIN_9, // IO9 + .ledRed = ~SX1509_IO_PIN_8, // IO8 + .ledOff = SX1509_IO_PIN_9 | SX1509_IO_PIN_8, + }, + [HCI_LED_7] = + { + .ioexpDev = HCI_LED_DRIVER_LEFT, + .ledReg = SX1509_REG_B, + .ledGreen = ~SX1509_IO_PIN_11, // IO11 + .ledRed = ~SX1509_IO_PIN_10, // I010 + .ledOff = SX1509_IO_PIN_11 | SX1509_IO_PIN_10, + }, + [HCI_LED_8] = + { + .ioexpDev = HCI_LED_DRIVER_RIGHT, + .ledReg = SX1509_REG_A, + .ledGreen = ~SX1509_IO_PIN_5, // IO5 + .ledRed = ~SX1509_IO_PIN_4, // IO4 + .ledOff = SX1509_IO_PIN_5 | SX1509_IO_PIN_4, + }, + [HCI_LED_9] = + { + .ioexpDev = HCI_LED_DRIVER_RIGHT, + .ledReg = SX1509_REG_A, + .ledGreen = ~SX1509_IO_PIN_3, // IO3 + .ledRed = ~SX1509_IO_PIN_2, // IO2 + .ledOff = SX1509_IO_PIN_3 | SX1509_IO_PIN_2, + }, + [HCI_LED_10] = + { + .ioexpDev = HCI_LED_DRIVER_RIGHT, + .ledReg = SX1509_REG_A, + .ledGreen = ~SX1509_IO_PIN_1, // IO1 + .ledRed = ~SX1509_IO_PIN_0, // IO0 + .ledOff = SX1509_IO_PIN_1 | SX1509_IO_PIN_0, + }, + [HCI_LED_11] = + { + .ioexpDev = HCI_LED_DRIVER_RIGHT, + .ledReg = SX1509_REG_A, + .ledGreen = ~SX1509_IO_PIN_7, // IO7 + .ledRed = ~SX1509_IO_PIN_6, // IO6 + .ledOff = SX1509_IO_PIN_7 | SX1509_IO_PIN_6, + }, + [HCI_LED_12] = + { + .ioexpDev = HCI_LED_DRIVER_RIGHT, + .ledReg = SX1509_REG_B, + .ledGreen = ~SX1509_IO_PIN_9, // IO9 + .ledRed = ~SX1509_IO_PIN_8, // IO8 + .ledOff = SX1509_IO_PIN_9 | SX1509_IO_PIN_8, + }, + [HCI_LED_13] = + { + .ioexpDev = HCI_LED_DRIVER_RIGHT, + .ledReg = SX1509_REG_B, + .ledGreen = ~SX1509_IO_PIN_11, // IO11 + .ledRed = ~SX1509_IO_PIN_10, // IO10 + .ledOff = SX1509_IO_PIN_11 | SX1509_IO_PIN_10, + }, + [HCI_LED_14] = { + .ioexpDev = HCI_LED_DRIVER_RIGHT, + .ledReg = SX1509_REG_B, + .ledGreen = ~SX1509_IO_PIN_13, // IO13 + .ledRed = ~SX1509_IO_PIN_12, // IO12 + .ledOff = SX1509_IO_PIN_13 | SX1509_IO_PIN_12, + } }; /***************************************************************************** ** FUNCTION NAME : hci_led_turnon_green @@ -298,11 +299,12 @@ static ReturnStatus hci_led_configure_onofftime(const HciLedCfg *driver) /* Configure LED driver parameters(RegTOn, RegOff) for Left side LEDs */ status = hci_led_configure_sx1509_onofftime( - &driver->sx1509_dev[HCI_LED_DRIVER_LEFT]); + &driver->sx1509_dev[HCI_LED_DRIVER_LEFT]); if (status == RETURN_OK) { - /* Configure LED driver parameters(RegTOn, RegOff) for Right side LEDs */ + /* Configure LED driver parameters(RegTOn, RegOff) for Right side LEDs + */ hci_led_configure_sx1509_onofftime( - &driver->sx1509_dev[HCI_LED_DRIVER_RIGHT]); + &driver->sx1509_dev[HCI_LED_DRIVER_RIGHT]); } return status; } @@ -332,14 +334,14 @@ ReturnStatus hci_led_system_boot(const HciLedCfg *driver) /* Turn on the LEDs one by one from Left to Right of LED Board */ for (index = 0; index < HCI_LED_TOTAL_NOS; index++) { status = - ioexp_led_get_data(&driver->sx1509_dev[ledData[index].ioexpDev], - ledData[index].ledReg, ®Value); + ioexp_led_get_data(&driver->sx1509_dev[ledData[index].ioexpDev], + ledData[index].ledReg, ®Value); regValue &= ledData[index].ledGreen; status = - ioexp_led_set_data(&driver->sx1509_dev[ledData[index].ioexpDev], - ledData[index].ledReg, regValue, 0); + ioexp_led_set_data(&driver->sx1509_dev[ledData[index].ioexpDev], + ledData[index].ledReg, regValue, 0); if (status != RETURN_OK) { break; } @@ -434,8 +436,8 @@ ReturnStatus hci_led_radio_failure(const HciLedCfg *driver) status = hci_led_turnoff_all(driver); if (status == RETURN_OK) { /* Turn On Left side Red LEDs */ - status = ioexp_led_set_data(HCI_LED_DRIVER_LEFT, SX1509_REG_AB, 0xAA, - 0xAA); + status = + ioexp_led_set_data(HCI_LED_DRIVER_LEFT, SX1509_REG_AB, 0xAA, 0xAA); } return status; @@ -486,11 +488,13 @@ ReturnStatus led_init(const HciLedCfg *driver) - Disable input buffer (RegInputDisable) - Disable pull-up (RegPullUp) - Enable open drain (RegOpenDrain) - - Set direction to output (RegDir) – by default RegData is set high => LED OFF + - Set direction to output (RegDir) – by default RegData is set high => LED + OFF - Enable oscillator (RegClock) - Configure LED driver clock and mode if relevant (RegMisc) - Enable LED driver operation (RegLEDDriverEnable) - - Configure LED driver parameters (RegTOn, RegIOn, RegOff, RegTRise, RegTFall) + - Configure LED driver parameters (RegTOn, RegIOn, RegOff, RegTRise, + RegTFall) - Set RegData bit low => LED driver started */ @@ -543,8 +547,8 @@ ReturnStatus led_init(const HciLedCfg *driver) } /* Configure LED driver clock and mode if relevant (RegMisc) */ - status = ioexp_led_config_misc(&driver->sx1509_dev[index], - REG_MISC_VALUE); + status = + ioexp_led_config_misc(&driver->sx1509_dev[index], REG_MISC_VALUE); if (status != RETURN_OK) { return status; } @@ -586,14 +590,15 @@ ePostCode led_probe(const HciLedCfg *driver, POSTData *postData) /* Read Test Register 1 of LED driver SX1509 of Left LED Module(RegTest1) */ status = ioexp_led_read_testregister_1( - &driver->sx1509_dev[HCI_LED_DRIVER_LEFT], ®Value); + &driver->sx1509_dev[HCI_LED_DRIVER_LEFT], ®Value); if (status != RETURN_OK) { return POST_DEV_MISSING; } - /* Read Test Register 1 of LED driver SX1509 of Right LED Module(RegTest1) */ + /* Read Test Register 1 of LED driver SX1509 of Right LED Module(RegTest1) + */ status |= ioexp_led_read_testregister_1( - &driver->sx1509_dev[HCI_LED_DRIVER_RIGHT], ®Value); + &driver->sx1509_dev[HCI_LED_DRIVER_RIGHT], ®Value); if (status != RETURN_OK) { return POST_DEV_MISSING; } diff --git a/firmware/ec/src/devices/ltc4015.c b/firmware/ec/src/devices/ltc4015.c index bb5ff3fe56..4cb68be55a 100644 --- a/firmware/ec/src/devices/ltc4015.c +++ b/firmware/ec/src/devices/ltc4015.c @@ -63,7 +63,7 @@ ReturnStatus LTC4015_cfg_icharge(LTC4015_Dev *dev, /* Maximum charge current target = (ICHARGE_TARGET + 1) * 1mV/RSNSB => ICHARGE_TARGET = (target*RSNSB/1mV)-1 */ int icharge_target = - round((max_chargeCurrent * dev->cfg.r_snsb) / 1000.0) - 1; + round((max_chargeCurrent * dev->cfg.r_snsb) / 1000.0) - 1; icharge_target = MAX(0, icharge_target); return LTC4015_reg_write(dev, LTC4015_ICHARGE_TARGET_SUBADDR, icharge_target); @@ -74,8 +74,8 @@ ReturnStatus LTC4015_get_cfg_icharge(LTC4015_Dev *dev, { /* Maximum charge current target = (ICHARGE_TARGET + 1) * 1mV/RSNSB */ uint16_t ichargeCurrent = 0x0000; - ReturnStatus status = LTC4015_reg_read(dev, LTC4015_ICHARGE_TARGET_SUBADDR, - &ichargeCurrent); + ReturnStatus status = + LTC4015_reg_read(dev, LTC4015_ICHARGE_TARGET_SUBADDR, &ichargeCurrent); *max_chargeCurrent = (ichargeCurrent + 1) * 1000 / dev->cfg.r_snsb; return status; } @@ -111,8 +111,8 @@ LTC4015_get_cfg_vcharge(LTC4015_Dev *dev, { /* See datasheet, page 61:VCHARGE_SETTING */ uint16_t vchargeSetting = 0x0000; - ReturnStatus status = LTC4015_reg_read(dev, LTC4015_VCHARGE_SETTING_SUBADDR, - &vchargeSetting); + ReturnStatus status = + LTC4015_reg_read(dev, LTC4015_VCHARGE_SETTING_SUBADDR, &vchargeSetting); switch (dev->cfg.chem) { case LTC4015_CHEM_LEAD_ACID: *charge_voltageLevel = round(((vchargeSetting / 105.0) + 2.0) * @@ -152,7 +152,7 @@ static uint16_t voltage_to_vbat_reg(LTC4015_Dev *dev, int16_t voltage) } ReturnStatus LTC4015_cfg_battery_voltage_low(LTC4015_Dev *dev, - int16_t underVoltage) //millivolts + int16_t underVoltage) // millivolts { /* See datasheet, page 56:VBAT_LO_ALERT_LIMIT under voltage limit = [VBAT_*_ALERT_LIMIT] • x(uV) */ @@ -180,18 +180,18 @@ static int16_t vbat_reg_to_voltage(LTC4015_Dev *dev, uint16_t vbat_reg) ReturnStatus LTC4015_get_cfg_battery_voltage_low(LTC4015_Dev *dev, - int16_t *underVolatage) //millivolts + int16_t *underVolatage) // millivolts { /* See datasheet, page 56 */ uint16_t vbatLoLimit = 0x0000; ReturnStatus status = LTC4015_reg_read( - dev, LTC4015_VBAT_LO_ALERT_LIMIT_SUBADDR, &vbatLoLimit); + dev, LTC4015_VBAT_LO_ALERT_LIMIT_SUBADDR, &vbatLoLimit); *underVolatage = vbat_reg_to_voltage(dev, vbatLoLimit); return status; } ReturnStatus LTC4015_cfg_battery_voltage_high(LTC4015_Dev *dev, - int16_t overVoltage) //millivolts + int16_t overVoltage) // millivolts { /* See datasheet, page 56:VBAT_HI_ALERT_LIMIT under voltage limit = [VBAT_*_ALERT_LIMIT] • x(uV) */ @@ -201,12 +201,12 @@ ReturnStatus LTC4015_cfg_battery_voltage_high(LTC4015_Dev *dev, ReturnStatus LTC4015_get_cfg_battery_voltage_high(LTC4015_Dev *dev, - int16_t *overVoltage) //millivolts + int16_t *overVoltage) // millivolts { /* See datasheet, page 56 */ uint16_t vbatHiLimit = 0x0000; ReturnStatus status = LTC4015_reg_read( - dev, LTC4015_VBAT_HI_ALERT_LIMIT_SUBADDR, &vbatHiLimit); + dev, LTC4015_VBAT_HI_ALERT_LIMIT_SUBADDR, &vbatHiLimit); *overVoltage = vbat_reg_to_voltage(dev, vbatHiLimit); return status; } @@ -224,13 +224,13 @@ LTC4015_cfg_input_voltage_low(LTC4015_Dev *dev, ReturnStatus LTC4015_get_cfg_input_voltage_low(LTC4015_Dev *dev, - int16_t *inpUnderVoltage) //millivolts + int16_t *inpUnderVoltage) // millivolts { /* See datasheet, page 56 * VIN_LO_ALERT_LIMIT = (inpUnderVoltage/(1.648)) */ uint16_t vInLoAlertLimit = 0x0000; ReturnStatus status = LTC4015_reg_read( - dev, LTC4015_VIN_LO_ALERT_LIMIT_SUBADDR, &vInLoAlertLimit); + dev, LTC4015_VIN_LO_ALERT_LIMIT_SUBADDR, &vInLoAlertLimit); *inpUnderVoltage = (int16_t)vInLoAlertLimit * 1.648; return status; } @@ -253,7 +253,7 @@ ReturnStatus LTC4015_get_cfg_input_current_high(LTC4015_Dev *dev, * IIN_HI_ALERT_LIMIT = ((inpOverCurrent*PWR_INT_BATT_RSNSI)/(1.46487)) */ uint16_t iInHiALertLimit = 0x0000; ReturnStatus status = LTC4015_reg_read( - dev, LTC4015_IIN_HI_ALERT_LIMIT_SUBADDR, &iInHiALertLimit); + dev, LTC4015_IIN_HI_ALERT_LIMIT_SUBADDR, &iInHiALertLimit); *inpOverCurrent = ((int16_t)iInHiALertLimit * 1.46487) / dev->cfg.r_snsi; return status; } @@ -275,7 +275,7 @@ ReturnStatus LTC4015_get_cfg_battery_current_low(LTC4015_Dev *dev, * IBAT_LO_ALERT_LIMIT = ((current*PWR_INT_BATT_RSNSB)/(1.46487)) */ uint16_t iBatLoAlertLimit = 0x0000; ReturnStatus status = LTC4015_reg_read( - dev, LTC4015_IBAT_LO_ALERT_LIMIT_SUBADDR, &iBatLoAlertLimit); + dev, LTC4015_IBAT_LO_ALERT_LIMIT_SUBADDR, &iBatLoAlertLimit); *lowbattCurrent = ((int16_t)iBatLoAlertLimit * 1.46487) / dev->cfg.r_snsb; return status; } @@ -297,7 +297,7 @@ ReturnStatus LTC4015_get_cfg_die_temperature_high(LTC4015_Dev *dev, * DIE_TEMP_HI_ALERT_LIMIT = (dieTemp • 12010)/45.6°C */ uint16_t dieTempAlertLimit = 0x0000; ReturnStatus status = LTC4015_reg_read( - dev, LTC4015_DIE_TEMP_HI_ALERT_LIMIT_SUBADDR, &dieTempAlertLimit); + dev, LTC4015_DIE_TEMP_HI_ALERT_LIMIT_SUBADDR, &dieTempAlertLimit); *dieTemp = (((int16_t)dieTempAlertLimit - 12010) / 45.6); return status; } @@ -310,20 +310,20 @@ LTC4015_cfg_input_current_limit(LTC4015_Dev *dev, IIN_LIMIT_SETTING = (limit * RSNSI / 500uV) - 1 */ /* TODO: range check? this is only a 6-bit register */ uint16_t iInLimitSetting = - ((inputCurrentLimit * dev->cfg.r_snsi) / 500) - 1; + ((inputCurrentLimit * dev->cfg.r_snsi) / 500) - 1; return LTC4015_reg_write(dev, LTC4015_IIN_LIMIT_SETTING_SUBADDR, iInLimitSetting); } ReturnStatus LTC4015_get_cfg_input_current_limit(LTC4015_Dev *dev, - uint16_t *currentLimit) //milli Amps + uint16_t *currentLimit) // milli Amps { /* See datasheet, page 56 * Input current limit setting = (IIN_LIMIT_SETTING + 1) • 500uV / RSNSI */ uint16_t iInlimitSetting = 0x0000; ReturnStatus status = LTC4015_reg_read( - dev, LTC4015_IIN_LIMIT_SETTING_SUBADDR, &iInlimitSetting); + dev, LTC4015_IIN_LIMIT_SETTING_SUBADDR, &iInlimitSetting); *currentLimit = ((iInlimitSetting + 1) * 500.0) / dev->cfg.r_snsi; return status; } @@ -334,73 +334,73 @@ ReturnStatus LTC4015_get_die_temperature(LTC4015_Dev *dev, /* Datasheet page 71: temperature = (DIE_TEMP • 12010)/45.6°C */ uint16_t dieTemperature = 0x0000; ReturnStatus status = - LTC4015_reg_read(dev, LTC4015_DIE_TEMP_SUBADDR, &dieTemperature); + LTC4015_reg_read(dev, LTC4015_DIE_TEMP_SUBADDR, &dieTemperature); *dieTemp = (((int16_t)dieTemperature - 12010) / 45.6); return status; } ReturnStatus LTC4015_get_battery_current(LTC4015_Dev *dev, - int16_t *iBatt) //milliAmps + int16_t *iBatt) // milliAmps { /* Page 70: Battery current = [IBAT] * 1.46487uV/Rsnsb */ uint16_t batteryCurrent = 0x0000; ReturnStatus status = - LTC4015_reg_read(dev, LTC4015_IBAT_SUBADDR, &batteryCurrent); + LTC4015_reg_read(dev, LTC4015_IBAT_SUBADDR, &batteryCurrent); *iBatt = ((float)((int16_t)batteryCurrent * 1.46487)) / (dev->cfg.r_snsb); return status; } ReturnStatus LTC4015_get_input_current(LTC4015_Dev *dev, - int16_t *iIn) //milliAmps + int16_t *iIn) // milliAmps { /* Page 71: Input current = [IIN] • 1.46487uV/Rsnsi */ uint16_t inputCurrent = 0x0000; ReturnStatus status = - LTC4015_reg_read(dev, LTC4015_IIN_SUBADDR, &inputCurrent); + LTC4015_reg_read(dev, LTC4015_IIN_SUBADDR, &inputCurrent); *iIn = ((float)((int16_t)inputCurrent * 1.46487)) / (dev->cfg.r_snsi); return status; } ReturnStatus LTC4015_get_battery_voltage(LTC4015_Dev *dev, - int16_t *vbat) //milliVolts + int16_t *vbat) // milliVolts { /* Page 71: 2's compliment VBATSENS/cellcount = [VBAT] • [x]uV */ uint16_t batteryVoltage = 0x0000; ReturnStatus status = - LTC4015_reg_read(dev, LTC4015_VBAT_SUBADDR, &batteryVoltage); + LTC4015_reg_read(dev, LTC4015_VBAT_SUBADDR, &batteryVoltage); *vbat = vbat_reg_to_voltage(dev, batteryVoltage); return status; } ReturnStatus LTC4015_get_input_voltage(LTC4015_Dev *dev, - int16_t *vIn) //milliVolts + int16_t *vIn) // milliVolts { /* Page 71: 2's compliment Input voltage = [VIN] • 1.648mV */ uint16_t inputVoltage = 0x0000; ReturnStatus status = - LTC4015_reg_read(dev, LTC4015_VIN_SUBADDR, &inputVoltage); + LTC4015_reg_read(dev, LTC4015_VIN_SUBADDR, &inputVoltage); *vIn = (int16_t)inputVoltage * 1.648; return status; } ReturnStatus LTC4015_get_system_voltage(LTC4015_Dev *dev, - int16_t *vSys) //milliVolts + int16_t *vSys) // milliVolts { /* Page 71: 2's compliment system voltage = [VSYS] • 1.648mV */ uint16_t sysVoltage = 0x0000; ReturnStatus status = - LTC4015_reg_read(dev, LTC4015_VSYS_SUBADDR, &sysVoltage); + LTC4015_reg_read(dev, LTC4015_VSYS_SUBADDR, &sysVoltage); *vSys = (int16_t)sysVoltage * 1.648; return status; } ReturnStatus LTC4015_get_icharge_dac(LTC4015_Dev *dev, - int16_t *icharge) //milliAmps + int16_t *icharge) // milliAmps { /* Page 72: (ICHARGE_DAC + 1) • 1mV/RSNSB */ uint16_t ichargeDAC = 0x0000; ReturnStatus status = - LTC4015_reg_read(dev, LTC4015_ICHARGE_DAC_SUBADDR, &ichargeDAC); + LTC4015_reg_read(dev, LTC4015_ICHARGE_DAC_SUBADDR, &ichargeDAC); *icharge = (int16_t)((ichargeDAC + 1) / dev->cfg.r_snsb); return status; } @@ -445,7 +445,7 @@ static ReturnStatus _read_charger_state_alerts(LTC4015_Dev *dev, static ReturnStatus _read_system_status(LTC4015_Dev *dev, uint16_t *regValue) { ReturnStatus status = - LTC4015_reg_read(dev, LTC4015_SYSTEM_STATUS_SUBADDR, regValue); + LTC4015_reg_read(dev, LTC4015_SYSTEM_STATUS_SUBADDR, regValue); return status; } diff --git a/firmware/ec/src/devices/ltc4015_registers.h b/firmware/ec/src/devices/ltc4015_registers.h index bd09957058..07bf8b7ab0 100644 --- a/firmware/ec/src/devices/ltc4015_registers.h +++ b/firmware/ec/src/devices/ltc4015_registers.h @@ -57,7 +57,8 @@ * 1 : Enable thermistor ratio high (cold battery) alert * 0 : Enable thermistor ratio low (hot battery) alert */ -// Enable limit monitoring and alert notification via SMBALERT - BITS[15:0] 0x0000 +// Enable limit monitoring and alert notification via SMBALERT - BITS[15:0] +// 0x0000 #define LTC4015_EN_LIMIT_ALERTS_SUBADDR 0x0D /* Bit fields: @@ -89,13 +90,17 @@ // Enable charge status alert notification via SMBALERT - BITS[15:0] 0x0000 #define LTC4015_EN_CHARGE_STATUS_ALERTS_SUBADDR 0x0F -// Coulomb counter QCOUNT low alert limit, same format as QCOUNT (0x13) - BITS[15:0] : 0x0000 +// Coulomb counter QCOUNT low alert limit, same format as QCOUNT (0x13) - +// BITS[15:0] : 0x0000 #define LTC4015_QCOUNT_LO_ALERT_LIMIT_SUBADDR 0x10 -// Coulomb counter QCOUNT high alert limit, same format as QCOUNT (0x13) - BITS[15:0] : 0x0000 +// Coulomb counter QCOUNT high alert limit, same format as QCOUNT (0x13) - +// BITS[15:0] : 0x0000 #define LTC4015_QCOUNT_HI_ALERT_LIMIT_SUBADDR 0x11 -// Coulomb counter prescale factor - BITS[15:0] : 0x0200 +// Coulomb counter prescale factor - +// BITS[15:0] : 0x0200 #define LTC4015_QCOUNT_PRESCALE_FACTOR_SUBADDR 0x12 -// Coulomb counter value - BITS[15:0] : 0x8000 +// Coulomb counter value - +// BITS[15:0] : 0x8000 #define LTC4015_QCOUNT_SUBADDR 0x13 /* Bit fields: @@ -112,19 +117,24 @@ // Configuration Settings - BITS[15:0] : 0x0000 #define LTC4015_CONFIG_BITS_SUBADDR 0x14 -// Input current limit setting = (IIN_LIMIT_SETTING + 1) • 500uV / RSNSI - BITS[5:0] : 0x3F +// Input current limit setting = (IIN_LIMIT_SETTING + 1) • 500uV / RSNSI - +// BITS[5:0] : 0x3F #define LTC4015_IIN_LIMIT_SETTING_SUBADDR 0x15 -// UVCLFB input undervoltage limit = (VIN_UVCL_SETTING + 1) • 4.6875mV - BITS[7:0] : 0xFF +// UVCLFB input undervoltage limit = (VIN_UVCL_SETTING + 1) • 4.6875mV - +// BITS[7:0] : 0xFF #define LTC4015_VIN_UVCL_SETTING_SUBADDR 0x16 #define LTC4015_RESERVED_0X17_SUBADDR 0x17 #define LTC4015_RESERVED_0X18_SUBADDR 0x18 // Write 0x534D to arm ship mode. Once armed, ship mode cannot be disarmed. #define LTC4015_ARM_SHIP_MODE_SUBADDR 0x19 -// Maximum charge current target = (ICHARGE_TARGET + 1) • 1mV/RSNSB - BITS[4:0] +// Maximum charge current target = (ICHARGE_TARGET + 1) • 1mV/RSNSB - +// BITS[4:0] #define LTC4015_ICHARGE_TARGET_SUBADDR 0x1A -// Charge voltage target - BITS[5:0] +// Charge voltage target - +// BITS[5:0] #define LTC4015_VCHARGE_SETTING_SUBADDR 0x1B -// Two’s complement Low IBAT threshold for C/x termination - BITS[15:0] +// Two’s complement Low IBAT threshold for C/x termination - +// BITS[15:0] #define LTC4015_C_OVER_X_THRESHOLD_SUBADDR 0x1C // Time in seconds with battery charger in the CV state before timer termination // occurs (lithium chemistries only) @@ -132,17 +142,23 @@ // Time in seconds before a max_charge_time fault is declared. Set to zero to // disable max_charge_time fault #define LTC4015_MAX_CHARGE_TIME_SUBADDR 0x1E -// Value of NTC_RATIO for transition between JEITA regions 2 and 1 (off) - BITS[15:0] : 0x3F00 +// Value of NTC_RATIO for transition between JEITA regions 2 and 1 (off) - +// BITS[15:0] : 0x3F00 #define LTC4015_JEITA_T1_SUBADDR 0x1F -// Value of NTC_RATIO for transition between JEITA regions 3 and 2 - BITS[15:0] : 0x372A +// Value of NTC_RATIO for transition between JEITA regions 3 and 2 - +// BITS[15:0] : 0x372A #define LTC4015_JEITA_T2_SUBADDR 0x20 -// Value of NTC_RATIO for transition between JEITA regions 4 and 3 - BITS[15:0] : 0x1F27 +// Value of NTC_RATIO for transition between JEITA regions 4 and 3 - +// BITS[15:0] : 0x1F27 #define LTC4015_JEITA_T3_SUBADDR 0x21 -// Value of NTC_RATIO for transition between JEITA regions 5 and 4 - BITS[15:0] : 0x1BCC +// Value of NTC_RATIO for transition between JEITA regions 5 and 4 - +// BITS[15:0] : 0x1BCC #define LTC4015_JEITA_T4_SUBADDR 0x22 -// Value of NTC_RATIO for transition between JEITA regions 6 and 5 - BITS[15:0] : 0x18B9 +// Value of NTC_RATIO for transition between JEITA regions 6 and 5 - +// BITS[15:0] : 0x18B9 #define LTC4015_JEITA_T5_SUBADDR 0x23 -// Value of NTC_RATIO for transition between JEITA regions 7 (off) and 6 - BITS[15:0] : 0x136D +// Value of NTC_RATIO for transition between JEITA regions 7 (off) and 6 - +// BITS[15:0] : 0x136D #define LTC4015_JEITA_T6_SUBADDR 0x24 /* Bit Fields: @@ -170,7 +186,8 @@ * 9:5 : icharge_jeita_6 * 4:0 : icharge_jeita_5 */ -// ICHARGE_TARGET values for JEITA temperature regions 6 and 5 - BITS[15:0] : 0x01EF +// ICHARGE_TARGET values for JEITA temperature regions 6 and 5 - BITS[15:0] +// : 0x01EF #define LTC4015_ICHARGE_JEITA_6_5_SUBADDR 0x27 /* Bit Fields: @@ -180,7 +197,8 @@ * 9:5 : icharge_jeita_3 * 4:0 : icharge_jeita_4 */ -// ICHARGE_TARGET value for JEITA temperature regions 4, 3, and 2 - BITS[15:0] : 0x7FEF +// ICHARGE_TARGET value for JEITA temperature regions 4, 3, and 2 - BITS[15:0] +// : 0x7FEF #define LTC4015_ICHARGE_JEITA_4_3_2_SUBADDR 0x28 /* Bit Fields: @@ -197,11 +215,14 @@ #define LTC4015_VABSORB_DELTA_SUBADDR 0x2A // Maximum time for LiFePO4/lead-acid absorb charge #define LTC4015_MAX_ABSORB_TIME_SUBADDR 0x2B -// Lead-acid equalize charge voltage adder, bits 15:6 are reserved - BITS[15:0] : 0x002A +// Lead-acid equalize charge voltage adder, bits 15:6 are reserved - BITS[15:0] +// : 0x002A #define LTC4015_VEQUALIZE_DELTA_SUBADDR 0x2C -// Lead-acid equalization time - BITS[15:0] : 0x0E10 +// Lead-acid equalization time - BITS[15:0] +// : 0x0E10 #define LTC4015_EQUALIZE_TIME_SUBADDR 0x2D -// LiFeP04 recharge threshold - BITS[15:0] : 0x4410 +// LiFeP04 recharge threshold - BITS[15:0] +// : 0x4410 #define LTC4015_LIFEPO4_RECHARGE_THRESHOLD_SUBADDR 0x2E #define LTC4015_RESERVED_0X2F_SUBADDR 0x2F // For lithium chemistries, indicates the time (in sec) that the battery has @@ -291,7 +312,8 @@ * 1 : Alert indicates battery missing fault has occurred * 0 : Alert indicates battery short fault has occurred */ -// Charger state alert register. Individual bits are enabled by EN_CHARGER_STATE_ALERTS (0x0E). +// Charger state alert register. Individual bits are enabled by +// EN_CHARGER_STATE_ALERTS (0x0E). #define LTC4015_CHARGER_STATE_ALERTS_SUBADDR 0x37 /* Bit Fields: @@ -311,8 +333,8 @@ * 15:14 : N/A * 13 : Indicates that the battery charger is active * 12 : N/A - * 11 : Indicates the MPPT pin is set to enable Maximum Power Point Tracking - * 10 : Indicates a rising edge has been detected at the EQ pin, and an + * 11 : Indicates the MPPT pin is set to enable Maximum Power Point + * Tracking 10 : Indicates a rising edge has been detected at the EQ pin, and an * equalize charge is queued * 9 : Indicates DRVCC voltage is above switching regulator undervoltage * lockout level (4.3V typ) @@ -389,9 +411,11 @@ #define LTC4015_VCHARGE_DAC_SUBADDR 0x45 // Input current limit control DAC control word (Only Bits[5:0] used) #define LTC4015_IIN_LIMIT_DAC_SUBADDR 0x46 -// Digitally filtered two’s complement ADC measurement result for battery voltage +// Digitally filtered two’s complement ADC measurement result for battery +// voltage #define LTC4015_VBAT_FILT_SUBADDR 0x47 -// This 16-bit two's complement word is the value of IBAT (0x3D) used in calculating BSR. +// This 16-bit two's complement word is the value of IBAT (0x3D) used in +// calculating BSR. #define LTC4015_ICHARGE_BSR_SUBADDR 0x48 #define LTC4015_RESERVED_0X49_SUBADDR 0x49 // Measurement valid bit, bit 0 is a 1 when the telemetry(ADC) system is ready diff --git a/firmware/ec/src/devices/ltc4274.c b/firmware/ec/src/devices/ltc4274.c index aece382a8f..478385858a 100644 --- a/firmware/ec/src/devices/ltc4274.c +++ b/firmware/ec/src/devices/ltc4274.c @@ -129,7 +129,8 @@ static tPower_PSEStatus_Info PSEStatus_Info; * * @brief Write to PSE register * - * @args I2C device, Slave address, register address and value to be written. + * @args I2C device, Slave address, register address and value to be + * written. * * @return ReturnStatus */ @@ -170,8 +171,8 @@ ReturnStatus ltc4274_read(const I2C_Dev *i2c_dev, uint8_t regAddress, } else { /* TODO: refactor i2c_reg_read to not require uint16 */ uint16_t value; - status = i2c_reg_read(pseHandle, i2c_dev->slave_addr, regAddress, - &value, 1); + status = + i2c_reg_read(pseHandle, i2c_dev->slave_addr, regAddress, &value, 1); *regValue = (uint8_t)value; } return status; @@ -192,7 +193,8 @@ ReturnStatus ltc4274_set_cfg_operation_mode(const I2C_Dev *i2c_dev, ReturnStatus status = RETURN_OK; status = ltc4274_write(i2c_dev, LTC4274_REG_OPERATION_MODE, operatingMode); if (status != RETURN_OK) { - LOGGER("LTC4274:ERROR:: Write failed to the Operation mode register of PSE.\n"); + LOGGER( + "LTC4274:ERROR:: Write failed to the Operation mode register of PSE.\n"); } return status; } @@ -212,7 +214,8 @@ ReturnStatus ltc4274_get_operation_mode(const I2C_Dev *i2c_dev, ReturnStatus status = RETURN_OK; status = ltc4274_read(i2c_dev, LTC4274_REG_OPERATION_MODE, operatingMode); if (status != RETURN_OK) { - LOGGER("LTC4274:ERROR:: Read failed from the Operation mode register of PSE.\n"); + LOGGER( + "LTC4274:ERROR:: Read failed from the Operation mode register of PSE.\n"); } return status; } @@ -231,9 +234,9 @@ ReturnStatus ltc4274_set_cfg_detect_enable(const I2C_Dev *i2c_dev, { ReturnStatus status = RETURN_OK; - //Enable detect and classfication of PD - status = ltc4274_write(i2c_dev, LTC4274_REG_DETECT_CLASS_ENABLE, - detectEnable); + // Enable detect and classfication of PD + status = + ltc4274_write(i2c_dev, LTC4274_REG_DETECT_CLASS_ENABLE, detectEnable); if (status != RETURN_OK) { LOGGER("LTC4274:ERROR:: PSE detect enable setting failed.\n"); } @@ -253,7 +256,7 @@ ReturnStatus ltc4274_get_detect_enable(const I2C_Dev *i2c_dev, uint8_t *detectVal) { ReturnStatus status = RETURN_OK; - //Enable detect and classfication of PD + // Enable detect and classfication of PD uint8_t val = 0; status = ltc4274_read(i2c_dev, LTC4274_REG_DETECT_CLASS_ENABLE, &val); if (status != RETURN_OK) { @@ -646,8 +649,9 @@ ReturnStatus ltc4274_clear_interrupt(const I2C_Dev *i2c_dev, uint8_t *pwrEvent, } /*Bit 4 for power good and bit 0 for power event*/ - LOGGER("PSELTC4274::INFO:: PSE power Good Info and Power ecent info is read with 0x%x.\n", - *pwrEvent); + LOGGER( + "PSELTC4274::INFO:: PSE power Good Info and Power ecent info is read with 0x%x.\n", + *pwrEvent); /* if it is due to over current*/ status = ltc4274_read(i2c_dev, LTC4274_REG_START_EVENT_COR, overCurrent); @@ -655,8 +659,9 @@ ReturnStatus ltc4274_clear_interrupt(const I2C_Dev *i2c_dev, uint8_t *pwrEvent, LOGGER("LTC4274:ERROR::Reading power good for PSE failed.\n"); } - LOGGER("PSELTC4274::INFO:: PSE power Good Info and Power ecent info is read with 0x%x.\n", - *overCurrent); + LOGGER( + "PSELTC4274::INFO:: PSE power Good Info and Power ecent info is read with 0x%x.\n", + *overCurrent); /* if its due to supply */ status = ltc4274_read(i2c_dev, LTC4274_REG_SUPPLY_EVENT_COR, supply); @@ -664,8 +669,9 @@ ReturnStatus ltc4274_clear_interrupt(const I2C_Dev *i2c_dev, uint8_t *pwrEvent, LOGGER("LTC4274:ERROR::Reading power good for PSE failed.\n"); } - LOGGER("PSELTC4274::INFO:: PSE power Good Info and Power ecent info is read with 0x%x.\n", - *supply); + LOGGER( + "PSELTC4274::INFO:: PSE power Good Info and Power ecent info is read with 0x%x.\n", + *supply); return status; } @@ -818,7 +824,7 @@ void ltc4274_config(LTC4274_Dev *dev) { OcGpio_configure(&dev->cfg.reset_pin, OCGPIO_CFG_OUTPUT | OCGPIO_CFG_OUT_HIGH); - //Enable PSE device. + // Enable PSE device. ltc4274_enable(dev, true); } @@ -893,7 +899,8 @@ ReturnStatus ltc4274_default_cfg(const I2C_Dev *i2c_dev, uint8_t operatingMode, ret = ltc4274_set_cfg_detect_enable(i2c_dev, detectEnable); if (ret != RETURN_OK) { - LOGGER("LTC4274::ERROR: PSE detection and classification enable failed.\n"); + LOGGER( + "LTC4274::ERROR: PSE detection and classification enable failed.\n"); return ret; } @@ -980,7 +987,7 @@ void ltc4274_update_stateInfo(const I2C_Dev *i2c_dev) { ReturnStatus status = RETURN_OK; status = ltc4274_get_powergood_status( - i2c_dev, &PSEStatus_Info.pseStatus.powerGoodStatus); + i2c_dev, &PSEStatus_Info.pseStatus.powerGoodStatus); if (status != RETURN_OK) { LOGGER("PDLTC4275::ERROR: Power good signal read failed.\n"); PSEStatus_Info.pseStatus.detectStatus = LTC4274_DETECT_UNKOWN; @@ -990,7 +997,7 @@ void ltc4274_update_stateInfo(const I2C_Dev *i2c_dev) } if (PSEStatus_Info.pseStatus.powerGoodStatus == LTC4274_POWERGOOD) { status = ltc4274_get_detection_status( - i2c_dev, &PSEStatus_Info.pseStatus.detectStatus); + i2c_dev, &PSEStatus_Info.pseStatus.detectStatus); if (status != RETURN_OK) { LOGGER("PDLTC4275::ERROR: Reading PSE detection failed.\n"); PSEStatus_Info.pseStatus.detectStatus = LTC4274_DETECT_UNKOWN; @@ -999,7 +1006,7 @@ void ltc4274_update_stateInfo(const I2C_Dev *i2c_dev) return; } status = ltc4274_get_class_status( - i2c_dev, &PSEStatus_Info.pseStatus.classStatus); + i2c_dev, &PSEStatus_Info.pseStatus.classStatus); if (status != RETURN_OK) { LOGGER("PDLTC4275::ERROR: Reading PSE classification failed.\n"); PSEStatus_Info.pseStatus.detectStatus = LTC4274_DETECT_UNKOWN; @@ -1008,7 +1015,7 @@ void ltc4274_update_stateInfo(const I2C_Dev *i2c_dev) return; } status = - ltc4274_get_interrupt_status(i2c_dev, &PSEStatus_Info.psealert); + ltc4274_get_interrupt_status(i2c_dev, &PSEStatus_Info.psealert); if (status != RETURN_OK) { LOGGER("PDLTC4275::ERROR: Reading PSE detection failed.\n"); PSEStatus_Info.pseStatus.detectStatus = LTC4274_DETECT_UNKOWN; diff --git a/firmware/ec/src/devices/ltc4275.c b/firmware/ec/src/devices/ltc4275.c index 08470314c0..3292fdae57 100644 --- a/firmware/ec/src/devices/ltc4275.c +++ b/firmware/ec/src/devices/ltc4275.c @@ -27,7 +27,8 @@ tPower_PDStatus_Info PDStatus_Info; /****************************************************************************** * @fn ltc4275_handle_irq * - * @brief Read the change in the PD state and callbacks the registerd function. + * @brief Read the change in the PD state and callbacks the registerd + * function. * * @args Alert Context * @@ -145,7 +146,7 @@ ReturnStatus ltc4275_init(LTC4275_Dev *dev) if (dev->cfg.pin_evt) { const uint32_t pin_evt_cfg = - OCGPIO_CFG_INPUT | OCGPIO_CFG_INT_BOTH_EDGES; + OCGPIO_CFG_INPUT | OCGPIO_CFG_INT_BOTH_EDGES; if (OcGpio_configure(dev->cfg.pin_evt, pin_evt_cfg) < OCGPIO_SUCCESS) { return RETURN_NOTOK; } diff --git a/firmware/ec/src/devices/ocmp_wrappers/ocmp_adt7481.c b/firmware/ec/src/devices/ocmp_wrappers/ocmp_adt7481.c index 8688476ab9..a2163478a1 100644 --- a/firmware/ec/src/devices/ocmp_wrappers/ocmp_adt7481.c +++ b/firmware/ec/src/devices/ocmp_wrappers/ocmp_adt7481.c @@ -1,11 +1,11 @@ /** -* Copyright (c) 2017-present, Facebook, Inc. -* All rights reserved. -* -* This source code is licensed under the BSD-style license found in the -* LICENSE file in the root directory of this source tree. An additional grant -* of patent rights can be found in the PATENTS file in the same directory. -*/ + * Copyright (c) 2017-present, Facebook, Inc. + * All rights reserved. + * + * This source code is licensed under the BSD-style license found in the + * LICENSE file in the root directory of this source tree. An additional grant + * of patent rights can be found in the PATENTS file in the same directory. + */ #include "common/inc/ocmp_wrappers/ocmp_adt7481.h" #include "helpers/array.h" @@ -102,11 +102,11 @@ static ePostCode _init(void *driver, const void *config, } for (size_t i = 0; i < ARRAY_SIZE(adt7481_config->limits); ++i) { if (adt7481_set_local_temp_limit( - driver, i + 1, adt7481_config->limits[i]) != RETURN_OK || + driver, i + 1, adt7481_config->limits[i]) != RETURN_OK || adt7481_set_remote1_temp_limit( - driver, i + 1, adt7481_config->limits[i]) != RETURN_OK || + driver, i + 1, adt7481_config->limits[i]) != RETURN_OK || adt7481_set_remote2_temp_limit( - driver, i + 1, adt7481_config->limits[i]) != RETURN_OK) { + driver, i + 1, adt7481_config->limits[i]) != RETURN_OK) { return POST_DEV_CFG_FAIL; } } diff --git a/firmware/ec/src/devices/ocmp_wrappers/ocmp_dat-xxr5a-pp.c b/firmware/ec/src/devices/ocmp_wrappers/ocmp_dat-xxr5a-pp.c index e8f35d6a7e..38bbab715e 100644 --- a/firmware/ec/src/devices/ocmp_wrappers/ocmp_dat-xxr5a-pp.c +++ b/firmware/ec/src/devices/ocmp_wrappers/ocmp_dat-xxr5a-pp.c @@ -121,9 +121,8 @@ static ePostCode _init(void *driver, const void *config, if (OcGpio_configure(&cfg->pin_le, OCGPIO_CFG_OUTPUT) < OCGPIO_SUCCESS) { return POST_DEV_CFG_FAIL; } - if (PinGroup_configure(&pin_group, - OCGPIO_CFG_OUTPUT | OCGPIO_CFG_OUT_HIGH) != - RETURN_OK) { + if (PinGroup_configure(&pin_group, OCGPIO_CFG_OUTPUT | + OCGPIO_CFG_OUT_HIGH) != RETURN_OK) { return POST_DEV_CFG_FAIL; } diff --git a/firmware/ec/src/devices/ocmp_wrappers/ocmp_debugmdio.c b/firmware/ec/src/devices/ocmp_wrappers/ocmp_debugmdio.c index 8b000d42c1..d9d121c4ce 100644 --- a/firmware/ec/src/devices/ocmp_wrappers/ocmp_debugmdio.c +++ b/firmware/ec/src/devices/ocmp_wrappers/ocmp_debugmdio.c @@ -43,17 +43,19 @@ bool mdio_read(void *mdio_cfg, void *ocmdio) s_ocmdio->reg_value = 0xf00f; if (CLAUSE_45_REQUEST(reg_address)) - /*PHY registers use Reg 13 and Reg 14 as paging mechanism to access Clause 45 registers*/ + /*PHY registers use Reg 13 and Reg 14 as paging mechanism to access + * Clause 45 registers*/ s_ocmdio->reg_value = mdiobb_read_by_paging_c45(s_oc_mdio_cfg->port, s_ocmdio->reg_address); else if (PORT_REG_REQUEST(port)) - /*PHY registers use Reg 13 and Reg 14 as paging mechanism to access Clause 22 registers*/ - s_ocmdio->reg_value = mdiobb_read_by_paging(s_oc_mdio_cfg->port, - s_ocmdio->reg_address); + /*PHY registers use Reg 13 and Reg 14 as paging mechanism to access + * Clause 22 registers*/ + s_ocmdio->reg_value = + mdiobb_read_by_paging(s_oc_mdio_cfg->port, s_ocmdio->reg_address); else /*GLOBAL and SWITCH registers can be accessed directly*/ s_ocmdio->reg_value = - mdiobb_read(s_oc_mdio_cfg->port, s_ocmdio->reg_address); + mdiobb_read(s_oc_mdio_cfg->port, s_ocmdio->reg_address); return 0; } @@ -63,23 +65,25 @@ bool mdio_write(void *mdio_cfg, void *ocmdio) S_OCMDIO *s_ocmdio = (S_OCMDIO *)ocmdio; if (CLAUSE_45_REQUEST(reg_address)) { - /*PHY registers use Reg 13 and Reg 14 as paging mechanism to access Clause 45 registers*/ + /*PHY registers use Reg 13 and Reg 14 as paging mechanism to access + * Clause 45 registers*/ mdiobb_write_by_paging_c45(s_oc_mdio_cfg->port, s_ocmdio->reg_address, s_ocmdio->reg_value); s_ocmdio->reg_value = mdiobb_read_by_paging_c45(s_oc_mdio_cfg->port, s_ocmdio->reg_address); } else if (PORT_REG_REQUEST(port)) { - /*PHY registers use Reg 13 and Reg 14 as paging mechanism to access Clause 22 registers*/ + /*PHY registers use Reg 13 and Reg 14 as paging mechanism to access + * Clause 22 registers*/ mdiobb_write_by_paging(s_oc_mdio_cfg->port, s_ocmdio->reg_address, s_ocmdio->reg_value); - s_ocmdio->reg_value = mdiobb_read_by_paging(s_oc_mdio_cfg->port, - s_ocmdio->reg_address); + s_ocmdio->reg_value = + mdiobb_read_by_paging(s_oc_mdio_cfg->port, s_ocmdio->reg_address); } else { /*GLOBAL and SWITCH registers can be accessed directly*/ mdiobb_write(s_oc_mdio_cfg->port, s_ocmdio->reg_address, s_ocmdio->reg_value); s_ocmdio->reg_value = - mdiobb_read(s_oc_mdio_cfg->port, s_ocmdio->reg_address); + mdiobb_read(s_oc_mdio_cfg->port, s_ocmdio->reg_address); } return 0; } diff --git a/firmware/ec/src/devices/ocmp_wrappers/ocmp_debugocgpio.c b/firmware/ec/src/devices/ocmp_wrappers/ocmp_debugocgpio.c index 52b3e70a3d..377cbf3651 100644 --- a/firmware/ec/src/devices/ocmp_wrappers/ocmp_debugocgpio.c +++ b/firmware/ec/src/devices/ocmp_wrappers/ocmp_debugocgpio.c @@ -24,13 +24,13 @@ bool ocgpio_set(void *gpio_cfg, void *oc_gpio) S_OCGPIO *s_oc_gpio = (S_OCGPIO *)oc_gpio; int ret = 0; uint8_t idx = ((oc_gpio_cfg->group != 0) ? - (((oc_gpio_cfg->group - 1) * NO_GPIO_PINS_IN_GROUP) + - s_oc_gpio->pin) : - s_oc_gpio->pin); + (((oc_gpio_cfg->group - 1) * NO_GPIO_PINS_IN_GROUP) + + s_oc_gpio->pin) : + s_oc_gpio->pin); OcGpio_Pin ocgpio = { (oc_gpio_cfg->port), idx, ((oc_gpio_cfg->group != 0) ? - (gpioPinConfigs[idx] >> 16) : - OCGPIO_CFG_OUT_STD) }; + (gpioPinConfigs[idx] >> 16) : + OCGPIO_CFG_OUT_STD) }; ret = OcGpio_configure(&ocgpio, OCGPIO_CFG_OUTPUT); ret = OcGpio_write(&ocgpio, s_oc_gpio->value); return (ret == 0); @@ -42,13 +42,13 @@ bool ocgpio_get(void *gpio_cfg, void *oc_gpio) S_OCGPIO *s_oc_gpio = (S_OCGPIO *)oc_gpio; int ret = 0; uint8_t idx = ((oc_gpio_cfg->group != 0) ? - (((oc_gpio_cfg->group - 1) * NO_GPIO_PINS_IN_GROUP) + - s_oc_gpio->pin) : - s_oc_gpio->pin); + (((oc_gpio_cfg->group - 1) * NO_GPIO_PINS_IN_GROUP) + + s_oc_gpio->pin) : + s_oc_gpio->pin); OcGpio_Pin ocgpio = { (oc_gpio_cfg->port), idx, ((oc_gpio_cfg->group != 0) ? - (gpioPinConfigs[idx] >> 16) : - OCGPIO_CFG_IN_PU) }; + (gpioPinConfigs[idx] >> 16) : + OCGPIO_CFG_IN_PU) }; ret = OcGpio_configure(&ocgpio, OCGPIO_CFG_INPUT); s_oc_gpio->value = OcGpio_read(&ocgpio); if (s_oc_gpio->value < 0) { @@ -69,7 +69,7 @@ static ePostCode _probe(S_OCGPIO_Cfg *oc_gpio_cfg) static ePostCode _init(void *driver, const void *config, const void *alert_token) { - //Dummy functions. + // Dummy functions. return POST_DEV_CFG_DONE; } diff --git a/firmware/ec/src/devices/ocmp_wrappers/ocmp_eth_sw.c b/firmware/ec/src/devices/ocmp_wrappers/ocmp_eth_sw.c index fc754e4854..ce284f55ec 100644 --- a/firmware/ec/src/devices/ocmp_wrappers/ocmp_eth_sw.c +++ b/firmware/ec/src/devices/ocmp_wrappers/ocmp_eth_sw.c @@ -227,7 +227,7 @@ static ePostCode _init(void *driver, const void *config, { ePostCode ret = POST_DEV_CFG_FAIL; ret = eth_sw_init(driver); - //TODO: Enabling of the ethernet interrupts requires soem more work. + // TODO: Enabling of the ethernet interrupts requires soem more work. /* eth_sw_setAlertHandler(driver,_alert_handler,(void *)alert_token); eth_enable_interrupt();*/ diff --git a/firmware/ec/src/devices/ocmp_wrappers/ocmp_ltc4015.c b/firmware/ec/src/devices/ocmp_wrappers/ocmp_ltc4015.c index c12282830e..3fc8834906 100644 --- a/firmware/ec/src/devices/ocmp_wrappers/ocmp_ltc4015.c +++ b/firmware/ec/src/devices/ocmp_wrappers/ocmp_ltc4015.c @@ -256,27 +256,27 @@ static ePostCode _init(void *driver, const void *config, const LTC4015_Config *ltc4015_config = config; if (LTC4015_cfg_battery_voltage_low( - driver, ltc4015_config->batteryVoltageLow) != RETURN_OK) { + driver, ltc4015_config->batteryVoltageLow) != RETURN_OK) { return POST_DEV_CFG_FAIL; } if (LTC4015_cfg_battery_voltage_high( - driver, ltc4015_config->batteryVoltageHigh) != RETURN_OK) { + driver, ltc4015_config->batteryVoltageHigh) != RETURN_OK) { return POST_DEV_CFG_FAIL; } if (LTC4015_cfg_battery_current_low( - driver, ltc4015_config->batteryCurrentLow) != RETURN_OK) { + driver, ltc4015_config->batteryCurrentLow) != RETURN_OK) { return POST_DEV_CFG_FAIL; } if (LTC4015_cfg_input_voltage_low( - driver, ltc4015_config->inputVoltageLow) != RETURN_OK) { + driver, ltc4015_config->inputVoltageLow) != RETURN_OK) { return POST_DEV_CFG_FAIL; } if (LTC4015_cfg_input_current_high( - driver, ltc4015_config->inputCurrentHigh) != RETURN_OK) { + driver, ltc4015_config->inputCurrentHigh) != RETURN_OK) { return POST_DEV_CFG_FAIL; } if (LTC4015_cfg_input_current_limit( - driver, ltc4015_config->inputCurrentLimit) != RETURN_OK) { + driver, ltc4015_config->inputCurrentLimit) != RETURN_OK) { return POST_DEV_CFG_FAIL; } if (ltc4015_config->icharge) { @@ -291,10 +291,9 @@ static ePostCode _init(void *driver, const void *config, } LTC4015_setAlertHandler(driver, _alert_handler, (void *)alert_token); - if (LTC4015_enableLimitAlerts(driver, - LTC4015_EVT_BVL | LTC4015_EVT_BVH | - LTC4015_EVT_IVL | LTC4015_EVT_ICH | - LTC4015_EVT_BCL) != RETURN_OK) { + if (LTC4015_enableLimitAlerts( + driver, LTC4015_EVT_BVL | LTC4015_EVT_BVH | LTC4015_EVT_IVL | + LTC4015_EVT_ICH | LTC4015_EVT_BCL) != RETURN_OK) { return POST_DEV_CFG_FAIL; } diff --git a/firmware/ec/src/devices/ocmp_wrappers/ocmp_ltc4274.c b/firmware/ec/src/devices/ocmp_wrappers/ocmp_ltc4274.c index e46ea35d69..d0d0db490f 100644 --- a/firmware/ec/src/devices/ocmp_wrappers/ocmp_ltc4274.c +++ b/firmware/ec/src/devices/ocmp_wrappers/ocmp_ltc4274.c @@ -57,7 +57,8 @@ static bool _get_status(void *driver, unsigned int param_id, void *return_buf) case LTC7274_STATUS_DETECT: { if (ltc4274_get_detection_status(driver, res) != RETURN_OK) { ret = false; - LOGGER("LTC4274:ERROR:: Reading PSE detection and classification failed.\n"); + LOGGER( + "LTC4274:ERROR:: Reading PSE detection and classification failed.\n"); } break; } @@ -92,14 +93,16 @@ static bool _set_config(void *driver, unsigned int param_id, const void *data) case LTC4274_CONFIG_OPERATING_MODE: { if (ltc4274_set_cfg_operation_mode(driver, *res) != RETURN_OK) { ret = false; - LOGGER("LTC4274:ERROR:: PSE operational mode setting mode failed.\n"); + LOGGER( + "LTC4274:ERROR:: PSE operational mode setting mode failed.\n"); } break; } case LTC4274_CONFIG_DETECT_ENABLE: { if (ltc4274_set_cfg_detect_enable(driver, *res) != RETURN_OK) { ret = false; - LOGGER("LTC4274:ERROR:: PSE detection and classification enable failed.\n"); + LOGGER( + "LTC4274:ERROR:: PSE detection and classification enable failed.\n"); } break; } @@ -120,7 +123,8 @@ static bool _set_config(void *driver, unsigned int param_id, const void *data) case LTC4274_CONFIG_HP_ENABLE: { if (ltc4274_set_cfg_pshp_feature(driver, *res) != RETURN_OK) { ret = false; - LOGGER("LTC4274:ERROR:: PSE configuration for LTEPOE++ failed.\n"); + LOGGER( + "LTC4274:ERROR:: PSE configuration for LTEPOE++ failed.\n"); } break; } @@ -140,14 +144,16 @@ static bool _get_config(void *driver, unsigned int param_id, void *return_buf) case LTC4274_CONFIG_OPERATING_MODE: { if (ltc4274_get_operation_mode(driver, res) != RETURN_OK) { ret = false; - LOGGER("LTC4274:ERROR:: PSE operational mode setting mode failed.\n"); + LOGGER( + "LTC4274:ERROR:: PSE operational mode setting mode failed.\n"); } break; } case LTC4274_CONFIG_DETECT_ENABLE: { if (ltc4274_get_detect_enable(driver, res) != RETURN_OK) { ret = false; - LOGGER("LTC4274:ERROR:: PSE detection and classification enable failed.\n"); + LOGGER( + "LTC4274:ERROR:: PSE detection and classification enable failed.\n"); } break; } @@ -168,7 +174,8 @@ static bool _get_config(void *driver, unsigned int param_id, void *return_buf) case LTC4274_CONFIG_HP_ENABLE: { if (ltc4274_get_pshp_feature(driver, res) != RETURN_OK) { ret = false; - LOGGER("LTC4274:ERROR:: PSE configuration for LTEPOE++ failed.\n"); + LOGGER( + "LTC4274:ERROR:: PSE configuration for LTEPOE++ failed.\n"); } break; } @@ -249,7 +256,7 @@ static ePostCode _init(void *driver, const void *config, return POST_DEV_CFG_FAIL; } ltc4274_set_alert_handler(driver, _alert_handler, (void *)alert_token); - //TODO: SET enable or disable. + // TODO: SET enable or disable. if (ltc4274_cfg_interrupt_enable(driver, LTC7274_config->interruptEnable) != RETURN_OK) { return POST_DEV_CFG_FAIL; diff --git a/firmware/ec/src/devices/ocmp_wrappers/ocmp_mac.c b/firmware/ec/src/devices/ocmp_wrappers/ocmp_mac.c index b9c59a12f2..5edf6a55a5 100644 --- a/firmware/ec/src/devices/ocmp_wrappers/ocmp_mac.c +++ b/firmware/ec/src/devices/ocmp_wrappers/ocmp_mac.c @@ -1,11 +1,11 @@ /** -* Copyright (c) 2017-present, Facebook, Inc. -* All rights reserved. -* -* This source code is licensed under the BSD-style license found in the -* LICENSE file in the root directory of this source tree. An additional grant -* of patent rights can be found in the PATENTS file in the same directory. -*/ + * Copyright (c) 2017-present, Facebook, Inc. + * All rights reserved. + * + * This source code is licensed under the BSD-style license found in the + * LICENSE file in the root directory of this source tree. An additional grant + * of patent rights can be found in the PATENTS file in the same directory. + */ #include "common/inc/ocmp_wrappers/ocmp_mac.h" #include "inc/common/global_header.h" @@ -182,10 +182,10 @@ static ePostCode _probe_mac(void *driver, const void *config, if ((ulUser0 != 0xffffffff) && (ulUser1 != 0xffffffff)) { /* - * Convert the 24/24 split MAC address from NV ram into a 32/16 split - * MAC address needed to program the hardware registers, then program - * the MAC address into the Ethernet Controller registers. - */ + * Convert the 24/24 split MAC address from NV ram into a 32/16 split + * MAC address needed to program the hardware registers, then program + * the MAC address into the Ethernet Controller registers. + */ temp[0] = ((ulUser0 >> 0) & 0xff); temp[1] = ((ulUser0 >> 8) & 0xff); temp[2] = ((ulUser0 >> 16) & 0xff); diff --git a/firmware/ec/src/devices/ocmp_wrappers/ocmp_powerSource.c b/firmware/ec/src/devices/ocmp_wrappers/ocmp_powerSource.c index c22be62edf..6cc01c2f67 100644 --- a/firmware/ec/src/devices/ocmp_wrappers/ocmp_powerSource.c +++ b/firmware/ec/src/devices/ocmp_wrappers/ocmp_powerSource.c @@ -15,8 +15,9 @@ static bool _get_status(void *driver, unsigned int param_id, void *return_buf) { bool ret = false; - /* TODO: As of now using pwr_get_sourc_info as it is for Power source Update. - * Once we change the handing of the powersource status #298 this will also changed. */ + /* TODO: As of now using pwr_get_sourc_info as it is for Power source + * Update. Once we change the handing of the powersource status #298 this + * will also changed. */ pwr_get_source_info(driver); if (pwr_process_get_status_parameters_data(param_id, return_buf) == RETURN_OK) { diff --git a/firmware/ec/src/devices/pca9557.c b/firmware/ec/src/devices/pca9557.c index 2b421076a9..ef47603e1d 100644 --- a/firmware/ec/src/devices/pca9557.c +++ b/firmware/ec/src/devices/pca9557.c @@ -86,7 +86,7 @@ static ReturnStatus PCA9557_regWrite(const I2C_Dev *i2c_dev, uint8_t regAddress, ReturnStatus PCA9557_getInput(const I2C_Dev *i2c_dev, uint8_t *inputRegValue) { ReturnStatus status = - PCA9557_regRead(i2c_dev, PCA9557_INPUT_PORT_REG, inputRegValue); + PCA9557_regRead(i2c_dev, PCA9557_INPUT_PORT_REG, inputRegValue); if (status == RETURN_OK) { LOGGER_DEBUG("IOEXP:INFO:: IO Expander 0x%x on bus 0x%x is " "reporting Input Port Reg value of 0x%x.\n", @@ -107,7 +107,7 @@ ReturnStatus PCA9557_getInput(const I2C_Dev *i2c_dev, uint8_t *inputRegValue) ReturnStatus PCA9557_getOutput(const I2C_Dev *i2c_dev, uint8_t *outputRegValue) { ReturnStatus status = - PCA9557_regRead(i2c_dev, PCA9557_OUTPUT_PORT_REG, outputRegValue); + PCA9557_regRead(i2c_dev, PCA9557_OUTPUT_PORT_REG, outputRegValue); if (status == RETURN_OK) { LOGGER_DEBUG("IOEXP:INFO:: IO Expander 0x%x on bus 0x%x is " "reporting Output Port Reg value of 0x%x.\n", diff --git a/firmware/ec/src/devices/powerSource.c b/firmware/ec/src/devices/powerSource.c index 2ae3a3f9f8..e5f07a4d28 100644 --- a/firmware/ec/src/devices/powerSource.c +++ b/firmware/ec/src/devices/powerSource.c @@ -41,9 +41,9 @@ static void pwr_update_source_info(ePowerSource powerSrc, for (; itr < PWR_SRC_MAX; itr++) { if (Power_SourceInfo[itr].powerSource == powerSrc) { Power_SourceInfo[itr].state = pwrState; - LOGGER("POWER:INFO:: Power State updated for Power Source %d with %d.\n", - Power_SourceInfo[itr].powerSource, - Power_SourceInfo[itr].state); + LOGGER( + "POWER:INFO:: Power State updated for Power Source %d with %d.\n", + Power_SourceInfo[itr].powerSource, Power_SourceInfo[itr].state); } } } @@ -74,7 +74,7 @@ static ReturnStatus pwr_source_inuse(ePowerSource *inUse) void pwr_source_config(PWRSRC_Dev *driver) { - //Configuring GPIOS + // Configuring GPIOS OcGpio_configure(&driver->cfg.pin_solar_aux_prsnt_n, OCGPIO_CFG_INPUT); OcGpio_configure(&driver->cfg.pin_poe_prsnt_n, OCGPIO_CFG_INPUT); OcGpio_configure(&driver->cfg.pin_int_bat_prsnt, OCGPIO_CFG_INPUT); @@ -113,7 +113,7 @@ static ReturnStatus pwr_check_aux_or_solar(PWRSRC_Dev *pwrSrcDev) { ReturnStatus ret = RETURN_NOTOK; ePowerSourceState status = PWR_SRC_NON_AVAILABLE; - //For Checking SOLAR POWER SOURCE + // For Checking SOLAR POWER SOURCE uint8_t value = 0; value = OcGpio_read(&pwrSrcDev->cfg.pin_solar_aux_prsnt_n); if (value == 0) { @@ -138,7 +138,7 @@ static ReturnStatus pwr_check_poe(PWRSRC_Dev *pwrSrcDev) ReturnStatus ret = RETURN_NOTOK; uint8_t value = 0; ePowerSourceState status = PWR_SRC_NON_AVAILABLE; - //For Checking POE POWER SOURCE + // For Checking POE POWER SOURCE value = OcGpio_read(&pwrSrcDev->cfg.pin_poe_prsnt_n); if (value == 0) { status = PWR_SRC_AVAILABLE; @@ -163,7 +163,7 @@ static ReturnStatus pwr_check_int_batt(PWRSRC_Dev *pwrSrcDev) uint8_t value = 0; ePowerSourceState status = PWR_SRC_NON_AVAILABLE; - //For Checking INTERNAL BATTERY SOURCE + // For Checking INTERNAL BATTERY SOURCE value = OcGpio_read(&pwrSrcDev->cfg.pin_int_bat_prsnt); if (value == 0) { /* If read fails, we'll get a negative value */ status = PWR_SRC_AVAILABLE; diff --git a/firmware/ec/src/devices/sbdn9603.c b/firmware/ec/src/devices/sbdn9603.c index 842f1870cf..0dcbd36a0d 100644 --- a/firmware/ec/src/devices/sbdn9603.c +++ b/firmware/ec/src/devices/sbdn9603.c @@ -160,7 +160,7 @@ bool sbd9603_get_model(OBC_Iridium_Status_Data *pIridiumStatusData) ret = false; } /* Model string is verbose - if it's 9600 fam, replace with shorter - * model number since we only have 4 characters */ + * model number since we only have 4 characters */ char *model = cgmmInfo.model; const char fam_str[] = "IRIDIUM 9600 Family"; if (strncmp(model, fam_str, STATIC_STRLEN(fam_str)) == 0) { diff --git a/firmware/ec/src/devices/se98a.c b/firmware/ec/src/devices/se98a.c index 15e7afa71a..30711f9303 100644 --- a/firmware/ec/src/devices/se98a.c +++ b/firmware/ec/src/devices/se98a.c @@ -329,7 +329,7 @@ ReturnStatus se98a_init(SE98A_Dev *dev) } /* Make sure we're talking to the right device */ - //if (se98a_probe(dev) != POST_DEV_FOUND) { + // if (se98a_probe(dev) != POST_DEV_FOUND) { // return RETURN_NOTOK; //} diff --git a/firmware/ec/src/devices/sx1509.c b/firmware/ec/src/devices/sx1509.c index fe8c0f7b2c..1135be474e 100644 --- a/firmware/ec/src/devices/sx1509.c +++ b/firmware/ec/src/devices/sx1509.c @@ -32,8 +32,10 @@ 0x05 /* Output buffer low drive register I/O[7..0] (Bank A) */ #define SX1509_REG_PULL_UP_B 0x06 /* Pull_up register I/O[15..8] (Bank B) */ #define SX1509_REG_PULL_UP_A 0x07 /* Pull_up register I/O[7..0] (Bank A) */ -#define SX1509_REG_PULL_DOWN_B 0x08 /* Pull_down register I/O[15..8] (Bank B) */ -#define SX1509_REG_PULL_DOWN_A 0x09 /* Pull_down register I/O[7..0] (Bank A) */ +#define SX1509_REG_PULL_DOWN_B 0x08 /* Pull_down register I/O[15..8] (Bank B) \ + */ +#define SX1509_REG_PULL_DOWN_A 0x09 /* Pull_down register I/O[7..0] (Bank A) \ + */ #define SX1509_REG_OPEN_DRAIN_B \ 0x0A /* Open drain register I/O[15..8] (Bank B) */ #define SX1509_REG_OPEN_DRAIN_A \ @@ -50,8 +52,10 @@ 0x13 /* Interrupt mask register I/O[7..0] (Bank A) */ #define SX1509_REG_SENSE_HIGH_B \ 0x14 /* Sense register for I/O[15:12] (Bank B) */ -#define SX1509_REG_SENSE_LOW_B 0x15 /* Sense register for I/O[11:8] (Bank B) */ -#define SX1509_REG_SENSE_HIGH_A 0x16 /* Sense register for I/O[7:4] (Bank A) */ +#define SX1509_REG_SENSE_LOW_B 0x15 /* Sense register for I/O[11:8] (Bank B) \ + */ +#define SX1509_REG_SENSE_HIGH_A 0x16 /* Sense register for I/O[7:4] (Bank A) \ + */ #define SX1509_REG_SENSE_LOW_A 0x17 /* Sense register for I/O[3:0] (Bank A) */ #define SX1509_REG_INTERRUPT_SOURCE_B \ 0x18 /* Interrupt source register I/O[15..8] (Bank B) */ @@ -258,8 +262,8 @@ ReturnStatus ioexp_led_get_data(const I2C_Dev *i2c_dev, sx1509RegType regType, uint8_t *regValue) { ReturnStatus status = RETURN_OK; - uint8_t regAddress = (regType == SX1509_REG_A) ? (SX1509_REG_DATA_A) : - (SX1509_REG_DATA_B); + uint8_t regAddress = + (regType == SX1509_REG_A) ? (SX1509_REG_DATA_A) : (SX1509_REG_DATA_B); status = ioexp_led_raw_read(i2c_dev, regAddress, regValue); return status; } @@ -281,8 +285,8 @@ ReturnStatus ioexp_led_set_data(const I2C_Dev *i2c_dev, sx1509RegType regType, { ReturnStatus status = RETURN_OK; uint8_t noOfBytes = 1; - uint8_t regAddress = (regType == SX1509_REG_A) ? (SX1509_REG_DATA_A) : - (SX1509_REG_DATA_B); + uint8_t regAddress = + (regType == SX1509_REG_A) ? (SX1509_REG_DATA_A) : (SX1509_REG_DATA_B); if (regType == SX1509_REG_AB) { noOfBytes = 2; } @@ -308,8 +312,8 @@ ReturnStatus ioexp_led_set_on_time(const I2C_Dev *i2c_dev, uint8_t index, uint8_t tOnRegValue) { ReturnStatus status = RETURN_OK; - status = ioexp_led_raw_write(i2c_dev, SX1509_REG_T_ON[index], tOnRegValue, - 0, 1); + status = + ioexp_led_raw_write(i2c_dev, SX1509_REG_T_ON[index], tOnRegValue, 0, 1); return status; } @@ -329,8 +333,8 @@ ReturnStatus ioexp_led_set_off_time(const I2C_Dev *i2c_dev, uint8_t index, uint8_t tOffRegValue) { ReturnStatus status = RETURN_OK; - status = ioexp_led_raw_write(i2c_dev, SX1509_REG_OFF[index], tOffRegValue, - 0, 1); + status = + ioexp_led_raw_write(i2c_dev, SX1509_REG_OFF[index], tOffRegValue, 0, 1); return status; } @@ -378,8 +382,8 @@ ReturnStatus ioexp_led_config_inputbuffer(const I2C_Dev *i2c_dev, ReturnStatus status = RETURN_OK; uint8_t noOfBytes = 1; uint8_t regAddress = (regType == SX1509_REG_A) ? - (SX1509_REG_INPUT_DISABLE_A) : - (SX1509_REG_INPUT_DISABLE_B); + (SX1509_REG_INPUT_DISABLE_A) : + (SX1509_REG_INPUT_DISABLE_B); if (regType == SX1509_REG_AB) { noOfBytes = 2; } @@ -499,7 +503,7 @@ ReturnStatus ioexp_led_config_data_direction(const I2C_Dev *i2c_dev, ReturnStatus status = RETURN_OK; uint8_t noOfBytes = 1; uint8_t regAddress = - (regType == SX1509_REG_A) ? (SX1509_REG_DIR_A) : (SX1509_REG_DIR_B); + (regType == SX1509_REG_A) ? (SX1509_REG_DIR_A) : (SX1509_REG_DIR_B); if (regType == SX1509_REG_AB) { noOfBytes = 2; } @@ -609,8 +613,8 @@ ReturnStatus ioexp_led_enable_leddriver(const I2C_Dev *i2c_dev, ReturnStatus status = RETURN_OK; uint8_t noOfBytes = 1; uint8_t regAddress = (regType == SX1509_REG_A) ? - (SX1509_REG_LED_DRIVER_ENABLE_A) : - (SX1509_REG_LED_DRIVER_ENABLE_B); + (SX1509_REG_LED_DRIVER_ENABLE_A) : + (SX1509_REG_LED_DRIVER_ENABLE_B); if (regType == SX1509_REG_AB) { noOfBytes = 2; } @@ -659,8 +663,8 @@ ReturnStatus ioexp_led_config_interrupt(const I2C_Dev *i2c_dev, ReturnStatus status = RETURN_OK; uint8_t noOfBytes = 1; uint8_t regAddress = (regType == SX1509_REG_A) ? - (SX1509_REG_INTERRUPT_MASK_A) : - (SX1509_REG_INTERRUPT_MASK_B); + (SX1509_REG_INTERRUPT_MASK_A) : + (SX1509_REG_INTERRUPT_MASK_B); if (regType == SX1509_REG_AB) { noOfBytes = 2; } @@ -696,8 +700,8 @@ ReturnStatus ioexp_led_config_edge_sense_A(const I2C_Dev *i2c_dev, ReturnStatus status = RETURN_OK; uint8_t noOfBytes = 1; uint8_t regAddress = (regType == SX1509_EDGE_SENSE_REG_LOW) ? - (SX1509_REG_SENSE_LOW_A) : - (SX1509_REG_SENSE_HIGH_A); + (SX1509_REG_SENSE_LOW_A) : + (SX1509_REG_SENSE_HIGH_A); if (regType == SX1509_EDGE_SENSE_REG_LOW_HIGH) { noOfBytes = 2; } @@ -727,8 +731,8 @@ ReturnStatus ioexp_led_config_edge_sense_B(const I2C_Dev *i2c_dev, ReturnStatus status = RETURN_OK; uint8_t noOfBytes = 1; uint8_t regAddress = (regType == SX1509_EDGE_SENSE_REG_LOW) ? - (SX1509_REG_SENSE_LOW_B) : - (SX1509_REG_SENSE_HIGH_B); + (SX1509_REG_SENSE_LOW_B) : + (SX1509_REG_SENSE_HIGH_B); if (regType == SX1509_EDGE_SENSE_REG_LOW_HIGH) { noOfBytes = 2; } @@ -795,8 +799,8 @@ ReturnStatus ioexp_led_enable_debounce(const I2C_Dev *i2c_dev, ReturnStatus status = RETURN_OK; uint8_t noOfBytes = 1; uint8_t regAddress = (regType == SX1509_REG_A) ? - (SX1509_REG_DEBOUNCE_ENABLE_A) : - (SX1509_REG_DEBOUNCE_ENABLE_B); + (SX1509_REG_DEBOUNCE_ENABLE_A) : + (SX1509_REG_DEBOUNCE_ENABLE_B); if (regType == SX1509_REG_AB) { noOfBytes = 2; } @@ -825,13 +829,13 @@ ReturnStatus ioexp_led_get_interrupt_source(const I2C_Dev *i2c_dev, uint8_t regValueA = 0; uint8_t regValueB = 0; - status = ioexp_led_raw_read(i2c_dev, SX1509_REG_INTERRUPT_SOURCE_A, - ®ValueA); + status = + ioexp_led_raw_read(i2c_dev, SX1509_REG_INTERRUPT_SOURCE_A, ®ValueA); if (status != RETURN_OK) { return status; } - status = ioexp_led_raw_read(i2c_dev, SX1509_REG_INTERRUPT_SOURCE_B, - ®ValueB); + status = + ioexp_led_raw_read(i2c_dev, SX1509_REG_INTERRUPT_SOURCE_B, ®ValueB); *intPins = (uint16_t)((regValueB << 8) | regValueA); return status; } diff --git a/firmware/ec/src/devices/uart/at_cmd.c b/firmware/ec/src/devices/uart/at_cmd.c index a2e5cca3e5..af947548b1 100644 --- a/firmware/ec/src/devices/uart/at_cmd.c +++ b/firmware/ec/src/devices/uart/at_cmd.c @@ -73,12 +73,12 @@ typedef struct AtResultString { // These are AT standard - we want to do a full string match static const AtResultString AtResultStringMap[] = { { - .str = "OK", - .code = AT_RESULT_CODE_OK, + .str = "OK", + .code = AT_RESULT_CODE_OK, }, { - .str = "ERROR", - .code = AT_RESULT_CODE_ERROR, + .str = "ERROR", + .code = AT_RESULT_CODE_ERROR, }, }; @@ -86,12 +86,12 @@ static const AtResultString AtResultStringMap[] = { // TODO: these probably shouldn't be hardcoded in this module static const AtResultString AtCustomResultStrings[] = { { - .str = "+CMS ERROR:", - .code = AT_RESULT_CODE_ERROR_CUSTOM, + .str = "+CMS ERROR:", + .code = AT_RESULT_CODE_ERROR_CUSTOM, }, { - .str = "+CME ERROR:", - .code = AT_RESULT_CODE_ERROR_CUSTOM, + .str = "+CME ERROR:", + .code = AT_RESULT_CODE_ERROR_CUSTOM, }, }; @@ -104,11 +104,11 @@ bool AT_cmd_write_data(AT_Handle handle, const void *data, size_t data_len) return false; } - //DEBUG("Write: "); + // DEBUG("Write: "); for (int i = 0; i < data_len; ++i) { // DEBUG("%x ", ((uint8_t *)data)[i]); } - //DEBUG("\n"); + // DEBUG("\n"); return (UART_write(handle->uartHandle, data, data_len) == data_len); } @@ -212,10 +212,10 @@ typedef struct At_RawResponse { static const DefLineType LINE_TYPES[COUNT_AT_LINE_TYPE] = { [AT_LINE_TYPE_RESPONSE] = { .pfx = RES_PREFIX, .sfx = RES_SUFFIX }, [AT_LINE_TYPE_CMD_ECHO] = - { - .pfx = CMD_PREFIX, - .sfx = CMD_SUFFIX, - }, + { + .pfx = CMD_PREFIX, + .sfx = CMD_SUFFIX, + }, }; static AtLineType get_line_type(AT_Handle handle, char *buf, size_t buf_size, @@ -273,8 +273,8 @@ static bool AT_cmd_read_line(AT_Handle handle, At_RawResponse *res) { // Figure out what type of response this is int lineLen = 0; - res->type = get_line_type(handle, handle->s_buf, sizeof(handle->s_buf), - &lineLen); + res->type = + get_line_type(handle, handle->s_buf, sizeof(handle->s_buf), &lineLen); if (res->type == AT_LINE_TYPE_INVALID) { return false; @@ -286,8 +286,8 @@ static bool AT_cmd_read_line(AT_Handle handle, At_RawResponse *res) case AT_LINE_TYPE_BINARY: if (handle->binaryReadHandler) { handle->s_bufLen = - lineLen + - 1; // TODO: this is dumb, get_line_type should just know about the temp buf + lineLen + 1; // TODO: this is dumb, get_line_type should + // just know about the temp buf res->size = handle->binaryReadHandler(handle, res->data); handle->binaryReadHandler = NULL; return (res->size >= 0); @@ -379,7 +379,8 @@ static bool check_unsolicited(AT_Handle handle, At_RawResponse *rawRes) const char *str = (char *)rawRes->data; while (handle->unsolicitedResponses[i].fmt) { const AT_UnsolicitedRes *curItem = &handle->unsolicitedResponses[i]; - // TODO: can probably clean up a bit to avoid strlen, but I'm not worried + // TODO: can probably clean up a bit to avoid strlen, but I'm not + // worried if (strncmp(curItem->fmt, str, strlen(curItem->fmt)) == 0) { if (curItem->cb) { // See if there's more than just the prefix (did we get data?) @@ -425,7 +426,7 @@ AT_Handle AT_cmd_init(UART_Handle hCom, const AT_UnsolicitedRes *resList, // Flush the UART as best we can // TODO: this might cause morebugs than it fixes - //AT_cmd_clear_buf(handle, 0); + // AT_cmd_clear_buf(handle, 0); handle->inbox = Mailbox_create(sizeof(At_RawResponse), 10, NULL, NULL); @@ -490,7 +491,8 @@ bool AT_cmd_parse_response(const char *str, const char *cmd, // Make sure this is from the command we expect if (cmd) { int cmd_len = (cur - str); - // TODO: double-check the strncmp's here - can probably use memcmp instead + // TODO: double-check the strncmp's here - can probably use memcmp + // instead if ((strlen(cmd) < cmd_len) || (strncmp(str, cmd, cmd_len) != 0)) { DEBUG("Response %.*s is not for %s\n", cmd_len, str, cmd); return false; @@ -588,7 +590,8 @@ static bool v_write_command(AT_Handle handle, const char *cmd_fmt, va_list argv) AT_cmd_write_data(handle, CMD_SUFFIX, strlen(CMD_SUFFIX)); } -// TODO: should probably ensure rx buffer is empty before sending new command, in case parser messed up +// TODO: should probably ensure rx buffer is empty before sending new command, +// in case parser messed up // TODO: I think this is dead code now bool AT_cmd_write_command(AT_Handle handle, const char *cmd_fmt, ...) { @@ -679,10 +682,12 @@ bool AT_cmd_get_response(AT_Handle handle, void *res_buf, size_t res_len) if (res_buf) { // TODO: bounds checking - // TODO: I probably shouldn't copy in data for a response I'm not expecting (eg unhandled unsolicited response) + // TODO: I probably shouldn't copy in data for a response I'm + // not expecting (eg unhandled unsolicited response) memcpy(res_buf, res.data, MIN(res_len, res.size)); } else { - DEBUG("Wasn't expecting information response but got one anyway\n"); + DEBUG( + "Wasn't expecting information response but got one anyway\n"); } continue; } @@ -695,7 +700,8 @@ bool AT_cmd_get_response(AT_Handle handle, void *res_buf, size_t res_len) return false; case AT_RESULT_CODE_OK: if (res_buf && !info_resp) { - DEBUG("was expecting information response but didn't get one\n"); + DEBUG( + "was expecting information response but didn't get one\n"); } DEBUG("%s: OK\n", res.data); return true; diff --git a/firmware/ec/src/devices/uart/at_cmd.h b/firmware/ec/src/devices/uart/at_cmd.h index 5b97f72306..c4dcaabb47 100644 --- a/firmware/ec/src/devices/uart/at_cmd.h +++ b/firmware/ec/src/devices/uart/at_cmd.h @@ -9,21 +9,21 @@ #pragma once #ifndef AT_CMD_H_ -#define AT_CMD_H_ +# define AT_CMD_H_ -#include +# include -#include -#include +# include +# include typedef struct AT_Info *AT_Handle; // TODO: this needs to be more like 22 -#define AT_MAX_PARAMS 12 -#define AT_STR_BUF_SIZE 100 +# define AT_MAX_PARAMS 12 +# define AT_STR_BUF_SIZE 100 /* TODO: timeouts are in sys ticks, not ms - macro? */ -#define AT_RES_DEFAULT_TIMEOUT 5000 +# define AT_RES_DEFAULT_TIMEOUT 5000 typedef enum AT_ParamType { AT_PARAM_TYPE_INT, diff --git a/firmware/ec/src/devices/uart/gsm.c b/firmware/ec/src/devices/uart/gsm.c index 7a8ddbc9a5..39bf0c8a63 100644 --- a/firmware/ec/src/devices/uart/gsm.c +++ b/firmware/ec/src/devices/uart/gsm.c @@ -127,43 +127,43 @@ static const AT_UnsolicitedRes unsolicitedList[] = { { // TODO: I have no idea what this is, but it's undocumented and annoying .fmt = "^STN:" }, { - .fmt = "+CREG:", - .cb = creg, + .fmt = "+CREG:", + .cb = creg, }, { - .fmt = "+SIM READY", - .cb = simReady, + .fmt = "+SIM READY", + .cb = simReady, }, { - .fmt = "+SIM DROP", + .fmt = "+SIM DROP", }, { - .fmt = "+CMTI:", - .cb = cmti, + .fmt = "+CMTI:", + .cb = cmti, }, { - .fmt = "+CMGR:", - .cb = cmgr, + .fmt = "+CMGR:", + .cb = cmgr, }, { - .fmt = "RING", - .cb = ring, + .fmt = "RING", + .cb = ring, }, { - .fmt = "NO CARRIER", + .fmt = "NO CARRIER", }, { - .fmt = "BUSY", + .fmt = "BUSY", }, { - .fmt = "CONNECT", + .fmt = "CONNECT", }, { - .fmt = "NO ANSWER", + .fmt = "NO ANSWER", }, { - .fmt = "+CLCC", - .cb = clcc, + .fmt = "+CLCC", + .cb = clcc, }, {} }; diff --git a/firmware/ec/src/devices/uart/gsm.h b/firmware/ec/src/devices/uart/gsm.h index bada54c55e..a3701cc450 100644 --- a/firmware/ec/src/devices/uart/gsm.h +++ b/firmware/ec/src/devices/uart/gsm.h @@ -9,12 +9,12 @@ #pragma once #ifndef GSM_H_ -#define GSM_H_ +# define GSM_H_ -#include +# include -#include -#include +# include +# include typedef struct AT_Info *AT_Handle; typedef AT_Handle GSM_Handle; @@ -113,8 +113,8 @@ bool GSM_cnmi(GSM_Handle handle, int mode, int mt, int bm, int ds, int bfr); typedef struct GsmCmgrInfo { char stat[12]; char oa[15]; - char alpha - [5]; // TODO: this isn't present with our module, what should it be? + char alpha[5]; // TODO: this isn't present with our module, what should it + // be? char scts[16]; // service center timestamp } GsmCmgrInfo; bool GSM_cmgr(GSM_Handle handle, unsigned int index, char *sms_out, diff --git a/firmware/ec/src/devices/uart/sbd.c b/firmware/ec/src/devices/uart/sbd.c index aef01ac670..cd62449388 100644 --- a/firmware/ec/src/devices/uart/sbd.c +++ b/firmware/ec/src/devices/uart/sbd.c @@ -67,12 +67,12 @@ static bool ciev(AT_Response *res, void *context) } static const AT_UnsolicitedRes unsolicitedList[] = { { - .fmt = "SBDRING", - .cb = sbdring, + .fmt = "SBDRING", + .cb = sbdring, }, { - .fmt = "+CIEV:", - .cb = ciev, + .fmt = "+CIEV:", + .cb = ciev, }, {} }; @@ -97,9 +97,9 @@ bool SBD_sbdix(SBD_Handle handle, SbdixInfo *info_out, bool alert_response) { const char *cmd_fmt = (alert_response) ? "+SBDIXA" : "+SBDIX"; AT_cmd_set_timeout(handle, SBDIX_TIMEOUT); - bool res = AT_cmd(handle, &s_AtRes, cmd_fmt) && - copy_int_responses(&s_AtRes, (int *)info_out, - NUM_RESPONSES(info_out)); + bool res = + AT_cmd(handle, &s_AtRes, cmd_fmt) && + copy_int_responses(&s_AtRes, (int *)info_out, NUM_RESPONSES(info_out)); AT_cmd_set_timeout(handle, AT_RES_DEFAULT_TIMEOUT); return res; } @@ -144,8 +144,8 @@ bool SBD_k(SBD_Handle handle, SbdFlowControl flowControl) bool SBD_sbdd(SBD_Handle handle, SbdDeleteType deleteType) { char resCode; - bool res = AT_cmd_raw(handle, &resCode, sizeof(resCode), "+SBDD%u", - deleteType); + bool res = + AT_cmd_raw(handle, &resCode, sizeof(resCode), "+SBDD%u", deleteType); return (res && resCode == '0'); } @@ -258,7 +258,7 @@ static int read_binary_data(AT_Handle handle, void *buf) // Read length (2B) AT_cmd_read16(handle, &res->size); - //DEBUG("Payload len: %d\n", res->size); + // DEBUG("Payload len: %d\n", res->size); // TODO: sanity check the payload length res->data = malloc(res->size); diff --git a/firmware/ec/src/devices/uart/sbd.h b/firmware/ec/src/devices/uart/sbd.h index d2d2851b0b..df2f1fd099 100644 --- a/firmware/ec/src/devices/uart/sbd.h +++ b/firmware/ec/src/devices/uart/sbd.h @@ -75,7 +75,7 @@ typedef struct SbdsxInfo { SbdsInfo sbdsInfo; //!< Regular SBD status info int raFlag; //!< Ring alert still needs to be answered int msgWaiting; //!< Number of MT messages at gateway - //!< (updated every SBD session) + //!< (updated every SBD session) } SbdsxInfo; typedef enum SbdCiev { diff --git a/firmware/ec/src/drivers/GpioNative.c b/firmware/ec/src/drivers/GpioNative.c index 601ebbf60b..c963f04317 100644 --- a/firmware/ec/src/drivers/GpioNative.c +++ b/firmware/ec/src/drivers/GpioNative.c @@ -20,7 +20,7 @@ static GateMutex_Handle s_cb_data_mutex; static int GpioNative_probe(void) { - //This probe function is just a dummy as we are all ready accessing EC. + // This probe function is just a dummy as we are all ready accessing EC. return OCGPIO_SUCCESS; } void GpioNative_init(void) @@ -92,7 +92,7 @@ static int GpioNative_configure(const OcGpio_Pin *pin, uint32_t cfg) } else { ti_cfg |= GPIO_CFG_OUTPUT; ti_cfg |= - (hw_cfg.out_cfg << GPIO_CFG_IO_LSB); /* Include od/pu/pd cfg */ + (hw_cfg.out_cfg << GPIO_CFG_IO_LSB); /* Include od/pu/pd cfg */ ti_cfg |= (hw_cfg.out_str << GPIO_CFG_OUT_STRENGTH_LSB); ti_cfg |= (io_cfg.default_val << GPIO_CFG_OUT_BIT); } diff --git a/firmware/ec/src/drivers/GpioPCA9557.c b/firmware/ec/src/drivers/GpioPCA9557.c index fdec43fb01..7e3dfa68cb 100644 --- a/firmware/ec/src/drivers/GpioPCA9557.c +++ b/firmware/ec/src/drivers/GpioPCA9557.c @@ -16,7 +16,8 @@ static int GpioPCA9557_probe(const OcGpio_Port *port) { - /* if we are able to read configuration register this means PCA device is accessible*/ + /* if we are able to read configuration register this means PCA device is + * accessible*/ const PCA9557_Cfg *pca_cfg = port->cfg; PCA9557_Obj *obj = port->object_data; if (PCA9557_getConfig(&pca_cfg->i2c_dev, &obj->reg_config) != RETURN_OK) { @@ -44,7 +45,7 @@ static int GpioPCA9557_init(const OcGpio_Port *port) /* Just in case, we'll read the true values */ if (PCA9557_getOutput(&pca_cfg->i2c_dev, &obj->reg_output) != RETURN_OK || PCA9557_getPolarity(&pca_cfg->i2c_dev, &obj->reg_polarity) != - RETURN_OK || + RETURN_OK || PCA9557_getConfig(&pca_cfg->i2c_dev, &obj->reg_config) != RETURN_OK) { return OCGPIO_FAILURE; } diff --git a/firmware/ec/src/drivers/GpioSX1509.c b/firmware/ec/src/drivers/GpioSX1509.c index 3f823ad841..d1f41a6528 100644 --- a/firmware/ec/src/drivers/GpioSX1509.c +++ b/firmware/ec/src/drivers/GpioSX1509.c @@ -60,7 +60,8 @@ static void HandleIRQ(void *context) static int GpioSX1509_probe(const OcGpio_Port *port) { - /* if we are able to read configuration register this means PCA device is accessible*/ + /* if we are able to read configuration register this means PCA device is + * accessible*/ const SX1509_Cfg *sx_cfg = port->cfg; uint8_t input_reg; if (ioexp_led_get_data(&sx_cfg->i2c_dev, 0, &input_reg) != RETURN_OK) { @@ -118,7 +119,7 @@ static int GpioSX1509_write(const OcGpio_Pin *pin, bool value) const sx1509RegType bank = GetBank(pin->idx); const uint8_t pin_idx = RelativePinIdx(pin->idx); const uint8_t new_reg_value = - set_bit8(obj->regs[bank].data, pin_idx, value); + set_bit8(obj->regs[bank].data, pin_idx, value); if (ioexp_led_set_data(&sx_cfg->i2c_dev, bank, new_reg_value, 0x00) != RETURN_OK) { goto cleanup; @@ -173,8 +174,8 @@ static int GpioSX1509_configure(const OcGpio_Pin *pin, uint32_t cfg) const IArg mutexKey = GateMutex_enter(obj->mutex); { /* Invert the polarity (1) if necessary */ - reg->polarity = set_bit8(reg->polarity, pin_idx, - pin->hw_cfg & OCGPIO_CFG_INVERT); + reg->polarity = + set_bit8(reg->polarity, pin_idx, pin->hw_cfg & OCGPIO_CFG_INVERT); if (ioexp_led_config_polarity(&sx_cfg->i2c_dev, bank, reg->polarity, 0x00) != RETURN_OK) { goto cleanup; @@ -197,7 +198,7 @@ static int GpioSX1509_configure(const OcGpio_Pin *pin, uint32_t cfg) /* Disable (1) the input buffer */ reg->input_buf_disable = - set_bit8(reg->input_buf_disable, pin_idx, 1); + set_bit8(reg->input_buf_disable, pin_idx, 1); if (ioexp_led_config_inputbuffer(&sx_cfg->i2c_dev, bank, reg->input_buf_disable, 0x00) != RETURN_OK) { @@ -216,7 +217,7 @@ static int GpioSX1509_configure(const OcGpio_Pin *pin, uint32_t cfg) } else { /* Enable (0) the input buffer */ reg->input_buf_disable = - set_bit8(reg->input_buf_disable, pin_idx, 0); + set_bit8(reg->input_buf_disable, pin_idx, 0); if (ioexp_led_config_inputbuffer(&sx_cfg->i2c_dev, bank, reg->input_buf_disable, 0x00) != RETURN_OK) { @@ -232,19 +233,17 @@ static int GpioSX1509_configure(const OcGpio_Pin *pin, uint32_t cfg) switch (bank) { case SX1509_REG_A: if (ioexp_led_config_edge_sense_A( - &sx_cfg->i2c_dev, - SX1509_EDGE_SENSE_REG_LOW_HIGH, - LOBYTE(reg->edge_sense), - HIBYTE(reg->edge_sense)) != RETURN_OK) { + &sx_cfg->i2c_dev, SX1509_EDGE_SENSE_REG_LOW_HIGH, + LOBYTE(reg->edge_sense), + HIBYTE(reg->edge_sense)) != RETURN_OK) { goto cleanup; } break; case SX1509_REG_B: if (ioexp_led_config_edge_sense_B( - &sx_cfg->i2c_dev, - SX1509_EDGE_SENSE_REG_LOW_HIGH, - LOBYTE(reg->edge_sense), - HIBYTE(reg->edge_sense)) != RETURN_OK) { + &sx_cfg->i2c_dev, SX1509_EDGE_SENSE_REG_LOW_HIGH, + LOBYTE(reg->edge_sense), + HIBYTE(reg->edge_sense)) != RETURN_OK) { goto cleanup; } break; @@ -253,10 +252,10 @@ static int GpioSX1509_configure(const OcGpio_Pin *pin, uint32_t cfg) goto cleanup; } - pu_en = ((pin->hw_cfg & OCGPIO_CFG_IN_PULL_MASK) == - OCGPIO_CFG_IN_PU); - pd_en = ((pin->hw_cfg & OCGPIO_CFG_IN_PULL_MASK) == - OCGPIO_CFG_IN_PD); + pu_en = + ((pin->hw_cfg & OCGPIO_CFG_IN_PULL_MASK) == OCGPIO_CFG_IN_PU); + pd_en = + ((pin->hw_cfg & OCGPIO_CFG_IN_PULL_MASK) == OCGPIO_CFG_IN_PD); } /* Set pull-up/down registers */ @@ -274,9 +273,8 @@ static int GpioSX1509_configure(const OcGpio_Pin *pin, uint32_t cfg) /* Set pin direction (0 output, 1 input) */ reg->direction = set_bit8(reg->direction, pin_idx, io_cfg.dir); - if (ioexp_led_config_data_direction(&sx_cfg->i2c_dev, bank, - reg->direction, - 0x00) != RETURN_OK) { + if (ioexp_led_config_data_direction( + &sx_cfg->i2c_dev, bank, reg->direction, 0x00) != RETURN_OK) { goto cleanup; } diff --git a/firmware/ec/src/drivers/mdio_bb.c b/firmware/ec/src/drivers/mdio_bb.c index 44baeca1d0..9de2300739 100644 --- a/firmware/ec/src/drivers/mdio_bb.c +++ b/firmware/ec/src/drivers/mdio_bb.c @@ -190,8 +190,8 @@ void mdiobb_write_by_paging(int smi_device, int reg_addr, int data) mdiobb_write(0x7, 0x19, data); - write_reg = (0x1 << 15) | (0x1 << 12) | (0x1 << 10) | (smi_device << 5) | - reg_addr; + write_reg = + (0x1 << 15) | (0x1 << 12) | (0x1 << 10) | (smi_device << 5) | reg_addr; mdiobb_write(0x7, 0x18, write_reg); do { @@ -216,7 +216,7 @@ int mdiobb_read_by_paging(int smi_device, int reg_addr) } while (1); write_reg = - (1 << 15) | (1 << 12) | (0x2 << 10) | (smi_device << 5) | reg_addr; + (1 << 15) | (1 << 12) | (0x2 << 10) | (smi_device << 5) | reg_addr; mdiobb_write(0x7, 0x18, write_reg); /* @@ -420,8 +420,8 @@ void mdiobb_set_bits(int smi_device, int reg_addr, int datamask) mdiobb_write(0x7, 0x19, datamask); - write_reg = (0x1 << 15) | (0x1 << 12) | (0x1 << 10) | (smi_device << 5) | - reg_addr; + write_reg = + (0x1 << 15) | (0x1 << 12) | (0x1 << 10) | (smi_device << 5) | reg_addr; mdiobb_write(0x7, 0x18, write_reg); do { @@ -453,8 +453,8 @@ void mdiobb_clear_bits(int smi_device, int reg_addr, int datamask) mdiobb_write(0x7, 0x19, datamask); - write_reg = (0x1 << 15) | (0x1 << 12) | (0x1 << 10) | (smi_device << 5) | - reg_addr; + write_reg = + (0x1 << 15) | (0x1 << 12) | (0x1 << 10) | (smi_device << 5) | reg_addr; mdiobb_write(0x7, 0x18, write_reg); do { diff --git a/firmware/ec/src/helpers/array.h b/firmware/ec/src/helpers/array.h index a65c7074ed..8f0db7aa35 100644 --- a/firmware/ec/src/helpers/array.h +++ b/firmware/ec/src/helpers/array.h @@ -9,8 +9,8 @@ #pragma once #ifndef HELPERS_ARRAY_H_ -#define HELPERS_ARRAY_H_ +# define HELPERS_ARRAY_H_ -#define ARRAY_SIZE(a) (sizeof(a) / sizeof(a[0])) +# define ARRAY_SIZE(a) (sizeof(a) / sizeof(a[0])) #endif /* HELPERS_ARRAY_H_ */ diff --git a/firmware/ec/src/helpers/attribute.h b/firmware/ec/src/helpers/attribute.h index acaa53237e..43e2b1b37e 100644 --- a/firmware/ec/src/helpers/attribute.h +++ b/firmware/ec/src/helpers/attribute.h @@ -9,10 +9,10 @@ #pragma once #ifndef HELPERS_ATTRIBUTE_H_ -#define HELPERS_ATTRIBUTE_H_ +# define HELPERS_ATTRIBUTE_H_ -#define PACKED __attribute__((__packed__)) +# define PACKED __attribute__((__packed__)) -#define UNUSED(x) (void)(x) +# define UNUSED(x) (void)(x) #endif /* HELPERS_ATTRIBUTE_H_ */ diff --git a/firmware/ec/src/helpers/i2c.c b/firmware/ec/src/helpers/i2c.c index 65b4ec0049..0391f56626 100644 --- a/firmware/ec/src/helpers/i2c.c +++ b/firmware/ec/src/helpers/i2c.c @@ -17,8 +17,8 @@ bool I2C_write(I2C_Handle handle, uint8_t reg, unsigned char slaveAddress, const void *buffer, size_t size) { const size_t msg_size = sizeof(I2C_Message) + size; - uint8_t data - [msg_size]; // TODO: should probably use malloc instead of using stack + uint8_t data[msg_size]; // TODO: should probably use malloc instead of using + // stack I2C_Message *msg = (I2C_Message *)data; msg->subAddr = reg; memcpy(&msg->data, buffer, size); diff --git a/firmware/ec/src/helpers/i2c.h b/firmware/ec/src/helpers/i2c.h index de5277c8e8..7a78c39f8f 100644 --- a/firmware/ec/src/helpers/i2c.h +++ b/firmware/ec/src/helpers/i2c.h @@ -9,9 +9,9 @@ #pragma once #ifndef HELPERS_I2C_H_ -#define HELPERS_I2C_H_ +# define HELPERS_I2C_H_ -#include +# include bool I2C_write(I2C_Handle handle, uint8_t reg, unsigned char slaveAddress, const void *buffer, size_t size); diff --git a/firmware/ec/src/helpers/math.h b/firmware/ec/src/helpers/math.h index 4499d13ee4..10d68c88e5 100644 --- a/firmware/ec/src/helpers/math.h +++ b/firmware/ec/src/helpers/math.h @@ -9,11 +9,11 @@ #pragma once #ifndef HELPERS_MATH_H_ -#define HELPERS_MATH_H_ +# define HELPERS_MATH_H_ -#define MIN(X, Y) (((X) < (Y)) ? (X) : (Y)) -#define MAX(X, Y) (((X) > (Y)) ? (X) : (Y)) +# define MIN(X, Y) (((X) < (Y)) ? (X) : (Y)) +# define MAX(X, Y) (((X) > (Y)) ? (X) : (Y)) -#define CONSTRAIN(x, min, max) MIN(MAX((x), (min)), (max)) +# define CONSTRAIN(x, min, max) MIN(MAX((x), (min)), (max)) #endif /* HELPERS_MATH_H_ */ diff --git a/firmware/ec/src/helpers/memory.h b/firmware/ec/src/helpers/memory.h index 056586e7f4..853790aa8f 100644 --- a/firmware/ec/src/helpers/memory.h +++ b/firmware/ec/src/helpers/memory.h @@ -9,29 +9,29 @@ #pragma once #ifndef HELPERS_MEMORY_H_ -#define HELPERS_MEMORY_H_ +# define HELPERS_MEMORY_H_ -#include -#include -#include +# include +# include +# include -#ifndef HIWORD -#define HIWORD(x) ((uint16_t)((x) >> 16)) -#endif +# ifndef HIWORD +# define HIWORD(x) ((uint16_t)((x) >> 16)) +# endif -#ifndef LOWORD -#define LOWORD(x) ((uint16_t)(x)) -#endif +# ifndef LOWORD +# define LOWORD(x) ((uint16_t)(x)) +# endif -#ifndef HIBYTE -#define HIBYTE(x) ((uint8_t)((x) >> 8)) -#endif +# ifndef HIBYTE +# define HIBYTE(x) ((uint8_t)((x) >> 8)) +# endif -#ifndef LOBYTE -#define LOBYTE(x) ((uint8_t)(x)) -#endif +# ifndef LOBYTE +# define LOBYTE(x) ((uint8_t)(x)) +# endif -#define zalloc(size) calloc((size), 1) +# define zalloc(size) calloc((size), 1) void printMemory(const void *start, size_t size); diff --git a/firmware/ec/src/interfaces/Ethernet/tcp_tx_rx.c b/firmware/ec/src/interfaces/Ethernet/tcp_tx_rx.c index e7363864e7..c0b2dcfb1f 100644 --- a/firmware/ec/src/interfaces/Ethernet/tcp_tx_rx.c +++ b/firmware/ec/src/interfaces/Ethernet/tcp_tx_rx.c @@ -222,7 +222,7 @@ Void tcpHandler(UArg arg0, UArg arg1) task_Tx_Params.arg0 = (UArg)clientfd; task_Tx_Params.stackSize = 1280; task_Tx_Handle = - Task_create((Task_FuncPtr)tcp_Tx_Worker, &task_Tx_Params, &eb); + Task_create((Task_FuncPtr)tcp_Tx_Worker, &task_Tx_Params, &eb); if (task_Tx_Handle == NULL) { LOGGER_DEBUG("Error: Failed to create new Task\n"); close(clientfd); @@ -233,7 +233,7 @@ Void tcpHandler(UArg arg0, UArg arg1) task_Rx_Params.arg0 = (UArg)clientfd; task_Rx_Params.stackSize = 1280; task_Rx_Handle = - Task_create((Task_FuncPtr)tcp_Rx_Worker, &task_Rx_Params, &eb); + Task_create((Task_FuncPtr)tcp_Rx_Worker, &task_Rx_Params, &eb); if (task_Rx_Handle == NULL) { LOGGER_DEBUG("Error: Failed to create new Task\n"); close(clientfd); diff --git a/firmware/ec/src/interfaces/UART/uartdma.c b/firmware/ec/src/interfaces/UART/uartdma.c index 45e7596f62..c76bc3d91e 100644 --- a/firmware/ec/src/interfaces/UART/uartdma.c +++ b/firmware/ec/src/interfaces/UART/uartdma.c @@ -106,8 +106,8 @@ void UART4IntHandler(void) ui32Mode = uDMAChannelModeGet(UDMA_CHANNEL_TMR0A | UDMA_PRI_SELECT); if (ui32Mode == UDMA_MODE_STOP) { uDMAChannelTransferSet( - UDMA_CHANNEL_TMR0A | UDMA_PRI_SELECT, UDMA_MODE_PINGPONG, - (void *)(UART4_BASE + UART_O_DR), ui8RxBufA, sizeof(ui8RxBufA)); + UDMA_CHANNEL_TMR0A | UDMA_PRI_SELECT, UDMA_MODE_PINGPONG, + (void *)(UART4_BASE + UART_O_DR), ui8RxBufA, sizeof(ui8RxBufA)); /*Preparing message to send to UART RX Queue*/ memset(ui8uartdmaRxBuf, '\0', UART_RXBUF_SIZE); memcpy(ui8uartdmaRxBuf, ui8RxBufA, sizeof(ui8RxBufA)); @@ -118,8 +118,8 @@ void UART4IntHandler(void) ui32Mode = uDMAChannelModeGet(UDMA_CHANNEL_TMR0A | UDMA_ALT_SELECT); if (ui32Mode == UDMA_MODE_STOP) { uDMAChannelTransferSet( - UDMA_CHANNEL_TMR0A | UDMA_ALT_SELECT, UDMA_MODE_PINGPONG, - (void *)(UART4_BASE + UART_O_DR), ui8RxBufB, sizeof(ui8RxBufB)); + UDMA_CHANNEL_TMR0A | UDMA_ALT_SELECT, UDMA_MODE_PINGPONG, + (void *)(UART4_BASE + UART_O_DR), ui8RxBufB, sizeof(ui8RxBufB)); /*Preparing message to send to UART RX Queue*/ memset(ui8uartdmaRxBuf, '\0', UART_RXBUF_SIZE); memcpy(ui8uartdmaRxBuf, ui8RxBufB, sizeof(ui8RxBufB)); @@ -148,7 +148,7 @@ void resetUARTDMA(void) void ConfigureUART(void) { LOGGER_DEBUG( - "UARTDMACTR:INFO::Configuring UART interface for communication.\n"); + "UARTDMACTR:INFO::Configuring UART interface for communication.\n"); /* Enable the GPIO Peripheral used by the UART.*/ SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOK); @@ -170,7 +170,7 @@ void ConfigureUART(void) void InitUART4Transfer(void) { LOGGER_DEBUG( - "UARTDMACTR:INFO::Configuring UART interrupt and uDMA channel for communication to GPP.\n"); + "UARTDMACTR:INFO::Configuring UART interrupt and uDMA channel for communication to GPP.\n"); uint_fast16_t ui16Idx; const uint32_t SysClock = 120000000; @@ -188,7 +188,7 @@ void InitUART4Transfer(void) UARTConfigSetExpClk(UART4_BASE, SysClock, 115200, UART_CONFIG_WLEN_8 | UART_CONFIG_STOP_ONE | - UART_CONFIG_PAR_NONE); + UART_CONFIG_PAR_NONE); /* Set both the TX and RX trigger thresholds to 4. */ UARTFIFOLevelSet(UART4_BASE, UART_FIFO_TX4_8, UART_FIFO_RX4_8); @@ -198,18 +198,17 @@ void InitUART4Transfer(void) UARTEnable(UART4_BASE); UARTDMAEnable(UART4_BASE, UART_DMA_RX | UART_DMA_TX); - uDMAChannelAttributeDisable(UDMA_CHANNEL_TMR0A, - UDMA_ATTR_ALTSELECT | UDMA_ATTR_USEBURST | - UDMA_ATTR_HIGH_PRIORITY | - UDMA_ATTR_REQMASK); + uDMAChannelAttributeDisable( + UDMA_CHANNEL_TMR0A, UDMA_ATTR_ALTSELECT | UDMA_ATTR_USEBURST | + UDMA_ATTR_HIGH_PRIORITY | UDMA_ATTR_REQMASK); uDMAChannelControlSet(UDMA_CHANNEL_TMR0A | UDMA_PRI_SELECT, UDMA_SIZE_8 | UDMA_SRC_INC_NONE | UDMA_DST_INC_8 | - UDMA_ARB_4); + UDMA_ARB_4); uDMAChannelControlSet(UDMA_CHANNEL_TMR0A | UDMA_ALT_SELECT, UDMA_SIZE_8 | UDMA_SRC_INC_NONE | UDMA_DST_INC_8 | - UDMA_ARB_4); + UDMA_ARB_4); uDMAChannelTransferSet(UDMA_CHANNEL_TMR0A | UDMA_PRI_SELECT, UDMA_MODE_PINGPONG, (void *)(UART4_BASE + UART_O_DR), @@ -221,13 +220,13 @@ void InitUART4Transfer(void) uDMAChannelAttributeDisable(UDMA_CHANNEL_TMR0B, UDMA_ATTR_ALTSELECT | UDMA_ATTR_HIGH_PRIORITY | - UDMA_ATTR_REQMASK); + UDMA_ATTR_REQMASK); uDMAChannelAttributeEnable(UDMA_CHANNEL_TMR0B, UDMA_ATTR_USEBURST); uDMAChannelControlSet(UDMA_CHANNEL_TMR0B | UDMA_PRI_SELECT, UDMA_SIZE_8 | UDMA_SRC_INC_8 | UDMA_DST_INC_NONE | - UDMA_ARB_4); + UDMA_ARB_4); uDMAChannelTransferSet(UDMA_CHANNEL_TMR0B | UDMA_PRI_SELECT, UDMA_MODE_BASIC, ui8TxBuf, @@ -282,8 +281,8 @@ void uartDMAinterface_init(void) /*UART OCMP RX Message Queue*/ uartRxMsgQueue = Util_constructQueue(&uartRxMsg); LOGGER_DEBUG( - "UARTDMACTR:INFO::Constructing message Queue 0x%x for UART RX OCMP Messages.\n", - uartRxMsgQueue); + "UARTDMACTR:INFO::Constructing message Queue 0x%x for UART RX OCMP Messages.\n", + uartRxMsgQueue); LOGGER_DEBUG("UARTDMACTR:INFO::Waiting for OCMP UART RX messgaes....!!!\n"); } @@ -322,8 +321,8 @@ static void uartdma_rx_taskfxn(UArg arg0, UArg arg1) Util_enqueueMsg(gossiperRxMsgQueue, semGossiperMsg, pWrite); } else { LOGGER_ERROR( - "UARTDMACTR:ERROR:: No memory left for Msg Length %d.\n", - UART_RXBUF_SIZE); + "UARTDMACTR:ERROR:: No memory left for Msg Length %d.\n", + UART_RXBUF_SIZE); } } } @@ -346,8 +345,8 @@ void uartdma_tx_taskinit(void) /*UART OCMP TX Message Queue*/ uartTxMsgQueue = Util_constructQueue(&uartTxMsg); LOGGER_DEBUG( - "UARTDMACTR:INFO::Constructing message Queue 0x%x for UART TX OCMP Messages.\n", - uartTxMsgQueue); + "UARTDMACTR:INFO::Constructing message Queue 0x%x for UART TX OCMP Messages.\n", + uartTxMsgQueue); } /***************************************************************************** @@ -377,8 +376,8 @@ static ReturnStatus uartdma_process_tx_message(uint8_t *pMsg) LOGGER_DEBUG("\n"); #endif uDMAChannelTransferSet( - UDMA_CHANNEL_TMR0B | UDMA_PRI_SELECT, UDMA_MODE_BASIC, ui8TxBuf, - (void *)(UART4_BASE + UART_O_DR), sizeof(ui8TxBuf)); + UDMA_CHANNEL_TMR0B | UDMA_PRI_SELECT, UDMA_MODE_BASIC, ui8TxBuf, + (void *)(UART4_BASE + UART_O_DR), sizeof(ui8TxBuf)); uDMAChannelEnable(UDMA_CHANNEL_TMR0B); } else { status = RETURN_NOTOK; diff --git a/firmware/ec/src/interfaces/USB/usb.c b/firmware/ec/src/interfaces/USB/usb.c index 01dd6bd591..86872c8874 100644 --- a/firmware/ec/src/interfaces/USB/usb.c +++ b/firmware/ec/src/interfaces/USB/usb.c @@ -37,7 +37,7 @@ //***************************************************************************** // HANDLES DEFINITION //***************************************************************************** -//Semaphore +// Semaphore Semaphore_Handle semUSBRX; Semaphore_Handle semUSBTX; @@ -87,11 +87,11 @@ void usb_tx_taskinit(void) usbTxMsgQueue = Util_constructQueue(&usbtTxMsg); if (usbTxMsgQueue == NULL) { LOGGER_DEBUG( - "USBTX:ERROR:: Failed in Constructing USB TX Message Queue for TX Messages.\n"); + "USBTX:ERROR:: Failed in Constructing USB TX Message Queue for TX Messages.\n"); } else { LOGGER_DEBUG( - "USBTX:INFO:: Constructing message Queue for 0x%x USB TX Messages.\n", - usbTxMsgQueue); + "USBTX:INFO:: Constructing message Queue for 0x%x USB TX Messages.\n", + usbTxMsgQueue); } } @@ -117,11 +117,11 @@ void usb_rx_taskinit(void) usbRxMsgQueue = Util_constructQueue(&usbRxMsg); if (usbRxMsgQueue == NULL) { LOGGER_DEBUG( - "USBRX:ERROR:: Failed in Constructing USB RX Message Queue for RX Messages.\n"); + "USBRX:ERROR:: Failed in Constructing USB RX Message Queue for RX Messages.\n"); } else { LOGGER_DEBUG( - "USBRX:INFO:: Constructing message Queue for 0x%x USB RX Messages.\n", - usbRxMsgQueue); + "USBRX:INFO:: Constructing message Queue for 0x%x USB RX Messages.\n", + usbRxMsgQueue); } } @@ -195,8 +195,8 @@ void usb_rx_taskfxn(UArg arg0, UArg arg1) /* Block while the device is NOT connected to the USB */ USBCDCD_waitForConnect(BIOS_WAIT_FOREVER); - received = USBCDCD_receiveData(ui8RxBuf, USB_FRAME_LENGTH, - BIOS_WAIT_FOREVER); + received = + USBCDCD_receiveData(ui8RxBuf, USB_FRAME_LENGTH, BIOS_WAIT_FOREVER); ui8RxBuf[received] = '\0'; if (received && (ui8RxBuf[0] == 0x55)) { /* OCMP USB RX Messgaes */ @@ -218,8 +218,8 @@ void usb_rx_taskfxn(UArg arg0, UArg arg1) Util_enqueueMsg(gossiperRxMsgQueue, semGossiperMsg, pWrite); } else { LOGGER_ERROR( - "USBRX:ERROR:: No memory left for Msg Length %d.\n", - USB_FRAME_LENGTH); + "USBRX:ERROR:: No memory left for Msg Length %d.\n", + USB_FRAME_LENGTH); } } } diff --git a/firmware/ec/src/interfaces/USB/usbcdcd.c b/firmware/ec/src/interfaces/USB/usbcdcd.c index df42cbb2ac..a626c9f966 100644 --- a/firmware/ec/src/interfaces/USB/usbcdcd.c +++ b/firmware/ec/src/interfaces/USB/usbcdcd.c @@ -63,7 +63,7 @@ #if defined(TIVAWARE) typedef uint32_t USBCDCDEventType; #else -#define eUSBModeForceDevice USB_MODE_FORCE_DEVICE +# define eUSBModeForceDevice USB_MODE_FORCE_DEVICE typedef unsigned long USBCDCDEventType; #endif diff --git a/firmware/ec/src/main.c b/firmware/ec/src/main.c index 9e153c0f19..0dde35efac 100644 --- a/firmware/ec/src/main.c +++ b/firmware/ec/src/main.c @@ -27,30 +27,29 @@ extern int ethernet_start(void); static void openCellular_init(void) { LOGGER_DEBUG( - "|||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||\n"); + "|||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||\n"); LOGGER_DEBUG( - "|||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||\n"); + "|||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||\n"); LOGGER_DEBUG( - "|||| |||| |||| ||||| |||||| |||| |||| |||| ||||||||| ||||||||| |||| |||| ||||||||| |||| ||||\n"); + "|||| |||| |||| ||||| |||||| |||| |||| |||| ||||||||| ||||||||| |||| |||| ||||||||| |||| ||||\n"); LOGGER_DEBUG( - "|||| |||| |||| |||| |||| |||||||||| | ||||| |||| ||||||||| ||||||||| ||||||||| ||||||||| |||| |||| ||||||||| |||| |||| |||| ||||\n"); + "|||| |||| |||| |||| |||| |||||||||| | ||||| |||| ||||||||| ||||||||| ||||||||| ||||||||| |||| |||| ||||||||| |||| |||| |||| ||||\n"); LOGGER_DEBUG( - "|||| |||| |||| |||| |||| |||||||||| || |||| |||| ||||||||| ||||||||| ||||||||| ||||||||| |||| |||| ||||||||| |||| |||| |||| ||||\n"); + "|||| |||| |||| |||| |||| |||||||||| || |||| |||| ||||||||| ||||||||| ||||||||| ||||||||| |||| |||| ||||||||| |||| |||| |||| ||||\n"); LOGGER_DEBUG( - "|||| |||| |||| |||| ||||| ||| ||| |||| ||||||||| |||| ||||||||| ||||||||| |||| |||| ||||||||| |||| ||||\n"); + "|||| |||| |||| |||| ||||| ||| ||| |||| ||||||||| |||| ||||||||| ||||||||| |||| |||| ||||||||| |||| ||||\n"); LOGGER_DEBUG( - "|||| |||| |||| |||||||||| |||||||||| |||| || |||| ||||||||| ||||||||| ||||||||| ||||||||| |||| |||| ||||||||| |||| |||| || ||||||\n"); + "|||| |||| |||| |||||||||| |||||||||| |||| || |||| ||||||||| ||||||||| ||||||||| ||||||||| |||| |||| ||||||||| |||| |||| || ||||||\n"); LOGGER_DEBUG( - "|||| |||| |||| |||||||||| |||||||||| ||||| | |||| ||||||||| ||||||||| ||||||||| ||||||||| |||| |||| ||||||||| |||| |||| ||| |||||\n"); + "|||| |||| |||| |||||||||| |||||||||| ||||| | |||| ||||||||| ||||||||| ||||||||| ||||||||| |||| |||| ||||||||| |||| |||| ||| |||||\n"); LOGGER_DEBUG( - "|||| |||| |||||||||| ||||| |||||| |||| |||| |||| |||| |||| |||| |||| |||| |||| |||| ||||\n"); + "|||| |||| |||||||||| ||||| |||||| |||| |||| |||| |||| |||| |||| |||| |||| |||| |||| ||||\n"); LOGGER_DEBUG( - "|||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||\n"); + "|||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||\n"); LOGGER_DEBUG( - "|||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||\n"); - LOGGER_DEBUG( - "\nOCWare v" xstr(_FW_REV_MAJOR_) "." xstr(_FW_REV_MINOR_) "." xstr( - _FW_REV_BUGFIX_) "-" xstr(_FW_REV_TAG_) "\n"); + "|||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||\n"); + LOGGER_DEBUG("\nOCWare v" xstr(_FW_REV_MAJOR_) "." xstr( + _FW_REV_MINOR_) "." xstr(_FW_REV_BUGFIX_) "-" xstr(_FW_REV_TAG_) "\n"); LOGGER_DEBUG("Build Date: " __DATE__ " " __TIME__ "\n\n"); } diff --git a/firmware/ec/src/post/post.c b/firmware/ec/src/post/post.c index 70da7da2d9..6664d9f4b4 100644 --- a/firmware/ec/src/post/post.c +++ b/firmware/ec/src/post/post.c @@ -87,22 +87,22 @@ void _post_complete() uint8_t iter = 0; LOGGER_DEBUG("POST:INFO::POST test is completed.\n"); LOGGER_DEBUG( - "||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||\n"); + "||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||\n"); LOGGER_DEBUG( - "|||||||||||||||||||||||||||||||||||||||||||||||||||||||POST TABLE|||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||\n"); + "|||||||||||||||||||||||||||||||||||||||||||||||||||||||POST TABLE|||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||\n"); /* POST results */ for (iter = 0; iter < POST_RECORDS; iter++) { LOGGER_DEBUG( - "\t POST:INFO:: POSTRESULT SS: 0x%x Device S.No: 0x%x I2C Bus: 0x%x Device Addr: 0x%x Device Id: 0x%x Manufacture Id: 0x%x Status: 0x%x.\n", - PostResult[iter].subsystem, PostResult[iter].devSno, - PostResult[iter].i2cBus, PostResult[iter].devAddr, - PostResult[iter].devId, PostResult[iter].manId, - PostResult[iter].status); + "\t POST:INFO:: POSTRESULT SS: 0x%x Device S.No: 0x%x I2C Bus: 0x%x Device Addr: 0x%x Device Id: 0x%x Manufacture Id: 0x%x Status: 0x%x.\n", + PostResult[iter].subsystem, PostResult[iter].devSno, + PostResult[iter].i2cBus, PostResult[iter].devAddr, + PostResult[iter].devId, PostResult[iter].manId, + PostResult[iter].status); } LOGGER_DEBUG( - "||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||\n"); + "||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||\n"); LOGGER_DEBUG( - "||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||\n"); + "||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||\n"); } /***************************************************************************** @@ -130,8 +130,10 @@ void post_init_POSTData(POSTData *pData, OCMPSubsystem subsystem, /***************************************************************************** ** FUNCTION NAME : post_update_deviceInfo ** - ** DESCRIPTION : Update bus, device address, manufacturing ID and device ID in post struct.\ - ** if no I2C bus is associated with device than it will be updated to 0xFF. + ** DESCRIPTION : Update bus, device address, manufacturing ID and device + *ID in post struct.\ + ** if no I2C bus is associated with device than it will be + *updated to 0xFF. ** ** ARGUMENTS : I2C Bus, Address, man Id, device Id. ** @@ -192,8 +194,8 @@ static void post_move_to_next_subsystem() *****************************************************************************/ static void post_update_result_to_bigbrother(OCMPMessageFrame *pPOSTMsg) { - pPOSTMsg->message.subsystem = - OC_SS_SYS; //OC_SUBSYSTEM_MAX_LIMIT subsystem number taken for bigbrother + pPOSTMsg->message.subsystem = OC_SS_SYS; // OC_SUBSYSTEM_MAX_LIMIT subsystem + // number taken for bigbrother memcpy((pPOSTMsg->message.ocmp_data), &postState, 1); Util_enqueueMsg(bigBrotherRxMsgQueue, semBigBrotherMsg, (uint8_t *)pPOSTMsg); @@ -243,9 +245,8 @@ static ReturnStatus post_process_msg(OCMPSubsystem OC_subSystem) static OCMPMessageFrame *post_create_execute_msg(OCMPSubsystem OC_subSystem) { LOGGER_DEBUG("POST:INFO::Activation POST for SS %d.", OC_subSystem); - OCMPMessageFrame *postExeMsg = - create_ocmp_msg_frame(OC_subSystem, OCMP_MSG_TYPE_POST, - OCMP_AXN_TYPE_ACTIVE, 0x00, 0x00, 1); + OCMPMessageFrame *postExeMsg = create_ocmp_msg_frame( + OC_subSystem, OCMP_MSG_TYPE_POST, OCMP_AXN_TYPE_ACTIVE, 0x00, 0x00, 1); return postExeMsg; } @@ -271,7 +272,7 @@ static OCMPMessageFrame *post_create_enable_msg(OCMPSubsystem OC_subSystem) actionType = OCMP_AXN_TYPE_ENABLE; } OCMPMessageFrame *postExeMsg = create_ocmp_msg_frame( - OC_subSystem, OCMP_MSG_TYPE_POST, actionType, 0x00, 0x00, 1); + OC_subSystem, OCMP_MSG_TYPE_POST, actionType, 0x00, 0x00, 1); return postExeMsg; } @@ -292,8 +293,8 @@ static void post_activate(OCMPMessageFrame *pPOSTMsg) "Subsystem %d.\n", POST_subSystem); System_flush(); - //Do the casting for the pMsg - //POSTAckstatus = (ReturnStatus) (pPOSTMsg->message.ocmp_data); + // Do the casting for the pMsg + // POSTAckstatus = (ReturnStatus) (pPOSTMsg->message.ocmp_data); memcpy(&POSTAckstatus, pPOSTMsg->message.ocmp_data, 1); if ((pPOSTMsg->message.subsystem == OC_SS_SYS) && (pPOSTMsg->message.action == OCMP_AXN_TYPE_ACTIVE)) { @@ -360,14 +361,14 @@ static void post_task_init(void) /*Creating RX Message Queue*/ postRxMsgQueue = Util_constructQueue(&postRxMsg); LOGGER_DEBUG( - "POST:INFO::Constructing message Queue for 0x%x POST RX Messages.\n", - postRxMsgQueue); + "POST:INFO::Constructing message Queue for 0x%x POST RX Messages.\n", + postRxMsgQueue); /* Reset POST state to fail */ postState = 0; POST_subSystem = OC_SS_SYS; OCMPMessageFrame *postEnableMsg = create_ocmp_msg_frame( - OC_SS_SYS, OCMP_MSG_TYPE_POST, OCMP_AXN_TYPE_ACTIVE, 0x00, 0x00, 1); + OC_SS_SYS, OCMP_MSG_TYPE_POST, OCMP_AXN_TYPE_ACTIVE, 0x00, 0x00, 1); /*Ask for activate permission from BB system*/ if (postEnableMsg) { Util_enqueueMsg(bigBrotherRxMsgQueue, semBigBrotherMsg, @@ -392,7 +393,7 @@ static void post_taskfxn(UArg a0, UArg a1) if (Semaphore_pend(semPOSTMsg, BIOS_WAIT_FOREVER)) { while (!Queue_empty(postRxMsgQueue)) { OCMPMessageFrame *pWrite = - (OCMPMessageFrame *)Util_dequeueMsg(postRxMsgQueue); + (OCMPMessageFrame *)Util_dequeueMsg(postRxMsgQueue); if (pWrite) { post_process_rx_msg(pWrite); } diff --git a/firmware/ec/src/post/post_util.c b/firmware/ec/src/post/post_util.c index 77aecc36ab..6e13222f35 100644 --- a/firmware/ec/src/post/post_util.c +++ b/firmware/ec/src/post/post_util.c @@ -19,10 +19,11 @@ POSTData PostResult[POST_RECORDS] = { { 0 } }; #ifdef UT_POST /* - * TODO: Duplicating the definition of the following three functions from post.c for the UT framework - * If we include post.c in the UT framework , we are exposing a lot of OS dependent APIs like create_task , - * util_queue etc to the Windows Cygwin environment which will create linking issues. - * This will get fixed as part of #419 + * TODO: Duplicating the definition of the following three functions from + * post.c for the UT framework If we include post.c in the UT framework , we are + * exposing a lot of OS dependent APIs like create_task , util_queue etc to the + * Windows Cygwin environment which will create linking issues. This will get + * fixed as part of #419 */ void post_update_POSTStatus(POSTData *pData, ePostCode status) @@ -58,11 +59,11 @@ static ePostCode _postDriver(const Component *subsystem, const Component *dev, const AlertData *alert_data, POSTData *postData, OCSubsystem *ss) { -#if 0 +# if 0 if (!dev->driver) { return POST_DEV_NO_DRIVER_EXIST; } -#endif +# endif ePostCode postcode = POST_DEV_FOUND; if (dev->driver->fxnTable->cb_probe) { postcode = dev->driver->fxnTable->cb_probe(dev->driver_cfg, postData); @@ -78,7 +79,7 @@ static ePostCode _postDriver(const Component *subsystem, const Component *dev, AlertData *alert_data_cp = malloc(sizeof(AlertData)); *alert_data_cp = *alert_data; postcode = dev->driver->fxnTable->cb_init( - dev->driver_cfg, dev->factory_config, alert_data_cp); + dev->driver_cfg, dev->factory_config, alert_data_cp); } else { postcode = POST_DEV_NO_CFG_REQ; } @@ -86,10 +87,10 @@ static ePostCode _postDriver(const Component *subsystem, const Component *dev, LOGGER_DEBUG("%s:INFO:: Configuration for %s (%s) is %s\n", subsystem->name, dev->name, dev->driver->name, (postcode == POST_DEV_CFG_DONE) ? - "ok" : - (postcode == POST_DEV_NO_CFG_REQ) ? - "not required." : - "failed."); + "ok" : + (postcode == POST_DEV_NO_CFG_REQ) ? + "not required." : + "failed."); } } } @@ -134,7 +135,8 @@ ReturnStatus _execPost(OCMPMessageFrame *pMsg, unsigned int subsystem_id) } devSno++; post_init_POSTData(&postData, subsystem_id, devSno); - //TODO: If postcode is configuration failure what should beth recovery action. + // TODO: If postcode is configuration failure what should beth + // recovery action. if (_postDriver(subsystem, comp, &alert_data, &postData, ss) == POST_DEV_NO_DRIVER_EXIST) { devSno--; @@ -204,7 +206,8 @@ void post_update_POSTresult(POSTData *postData) } else { deviceCount++; } - //LOGGER_DEBUG("POST:INFO:: Updating POST results for the Subsystem %d , Device Serial offset %d , Total Number of records %d.\n", + // LOGGER_DEBUG("POST:INFO:: Updating POST results for the Subsystem %d , + // Device Serial offset %d , Total Number of records %d.\n", // postData->subsystem,postData->devSno,deviceCount+1); memcpy(&PostResult[deviceCount], postData, sizeof(POSTData)); } diff --git a/firmware/ec/src/registry/SSRegistry.c b/firmware/ec/src/registry/SSRegistry.c index ebda3d5544..d41929b866 100644 --- a/firmware/ec/src/registry/SSRegistry.c +++ b/firmware/ec/src/registry/SSRegistry.c @@ -1,11 +1,11 @@ /** -* Copyright (c) 2017-present, Facebook, Inc. -* All rights reserved. -* -* This source code is licensed under the BSD-style license found in the -* LICENSE file in the root directory of this source tree. An additional grant -* of patent rights can be found in the PATENTS file in the same directory. -*/ + * Copyright (c) 2017-present, Facebook, Inc. + * All rights reserved. + * + * This source code is licensed under the BSD-style license found in the + * LICENSE file in the root directory of this source tree. An additional grant + * of patent rights can be found in the PATENTS file in the same directory. + */ #include "SSRegistry.h" #include "common/inc/global/Framework.h" @@ -94,7 +94,7 @@ void OCMP_GenerateAlert(const AlertData *alert_data, unsigned int alert_id, const Component *subsystem = &sys_schema[alert_data->subsystem]; const Component *component = - &subsystem->components[alert_data->componentId]; + &subsystem->components[alert_data->componentId]; const Driver *driver = component->components[alert_data->deviceId].driver; const Parameter *param = &driver->alerts[alert_id]; @@ -113,10 +113,9 @@ void OCMP_GenerateAlert(const AlertData *alert_data, unsigned int alert_id, size_t param_size = (_paramSize(param) + 3) & ~0x03; OCMPMessageFrame *pMsg = create_ocmp_msg_frame( - alert_data->subsystem, OCMP_MSG_TYPE_ALERT, OCMP_AXN_TYPE_ACTIVE, - alert_data->componentId + - 1, /* TODO: inconsistency indexing in host */ - parameters, param_size); + alert_data->subsystem, OCMP_MSG_TYPE_ALERT, OCMP_AXN_TYPE_ACTIVE, + alert_data->componentId + 1, /* TODO: inconsistency indexing in host */ + parameters, param_size); if (pMsg) { memcpy(pMsg->message.ocmp_data, data, _paramSize(param)); Util_enqueueMsg(bigBrotherTxMsgQueue, semBigBrotherMsg, @@ -246,7 +245,7 @@ static bool _handle_post_enable(const Component *comp, OCMPMessageFrame *pMsg) Util_enqueueMsg(postRxMsgQueue, semPOSTMsg, (uint8_t *)buffer); } } - pMsg->message.ocmp_data[0] = !(ret); //RETURN_OK =0; + pMsg->message.ocmp_data[0] = !(ret); // RETURN_OK =0; return ret; } @@ -334,7 +333,7 @@ static bool ocmp_route(OCMPMessageFrame *pMsg, unsigned int subsystem_id) return false; } const Component *comp = - &subsystem->components[(pMsg->message.componentID) - 1]; + &subsystem->components[(pMsg->message.componentID) - 1]; /* TODO: clean up special handling for commands */ bool dev_handled = false; switch (pMsg->message.msgtype) { @@ -347,8 +346,8 @@ static bool ocmp_route(OCMPMessageFrame *pMsg, unsigned int subsystem_id) break; case OCMP_MSG_TYPE_POST: dev_handled = _handleMsgTypePOST(pMsg, comp, subsystem_id); - //pMsg->message.action = OCMP_ACTION_TYPE_REPLY; - //Util_enqueueMsg(postRxMsgQueue, semPOSTMsg, (uint8_t*) pMsg); + // pMsg->message.action = OCMP_ACTION_TYPE_REPLY; + // Util_enqueueMsg(postRxMsgQueue, semPOSTMsg, (uint8_t*) pMsg); break; default: break; @@ -379,13 +378,13 @@ static void _subsystem_event_loop(UArg a0, UArg a1) return; } - //const Component *component = &sys_schema[a1]; + // const Component *component = &sys_schema[a1]; while (1) { if (Semaphore_pend(ss->sem, BIOS_WAIT_FOREVER)) { while (!Queue_empty(ss->msgQueue)) { OCMPMessageFrame *pMsg = - (OCMPMessageFrame *)Util_dequeueMsg(ss->msgQueue); + (OCMPMessageFrame *)Util_dequeueMsg(ss->msgQueue); if (pMsg) { /* Attempt to route the message to the correct driver @@ -430,8 +429,8 @@ static void subsystem_init(OCMPSubsystem ss_id) Task_Params taskParams; Task_Params_init(&taskParams); taskParams.stack = OC_task_stack[ss_id]; // ss->taskStack; - taskParams.stackSize = OC_TASK_STACK_SIZE; //ss->taskStackSize; - taskParams.priority = OC_TASK_PRIORITY; //ss->taskPriority; + taskParams.stackSize = OC_TASK_STACK_SIZE; // ss->taskStackSize; + taskParams.priority = OC_TASK_PRIORITY; // ss->taskPriority; taskParams.arg0 = (UArg)ss; taskParams.arg1 = ss_id; diff --git a/firmware/ec/src/subsystem/gpp/ebmp.c b/firmware/ec/src/subsystem/gpp/ebmp.c index 248a530216..482afe6d71 100644 --- a/firmware/ec/src/subsystem/gpp/ebmp.c +++ b/firmware/ec/src/subsystem/gpp/ebmp.c @@ -69,7 +69,8 @@ extern void watchdog_reset_ap(void); ** - New STATE has been changed and to configure the ** timer for new timeout ** - Watchdog on AP has sent the watchdog command - ** to state, it's alive so restarting the timer again. + ** to state, it's alive so restarting the timer + *again. ** ARGUMENTS : None ** RETURN TYPE : None *****************************************************************************/ @@ -109,7 +110,7 @@ void ebmp_boot_monitor_timeout(void) *********************************************/ // send_msg_big_brother(); Clock_stop(bootProgressClk); - //watchdog_reset_ap(); + // watchdog_reset_ap(); } } else { /***************************************************** @@ -136,7 +137,7 @@ void ebmp_boot_monitor_timeout(void) *****************************************************************************/ void ebmp_check_soc_plt_reset(void) { - //Resetting Iteration counter for GPIO Toggle to zero. + // Resetting Iteration counter for GPIO Toggle to zero. secondIteration = 0; if (OcGpio_read(pin_soc_pltrst_n)) { /************************************************************* @@ -239,7 +240,7 @@ void ebmp_init(Gpp_gpioCfg *driver) if (pin_ap_boot_alert1->port) { const uint32_t pin_evt_cfg = - OCGPIO_CFG_INPUT | OCGPIO_CFG_INT_BOTH_EDGES; + OCGPIO_CFG_INPUT | OCGPIO_CFG_INT_BOTH_EDGES; if (OcGpio_configure(pin_ap_boot_alert1, pin_evt_cfg) < OCGPIO_SUCCESS) { return RETURN_NOTOK; @@ -251,7 +252,7 @@ void ebmp_init(Gpp_gpioCfg *driver) if (pin_ap_boot_alert2->port) { const uint32_t pin_evt_cfg = - OCGPIO_CFG_INPUT | OCGPIO_CFG_INT_BOTH_EDGES; + OCGPIO_CFG_INPUT | OCGPIO_CFG_INT_BOTH_EDGES; if (OcGpio_configure(pin_ap_boot_alert2, pin_evt_cfg) < OCGPIO_SUCCESS) { return RETURN_NOTOK; @@ -263,7 +264,7 @@ void ebmp_init(Gpp_gpioCfg *driver) if (pin_soc_pltrst_n->port) { const uint32_t pin_evt_cfg = - OCGPIO_CFG_INPUT | OCGPIO_CFG_INT_BOTH_EDGES; + OCGPIO_CFG_INPUT | OCGPIO_CFG_INT_BOTH_EDGES; if (OcGpio_configure(pin_soc_pltrst_n, pin_evt_cfg) < OCGPIO_SUCCESS) { return RETURN_NOTOK; } @@ -294,7 +295,7 @@ void ebmp_task_fxn(UArg a0, UArg a1) ebmp_task_init(); /* Regsiter GPIO interrupts */ - //ebmp_init(); + // ebmp_init(); while (1) { Semaphore_pend(semStateHandle, BIOS_WAIT_FOREVER); @@ -312,7 +313,7 @@ void ebmp_task_fxn(UArg a0, UArg a1) // What is the difference between T0 to T1? Nothing! So better // to start counter with T1 case STATE_T0: { - //oldState = apState; + // oldState = apState; ebmp_restart_timer(500); break; } @@ -332,14 +333,15 @@ void ebmp_task_fxn(UArg a0, UArg a1) break; } case STATE_T4: { - DEBUG("EBMP:INFO::STATE_T4 Coreboot configures SeaBIOS to load OS.\n"); + DEBUG( + "EBMP:INFO::STATE_T4 Coreboot configures SeaBIOS to load OS.\n"); ebmp_restart_timer(1000); /* * Based on Boot_From_Recovery (true or false) we will drive * GPIO_S5[09]. * GPIO_S5[09] -> 1. Recovery boot. */ - //bootOption(); + // bootOption(); break; } case STATE_T5: { @@ -350,7 +352,7 @@ void ebmp_task_fxn(UArg a0, UArg a1) * GPIO_S5[09]. * GPIO_S5[09] -> 1. Recovery boot. */ - //bootOption(); + // bootOption(); break; } case STATE_T6: { @@ -361,8 +363,9 @@ void ebmp_task_fxn(UArg a0, UArg a1) } /*Fully booted */ case STATE_T7: { - DEBUG("EBMP:INFO:: STATE_T7 AP Watchdog daemon process responds to EP request.\n"); - //Semaphore_post(apStateSem); + DEBUG( + "EBMP:INFO:: STATE_T7 AP Watchdog daemon process responds to EP request.\n"); + // Semaphore_post(apStateSem); /* Stop timer. It will be used by OCWatchdog */ // stop_timer(); apUp = 1; @@ -374,10 +377,11 @@ void ebmp_task_fxn(UArg a0, UArg a1) DEBUG("EBMP:ERROR:: Invalid state\n"); } } - DEBUG("EBMP:INFO:: Boot Monitor Pin 1 [PE3] : %d Boot Monitor Pin 2 [PL3] : %d SOC PLTRST : %d.\n", - OcGpio_read(pin_ap_boot_alert1) ? 1 : 0, - OcGpio_read(pin_ap_boot_alert2) ? 1 : 0, - OcGpio_read(pin_soc_pltrst_n) ? 1 : 0); + DEBUG( + "EBMP:INFO:: Boot Monitor Pin 1 [PE3] : %d Boot Monitor Pin 2 [PL3] : %d SOC PLTRST : %d.\n", + OcGpio_read(pin_ap_boot_alert1) ? 1 : 0, + OcGpio_read(pin_ap_boot_alert2) ? 1 : 0, + OcGpio_read(pin_soc_pltrst_n) ? 1 : 0); oldState = apState; } } diff --git a/firmware/ec/src/subsystem/gpp/gpp.c b/firmware/ec/src/subsystem/gpp/gpp.c index 8a49cfa5dc..15ef0b14df 100644 --- a/firmware/ec/src/subsystem/gpp/gpp.c +++ b/firmware/ec/src/subsystem/gpp/gpp.c @@ -59,17 +59,17 @@ bool gpp_pmic_control(Gpp_gpioCfg *driver, uint8_t control) SysCtlDelay(1000); /* Embedded Boot Management Protocol (EBMP)for Application processor(AP) * EBMP tells EC firmware about the boot process stages of the AP to the - * Embedded Controller(EC) by toggling two GPIO's.ebmp_init is a function - * where we register the required GPIO's for interrupts if AP move from one boot - * process state to other.*/ + * Embedded Controller(EC) by toggling two GPIO's.ebmp_init is a + * function where we register the required GPIO's for interrupts if AP + * move from one boot process state to other.*/ ebmp_init(driver); SysCtlDelay(100); OcGpio_write(&driver->pin_ap_12v_onoff, true); SysCtlDelay(100); if (gpp_check_core_power(driver)) { - //OcGpio_write(&cfg->pin_ec_reset_to_proc, true); - //SysCtlDelay(10); + // OcGpio_write(&cfg->pin_ec_reset_to_proc, true); + // SysCtlDelay(10); if (gpp_check_processor_reset(driver)) { ret = true; LOGGER_DEBUG("GPP:INFO:: Processor out of reset.\n"); @@ -127,12 +127,12 @@ bool gpp_post_init(void *driver, void *ssState) eSubSystemStates *newState = (eSubSystemStates *)ssState; if (!gpp_pwrgd_protection(driver)) { LOGGER_DEBUG( - "GPP:INFO:: LT4256 EC power good is for genration of 12V ok.\n"); + "GPP:INFO:: LT4256 EC power good is for genration of 12V ok.\n"); } else { *newState = SS_STATE_FAULTY; return ret; } - //Power on processor. + // Power on processor. if (gpp_pmic_control(driver, OC_PMIC_ENABLE)) { *newState = SS_STATE_CFG; ret = true; @@ -142,7 +142,8 @@ bool gpp_post_init(void *driver, void *ssState) /*mSATA DAS not helping with anything as of now.*/ // if (!gpp_msata_das()) { // returnValue = SS_STATE_FAULTY; - // LOGGER_ERROR("GPP:ERROR:: GPP mSATA device activity failure.\n"); + // LOGGER_ERROR("GPP:ERROR:: GPP mSATA device activity + // failure.\n"); // } return ret; } diff --git a/firmware/ec/src/subsystem/hci/led/hci_led.c b/firmware/ec/src/subsystem/hci/led/hci_led.c index 45701867a1..0ced21b293 100644 --- a/firmware/ec/src/subsystem/hci/led/hci_led.c +++ b/firmware/ec/src/subsystem/hci/led/hci_led.c @@ -47,7 +47,7 @@ static void HCI_LedTaskFxn(UArg a0, UArg a1) { while (true) { if (s_ledState == SYSTEM_BOOT) { - //hci_led_system_boot(); + // hci_led_system_boot(); } else if ((s_ledState == SYSTEM_RUNNING) || (s_ledState == SYSTEM_FAILURE)) { OcGpio_write(&HCI->pin_ec_gpio, false); diff --git a/firmware/ec/src/subsystem/rffe/rffe.c b/firmware/ec/src/subsystem/rffe/rffe.c index 1c2945e054..a974a8c4c7 100644 --- a/firmware/ec/src/subsystem/rffe/rffe.c +++ b/firmware/ec/src/subsystem/rffe/rffe.c @@ -82,7 +82,7 @@ bool rffe_pre_init(void *driver, void *returnValue) Fe_Ch2_Gain_Cfg *feCh2GainCfg = (Fe_Ch2_Gain_Cfg *)(feCfg->fe_ch2_gain_cfg); Fe_Ch2_Lna_Cfg *feCh2LnaCfg = (Fe_Ch2_Lna_Cfg *)(feCfg->fe_ch2_lna_cfg); Fe_Watchdog_Cfg *feWatchDogCfg = - (Fe_Watchdog_Cfg *)(feCfg->fe_watchdog_cfg); + (Fe_Watchdog_Cfg *)(feCfg->fe_watchdog_cfg); OcGpio_configure(&feCh2GainCfg->pin_ch1_2g_lb_band_sel_l, OCGPIO_CFG_OUTPUT); OcGpio_configure(&feCh2LnaCfg->pin_ch1_rf_pwr_off, @@ -110,13 +110,13 @@ bool rffe_post_init(void *driver, void *ssState) Fe_Ch_Pwr_Cfg fe_ch2_pwrcfg = { .channel = RFFE_CHANNEL2, .fe_Rffecfg = (Fe_Cfg *)driver }; - status |= rffe_ctrl_configure_power_amplifier(&fe_ch1_pwrcfg, - RFFE_ACTIVATE_PA); + status |= + rffe_ctrl_configure_power_amplifier(&fe_ch1_pwrcfg, RFFE_ACTIVATE_PA); - status |= rffe_ctrl_configure_power_amplifier(&fe_ch2_pwrcfg, - RFFE_ACTIVATE_PA); + status |= + rffe_ctrl_configure_power_amplifier(&fe_ch2_pwrcfg, RFFE_ACTIVATE_PA); - //rffe_powermonitor_createtask(); + // rffe_powermonitor_createtask(); /*Updating subsystem sate info*/ LOGGER_DEBUG("RFFE:INFO:: Subsystem device check and configuration is %s\n", diff --git a/firmware/ec/src/subsystem/rffe/rffe_ctrl.c b/firmware/ec/src/subsystem/rffe/rffe_ctrl.c index 30b524b954..a6612a7e2e 100644 --- a/firmware/ec/src/subsystem/rffe/rffe_ctrl.c +++ b/firmware/ec/src/subsystem/rffe/rffe_ctrl.c @@ -44,7 +44,7 @@ ReturnStatus rffe_ctrl_configure_power_amplifier(Fe_Ch_Pwr_Cfg *pwrCfg, rffeBand band = RFFE_SHUTDOWN; rffeChannel channel = pwrCfg->channel; const Fe_Ch2_Gain_Cfg *fe_ch1_rf_band_sel = - pwrCfg->fe_Rffecfg->fe_ch2_gain_cfg; + pwrCfg->fe_Rffecfg->fe_ch2_gain_cfg; const Fe_Ch2_Lna_Cfg *fe_ch1_rf_pwr = pwrCfg->fe_Rffecfg->fe_ch2_lna_cfg; const Fe_Watchdog_Cfg *fe_ch2_rf_pwr = pwrCfg->fe_Rffecfg->fe_watchdog_cfg; diff --git a/firmware/ec/src/subsystem/rffe/rffe_powermonitor.c b/firmware/ec/src/subsystem/rffe/rffe_powermonitor.c index 4b6c779777..f1f31c4278 100644 --- a/firmware/ec/src/subsystem/rffe/rffe_powermonitor.c +++ b/firmware/ec/src/subsystem/rffe/rffe_powermonitor.c @@ -101,7 +101,7 @@ ReturnStatus rffe_powermonitor_read_power(const I2C_Dev *i2c_dev, } /* Get the RF Band Configuration for the requested RF Channel */ - //status = rffe_ctrl_get_band(rfchannel, &band); + // status = rffe_ctrl_get_band(rfchannel, &band); /* TODO: not ideal, but it's ultimately hardcoded. this makes our lives * a bit easier for now */ diff --git a/firmware/ec/src/subsystem/sdr/sdr.c b/firmware/ec/src/subsystem/sdr/sdr.c index 7c0000a7a0..6d288cdb9c 100644 --- a/firmware/ec/src/subsystem/sdr/sdr.c +++ b/firmware/ec/src/subsystem/sdr/sdr.c @@ -119,7 +119,8 @@ static void sdr_control_reset(Sdr_gpioCfg *sdr_gpioCfg, uint8_t control) *****************************************************************************/ static ReturnStatus sdr_fx3_reset(Sdr_gpioCfg *fx3_cfg) { - /*TODO: We need to figure out a way for configuring PCA pins on Intel reset.*/ + /*TODO: We need to figure out a way for configuring PCA pins on Intel + * reset.*/ OcGpio_configure(&fx3_cfg->pin_fx3_reset, OCGPIO_CFG_OUTPUT); if (OcGpio_write(&fx3_cfg->pin_fx3_reset, false) < OCGPIO_SUCCESS) { diff --git a/firmware/ec/src/subsystem/sync/sync.c b/firmware/ec/src/subsystem/sync/sync.c index 37fb4a30fb..47d383e3e6 100644 --- a/firmware/ec/src/subsystem/sync/sync.c +++ b/firmware/ec/src/subsystem/sync/sync.c @@ -125,8 +125,8 @@ static void SYNC_GpsTaskInit(void) clkParams.startFlag = FALSE; /* Create a periodic Clock Instance with initial timeout= 10000(10 Secs) * and period = 10000(10 Secs) system time units */ - Clock_Handle clk = Clock_create((Clock_FuncPtr)SYNC_GpsClkFxn, 10000, - &clkParams, NULL); + Clock_Handle clk = + Clock_create((Clock_FuncPtr)SYNC_GpsClkFxn, 10000, &clkParams, NULL); if (!clk) { DEBUG("SYNC::Can't create GPS Polling clock\n"); Semaphore_delete(&gpsSem); diff --git a/firmware/ec/src/subsystem/sys/sys.c b/firmware/ec/src/subsystem/sys/sys.c index 1726f67781..e2ab5c9e8a 100644 --- a/firmware/ec/src/subsystem/sys/sys.c +++ b/firmware/ec/src/subsystem/sys/sys.c @@ -66,10 +66,10 @@ bool SYS_post_enable(void **postActivate) { ReturnStatus status = RETURN_NOTOK; LOGGER("SYS:INFO:: Starting POST test for OpenCellular.\n"); - //Permission granted from the System. - //Sending the activate POST message to POST subsystem. + // Permission granted from the System. + // Sending the activate POST message to POST subsystem. OCMPMessageFrame *postExeMsg = create_ocmp_msg_frame( - OC_SS_SYS, OCMP_MSG_TYPE_POST, OCMP_AXN_TYPE_ACTIVE, 0x00, 0x00, 1); + OC_SS_SYS, OCMP_MSG_TYPE_POST, OCMP_AXN_TYPE_ACTIVE, 0x00, 0x00, 1); if (postExeMsg != NULL) { status = RETURN_OK; *postActivate = (OCMPMessageFrame *)postExeMsg; @@ -96,38 +96,40 @@ bool SYS_post_get_results(void **getpostResult) OCMPMessageFrame *getpostResultMsg = (OCMPMessageFrame *)getpostResult; /* Get the subsystem info for which message is required */ OCMPMessageFrame *postResultMsg = create_ocmp_msg_frame( - getpostResultMsg->message.subsystem, OCMP_MSG_TYPE_POST, - OCMP_AXN_TYPE_REPLY, 0x00, 0x00, 40); + getpostResultMsg->message.subsystem, OCMP_MSG_TYPE_POST, + OCMP_AXN_TYPE_REPLY, 0x00, 0x00, 40); if (postResultMsg) { /* Getting data assigned*/ postResultMsg->header.ocmpSof = getpostResultMsg->header.ocmpSof; postResultMsg->header.ocmpInterface = - getpostResultMsg->header.ocmpInterface; + getpostResultMsg->header.ocmpInterface; postResultMsg->header.ocmpSeqNumber = - getpostResultMsg->header.ocmpSeqNumber; + getpostResultMsg->header.ocmpSeqNumber; for (iter = 0; iter < POST_RECORDS; iter++) { if (PostResult[iter].subsystem == getpostResultMsg->message.ocmp_data[0]) { postResultMsg->message.ocmp_data[(3 * index) + 0] = - PostResult[iter].subsystem; + PostResult[iter].subsystem; postResultMsg->message.ocmp_data[(3 * index) + 1] = - PostResult[iter].devSno; //Device serial Number + PostResult[iter].devSno; // Device serial Number postResultMsg->message.ocmp_data[(3 * index) + 2] = - PostResult[iter].status; //Status ok + PostResult[iter].status; // Status ok index++; } } LOGGER_DEBUG( - "BIGBROTHER:INFO::POST message sent for subsystem 0x%x.\n"); + "BIGBROTHER:INFO::POST message sent for subsystem 0x%x.\n"); /*Size of payload*/ postResultMsg->header.ocmpFrameLen = index * 3; /*Updating Subsystem*/ - //postResultMsg->message.subsystem = (OCMPSubsystem)PostResult[iter].subsystem; + // postResultMsg->message.subsystem = + // (OCMPSubsystem)PostResult[iter].subsystem; /* Number of devices found under subsystem*/ postResultMsg->message.parameters = index; index = 0; } else { - LOGGER("BIGBROTHER:ERROR:: Failed to allocate memory for POST results.\n"); + LOGGER( + "BIGBROTHER:ERROR:: Failed to allocate memory for POST results.\n"); } memcpy(((OCMPMessageFrame *)getpostResult), postResultMsg, 64); return status; diff --git a/firmware/ec/src/subsystem/watchdog/watchdog.c b/firmware/ec/src/subsystem/watchdog/watchdog.c index f2d06c1d4c..2ff94892df 100644 --- a/firmware/ec/src/subsystem/watchdog/watchdog.c +++ b/firmware/ec/src/subsystem/watchdog/watchdog.c @@ -82,7 +82,8 @@ void watchdog_reset_ap(void) OcGpio_write(&cfg->pin_ec_reset_to_proc, true); - // OCMPMessageFrame * pWatchdogMsg = (OCMPMessageFrame *) malloc(sizeof(32)); + // OCMPMessageFrame * pWatchdogMsg = (OCMPMessageFrame *) + // malloc(sizeof(32)); /* For now only AP reset is being applied directly to see the effect*/ return; } @@ -147,7 +148,7 @@ Void watchdog_call(UArg arg0) void watchdog_process_msg(OCMPMessageFrame *pWatchdogMsg) { if (pWatchdogMsg->message.msgtype == OCMP_MSG_TYPE_CONFIG) { - //set_config_watchdog(pWatchdogMsg); + // set_config_watchdog(pWatchdogMsg); pWatchdogMsg->message.action = OCMP_AXN_TYPE_REPLY; watchdog_send_messages(pWatchdogMsg); } else if (pWatchdogMsg->message.msgtype == OCMP_MSG_TYPE_STATUS) { @@ -165,13 +166,13 @@ void watchdog_task_init(void) watchdogSem = Semaphore_create(0, NULL, NULL); if (watchdogSem == NULL) LOGGER_DEBUG( - "WATCHDOG:ERROR:: Failed in Creating Watchdog Semaphore.\n"); + "WATCHDOG:ERROR:: Failed in Creating Watchdog Semaphore.\n"); /* Create Wathcdog control Queue used by Big brother */ watchdogMsgQueue = Queue_create(NULL, NULL); if (watchdogMsgQueue == NULL) LOGGER_DEBUG( - "WATCHDOG:ERROR:: Failed in Constructing Watchdog Message Queue.\n"); + "WATCHDOG:ERROR:: Failed in Constructing Watchdog Message Queue.\n"); } /***************************************************************************** @@ -187,7 +188,7 @@ void watchdog_task_fxn(UArg a0, UArg a1) if (Semaphore_pend(watchdogSem, BIOS_WAIT_FOREVER)) { if (!Queue_empty(watchdogMsgQueue)) { OCMPMessageFrame *pWatchdogMsg = - (OCMPMessageFrame *)Util_dequeueMsg(watchdogMsgQueue); + (OCMPMessageFrame *)Util_dequeueMsg(watchdogMsgQueue); if (pWatchdogMsg) { watchdog_process_msg(pWatchdogMsg); diff --git a/firmware/ec/src/utils/ocmp_util.c b/firmware/ec/src/utils/ocmp_util.c index 6a6d0113d4..ee23c3dcef 100644 --- a/firmware/ec/src/utils/ocmp_util.c +++ b/firmware/ec/src/utils/ocmp_util.c @@ -33,8 +33,8 @@ OCMPMessageFrame *OCMP_mallocFrame(uint16_t len) // Assign pData to first byte of payload // Pointer arithmetic of + 1 is equal to sizeof(OCMPMessageFrame) bytes // then cast to unsigned char * for pData - //pMsg->message.ocmp_data = (unsigned char *)(pMsg + 1); - //pMsg->message.ocmp_data = (unsigned char *)(pMsg + 2); + // pMsg->message.ocmp_data = (unsigned char *)(pMsg + 1); + // pMsg->message.ocmp_data = (unsigned char *)(pMsg + 2); } return pMsg; } @@ -60,25 +60,25 @@ create_ocmp_msg_frame(OCMPSubsystem subSystem, OCMPMsgType msgtype, uint16_t parameters, uint8_t payloadSize) { OCMPMessageFrame *ocmp_msg = - (OCMPMessageFrame *)OCMP_mallocFrame(payloadSize); + (OCMPMessageFrame *)OCMP_mallocFrame(payloadSize); if (ocmp_msg) { *ocmp_msg = (OCMPMessageFrame){ .header = - { - .ocmpSof = OCMP_MSG_SOF, - .ocmpInterface = OCMP_COMM_IFACE_USB, - .ocmpFrameLen = payloadSize, - //.ocmp_seqNumber = 0x00; - //.ocmp_timestamp = 0x00; //Get RTC TimeStamp - }, + { + .ocmpSof = OCMP_MSG_SOF, + .ocmpInterface = OCMP_COMM_IFACE_USB, + .ocmpFrameLen = payloadSize, + //.ocmp_seqNumber = 0x00; + //.ocmp_timestamp = 0x00; //Get RTC TimeStamp + }, .message = - { - .subsystem = subSystem, - .componentID = componentId, - .parameters = parameters, - .msgtype = msgtype, - .action = actionType, - } + { + .subsystem = subSystem, + .componentID = componentId, + .parameters = parameters, + .msgtype = msgtype, + .action = actionType, + } }; memset(&(ocmp_msg->message.ocmp_data[0]), 0x00, payloadSize); } diff --git a/firmware/ec/test/fake/fake_I2C.c b/firmware/ec/test/fake/fake_I2C.c index e519c7e9e2..a9c0d5e511 100644 --- a/firmware/ec/test/fake/fake_I2C.c +++ b/firmware/ec/test/fake/fake_I2C.c @@ -219,7 +219,7 @@ bool I2C_transfer(I2C_Handle handle, I2C_Transaction *transaction) /* TODO: what address do we read from if we also wrote data? */ if (transaction->readCount > 0) { size_t read_size = - MIN(transaction->readCount, dev->tbl_size - reg_addr); + MIN(transaction->readCount, dev->tbl_size - reg_addr); for (size_t i = 0; i < read_size / dev->reg_size; i += 2) { endian_conversion(mem_addr + i, dev->reg_size, __BYTE_ORDER__, read_buf + i, dev->reg_size, dev->endianness); diff --git a/firmware/ec/test/stub/stub_GateMutex.c b/firmware/ec/test/stub/stub_GateMutex.c index f77d6edb32..c5e5d69916 100644 --- a/firmware/ec/test/stub/stub_GateMutex.c +++ b/firmware/ec/test/stub/stub_GateMutex.c @@ -12,8 +12,8 @@ #include ti_sysbios_gates_GateMutex_Handle ti_sysbios_gates_GateMutex_create( - const ti_sysbios_gates_GateMutex_Params *__paramsPtr, - xdc_runtime_Error_Block *__eb) + const ti_sysbios_gates_GateMutex_Params *__paramsPtr, + xdc_runtime_Error_Block *__eb) { UNUSED(__paramsPtr); UNUSED(__eb); diff --git a/firmware/ec/test/suites/Test_GpioPCA9557.c b/firmware/ec/test/suites/Test_GpioPCA9557.c index a869b28894..8d0ddc2cd0 100644 --- a/firmware/ec/test/suites/Test_GpioPCA9557.c +++ b/firmware/ec/test/suites/Test_GpioPCA9557.c @@ -31,18 +31,18 @@ static uint8_t PCA9557_regs[] = { static const OcGpio_Port s_pca9557_ioexp = { .fn_table = &GpioPCA9557_fnTable, .cfg = - &(PCA9557_Cfg){ - .i2c_dev = { I2C_BUS, I2C_ADDR }, - }, + &(PCA9557_Cfg){ + .i2c_dev = { I2C_BUS, I2C_ADDR }, + }, .object_data = &(PCA9557_Obj){}, }; static const OcGpio_Port s_invalid_ioexp = { .fn_table = &GpioPCA9557_fnTable, .cfg = - &(PCA9557_Cfg){ - .i2c_dev = { I2C_BUS, 0x01 }, - }, + &(PCA9557_Cfg){ + .i2c_dev = { I2C_BUS, 0x01 }, + }, .object_data = &(PCA9557_Obj){}, }; @@ -105,9 +105,9 @@ void test_OcGpio_configure(void) /* Test some arbitrary outputs - check cfg & output default value*/ TEST_ASSERT_EQUAL( - OCGPIO_SUCCESS, - OcGpio_configure(&s_test_pins[0], - OCGPIO_CFG_OUTPUT | OCGPIO_CFG_OUT_HIGH)); + OCGPIO_SUCCESS, + OcGpio_configure(&s_test_pins[0], + OCGPIO_CFG_OUTPUT | OCGPIO_CFG_OUT_HIGH)); TEST_ASSERT_EQUAL_HEX8(0xFE, PCA9557_regs[0x03]); TEST_ASSERT_EQUAL_HEX8(0x01, PCA9557_regs[0x01]); diff --git a/firmware/ec/test/suites/Test_GpioSX1509.c b/firmware/ec/test/suites/Test_GpioSX1509.c index 4f16368487..7c863da5da 100644 --- a/firmware/ec/test/suites/Test_GpioSX1509.c +++ b/firmware/ec/test/suites/Test_GpioSX1509.c @@ -142,9 +142,9 @@ static uint8_t SX1509_regs[] = { static const OcGpio_Port s_sx1509_ioexp = { .fn_table = &GpioSX1509_fnTable, .cfg = - &(SX1509_Cfg){ - .i2c_dev = { I2C_BUS, I2C_ADDR }, - }, + &(SX1509_Cfg){ + .i2c_dev = { I2C_BUS, I2C_ADDR }, + }, .object_data = &(SX1509_Obj){}, }; diff --git a/firmware/ec/test/suites/Test_PinGroup_driver.c b/firmware/ec/test/suites/Test_PinGroup_driver.c index fe78ef7dba..3f5737cdd2 100644 --- a/firmware/ec/test/suites/Test_PinGroup_driver.c +++ b/firmware/ec/test/suites/Test_PinGroup_driver.c @@ -30,10 +30,9 @@ static uint8_t PCA9557_regs[] = { OcGpio_Port fe_ch1_gain_io = { .fn_table = &GpioPCA9557_fnTable, .cfg = - &(PCA9557_Cfg){ - .i2c_dev = { OC_CONNECT1_I2C2, - RFFE_CHANNEL1_IO_TX_ATTEN_ADDR }, - }, + &(PCA9557_Cfg){ + .i2c_dev = { OC_CONNECT1_I2C2, RFFE_CHANNEL1_IO_TX_ATTEN_ADDR }, + }, .object_data = &(PCA9557_Obj){}, }; @@ -89,10 +88,9 @@ void test_PinGroup_configure(void) PCA9557_regs[2] = 0xFF; /* Polarity */ PCA9557_regs[3] = 0xFF; /* Dir Config */ - TEST_ASSERT_EQUAL( - RETURN_OK, - PinGroup_configure(&pin_group, - OCGPIO_CFG_OUTPUT | OCGPIO_CFG_OUT_HIGH)); + TEST_ASSERT_EQUAL(RETURN_OK, + PinGroup_configure(&pin_group, OCGPIO_CFG_OUTPUT | + OCGPIO_CFG_OUT_HIGH)); TEST_ASSERT_EQUAL_HEX8(0x7E, PCA9557_regs[0x01]); TEST_ASSERT_EQUAL_HEX8(0x00, PCA9557_regs[0x02]); diff --git a/firmware/ec/test/suites/Test_eeprom.c b/firmware/ec/test/suites/Test_eeprom.c index 4889ad49e4..8c11724efc 100644 --- a/firmware/ec/test/suites/Test_eeprom.c +++ b/firmware/ec/test/suites/Test_eeprom.c @@ -46,10 +46,10 @@ static const I2C_Dev I2C_DEV_1 = { }; static Eeprom_Cfg s_dev = { .i2c_dev = - { - .bus = 6, - .slave_addr = 0x50, - }, + { + .bus = 6, + .slave_addr = 0x50, + }, }; static uint16_t EEPROM_regs[] = { @@ -189,10 +189,10 @@ extern const OcGpio_FnTable GpioSX1509_fnTable; OcGpio_Port s_fake_io_exp = { .fn_table = &GpioSX1509_fnTable, .cfg = - &(SX1509_Cfg){ - .i2c_dev = { 6, 0x45 }, - .pin_irq = NULL, - }, + &(SX1509_Cfg){ + .i2c_dev = { 6, 0x45 }, + .pin_irq = NULL, + }, .object_data = &(SX1509_Obj){}, }; @@ -394,7 +394,7 @@ void test_eeprom_read_device_info_record(void) }; memset(deviceinfo, 0, 10); TEST_ASSERT_EQUAL(RETURN_OK, eeprom_read_device_info_record( - &c1_dev, recordno, deviceinfo)); + &c1_dev, recordno, deviceinfo)); TEST_ASSERT_EQUAL_STRING("SA", deviceinfo); uint8_t recordno1 = 1; @@ -409,7 +409,7 @@ void test_eeprom_read_device_info_record(void) }; memset(deviceinfo1, 0, 10); TEST_ASSERT_EQUAL(RETURN_OK, eeprom_read_device_info_record( - &c2_dev, recordno1, deviceinfo1)); + &c2_dev, recordno1, deviceinfo1)); TEST_ASSERT_EQUAL_STRING("SA", deviceinfo1); uint8_t recordno2 = 1; @@ -424,7 +424,7 @@ void test_eeprom_read_device_info_record(void) }; memset(deviceinfo2, 0, 10); TEST_ASSERT_EQUAL(RETURN_OK, eeprom_read_device_info_record( - &c3_dev, recordno2, deviceinfo2)); + &c3_dev, recordno2, deviceinfo2)); TEST_ASSERT_EQUAL_STRING("SA", deviceinfo2); } @@ -444,7 +444,7 @@ void test_eeprom_write_device_info_record(void) }; TEST_ASSERT_EQUAL(RETURN_OK, eeprom_write_device_info_record( - &d1_dev, recordno, deviceinfo)); + &d1_dev, recordno, deviceinfo)); TEST_ASSERT_EQUAL(0x4153, EEPROM_regs[0x0A01]); strcpy(deviceinfo, "SB"); @@ -456,7 +456,7 @@ void test_eeprom_write_device_info_record(void) }; TEST_ASSERT_EQUAL(RETURN_OK, eeprom_write_device_info_record( - &d2_dev, recordno, deviceinfo)); + &d2_dev, recordno, deviceinfo)); TEST_ASSERT_EQUAL(0x4253, EEPROM_regs[0x0A01]); strcpy(deviceinfo, "SC"); @@ -468,6 +468,6 @@ void test_eeprom_write_device_info_record(void) }; TEST_ASSERT_EQUAL(RETURN_OK, eeprom_write_device_info_record( - &d3_dev, recordno, deviceinfo)); + &d3_dev, recordno, deviceinfo)); TEST_ASSERT_EQUAL(0x4353, EEPROM_regs[0x0A01]); } diff --git a/firmware/ec/test/suites/Test_ina226.c b/firmware/ec/test/suites/Test_ina226.c index b1308acb09..b7a80f8967 100644 --- a/firmware/ec/test/suites/Test_ina226.c +++ b/firmware/ec/test/suites/Test_ina226.c @@ -23,24 +23,24 @@ static OcGpio_Port s_fake_io_port = { static INA226_Dev s_dev = { .cfg = - { - .dev = - { - .bus = 4, - .slave_addr = 0x01, - }, - }, + { + .dev = + { + .bus = 4, + .slave_addr = 0x01, + }, + }, }; static INA226_Dev s_invalid_dev = { .cfg = - { - .dev = - { - .bus = 4, - .slave_addr = 0x02, - }, - }, + { + .dev = + { + .bus = 4, + .slave_addr = 0x02, + }, + }, }; static uint16_t INA226_regs[] = { @@ -112,10 +112,10 @@ void test_ina226_init(void) /* Now try to init with a pin associated */ INA226_Dev alerted_dev = { .cfg = - { - .dev = s_dev.cfg.dev, - .pin_alert = &(OcGpio_Pin){ &s_fake_io_port, 5 }, - }, + { + .dev = s_dev.cfg.dev, + .pin_alert = &(OcGpio_Pin){ &s_fake_io_port, 5 }, + }, }; TEST_ASSERT_EQUAL(RETURN_OK, ina226_init(&alerted_dev)); } @@ -182,10 +182,10 @@ void test_ina226_alerts(void) /* Create a device with an interrupt pin */ INA226_Dev alerted_dev = { .cfg = - { - .dev = s_dev.cfg.dev, - .pin_alert = &(OcGpio_Pin){ &s_fake_io_port, 5 }, - }, + { + .dev = s_dev.cfg.dev, + .pin_alert = &(OcGpio_Pin){ &s_fake_io_port, 5 }, + }, }; TEST_ASSERT_EQUAL(RETURN_OK, ina226_init(&alerted_dev)); @@ -234,15 +234,15 @@ void test_current_limit(void) { uint16_t current_val = 0xffff; - INA226_regs[0x07] = 0x0320; //800 + INA226_regs[0x07] = 0x0320; // 800 TEST_ASSERT_EQUAL(RETURN_OK, ina226_readCurrentLim(&s_dev, ¤t_val)); - TEST_ASSERT_EQUAL(1000, current_val); //1000mA + TEST_ASSERT_EQUAL(1000, current_val); // 1000mA - TEST_ASSERT_EQUAL(RETURN_OK, ina226_setCurrentLim(&s_dev, 3000)); //3000mA - TEST_ASSERT_EQUAL_HEX16(0x0960, INA226_regs[0x07]); //2400 + TEST_ASSERT_EQUAL(RETURN_OK, ina226_setCurrentLim(&s_dev, 3000)); // 3000mA + TEST_ASSERT_EQUAL_HEX16(0x0960, INA226_regs[0x07]); // 2400 TEST_ASSERT_EQUAL(RETURN_OK, ina226_readCurrentLim(&s_dev, ¤t_val)); - TEST_ASSERT_EQUAL(3000, current_val); //3000mA + TEST_ASSERT_EQUAL(3000, current_val); // 3000mA } void test_ina226_enableAlert(void) @@ -255,54 +255,54 @@ void test_curr_sens_bus_volatge(void) { uint16_t busVoltage_val = 0xffff; - INA226_regs[0x02] = 0x2580; //9600 + INA226_regs[0x02] = 0x2580; // 9600 TEST_ASSERT_EQUAL(RETURN_OK, ina226_readBusVoltage(&s_dev, &busVoltage_val)); - TEST_ASSERT_EQUAL_HEX16(12000, busVoltage_val); //12000mV + TEST_ASSERT_EQUAL_HEX16(12000, busVoltage_val); // 12000mV - INA226_regs[0x02] = 0x0A50; //2640 + INA226_regs[0x02] = 0x0A50; // 2640 TEST_ASSERT_EQUAL(RETURN_OK, ina226_readBusVoltage(&s_dev, &busVoltage_val)); - TEST_ASSERT_EQUAL_HEX16(3300, busVoltage_val); //3300mV + TEST_ASSERT_EQUAL_HEX16(3300, busVoltage_val); // 3300mV } void test_curr_sens_shunt_volatge(void) { uint16_t shuntVoltage_val = 0xffff; - INA226_regs[0x01] = 0x0168; //360 + INA226_regs[0x01] = 0x0168; // 360 TEST_ASSERT_EQUAL(RETURN_OK, ina226_readShuntVoltage(&s_dev, &shuntVoltage_val)); - TEST_ASSERT_EQUAL_HEX16(900, shuntVoltage_val); //900uV + TEST_ASSERT_EQUAL_HEX16(900, shuntVoltage_val); // 900uV - INA226_regs[0x01] = 0x0064; //100 + INA226_regs[0x01] = 0x0064; // 100 TEST_ASSERT_EQUAL(RETURN_OK, ina226_readShuntVoltage(&s_dev, &shuntVoltage_val)); - TEST_ASSERT_EQUAL_HEX16(250, shuntVoltage_val); //250uV + TEST_ASSERT_EQUAL_HEX16(250, shuntVoltage_val); // 250uV } void test_curr_sens_current(void) { uint16_t current_val = 0xffff; - INA226_regs[0x04] = 0x1388; //5000 + INA226_regs[0x04] = 0x1388; // 5000 TEST_ASSERT_EQUAL(RETURN_OK, ina226_readCurrent(&s_dev, ¤t_val)); - TEST_ASSERT_EQUAL_HEX16(500, current_val); //500mA + TEST_ASSERT_EQUAL_HEX16(500, current_val); // 500mA - INA226_regs[0x04] = 0x2EE0; //12000 + INA226_regs[0x04] = 0x2EE0; // 12000 TEST_ASSERT_EQUAL(RETURN_OK, ina226_readCurrent(&s_dev, ¤t_val)); - TEST_ASSERT_EQUAL_HEX16(1200, current_val); //1200mA + TEST_ASSERT_EQUAL_HEX16(1200, current_val); // 1200mA } void test_curr_sens_power(void) { uint16_t power_val = 0xffff; - INA226_regs[0x03] = 0x02A8; //680 + INA226_regs[0x03] = 0x02A8; // 680 TEST_ASSERT_EQUAL(RETURN_OK, ina226_readPower(&s_dev, &power_val)); - TEST_ASSERT_EQUAL_HEX16(1700, power_val); //1700mW + TEST_ASSERT_EQUAL_HEX16(1700, power_val); // 1700mW - INA226_regs[0x03] = 0x04B0; //1200 + INA226_regs[0x03] = 0x04B0; // 1200 TEST_ASSERT_EQUAL(RETURN_OK, ina226_readPower(&s_dev, &power_val)); TEST_ASSERT_EQUAL_HEX16(3000, power_val); } diff --git a/firmware/ec/test/suites/Test_ltc4015.c b/firmware/ec/test/suites/Test_ltc4015.c index 569c2e0e63..3249bff17b 100644 --- a/firmware/ec/test/suites/Test_ltc4015.c +++ b/firmware/ec/test/suites/Test_ltc4015.c @@ -28,24 +28,24 @@ static const I2C_Dev I2C_DEV = { static LTC4015_Dev s_dev = { .cfg = - { - .i2c_dev = - { - .bus = 0, - .slave_addr = 0x68, - }, - }, + { + .i2c_dev = + { + .bus = 0, + .slave_addr = 0x68, + }, + }, }; static LTC4015_Dev s_invalid_dev = { .cfg = - { - .i2c_dev = - { - .bus = 2, - .slave_addr = 0x52, - }, - }, + { + .i2c_dev = + { + .bus = 2, + .slave_addr = 0x52, + }, + }, }; static uint16_t LTC4015_regs[] = { @@ -77,10 +77,10 @@ static uint16_t LTC4015_regs[] = { [0x1A] = 0x00, /* Charge current target */ [0x1B] = 0x00, /* Charge voltage target */ [0x1C] = 0x00, /* Low IBAT Threshold for C/x termination */ - [0x1D] = - 0x00, /* Time in seconds with battery charger in the CV state before timer termination */ + [0x1D] = 0x00, /* Time in seconds with battery charger in the CV state + before timer termination */ [0x1E] = - 0x00, /* Time in seconds before a max_charge_time fault is declared */ + 0x00, /* Time in seconds before a max_charge_time fault is declared */ [0x1F] = 0x00, /* JEITA_T1 */ [0x20] = 0x00, /* JEITA_T2 */ [0x21] = 0x00, /* JEITA_T3 */ @@ -117,7 +117,7 @@ static uint16_t LTC4015_regs[] = { [0x40] = 0x00, /* NTC thermistor ratio */ [0x41] = 0x00, /* Battery series resistance */ [0x42] = - 0x00, /* JEITA temperature region of the NTC thermistor (Li Only) */ + 0x00, /* JEITA temperature region of the NTC thermistor (Li Only) */ [0x43] = 0x00, /* CHEM and CELLS pin settings */ [0x44] = 0x00, /* Charge current control DAC control bits */ [0x45] = 0x00, /* Charge voltage control DAC control bits */ @@ -173,10 +173,10 @@ void test_ltc4015_init(void) /* Now try to init with a pin associated */ LTC4015_Dev alerted_dev = { .cfg = - { - .i2c_dev = s_dev.cfg.i2c_dev, - .pin_alert = &(OcGpio_Pin){ &s_fake_io_port, 5 }, - }, + { + .i2c_dev = s_dev.cfg.i2c_dev, + .pin_alert = &(OcGpio_Pin){ &s_fake_io_port, 5 }, + }, }; TEST_ASSERT_EQUAL(RETURN_OK, LTC4015_init(&alerted_dev)); } @@ -233,14 +233,14 @@ void test_LTC4015_alerts(void) /* Now try to init with a pin associated */ LTC4015_Dev alerted_dev = { .cfg = - { - .i2c_dev = s_dev.cfg.i2c_dev, - .chem = LTC4015_CHEM_LEAD_ACID, - .r_snsb = 3, - .r_snsi = 7, - .cellcount = 6, - .pin_alert = &(OcGpio_Pin){ &s_fake_io_port, 5 }, - }, + { + .i2c_dev = s_dev.cfg.i2c_dev, + .chem = LTC4015_CHEM_LEAD_ACID, + .r_snsb = 3, + .r_snsi = 7, + .cellcount = 6, + .pin_alert = &(OcGpio_Pin){ &s_fake_io_port, 5 }, + }, }; TEST_ASSERT_EQUAL(RETURN_OK, LTC4015_init(&alerted_dev)); @@ -276,9 +276,9 @@ void test_LTC4015_alerts(void) void test_LTC4015_enableLimitAlerts(void) { - TEST_ASSERT_EQUAL(RETURN_OK, - LTC4015_enableLimitAlerts( - &s_dev, LTC4015_EVT_BVL | LTC4015_EVT_ICH)); + TEST_ASSERT_EQUAL( + RETURN_OK, + LTC4015_enableLimitAlerts(&s_dev, LTC4015_EVT_BVL | LTC4015_EVT_ICH)); TEST_ASSERT_EQUAL_HEX16(0x0820, LTC4015_regs[0x0D]); } @@ -304,10 +304,10 @@ void test_LTC4015_cfg_icharge(void) /* The only thing that matters for this calc is Rsnsb */ LTC4015_Dev charger = { .cfg = - { - .i2c_dev = I2C_DEV, - .r_snsb = 3, - }, + { + .i2c_dev = I2C_DEV, + .r_snsb = 3, + }, }; TEST_ASSERT_EQUAL(RETURN_OK, LTC4015_cfg_icharge(&charger, 3000)); @@ -339,10 +339,10 @@ void test_LTC4015_get_cfg_icharge(void) /* The only thing that matters for this calc is Rsnsb */ LTC4015_Dev charger = { .cfg = - { - .i2c_dev = I2C_DEV, - .r_snsb = 3, - }, + { + .i2c_dev = I2C_DEV, + .r_snsb = 3, + }, }; uint16_t max_chargeCurrent; @@ -374,9 +374,9 @@ void test_LTC4015_cfg_vcharge(void) /* Chemistry and #cells affect this calc */ LTC4015_Dev charger = { .cfg = - { - .i2c_dev = I2C_DEV, - }, + { + .i2c_dev = I2C_DEV, + }, }; /* TODO: check if we're using temperature comp. / if the driver should @@ -433,9 +433,9 @@ void test_LTC4015_get_cfg_vcharge(void) /* Chemistry and #cells affect this calc */ LTC4015_Dev charger = { .cfg = - { - .i2c_dev = I2C_DEV, - }, + { + .i2c_dev = I2C_DEV, + }, }; uint16_t vcharge; @@ -484,9 +484,9 @@ void test_LTC4015_cfg_battery_voltage_low(void) /* Chemistry and #cells affect this calc */ LTC4015_Dev charger = { .cfg = - { - .i2c_dev = I2C_DEV, - }, + { + .i2c_dev = I2C_DEV, + }, }; /* Test lithium ion chemistry */ @@ -529,9 +529,9 @@ void test_LTC4015_get_cfg_battery_voltage_low(void) /* Chemistry and #cells affect this calc */ LTC4015_Dev charger = { .cfg = - { - .i2c_dev = I2C_DEV, - }, + { + .i2c_dev = I2C_DEV, + }, }; int16_t underVoltage; @@ -541,12 +541,12 @@ void test_LTC4015_get_cfg_battery_voltage_low(void) charger.cfg.cellcount = 3; LTC4015_regs[0x01] = 15603; TEST_ASSERT_EQUAL(RETURN_OK, LTC4015_get_cfg_battery_voltage_low( - &charger, &underVoltage)); + &charger, &underVoltage)); TEST_ASSERT_EQUAL(8999, underVoltage); LTC4015_regs[0x01] = 31208; TEST_ASSERT_EQUAL(RETURN_OK, LTC4015_get_cfg_battery_voltage_low( - &charger, &underVoltage)); + &charger, &underVoltage)); TEST_ASSERT_EQUAL(18000, underVoltage); /* Test lead acid chemistry */ @@ -555,12 +555,12 @@ void test_LTC4015_get_cfg_battery_voltage_low(void) charger.cfg.cellcount = 6; LTC4015_regs[0x01] = 13458; TEST_ASSERT_EQUAL(RETURN_OK, LTC4015_get_cfg_battery_voltage_low( - &charger, &underVoltage)); + &charger, &underVoltage)); TEST_ASSERT_EQUAL(10349, underVoltage); LTC4015_regs[0x01] = 12353; TEST_ASSERT_EQUAL(RETURN_OK, LTC4015_get_cfg_battery_voltage_low( - &charger, &underVoltage)); + &charger, &underVoltage)); TEST_ASSERT_EQUAL(9500, underVoltage); } @@ -569,9 +569,9 @@ void test_LTC4015_cfg_battery_voltage_high(void) /* Chemistry and #cells affect this calc */ LTC4015_Dev charger = { .cfg = - { - .i2c_dev = I2C_DEV, - }, + { + .i2c_dev = I2C_DEV, + }, }; /* Test lithium ion chemistry */ @@ -614,9 +614,9 @@ void test_LTC4015_get_cfg_battery_voltage_high(void) /* Chemistry and #cells affect this calc */ LTC4015_Dev charger = { .cfg = - { - .i2c_dev = I2C_DEV, - }, + { + .i2c_dev = I2C_DEV, + }, }; int16_t overVoltage; @@ -626,12 +626,12 @@ void test_LTC4015_get_cfg_battery_voltage_high(void) charger.cfg.cellcount = 3; LTC4015_regs[0x02] = 21845; TEST_ASSERT_EQUAL(RETURN_OK, LTC4015_get_cfg_battery_voltage_high( - &charger, &overVoltage)); + &charger, &overVoltage)); TEST_ASSERT_EQUAL(12600, overVoltage); LTC4015_regs[0x02] = 15603; TEST_ASSERT_EQUAL(RETURN_OK, LTC4015_get_cfg_battery_voltage_high( - &charger, &overVoltage)); + &charger, &overVoltage)); TEST_ASSERT_EQUAL(8999, overVoltage); /* Test lead acid chemistry */ @@ -640,12 +640,12 @@ void test_LTC4015_get_cfg_battery_voltage_high(void) charger.cfg.cellcount = 6; LTC4015_regs[0x02] = 17945; TEST_ASSERT_EQUAL(RETURN_OK, LTC4015_get_cfg_battery_voltage_high( - &charger, &overVoltage)); + &charger, &overVoltage)); TEST_ASSERT_EQUAL(13800, overVoltage); LTC4015_regs[0x02] = 390; TEST_ASSERT_EQUAL(RETURN_OK, LTC4015_get_cfg_battery_voltage_high( - &charger, &overVoltage)); + &charger, &overVoltage)); TEST_ASSERT_EQUAL(299, overVoltage); } @@ -653,9 +653,9 @@ void test_LTC4015_cfg_input_voltage_low(void) { LTC4015_Dev charger = { .cfg = - { - .i2c_dev = I2C_DEV, - }, + { + .i2c_dev = I2C_DEV, + }, }; /* VIN_LO_ALERT_LIMIT = limit/1.648mV */ @@ -675,21 +675,21 @@ void test_LTC4015_get_cfg_input_voltage_low(void) { LTC4015_Dev charger = { .cfg = - { - .i2c_dev = I2C_DEV, - }, + { + .i2c_dev = I2C_DEV, + }, }; int16_t inputVoltage; /* VIN_LO_ALERT_LIMIT = limit/1.648mV */ LTC4015_regs[0x03] = 3034; - TEST_ASSERT_EQUAL(RETURN_OK, LTC4015_get_cfg_input_voltage_low( - &charger, &inputVoltage)); + TEST_ASSERT_EQUAL( + RETURN_OK, LTC4015_get_cfg_input_voltage_low(&charger, &inputVoltage)); TEST_ASSERT_EQUAL(5000, inputVoltage); LTC4015_regs[0x03] = 60; - TEST_ASSERT_EQUAL(RETURN_OK, LTC4015_get_cfg_input_voltage_low( - &charger, &inputVoltage)); + TEST_ASSERT_EQUAL( + RETURN_OK, LTC4015_get_cfg_input_voltage_low(&charger, &inputVoltage)); TEST_ASSERT_EQUAL(98, inputVoltage); } @@ -698,10 +698,10 @@ void test_LTC4015_cfg_input_current_high(void) /* Rsnsi value affects this calculation */ LTC4015_Dev charger = { .cfg = - { - .i2c_dev = I2C_DEV, - .r_snsi = 7, - }, + { + .i2c_dev = I2C_DEV, + .r_snsi = 7, + }, }; /* IIN_HI_ALERT_LIMIT = (limit*RSNSI)/1.46487uV */ @@ -725,24 +725,24 @@ void test_LTC4015_get_cfg_input_current_high(void) /* Rsnsi value affects this calculation */ LTC4015_Dev charger = { .cfg = - { - .i2c_dev = I2C_DEV, - .r_snsi = 7, - }, + { + .i2c_dev = I2C_DEV, + .r_snsi = 7, + }, }; int16_t inputCurrent; /* IIN_HI_ALERT_LIMIT = (limit*RSNSI)/1.46487uV */ LTC4015_regs[0x07] = 23892; - TEST_ASSERT_EQUAL(RETURN_OK, LTC4015_get_cfg_input_current_high( - &charger, &inputCurrent)); + TEST_ASSERT_EQUAL( + RETURN_OK, LTC4015_get_cfg_input_current_high(&charger, &inputCurrent)); TEST_ASSERT_EQUAL(4999, inputCurrent); charger.cfg.r_snsi = 2; LTC4015_regs[0x07] = 23211; - TEST_ASSERT_EQUAL(RETURN_OK, LTC4015_get_cfg_input_current_high( - &charger, &inputCurrent)); + TEST_ASSERT_EQUAL( + RETURN_OK, LTC4015_get_cfg_input_current_high(&charger, &inputCurrent)); TEST_ASSERT_EQUAL(17000, inputCurrent); } @@ -751,10 +751,10 @@ void test_LTC4015_cfg_battery_current_low(void) /* Rsnsb value affects this calculation */ LTC4015_Dev charger = { .cfg = - { - .i2c_dev = I2C_DEV, - .r_snsb = 30, - }, + { + .i2c_dev = I2C_DEV, + .r_snsb = 30, + }, }; /* IBAT_LO_ALERT_LIMIT = (limit*RSNSB)/1.46487uV */ @@ -778,24 +778,24 @@ void test_LTC4015_get_cfg_battery_current_low(void) /* Rsnsb value affects this calculation */ LTC4015_Dev charger = { .cfg = - { - .i2c_dev = I2C_DEV, - .r_snsb = 30, - }, + { + .i2c_dev = I2C_DEV, + .r_snsb = 30, + }, }; int16_t batteryCurrent; /* IBAT_LO_ALERT_LIMIT = (limit*RSNSB)/1.46487uV */ LTC4015_regs[0x08] = 2048; TEST_ASSERT_EQUAL(RETURN_OK, LTC4015_get_cfg_battery_current_low( - &charger, &batteryCurrent)); + &charger, &batteryCurrent)); TEST_ASSERT_EQUAL(100, batteryCurrent); charger.cfg.r_snsb = 4; LTC4015_regs[0x08] = 8276; TEST_ASSERT_EQUAL(RETURN_OK, LTC4015_get_cfg_battery_current_low( - &charger, &batteryCurrent)); + &charger, &batteryCurrent)); TEST_ASSERT_EQUAL(3030, batteryCurrent); } @@ -803,9 +803,9 @@ void test_LTC4015_cfg_die_temperature_high(void) { LTC4015_Dev charger = { .cfg = - { - .i2c_dev = I2C_DEV, - }, + { + .i2c_dev = I2C_DEV, + }, }; /* DIE_TEMP_HI_ALERT_LIMIT = (DIE_TEMP – 12010)/45.6°C */ @@ -830,21 +830,21 @@ void test_LTC4015_get_die_temperature_high(void) { LTC4015_Dev charger = { .cfg = - { - .i2c_dev = I2C_DEV, - }, + { + .i2c_dev = I2C_DEV, + }, }; int16_t dieTemperature; /* DIE_TEMP_HI_ALERT_LIMIT = (DIE_TEMP – 12010)/45.6°C */ LTC4015_regs[0x09] = 15658; TEST_ASSERT_EQUAL(RETURN_OK, LTC4015_get_cfg_die_temperature_high( - &charger, &dieTemperature)); + &charger, &dieTemperature)); TEST_ASSERT_EQUAL(80, dieTemperature); LTC4015_regs[0x09] = 11554; TEST_ASSERT_EQUAL(RETURN_OK, LTC4015_get_cfg_die_temperature_high( - &charger, &dieTemperature)); + &charger, &dieTemperature)); TEST_ASSERT_EQUAL(-10, dieTemperature); } @@ -853,10 +853,10 @@ void test_LTC4015_cfg_input_current_limit(void) /* Rsnsi value affects this calculation */ LTC4015_Dev charger = { .cfg = - { - .i2c_dev = I2C_DEV, - .r_snsi = 7, - }, + { + .i2c_dev = I2C_DEV, + .r_snsi = 7, + }, }; /* IIN_LIMIT_SETTING = (limit * RSNSI / 500uV) - 1 */ @@ -881,24 +881,24 @@ void test_LTC4015_get_cfg_input_current_limit(void) /* Rsnsi value affects this calculation */ LTC4015_Dev charger = { .cfg = - { - .i2c_dev = I2C_DEV, - .r_snsi = 7, - }, + { + .i2c_dev = I2C_DEV, + .r_snsi = 7, + }, }; uint16_t inputCurrent; /* IIN_LIMIT_SETTING = (limit * RSNSI / 500uV) - 1 */ LTC4015_regs[0x15] = 76; TEST_ASSERT_EQUAL(RETURN_OK, LTC4015_get_cfg_input_current_limit( - &charger, &inputCurrent)); + &charger, &inputCurrent)); TEST_ASSERT_EQUAL(5500, inputCurrent); charger.cfg.r_snsi = 2; LTC4015_regs[0x15] = 200; TEST_ASSERT_EQUAL(RETURN_OK, LTC4015_get_cfg_input_current_limit( - &charger, &inputCurrent)); + &charger, &inputCurrent)); TEST_ASSERT_EQUAL(50250, inputCurrent); } @@ -906,9 +906,9 @@ void test_LTC4015_get_die_temp(void) { LTC4015_Dev charger = { .cfg = - { - .i2c_dev = I2C_DEV, - }, + { + .i2c_dev = I2C_DEV, + }, }; int16_t dieTemperature; @@ -929,10 +929,10 @@ void test_LTC4015_get_battery_current(void) /* Rsnsb value affects this calculation */ LTC4015_Dev charger = { .cfg = - { - .i2c_dev = I2C_DEV, - .r_snsb = 30, - }, + { + .i2c_dev = I2C_DEV, + .r_snsb = 30, + }, }; int16_t batteryCurrent; @@ -955,10 +955,10 @@ void test_LTC4015_get_input_current(void) /* Rsnsi value affects this calculation */ LTC4015_Dev charger = { .cfg = - { - .i2c_dev = I2C_DEV, - .r_snsi = 7, - }, + { + .i2c_dev = I2C_DEV, + .r_snsi = 7, + }, }; int16_t inputCurrent; @@ -981,9 +981,9 @@ void test_LTC4015_get_battery_voltage(void) /* Chemistry and #cells affect this calc */ LTC4015_Dev charger = { .cfg = - { - .i2c_dev = I2C_DEV, - }, + { + .i2c_dev = I2C_DEV, + }, }; int16_t batteryVoltage; @@ -1010,9 +1010,9 @@ void test_LTC4015_get_input_voltage(void) { LTC4015_Dev charger = { .cfg = - { - .i2c_dev = I2C_DEV, - }, + { + .i2c_dev = I2C_DEV, + }, }; int16_t inputVoltage; @@ -1032,9 +1032,9 @@ void test_LTC4015_get_system_voltage(void) { LTC4015_Dev charger = { .cfg = - { - .i2c_dev = I2C_DEV, - }, + { + .i2c_dev = I2C_DEV, + }, }; int16_t systemVoltage; @@ -1055,10 +1055,10 @@ void test_LTC4015_get_icharge_dac(void) /* Rsnsb value affects this calculation */ LTC4015_Dev charger = { .cfg = - { - .i2c_dev = I2C_DEV, - .r_snsb = 30, - }, + { + .i2c_dev = I2C_DEV, + .r_snsb = 30, + }, }; int16_t iCharge; @@ -1078,9 +1078,9 @@ void test_LTC4015_get_bat_presence(void) { LTC4015_Dev charger = { .cfg = - { - .i2c_dev = I2C_DEV, - }, + { + .i2c_dev = I2C_DEV, + }, }; bool present; diff --git a/firmware/ec/test/suites/Test_ltc4275.c b/firmware/ec/test/suites/Test_ltc4275.c index 1fb45accb5..dfdc9c6f86 100644 --- a/firmware/ec/test/suites/Test_ltc4275.c +++ b/firmware/ec/test/suites/Test_ltc4275.c @@ -81,11 +81,11 @@ void suite_tearDown(void) LTC4275_Dev l_dev = { .cfg = - { - .pin_evt = &(OcGpio_Pin){ &s_fake_io_port, 0x60 }, - .pin_detect = &(OcGpio_Pin){ &s_fake_io_port, 0x40 }, + { + .pin_evt = &(OcGpio_Pin){ &s_fake_io_port, 0x60 }, + .pin_detect = &(OcGpio_Pin){ &s_fake_io_port, 0x40 }, - }, + }, }; /* ================================ Tests =================================== */ diff --git a/firmware/ec/test/suites/Test_ocmp_adt7481.c b/firmware/ec/test/suites/Test_ocmp_adt7481.c index 540488850c..0e276513f7 100644 --- a/firmware/ec/test/suites/Test_ocmp_adt7481.c +++ b/firmware/ec/test/suites/Test_ocmp_adt7481.c @@ -159,19 +159,19 @@ void test_get_status(void) ADT7481_regs[0x30] = 0x73; /* ADT7481_STATUS_TEMPERATURE */ - TEST_ASSERT_EQUAL( - true, ADT7481_fxnTable.cb_get_status( + TEST_ASSERT_EQUAL(true, + ADT7481_fxnTable.cb_get_status( &I2C_DEV, ADT7481_STATUS_TEMPERATURE, &tempvalue)); TEST_ASSERT_EQUAL_HEX8(0x33, tempvalue); /* Invalid device */ - TEST_ASSERT_EQUAL(false, ADT7481_fxnTable.cb_get_status( - &s_invalid_dev, ADT7481_STATUS_TEMPERATURE, - &tempvalue)); + TEST_ASSERT_EQUAL( + false, ADT7481_fxnTable.cb_get_status( + &s_invalid_dev, ADT7481_STATUS_TEMPERATURE, &tempvalue)); /* Invalid bus */ - TEST_ASSERT_EQUAL(false, ADT7481_fxnTable.cb_get_status( - &s_invalid_bus, ADT7481_STATUS_TEMPERATURE, - &tempvalue)); + TEST_ASSERT_EQUAL( + false, ADT7481_fxnTable.cb_get_status( + &s_invalid_bus, ADT7481_STATUS_TEMPERATURE, &tempvalue)); /* Invalid parameter */ TEST_ASSERT_EQUAL(false, ADT7481_fxnTable.cb_get_status(&I2C_DEV, 40, &tempvalue)); @@ -183,27 +183,27 @@ void test_set_config(void) ADT7481_regs[0x32] = 0x00; TEST_ASSERT_EQUAL(true, ADT7481_fxnTable.cb_set_config( - &I2C_DEV, ADT7481_CONFIG_LIM_LOW, &limit)); + &I2C_DEV, ADT7481_CONFIG_LIM_LOW, &limit)); TEST_ASSERT_EQUAL_HEX8(0xA2, ADT7481_regs[0x32]); ADT7481_regs[0x31] = 0x00; TEST_ASSERT_EQUAL(true, ADT7481_fxnTable.cb_set_config( - &I2C_DEV, ADT7481_CONFIG_LIM_HIGH, &limit)); + &I2C_DEV, ADT7481_CONFIG_LIM_HIGH, &limit)); TEST_ASSERT_EQUAL_HEX8(0xA2, ADT7481_regs[0x31]); ADT7481_regs[0x39] = 0x00; TEST_ASSERT_EQUAL(true, ADT7481_fxnTable.cb_set_config( - &I2C_DEV, ADT7481_CONFIG_LIM_CRIT, &limit)); + &I2C_DEV, ADT7481_CONFIG_LIM_CRIT, &limit)); TEST_ASSERT_EQUAL_HEX8(0xA2, ADT7481_regs[0x39]); /* Invalid Device */ - TEST_ASSERT_EQUAL(false, - ADT7481_fxnTable.cb_set_config( - &s_invalid_dev, ADT7481_CONFIG_LIM_LOW, &limit)); + TEST_ASSERT_EQUAL( + false, ADT7481_fxnTable.cb_set_config(&s_invalid_dev, + ADT7481_CONFIG_LIM_LOW, &limit)); /* Invalid bus */ - TEST_ASSERT_EQUAL(false, - ADT7481_fxnTable.cb_set_config( - &s_invalid_bus, ADT7481_CONFIG_LIM_LOW, &limit)); + TEST_ASSERT_EQUAL( + false, ADT7481_fxnTable.cb_set_config(&s_invalid_bus, + ADT7481_CONFIG_LIM_LOW, &limit)); /* Invalid Parameter */ TEST_ASSERT_EQUAL(false, ADT7481_fxnTable.cb_set_config(&I2C_DEV, 40, &limit)); @@ -217,27 +217,27 @@ void test_get_config(void) ADT7481_regs[0x39] = 0xA2; TEST_ASSERT_EQUAL(true, ADT7481_fxnTable.cb_get_config( - &I2C_DEV, ADT7481_CONFIG_LIM_LOW, &limit)); + &I2C_DEV, ADT7481_CONFIG_LIM_LOW, &limit)); TEST_ASSERT_EQUAL_HEX8(0x62, limit); limit = 0xFF; TEST_ASSERT_EQUAL(true, ADT7481_fxnTable.cb_get_config( - &I2C_DEV, ADT7481_CONFIG_LIM_HIGH, &limit)); + &I2C_DEV, ADT7481_CONFIG_LIM_HIGH, &limit)); TEST_ASSERT_EQUAL_HEX8(0x62, limit); limit = 0xFF; TEST_ASSERT_EQUAL(true, ADT7481_fxnTable.cb_get_config( - &I2C_DEV, ADT7481_CONFIG_LIM_CRIT, &limit)); + &I2C_DEV, ADT7481_CONFIG_LIM_CRIT, &limit)); TEST_ASSERT_EQUAL_HEX8(0x62, limit); /* Invalid Device */ - TEST_ASSERT_EQUAL(false, - ADT7481_fxnTable.cb_get_config( - &s_invalid_dev, ADT7481_CONFIG_LIM_LOW, &limit)); + TEST_ASSERT_EQUAL( + false, ADT7481_fxnTable.cb_get_config(&s_invalid_dev, + ADT7481_CONFIG_LIM_LOW, &limit)); /* Invalid bus */ - TEST_ASSERT_EQUAL(false, - ADT7481_fxnTable.cb_get_config( - &s_invalid_bus, ADT7481_CONFIG_LIM_LOW, &limit)); + TEST_ASSERT_EQUAL( + false, ADT7481_fxnTable.cb_get_config(&s_invalid_bus, + ADT7481_CONFIG_LIM_LOW, &limit)); /* Invalid Parameter */ TEST_ASSERT_EQUAL(false, ADT7481_fxnTable.cb_get_config(&I2C_DEV, 40, &limit)); @@ -250,9 +250,9 @@ void test_init(void) .highlimit = 75, .critlimit = 85, }; - TEST_ASSERT_EQUAL(POST_DEV_CFG_DONE, - ADT7481_fxnTable.cb_init( - &I2C_DEV, &fact_sdr_fpga_adt7481_cfg, NULL)); + TEST_ASSERT_EQUAL( + POST_DEV_CFG_DONE, + ADT7481_fxnTable.cb_init(&I2C_DEV, &fact_sdr_fpga_adt7481_cfg, NULL)); TEST_ASSERT_EQUAL_HEX8(0x2C, ADT7481_regs[0x32]); TEST_ASSERT_EQUAL_HEX8(0x8B, ADT7481_regs[0x31]); TEST_ASSERT_EQUAL_HEX8(0x95, ADT7481_regs[0x39]); @@ -262,12 +262,12 @@ void test_init(void) ADT7481_regs[0x0A]); /* Invalid Device */ - TEST_ASSERT_EQUAL(POST_DEV_CFG_FAIL, - ADT7481_fxnTable.cb_init(&s_invalid_dev, - ADT7481_CONFIG_LIM_LOW, NULL)); - TEST_ASSERT_EQUAL(POST_DEV_CFG_FAIL, - ADT7481_fxnTable.cb_init(&s_invalid_bus, - ADT7481_CONFIG_LIM_LOW, NULL)); + TEST_ASSERT_EQUAL( + POST_DEV_CFG_FAIL, + ADT7481_fxnTable.cb_init(&s_invalid_dev, ADT7481_CONFIG_LIM_LOW, NULL)); + TEST_ASSERT_EQUAL( + POST_DEV_CFG_FAIL, + ADT7481_fxnTable.cb_init(&s_invalid_bus, ADT7481_CONFIG_LIM_LOW, NULL)); /* Invalid Parameter */ TEST_ASSERT_EQUAL(POST_DEV_CFG_FAIL, ADT7481_fxnTable.cb_init(&I2C_DEV, NULL, NULL)); diff --git a/firmware/ec/test/suites/Test_ocmp_ltc4274.c b/firmware/ec/test/suites/Test_ocmp_ltc4274.c index 0645cedffd..04f8df4eaf 100644 --- a/firmware/ec/test/suites/Test_ocmp_ltc4274.c +++ b/firmware/ec/test/suites/Test_ocmp_ltc4274.c @@ -42,26 +42,26 @@ static I2C_Dev I2C_INVALID_BUS = { static LTC4274_Dev s_dev = { .cfg = - { - .i2c_dev = - { - .bus = 7, - .slave_addr = 0x2F, - }, - .pin_evt = &(OcGpio_Pin){ &s_fake_io_port, 27 }, - .reset_pin = { &s_fake_io_port, 27 }, - }, + { + .i2c_dev = + { + .bus = 7, + .slave_addr = 0x2F, + }, + .pin_evt = &(OcGpio_Pin){ &s_fake_io_port, 27 }, + .reset_pin = { &s_fake_io_port, 27 }, + }, }; static LTC4274_Dev s_invalid_dev = { .cfg = - { - .i2c_dev = - { - .bus = 7, - .slave_addr = 0x52, - }, - }, + { + .i2c_dev = + { + .bus = 7, + .slave_addr = 0x52, + }, + }, }; static uint8_t LTC4274_regs[] = { @@ -217,20 +217,19 @@ void test_get_status(void) LTC4274_regs[0x04] = 0xFF; LTC4274_regs[0x0C] = 0x01; TEST_ASSERT_EQUAL(true, LTC4274_fxnTable.cb_get_status( - &I2C_DEV, LTC7274_STATUS_DETECT, &value)); + &I2C_DEV, LTC7274_STATUS_DETECT, &value)); TEST_ASSERT_EQUAL_HEX8(0x01, value); LTC4274_regs[0x04] = 0xFF; LTC4274_regs[0x0C] = 0x2B; TEST_ASSERT_EQUAL(true, LTC4274_fxnTable.cb_get_status( - &I2C_DEV, LTC7274_STATUS_CLASS, &value)); + &I2C_DEV, LTC7274_STATUS_CLASS, &value)); TEST_ASSERT_EQUAL_HEX8(0x02, value); LTC4274_regs[0x04] = 0xFF; LTC4274_regs[0x10] = 0x00; - TEST_ASSERT_EQUAL(true, - LTC4274_fxnTable.cb_get_status( - &I2C_DEV, LTC7274_STATUS_POWERGOOD, &value)); + TEST_ASSERT_EQUAL(true, LTC4274_fxnTable.cb_get_status( + &I2C_DEV, LTC7274_STATUS_POWERGOOD, &value)); TEST_ASSERT_EQUAL_HEX8(0x01, value); /* invalid paramid */ @@ -240,25 +239,25 @@ void test_get_status(void) LTC4274_fxnTable.cb_get_status(&I2C_DEV, 0XFF, &value)); /* invalid dev-id */ + TEST_ASSERT_EQUAL( + false, LTC4274_fxnTable.cb_get_status(&I2C_INVALID_DEV, + LTC7274_STATUS_CLASS, &value)); TEST_ASSERT_EQUAL(false, LTC4274_fxnTable.cb_get_status( - &I2C_INVALID_DEV, LTC7274_STATUS_CLASS, &value)); - TEST_ASSERT_EQUAL( - false, LTC4274_fxnTable.cb_get_status( - &I2C_INVALID_DEV, LTC7274_STATUS_POWERGOOD, &value)); - TEST_ASSERT_EQUAL( - false, LTC4274_fxnTable.cb_get_status( - &I2C_INVALID_DEV, LTC7274_STATUS_POWERGOOD, &value)); + &I2C_INVALID_DEV, LTC7274_STATUS_POWERGOOD, &value)); + TEST_ASSERT_EQUAL(false, + LTC4274_fxnTable.cb_get_status( + &I2C_INVALID_DEV, LTC7274_STATUS_POWERGOOD, &value)); /* invalid bus */ + TEST_ASSERT_EQUAL( + false, LTC4274_fxnTable.cb_get_status(&I2C_INVALID_BUS, + LTC7274_STATUS_CLASS, &value)); TEST_ASSERT_EQUAL(false, LTC4274_fxnTable.cb_get_status( - &I2C_INVALID_BUS, LTC7274_STATUS_CLASS, &value)); - TEST_ASSERT_EQUAL( - false, LTC4274_fxnTable.cb_get_status( - &I2C_INVALID_BUS, LTC7274_STATUS_POWERGOOD, &value)); - TEST_ASSERT_EQUAL( - false, LTC4274_fxnTable.cb_get_status( - &I2C_INVALID_BUS, LTC7274_STATUS_POWERGOOD, &value)); + &I2C_INVALID_BUS, LTC7274_STATUS_POWERGOOD, &value)); + TEST_ASSERT_EQUAL(false, + LTC4274_fxnTable.cb_get_status( + &I2C_INVALID_BUS, LTC7274_STATUS_POWERGOOD, &value)); } void test_set_config(void) @@ -270,73 +269,72 @@ void test_set_config(void) value = 0x51; TEST_ASSERT_EQUAL(true, LTC4274_fxnTable.cb_set_config( - &I2C_DEV, LTC4274_CONFIG_OPERATING_MODE, &value)); + &I2C_DEV, LTC4274_CONFIG_OPERATING_MODE, &value)); TEST_ASSERT_EQUAL_HEX8(LTC4274_regs[0x12], value); LTC4274_regs[0x14] = 0xFF; value = 0x53; TEST_ASSERT_EQUAL(true, LTC4274_fxnTable.cb_set_config( - &I2C_DEV, LTC4274_CONFIG_DETECT_ENABLE, &value)); + &I2C_DEV, LTC4274_CONFIG_DETECT_ENABLE, &value)); TEST_ASSERT_EQUAL_HEX8(LTC4274_regs[0x14], value); LTC4274_regs[0x01] = 0xFF; value = 0x54; TEST_ASSERT_EQUAL(true, LTC4274_fxnTable.cb_set_config( - &I2C_DEV, LTC4274_CONFIG_INTERRUPT_MASK, &value)); + &I2C_DEV, LTC4274_CONFIG_INTERRUPT_MASK, &value)); TEST_ASSERT_EQUAL_HEX8(LTC4274_regs[0x01], value); LTC4274_regs[0x17] = 0xFF; value = true; - TEST_ASSERT_EQUAL( - true, LTC4274_fxnTable.cb_set_config( + TEST_ASSERT_EQUAL(true, + LTC4274_fxnTable.cb_set_config( &I2C_DEV, LTC4274_CONFIG_INTERRUPT_ENABLE, &value)); TEST_ASSERT_EQUAL_HEX8(0x80, LTC4274_regs[0x17]); LTC4274_regs[0x44] = 0xFF; value = 0x56; - TEST_ASSERT_EQUAL(true, - LTC4274_fxnTable.cb_set_config( - &I2C_DEV, LTC4274_CONFIG_HP_ENABLE, &value)); + TEST_ASSERT_EQUAL(true, LTC4274_fxnTable.cb_set_config( + &I2C_DEV, LTC4274_CONFIG_HP_ENABLE, &value)); TEST_ASSERT_EQUAL_HEX8(LTC4274_regs[0x44], value); /* Invalid paramid */ TEST_ASSERT_EQUAL(false, LTC4274_fxnTable.cb_set_config(&I2C_DEV, 0xFF, &value)); - TEST_ASSERT_EQUAL(false, LTC4274_fxnTable.cb_set_config( - &I2C_INVALID_DEV, - LTC4274_CONFIG_OPERATING_MODE, &value)); - TEST_ASSERT_EQUAL(false, LTC4274_fxnTable.cb_set_config( - &I2C_INVALID_DEV, - LTC4274_CONFIG_DETECT_ENABLE, &value)); - TEST_ASSERT_EQUAL(false, LTC4274_fxnTable.cb_set_config( - &I2C_INVALID_DEV, - LTC4274_CONFIG_INTERRUPT_MASK, &value)); - TEST_ASSERT_EQUAL(false, LTC4274_fxnTable.cb_set_config( - &I2C_INVALID_DEV, - LTC4274_CONFIG_INTERRUPT_ENABLE, &value)); TEST_ASSERT_EQUAL( - false, LTC4274_fxnTable.cb_set_config( - &I2C_INVALID_DEV, LTC4274_CONFIG_HP_ENABLE, &value)); + false, LTC4274_fxnTable.cb_set_config( + &I2C_INVALID_DEV, LTC4274_CONFIG_OPERATING_MODE, &value)); + TEST_ASSERT_EQUAL( + false, LTC4274_fxnTable.cb_set_config( + &I2C_INVALID_DEV, LTC4274_CONFIG_DETECT_ENABLE, &value)); + TEST_ASSERT_EQUAL( + false, LTC4274_fxnTable.cb_set_config( + &I2C_INVALID_DEV, LTC4274_CONFIG_INTERRUPT_MASK, &value)); + TEST_ASSERT_EQUAL( + false, LTC4274_fxnTable.cb_set_config( + &I2C_INVALID_DEV, LTC4274_CONFIG_INTERRUPT_ENABLE, &value)); + TEST_ASSERT_EQUAL(false, + LTC4274_fxnTable.cb_set_config( + &I2C_INVALID_DEV, LTC4274_CONFIG_HP_ENABLE, &value)); /* invalid bus */ - TEST_ASSERT_EQUAL(false, LTC4274_fxnTable.cb_set_config( - &I2C_INVALID_BUS, - LTC4274_CONFIG_OPERATING_MODE, &value)); - TEST_ASSERT_EQUAL(false, LTC4274_fxnTable.cb_set_config( - &I2C_INVALID_BUS, - LTC4274_CONFIG_DETECT_ENABLE, &value)); - TEST_ASSERT_EQUAL(false, LTC4274_fxnTable.cb_set_config( - &I2C_INVALID_BUS, - LTC4274_CONFIG_INTERRUPT_MASK, &value)); - TEST_ASSERT_EQUAL(false, LTC4274_fxnTable.cb_set_config( - &I2C_INVALID_BUS, - LTC4274_CONFIG_INTERRUPT_ENABLE, &value)); TEST_ASSERT_EQUAL( - false, LTC4274_fxnTable.cb_set_config( - &I2C_INVALID_BUS, LTC4274_CONFIG_HP_ENABLE, &value)); + false, LTC4274_fxnTable.cb_set_config( + &I2C_INVALID_BUS, LTC4274_CONFIG_OPERATING_MODE, &value)); + TEST_ASSERT_EQUAL( + false, LTC4274_fxnTable.cb_set_config( + &I2C_INVALID_BUS, LTC4274_CONFIG_DETECT_ENABLE, &value)); + TEST_ASSERT_EQUAL( + false, LTC4274_fxnTable.cb_set_config( + &I2C_INVALID_BUS, LTC4274_CONFIG_INTERRUPT_MASK, &value)); + TEST_ASSERT_EQUAL( + false, LTC4274_fxnTable.cb_set_config( + &I2C_INVALID_BUS, LTC4274_CONFIG_INTERRUPT_ENABLE, &value)); + TEST_ASSERT_EQUAL(false, + LTC4274_fxnTable.cb_set_config( + &I2C_INVALID_BUS, LTC4274_CONFIG_HP_ENABLE, &value)); } void test_get_config(void) @@ -347,68 +345,67 @@ void test_get_config(void) LTC4274_regs[0x12] = 0x51; TEST_ASSERT_EQUAL(true, LTC4274_fxnTable.cb_get_config( - &I2C_DEV, LTC4274_CONFIG_OPERATING_MODE, &value)); + &I2C_DEV, LTC4274_CONFIG_OPERATING_MODE, &value)); TEST_ASSERT_EQUAL_HEX8(LTC4274_regs[0x12], value); LTC4274_regs[0x14] = 0x53; TEST_ASSERT_EQUAL(true, LTC4274_fxnTable.cb_get_config( - &I2C_DEV, LTC4274_CONFIG_DETECT_ENABLE, &value)); + &I2C_DEV, LTC4274_CONFIG_DETECT_ENABLE, &value)); TEST_ASSERT_EQUAL_HEX8((LTC4274_regs[0x14] & 07), value); LTC4274_regs[0x01] = 0x54; TEST_ASSERT_EQUAL(true, LTC4274_fxnTable.cb_get_config( - &I2C_DEV, LTC4274_CONFIG_INTERRUPT_MASK, &value)); + &I2C_DEV, LTC4274_CONFIG_INTERRUPT_MASK, &value)); TEST_ASSERT_EQUAL_HEX8(LTC4274_regs[0x01], value); LTC4274_regs[0x17] = 0x80; - TEST_ASSERT_EQUAL( - true, LTC4274_fxnTable.cb_get_config( + TEST_ASSERT_EQUAL(true, + LTC4274_fxnTable.cb_get_config( &I2C_DEV, LTC4274_CONFIG_INTERRUPT_ENABLE, &value)); TEST_ASSERT_EQUAL_HEX8(LTC4274_regs[0x17], value); LTC4274_regs[0x44] = 0x56; - TEST_ASSERT_EQUAL(true, - LTC4274_fxnTable.cb_get_config( - &I2C_DEV, LTC4274_CONFIG_HP_ENABLE, &value)); + TEST_ASSERT_EQUAL(true, LTC4274_fxnTable.cb_get_config( + &I2C_DEV, LTC4274_CONFIG_HP_ENABLE, &value)); TEST_ASSERT_EQUAL_HEX8(LTC4274_regs[0x44], value); /* Invalid paramid */ TEST_ASSERT_EQUAL(false, LTC4274_fxnTable.cb_get_config(&I2C_DEV, 0xFF, &value)); - TEST_ASSERT_EQUAL(false, LTC4274_fxnTable.cb_get_config( - &I2C_INVALID_DEV, - LTC4274_CONFIG_OPERATING_MODE, &value)); - TEST_ASSERT_EQUAL(false, LTC4274_fxnTable.cb_get_config( - &I2C_INVALID_DEV, - LTC4274_CONFIG_DETECT_ENABLE, &value)); - TEST_ASSERT_EQUAL(false, LTC4274_fxnTable.cb_get_config( - &I2C_INVALID_DEV, - LTC4274_CONFIG_INTERRUPT_MASK, &value)); - TEST_ASSERT_EQUAL(false, LTC4274_fxnTable.cb_get_config( - &I2C_INVALID_DEV, - LTC4274_CONFIG_INTERRUPT_ENABLE, &value)); TEST_ASSERT_EQUAL( - false, LTC4274_fxnTable.cb_get_config( - &I2C_INVALID_DEV, LTC4274_CONFIG_HP_ENABLE, &value)); + false, LTC4274_fxnTable.cb_get_config( + &I2C_INVALID_DEV, LTC4274_CONFIG_OPERATING_MODE, &value)); + TEST_ASSERT_EQUAL( + false, LTC4274_fxnTable.cb_get_config( + &I2C_INVALID_DEV, LTC4274_CONFIG_DETECT_ENABLE, &value)); + TEST_ASSERT_EQUAL( + false, LTC4274_fxnTable.cb_get_config( + &I2C_INVALID_DEV, LTC4274_CONFIG_INTERRUPT_MASK, &value)); + TEST_ASSERT_EQUAL( + false, LTC4274_fxnTable.cb_get_config( + &I2C_INVALID_DEV, LTC4274_CONFIG_INTERRUPT_ENABLE, &value)); + TEST_ASSERT_EQUAL(false, + LTC4274_fxnTable.cb_get_config( + &I2C_INVALID_DEV, LTC4274_CONFIG_HP_ENABLE, &value)); /* Invalid bus */ - TEST_ASSERT_EQUAL(false, LTC4274_fxnTable.cb_get_config( - &I2C_INVALID_BUS, - LTC4274_CONFIG_OPERATING_MODE, &value)); - TEST_ASSERT_EQUAL(false, LTC4274_fxnTable.cb_get_config( - &I2C_INVALID_BUS, - LTC4274_CONFIG_DETECT_ENABLE, &value)); - TEST_ASSERT_EQUAL(false, LTC4274_fxnTable.cb_get_config( - &I2C_INVALID_BUS, - LTC4274_CONFIG_INTERRUPT_MASK, &value)); - TEST_ASSERT_EQUAL(false, LTC4274_fxnTable.cb_get_config( - &I2C_INVALID_BUS, - LTC4274_CONFIG_INTERRUPT_ENABLE, &value)); TEST_ASSERT_EQUAL( - false, LTC4274_fxnTable.cb_get_config( - &I2C_INVALID_BUS, LTC4274_CONFIG_HP_ENABLE, &value)); + false, LTC4274_fxnTable.cb_get_config( + &I2C_INVALID_BUS, LTC4274_CONFIG_OPERATING_MODE, &value)); + TEST_ASSERT_EQUAL( + false, LTC4274_fxnTable.cb_get_config( + &I2C_INVALID_BUS, LTC4274_CONFIG_DETECT_ENABLE, &value)); + TEST_ASSERT_EQUAL( + false, LTC4274_fxnTable.cb_get_config( + &I2C_INVALID_BUS, LTC4274_CONFIG_INTERRUPT_MASK, &value)); + TEST_ASSERT_EQUAL( + false, LTC4274_fxnTable.cb_get_config( + &I2C_INVALID_BUS, LTC4274_CONFIG_INTERRUPT_ENABLE, &value)); + TEST_ASSERT_EQUAL(false, + LTC4274_fxnTable.cb_get_config( + &I2C_INVALID_BUS, LTC4274_CONFIG_HP_ENABLE, &value)); } void test_init(void) @@ -424,8 +421,8 @@ void test_init(void) }; TEST_ASSERT_EQUAL( - POST_DEV_CFG_DONE, - LTC4274_fxnTable.cb_init(&s_dev, &fact_ltc4274_cfg, &alert_token)); + POST_DEV_CFG_DONE, + LTC4274_fxnTable.cb_init(&s_dev, &fact_ltc4274_cfg, &alert_token)); TEST_ASSERT_EQUAL_HEX8(LTC4274_regs[0x12], LTC4274_AUTO_MODE); TEST_ASSERT_EQUAL_HEX8(LTC4274_regs[0x14], LTC4274_DETECT_ENABLE); @@ -437,7 +434,7 @@ void test_init(void) TEST_ASSERT_EQUAL(POST_DEV_CFG_FAIL, LTC4274_fxnTable.cb_init( - &s_invalid_dev, &fact_ltc4274_cfg, &alert_token)); + &s_invalid_dev, &fact_ltc4274_cfg, &alert_token)); TEST_ASSERT_EQUAL(POST_DEV_CFG_DONE, LTC4274_fxnTable.cb_init(&s_dev, NULL, &alert_token)); } diff --git a/firmware/ec/test/suites/Test_powerSource.c b/firmware/ec/test/suites/Test_powerSource.c index b85d6988cb..a60e2a0943 100644 --- a/firmware/ec/test/suites/Test_powerSource.c +++ b/firmware/ec/test/suites/Test_powerSource.c @@ -163,9 +163,9 @@ static OcGpio_Port s_fake_io_port = { static OcGpio_Port s_fake_io_exp = { .fn_table = &GpioSX1509_fnTable, .cfg = - &(SX1509_Cfg){ - .i2c_dev = { I2C_BUS, I2C_ADDR }, - }, + &(SX1509_Cfg){ + .i2c_dev = { I2C_BUS, I2C_ADDR }, + }, .object_data = &(SX1509_Obj){}, }; @@ -195,26 +195,26 @@ void suite_tearDown(void) static PWRSRC_Dev p_dev = { .cfg = - { - /* SOLAR_AUX_PRSNT_N */ - .pin_solar_aux_prsnt_n = { &s_fake_io_port, 0x1E }, - /* POE_PRSNT_N */ - .pin_poe_prsnt_n = { &s_fake_io_port, 0x55 }, - /* INT_BAT_PRSNT */ - .pin_int_bat_prsnt = { &s_fake_io_exp, 11 }, - /* EXT_BAT_PRSNT */ - .pin_ext_bat_prsnt = { &s_fake_io_exp, 12 }, - }, + { + /* SOLAR_AUX_PRSNT_N */ + .pin_solar_aux_prsnt_n = { &s_fake_io_port, 0x1E }, + /* POE_PRSNT_N */ + .pin_poe_prsnt_n = { &s_fake_io_port, 0x55 }, + /* INT_BAT_PRSNT */ + .pin_int_bat_prsnt = { &s_fake_io_exp, 11 }, + /* EXT_BAT_PRSNT */ + .pin_ext_bat_prsnt = { &s_fake_io_exp, 12 }, + }, }; /* ================================ Tests =================================== */ void test_pwr_process_get_status_parameters_data_poeavailable(void) { uint8_t powerStatus = 0; - uint8_t index = 0x00; //PoE Availability - PWR_GpioPins[0x55] = 0x0; //PoE Enable - PWR_GpioPins[0x1E] = 0x1; //Aux/solar Disable - SX1509_regs[0x10] = 0x18; //Int/Ext Battery Disable + uint8_t index = 0x00; // PoE Availability + PWR_GpioPins[0x55] = 0x0; // PoE Enable + PWR_GpioPins[0x1E] = 0x1; // Aux/solar Disable + SX1509_regs[0x10] = 0x18; // Int/Ext Battery Disable SX1509_regs[0x11] = 0x00; pwr_source_init(); @@ -227,10 +227,10 @@ void test_pwr_process_get_status_parameters_data_poeavailable(void) void test_pwr_process_get_status_parameters_data_poeaccessible(void) { uint8_t powerStatus = 0; - uint8_t index = 0x01; //PoE Accessibility - PWR_GpioPins[0x55] = 0x0; //PoE Enable - PWR_GpioPins[0x1E] = 0x1; //Aux/solar Disable - SX1509_regs[0x10] = 0x18; //Int/Ext Battery Disable + uint8_t index = 0x01; // PoE Accessibility + PWR_GpioPins[0x55] = 0x0; // PoE Enable + PWR_GpioPins[0x1E] = 0x1; // Aux/solar Disable + SX1509_regs[0x10] = 0x18; // Int/Ext Battery Disable SX1509_regs[0x11] = 0x00; pwr_source_init(); @@ -243,10 +243,10 @@ void test_pwr_process_get_status_parameters_data_poeaccessible(void) void test_pwr_process_get_status_parameters_data_solaravailable(void) { uint8_t powerStatus = 0; - uint8_t index = 0x02; //SOLAR Availability - PWR_GpioPins[0x55] = 0x1; //PoE Disable - PWR_GpioPins[0x1E] = 0x0; //Aux/solar Enable - SX1509_regs[0x10] = 0x18; //Int/Ext Battery Disable + uint8_t index = 0x02; // SOLAR Availability + PWR_GpioPins[0x55] = 0x1; // PoE Disable + PWR_GpioPins[0x1E] = 0x0; // Aux/solar Enable + SX1509_regs[0x10] = 0x18; // Int/Ext Battery Disable SX1509_regs[0x11] = 0x00; pwr_source_init(); @@ -259,10 +259,10 @@ void test_pwr_process_get_status_parameters_data_solaravailable(void) void test_pwr_process_get_status_parameters_data_solaraccessible(void) { uint8_t powerStatus = 0; - uint8_t index = 0x03; //SOLAR Accessibility - PWR_GpioPins[0x55] = 0x1; //PoE Disable - PWR_GpioPins[0x1E] = 0x0; //Aux/solar Enable - SX1509_regs[0x10] = 0x18; //Int/Ext Battery Disable + uint8_t index = 0x03; // SOLAR Accessibility + PWR_GpioPins[0x55] = 0x1; // PoE Disable + PWR_GpioPins[0x1E] = 0x0; // Aux/solar Enable + SX1509_regs[0x10] = 0x18; // Int/Ext Battery Disable SX1509_regs[0x11] = 0x00; pwr_source_init(); @@ -275,10 +275,10 @@ void test_pwr_process_get_status_parameters_data_solaraccessible(void) void test_pwr_process_get_status_parameters_data_extavailable(void) { uint8_t powerStatus = 0; - uint8_t index = 0x04; //Ext Batt availability - PWR_GpioPins[0x55] = 0x1; //PoE Disable - PWR_GpioPins[0x1E] = 0x1; //Aux/solar Disable - SX1509_regs[0x10] = 0x08; //Int Batt OFF, Ext batt ON + uint8_t index = 0x04; // Ext Batt availability + PWR_GpioPins[0x55] = 0x1; // PoE Disable + PWR_GpioPins[0x1E] = 0x1; // Aux/solar Disable + SX1509_regs[0x10] = 0x08; // Int Batt OFF, Ext batt ON SX1509_regs[0x11] = 0x00; pwr_source_init(); @@ -291,10 +291,10 @@ void test_pwr_process_get_status_parameters_data_extavailable(void) void test_pwr_process_get_status_parameters_data_extaccessible(void) { uint8_t powerStatus = 0; - uint8_t index = 0x05; //Ext Batt accessibility - PWR_GpioPins[0x55] = 0x1; //PoE Disable - PWR_GpioPins[0x1E] = 0x1; //Aux/solar Disable - SX1509_regs[0x10] = 0x08; //Int Batt OFF, Ext batt ON + uint8_t index = 0x05; // Ext Batt accessibility + PWR_GpioPins[0x55] = 0x1; // PoE Disable + PWR_GpioPins[0x1E] = 0x1; // Aux/solar Disable + SX1509_regs[0x10] = 0x08; // Int Batt OFF, Ext batt ON SX1509_regs[0x11] = 0x00; pwr_source_init(); @@ -307,10 +307,10 @@ void test_pwr_process_get_status_parameters_data_extaccessible(void) void test_pwr_process_get_status_parameters_data_intavailable(void) { uint8_t powerStatus = 0; - uint8_t index = 0x06; //Int Batt Availability - PWR_GpioPins[0x55] = 0x1; //PoE Disable - PWR_GpioPins[0x1E] = 0x1; //Aux/solar Disable - SX1509_regs[0x10] = 0x10; //Ext Batt OFF, Int batt ON + uint8_t index = 0x06; // Int Batt Availability + PWR_GpioPins[0x55] = 0x1; // PoE Disable + PWR_GpioPins[0x1E] = 0x1; // Aux/solar Disable + SX1509_regs[0x10] = 0x10; // Ext Batt OFF, Int batt ON SX1509_regs[0x11] = 0x00; pwr_source_init(); @@ -323,10 +323,10 @@ void test_pwr_process_get_status_parameters_data_intavailable(void) void test_pwr_process_get_status_parameters_data_intaccessible(void) { uint8_t powerStatus = 0; - uint8_t index = 0x07; //Int Batt Accessibility - PWR_GpioPins[0x55] = 0x1; //PoE Disable - PWR_GpioPins[0x1E] = 0x1; //Aux/solar Disable - SX1509_regs[0x10] = 0x10; //Ext Batt OFF, Int batt ON + uint8_t index = 0x07; // Int Batt Accessibility + PWR_GpioPins[0x55] = 0x1; // PoE Disable + PWR_GpioPins[0x1E] = 0x1; // Aux/solar Disable + SX1509_regs[0x10] = 0x10; // Ext Batt OFF, Int batt ON SX1509_regs[0x11] = 0x00; pwr_source_init(); diff --git a/firmware/ec/test/suites/Test_se98a.c b/firmware/ec/test/suites/Test_se98a.c index 4d06780904..7e475d8cfa 100644 --- a/firmware/ec/test/suites/Test_se98a.c +++ b/firmware/ec/test/suites/Test_se98a.c @@ -24,23 +24,23 @@ static OcGpio_Port s_fake_io_port = { static SE98A_Dev s_dev = { .cfg = - { - .dev = - { - .bus = 3, - .slave_addr = 0x1A, - }, - }, + { + .dev = + { + .bus = 3, + .slave_addr = 0x1A, + }, + }, }; static SE98A_Dev s_invalid = { .cfg = - { - .dev = - { - .bus = 3, - .slave_addr = 0xFF, - }, - }, + { + .dev = + { + .bus = 3, + .slave_addr = 0xFF, + }, + }, }; static uint16_t SE98A_regs[] = { @@ -119,10 +119,10 @@ void test_se98a_init(void) /* Now try to init with a pin associated */ SE98A_Dev alerted_dev = { .cfg = - { - .dev = s_dev.cfg.dev, - .pin_evt = &(OcGpio_Pin){ &s_fake_io_port, 5 }, - }, + { + .dev = s_dev.cfg.dev, + .pin_evt = &(OcGpio_Pin){ &s_fake_io_port, 5 }, + }, }; TEST_ASSERT_EQUAL(RETURN_OK, se98a_init(&alerted_dev)); } @@ -169,22 +169,22 @@ void test_se98a_alerts(void) /* Now try to init with a pin associated */ SE98A_Dev alerted_dev = { .cfg = - { - .dev = s_dev.cfg.dev, - .pin_evt = &(OcGpio_Pin){ &s_fake_io_port, 5 }, - }, + { + .dev = s_dev.cfg.dev, + .pin_evt = &(OcGpio_Pin){ &s_fake_io_port, 5 }, + }, }; TEST_ASSERT_EQUAL(RETURN_OK, se98a_init(&alerted_dev)); TEST_ASSERT_EQUAL( - RETURN_OK, - se98a_set_limit(&alerted_dev, CONF_TEMP_SE98A_LOW_LIMIT_REG, -10)); + RETURN_OK, + se98a_set_limit(&alerted_dev, CONF_TEMP_SE98A_LOW_LIMIT_REG, -10)); TEST_ASSERT_EQUAL( - RETURN_OK, - se98a_set_limit(&alerted_dev, CONF_TEMP_SE98A_HIGH_LIMIT_REG, 75)); - TEST_ASSERT_EQUAL(RETURN_OK, - se98a_set_limit(&alerted_dev, - CONF_TEMP_SE98A_CRITICAL_LIMIT_REG, 80)); + RETURN_OK, + se98a_set_limit(&alerted_dev, CONF_TEMP_SE98A_HIGH_LIMIT_REG, 75)); + TEST_ASSERT_EQUAL( + RETURN_OK, + se98a_set_limit(&alerted_dev, CONF_TEMP_SE98A_CRITICAL_LIMIT_REG, 80)); se98a_set_alert_handler(&alerted_dev, alert_handler, NULL); s_task_sleep_ticks = 0; TEST_ASSERT_EQUAL(RETURN_OK, se98a_enable_alerts(&alerted_dev)); diff --git a/firmware/ec/test/suites/Test_sx1509.c b/firmware/ec/test/suites/Test_sx1509.c index 0ffd0f5763..c165d4a112 100644 --- a/firmware/ec/test/suites/Test_sx1509.c +++ b/firmware/ec/test/suites/Test_sx1509.c @@ -171,13 +171,13 @@ void test_ioexp_led_input(void) uint8_t input_val = 0xff; SX1509_regs[0x11] = 0xF2; - TEST_ASSERT_EQUAL(RETURN_OK, ioexp_led_get_data(&s_sx1509_dev, SX1509_REG_A, - &input_val)); + TEST_ASSERT_EQUAL( + RETURN_OK, ioexp_led_get_data(&s_sx1509_dev, SX1509_REG_A, &input_val)); TEST_ASSERT_EQUAL_HEX8(0xF2, input_val); SX1509_regs[0x10] = 0x04; - TEST_ASSERT_EQUAL(RETURN_OK, ioexp_led_get_data(&s_sx1509_dev, SX1509_REG_B, - &input_val)); + TEST_ASSERT_EQUAL( + RETURN_OK, ioexp_led_get_data(&s_sx1509_dev, SX1509_REG_B, &input_val)); TEST_ASSERT_EQUAL_HEX8(0x04, input_val); } @@ -191,8 +191,8 @@ void test_ioexp_led_output(void) &output_val)); TEST_ASSERT_EQUAL_HEX8(0x0C, output_val); - TEST_ASSERT_EQUAL(RETURN_OK, ioexp_led_set_data(&s_sx1509_dev, SX1509_REG_A, - 0xAA, 0x00)); + TEST_ASSERT_EQUAL( + RETURN_OK, ioexp_led_set_data(&s_sx1509_dev, SX1509_REG_A, 0xAA, 0x00)); TEST_ASSERT_EQUAL_HEX8(0xAA, SX1509_regs[0x11]); TEST_ASSERT_EQUAL(RETURN_OK, ioexp_led_get_data(&s_sx1509_dev, SX1509_REG_A, @@ -228,8 +228,8 @@ void test_ioexp_led_inputbuffer(void) { /* Test setting input buffer values */ TEST_ASSERT_EQUAL(RETURN_OK, ioexp_led_config_inputbuffer( - &s_sx1509_dev, SX1509_REG_AB, 0x55, - 0xAA)); // LSB(Reg A), LSB(Reg B) + &s_sx1509_dev, SX1509_REG_AB, 0x55, + 0xAA)); // LSB(Reg A), LSB(Reg B) TEST_ASSERT_EQUAL_HEX8(0x55, SX1509_regs[0x01]); // Reg A TEST_ASSERT_EQUAL_HEX8(0xAA, SX1509_regs[0x00]); // Reg B @@ -242,9 +242,9 @@ void test_ioexp_led_inputbuffer(void) void test_ioexp_led_pullup(void) { /* Test setting pull up values */ - TEST_ASSERT_EQUAL(RETURN_OK, ioexp_led_config_pullup( - &s_sx1509_dev, SX1509_REG_AB, 0x27, - 0x82)); // LSB(Reg A), MSB(Reg B) + TEST_ASSERT_EQUAL( + RETURN_OK, ioexp_led_config_pullup(&s_sx1509_dev, SX1509_REG_AB, 0x27, + 0x82)); // LSB(Reg A), MSB(Reg B) TEST_ASSERT_EQUAL_HEX8(0x27, SX1509_regs[0x07]); // Reg A TEST_ASSERT_EQUAL_HEX8(0x82, SX1509_regs[0x06]); // Reg B @@ -257,9 +257,9 @@ void test_ioexp_led_pullup(void) void test_ioexp_led_pulldown(void) { /* Test setting pull down values */ - TEST_ASSERT_EQUAL(RETURN_OK, ioexp_led_config_pulldown( - &s_sx1509_dev, SX1509_REG_AB, 0x32, - 0x5F)); // LSB(Reg A), MSB(Reg B) + TEST_ASSERT_EQUAL( + RETURN_OK, ioexp_led_config_pulldown(&s_sx1509_dev, SX1509_REG_AB, 0x32, + 0x5F)); // LSB(Reg A), MSB(Reg B) TEST_ASSERT_EQUAL_HEX8(0x32, SX1509_regs[0x09]); // Reg A TEST_ASSERT_EQUAL_HEX8(0x5F, SX1509_regs[0x08]); // Reg B @@ -273,8 +273,8 @@ void test_ioexp_led_opendrain(void) { /* Test setting open drain values */ TEST_ASSERT_EQUAL(RETURN_OK, ioexp_led_config_opendrain( - &s_sx1509_dev, SX1509_REG_AB, 0x45, - 0x54)); // LSB(Reg A), MSB(Reg B) + &s_sx1509_dev, SX1509_REG_AB, 0x45, + 0x54)); // LSB(Reg A), MSB(Reg B) TEST_ASSERT_EQUAL_HEX8(0x45, SX1509_regs[0x0B]); // Reg A TEST_ASSERT_EQUAL_HEX8(0x54, SX1509_regs[0x0A]); // Reg B @@ -288,23 +288,23 @@ void test_ioexp_led_data_direction(void) { /* Test setting data direction values */ TEST_ASSERT_EQUAL(RETURN_OK, ioexp_led_config_data_direction( - &s_sx1509_dev, SX1509_REG_AB, 0xAB, - 0xD9)); // LSB(Reg A), MSB(Reg B) + &s_sx1509_dev, SX1509_REG_AB, 0xAB, + 0xD9)); // LSB(Reg A), MSB(Reg B) TEST_ASSERT_EQUAL_HEX8(0xAB, SX1509_regs[0x0F]); // Reg A TEST_ASSERT_EQUAL_HEX8(0xD9, SX1509_regs[0x0E]); // Reg B TEST_ASSERT_EQUAL(RETURN_OK, ioexp_led_config_data_direction( - &s_sx1509_dev, SX1509_REG_B, 0x98, - 0x00)); // Reg A + &s_sx1509_dev, SX1509_REG_B, 0x98, + 0x00)); // Reg A TEST_ASSERT_EQUAL_HEX8(0x98, SX1509_regs[0x0E]); } void test_ioexp_led_polarity(void) { /* Test setting polarity values */ - TEST_ASSERT_EQUAL(RETURN_OK, ioexp_led_config_polarity( - &s_sx1509_dev, SX1509_REG_AB, 0x67, - 0xCD)); // LSB(Reg A), MSB(Reg B) + TEST_ASSERT_EQUAL( + RETURN_OK, ioexp_led_config_polarity(&s_sx1509_dev, SX1509_REG_AB, 0x67, + 0xCD)); // LSB(Reg A), MSB(Reg B) TEST_ASSERT_EQUAL_HEX8(0x67, SX1509_regs[0x0D]); // Reg A TEST_ASSERT_EQUAL_HEX8(0xCD, SX1509_regs[0x0C]); // Reg B @@ -317,56 +317,54 @@ void test_ioexp_led_polarity(void) void test_ioexp_led_clock(void) { /* Test setting clock settings */ - TEST_ASSERT_EQUAL(RETURN_OK, - ioexp_led_config_clock(&s_sx1509_dev, - SX1509_INTERNAL_CLOCK_2MHZ, - SX1509_CLOCK_OSC_IN)); - TEST_ASSERT_EQUAL_HEX8(0x40, SX1509_regs[0x1E]); //0100 0000 + TEST_ASSERT_EQUAL(RETURN_OK, ioexp_led_config_clock( + &s_sx1509_dev, SX1509_INTERNAL_CLOCK_2MHZ, + SX1509_CLOCK_OSC_IN)); + TEST_ASSERT_EQUAL_HEX8(0x40, SX1509_regs[0x1E]); // 0100 0000 TEST_ASSERT_EQUAL(RETURN_OK, ioexp_led_config_clock(&s_sx1509_dev, SX1509_EXTERNAL_CLOCK, SX1509_CLOCK_OSC_IN)); - TEST_ASSERT_EQUAL_HEX8(0x20, SX1509_regs[0x1E]); //0010 0000 + TEST_ASSERT_EQUAL_HEX8(0x20, SX1509_regs[0x1E]); // 0010 0000 - TEST_ASSERT_EQUAL(RETURN_OK, - ioexp_led_config_clock(&s_sx1509_dev, - SX1509_INTERNAL_CLOCK_2MHZ, - SX1509_CLOCK_OSC_OUT)); - TEST_ASSERT_EQUAL_HEX8(0x50, SX1509_regs[0x1E]); //0101 0000 + TEST_ASSERT_EQUAL(RETURN_OK, ioexp_led_config_clock( + &s_sx1509_dev, SX1509_INTERNAL_CLOCK_2MHZ, + SX1509_CLOCK_OSC_OUT)); + TEST_ASSERT_EQUAL_HEX8(0x50, SX1509_regs[0x1E]); // 0101 0000 - //How to configure clock frequency on OSCOUT pin? + // How to configure clock frequency on OSCOUT pin? } void test_ioexp_led_misc(void) { /* Test setting misc settings */ TEST_ASSERT_EQUAL( - RETURN_OK, - ioexp_led_config_misc(&s_sx1509_dev, - 0x24)); //Clkx-1MHz, Fading-Linear(Bank A, B) + RETURN_OK, + ioexp_led_config_misc(&s_sx1509_dev, + 0x24)); // Clkx-1MHz, Fading-Linear(Bank A, B) TEST_ASSERT_EQUAL_HEX8(0x24, SX1509_regs[0x1F]); - TEST_ASSERT_EQUAL(RETURN_OK, - ioexp_led_config_misc( - &s_sx1509_dev, - 0x54)); //Clkx-125KHz, Fading-Linear(Bank A, B) - TEST_ASSERT_EQUAL_HEX8(0x54, SX1509_regs[0x1F]); //0010 0000 + TEST_ASSERT_EQUAL( + RETURN_OK, + ioexp_led_config_misc(&s_sx1509_dev, + 0x54)); // Clkx-125KHz, Fading-Linear(Bank A, B) + TEST_ASSERT_EQUAL_HEX8(0x54, SX1509_regs[0x1F]); // 0010 0000 - TEST_ASSERT_EQUAL(RETURN_OK, - ioexp_led_config_misc( - &s_sx1509_dev, - 0xAC)); //Clkx-1MHz, Fading-Loarithmic(Bank A, B) - TEST_ASSERT_EQUAL_HEX8(0xAC, SX1509_regs[0x1F]); //0101 0000 + TEST_ASSERT_EQUAL( + RETURN_OK, + ioexp_led_config_misc(&s_sx1509_dev, + 0xAC)); // Clkx-1MHz, Fading-Loarithmic(Bank A, B) + TEST_ASSERT_EQUAL_HEX8(0xAC, SX1509_regs[0x1F]); // 0101 0000 - //How to configure multiple things on RegMisc settings? + // How to configure multiple things on RegMisc settings? } void test_ioexp_led_enable_leddriver(void) { /* Test setting led driver values */ TEST_ASSERT_EQUAL(RETURN_OK, ioexp_led_enable_leddriver( - &s_sx1509_dev, SX1509_REG_AB, 0x52, - 0xF8)); // LSB(Reg A), MSB(Reg B) + &s_sx1509_dev, SX1509_REG_AB, 0x52, + 0xF8)); // LSB(Reg A), MSB(Reg B) TEST_ASSERT_EQUAL_HEX8(0x52, SX1509_regs[0x21]); // Reg A TEST_ASSERT_EQUAL_HEX8(0xF8, SX1509_regs[0x20]); // Reg B @@ -396,8 +394,8 @@ void test_ioexp_led_interrupt(void) { /* Test setting interrupt values */ TEST_ASSERT_EQUAL(RETURN_OK, ioexp_led_config_interrupt( - &s_sx1509_dev, SX1509_REG_AB, 0x27, - 0x28)); // LSB(Reg A), MSB(Reg B) + &s_sx1509_dev, SX1509_REG_AB, 0x27, + 0x28)); // LSB(Reg A), MSB(Reg B) TEST_ASSERT_EQUAL_HEX8(0x27, SX1509_regs[0x13]); // Reg A TEST_ASSERT_EQUAL_HEX8(0x28, SX1509_regs[0x12]); // Reg B @@ -412,8 +410,8 @@ void test_ioexp_led_edge_sense_A(void) /* Test setting Edge sense A values */ /* Rising edge */ TEST_ASSERT_EQUAL(RETURN_OK, ioexp_led_config_edge_sense_A( - &s_sx1509_dev, SX1509_REG_AB, 0x55, - 0x55)); // Low(Reg A), High(Reg A) + &s_sx1509_dev, SX1509_REG_AB, 0x55, + 0x55)); // Low(Reg A), High(Reg A) TEST_ASSERT_EQUAL_HEX8(0x55, SX1509_regs[0x17]); // Low Reg A TEST_ASSERT_EQUAL_HEX8(0x55, SX1509_regs[0x16]); // High Reg A @@ -435,8 +433,8 @@ void test_ioexp_led_edge_sense_B(void) /* Test setting Edge sense A values */ /* Falling edge */ TEST_ASSERT_EQUAL(RETURN_OK, ioexp_led_config_edge_sense_B( - &s_sx1509_dev, SX1509_REG_AB, 0xAA, - 0xAA)); // Low(Reg B), High(Reg B) + &s_sx1509_dev, SX1509_REG_AB, 0xAA, + 0xAA)); // Low(Reg B), High(Reg B) TEST_ASSERT_EQUAL_HEX8(0xAA, SX1509_regs[0x15]); // Low Reg B TEST_ASSERT_EQUAL_HEX8(0xAA, SX1509_regs[0x14]); // High Reg B @@ -470,9 +468,9 @@ void test_ioexp_led_debounce_time(void) void test_ioexp_led_enable_debounce(void) { /* Test enabling debounce values */ - TEST_ASSERT_EQUAL(RETURN_OK, ioexp_led_enable_debounce( - &s_sx1509_dev, SX1509_REG_AB, 0x4B, - 0x2C)); // LSB(Reg A), MSB(Reg B) + TEST_ASSERT_EQUAL( + RETURN_OK, ioexp_led_enable_debounce(&s_sx1509_dev, SX1509_REG_AB, 0x4B, + 0x2C)); // LSB(Reg A), MSB(Reg B) TEST_ASSERT_EQUAL_HEX8(0x4B, SX1509_regs[0x24]); // Reg A TEST_ASSERT_EQUAL_HEX8(0x2C, SX1509_regs[0x23]); // Reg B @@ -486,14 +484,14 @@ void test_ioexp_led_interrupt_source(void) { /* Test getting interrupt source values */ uint16_t intPins = 0xffff; - SX1509_regs[0X18] = 0x5F; //MSB - SX1509_regs[0X19] = 0X7C; //LSB + SX1509_regs[0X18] = 0x5F; // MSB + SX1509_regs[0X19] = 0X7C; // LSB TEST_ASSERT_EQUAL(RETURN_OK, ioexp_led_get_interrupt_source(&s_sx1509_dev, &intPins)); TEST_ASSERT_EQUAL_HEX16(0x5F7C, intPins); - SX1509_regs[0X18] = 0xAA; //MSB - SX1509_regs[0X19] = 0X55; //LSB + SX1509_regs[0X18] = 0xAA; // MSB + SX1509_regs[0X19] = 0X55; // LSB TEST_ASSERT_EQUAL(RETURN_OK, ioexp_led_get_interrupt_source(&s_sx1509_dev, &intPins)); TEST_ASSERT_EQUAL_HEX16(0xAA55, intPins); @@ -504,8 +502,8 @@ void test_ioexp_led_clear_interrupt_source(void) /* Test clearing interrupt source values */ TEST_ASSERT_EQUAL(RETURN_OK, ioexp_led_clear_interrupt_source(&s_sx1509_dev)); - TEST_ASSERT_EQUAL_HEX8(0xFF, SX1509_regs[0x18]); //MSB - TEST_ASSERT_EQUAL_HEX8(0xFF, SX1509_regs[0x19]); //LSB + TEST_ASSERT_EQUAL_HEX8(0xFF, SX1509_regs[0x18]); // MSB + TEST_ASSERT_EQUAL_HEX8(0xFF, SX1509_regs[0x19]); // LSB } void test_ioexp_led_not_present(void) @@ -516,11 +514,11 @@ void test_ioexp_led_not_present(void) /* Ensure that we fail properly if the device isn't on the bus */ uint8_t dummy_val; TEST_ASSERT_EQUAL( - RETURN_NOTOK, - ioexp_led_get_data(&invalid_dev, SX1509_REG_A, &dummy_val)); + RETURN_NOTOK, + ioexp_led_get_data(&invalid_dev, SX1509_REG_A, &dummy_val)); TEST_ASSERT_EQUAL( - RETURN_NOTOK, - ioexp_led_set_data(&invalid_dev, SX1509_REG_A, dummy_val, 0x00)); + RETURN_NOTOK, + ioexp_led_set_data(&invalid_dev, SX1509_REG_A, dummy_val, 0x00)); TEST_ASSERT_EQUAL(RETURN_NOTOK, ioexp_led_set_on_time(&invalid_dev, 0, dummy_val)); TEST_ASSERT_EQUAL(RETURN_NOTOK, @@ -529,21 +527,21 @@ void test_ioexp_led_not_present(void) TEST_ASSERT_EQUAL(RETURN_NOTOK, ioexp_led_config_inputbuffer(&invalid_dev, SX1509_REG_A, dummy_val, 0x00)); - TEST_ASSERT_EQUAL(RETURN_NOTOK, - ioexp_led_config_pullup(&invalid_dev, SX1509_REG_A, - dummy_val, 0x00)); - TEST_ASSERT_EQUAL(RETURN_NOTOK, - ioexp_led_config_pulldown(&invalid_dev, SX1509_REG_A, - dummy_val, 0x00)); + TEST_ASSERT_EQUAL( + RETURN_NOTOK, + ioexp_led_config_pullup(&invalid_dev, SX1509_REG_A, dummy_val, 0x00)); + TEST_ASSERT_EQUAL( + RETURN_NOTOK, + ioexp_led_config_pulldown(&invalid_dev, SX1509_REG_A, dummy_val, 0x00)); TEST_ASSERT_EQUAL(RETURN_NOTOK, ioexp_led_config_opendrain(&invalid_dev, SX1509_REG_A, dummy_val, 0x00)); TEST_ASSERT_EQUAL(RETURN_NOTOK, ioexp_led_config_data_direction( - &invalid_dev, SX1509_REG_A, dummy_val, 0x00)); - TEST_ASSERT_EQUAL(RETURN_NOTOK, - ioexp_led_config_polarity(&invalid_dev, SX1509_REG_A, - dummy_val, 0x00)); + &invalid_dev, SX1509_REG_A, dummy_val, 0x00)); + TEST_ASSERT_EQUAL( + RETURN_NOTOK, + ioexp_led_config_polarity(&invalid_dev, SX1509_REG_A, dummy_val, 0x00)); TEST_ASSERT_EQUAL(RETURN_NOTOK, ioexp_led_config_clock(&invalid_dev, 0, 1)); TEST_ASSERT_EQUAL(RETURN_NOTOK, ioexp_led_config_misc(&invalid_dev, dummy_val)); @@ -563,12 +561,11 @@ void test_ioexp_led_not_present(void) dummy_val, 0x00)); TEST_ASSERT_EQUAL(RETURN_NOTOK, ioexp_led_config_debounce_time(&invalid_dev, 0)); - TEST_ASSERT_EQUAL(RETURN_NOTOK, - ioexp_led_enable_debounce(&invalid_dev, SX1509_REG_A, - dummy_val, 0x00)); - TEST_ASSERT_EQUAL(RETURN_NOTOK, - ioexp_led_get_interrupt_source(&invalid_dev, - (uint16_t *)&dummy_val)); + TEST_ASSERT_EQUAL( + RETURN_NOTOK, + ioexp_led_enable_debounce(&invalid_dev, SX1509_REG_A, dummy_val, 0x00)); + TEST_ASSERT_EQUAL(RETURN_NOTOK, ioexp_led_get_interrupt_source( + &invalid_dev, (uint16_t *)&dummy_val)); TEST_ASSERT_EQUAL(RETURN_NOTOK, ioexp_led_clear_interrupt_source(&invalid_dev)); } From 4e4581357dfaeb62cfd3c46f9076e1eb2388c4be Mon Sep 17 00:00:00 2001 From: mdlewisfb Date: Tue, 23 Oct 2018 12:50:56 -0700 Subject: [PATCH 5/5] Rebasing and rerunning linter --- firmware/ec/.clang-format | 2 +- firmware/ec/common/inc/global/Framework.h | 2 +- firmware/ec/common/inc/global/ocmp_frame.h | 14 +- firmware/ec/common/inc/global/post_frame.h | 6 +- firmware/ec/inc/common/global_header.h | 4 +- firmware/ec/inc/devices/eeprom.h | 4 +- firmware/ec/inc/devices/ext_battery.h | 18 +-- firmware/ec/inc/devices/ina226.h | 18 +-- firmware/ec/inc/devices/int_battery.h | 12 +- firmware/ec/inc/devices/ltc4015.h | 50 +++---- firmware/ec/inc/devices/ltc4275.h | 4 +- firmware/ec/inc/devices/powerSource.h | 4 +- firmware/ec/inc/utils/util.h | 2 +- firmware/ec/src/bigbrother.c | 12 +- firmware/ec/src/devices/adt7481.c | 32 ++--- firmware/ec/src/devices/g510.c | 6 +- firmware/ec/src/devices/i2c/XR20M1170.c | 2 +- firmware/ec/src/devices/i2c/XR20M1170.h | 14 +- .../ec/src/devices/i2c/XR20M1170_Registers.h | 38 +++--- firmware/ec/src/devices/i2c/threaded_int.c | 4 +- firmware/ec/src/devices/ina226.c | 6 +- firmware/ec/src/devices/led.c | 28 ++-- firmware/ec/src/devices/sbdn9603.c | 6 +- firmware/ec/src/devices/se98a.c | 16 +-- firmware/ec/src/devices/sx1509.c | 126 +++++++++--------- firmware/ec/src/devices/uart/UartMon.h | 4 +- firmware/ec/src/devices/uart/at_cmd.c | 2 +- firmware/ec/src/devices/uart/gsm.h | 10 +- firmware/ec/src/devices/uart/sbd.h | 10 +- firmware/ec/src/drivers/GpioSX1509.c | 6 +- firmware/ec/src/drivers/OcGpio.h | 6 +- firmware/ec/src/interfaces/USB/usbcdcd.c | 70 +++++----- firmware/ec/src/registry/SSRegistry.c | 4 +- firmware/ec/src/subsystem/obc/obc.c | 2 +- firmware/ec/src/utils/util.c | 2 +- firmware/ec/test/suites/Test_eeprom.c | 2 +- firmware/ec/test/suites/Test_ina226.c | 4 +- firmware/ec/test/suites/Test_powerSource.c | 16 +-- firmware/ec/test/suites/Test_sx1509.c | 16 +-- 39 files changed, 294 insertions(+), 290 deletions(-) diff --git a/firmware/ec/.clang-format b/firmware/ec/.clang-format index 50c72d789d..f8f95f83ad 100644 --- a/firmware/ec/.clang-format +++ b/firmware/ec/.clang-format @@ -15,7 +15,7 @@ AlignConsecutiveAssignments: false AlignConsecutiveDeclarations: false AlignEscapedNewlinesLeft: true AlignOperands: true -AlignTrailingComments: false +AlignTrailingComments: true AllowAllParametersOfDeclarationOnNextLine: false AllowShortBlocksOnASingleLine: false AllowShortCaseLabelsOnASingleLine: false diff --git a/firmware/ec/common/inc/global/Framework.h b/firmware/ec/common/inc/global/Framework.h index 84ffcb1223..1011d74a70 100644 --- a/firmware/ec/common/inc/global/Framework.h +++ b/firmware/ec/common/inc/global/Framework.h @@ -121,7 +121,7 @@ typedef struct Driver { } Driver; typedef struct SSHookSet { - ssHook_Cb preInitFxn; /* Function will run before post is executed */ + ssHook_Cb preInitFxn; /* Function will run before post is executed */ ssHook_Cb postInitFxn; /* Function will run after post is executed */ } SSHookSet; diff --git a/firmware/ec/common/inc/global/ocmp_frame.h b/firmware/ec/common/inc/global/ocmp_frame.h index a7c5e1f782..e90e0f18ad 100644 --- a/firmware/ec/common/inc/global/ocmp_frame.h +++ b/firmware/ec/common/inc/global/ocmp_frame.h @@ -52,8 +52,8 @@ typedef enum { typedef enum { OCMP_COMM_IFACE_UART = 1, // Uart - 1 OCMP_COMM_IFACE_ETHERNET, // Ethernet - 2 - OCMP_COMM_IFACE_SBD, // SBD(Satellite) - 3 - OCMP_COMM_IFACE_USB // Usb - 4 + OCMP_COMM_IFACE_SBD, // SBD(Satellite) - 3 + OCMP_COMM_IFACE_USB // Usb - 4 } OCMPInterface; /* @@ -145,21 +145,21 @@ typedef enum { OCMP_DEBUG_READ = 1, OCMP_DEBUG_WRITE } eOCMPDebugOperation; * Source Interface, Sequence number, and timestamp. */ typedef struct __attribute__((packed, aligned(1))) { - uint8_t ocmpSof; // SOF - It must be 0x55 + uint8_t ocmpSof; // SOF - It must be 0x55 uint8_t ocmpFrameLen; // Framelen - tells about the configuration size ONLY. OCMPInterface ocmpInterface; // Interface - UART/Ethernet/SBD - uint32_t ocmpSeqNumber; // SeqNo - Don't know!!! - uint32_t ocmpTimestamp; // Timestamp - When AP sent the command? + uint32_t ocmpSeqNumber; // SeqNo - Don't know!!! + uint32_t ocmpTimestamp; // Timestamp - When AP sent the command? } OCMPHeader; /* * This is the Message structure for Subsystem level information */ typedef struct __attribute__((packed, aligned(1))) { - OC_SS subsystem; // RF/GPP/BMS/Watchdog etc.. + OC_SS subsystem; // RF/GPP/BMS/Watchdog etc.. uint8_t componentID; // Compononent ID. Different for different subsystem. OCMPMsgType - msgtype; // Msg type is Config/Status/Alert/Command/Watchdog/Debug + msgtype; // Msg type is Config/Status/Alert/Command/Watchdog/Debug uint8_t action; // Action is - Get/Set/Reply. uint16_t parameters; // List of Parameters to be set or get. #ifndef OCWARE_HOST diff --git a/firmware/ec/common/inc/global/post_frame.h b/firmware/ec/common/inc/global/post_frame.h index 46e38ba73f..b3aedad587 100644 --- a/firmware/ec/common/inc/global/post_frame.h +++ b/firmware/ec/common/inc/global/post_frame.h @@ -41,9 +41,9 @@ typedef struct __attribute__((packed, aligned(1))) { } POSTData; /***************************************************************************** - * FUNCTION PROTOTYPES + * FUNCTION PROTOTYPES *****************************************************************************/ -void post_update_POSTData(POSTData *pData, uint8_t I2CBus, uint8_t devAddress, - uint16_t manId, uint16_t devId); +void post_update_POSTData(POSTData *pData, uint8_t I2CBus, uint8_t devAddress, + uint16_t manId, uint16_t devId); #endif /* POST_FRAME_H_ */ diff --git a/firmware/ec/inc/common/global_header.h b/firmware/ec/inc/common/global_header.h index 1d519ff5c2..3a362b632e 100644 --- a/firmware/ec/inc/common/global_header.h +++ b/firmware/ec/inc/common/global_header.h @@ -62,9 +62,9 @@ #else # define DEBUG(...) // -# define LOGGER(...) // +# define LOGGER(...) // # define LOGGER_WARNING(...) // -# define LOGGER_ERROR(...) // +# define LOGGER_ERROR(...) // # ifdef DEBUG_LOGS # define LOGGER_DEBUG(...) // # endif diff --git a/firmware/ec/inc/devices/eeprom.h b/firmware/ec/inc/devices/eeprom.h index 99e04ed7b2..f1e31a5638 100644 --- a/firmware/ec/inc/devices/eeprom.h +++ b/firmware/ec/inc/devices/eeprom.h @@ -47,8 +47,8 @@ typedef struct Eeprom_Cfg { I2C_Dev i2c_dev; OcGpio_Pin *pin_wp; EepromDev_Cfg type; /*!< Device specific config (page size, etc) */ - OCMPSubsystem ss; /* TODO: The HW config need not know about the subsytem - to be fixed later */ + OCMPSubsystem ss; /* TODO: The HW config need not know about the subsytem + to be fixed later */ } Eeprom_Cfg, *Eeprom_Handle; typedef enum { diff --git a/firmware/ec/inc/devices/ext_battery.h b/firmware/ec/inc/devices/ext_battery.h index fa1f80ea47..5f1373c629 100644 --- a/firmware/ec/inc/devices/ext_battery.h +++ b/firmware/ec/inc/devices/ext_battery.h @@ -21,19 +21,19 @@ * External Battery Temperature sensors Low, High and Critical Temeprature Alert * Limits */ -#define PWR_EXT_BATT_TEMP_LOW_LIMIT -20 //(in Celcius) -#define PWR_EXT_BATT_TEMP_HIGH_LIMIT 75 //(in Celcius) +#define PWR_EXT_BATT_TEMP_LOW_LIMIT -20 //(in Celcius) +#define PWR_EXT_BATT_TEMP_HIGH_LIMIT 75 //(in Celcius) #define PWR_EXT_BATT_TEMP_CRITICAL_LIMIT 80 //(in Celcius) #define PWR_EXT_BATT_DIE_TEMP_LIMIT 60 /* Config parameters for External battery charger */ -#define PWR_EXTBATT_ICHARGE_VAL 10660 // milliAmps -#define PWR_EXTBATT_VCHARGE_VAL 12000 // milliVolts -#define PWR_EXTBATT_UNDERVOLTAGE_VAL 9500 // milliVolts -#define PWR_EXTBATT_OVERVOLTAGE_VAL 13800 // milliVolts +#define PWR_EXTBATT_ICHARGE_VAL 10660 // milliAmps +#define PWR_EXTBATT_VCHARGE_VAL 12000 // milliVolts +#define PWR_EXTBATT_UNDERVOLTAGE_VAL 9500 // milliVolts +#define PWR_EXTBATT_OVERVOLTAGE_VAL 13800 // milliVolts #define PWR_EXTBATT_INPUTBATTUNDERVOLATGE_VAL 16200 // milliVolts -#define PWR_EXTBATT_INPUTHICURRENT_VAL 17000 // milliAmps -#define PWR_EXTBATT_LOWBATTCURRENT_VAL 100 // milliAmps -#define PWR_EXTBATT_INPUTCURRENTLIMIT_VAL 16500 // milliAmps +#define PWR_EXTBATT_INPUTHICURRENT_VAL 17000 // milliAmps +#define PWR_EXTBATT_LOWBATTCURRENT_VAL 100 // milliAmps +#define PWR_EXTBATT_INPUTCURRENTLIMIT_VAL 16500 // milliAmps #endif /* EXT_BATTERY_H_ */ diff --git a/firmware/ec/inc/devices/ina226.h b/firmware/ec/inc/devices/ina226.h index eec869969b..1924a5938d 100644 --- a/firmware/ec/inc/devices/ina226.h +++ b/firmware/ec/inc/devices/ina226.h @@ -21,11 +21,11 @@ *****************************************************************************/ /* Mask/Enable Register Bits */ #define INA_ALERT_EN_MASK 0xF800 /* Upper 5 bits are the enable bits */ -#define INA_MSK_SOL (1 << 15) /* Shunt over-voltage */ -#define INA_MSK_SUL (1 << 14) /* Shunt under-voltage */ -#define INA_MSK_BOL (1 << 13) /* Bus over-voltage */ -#define INA_MSK_BUL (1 << 12) /* Bus under-voltage */ -#define INA_MSK_POL (1 << 11) /* Power over limit */ +#define INA_MSK_SOL (1 << 15) /* Shunt over-voltage */ +#define INA_MSK_SUL (1 << 14) /* Shunt under-voltage */ +#define INA_MSK_BOL (1 << 13) /* Bus over-voltage */ +#define INA_MSK_BUL (1 << 12) /* Bus under-voltage */ +#define INA_MSK_POL (1 << 11) /* Power over limit */ #define INA_MSK_CNVR \ (1 << 10) /* Conversion ready - enable alert when \ * CVRF is set (ready for next conversion) */ @@ -33,10 +33,10 @@ #define INA_MSK_AFF \ (1 << 4) /* Alert Function Flag (caused by alert) \ * In latch mode, cleared on mask read */ -#define INA_MSK_CVRF \ - (1 << 3) /* Conversion Ready Flag, cleared when \ - * writing to cfg reg or mask read */ -#define INA_MSK_OVF (1 << 2) /* Math Overflow Flag (data may be invalid) */ +#define INA_MSK_CVRF \ + (1 << 3) /* Conversion Ready Flag, cleared when \ + * writing to cfg reg or mask read */ +#define INA_MSK_OVF (1 << 2) /* Math Overflow Flag (data may be invalid) */ #define INA_MSK_APOL (1 << 1) /* Alert Polarity (1 = invert, active high) */ #define INA_MSK_LEN \ (1 << 0) /* Alert Latch Enable \ diff --git a/firmware/ec/inc/devices/int_battery.h b/firmware/ec/inc/devices/int_battery.h index 8b5405ca47..abe6faf418 100644 --- a/firmware/ec/inc/devices/int_battery.h +++ b/firmware/ec/inc/devices/int_battery.h @@ -13,14 +13,14 @@ * MACRO DEFINITIONS *****************************************************************************/ #define PWR_INT_BATT_RSNSB 30 // milli ohms -#define PWR_INT_BATT_RSNSI 7 // milli ohms +#define PWR_INT_BATT_RSNSI 7 // milli ohms /* Config parameters for Internal battery charger */ -#define PWR_INTBATT_UNDERVOLTAGE_VAL 9000 // milliVolts -#define PWR_INTBATT_OVERVOLTAGE_VAL 12600 // milliVolts +#define PWR_INTBATT_UNDERVOLTAGE_VAL 9000 // milliVolts +#define PWR_INTBATT_OVERVOLTAGE_VAL 12600 // milliVolts #define PWR_INTBATT_INPUTUNDERVOLATGE_VAL 16200 // milliVolts -#define PWR_INTBATT_INPUTOVERCURRENT_VAL 5000 // milliAmps -#define PWR_INTBATT_LOWBATTERYCURRENT_VAL 100 // milliAmps -#define PWR_INTBATT_INPUTCURRENTLIMIT_VAL 5570 // milliAmps +#define PWR_INTBATT_INPUTOVERCURRENT_VAL 5000 // milliAmps +#define PWR_INTBATT_LOWBATTERYCURRENT_VAL 100 // milliAmps +#define PWR_INTBATT_INPUTCURRENTLIMIT_VAL 5570 // milliAmps #endif /* INT_BATTERY_H_ */ diff --git a/firmware/ec/inc/devices/ltc4015.h b/firmware/ec/inc/devices/ltc4015.h index a9e5196bbb..f0f22dbeba 100644 --- a/firmware/ec/inc/devices/ltc4015.h +++ b/firmware/ec/inc/devices/ltc4015.h @@ -25,20 +25,20 @@ #define LTC4015_ALERT_EN_MASK \ 0xFFFF /* Bits 15-0 are the enable bits(except bit 14) */ #define LTC4015_MSK_MSRV (1 << 15) /* Measurement system results valid */ -#define LTC4015_MSK_QCL (1 << 13) /* QCOUNT Low alert */ -#define LTC4015_MSK_QCH (1 << 12) /* QCOUNT High alert */ -#define LTC4015_MSK_BVL (1 << 11) /* Battery voltage Low alert */ -#define LTC4015_MSK_BVH (1 << 10) /* Battery voltage High alert */ -#define LTC4015_MSK_IVL (1 << 9) /* Input voltage Low alert */ -#define LTC4015_MSK_IVH (1 << 8) /* Input voltage High alert */ -#define LTC4015_MSK_SVL (1 << 7) /* System voltage Low alert */ -#define LTC4015_MSK_SVH (1 << 6) /* System voltage High alert */ -#define LTC4015_MSK_ICH (1 << 5) /* Input current High alert */ -#define LTC4015_MSK_BCL (1 << 4) /* Battery current Low alert */ -#define LTC4015_MSK_DTH (1 << 3) /* Die temperature High alert */ -#define LTC4015_MSK_BSRH (1 << 2) /* BSR High alert */ -#define LTC4015_MSK_NTCH (1 << 1) /* NTC ratio High alert */ -#define LTC4015_MSK_NTCL (1 << 0) /* NTC ratio Low alert */ +#define LTC4015_MSK_QCL (1 << 13) /* QCOUNT Low alert */ +#define LTC4015_MSK_QCH (1 << 12) /* QCOUNT High alert */ +#define LTC4015_MSK_BVL (1 << 11) /* Battery voltage Low alert */ +#define LTC4015_MSK_BVH (1 << 10) /* Battery voltage High alert */ +#define LTC4015_MSK_IVL (1 << 9) /* Input voltage Low alert */ +#define LTC4015_MSK_IVH (1 << 8) /* Input voltage High alert */ +#define LTC4015_MSK_SVL (1 << 7) /* System voltage Low alert */ +#define LTC4015_MSK_SVH (1 << 6) /* System voltage High alert */ +#define LTC4015_MSK_ICH (1 << 5) /* Input current High alert */ +#define LTC4015_MSK_BCL (1 << 4) /* Battery current Low alert */ +#define LTC4015_MSK_DTH (1 << 3) /* Die temperature High alert */ +#define LTC4015_MSK_BSRH (1 << 2) /* BSR High alert */ +#define LTC4015_MSK_NTCH (1 << 1) /* NTC ratio High alert */ +#define LTC4015_MSK_NTCL (1 << 0) /* NTC ratio Low alert */ #define LTC4015_MSK_BMFA (1 << 1) /* Battery Missing Fault alert */ @@ -59,17 +59,17 @@ typedef enum LTC4015_Chem { typedef enum LTC4015_Event { LTC4015_EVT_MSRV = LTC4015_MSK_MSRV, /* Measurement system results valid */ - LTC4015_EVT_QCL = LTC4015_MSK_QCL, /* QCOUNT Low alert */ - LTC4015_EVT_QCH = LTC4015_MSK_QCH, /* QCOUNT High alert */ - LTC4015_EVT_BVL = LTC4015_MSK_BVL, /* Battery voltage Low alert */ - LTC4015_EVT_BVH = LTC4015_MSK_BVH, /* Battery voltage High alert */ - LTC4015_EVT_IVL = LTC4015_MSK_IVL, /* Input voltage Low alert */ - LTC4015_EVT_IVH = LTC4015_MSK_IVH, /* Input voltage High alert */ - LTC4015_EVT_SVL = LTC4015_MSK_SVL, /* System voltage Low alert */ - LTC4015_EVT_SVH = LTC4015_MSK_SVH, /* System voltage High alert */ - LTC4015_EVT_ICH = LTC4015_MSK_ICH, /* Input current High alert */ - LTC4015_EVT_BCL = LTC4015_MSK_BCL, /* Battery current Low alert */ - LTC4015_EVT_DTH = LTC4015_MSK_DTH, /* Die temperature High alert */ + LTC4015_EVT_QCL = LTC4015_MSK_QCL, /* QCOUNT Low alert */ + LTC4015_EVT_QCH = LTC4015_MSK_QCH, /* QCOUNT High alert */ + LTC4015_EVT_BVL = LTC4015_MSK_BVL, /* Battery voltage Low alert */ + LTC4015_EVT_BVH = LTC4015_MSK_BVH, /* Battery voltage High alert */ + LTC4015_EVT_IVL = LTC4015_MSK_IVL, /* Input voltage Low alert */ + LTC4015_EVT_IVH = LTC4015_MSK_IVH, /* Input voltage High alert */ + LTC4015_EVT_SVL = LTC4015_MSK_SVL, /* System voltage Low alert */ + LTC4015_EVT_SVH = LTC4015_MSK_SVH, /* System voltage High alert */ + LTC4015_EVT_ICH = LTC4015_MSK_ICH, /* Input current High alert */ + LTC4015_EVT_BCL = LTC4015_MSK_BCL, /* Battery current Low alert */ + LTC4015_EVT_DTH = LTC4015_MSK_DTH, /* Die temperature High alert */ LTC4015_EVT_BSRH = LTC4015_MSK_BSRH, /* BSR High alert */ LTC4015_EVT_NTCL = LTC4015_MSK_NTCL, /* NTC ratio High alert */ LTC4015_EVT_NTCH = LTC4015_MSK_NTCH, /* NTC ratio Low alert */ diff --git a/firmware/ec/inc/devices/ltc4275.h b/firmware/ec/inc/devices/ltc4275.h index b731f6ec7c..e0c2b50c1e 100644 --- a/firmware/ec/inc/devices/ltc4275.h +++ b/firmware/ec/inc/devices/ltc4275.h @@ -42,8 +42,8 @@ typedef enum { } ePDAlert; typedef enum { - LTC4275_CONNECT_EVT = 1 << 2, /* PD device Connected. */ - LTC4275_DISCONNECT_EVT = 1 << 1, /* PD device removed. */ + LTC4275_CONNECT_EVT = 1 << 2, /* PD device Connected. */ + LTC4275_DISCONNECT_EVT = 1 << 1, /* PD device removed. */ LTC4275_INCOMPATIBLE_EVT = 1 << 0, /* Incomaptible device */ } LTC4275_Event; diff --git a/firmware/ec/inc/devices/powerSource.h b/firmware/ec/inc/devices/powerSource.h index 902459fd86..c7a59f50b8 100644 --- a/firmware/ec/inc/devices/powerSource.h +++ b/firmware/ec/inc/devices/powerSource.h @@ -27,8 +27,8 @@ typedef enum { } ePowerSource; typedef enum { - PWR_SRC_ACTIVE = 0, /* If source is primary source */ - PWR_SRC_AVAILABLE, /* If source is available */ + PWR_SRC_ACTIVE = 0, /* If source is primary source */ + PWR_SRC_AVAILABLE, /* If source is available */ PWR_SRC_NON_AVAILABLE /* If source is not connected */ } ePowerSourceState; diff --git a/firmware/ec/inc/utils/util.h b/firmware/ec/inc/utils/util.h index 60c0851d07..cf825e1aac 100644 --- a/firmware/ec/inc/utils/util.h +++ b/firmware/ec/inc/utils/util.h @@ -68,7 +68,7 @@ extern "C" { typedef struct { uint16_t event; // Event type. - uint8_t state; // Event state; + uint8_t state; // Event state; } appEvtHdr_t; /********************************************************************* diff --git a/firmware/ec/src/bigbrother.c b/firmware/ec/src/bigbrother.c index 5bb2d95266..df3d82c6cd 100644 --- a/firmware/ec/src/bigbrother.c +++ b/firmware/ec/src/bigbrother.c @@ -189,8 +189,8 @@ extern OcGpio_Port gbc_io_0; // OcGpio_Pin pin_r_irq_intrpt = { &gbc_io_0, 0, OCGPIO_CFG_IN_PU }; // OcGpio_Pin pin_inven_eeprom_wp = { &gbc_io_0, 1, -// OCGPIO_CFG_OUT_OD_NOPULL }; OcGpio_Pin pin_s_id_eeprom_wp = { &gbc_io_0, -// 2, OCGPIO_CFG_OUT_OD_NOPULL }; +// OCGPIO_CFG_OUT_OD_NOPULL }; OcGpio_Pin pin_s_id_eeprom_wp = { +// &gbc_io_0, 2, OCGPIO_CFG_OUT_OD_NOPULL }; OcGpio_Pin pin_uart_sel = { &gbc_io_0, 3, OCGPIO_CFG_OUT_OD_NOPULL }; // OcGpio_Pin pin_tempsen_evt1 = { &gbc_io_0, 4 }; // OcGpio_Pin pin_tempsen_evt2 = { &gbc_io_0, 5 }; @@ -198,8 +198,8 @@ OcGpio_Pin pin_uart_sel = { &gbc_io_0, 3, OCGPIO_CFG_OUT_OD_NOPULL }; // OcGpio_Pin pin_tempsen_evt4 = { &gbc_io_0, 7 }; // OcGpio_Pin pin_tempsen_evt5 = { &gbc_io_0, 8 }; // OcGpio_Pin pin_buzzer_on = { &gbc_io_0, 10, -// OCGPIO_CFG_OUT_OD_NOPULL }; OcGpio_Pin pin_int_bat_prsnt = { &gbc_io_0, -// 11 }; OcGpio_Pin pin_ext_bat_prsnt = { &gbc_io_0, 12 }; +// OCGPIO_CFG_OUT_OD_NOPULL }; OcGpio_Pin pin_int_bat_prsnt = { +// &gbc_io_0, 11 }; OcGpio_Pin pin_ext_bat_prsnt = { &gbc_io_0, 12 }; OcGpio_Pin pin_ec_syncconn_gpio1 = { &gbc_io_0, 13, OCGPIO_CFG_OUT_OD_NOPULL }; OcGpio_Pin pin_eth_sw_ec_intn = { &gbc_io_0, 14 }; @@ -308,8 +308,8 @@ static void bigborther_spwan_task(void) /* Check the list for possible devices connected. */ /* Launches other tasks */ - usb_rx_createtask(); // P - 05 - usb_tx_createtask(); // P - 04 + usb_rx_createtask(); // P - 05 + usb_tx_createtask(); // P - 04 gossiper_createtask(); // P - 06 ebmp_create_task(); watchdog_create_task(); diff --git a/firmware/ec/src/devices/adt7481.c b/firmware/ec/src/devices/adt7481.c index 7c498998dc..7b3b89ce3e 100644 --- a/firmware/ec/src/devices/adt7481.c +++ b/firmware/ec/src/devices/adt7481.c @@ -20,26 +20,26 @@ *****************************************************************************/ #define ADT7481_REG_R_LOCAL_TEMP 0x00 /* Local Temperature Value */ #define ADT7481_REG_R_REMOTE1_TEMP_H \ - 0x01 /* Remote 1 Temperature Value High Byte */ + 0x01 /* Remote 1 Temperature Value High Byte */ #define ADT7481_REG_R_STATUS1 0x02 /* Status Register 1 */ #define ADT7481_REG_R_CONFIG1 0x03 /* Configuration Register 1 */ #define ADT7481_REG_R_CONVERSION_RATE \ 0x04 /* Conversion Rate/Channel Selector */ #define ADT7481_REG_R_LOCAL_HIGHLIMIT 0x05 /* Local Temperature High Limit */ -#define ADT7481_REG_R_LOCAL_LOWLIMIT 0x06 /* Local Temperature Low Limit */ +#define ADT7481_REG_R_LOCAL_LOWLIMIT 0x06 /* Local Temperature Low Limit */ #define ADT7481_REG_R_REMOTE1_HIGHLIMIT_H \ 0x07 /* Remote 1 Temp High Limit High Byte */ #define ADT7481_REG_R_REMOTE1_LOWLIMIT_H \ - 0x08 /* Remote 1 Temp Low Limit High Byte */ + 0x08 /* Remote 1 Temp Low Limit High Byte */ #define ADT7481_REG_W_CONFIG1 0x09 /* Configuration Register */ #define ADT7481_REG_W_CONVERSION_RATE \ 0x0A /* Conversion Rate/Channel Selector */ #define ADT7481_REG_W_LOCAL_HIGHLIMIT 0x0B /* Local Temperature High Limit */ -#define ADT7481_REG_W_LOCAL_LOWLIMIT 0x0C /* Local Temperature Low Limit */ +#define ADT7481_REG_W_LOCAL_LOWLIMIT 0x0C /* Local Temperature Low Limit */ #define ADT7481_REG_W_REMOTE1_HIGHLIMIT_H \ 0x0D /* Remote 1 Temp High Limit High Byte */ #define ADT7481_REG_W_REMOTE1_LOWLIMIT_H \ - 0x0E /* Remote 1 Temp Low Limit High Byte */ + 0x0E /* Remote 1 Temp Low Limit High Byte */ #define ADT7481_REG_W_ONE_SHOT 0x0F /* One-Shot */ #define ADT7481_REG_R_REMOTE1_TEMP_L \ 0x10 /* Remote 1 Temperature Value Low Byte */ @@ -61,15 +61,15 @@ 0x14 /* Remote 1 Temp Low Limit Low Byte */ #define ADT7481_REG_R_REMOTE1_THERMLIMIT 0x19 /* Remote 1 THERM Limit */ #define ADT7481_REG_W_REMOTE1_THERMLIMIT 0x19 /* Remote 1 THERM Limit */ -#define ADT7481_REG_R_LOCAL_THERMLIMIT 0x20 /* Local THERM Limit */ -#define ADT7481_REG_W_LOCAL_THERMLIMIT 0x20 /* Local THERM Limit */ -#define ADT7481_REG_R_THERM_HYST 0x21 /* THERM Hysteresis */ -#define ADT7481_REG_W_THERM_HYST 0x21 /* THERM Hysteresis */ -#define ADT7481_REG_R_CONECUTIVE_ALERT 0x22 /* Consecutive ALERT */ -#define ADT7481_REG_W_CONECUTIVE_ALERT 0x22 /* Consecutive ALERT */ -#define ADT7481_REG_R_STATUS2 0x23 /* Status Register 2 */ -#define ADT7481_REG_R_CONFIG2 0x24 /* Configuration 2 Register */ -#define ADT7481_REG_W_CONFIG2 0x24 /* Configuration 2 Register */ +#define ADT7481_REG_R_LOCAL_THERMLIMIT 0x20 /* Local THERM Limit */ +#define ADT7481_REG_W_LOCAL_THERMLIMIT 0x20 /* Local THERM Limit */ +#define ADT7481_REG_R_THERM_HYST 0x21 /* THERM Hysteresis */ +#define ADT7481_REG_W_THERM_HYST 0x21 /* THERM Hysteresis */ +#define ADT7481_REG_R_CONECUTIVE_ALERT 0x22 /* Consecutive ALERT */ +#define ADT7481_REG_W_CONECUTIVE_ALERT 0x22 /* Consecutive ALERT */ +#define ADT7481_REG_R_STATUS2 0x23 /* Status Register 2 */ +#define ADT7481_REG_R_CONFIG2 0x24 /* Configuration 2 Register */ +#define ADT7481_REG_W_CONFIG2 0x24 /* Configuration 2 Register */ #define ADT7481_REG_R_REMOTE2_TEMP_H \ 0x30 /* Remote 2 Temperature Value High Byte */ #define ADT7481_REG_R_REMOTE2_HIGHLIMIT_H \ @@ -100,8 +100,8 @@ 0x37 /* Remote 2 Temp Low Limit Low Byte */ #define ADT7481_REG_R_REMOTE2_THERMLIMIT 0x39 /* Remote 2 THERM Limit */ #define ADT7481_REG_W_REMOTE2_THERMLIMIT 0x39 /* Remote 2 THERM Limit */ -#define ADT7481_REG_R_CHIP_ID 0x3D /* Device ID */ -#define ADT7481_REG_R_MAN_ID 0x3E /* Manufacturer ID */ +#define ADT7481_REG_R_CHIP_ID 0x3D /* Device ID */ +#define ADT7481_REG_R_MAN_ID 0x3E /* Manufacturer ID */ /* * Macros to convert temperature values to register values and vice versa. diff --git a/firmware/ec/src/devices/g510.c b/firmware/ec/src/devices/g510.c index 2d75207a82..77d3bf8f31 100644 --- a/firmware/ec/src/devices/g510.c +++ b/firmware/ec/src/devices/g510.c @@ -253,10 +253,10 @@ static void testModule_task(UArg a0, UArg a1) GSM_clccSet(s_hGsm, true); /* Enable clcc (call state) msg */ /* Finish device configuration */ - if (!GSM_cnmi(s_hGsm, 2, 1, 0, 0, 0) || /* enable sms arrival notif */ + if (!GSM_cnmi(s_hGsm, 2, 1, 0, 0, 0) || /* enable sms arrival notif */ !GSM_cmgf(s_hGsm, GSM_MSG_FMT_TEXT) || /* set to text mode */ - !GSM_csmp(s_hGsm, 17, 167, 0, 0) || /* text mode parameters */ - !GSM_csdh(s_hGsm, true)) { /* display extra info for cgmr */ + !GSM_csmp(s_hGsm, 17, 167, 0, 0) || /* text mode parameters */ + !GSM_csdh(s_hGsm, true)) { /* display extra info for cgmr */ s_hGsm = NULL; /* TODO: proper teardown of handle */ } diff --git a/firmware/ec/src/devices/i2c/XR20M1170.c b/firmware/ec/src/devices/i2c/XR20M1170.c index e8ebcd9931..26407a5b3f 100644 --- a/firmware/ec/src/devices/i2c/XR20M1170.c +++ b/firmware/ec/src/devices/i2c/XR20M1170.c @@ -357,7 +357,7 @@ static bool register_config(UART_Handle handle, UART_Params *params) /* Set halt/resume levels - these can be relatively low since data should * normally be cleared quite quickly */ XrRegTcr tcr = { - .rxHaltLvl = 40 / 4, /* 0-60, multiple of 4 */ + .rxHaltLvl = 40 / 4, /* 0-60, multiple of 4 */ .rxResumeLvl = 12 / 4, /* 0-60, multiple of 4 */ }; writeData(handle, XR_REG_TCR, &tcr, sizeof(tcr)); diff --git a/firmware/ec/src/devices/i2c/XR20M1170.h b/firmware/ec/src/devices/i2c/XR20M1170.h index c11e98c78a..7426e1cd17 100644 --- a/firmware/ec/src/devices/i2c/XR20M1170.h +++ b/firmware/ec/src/devices/i2c/XR20M1170.h @@ -59,13 +59,13 @@ typedef struct XR20M1170_HWAttrs { typedef struct XR20M1170_Object { /* UART state variable */ struct { - bool opened : 1; /* Has the obj been opened */ - UART_Mode readMode : 1; /* Mode for all read calls */ - UART_Mode writeMode : 1; /* Mode for all write calls */ - UART_DataMode readDataMode : 1; /* Type of data being read */ - UART_DataMode writeDataMode : 1; /* Type of data being written */ + bool opened : 1; /* Has the obj been opened */ + UART_Mode readMode : 1; /* Mode for all read calls */ + UART_Mode writeMode : 1; /* Mode for all write calls */ + UART_DataMode readDataMode : 1; /* Type of data being read */ + UART_DataMode writeDataMode : 1; /* Type of data being written */ UART_ReturnMode readReturnMode : 1; /* Receive return mode */ - UART_Echo readEcho : 1; /* Echo received data back */ + UART_Echo readEcho : 1; /* Echo received data back */ /* * Flag to determine if a timeout has occurred when the user called * UART_read(). This flag is set by the timeoutClk clock object. @@ -95,7 +95,7 @@ typedef struct XR20M1170_Object { // UART_PAR parityType; /* Parity bit type for UART */ // // /* UART read variables */ - RingBuf_Object ringBuffer; /* local circular buffer object */ + RingBuf_Object ringBuffer; /* local circular buffer object */ GateMutex_Handle ringBufMutex; // Mutex for accessing ring buffer // /* A complement pair of read functions for both the ISR and // UART_read() */ UARTTiva_FxnSet readFxns; unsigned char *readBuf; diff --git a/firmware/ec/src/devices/i2c/XR20M1170_Registers.h b/firmware/ec/src/devices/i2c/XR20M1170_Registers.h index 9e82cfc2ff..0be0528180 100644 --- a/firmware/ec/src/devices/i2c/XR20M1170_Registers.h +++ b/firmware/ec/src/devices/i2c/XR20M1170_Registers.h @@ -45,17 +45,17 @@ typedef enum XrRegister { XR_REG_TCR = 0x06, /* EFR[4] == 1 && MCR[2] == 1 */ XR_REG_TLR = 0x07, /* EFR[4] == 1 && MCR[2] == 1 */ - XR_REG_TXLVL = 0x08, // LCR[7] = 0 - XR_REG_RXLVL = 0x09, // LCR[7] = 0 - XR_REG_IODIR = 0x0A, // LCR[7] = 0 - XR_REG_IOSTATE = 0x0B, // LCR[7] = 0 + XR_REG_TXLVL = 0x08, // LCR[7] = 0 + XR_REG_RXLVL = 0x09, // LCR[7] = 0 + XR_REG_IODIR = 0x0A, // LCR[7] = 0 + XR_REG_IOSTATE = 0x0B, // LCR[7] = 0 XR_REG_IOINTENA = 0x0C, // LCR[7] = 0 - XR_REG_IOCTRL = 0x0E, // LCR[7] = 0 - XR_REG_EFCR = 0x0F, // LCR[7] = 0 + XR_REG_IOCTRL = 0x0E, // LCR[7] = 0 + XR_REG_EFCR = 0x0F, // LCR[7] = 0 - XR_REG_EFR = 0x02, // LCR = 0xBF - XR_REG_XON1 = 0x04, // LCR = 0xBF - XR_REG_XON2 = 0x05, // LCR = 0xBF + XR_REG_EFR = 0x02, // LCR = 0xBF + XR_REG_XON1 = 0x04, // LCR = 0xBF + XR_REG_XON2 = 0x05, // LCR = 0xBF XR_REG_XOFF1 = 0x06, // LCR = 0xBF XR_REG_XOFF2 = 0x07, // LCR = 0xBF } XrRegister; @@ -104,19 +104,19 @@ typedef enum XrStopBit { typedef enum XrParity { XR_PARITY_NONE = 0x0, //!< No parity - XR_PARITY_ODD = 0x1, //!< Parity bit is odd + XR_PARITY_ODD = 0x1, //!< Parity bit is odd XR_PARITY_EVEN = 0x3, //!< Parity bit is even - XR_PARITY_ONE = 0x5, //!< Parity bit is always one + XR_PARITY_ONE = 0x5, //!< Parity bit is always one XR_PARITY_ZERO = 0x7, //!< Parity bit is always zero } XrParity; // TODO: a lot of these should be enums typedef struct PACKED XrRegLcr { - XrWordLen wordLen : 2; // Word length to be transmitted or received + XrWordLen wordLen : 2; // Word length to be transmitted or received XrStopBit stopBits : 1; // Length of stop bit - XrParity parity : 3; // Parity format - bool txBreak : 1; // Causes a break condition to be transmitted - bool divisorEn : 1; // Baud rate generator divisor (DLL, DLM and DLD) + XrParity parity : 3; // Parity format + bool txBreak : 1; // Causes a break condition to be transmitted + bool divisorEn : 1; // Baud rate generator divisor (DLL, DLM and DLD) } XrRegLcr; typedef struct PACKED XrRegDld { @@ -178,7 +178,7 @@ typedef struct PACKED XrRegFcr { /* Transmission Control Register (TCR) */ typedef struct PACKED XrRegTcr { - uint8_t rxHaltLvl : 4; /*!< x4, 0-60 - RTS goes high after this level */ + uint8_t rxHaltLvl : 4; /*!< x4, 0-60 - RTS goes high after this level */ uint8_t rxResumeLvl : 4; /*!< x4, 0-60 - RTS returns low below this level */ } XrRegTcr; @@ -203,9 +203,9 @@ typedef struct PACKED XrRegIer { bool lsrIntEn : 1; bool msrIntEn : 1; bool sleepModeEn : 1; //!< EFR[4] = 1 to modify - bool xoffIntEn : 1; //!< EFR[4] = 1 to modify - bool rtsIntEn : 1; //!< EFR[4] = 1 to modify - bool ctsIntEn : 1; //!< EFR[4] = 1 to modify + bool xoffIntEn : 1; //!< EFR[4] = 1 to modify + bool rtsIntEn : 1; //!< EFR[4] = 1 to modify + bool ctsIntEn : 1; //!< EFR[4] = 1 to modify } XrRegIer; // Note: in order of priority diff --git a/firmware/ec/src/devices/i2c/threaded_int.c b/firmware/ec/src/devices/i2c/threaded_int.c index 966e2ceb2b..daf9939e54 100644 --- a/firmware/ec/src/devices/i2c/threaded_int.c +++ b/firmware/ec/src/devices/i2c/threaded_int.c @@ -25,9 +25,9 @@ // Config simply to map context to our GPIO interrupts typedef struct InterruptConfig { - Semaphore_Handle sem; //!< Semaphore to wake up INT thread + Semaphore_Handle sem; //!< Semaphore to wake up INT thread ThreadedInt_Callback cb; //!< Callback to run when interrupt occurs - void *context; //!< Pointer to pass to cb function + void *context; //!< Pointer to pass to cb function } InterruptConfig; static InterruptConfig s_intConfigs[MAX_DEVICES] = {}; static int s_numDevices = 0; diff --git a/firmware/ec/src/devices/ina226.c b/firmware/ec/src/devices/ina226.c index 492aa07ba1..3cb318a4c2 100644 --- a/firmware/ec/src/devices/ina226.c +++ b/firmware/ec/src/devices/ina226.c @@ -56,10 +56,10 @@ * CONSTANTS DEFINITIONS *****************************************************************************/ /* INA226 LSB Values */ -#define INA226_VSHUNT_LSB 2.5 /* 2.5uV or 2500nV (uV default) */ -#define INA226_VBUS_LSB 1.25 /* 1.25mV or 1250uV (mV default) */ +#define INA226_VSHUNT_LSB 2.5 /* 2.5uV or 2500nV (uV default) */ +#define INA226_VBUS_LSB 1.25 /* 1.25mV or 1250uV (mV default) */ #define INA226_CURRENT_LSB 0.1 /* 0.100mA 0r 100uA (mA default) */ -#define INA226_POWER_LSB 2.5 /* 2.5mW or 2500uW (mW default) */ +#define INA226_POWER_LSB 2.5 /* 2.5mW or 2500uW (mW default) */ /* Configure the Configuration register with Number of Samples and Conversion * Time for Shunt and Bus Voltage. diff --git a/firmware/ec/src/devices/led.c b/firmware/ec/src/devices/led.c index 92640f7e78..9bb94e274d 100644 --- a/firmware/ec/src/devices/led.c +++ b/firmware/ec/src/devices/led.c @@ -70,7 +70,7 @@ static const hciLedData ledData[HCI_LED_TOTAL_NOS] = .ioexpDev = HCI_LED_DRIVER_LEFT, .ledReg = SX1509_REG_A, .ledGreen = ~SX1509_IO_PIN_5, // IO5 - .ledRed = ~SX1509_IO_PIN_4, // IO4 + .ledRed = ~SX1509_IO_PIN_4, // IO4 .ledOff = SX1509_IO_PIN_5 | SX1509_IO_PIN_4, }, [HCI_LED_2] = @@ -78,7 +78,7 @@ static const hciLedData ledData[HCI_LED_TOTAL_NOS] = .ioexpDev = HCI_LED_DRIVER_LEFT, .ledReg = SX1509_REG_A, .ledGreen = ~SX1509_IO_PIN_3, // IO3 - .ledRed = ~SX1509_IO_PIN_2, // IO2 + .ledRed = ~SX1509_IO_PIN_2, // IO2 .ledOff = SX1509_IO_PIN_3 | SX1509_IO_PIN_2, }, [HCI_LED_3] = @@ -86,7 +86,7 @@ static const hciLedData ledData[HCI_LED_TOTAL_NOS] = .ioexpDev = HCI_LED_DRIVER_LEFT, .ledReg = SX1509_REG_B, .ledGreen = ~SX1509_IO_PIN_13, // IO13 - .ledRed = ~SX1509_IO_PIN_12, // IO12 + .ledRed = ~SX1509_IO_PIN_12, // IO12 .ledOff = SX1509_IO_PIN_13 | SX1509_IO_PIN_12, }, [HCI_LED_4] = @@ -94,7 +94,7 @@ static const hciLedData ledData[HCI_LED_TOTAL_NOS] = .ioexpDev = HCI_LED_DRIVER_LEFT, .ledReg = SX1509_REG_A, .ledGreen = ~SX1509_IO_PIN_1, // IO1 - .ledRed = ~SX1509_IO_PIN_0, // IO0 + .ledRed = ~SX1509_IO_PIN_0, // IO0 .ledOff = SX1509_IO_PIN_1 | SX1509_IO_PIN_0, }, [HCI_LED_5] = @@ -102,7 +102,7 @@ static const hciLedData ledData[HCI_LED_TOTAL_NOS] = .ioexpDev = HCI_LED_DRIVER_LEFT, .ledReg = SX1509_REG_A, .ledGreen = ~SX1509_IO_PIN_7, // IO7 - .ledRed = ~SX1509_IO_PIN_6, // IO6 + .ledRed = ~SX1509_IO_PIN_6, // IO6 .ledOff = SX1509_IO_PIN_7 | SX1509_IO_PIN_6, }, [HCI_LED_6] = @@ -110,7 +110,7 @@ static const hciLedData ledData[HCI_LED_TOTAL_NOS] = .ioexpDev = HCI_LED_DRIVER_LEFT, .ledReg = SX1509_REG_B, .ledGreen = ~SX1509_IO_PIN_9, // IO9 - .ledRed = ~SX1509_IO_PIN_8, // IO8 + .ledRed = ~SX1509_IO_PIN_8, // IO8 .ledOff = SX1509_IO_PIN_9 | SX1509_IO_PIN_8, }, [HCI_LED_7] = @@ -118,7 +118,7 @@ static const hciLedData ledData[HCI_LED_TOTAL_NOS] = .ioexpDev = HCI_LED_DRIVER_LEFT, .ledReg = SX1509_REG_B, .ledGreen = ~SX1509_IO_PIN_11, // IO11 - .ledRed = ~SX1509_IO_PIN_10, // I010 + .ledRed = ~SX1509_IO_PIN_10, // I010 .ledOff = SX1509_IO_PIN_11 | SX1509_IO_PIN_10, }, [HCI_LED_8] = @@ -126,7 +126,7 @@ static const hciLedData ledData[HCI_LED_TOTAL_NOS] = .ioexpDev = HCI_LED_DRIVER_RIGHT, .ledReg = SX1509_REG_A, .ledGreen = ~SX1509_IO_PIN_5, // IO5 - .ledRed = ~SX1509_IO_PIN_4, // IO4 + .ledRed = ~SX1509_IO_PIN_4, // IO4 .ledOff = SX1509_IO_PIN_5 | SX1509_IO_PIN_4, }, [HCI_LED_9] = @@ -134,7 +134,7 @@ static const hciLedData ledData[HCI_LED_TOTAL_NOS] = .ioexpDev = HCI_LED_DRIVER_RIGHT, .ledReg = SX1509_REG_A, .ledGreen = ~SX1509_IO_PIN_3, // IO3 - .ledRed = ~SX1509_IO_PIN_2, // IO2 + .ledRed = ~SX1509_IO_PIN_2, // IO2 .ledOff = SX1509_IO_PIN_3 | SX1509_IO_PIN_2, }, [HCI_LED_10] = @@ -142,7 +142,7 @@ static const hciLedData ledData[HCI_LED_TOTAL_NOS] = .ioexpDev = HCI_LED_DRIVER_RIGHT, .ledReg = SX1509_REG_A, .ledGreen = ~SX1509_IO_PIN_1, // IO1 - .ledRed = ~SX1509_IO_PIN_0, // IO0 + .ledRed = ~SX1509_IO_PIN_0, // IO0 .ledOff = SX1509_IO_PIN_1 | SX1509_IO_PIN_0, }, [HCI_LED_11] = @@ -150,7 +150,7 @@ static const hciLedData ledData[HCI_LED_TOTAL_NOS] = .ioexpDev = HCI_LED_DRIVER_RIGHT, .ledReg = SX1509_REG_A, .ledGreen = ~SX1509_IO_PIN_7, // IO7 - .ledRed = ~SX1509_IO_PIN_6, // IO6 + .ledRed = ~SX1509_IO_PIN_6, // IO6 .ledOff = SX1509_IO_PIN_7 | SX1509_IO_PIN_6, }, [HCI_LED_12] = @@ -158,7 +158,7 @@ static const hciLedData ledData[HCI_LED_TOTAL_NOS] = .ioexpDev = HCI_LED_DRIVER_RIGHT, .ledReg = SX1509_REG_B, .ledGreen = ~SX1509_IO_PIN_9, // IO9 - .ledRed = ~SX1509_IO_PIN_8, // IO8 + .ledRed = ~SX1509_IO_PIN_8, // IO8 .ledOff = SX1509_IO_PIN_9 | SX1509_IO_PIN_8, }, [HCI_LED_13] = @@ -166,14 +166,14 @@ static const hciLedData ledData[HCI_LED_TOTAL_NOS] = .ioexpDev = HCI_LED_DRIVER_RIGHT, .ledReg = SX1509_REG_B, .ledGreen = ~SX1509_IO_PIN_11, // IO11 - .ledRed = ~SX1509_IO_PIN_10, // IO10 + .ledRed = ~SX1509_IO_PIN_10, // IO10 .ledOff = SX1509_IO_PIN_11 | SX1509_IO_PIN_10, }, [HCI_LED_14] = { .ioexpDev = HCI_LED_DRIVER_RIGHT, .ledReg = SX1509_REG_B, .ledGreen = ~SX1509_IO_PIN_13, // IO13 - .ledRed = ~SX1509_IO_PIN_12, // IO12 + .ledRed = ~SX1509_IO_PIN_12, // IO12 .ledOff = SX1509_IO_PIN_13 | SX1509_IO_PIN_12, } }; diff --git a/firmware/ec/src/devices/sbdn9603.c b/firmware/ec/src/devices/sbdn9603.c index 0dcbd36a0d..461252bab1 100644 --- a/firmware/ec/src/devices/sbdn9603.c +++ b/firmware/ec/src/devices/sbdn9603.c @@ -55,7 +55,7 @@ static UART_Handle open_comm(const Iridium_Cfg *iridium) /* reset - for proper reset, Iridium should be disabled for ~2s */ OcGpio_write(&iridium->pin_enable, false); /* Just to be sure it's low */ - Task_sleep(2100); // TODO: should be ~2s + Task_sleep(2100); // TODO: should be ~2s OcGpio_write(&iridium->pin_enable, true); Task_sleep(200); // TODO: idk...probably doesn't need to be long @@ -92,8 +92,8 @@ ReturnStatus sbd_init(const Iridium_Cfg *iridium) } /* TODO: module verification? */ - if (!SBD_k(s_hSbd, SBD_FLOW_CONTROL_HW) /* Enable HW flow control */ - || !SBD_sbdmta(s_hSbd, true) /* Ring indication enable */ + if (!SBD_k(s_hSbd, SBD_FLOW_CONTROL_HW) /* Enable HW flow control */ + || !SBD_sbdmta(s_hSbd, true) /* Ring indication enable */ || !SBD_sbdareg(s_hSbd, SBD_AREG_MODE_AUTO) /* Auto registration */ || !SBD_cier(s_hSbd, true, false, true, false, false)) { /* Service change indications */ diff --git a/firmware/ec/src/devices/se98a.c b/firmware/ec/src/devices/se98a.c index 30711f9303..3729f73b76 100644 --- a/firmware/ec/src/devices/se98a.c +++ b/firmware/ec/src/devices/se98a.c @@ -35,18 +35,18 @@ /* Configuration Bits */ #define SE98A_CFG_HEN_H (1 << 10) /* Hysteresis Enable High Bit */ -#define SE98A_CFG_HEN_L (1 << 9) /* Hysteresis Enable Low Bit */ -#define SE98A_CFG_SHMD (1 << 8) /* Shutdown Mode */ +#define SE98A_CFG_HEN_L (1 << 9) /* Hysteresis Enable Low Bit */ +#define SE98A_CFG_SHMD (1 << 8) /* Shutdown Mode */ -#define SE98A_CFG_CTLB (1 << 7) /* Critical Trip Lock Bit */ -#define SE98A_CFG_AWLB (1 << 6) /* Alarm Window Lock Bit */ +#define SE98A_CFG_CTLB (1 << 7) /* Critical Trip Lock Bit */ +#define SE98A_CFG_AWLB (1 << 6) /* Alarm Window Lock Bit */ #define SE98A_CFG_CEVENT (1 << 5) /* (WO) Clear EVENT */ -#define SE98A_CFG_ESTAT (1 << 4) /* (RO) EVENT Status */ +#define SE98A_CFG_ESTAT (1 << 4) /* (RO) EVENT Status */ #define SE98A_CFG_EOCTL (1 << 3) /* EVENT Output Control */ -#define SE98A_CFG_CVO (1 << 2) /* Critical Event Only */ -#define SE98A_CFG_EP (1 << 1) /* EVENT Polarity */ -#define SE98A_CFG_EMD (1 << 0) /* EVENT Mode */ +#define SE98A_CFG_CVO (1 << 2) /* Critical Event Only */ +#define SE98A_CFG_EP (1 << 1) /* EVENT Polarity */ +#define SE98A_CFG_EMD (1 << 0) /* EVENT Mode */ #define SE98A_CFG_HYS_0 (0x0 << 9) #define SE98A_CFG_HYS_1P5 (0x1 << 9) diff --git a/firmware/ec/src/devices/sx1509.c b/firmware/ec/src/devices/sx1509.c index 1135be474e..399b785ce0 100644 --- a/firmware/ec/src/devices/sx1509.c +++ b/firmware/ec/src/devices/sx1509.c @@ -32,30 +32,34 @@ 0x05 /* Output buffer low drive register I/O[7..0] (Bank A) */ #define SX1509_REG_PULL_UP_B 0x06 /* Pull_up register I/O[15..8] (Bank B) */ #define SX1509_REG_PULL_UP_A 0x07 /* Pull_up register I/O[7..0] (Bank A) */ -#define SX1509_REG_PULL_DOWN_B 0x08 /* Pull_down register I/O[15..8] (Bank B) \ - */ -#define SX1509_REG_PULL_DOWN_A 0x09 /* Pull_down register I/O[7..0] (Bank A) \ - */ +#define SX1509_REG_PULL_DOWN_B \ + 0x08 /* Pull_down register I/O[15..8] (Bank B) \ + */ +#define SX1509_REG_PULL_DOWN_A \ + 0x09 /* Pull_down register I/O[7..0] (Bank A) \ + */ #define SX1509_REG_OPEN_DRAIN_B \ 0x0A /* Open drain register I/O[15..8] (Bank B) */ #define SX1509_REG_OPEN_DRAIN_A \ - 0x0B /* Open drain register I/O[7..0] (Bank A) */ + 0x0B /* Open drain register I/O[7..0] (Bank A) */ #define SX1509_REG_POLARITY_B 0x0C /* Polarity register I/O[15..8] (Bank B) */ #define SX1509_REG_POLARITY_A 0x0D /* Polarity register I/O[7..0] (Bank A) */ -#define SX1509_REG_DIR_B 0x0E /* Direction register I/O[15..8] (Bank B) */ -#define SX1509_REG_DIR_A 0x0F /* Direction register I/O[7..0] (Bank A) */ -#define SX1509_REG_DATA_B 0x10 /* Data register I/O[15..8] (Bank B) */ -#define SX1509_REG_DATA_A 0x11 /* Data register I/O[7..0] (Bank A) */ +#define SX1509_REG_DIR_B 0x0E /* Direction register I/O[15..8] (Bank B) */ +#define SX1509_REG_DIR_A 0x0F /* Direction register I/O[7..0] (Bank A) */ +#define SX1509_REG_DATA_B 0x10 /* Data register I/O[15..8] (Bank B) */ +#define SX1509_REG_DATA_A 0x11 /* Data register I/O[7..0] (Bank A) */ #define SX1509_REG_INTERRUPT_MASK_B \ 0x12 /* Interrupt mask register I/O[15..8] (Bank B) */ #define SX1509_REG_INTERRUPT_MASK_A \ 0x13 /* Interrupt mask register I/O[7..0] (Bank A) */ #define SX1509_REG_SENSE_HIGH_B \ 0x14 /* Sense register for I/O[15:12] (Bank B) */ -#define SX1509_REG_SENSE_LOW_B 0x15 /* Sense register for I/O[11:8] (Bank B) \ +#define SX1509_REG_SENSE_LOW_B \ + 0x15 /* Sense register for I/O[11:8] (Bank B) \ + */ +#define SX1509_REG_SENSE_HIGH_A \ + 0x16 /* Sense register for I/O[7:4] (Bank A) \ */ -#define SX1509_REG_SENSE_HIGH_A 0x16 /* Sense register for I/O[7:4] (Bank A) \ - */ #define SX1509_REG_SENSE_LOW_A 0x17 /* Sense register for I/O[3:0] (Bank A) */ #define SX1509_REG_INTERRUPT_SOURCE_B \ 0x18 /* Interrupt source register I/O[15..8] (Bank B) */ @@ -67,7 +71,7 @@ 0x1B /* Event status register I/O[7..0] (Bank A) */ #define SX1509_REG_LEVEL_SHIFTER_1 0x1C /* Level shifter register 1 */ #define SX1509_REG_LEVEL_SHIFTER_2 0x1D /* Level shifter register 2 */ -#define SX1509_REG_CLOCK 0x1E /* Clock management register */ +#define SX1509_REG_CLOCK 0x1E /* Clock management register */ #define SX1509_REG_MISC 0x1F /* Miscellaneous device settings register */ #define SX1509_REG_LED_DRIVER_ENABLE_B \ 0x20 /* LED driver enable register I/O[15..8] (Bank B) */ @@ -77,76 +81,76 @@ #define SX1509_REG_DEBOUNCE_ENABLE_B \ 0x23 /* Debounce enable register I/O[15..8] (Bank B) */ #define SX1509_REG_DEBOUNCE_ENABLE_A \ - 0x24 /* Debounce enable register I/O[7..0] (Bank A) */ + 0x24 /* Debounce enable register I/O[7..0] (Bank A) */ #define SX1509_REG_T_ON_0 0x29 /* ON time register for I/O[0] */ #define SX1509_REG_I_ON_0 0x2A /* ON intensity register for I/O[0] */ -#define SX1509_REG_OFF_0 0x2B /* OFF time/intensity register for I/O[0] */ +#define SX1509_REG_OFF_0 0x2B /* OFF time/intensity register for I/O[0] */ #define SX1509_REG_T_ON_1 0x2C /* ON time register for I/O[1] */ #define SX1509_REG_I_ON_1 0x2D /* ON intensity register for I/O[1] */ -#define SX1509_REG_OFF_1 0x2E /* OFF time/intensity register for I/O[1] */ +#define SX1509_REG_OFF_1 0x2E /* OFF time/intensity register for I/O[1] */ #define SX1509_REG_T_ON_2 0x2F /* ON time register for I/O[2] */ #define SX1509_REG_I_ON_2 0x30 /* ON intensity register for I/O[2] */ -#define SX1509_REG_OFF_2 0x31 /* OFF time/intensity register for I/O[2] */ +#define SX1509_REG_OFF_2 0x31 /* OFF time/intensity register for I/O[2] */ #define SX1509_REG_T_ON_3 0x32 /* ON time register for I/O[3] */ #define SX1509_REG_I_ON_3 0x33 /* ON intensity register for I/O[3] */ -#define SX1509_REG_OFF_3 0x34 /* OFF time/intensity register for I/O[3] */ +#define SX1509_REG_OFF_3 0x34 /* OFF time/intensity register for I/O[3] */ #define SX1509_REG_T_ON_4 0x35 /* ON time register for I/O[4] */ #define SX1509_REG_I_ON_4 0x36 /* ON intensity register for I/O[4] */ -#define SX1509_REG_OFF_4 0x37 /* OFF time/intensity register for I/O[4] */ -#define SX1509_REG_T_RISE_4 0x38 /* Fade in register for I/O[4] */ -#define SX1509_REG_T_FALL_4 0x39 /* Fade out register for I/O[4] */ -#define SX1509_REG_T_ON_5 0x3A /* ON time register for I/O[5] */ -#define SX1509_REG_I_ON_5 0x3B /* ON intensity register for I/O[5] */ -#define SX1509_REG_OFF_5 0x3C /* OFF time/intensity register for I/O[5] */ -#define SX1509_REG_T_RISE_5 0x3D /* Fade in register for I/O[5] */ -#define SX1509_REG_T_FALL_5 0x3E /* Fade out register for I/O[5] */ -#define SX1509_REG_T_ON_6 0x3F /* ON time register for I/O[6] */ -#define SX1509_REG_I_ON_6 0x40 /* ON intensity register for I/O[6] */ -#define SX1509_REG_OFF_6 0x41 /* OFF time/intensity register for I/O[6] */ -#define SX1509_REG_T_RISE_6 0x42 /* Fade in register for I/O[6] */ -#define SX1509_REG_T_FALL_6 0x43 /* Fade out register for I/O[6] */ -#define SX1509_REG_T_ON_7 0x44 /* ON time register for I/O[7] */ -#define SX1509_REG_I_ON_7 0x45 /* ON intensity register for I/O[7] */ -#define SX1509_REG_OFF_7 0x46 /* OFF time/intensity register for I/O[7] */ -#define SX1509_REG_T_RISE_7 0x47 /* Fade in register for I/O[7] */ -#define SX1509_REG_T_FALL_7 0x48 /* Fade out register for I/O[7] */ -#define SX1509_REG_T_ON_8 0x49 /* ON time register for I/O[8] */ -#define SX1509_REG_I_ON_8 0x4A /* ON intensity register for I/O[8] */ -#define SX1509_REG_OFF_8 0x4B /* OFF time/intensity register for I/O[8] */ -#define SX1509_REG_T_ON_9 0x4C /* ON time register for I/O[9] */ -#define SX1509_REG_I_ON_9 0x4D /* ON intensity register for I/O[9] */ -#define SX1509_REG_OFF_9 0x4E /* OFF time/intensity register for I/O[9] */ -#define SX1509_REG_T_ON_10 0x4F /* ON time register for I/O[10] */ -#define SX1509_REG_I_ON_10 0x50 /* ON intensity register for I/O[10] */ -#define SX1509_REG_OFF_10 0x51 /* OFF time/intensity register for I/O[10] */ -#define SX1509_REG_T_ON_11 0x52 /* ON time register for I/O[11] */ -#define SX1509_REG_I_ON_11 0x53 /* ON intensity register for I/O[11] */ -#define SX1509_REG_OFF_11 0x54 /* OFF time/intensity register for I/O[11] */ -#define SX1509_REG_T_ON_12 0x55 /* ON time register for I/O[12] */ -#define SX1509_REG_I_ON_12 0x56 /* ON intensity register for I/O[12] */ -#define SX1509_REG_OFF_12 0x57 /* OFF time/intensity register for I/O[12] */ +#define SX1509_REG_OFF_4 0x37 /* OFF time/intensity register for I/O[4] */ +#define SX1509_REG_T_RISE_4 0x38 /* Fade in register for I/O[4] */ +#define SX1509_REG_T_FALL_4 0x39 /* Fade out register for I/O[4] */ +#define SX1509_REG_T_ON_5 0x3A /* ON time register for I/O[5] */ +#define SX1509_REG_I_ON_5 0x3B /* ON intensity register for I/O[5] */ +#define SX1509_REG_OFF_5 0x3C /* OFF time/intensity register for I/O[5] */ +#define SX1509_REG_T_RISE_5 0x3D /* Fade in register for I/O[5] */ +#define SX1509_REG_T_FALL_5 0x3E /* Fade out register for I/O[5] */ +#define SX1509_REG_T_ON_6 0x3F /* ON time register for I/O[6] */ +#define SX1509_REG_I_ON_6 0x40 /* ON intensity register for I/O[6] */ +#define SX1509_REG_OFF_6 0x41 /* OFF time/intensity register for I/O[6] */ +#define SX1509_REG_T_RISE_6 0x42 /* Fade in register for I/O[6] */ +#define SX1509_REG_T_FALL_6 0x43 /* Fade out register for I/O[6] */ +#define SX1509_REG_T_ON_7 0x44 /* ON time register for I/O[7] */ +#define SX1509_REG_I_ON_7 0x45 /* ON intensity register for I/O[7] */ +#define SX1509_REG_OFF_7 0x46 /* OFF time/intensity register for I/O[7] */ +#define SX1509_REG_T_RISE_7 0x47 /* Fade in register for I/O[7] */ +#define SX1509_REG_T_FALL_7 0x48 /* Fade out register for I/O[7] */ +#define SX1509_REG_T_ON_8 0x49 /* ON time register for I/O[8] */ +#define SX1509_REG_I_ON_8 0x4A /* ON intensity register for I/O[8] */ +#define SX1509_REG_OFF_8 0x4B /* OFF time/intensity register for I/O[8] */ +#define SX1509_REG_T_ON_9 0x4C /* ON time register for I/O[9] */ +#define SX1509_REG_I_ON_9 0x4D /* ON intensity register for I/O[9] */ +#define SX1509_REG_OFF_9 0x4E /* OFF time/intensity register for I/O[9] */ +#define SX1509_REG_T_ON_10 0x4F /* ON time register for I/O[10] */ +#define SX1509_REG_I_ON_10 0x50 /* ON intensity register for I/O[10] */ +#define SX1509_REG_OFF_10 0x51 /* OFF time/intensity register for I/O[10] */ +#define SX1509_REG_T_ON_11 0x52 /* ON time register for I/O[11] */ +#define SX1509_REG_I_ON_11 0x53 /* ON intensity register for I/O[11] */ +#define SX1509_REG_OFF_11 0x54 /* OFF time/intensity register for I/O[11] */ +#define SX1509_REG_T_ON_12 0x55 /* ON time register for I/O[12] */ +#define SX1509_REG_I_ON_12 0x56 /* ON intensity register for I/O[12] */ +#define SX1509_REG_OFF_12 0x57 /* OFF time/intensity register for I/O[12] */ #define SX1509_REG_T_RISE_12 0x58 /* Fade in register for I/O[12] */ #define SX1509_REG_T_FALL_12 0x59 /* Fade out register for I/O[12] */ -#define SX1509_REG_T_ON_13 0x5A /* ON time register for I/O[13] */ -#define SX1509_REG_I_ON_13 0x5B /* ON intensity register for I/O[13] */ -#define SX1509_REG_OFF_13 0x5C /* OFF time/intensity register for I/O[13] */ +#define SX1509_REG_T_ON_13 0x5A /* ON time register for I/O[13] */ +#define SX1509_REG_I_ON_13 0x5B /* ON intensity register for I/O[13] */ +#define SX1509_REG_OFF_13 0x5C /* OFF time/intensity register for I/O[13] */ #define SX1509_REG_T_RISE_13 0x5D /* Fade in register for I/O[13] */ #define SX1509_REG_T_FALL_13 0x5E /* Fade out register for I/O[13] */ -#define SX1509_REG_T_ON_14 0x5F /* ON time register for I/O[14] */ -#define SX1509_REG_I_ON_14 0x60 /* ON intensity register for I/O[14] */ -#define SX1509_REG_OFF_14 0x61 /* OFF time/intensity register for I/O[14] */ +#define SX1509_REG_T_ON_14 0x5F /* ON time register for I/O[14] */ +#define SX1509_REG_I_ON_14 0x60 /* ON intensity register for I/O[14] */ +#define SX1509_REG_OFF_14 0x61 /* OFF time/intensity register for I/O[14] */ #define SX1509_REG_T_RISE_14 0x62 /* Fade in register for I/O[14] */ #define SX1509_REG_T_FALL_14 0x63 /* Fade out register for I/O[14] */ -#define SX1509_REG_T_ON_15 0x64 /* ON time register for I/O[15] */ -#define SX1509_REG_I_ON_15 0x65 /* ON intensity register for I/O[15] */ -#define SX1509_REG_OFF_15 0x66 /* OFF time/intensity register for I/O[15] */ +#define SX1509_REG_T_ON_15 0x64 /* ON time register for I/O[15] */ +#define SX1509_REG_I_ON_15 0x65 /* ON intensity register for I/O[15] */ +#define SX1509_REG_OFF_15 0x66 /* OFF time/intensity register for I/O[15] */ #define SX1509_REG_T_RISE_15 0x67 /* Fade in register for I/O[15] */ #define SX1509_REG_T_FALL_15 0x68 /* Fade out register for I/O[15] */ #define SX1509_REG_HIGH_INPUT_B \ 0x69 /* High input enable register I/O[15..8] (Bank B) */ #define SX1509_REG_HIGH_INPUT_A \ 0x6A /* High input enable register I/O[7..0] (Bank A) */ -#define SX1509_REG_RESET 0x7D /* Software reset register */ +#define SX1509_REG_RESET 0x7D /* Software reset register */ #define SX1509_REG_TEST_1 0x7E /* Test register 1 */ #define SX1509_REG_TEST_2 0x7F /* Test register 2 */ diff --git a/firmware/ec/src/devices/uart/UartMon.h b/firmware/ec/src/devices/uart/UartMon.h index 6770e515fe..e1a6b5d361 100644 --- a/firmware/ec/src/devices/uart/UartMon.h +++ b/firmware/ec/src/devices/uart/UartMon.h @@ -53,7 +53,7 @@ extern const UART_FxnTable UartMon_fxnTable; typedef struct UartMon_Cfg { - unsigned int uart_in_idx; /*!< The UART we're going to monitor */ + unsigned int uart_in_idx; /*!< The UART we're going to monitor */ unsigned int uart_debug_idx; /*!< The UART we're going to forward to */ } UartMon_Cfg; @@ -63,7 +63,7 @@ typedef struct UartMon_Object { bool opened : 1; /*!< Is there an open handle to the driver */ } state; - UART_Handle hUart_in; /*!< Handle to the monitored UART */ + UART_Handle hUart_in; /*!< Handle to the monitored UART */ UART_Handle hUart_debug; /*!< Handle to the forwarding UART */ } UartMon_Object; diff --git a/firmware/ec/src/devices/uart/at_cmd.c b/firmware/ec/src/devices/uart/at_cmd.c index af947548b1..92bc44ef64 100644 --- a/firmware/ec/src/devices/uart/at_cmd.c +++ b/firmware/ec/src/devices/uart/at_cmd.c @@ -287,7 +287,7 @@ static bool AT_cmd_read_line(AT_Handle handle, At_RawResponse *res) if (handle->binaryReadHandler) { handle->s_bufLen = lineLen + 1; // TODO: this is dumb, get_line_type should - // just know about the temp buf + // just know about the temp buf res->size = handle->binaryReadHandler(handle, res->data); handle->binaryReadHandler = NULL; return (res->size >= 0); diff --git a/firmware/ec/src/devices/uart/gsm.h b/firmware/ec/src/devices/uart/gsm.h index a3701cc450..c689d6ba48 100644 --- a/firmware/ec/src/devices/uart/gsm.h +++ b/firmware/ec/src/devices/uart/gsm.h @@ -37,11 +37,11 @@ typedef enum GsmCallState { GSM_CALL_STATE_ACTIVE = 0, GSM_CALL_STATE_HELD = 1, - GSM_CALL_STATE_DIALING = 2, /* MO */ + GSM_CALL_STATE_DIALING = 2, /* MO */ GSM_CALL_STATE_ALERTING = 3, /* MO */ GSM_CALL_STATE_INCOMING = 4, /* MT */ - GSM_CALL_STATE_WAITING = 5, /* MT */ + GSM_CALL_STATE_WAITING = 5, /* MT */ GSM_CALL_STATE_RELEASED = 6, } GsmCallState; @@ -194,10 +194,10 @@ typedef enum GsmCmgdFlag { bool GSM_cmgd(GSM_Handle handle, int index, GsmCmgdFlag flag); typedef enum GsmCFun { - GSM_CFUN_OFF = 0, /*!< Power off module */ - GSM_CFUN_FULL = 1, /*!< Enable full radio functionality */ + GSM_CFUN_OFF = 0, /*!< Power off module */ + GSM_CFUN_FULL = 1, /*!< Enable full radio functionality */ GSM_CFUN_AIRPLANE = 4, /*!< Turn off radio functionality */ - GSM_CFUN_RESET = 15 /*!< Hardware reset */ + GSM_CFUN_RESET = 15 /*!< Hardware reset */ } GsmCFun; bool GSM_cfun(GSM_Handle handle, GsmCFun fun); diff --git a/firmware/ec/src/devices/uart/sbd.h b/firmware/ec/src/devices/uart/sbd.h index df2f1fd099..92932c94d8 100644 --- a/firmware/ec/src/devices/uart/sbd.h +++ b/firmware/ec/src/devices/uart/sbd.h @@ -65,17 +65,17 @@ typedef struct SbdixInfo { typedef struct SbdsInfo { int moFlag; //!< Message in mobile originated buffer - int moMsn; //!< MO message sequence number + int moMsn; //!< MO message sequence number int mtFlag; //!< Message in mobile terminated buffer - int mtMsn; //!< MT Message sequence number + int mtMsn; //!< MT Message sequence number } SbdsInfo; typedef struct SbdsxInfo { SbdsInfo sbdsInfo; //!< Regular SBD status info - int raFlag; //!< Ring alert still needs to be answered - int msgWaiting; //!< Number of MT messages at gateway - //!< (updated every SBD session) + int raFlag; //!< Ring alert still needs to be answered + int msgWaiting; //!< Number of MT messages at gateway + //!< (updated every SBD session) } SbdsxInfo; typedef enum SbdCiev { diff --git a/firmware/ec/src/drivers/GpioSX1509.c b/firmware/ec/src/drivers/GpioSX1509.c index d1f41a6528..af70ae3fc1 100644 --- a/firmware/ec/src/drivers/GpioSX1509.c +++ b/firmware/ec/src/drivers/GpioSX1509.c @@ -150,9 +150,9 @@ static int GpioSX1509_read(const OcGpio_Pin *pin) /* TODO: this mapping is pretty gross with the shifts */ static const uint8_t EDGE_SENSE_MAP[] = { - [OCGPIO_CFG_INT_NONE >> OCGPIO_CFG_INT_LSB] = 0x00, /* 00 */ - [OCGPIO_CFG_INT_RISING >> OCGPIO_CFG_INT_LSB] = 0x01, /* 01 */ - [OCGPIO_CFG_INT_FALLING >> OCGPIO_CFG_INT_LSB] = 0x02, /* 10 */ + [OCGPIO_CFG_INT_NONE >> OCGPIO_CFG_INT_LSB] = 0x00, /* 00 */ + [OCGPIO_CFG_INT_RISING >> OCGPIO_CFG_INT_LSB] = 0x01, /* 01 */ + [OCGPIO_CFG_INT_FALLING >> OCGPIO_CFG_INT_LSB] = 0x02, /* 10 */ [OCGPIO_CFG_INT_BOTH_EDGES >> OCGPIO_CFG_INT_LSB] = 0x03, /* 11 */ }; diff --git a/firmware/ec/src/drivers/OcGpio.h b/firmware/ec/src/drivers/OcGpio.h index 428d73e228..e4f62c7c95 100644 --- a/firmware/ec/src/drivers/OcGpio.h +++ b/firmware/ec/src/drivers/OcGpio.h @@ -45,8 +45,8 @@ typedef struct OcGpio_FnTable { /*! A port defines a specific driver instance to route through */ struct OcGpio_Port { const OcGpio_FnTable *fn_table; /*!< virtual table for driver */ - const void *cfg; /*!< driver-specific config settings */ - void *object_data; /*!< driver-specific data (in RAM) */ + const void *cfg; /*!< driver-specific config settings */ + void *object_data; /*!< driver-specific data (in RAM) */ }; /*! A pin provides us with everything we need to route data to the appropriate @@ -55,7 +55,7 @@ struct OcGpio_Port { */ struct OcGpio_Pin { const OcGpio_Port *port; /*!< Pointer to IO driver instance */ - uint16_t idx; /*!< Driver-specific index */ + uint16_t idx; /*!< Driver-specific index */ uint16_t hw_cfg; /*!< Any special attributes for the pin (eg. invert) */ }; diff --git a/firmware/ec/src/interfaces/USB/usbcdcd.c b/firmware/ec/src/interfaces/USB/usbcdcd.c index a626c9f966..c13ee91a34 100644 --- a/firmware/ec/src/interfaces/USB/usbcdcd.c +++ b/firmware/ec/src/interfaces/USB/usbcdcd.c @@ -235,27 +235,27 @@ tUSBBuffer rxBuffer; static tUSBDCDCDevice serialDevice; tUSBBuffer rxBuffer = { - false, /* This is a receive buffer. */ - cbRxHandler, /* pfnCallback */ - (void *)&serialDevice, /* Callback data is our device pointer. */ - USBDCDCPacketRead, /* pfnTransfer */ + false, /* This is a receive buffer. */ + cbRxHandler, /* pfnCallback */ + (void *)&serialDevice, /* Callback data is our device pointer. */ + USBDCDCPacketRead, /* pfnTransfer */ USBDCDCRxPacketAvailable, /* pfnAvailable */ - (void *)&serialDevice, /* pvHandle */ - receiveBuffer, /* pcBuffer */ - USBBUFFERSIZE, /* ulBufferSize */ - { { 0, 0, 0, 0 }, 0, 0 } /* private data workspace */ + (void *)&serialDevice, /* pvHandle */ + receiveBuffer, /* pcBuffer */ + USBBUFFERSIZE, /* ulBufferSize */ + { { 0, 0, 0, 0 }, 0, 0 } /* private data workspace */ }; tUSBBuffer txBuffer = { - true, /* This is a transmit buffer. */ - cbTxHandler, /* pfnCallback */ - (void *)&serialDevice, /* Callback data is our device pointer. */ - USBDCDCPacketWrite, /* pfnTransfer */ + true, /* This is a transmit buffer. */ + cbTxHandler, /* pfnCallback */ + (void *)&serialDevice, /* Callback data is our device pointer. */ + USBDCDCPacketWrite, /* pfnTransfer */ USBDCDCTxPacketAvailable, /* pfnAvailable */ - (void *)&serialDevice, /* pvHandle */ - transmitBuffer, /* pcBuffer */ - USBBUFFERSIZE, /* ulBufferSize */ - { { 0, 0, 0, 0 }, 0, 0 } /* private data workspace */ + (void *)&serialDevice, /* pvHandle */ + transmitBuffer, /* pcBuffer */ + USBBUFFERSIZE, /* ulBufferSize */ + { { 0, 0, 0, 0 }, 0, 0 } /* private data workspace */ }; static tUSBDCDCDevice serialDevice = { USB_VID_TI_1CBE, @@ -284,27 +284,27 @@ static tCDCSerInstance serialInstance; const tUSBDCDCDevice serialDevice; const tUSBBuffer rxBuffer = { - false, /* This is a receive buffer. */ - cbRxHandler, /* pfnCallback */ - (void *)&serialDevice, /* Callback data is our device pointer. */ - USBDCDCPacketRead, /* pfnTransfer */ + false, /* This is a receive buffer. */ + cbRxHandler, /* pfnCallback */ + (void *)&serialDevice, /* Callback data is our device pointer. */ + USBDCDCPacketRead, /* pfnTransfer */ USBDCDCRxPacketAvailable, /* pfnAvailable */ - (void *)&serialDevice, /* pvHandle */ - receiveBuffer, /* pcBuffer */ - USBBUFFERSIZE, /* ulBufferSize */ - receiveBufferWorkspace /* pvWorkspace */ + (void *)&serialDevice, /* pvHandle */ + receiveBuffer, /* pcBuffer */ + USBBUFFERSIZE, /* ulBufferSize */ + receiveBufferWorkspace /* pvWorkspace */ }; const tUSBBuffer txBuffer = { - true, /* This is a transmit buffer. */ - cbTxHandler, /* pfnCallback */ - (void *)&serialDevice, /* Callback data is our device pointer. */ - USBDCDCPacketWrite, /* pfnTransfer */ + true, /* This is a transmit buffer. */ + cbTxHandler, /* pfnCallback */ + (void *)&serialDevice, /* Callback data is our device pointer. */ + USBDCDCPacketWrite, /* pfnTransfer */ USBDCDCTxPacketAvailable, /* pfnAvailable */ - (void *)&serialDevice, /* pvHandle */ - transmitBuffer, /* pcBuffer */ - USBBUFFERSIZE, /* ulBufferSize */ - transmitBufferWorkspace /* pvWorkspace */ + (void *)&serialDevice, /* pvHandle */ + transmitBuffer, /* pcBuffer */ + USBBUFFERSIZE, /* ulBufferSize */ + transmitBufferWorkspace /* pvWorkspace */ }; const tUSBDCDCDevice serialDevice = { @@ -331,9 +331,9 @@ const tUSBDCDCDevice serialDevice = { static tLineCoding g_sLineCoding = { 115200, /* 115200 baud rate. */ - 1, /* 1 Stop Bit. */ - 0, /* No Parity. */ - 8 /* 8 Bits of data. */ + 1, /* 1 Stop Bit. */ + 0, /* No Parity. */ + 8 /* 8 Bits of data. */ }; /* diff --git a/firmware/ec/src/registry/SSRegistry.c b/firmware/ec/src/registry/SSRegistry.c index d41929b866..80d4964be4 100644 --- a/firmware/ec/src/registry/SSRegistry.c +++ b/firmware/ec/src/registry/SSRegistry.c @@ -428,9 +428,9 @@ static void subsystem_init(OCMPSubsystem ss_id) /* Spin up the task */ Task_Params taskParams; Task_Params_init(&taskParams); - taskParams.stack = OC_task_stack[ss_id]; // ss->taskStack; + taskParams.stack = OC_task_stack[ss_id]; // ss->taskStack; taskParams.stackSize = OC_TASK_STACK_SIZE; // ss->taskStackSize; - taskParams.priority = OC_TASK_PRIORITY; // ss->taskPriority; + taskParams.priority = OC_TASK_PRIORITY; // ss->taskPriority; taskParams.arg0 = (UArg)ss; taskParams.arg1 = ss_id; diff --git a/firmware/ec/src/subsystem/obc/obc.c b/firmware/ec/src/subsystem/obc/obc.c index b4984c5e78..c7d317f122 100644 --- a/firmware/ec/src/subsystem/obc/obc.c +++ b/firmware/ec/src/subsystem/obc/obc.c @@ -35,7 +35,7 @@ ReturnStatus iridium_sw_reset(const Iridium_Cfg *iridium) /* reset - for proper reset, Iridium should be disabled for ~2s */ OcGpio_write(&iridium->pin_enable, false); /* Just to be sure it's low */ - Task_sleep(2100); // TODO: should be ~2s + Task_sleep(2100); // TODO: should be ~2s OcGpio_write(&iridium->pin_enable, true); Task_sleep(200); // TODO: idk...probably doesn't need to be lon return RETURN_OK; diff --git a/firmware/ec/src/utils/util.c b/firmware/ec/src/utils/util.c index 1ab547afac..9bc21adfc9 100644 --- a/firmware/ec/src/utils/util.c +++ b/firmware/ec/src/utils/util.c @@ -55,7 +55,7 @@ // RTOS queue for profile/app messages. typedef struct _queueRec_ { Queue_Elem _elem; // queue element - uint8_t *pData; // pointer to app data + uint8_t *pData; // pointer to app data } queueRec_t; /********************************************************************* diff --git a/firmware/ec/test/suites/Test_eeprom.c b/firmware/ec/test/suites/Test_eeprom.c index 8c11724efc..958f99dbe0 100644 --- a/firmware/ec/test/suites/Test_eeprom.c +++ b/firmware/ec/test/suites/Test_eeprom.c @@ -53,7 +53,7 @@ static Eeprom_Cfg s_dev = { }; static uint16_t EEPROM_regs[] = { - [0x00] = 0x00, /* Init */ + [0x00] = 0x00, /* Init */ [0xC601] = 0x00, /* SERIAL INFO */ [0xAC01] = 0x00, /* BOARD INFO */ [0x0A01] = 0x00, /* DEVICE INFO */ diff --git a/firmware/ec/test/suites/Test_ina226.c b/firmware/ec/test/suites/Test_ina226.c index b7a80f8967..ba872234ab 100644 --- a/firmware/ec/test/suites/Test_ina226.c +++ b/firmware/ec/test/suites/Test_ina226.c @@ -163,7 +163,7 @@ static void _test_alert(INA226_Dev *dev, INA226_Event evt, uint16_t alert_mask, FakeGpio_triggerInterrupt(dev->cfg.pin_alert); TEST_ASSERT_EQUAL(0, s_alert_data.triggered); - INA226_regs[0x06] |= (1 << 4); /* Fault caused alert */ + INA226_regs[0x06] |= (1 << 4); /* Fault caused alert */ alert_mask = INA226_regs[0x06]; /* Store reg value for later comparison */ FakeGpio_triggerInterrupt(dev->cfg.pin_alert); @@ -239,7 +239,7 @@ void test_current_limit(void) TEST_ASSERT_EQUAL(1000, current_val); // 1000mA TEST_ASSERT_EQUAL(RETURN_OK, ina226_setCurrentLim(&s_dev, 3000)); // 3000mA - TEST_ASSERT_EQUAL_HEX16(0x0960, INA226_regs[0x07]); // 2400 + TEST_ASSERT_EQUAL_HEX16(0x0960, INA226_regs[0x07]); // 2400 TEST_ASSERT_EQUAL(RETURN_OK, ina226_readCurrentLim(&s_dev, ¤t_val)); TEST_ASSERT_EQUAL(3000, current_val); // 3000mA diff --git a/firmware/ec/test/suites/Test_powerSource.c b/firmware/ec/test/suites/Test_powerSource.c index a60e2a0943..488f386a30 100644 --- a/firmware/ec/test/suites/Test_powerSource.c +++ b/firmware/ec/test/suites/Test_powerSource.c @@ -211,7 +211,7 @@ static PWRSRC_Dev p_dev = { void test_pwr_process_get_status_parameters_data_poeavailable(void) { uint8_t powerStatus = 0; - uint8_t index = 0x00; // PoE Availability + uint8_t index = 0x00; // PoE Availability PWR_GpioPins[0x55] = 0x0; // PoE Enable PWR_GpioPins[0x1E] = 0x1; // Aux/solar Disable SX1509_regs[0x10] = 0x18; // Int/Ext Battery Disable @@ -227,7 +227,7 @@ void test_pwr_process_get_status_parameters_data_poeavailable(void) void test_pwr_process_get_status_parameters_data_poeaccessible(void) { uint8_t powerStatus = 0; - uint8_t index = 0x01; // PoE Accessibility + uint8_t index = 0x01; // PoE Accessibility PWR_GpioPins[0x55] = 0x0; // PoE Enable PWR_GpioPins[0x1E] = 0x1; // Aux/solar Disable SX1509_regs[0x10] = 0x18; // Int/Ext Battery Disable @@ -243,7 +243,7 @@ void test_pwr_process_get_status_parameters_data_poeaccessible(void) void test_pwr_process_get_status_parameters_data_solaravailable(void) { uint8_t powerStatus = 0; - uint8_t index = 0x02; // SOLAR Availability + uint8_t index = 0x02; // SOLAR Availability PWR_GpioPins[0x55] = 0x1; // PoE Disable PWR_GpioPins[0x1E] = 0x0; // Aux/solar Enable SX1509_regs[0x10] = 0x18; // Int/Ext Battery Disable @@ -259,7 +259,7 @@ void test_pwr_process_get_status_parameters_data_solaravailable(void) void test_pwr_process_get_status_parameters_data_solaraccessible(void) { uint8_t powerStatus = 0; - uint8_t index = 0x03; // SOLAR Accessibility + uint8_t index = 0x03; // SOLAR Accessibility PWR_GpioPins[0x55] = 0x1; // PoE Disable PWR_GpioPins[0x1E] = 0x0; // Aux/solar Enable SX1509_regs[0x10] = 0x18; // Int/Ext Battery Disable @@ -275,7 +275,7 @@ void test_pwr_process_get_status_parameters_data_solaraccessible(void) void test_pwr_process_get_status_parameters_data_extavailable(void) { uint8_t powerStatus = 0; - uint8_t index = 0x04; // Ext Batt availability + uint8_t index = 0x04; // Ext Batt availability PWR_GpioPins[0x55] = 0x1; // PoE Disable PWR_GpioPins[0x1E] = 0x1; // Aux/solar Disable SX1509_regs[0x10] = 0x08; // Int Batt OFF, Ext batt ON @@ -291,7 +291,7 @@ void test_pwr_process_get_status_parameters_data_extavailable(void) void test_pwr_process_get_status_parameters_data_extaccessible(void) { uint8_t powerStatus = 0; - uint8_t index = 0x05; // Ext Batt accessibility + uint8_t index = 0x05; // Ext Batt accessibility PWR_GpioPins[0x55] = 0x1; // PoE Disable PWR_GpioPins[0x1E] = 0x1; // Aux/solar Disable SX1509_regs[0x10] = 0x08; // Int Batt OFF, Ext batt ON @@ -307,7 +307,7 @@ void test_pwr_process_get_status_parameters_data_extaccessible(void) void test_pwr_process_get_status_parameters_data_intavailable(void) { uint8_t powerStatus = 0; - uint8_t index = 0x06; // Int Batt Availability + uint8_t index = 0x06; // Int Batt Availability PWR_GpioPins[0x55] = 0x1; // PoE Disable PWR_GpioPins[0x1E] = 0x1; // Aux/solar Disable SX1509_regs[0x10] = 0x10; // Ext Batt OFF, Int batt ON @@ -323,7 +323,7 @@ void test_pwr_process_get_status_parameters_data_intavailable(void) void test_pwr_process_get_status_parameters_data_intaccessible(void) { uint8_t powerStatus = 0; - uint8_t index = 0x07; // Int Batt Accessibility + uint8_t index = 0x07; // Int Batt Accessibility PWR_GpioPins[0x55] = 0x1; // PoE Disable PWR_GpioPins[0x1E] = 0x1; // Aux/solar Disable SX1509_regs[0x10] = 0x10; // Ext Batt OFF, Int batt ON diff --git a/firmware/ec/test/suites/Test_sx1509.c b/firmware/ec/test/suites/Test_sx1509.c index c165d4a112..babde3776e 100644 --- a/firmware/ec/test/suites/Test_sx1509.c +++ b/firmware/ec/test/suites/Test_sx1509.c @@ -229,7 +229,7 @@ void test_ioexp_led_inputbuffer(void) /* Test setting input buffer values */ TEST_ASSERT_EQUAL(RETURN_OK, ioexp_led_config_inputbuffer( &s_sx1509_dev, SX1509_REG_AB, 0x55, - 0xAA)); // LSB(Reg A), LSB(Reg B) + 0xAA)); // LSB(Reg A), LSB(Reg B) TEST_ASSERT_EQUAL_HEX8(0x55, SX1509_regs[0x01]); // Reg A TEST_ASSERT_EQUAL_HEX8(0xAA, SX1509_regs[0x00]); // Reg B @@ -244,7 +244,7 @@ void test_ioexp_led_pullup(void) /* Test setting pull up values */ TEST_ASSERT_EQUAL( RETURN_OK, ioexp_led_config_pullup(&s_sx1509_dev, SX1509_REG_AB, 0x27, - 0x82)); // LSB(Reg A), MSB(Reg B) + 0x82)); // LSB(Reg A), MSB(Reg B) TEST_ASSERT_EQUAL_HEX8(0x27, SX1509_regs[0x07]); // Reg A TEST_ASSERT_EQUAL_HEX8(0x82, SX1509_regs[0x06]); // Reg B @@ -274,7 +274,7 @@ void test_ioexp_led_opendrain(void) /* Test setting open drain values */ TEST_ASSERT_EQUAL(RETURN_OK, ioexp_led_config_opendrain( &s_sx1509_dev, SX1509_REG_AB, 0x45, - 0x54)); // LSB(Reg A), MSB(Reg B) + 0x54)); // LSB(Reg A), MSB(Reg B) TEST_ASSERT_EQUAL_HEX8(0x45, SX1509_regs[0x0B]); // Reg A TEST_ASSERT_EQUAL_HEX8(0x54, SX1509_regs[0x0A]); // Reg B @@ -289,7 +289,7 @@ void test_ioexp_led_data_direction(void) /* Test setting data direction values */ TEST_ASSERT_EQUAL(RETURN_OK, ioexp_led_config_data_direction( &s_sx1509_dev, SX1509_REG_AB, 0xAB, - 0xD9)); // LSB(Reg A), MSB(Reg B) + 0xD9)); // LSB(Reg A), MSB(Reg B) TEST_ASSERT_EQUAL_HEX8(0xAB, SX1509_regs[0x0F]); // Reg A TEST_ASSERT_EQUAL_HEX8(0xD9, SX1509_regs[0x0E]); // Reg B @@ -364,7 +364,7 @@ void test_ioexp_led_enable_leddriver(void) /* Test setting led driver values */ TEST_ASSERT_EQUAL(RETURN_OK, ioexp_led_enable_leddriver( &s_sx1509_dev, SX1509_REG_AB, 0x52, - 0xF8)); // LSB(Reg A), MSB(Reg B) + 0xF8)); // LSB(Reg A), MSB(Reg B) TEST_ASSERT_EQUAL_HEX8(0x52, SX1509_regs[0x21]); // Reg A TEST_ASSERT_EQUAL_HEX8(0xF8, SX1509_regs[0x20]); // Reg B @@ -395,7 +395,7 @@ void test_ioexp_led_interrupt(void) /* Test setting interrupt values */ TEST_ASSERT_EQUAL(RETURN_OK, ioexp_led_config_interrupt( &s_sx1509_dev, SX1509_REG_AB, 0x27, - 0x28)); // LSB(Reg A), MSB(Reg B) + 0x28)); // LSB(Reg A), MSB(Reg B) TEST_ASSERT_EQUAL_HEX8(0x27, SX1509_regs[0x13]); // Reg A TEST_ASSERT_EQUAL_HEX8(0x28, SX1509_regs[0x12]); // Reg B @@ -411,7 +411,7 @@ void test_ioexp_led_edge_sense_A(void) /* Rising edge */ TEST_ASSERT_EQUAL(RETURN_OK, ioexp_led_config_edge_sense_A( &s_sx1509_dev, SX1509_REG_AB, 0x55, - 0x55)); // Low(Reg A), High(Reg A) + 0x55)); // Low(Reg A), High(Reg A) TEST_ASSERT_EQUAL_HEX8(0x55, SX1509_regs[0x17]); // Low Reg A TEST_ASSERT_EQUAL_HEX8(0x55, SX1509_regs[0x16]); // High Reg A @@ -434,7 +434,7 @@ void test_ioexp_led_edge_sense_B(void) /* Falling edge */ TEST_ASSERT_EQUAL(RETURN_OK, ioexp_led_config_edge_sense_B( &s_sx1509_dev, SX1509_REG_AB, 0xAA, - 0xAA)); // Low(Reg B), High(Reg B) + 0xAA)); // Low(Reg B), High(Reg B) TEST_ASSERT_EQUAL_HEX8(0xAA, SX1509_regs[0x15]); // Low Reg B TEST_ASSERT_EQUAL_HEX8(0xAA, SX1509_regs[0x14]); // High Reg B