Merge pull request #584 from soby-mathew/sm/enable_scr_sif

Enable SCR_EL3.SIF bit
This commit is contained in:
danh-arm
2016-04-07 17:17:25 +01:00
2 changed files with 7 additions and 4 deletions

View File

@@ -70,11 +70,12 @@
isb
/* ---------------------------------------------------------------------
* Early set RES1 bits in SCR_EL3. Set EA bit as well to catch both
* External Aborts and SError Interrupts in EL3.
* Early set RES1 bits in SCR_EL3. Set EA bit to catch both
* External Aborts and SError Interrupts in EL3 and also the SIF bit
* to disable instruction fetches from Non-secure memory.
* ---------------------------------------------------------------------
*/
mov x0, #(SCR_RES1_BITS | SCR_EA_BIT)
mov x0, #(SCR_RES1_BITS | SCR_EA_BIT | SCR_SIF_BIT)
msr scr_el3, x0
/* ---------------------------------------------------------------------
* Enable External Aborts and SError Interrupts now that the exception