From 80b997dc276b099714e1c5b6eeea02adbae44081 Mon Sep 17 00:00:00 2001 From: Kyoung Kim Date: Mon, 2 Nov 2015 09:56:01 -0800 Subject: [PATCH] mec1322: fix gpio_disable_interrupt MEC1322_INT_DISABLE(interrupt enable clear register) is 'Write 1 to Clear' for each bit. To disable interrupt for specific GPIO pin, only specific bit should be written with 1. BUG=NONE BRANCH=NONE TEST=NONE Change-Id: Ibf40a20656c4c99f9625b516cff3e7da9bf2f69d Signed-off-by: Kyoung Kim Reviewed-on: https://chromium-review.googlesource.com/309979 Commit-Ready: Kyoung Il Kim Tested-by: Kyoung Il Kim Reviewed-by: Shawn N --- chip/mec1322/gpio.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/chip/mec1322/gpio.c b/chip/mec1322/gpio.c index fe1bf89fd6..0d59dc5849 100644 --- a/chip/mec1322/gpio.c +++ b/chip/mec1322/gpio.c @@ -168,7 +168,7 @@ int gpio_disable_interrupt(enum gpio_signal signal) girq_id = int_map[port].girq_id; bit_id = (port - int_map[port].port_offset) * 8 + i; - MEC1322_INT_DISABLE(girq_id) |= (1 << bit_id); + MEC1322_INT_DISABLE(girq_id) = (1 << bit_id); return EC_SUCCESS; }