From 93de08545556296ea6e99ccf1dcc9a20ae286037 Mon Sep 17 00:00:00 2001 From: Shawn Nematbakhsh Date: Tue, 26 Jul 2016 13:07:13 -0700 Subject: [PATCH] kevin / gru: Increase size of code RAM Reduce size of UART Tx buffer to 1024 bytes on all npcx platforms and increase size of code memory by 6K bytes on Kevin. BUG=chrome-os-partner:52876 BRANCH=None TEST=`make buildall -j` with subsequent commit. Signed-off-by: Shawn Nematbakhsh Change-Id: Ib9e52a4406f84cfc434984f8819d7ef02b70beb4 Reviewed-on: https://chromium-review.googlesource.com/363591 Commit-Ready: Shawn N Tested-by: Shawn N Reviewed-by: Aseda Aboagye --- board/kevin/board.h | 6 +++--- chip/npcx/config_chip.h | 2 +- 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/board/kevin/board.h b/board/kevin/board.h index 5d0169ef1d..a840a30d12 100644 --- a/board/kevin/board.h +++ b/board/kevin/board.h @@ -28,10 +28,10 @@ #define CONFIG_SYSTEM_UNLOCKED /* Allow dangerous commands for testing */ /* - * We are code space-constrained on kevin, so take 4K that is normally used - * as data RAM (was 30K, now 26K) and use it for code RAM (was 96K, now 100K) + * We are code space-constrained on kevin, so take 10K that is normally used + * as data RAM (was 30K, now 20K) and use it for code RAM (was 96K, now 106K) */ -#define RAM_SHIFT_SIZE (4 * 1024) +#define RAM_SHIFT_SIZE (10 * 1024) #undef CONFIG_RO_SIZE #define CONFIG_RO_SIZE (NPCX_PROGRAM_MEMORY_SIZE + RAM_SHIFT_SIZE) #undef CONFIG_RAM_BASE diff --git a/chip/npcx/config_chip.h b/chip/npcx/config_chip.h index ff5264ec75..1442a58d50 100644 --- a/chip/npcx/config_chip.h +++ b/chip/npcx/config_chip.h @@ -17,7 +17,7 @@ /* Use a bigger console output buffer */ #undef CONFIG_UART_TX_BUF_SIZE -#define CONFIG_UART_TX_BUF_SIZE 8192 +#define CONFIG_UART_TX_BUF_SIZE 1024 /* * Interval between HOOK_TICK notifications