From afae611999a426fb156e2e02349d5a4f21229f47 Mon Sep 17 00:00:00 2001 From: Dino Li Date: Tue, 4 Aug 2015 10:32:03 +0800 Subject: [PATCH] it8380dev: change PNPCFG base address to 4E/4F Always reserved 2E/2F for super I/O. This can avoid conflict with super I/O base address. Signed-off-by: Dino Li BRANCH=none BUG=none TEST=make buildall -j Change-Id: I67a37355e320e289fb1f58c7356a1592f7645d21 Reviewed-on: https://chromium-review.googlesource.com/290087 Reviewed-by: Randall Spangler Commit-Queue: Dino Li Tested-by: Dino Li --- chip/it83xx/lpc.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/chip/it83xx/lpc.c b/chip/it83xx/lpc.c index c0aae46de0..c8ff8d0109 100644 --- a/chip/it83xx/lpc.c +++ b/chip/it83xx/lpc.c @@ -528,8 +528,8 @@ static void lpc_init(void) IT83XX_GPIO_GCR = 0x06; - /* The register pair to access PNPCFG is 002Eh and 002Fh */ - IT83XX_GCTRL_BADRSEL = 0x00; + /* The register pair to access PNPCFG is 004Eh and 004Fh */ + IT83XX_GCTRL_BADRSEL = 0x01; /* Disable KBC IRQ */ IT83XX_KBC_KBIRQR = 0x00;