diff --git a/chip/mec1322/clock.c b/chip/mec1322/clock.c
index ccc7670acc..9cef11686f 100644
--- a/chip/mec1322/clock.c
+++ b/chip/mec1322/clock.c
@@ -178,9 +178,9 @@ static void prepare_for_deep_sleep(void)
 	MEC1322_TMR16_CTL(0) &= ~1;
 
 	MEC1322_PCR_CHIP_SLP_EN |= 0x3;
-	MEC1322_PCR_EC_SLP_EN = 0xFFFFFFFF;
-	MEC1322_PCR_HOST_SLP_EN = 0xFFFFFFFF;
-	MEC1322_PCR_EC_SLP_EN2 = 0xFFFFFFFF;
+	MEC1322_PCR_EC_SLP_EN |= MEC1322_PCR_EC_SLP_EN_SLEEP;
+	MEC1322_PCR_HOST_SLP_EN |= MEC1322_PCR_HOST_SLP_EN_SLEEP;
+	MEC1322_PCR_EC_SLP_EN2 |= MEC1322_PCR_EC_SLP_EN2_SLEEP;
 
 	MEC1322_LPC_ACT = 0x0;
 	MEC1322_LPC_CLK_CTRL |= 0x2;
@@ -211,9 +211,9 @@ static void resume_from_deep_sleep(void)
 
 	MEC1322_PCR_SLOW_CLK_CTL |= 0x1e0;
 	MEC1322_PCR_CHIP_SLP_EN &= ~0x3;
-	MEC1322_PCR_EC_SLP_EN &= ~0xe0700ff7;
-	MEC1322_PCR_HOST_SLP_EN &= ~0x5f003;
-	MEC1322_PCR_EC_SLP_EN2 &= ~0x1ffffff8;
+	MEC1322_PCR_EC_SLP_EN &= MEC1322_PCR_EC_SLP_EN_WAKE;
+	MEC1322_PCR_HOST_SLP_EN &= MEC1322_PCR_HOST_SLP_EN_WAKE;
+	MEC1322_PCR_EC_SLP_EN2 &= MEC1322_PCR_EC_SLP_EN2_WAKE;
 
 	MEC1322_PCR_SYS_SLP_CTL = 0xF8;  /* default */
 
diff --git a/chip/mec1322/registers.h b/chip/mec1322/registers.h
index 6854735fd5..be2d5f4a90 100644
--- a/chip/mec1322/registers.h
+++ b/chip/mec1322/registers.h
@@ -25,12 +25,24 @@
 #define MEC1322_PCR_CHIP_SLP_EN  REG32(MEC1322_PCR_BASE + 0x0)
 #define MEC1322_PCR_CHIP_CLK_REQ REG32(MEC1322_PCR_BASE + 0x4)
 #define MEC1322_PCR_EC_SLP_EN    REG32(MEC1322_PCR_BASE + 0x8)
+/* Command all blocks to sleep */
+#define  MEC1322_PCR_EC_SLP_EN_SLEEP	0xe0700ff7
+/* Allow all blocks to request clocks */
+#define  MEC1322_PCR_EC_SLP_EN_WAKE	(~0xe0700ff7)
 #define MEC1322_PCR_EC_CLK_REQ   REG32(MEC1322_PCR_BASE + 0xc)
 #define MEC1322_PCR_HOST_SLP_EN  REG32(MEC1322_PCR_BASE + 0x10)
+/* Command all blocks to sleep */
+#define  MEC1322_PCR_HOST_SLP_EN_SLEEP	0x5f003
+/* Allow all blocks to request clocks */
+#define  MEC1322_PCR_HOST_SLP_EN_WAKE	(~0x5f003)
 #define MEC1322_PCR_HOST_CLK_REQ REG32(MEC1322_PCR_BASE + 0x14)
 #define MEC1322_PCR_SYS_SLP_CTL  REG32(MEC1322_PCR_BASE + 0x18)
 #define MEC1322_PCR_PROC_CLK_CTL REG32(MEC1322_PCR_BASE + 0x20)
 #define MEC1322_PCR_EC_SLP_EN2   REG32(MEC1322_PCR_BASE + 0x24)
+/* Mask to command all blocks to sleep */
+#define  MEC1322_PCR_EC_SLP_EN2_SLEEP	0x1ffffff8
+/* Allow all blocks to request clocks */
+#define  MEC1322_PCR_EC_SLP_EN2_WAKE	(~0x03fffff8)
 #define MEC1322_PCR_EC_CLK_REQ2  REG32(MEC1322_PCR_BASE + 0x28)
 #define MEC1322_PCR_SLOW_CLK_CTL REG32(MEC1322_PCR_BASE + 0x2c)
 #define MEC1322_PCR_CHIP_OSC_ID  REG32(MEC1322_PCR_BASE + 0x30)
diff --git a/chip/mec1322/system.c b/chip/mec1322/system.c
index 398b5262eb..ce25c87620 100644
--- a/chip/mec1322/system.c
+++ b/chip/mec1322/system.c
@@ -329,9 +329,9 @@ void system_hibernate(uint32_t seconds, uint32_t microseconds)
 
 	/* Disable blocks */
 	MEC1322_PCR_CHIP_SLP_EN |= 0x3;
-	MEC1322_PCR_EC_SLP_EN |= 0xe0700ff7;
-	MEC1322_PCR_HOST_SLP_EN |= 0x5f003;
-	MEC1322_PCR_EC_SLP_EN2 |= 0x1ffffff8;
+	MEC1322_PCR_EC_SLP_EN |= MEC1322_PCR_EC_SLP_EN_SLEEP;
+	MEC1322_PCR_HOST_SLP_EN |= MEC1322_PCR_HOST_SLP_EN_SLEEP;
+	MEC1322_PCR_EC_SLP_EN2 |= MEC1322_PCR_EC_SLP_EN2_SLEEP;
 	MEC1322_PCR_SLOW_CLK_CTL &= 0xfffffc00;
 
 	/* Set sleep state */
@@ -394,9 +394,9 @@ void system_hibernate(uint32_t seconds, uint32_t microseconds)
 	/* Enable blocks */
 	MEC1322_PCR_SLOW_CLK_CTL |= 0x1e0;
 	MEC1322_PCR_CHIP_SLP_EN &= ~0x3;
-	MEC1322_PCR_EC_SLP_EN &= ~0xe0700ff7;
-	MEC1322_PCR_HOST_SLP_EN &= ~0x5f003;
-	MEC1322_PCR_EC_SLP_EN2 &= ~0x1ffffff8;
+	MEC1322_PCR_EC_SLP_EN &= MEC1322_PCR_EC_SLP_EN_WAKE;
+	MEC1322_PCR_HOST_SLP_EN &= MEC1322_PCR_HOST_SLP_EN_WAKE;
+	MEC1322_PCR_EC_SLP_EN2 &= MEC1322_PCR_EC_SLP_EN2_WAKE;
 
 	/* Enable timer */
 	MEC1322_TMR32_CTL(0) |= 1;