Move flash persistent state to flash_common

Persistent state is needed by all platforms to hold the
protect-ro-at-boot flag.  STM32F100 and LM4 implementations were
near-identical, and are now common code (with one #ifdef to handle the
single place where they weren't).

STM32L doesn't use pstate yet, but it'll need to.  I can't simply
store the protect-ro-at-boot flag inside the WRP registers themselves
because they're still writable in EC-RW.  The change to STM32L to use
pstate is coming next.

BUG=chrome-os-partner:15613
BRANCH=none
TEST=build pit, link, spring; on link and spring, do

 - flashinfo -> (no flags)
 - enable WP (via screw or dut-control)
 - flashinfo -> wp_gpio_asserted
 - flashwp enable
 - flashinfo -> wp_gpio_asserted ro_at_boot
 - flashwp now
 - flashinfo -> wp_gpio_asserted ro_at_boot all_now (and possibly ro_now)
 - flashwp disable -> fails
 - flashinfo -> wp_gpio_asserted ro_at_boot all_now
 - reboot ap-off
 - flashinfo -> wp_gpio_asserted ro_at_boot ro_now
 - disable WP (via screw or dut-control)
 - reboot
 - flashinfo -> ro_at_boot
 - flashwp disable
 - flashinfo -> (no flags)

(Note that on Spring you'll need to 'forceen on' before enabling WP,
or the console will be disabled once you enable ro_at_boot and reboot.)

Change-Id: I415388b98ec8bf1d149803aaaa7fe8c7f3076c36
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/56064
This commit is contained in:
Randall Spangler
2013-05-20 15:14:01 -07:00
committed by ChromeBot
parent aa419b29ac
commit bd8fec9bae
7 changed files with 194 additions and 264 deletions

View File

@@ -11,6 +11,23 @@
#include "common.h"
#include "ec_commands.h" /* For EC_FLASH_PROTECT_* flags */
/* Number of physical flash banks */
#define PHYSICAL_BANKS (CONFIG_FLASH_PHYSICAL_SIZE / CONFIG_FLASH_BANK_SIZE)
/* Read-only firmware offset and size in units of flash banks */
#define RO_BANK_OFFSET (CONFIG_SECTION_RO_OFF / CONFIG_FLASH_BANK_SIZE)
#define RO_BANK_COUNT (CONFIG_SECTION_RO_SIZE / CONFIG_FLASH_BANK_SIZE)
/* Read-write firmware offset and size in units of flash banks */
#define RW_BANK_OFFSET (CONFIG_SECTION_RW_OFF / CONFIG_FLASH_BANK_SIZE)
#define RW_BANK_COUNT (CONFIG_SECTION_RW_SIZE / CONFIG_FLASH_BANK_SIZE)
/* Persistent protection state flash offset / size / bank */
#define PSTATE_OFFSET CONFIG_SECTION_FLASH_PSTATE_OFF
#define PSTATE_SIZE CONFIG_SECTION_FLASH_PSTATE_SIZE
#define PSTATE_BANK (PSTATE_OFFSET / CONFIG_FLASH_BANK_SIZE)
#define PSTATE_BANK_COUNT (PSTATE_SIZE / CONFIG_FLASH_BANK_SIZE)
/*****************************************************************************/
/* Low-level methods, for use by flash_common. */
@@ -70,6 +87,17 @@ int flash_physical_erase(int offset, int size);
*/
int flash_physical_get_protect(int bank);
/**
* Set physical write protect status for the next boot.
*
* @param start_bank Start bank
* @param bank_count Number of banks to protect
* @param enable Enable (non-zero) or disable (zero) protection
* @return non-zero if error.
*/
int flash_physical_set_protect_at_boot(int start_bank, int bank_count,
int enable);
/**
* Force reload of flash protection bits.
*
@@ -81,6 +109,27 @@ int flash_physical_get_protect(int bank);
*/
int flash_physical_force_reload(void);
/*****************************************************************************/
/* Low-level persistent state code for use by flash modules. */
/**
* Return non-zero if RO flash should be protected at boot.
*/
int flash_get_protect_ro_at_boot(void);
/**
* Enable write protect for the read-only code.
*
* Once write protect is enabled, it will STAY enabled until the system is
* hard-rebooted with the hardware write protect pin deasserted. If the write
* protect pin is deasserted, the protect setting is ignored, and the entire
* flash will be writable.
*
* @param enable Enable write protection
* @return EC_SUCCESS, or nonzero if error.
*/
int flash_protect_ro_at_boot(int enable);
/*****************************************************************************/
/* High-level interface for use by other modules. */