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power: rk3399: Adjust power-down sequencing delays

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BUG=chrome-os-partner:58474
BRANCH=gru
TEST=suspend_stress_test on kevin for 50 cycles.

Change-Id: Ice721e04c6d4389520f40c4ca72f5bec0e1bdb5b
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/399992
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/403459
Commit-Ready: Shawn N <shawnn@chromium.org>
Tested-by: Shawn N <shawnn@chromium.org>
This commit is contained in:
Shawn Nematbakhsh
2016-10-19 14:57:18 -07:00
committed by chrome-bot
parent ea1a8699e9
commit c2d60f53bc
1 changed files with 10 additions and 12 deletions
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22
power/rk3399.c
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@@ -278,34 +278,32 @@ enum power_state power_handle_state(enum power_state state)
hook_notify(HOOK_CHIPSET_SUSPEND);
CHECK_ABORTED_SUSPEND();
msleep(10);
msleep(20);
CHECK_ABORTED_SUSPEND();
gpio_set_level(GPIO_PP1800_SENSOR_EN_L, 1);
gpio_set_level(GPIO_PP1800_SIXAXIS_EN_L, 1);
gpio_set_level(GPIO_PP3300_S0_EN_L, 1);
msleep(10);
msleep(20);
CHECK_ABORTED_SUSPEND();
gpio_set_level(GPIO_PP1800_S0_EN_L, 1);
msleep(10);
msleep(1);
CHECK_ABORTED_SUSPEND();
gpio_set_level(GPIO_AP_CORE_EN, 0);
msleep(10);
msleep(20);
CHECK_ABORTED_SUSPEND();
gpio_set_level(GPIO_PP1800_AP_AVDD_EN_L, 1);
msleep(10);
msleep(1);
CHECK_ABORTED_SUSPEND();
gpio_set_level(GPIO_PP900_DDRPLL_EN, 0);
msleep(10);
msleep(1);
CHECK_ABORTED_SUSPEND();
gpio_set_level(GPIO_PPVAR_CLOGIC_EN, 0);
msleep(10);
CHECK_ABORTED_SUSPEND();
/*
* Enable idle task deep sleep. Allow the low power idle task
@@ -332,17 +330,17 @@ enum power_state power_handle_state(enum power_state state)
gpio_set_level(GPIO_PP3300_TRACKPAD_EN_L, 1);
gpio_set_level(GPIO_PP5000_EN, 0);
gpio_set_level(GPIO_PP3300_USB_EN_L, 1);
msleep(10);
msleep(20);
gpio_set_level(GPIO_PP1800_USB_EN_L, 1);
msleep(2);
msleep(10);
gpio_set_level(GPIO_LPDDR_PWR_EN, 0);
msleep(2);
msleep(20);
gpio_set_level(GPIO_PP1800_PMU_EN_L, 1);
msleep(2);
gpio_set_level(GPIO_PP900_USB_EN, 0);
gpio_set_level(GPIO_PP900_PLL_EN, 0);
gpio_set_level(GPIO_PP900_PMU_EN, 0);
msleep(2);
msleep(6);
gpio_set_level(GPIO_PP900_PCIE_EN, 0);
gpio_set_level(GPIO_PP900_AP_EN, 0);
gpio_set_level(GPIO_PPVAR_LOGIC_EN, 0);