diff --git a/chip/stm32/registers.h b/chip/stm32/registers.h
index cc8f6598e5..a99852b73d 100644
--- a/chip/stm32/registers.h
+++ b/chip/stm32/registers.h
@@ -194,6 +194,7 @@
 #define STM32_USART_CR3_DMAR		(1 << 6)
 #define STM32_USART_CR3_DMAT		(1 << 7)
 #define STM32_USART_CR3_ONEBIT		(1 << 11)
+#define STM32_USART_CR3_OVRDIS		(1 << 12)
 #define STM32_USART_CR3_WUS_START_BIT	(2 << 20)
 #define STM32_USART_CR3_WUFIE		(1 << 22)
 #define STM32_USART_BRR(base)      STM32_USART_REG(base, 0x0C)
diff --git a/chip/stm32/uart.c b/chip/stm32/uart.c
index d0240966f2..3544b95efe 100644
--- a/chip/stm32/uart.c
+++ b/chip/stm32/uart.c
@@ -288,7 +288,13 @@ void uart_init(void)
 	 * so clear UE first.
 	 */
 	STM32_USART_CR1(UARTN_BASE) &= ~STM32_USART_CR1_UE;
-	STM32_USART_CR3(UARTN_BASE) |= STM32_USART_CR3_WUS_START_BIT;
+
+	/*
+	 * Also disable the RX overrun interrupt, since we don't care about it
+	 * and we don't want to clear an extra flag in the interrupt
+	 */
+	STM32_USART_CR3(UARTN_BASE) |= STM32_USART_CR3_WUS_START_BIT |
+	                               STM32_USART_CR3_OVRDIS;
 #endif
 
 	/*
diff --git a/chip/stm32/usart.c b/chip/stm32/usart.c
index 8affbebf08..264fa35a75 100644
--- a/chip/stm32/usart.c
+++ b/chip/stm32/usart.c
@@ -89,7 +89,7 @@ void usart_init(struct usart_config const *config)
 				 STM32_USART_CR1_RE |
 				 STM32_USART_CR1_RXNEIE);
 	STM32_USART_CR2(base) = 0x0000;
-	STM32_USART_CR3(base) = 0x0000;
+	STM32_USART_CR3(base) = STM32_USART_CR3_OVRDIS;
 
 	/*
 	 * Enable the variant specific HW.