From df50fccf8e87bbf0328e58bd012b577bd4c7658a Mon Sep 17 00:00:00 2001 From: ChromeOS Developer Date: Wed, 11 Dec 2013 14:40:30 -0800 Subject: [PATCH] Change PECI_TJMAX to a board config option BUG=chrome-os-partner:24455 BRANCH=none TEST=Manual: Verify that CONIFG_PECI_TJMAX set per-board matches the value queried over the PECI bus with the restricted "peciprobe" command. Change-Id: I8e99a23a66f26d6101e01cc751d0a8ca79686321 Signed-off-by: Dave Parker Reviewed-on: https://chromium-review.googlesource.com/179682 Reviewed-by: Alec Berg --- board/falco/board.h | 1 + board/link/board.h | 1 + board/peppy/board.h | 1 + board/samus/board.h | 1 + chip/lm4/peci.c | 17 ++++------------- include/config.h | 9 +++++++++ 6 files changed, 17 insertions(+), 13 deletions(-) diff --git a/board/falco/board.h b/board/falco/board.h index a9af0ddef3..dd47dca788 100644 --- a/board/falco/board.h +++ b/board/falco/board.h @@ -25,6 +25,7 @@ #define CONFIG_KEYBOARD_BOARD_CONFIG #define CONFIG_KEYBOARD_PROTOCOL_8042 #define CONFIG_LOW_POWER_IDLE +#define CONFIG_PECI_TJMAX 100 #define CONFIG_POWER_BUTTON #define CONFIG_POWER_BUTTON_X86 #define CONFIG_SWITCH_DEDICATED_RECOVERY diff --git a/board/link/board.h b/board/link/board.h index 1443154247..c99e6c16ef 100644 --- a/board/link/board.h +++ b/board/link/board.h @@ -27,6 +27,7 @@ #define CONFIG_KEYBOARD_PROTOCOL_8042 #define CONFIG_LED_DRIVER_DS2413 #define CONFIG_ONEWIRE +#define CONFIG_PECI_TJMAX 105 #define CONFIG_POWER_BUTTON #define CONFIG_POWER_BUTTON_X86 #define CONFIG_PWM diff --git a/board/peppy/board.h b/board/peppy/board.h index 61b79b320d..b10330dfe1 100644 --- a/board/peppy/board.h +++ b/board/peppy/board.h @@ -27,6 +27,7 @@ #define CONFIG_KEYBOARD_PROTOCOL_8042 #define CONFIG_LED_COMMON #define CONFIG_LOW_POWER_IDLE +#define CONFIG_PECI_TJMAX 100 #define CONFIG_POWER_BUTTON #define CONFIG_POWER_BUTTON_X86 #define CONFIG_SWITCH_DEDICATED_RECOVERY diff --git a/board/samus/board.h b/board/samus/board.h index 09daf86757..7496b97958 100644 --- a/board/samus/board.h +++ b/board/samus/board.h @@ -38,6 +38,7 @@ #define CONFIG_CHARGER_SENSE_RESISTOR_AC 10 #define CONFIG_CHARGER_INPUT_CURRENT 2000 #define CONFIG_FANS 2 +#define CONFIG_PECI_TJMAX 100 #define CONFIG_PWM #define CONFIG_PWM_KBLIGHT #define CONFIG_SWITCH_DEDICATED_RECOVERY diff --git a/chip/lm4/peci.c b/chip/lm4/peci.c index d66956202b..052e2ddc06 100644 --- a/chip/lm4/peci.c +++ b/chip/lm4/peci.c @@ -16,15 +16,6 @@ #include "temp_sensor.h" #include "util.h" -/* - * Max junction temperature for processor in degrees C. This is correct for - * Ivy Bridge and Haswell; future chips don't have PECI. - * - * In theory we could read TjMax from the processor via PECI, but that requires - * closed-source Intel PECI commands. - */ -#define PECI_TJMAX 105 - /* Initial PECI baud rate */ #define PECI_BAUD_RATE 100000 @@ -79,9 +70,9 @@ int peci_temp_sensor_get_val(int idx, int *temp_ptr) * Require at least two valid samples. When the AP transitions into S0, * it is possible, depending on the timing of the PECI sample, to read * an invalid temperature. This is very rare, but when it does happen - * the temperature returned is PECI_TJMAX. Requiring two valid samples - * here assures us that one bad maximum temperature reading when - * entering S0 won't cause us to trigger an over temperature. + * the temperature returned is CONFIG_PECI_TJMAX. Requiring two valid + * samples here assures us that one bad maximum temperature reading + * when entering S0 won't cause us to trigger an over temperature. */ if (success_cnt < 2) return EC_ERROR_UNKNOWN; @@ -117,7 +108,7 @@ static void peci_freq_changed(void) (PECI_POLL_INTERVAL_MS * (freq / 1000 / 4096)); /* Set up temperature monitoring to report in degrees K */ - LM4_PECI_CTL = ((PECI_TJMAX + 273) << 22) | 0x0001 | + LM4_PECI_CTL = ((CONFIG_PECI_TJMAX + 273) << 22) | 0x0001 | (PECI_RETRY_COUNT << 12) | (PECI_ERROR_BYPASS << 11); } diff --git a/include/config.h b/include/config.h index c1d5c351cd..d3c749c92c 100644 --- a/include/config.h +++ b/include/config.h @@ -524,6 +524,15 @@ /* Support PECI interface to x86 processor */ #undef CONFIG_PECI +/* + * Maximum operating temperature in degrees Celcius used on some x86 + * processors. CPU chip temperature is reported relative to this value and + * is never reported greater than this value. Processor asserts PROCHOT# + * and starts throttling frequency and voltage at this temp. Operation may + * become unreliable if temperature exceeds this limit. + */ +#undef CONFIG_PECI_TJMAX + /*****************************************************************************/ /* PMU config */