From e098add1d16436618b355de7b1869a6989827fac Mon Sep 17 00:00:00 2001 From: Nicolas Boichat Date: Fri, 20 Oct 2017 14:36:34 +0800 Subject: [PATCH] npcx/uart: Simplify UART register handling Define NPCX_UART_* macros instead of having so many ifdef NPCX_UART_MODULE2 in the code. Also, do not set NPCX_WKEDG bit in npcx_uart2gpio: instead set it in uart_config just just like NPCX7 does it. BRANCH=none BUG=b:65526215 TEST=On Lux, EC console works, so does pad-switching EC-EC comm. TEST=Flash soraka, using "idlestats", check that EC goes into deep sleep, and that it can be woken up typing in EC console. Signed-off-by: Nicolas Boichat Change-Id: I84b4f980fa79ed43640df4afc23cdc24cca21d99 Reviewed-on: https://chromium-review.googlesource.com/730029 Reviewed-by: Vincent Palatin --- chip/npcx/registers.h | 70 ++++++++++++++++++++++++++----------------- chip/npcx/uart.c | 49 +++++++++++++----------------- 2 files changed, 63 insertions(+), 56 deletions(-) diff --git a/chip/npcx/registers.h b/chip/npcx/registers.h index c79b3d5cbb..42286795c0 100644 --- a/chip/npcx/registers.h +++ b/chip/npcx/registers.h @@ -1792,58 +1792,74 @@ enum { | MASK(A_SIZE)) /******************************************************************************/ -/* Inline functions */ +/* UART registers and functions */ + +#if NPCX_UART_MODULE2 + +#ifdef CHIP_FAMILY_NPCX5 +/* + * To be used as 2nd parameter to NPCX_WK*() macro, table (1st parameter) is + * always 1 == MIWU_TABLE_1. + */ +#define NPCX_UART_WK_GROUP 6 +#define NPCX_UART_WK_BIT 4 +#endif /* CHIP_FAMILY_NPCX5 */ +#define NPCX_UART_MIWU_IRQ NPCX_IRQ_WKINTG_1 +#define NPCX_UART_DEVALT NPCX_DEVALT(0x0C) +#define NPCX_UART_DEVALT_SL NPCX_DEVALTC_UART_SL2 +#define NPCX_UART_ALT_DEVALT NPCX_DEVALT(0x0A) +#define NPCX_UART_ALT_DEVALT_SL NPCX_DEVALTA_UART_SL1 + +#else /* !NPCX_UART_MODULE2 */ + +#ifdef CHIP_FAMILY_NPCX5 +#define NPCX_UART_WK_GROUP 1 +#define NPCX_UART_WK_BIT 0 +#endif /* CHIP_FAMILY_NPCX5 */ +#define NPCX_UART_MIWU_IRQ NPCX_IRQ_WKINTB_1 +#define NPCX_UART_DEVALT NPCX_DEVALT(0x0A) +#define NPCX_UART_DEVALT_SL NPCX_DEVALTA_UART_SL1 +#define NPCX_UART_ALT_DEVALT NPCX_DEVALT(0x0C) +#define NPCX_UART_ALT_DEVALT_SL NPCX_DEVALTC_UART_SL2 + +#endif /* NPCX_UART_MODULE2 */ + +#ifdef CHIP_FAMILY_NPCX7 +#define NPCX_UART_WK_GROUP MIWU_GROUP_8 +#define NPCX_UART_WK_BIT 7 +#endif + /* This routine checks pending bit of GPIO wake-up functionality */ #if defined(CHIP_FAMILY_NPCX5) static inline int uart_is_wakeup_from_gpio(void) { -#if NPCX_UART_MODULE2 - return IS_BIT_SET(NPCX_WKPND(1, 6), 4); -#else - return IS_BIT_SET(NPCX_WKPND(1, 1), 0); -#endif + return IS_BIT_SET(NPCX_WKPND(1, NPCX_UART_WK_GROUP), NPCX_UART_WK_BIT); } /* This routine checks wake-up functionality from GPIO is enabled or not */ static inline int uart_is_enable_wakeup(void) { -#if NPCX_UART_MODULE2 - return IS_BIT_SET(NPCX_WKEN(1, 6), 4); -#else - return IS_BIT_SET(NPCX_WKEN(1, 1), 0); -#endif + return IS_BIT_SET(NPCX_WKEN(1, NPCX_UART_WK_GROUP), NPCX_UART_WK_BIT); } /* This routine clears the pending wake-up from GPIO on UART rx pin */ static inline void uart_clear_pending_wakeup(void) { -#if NPCX_UART_MODULE2 - SET_BIT(NPCX_WKPCL(1, 6), 4); -#else - SET_BIT(NPCX_WKPCL(1, 1), 0); -#endif + SET_BIT(NPCX_WKPCL(1, NPCX_UART_WK_GROUP), NPCX_UART_WK_BIT); } /* This routine enables wake-up functionality from GPIO on UART rx pin */ static inline void uart_enable_wakeup(int enable) { -#if NPCX_UART_MODULE2 - UPDATE_BIT(NPCX_WKEN(1, 6), 4, enable); -#else - UPDATE_BIT(NPCX_WKEN(1, 1), 0, enable); -#endif + UPDATE_BIT(NPCX_WKEN(1, NPCX_UART_WK_GROUP), NPCX_UART_WK_BIT, + enable); } /* This routine checks functionality is UART rx or not */ static inline int npcx_is_uart(void) { -#if NPCX_UART_MODULE2 - return IS_BIT_SET(NPCX_DEVALT(0x0C), NPCX_DEVALTC_UART_SL2); -#else - return IS_BIT_SET(NPCX_DEVALT(0x0A), NPCX_DEVALTA_UART_SL1); -#endif + return IS_BIT_SET(NPCX_UART_DEVALT, NPCX_UART_DEVALT_SL); } - #endif /* Wake pin definitions, defined at board-level */ diff --git a/chip/npcx/uart.c b/chip/npcx/uart.c index 150b1c7cad..3fc166b362 100644 --- a/chip/npcx/uart.c +++ b/chip/npcx/uart.c @@ -58,11 +58,7 @@ static const enum uart_pad pad = UART_DEFAULT_PAD; /* This routine switches the functionality from UART rx to GPIO */ void npcx_uart2gpio(void) { -#if NPCX_UART_MODULE2 - UPDATE_BIT(NPCX_WKEDG(1, 6), 4, 1); -#else - UPDATE_BIT(NPCX_WKEDG(1, 1), 0, 1); -#endif + /* Switch both pads back to GPIO mode. */ CLEAR_BIT(NPCX_DEVALT(0x0C), NPCX_DEVALTC_UART_SL2); CLEAR_BIT(NPCX_DEVALT(0x0A), NPCX_DEVALTA_UART_SL1); } @@ -78,24 +74,21 @@ void npcx_uart2gpio(void) */ void npcx_gpio2uart(void) { - if ((NPCX_UART_MODULE2 && (pad == UART_DEFAULT_PAD)) || - (!NPCX_UART_MODULE2 && (pad == UART_ALTERNATE_PAD))) { - SET_BIT(NPCX_DEVALT(0x0C), NPCX_DEVALTC_UART_SL2); - CLEAR_BIT(NPCX_DEVALT(0x0A), NPCX_DEVALTA_UART_SL1); - } else { - SET_BIT(NPCX_DEVALT(0x0A), NPCX_DEVALTA_UART_SL1); - CLEAR_BIT(NPCX_DEVALT(0x0C), NPCX_DEVALTC_UART_SL2); - - if (pad == UART_DEFAULT_PAD) { -#if defined(CHIP_FAMILY_NPCX7) - /* - * UART module 1 belongs to KSO since wake-up - * functionality in npcx7. - */ - CLEAR_BIT(NPCX_DEVALT(0x09), NPCX_DEVALT9_NO_KSO09_SL); -#endif - } +#ifdef CONFIG_UART_PAD_SWITCH + if (pad == UART_ALTERNATE_PAD) { + SET_BIT(NPCX_UART_ALT_DEVALT, NPCX_UART_ALT_DEVALT_SL); + CLEAR_BIT(NPCX_UART_DEVALT, NPCX_UART_DEVALT_SL); + return; } +#endif + + SET_BIT(NPCX_UART_DEVALT, NPCX_UART_DEVALT_SL); + CLEAR_BIT(NPCX_UART_ALT_DEVALT, NPCX_UART_ALT_DEVALT_SL); + +#if !NPCX_UART_MODULE2 && defined(CHIP_FAMILY_NPCX7) + /* UART module 1 belongs to KSO since wake-up functionality in npcx7. */ + CLEAR_BIT(NPCX_DEVALT(0x09), NPCX_DEVALT9_NO_KSO09_SL); +#endif } int uart_init_done(void) @@ -361,18 +354,16 @@ static void uart_config(void) gpio_config_module(MODULE_UART, 1); /* Enable MIWU IRQ of UART */ -#if NPCX_UART_MODULE2 - task_enable_irq(NPCX_IRQ_WKINTG_1); -#else - task_enable_irq(NPCX_IRQ_WKINTB_1); -#endif + task_enable_irq(NPCX_UART_MIWU_IRQ); + +#ifdef CONFIG_LOW_POWER_IDLE /* * Configure the UART wake-up event triggered from a falling edge * on CR_SIN pin. */ -#if defined(CHIP_FAMILY_NPCX7) && defined(CONFIG_LOW_POWER_IDLE) - SET_BIT(NPCX_WKEDG(MIWU_TABLE_1, MIWU_GROUP_8), 7); + SET_BIT(NPCX_WKEDG(1, NPCX_UART_WK_GROUP), NPCX_UART_WK_BIT); #endif + /* * If apb2's clock is not 15MHz, we need to find the other optimized * values of UPSR and UBAUD for baud rate 115200.