From edc50a42959ab4a862dcd3b1b9c8b409e23383ea Mon Sep 17 00:00:00 2001 From: Randall Spangler Date: Thu, 5 Jan 2012 14:18:11 -0800 Subject: [PATCH] Add openocd config files Signed-off-by: Randall Spangler BUG=none TEST=none Change-Id: I211d23d61db37d7ed40621276f456e6935462c3d --- chip/lm4/openocd/lm4x.cfg | 31 +++++++++++++++++++++++++++++++ chip/lm4/openocd/openocd.cfg | 7 +++++++ 2 files changed, 38 insertions(+) create mode 100644 chip/lm4/openocd/lm4x.cfg create mode 100644 chip/lm4/openocd/openocd.cfg diff --git a/chip/lm4/openocd/lm4x.cfg b/chip/lm4/openocd/lm4x.cfg new file mode 100644 index 0000000000..8d9ff64ca2 --- /dev/null +++ b/chip/lm4/openocd/lm4x.cfg @@ -0,0 +1,31 @@ +# Script for TI/Luminary Stellaris LM4F232H (LM4F232H5BB) + +if { [info exists CHIPNAME] } { + set _CHIPNAME $CHIPNAME +} else { + set _CHIPNAME lm4f232h +} + +if { [info exists CPUTAPID ] } { + set _CPUTAPID $CPUTAPID +} else { + set _CPUTAPID 0x4ba00477 +} + +#jtag scan chain +jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 1 -irmask 0xf -expected-id $_CPUTAPID + +# the luminary variant causes a software reset rather than asserting SRST +# this stops the debug registers from being cleared +# this will be fixed in later revisions of silicon +set _TARGETNAME $_CHIPNAME.cpu +# TODO(rspangler): variant lm4x? +target create $_TARGETNAME cortex_m3 -chain-position $_CHIPNAME.cpu -variant lm3s + +# 8k working area at base of ram, not backed up +#$_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size 0x2000 +# 12k working area at base of ram, not backed up +$_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size 0x3000 + +#flash configuration +flash bank stellaris 0 0 0 0 $_TARGETNAME diff --git a/chip/lm4/openocd/openocd.cfg b/chip/lm4/openocd/openocd.cfg new file mode 100644 index 0000000000..dd80e12f10 --- /dev/null +++ b/chip/lm4/openocd/openocd.cfg @@ -0,0 +1,7 @@ +telnet_port 4444 +gdb_port 3333 +gdb_memory_map enable +gdb_flash_program enable + +source [find interface/luminary-icdi.cfg] +source [find lm4x.cfg]