From eec896d6d84cf09cbd9f8e400b7851aa72b3ff9c Mon Sep 17 00:00:00 2001
From: Randall Spangler <rspangler@chromium.org>
Date: Tue, 13 Mar 2012 12:53:52 -0700
Subject: [PATCH] Watch LPC0RESET line and print changes

For debugging PCH reset.

Signed-off-by: Randall Spangler <rspangler@chromium.org>

BUG=chrome-os-partner:8397
TEST=power system on, then use x86reset to reset it.  Should see line state changes printed.

Change-Id: Ief2f09bd0986339812183d0b32dc0208437d1103
---
 chip/lm4/lpc.c | 10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/chip/lm4/lpc.c b/chip/lm4/lpc.c
index a8738e57d1..4d60337f81 100644
--- a/chip/lm4/lpc.c
+++ b/chip/lm4/lpc.c
@@ -149,6 +149,10 @@ int lpc_init(void)
 	 * sensible to buffer input anyway. */
 	LM4_LPC_LPCIM |= LM4_LPC_INT_MASK(LPC_CH_COMX, 2);
 
+	/* Unmaksk LPC bus reset interrupt.  This lets us monitor the PCH
+	 * PLTRST# signal for debugging. */
+	LM4_LPC_LPCIM |= (1 << 31);
+
 	/* Enable LPC channels */
 	LM4_LPC_LPCCTL =
 		(1 << LPC_CH_KERNEL) |
@@ -372,6 +376,12 @@ static void lpc_interrupt(void)
 				uart_comx_putc(lpc_comx_get_char());
 		}
 	}
+
+	/* Debugging: print changes to LPC0RESET */
+	if (mis & (1 << 31)) {
+		uart_printf("[LPC PLTRST# %sasserted]\n",
+			    (LM4_LPC_LPCSTS & (1<<10)) ? "" : "de");
+	}
 }
 DECLARE_IRQ(LM4_IRQ_LPC, lpc_interrupt, 2);