From eee7778fcfc5e555d119cff65caa7c045343e356 Mon Sep 17 00:00:00 2001 From: Vincent Palatin Date: Fri, 18 May 2018 15:47:45 +0200 Subject: [PATCH] stm32: use D-cache on STM32H7 Enable the D-cache on STM32H7. Use the ahb4 RAM region as uncached memory for DMA buffers. Mark the serial, SPI and fingerprint DMA buffers as uncached for proper operations. Signed-off-by: Vincent Palatin BRANCH=poppy BUG=b:78535052, b:75068419 TEST=On ZerbleBarn, run fingerprint match. CQ-DEPEND=CL:*616448 Change-Id: Ia33496ebde3508d3427e522cc7ba060829f8f3fd Reviewed-on: https://chromium-review.googlesource.com/1065822 Commit-Ready: ChromeOS CL Exonerator Bot Tested-by: Vincent Palatin Reviewed-by: Nicolas Boichat --- chip/stm32/config-stm32h7x3.h | 9 +++++++++ chip/stm32/memory_regions.inc | 2 +- chip/stm32/spi.c | 5 +++-- common/fpsensor.c | 4 ++-- common/uart_buffering.c | 5 +++-- 5 files changed, 18 insertions(+), 7 deletions(-) diff --git a/chip/stm32/config-stm32h7x3.h b/chip/stm32/config-stm32h7x3.h index 4fde40b957..399e6a6f1a 100644 --- a/chip/stm32/config-stm32h7x3.h +++ b/chip/stm32/config-stm32h7x3.h @@ -62,3 +62,12 @@ /* the Cortex-M7 core has 'standard' ARMv7-M caches */ #define CONFIG_ARMV7M_CACHE +/* Use the MPU to configure cacheability */ +#define CONFIG_MPU +/* Store in uncached buffers for DMA transfers in ahb4 region */ +#define CONFIG_CHIP_UNCACHED_REGION ahb4 +/* Override MPU attribute settings to match the chip requirements */ +/* Code is Normal memory type / non-shareable / write-through */ +#define MPU_ATTR_FLASH_MEMORY 0x02 +/* SRAM Data is Normal memory type / non-shareable / write-back, write-alloc */ +#define MPU_ATTR_INTERNAL_SRAM 0x0B diff --git a/chip/stm32/memory_regions.inc b/chip/stm32/memory_regions.inc index eaa9fc71f3..2381c511f2 100644 --- a/chip/stm32/memory_regions.inc +++ b/chip/stm32/memory_regions.inc @@ -12,5 +12,5 @@ REGION(itcm, wx, 0x00000000, 0x10000) /* CPU ITCM: 64kB */ REGION(dtcm, rw, 0x20000000, 0x20000) /* CPU DTCM: 128kB */ REGION(ahb, rw, 0x30000000, 0x48000) /* AHB-SRAM1-3: 288 kB */ REGION(ahb4, rw, 0x38000000, 0x10000) /* AHB-SRAM4: 64kB */ -REGION(backup, rw, 0x38000000, 0x01000) /* Backup RAM: 4kB */ +REGION(backup, rw, 0x38800000, 0x01000) /* Backup RAM: 4kB */ #endif /* CHIP_VARIANT_STM32H7X3 */ diff --git a/chip/stm32/spi.c b/chip/stm32/spi.c index 6cbb1a80e5..2cf604891e 100644 --- a/chip/stm32/spi.c +++ b/chip/stm32/spi.c @@ -15,6 +15,7 @@ #include "gpio.h" #include "hooks.h" #include "host_command.h" +#include "link_defs.h" #include "registers.h" #include "spi.h" #include "stm32-dma.h" @@ -111,8 +112,8 @@ static const uint8_t out_preamble[4] = { * message, including protocol overhead, and must be 32-bit aligned. */ static uint8_t out_msg[SPI_MAX_RESPONSE_SIZE + sizeof(out_preamble) + - EC_SPI_PAST_END_LENGTH] __aligned(4); -static uint8_t in_msg[SPI_MAX_REQUEST_SIZE] __aligned(4); + EC_SPI_PAST_END_LENGTH] __aligned(4) __uncached; +static uint8_t in_msg[SPI_MAX_REQUEST_SIZE] __aligned(4) __uncached; static uint8_t enabled; #ifdef CONFIG_SPI_PROTOCOL_V2 static struct host_cmd_handler_args args; diff --git a/common/fpsensor.c b/common/fpsensor.c index dc00a523dc..85ca1f1e9c 100644 --- a/common/fpsensor.c +++ b/common/fpsensor.c @@ -39,8 +39,8 @@ #define FP_TEMPLATE_SECTION #endif -/* Last acquired frame */ -static uint8_t fp_buffer[FP_SENSOR_IMAGE_SIZE] FP_FRAME_SECTION; +/* Last acquired frame (aligned as it is used by arbitrary binary libraries) */ +static uint8_t fp_buffer[FP_SENSOR_IMAGE_SIZE] FP_FRAME_SECTION __aligned(4); /* Fingers templates for the current user */ static uint8_t fp_template[FP_MAX_FINGER_COUNT][FP_ALGORITHM_TEMPLATE_SIZE] FP_TEMPLATE_SECTION; diff --git a/common/uart_buffering.c b/common/uart_buffering.c index 439d7cce28..1f9f57f18a 100644 --- a/common/uart_buffering.c +++ b/common/uart_buffering.c @@ -11,6 +11,7 @@ #include "console.h" #include "hooks.h" #include "host_command.h" +#include "link_defs.h" #include "printf.h" #include "system.h" #include "task.h" @@ -36,10 +37,10 @@ (CONFIG_UART_RX_DMA_RECHECKS + 1)) /* Transmit and receive buffers */ -static volatile char tx_buf[CONFIG_UART_TX_BUF_SIZE]; +static volatile char tx_buf[CONFIG_UART_TX_BUF_SIZE] __uncached; static volatile int tx_buf_head; static volatile int tx_buf_tail; -static volatile char rx_buf[CONFIG_UART_RX_BUF_SIZE]; +static volatile char rx_buf[CONFIG_UART_RX_BUF_SIZE] __uncached; static volatile int rx_buf_head; static volatile int rx_buf_tail; static int tx_snapshot_head;