From f8b3347ce76b79b4d57422936fb5b35368eec774 Mon Sep 17 00:00:00 2001 From: Mulin Chao Date: Thu, 10 May 2018 09:46:52 +0800 Subject: [PATCH] npcx: lpc: Remove FW_OBF bypass for npcx7 and later npcx ec series. In CL 419909, we add a bypass for FW_OBF bug in npcx5 series. (In npcx5, setting FW_OBF won't de-assert IRQ1. The bypass emulates a host read through sib to clear OBF bits in HIKMST and STATUS registers and de-assert IRQ1.) This bug was already fixed in npcx7 series and later npcx. This CL restores original mechanism to clear keyboard buffer by setting FW_OBF bit if chip series is not npcx5. BRANCH=none BUG=chrome-os-partner:34346 TEST=No build errors for npcx series. Run the following script "while true; do ./keypress_emulate_enter_reboot.sh ; sleep 25; done" on grunt over two days and no symptom occurred. Here is the content of keypress_emulate_enter_reboot.sh "#!/bin/bash TIME="0.5" DEV=/dev/pts/26 echo "kbpress 11 4 1" > ${DEV} echo "kbpress 11 4 0" > ${DEV} echo "kbpress 0 2 1" > ${DEV} echo "kbpress 10 6 1" > ${DEV} echo "kbpress 2 3 1" > ${DEV} echo "kbpress 2 3 0" > ${DEV} echo "kbpress 10 6 0" > ${DEV} echo "kbpress 0 2 0" > ${DEV} sleep 2 # Emulate "Ctrl+Alt+F2" echo "kbpress 3 7 1" > ${DEV} echo "kbpress 3 7 0" > ${DEV} sleep ${TIME} echo "kbpress 9 7 1" > ${DEV} echo "kbpress 9 7 0" > ${DEV} sleep ${TIME} echo "kbpress 9 7 1" > ${DEV} echo "kbpress 9 7 0" > ${DEV} sleep ${TIME} echo "kbpress 3 2 1" > ${DEV} echo "kbpress 3 2 0" > ${DEV} sleep ${TIME} echo "kbpress 11 4 1" > ${DEV} echo "kbpress 11 4 0" > ${DEV} sleep 2 # Emulate "root" echo "kbpress 3 7 1" > ${DEV} echo "kbpress 3 7 0" > ${DEV} sleep ${TIME} echo "kbpress 2 7 1" > ${DEV} echo "kbpress 2 7 0" > ${DEV} sleep ${TIME} echo "kbpress 3 0 1" > ${DEV} echo "kbpress 3 0 0" > ${DEV} sleep ${TIME} echo "kbpress 9 7 1" > ${DEV} echo "kbpress 9 7 0" > ${DEV} sleep ${TIME} echo "kbpress 9 7 1" > ${DEV} echo "kbpress 9 7 0" > ${DEV} sleep ${TIME} echo "kbpress 3 2 1" > ${DEV} echo "kbpress 3 2 0" > ${DEV} sleep ${TIME} echo "kbpress 11 4 1" > ${DEV} echo "kbpress 11 4 0" > ${DEV} sleep 1 # Emulate "reboot"" Change-Id: I9ca11c92c5abb909e2d3f22018cf962e1292f406 Signed-off-by: Mulin Chao Signed-off-by: CHLin Reviewed-on: https://chromium-review.googlesource.com/1059984 Reviewed-by: CH Lin Reviewed-by: Randall Spangler --- chip/npcx/lpc.c | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/chip/npcx/lpc.c b/chip/npcx/lpc.c index 646196f88c..e097402a99 100644 --- a/chip/npcx/lpc.c +++ b/chip/npcx/lpc.c @@ -410,6 +410,11 @@ uint8_t lpc_sib_read_kbc_reg(uint8_t io_offset) void lpc_keyboard_clear_buffer(void) { + /* + * Only npcx5 series need this bypass. The bug of FW_OBF is fixed in + * npcx7 series and later npcx ec. + */ +#ifdef CHIP_FAMILY_NPCX5 /* Clear OBF flag in host STATUS and HIKMST regs */ if (IS_BIT_SET(NPCX_HIKMST, NPCX_HIKMST_OBF)) { /* @@ -420,6 +425,14 @@ void lpc_keyboard_clear_buffer(void) */ lpc_sib_read_kbc_reg(0x0); } +#else + /* Make sure the previous TOH and IRQ has been sent out. */ + udelay(4); + /* Clear OBE flag in host STATUS and HIKMST regs*/ + SET_BIT(NPCX_HICTRL, NPCX_HICTRL_FW_OBF); + /* Ensure there is no TOH set in this period. */ + udelay(4); +#endif } void lpc_keyboard_resume_irq(void)