From fdbce2bcf46334ff7aa5de86b73d29ccb0805634 Mon Sep 17 00:00:00 2001 From: Aseda Aboagye Date: Tue, 25 Jul 2017 12:40:12 -0700 Subject: [PATCH] zoombini: Add support for S0iX. Additionally, add the PMIC_INT_L GPIO. BUG=b:63508740 BRANCH=None TEST=make -j buildall; Flash modified image on npcx7_evb, verify that no panics or asserts are hit. Change-Id: I1b1c4c0f09b78adc9b45b828f318b537fcbcb58b Signed-off-by: Aseda Aboagye Reviewed-on: https://chromium-review.googlesource.com/585574 Commit-Ready: Aseda Aboagye Tested-by: Aseda Aboagye Reviewed-by: Vijay P Hiremath Reviewed-by: Shawn N --- board/zoombini/board.h | 2 ++ board/zoombini/gpio.inc | 1 + 2 files changed, 3 insertions(+) diff --git a/board/zoombini/board.h b/board/zoombini/board.h index 0fffcb3ad0..966fbce42d 100644 --- a/board/zoombini/board.h +++ b/board/zoombini/board.h @@ -53,6 +53,8 @@ #define CONFIG_POWER_COMMON #define CONFIG_POWER_BUTTON #define CONFIG_POWER_BUTTON_X86 +#define CONFIG_POWER_S0IX +#define CONFIG_POWER_TRACK_HOST_SLEEP_STATE #define CONFIG_UART_HOST 0 #define CONFIG_I2C_MASTER diff --git a/board/zoombini/gpio.inc b/board/zoombini/gpio.inc index b0b5ec6170..119aa7953b 100644 --- a/board/zoombini/gpio.inc +++ b/board/zoombini/gpio.inc @@ -27,6 +27,7 @@ GPIO_INT(PCH_SLP_SUS_L, PIN(D, 4), GPIO_INT_BOTH, power_signal_interrupt) /* TODO(aaboagye): Internal PU may be needed later on... */ GPIO_INT(RSMRST_L_PGOOD, PIN(E, 2), GPIO_INT_BOTH, power_signal_interrupt) GPIO_INT(PMIC_DPWROK, PIN(F, 4), GPIO_INT_BOTH, power_signal_interrupt) +GPIO_INT(PMIC_INT_L, PIN(D, 5), GPIO_INT_FALLING | GPIO_PULL_UP, power_signal_interrupt) /* Power Enables. */ GPIO(EN_PP3300_DSW, PIN(6, 0), GPIO_OUT_HIGH)