Simon Glass
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bb27b96f13
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cpu: Enable reporting of faults
Faults should be enabled, otherwise we just get a hard fault whenever they
occur.
BUG=chrome-os-partner:10146
TEST=manual:
build and boot on snow; cause a fault and see that it is reported correctly
in the panic message, rather than just a hard fault.
Also tested on link, 'rw 1':
> rw 1
=== EXCEPTION: 06 ====== xPSR: 01000000 ===========
r0 :0000000b r1 :00000041 r2 :00000001 r3 :20003720
r4 :00000000 r5 :0000bbb4 r6 :2000371c r7 :00000002
r8 :00000000 r9 :20003721 r10:00000000 r11:00000000
r12:00000000 sp :200019a0 lr :00004ad1 pc :000054f6
Unaligned
mmfs = 01000000, shcsr = 00070008, hfsr = 00000000, dfsr = 00000000
Time: 0x00000000006f0938 us
Deadline: 0x00000000006ec3d4 -> -0.017764 s from now
Active timers:
Tsk 1 0x000000000072bc1e -> 0.242406
Tsk 4 0x00000000006ec3d4 -> -0.017764
Tsk 5 0x00000000007a2333 -> 0.727547
Tsk 6 0x00000000007a2193 -> 0.727131
Tsk 7 0x00000000007a1fd9 -> 0.726689
Tsk 9 0x0000000000eeb452 -> 8.366874
Task Ready Name Events Time (s)
0 R << idle >> 00000000 6.854007
1 WATCHDOG 00000000 0.000442
2 VBOOTHASH 00000000 0.286203
3 LIGHTBAR 00000000 0.018957
4 POWERSTATE 00000000 0.020656
5 TEMPSENSOR 00000000 0.000851
6 THERMAL 00000000 0.000643
7 PWM 00000000 0.000243
8 TYPEMATIC 00000000 0.000015
9 X86POWER 00000000 0.010582
10 I8042CMD 00000000 0.000015
11 HOSTCMD 00000000 0.000014
12 R CONSOLE 00000000 0.000336
13 POWERBTN 00000000 0.003883
14 KEYSCAN 00000000 0.000297
Rebooting...
Change-Id: I95a4a7fae14359aa4e2b645d2110f91161e7df88
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/26170
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2012-07-02 15:02:07 -07:00 |
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Simon Glass
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d5cb026142
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Enable checking for divide by 0 and alignment faults
These likely indicate errors, so we shold trap them. Possibly this
should be reconsidered for production.
BUG=chrome-os-partner:10148
TEST=manual:
build on all boards
build and boot on snow with a special rw command containing a division
by 0. See that it is trapped:
> rw 0
=== EXCEPTION: 03 ====== xPSR: 01000000 ===========
r0 :0000000b r1 :08005eba r2 :00000000 r3 :20001048
r4 :00000000 r5 :08004fd4 r6 :08004f8c r7 :200012a8
r8 :08004fd4 r9 :00000002 r10:00000000 r11:00000000
r12:00000000 sp :200009a0 lr :08002861 pc :0800368a
Divide by 0, Forced hard fault, Vector catch
mmfs = 02000000, shcsr = 00000000, hfsr = 40000000, dfsr = 00000008
Turn off the cpu_init() setup, and see that it is ignored.
> rw 0
read 0x0 = 0x00000000
>
Similarly, try an unaligned access with the rw command with this enabled:
> rw 1
=== EXCEPTION: 03 ====== xPSR: 01000000 ===========
r0 :0000000b r1 :00000041 r2 :00000001 r3 :200012ac
r4 :00000000 r5 :08004fd4 r6 :08004f8c r7 :200012a8
r8 :08004fd4 r9 :00000002 r10:00000000 r11:00000000
r12:00000000 sp :200009a0 lr :08002861 pc :08003686
Unaligned, Forced hard fault, Vector catch
mmfs = 01000000, shcsr = 00000000, hfsr = 40000000, dfsr = 00000008
but disabled it works:
> rw 1
read 0x1 = 0x5d200010
>
Change-Id: Id84f737301e467b3b56a7ac22790e55d672df7d8
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/25410
Reviewed-by: Randall Spangler <rspangler@chromium.org>
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2012-06-21 06:01:22 -07:00 |
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