This is needed for flash pre-init to be able to hard reset to clear
uncommitted write protect flags without losing the reset flags.
BUG=chrome-os-partner:11368
TEST=manual
Use reboot and sysinfo commands...
1. reset with keyboard. flags -> reset-pin
2. 'reboot soft preserve' flags -> soft reset-pin power-on
3. 'reboot hard preserve' flags -> hard soft reset-pin power-on
4. 'reboot soft'. flags -> soft
5. 'reboot hard'. flags -> hard power-on
Change-Id: I6164a78d99c5c10330f90f651148c5795e7afdda
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/27418
Reasons are really bitflags, not a single reason. This will make it
easier to implement flash protection on LM4, where hibernate is a
subset of power-on reasons.
Also added some additional flags we pass in a hibernate register so...
1) We don't recognize spurious RTC wake reasons
2) Hard reset via system_reset(1) is detected as a hard reset, not a RTC wake
BUG=chrome-os-partner:11368
TEST=manual
1. Keyboard reset = power-on reset-pin
2. Pull battery = power-on
3. reboot = soft
4. reboot hard = power-on rtc-alarm
5. hibernate 10 then push power button = power-on wake-pin
6. reboot 3 sec later = soft
7. hibernate 1 = power-on rtc-alarm
Change-Id: Icbbdbcf6dfd13c8a6a4f80a23f64cebebbfba26e
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/27417
Link battery pack specification suggested a lower charging current
when voltage pass 8.0V. But the lowering the current in constant
current phase leads voltage drop. And the battery goes back to
high current zone, < 8.0V.
This CL adds a 10 seconds debounce time to prevent charging current
change too quickly.
Signed-off-by: Rong Chang <rongchang@chromium.org>
BUG=chrome-os-partner:9572
TEST=manual
watch battery V+ on oscilloscope when charging voltage cross 8.0V
Change-Id: I002f941e33b029e38f813ab2e292c6b73a054352
Reviewed-on: https://gerrit.chromium.org/gerrit/27275
Commit-Ready: Rong Chang <rongchang@chromium.org>
Reviewed-by: Rong Chang <rongchang@chromium.org>
Tested-by: Rong Chang <rongchang@chromium.org>
Kernel and U-boot define it elsewhere, but coreboot doesn't. So put
it here for greatest compatibility.
BUG=none
TEST=if it builds it works
Change-Id: I595910e9198e37bc97d23cd4c249454e1ed64cd8
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/27375
These commands are used in factory test. If system is locked, GPIO
commands are disabled for security reason.
BUG=chrome-os-partner:11164
TEST= - 'ectool gpioget enable_backlight' gives 1.
- 'ectool gpioset enable_backlight 0' turns off display.
- Lock system. Check these commands return error.
Change-Id: I3ea41285075ebe963ba7d30e4ae183cef9b1c105
Reviewed-on: https://gerrit.chromium.org/gerrit/27019
Commit-Ready: Vic Yang <victoryang@chromium.org>
Reviewed-by: Vic Yang <victoryang@chromium.org>
Tested-by: Vic Yang <victoryang@chromium.org>
This command should only be accessible when flash write protect is
unlocked.
BUG=chrome-os-partner:9716
TEST= - Check we can charge and discharge normally.
- Connect AC and force idle. Check battery current is 0 mA.
Change-Id: I74a318c1f5562d6a23b722736615fd1f883dc35a
Reviewed-on: https://gerrit.chromium.org/gerrit/27259
Commit-Ready: Vic Yang <victoryang@chromium.org>
Reviewed-by: Vic Yang <victoryang@chromium.org>
Tested-by: Vic Yang <victoryang@chromium.org>
This is set when the EC boots and sees the recovery key combo.
This is preferable to the memmap'd keyboard recovery switch, which the
host has no way of clearing. The idea is that the host RO firmware
reads this event and sets the recovery reason.
I will be removing the memmap'd keyboard recovery switch once U-boot
and coreboot check this new event.
BUG=chrome-os-partner:10034
TEST=manual
1. power+esc+refresh; should see this even in EC log
[0.000838 event set 0x00004000]
(time of event may vary)
2. reboot EC; should NOT see the event
Change-Id: Id0672749f63c5022624a72ec91d30dcadfea5ef8
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/27328
Now both copies of the event state live in host_event_commands.c, and
lpc / memmap just shadows the main copy.
BUG=chrome-os-partner:11172
TEST=manual
Boot system. should see events 0x2000, 0x80, 0x08 get set and then cleared.
At U-boot prompt, type on keyboard. Should set event 0x1000 get set,
but only on the first keypress (because U-boot doesn't consume that
event).
Then from EC console,
hostevent clear 0x1000 -> see event 0x1000 clear
hostevent clear 0x1000 -> no debug output (it's already clear)
hostevent clearb 0x1000 -> see event copy B 0x1000 clear
hostevent clearb 0x1000 -> no debug output (copy B is already clear)
Change-Id: I855c035865649ba1490cd9027157d5bcdcc9895f
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/27321
U-boot and ectool need this to see what events have occurred, in a way
which doesn't conflict with ACPI/SCI/SMI.
BUG=chrome-os-partner:11172
TEST=manual
- boot EC
- look at event set / event clear debug output; that's for copy A
- from ec console,
hostevent -> events=0, events-B = 0x2088
hostevent clearb 0x2000 -> events-B = 0x88
Change-Id: If842b157914426df593d82af2bfb08a923caa34b
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/27317
Both EC and ectool are still backwards-compatible to the old interface.
BUG=chrome-os-partner:11275
TEST=manual
From U-boot prompt: mkbp hash // test old host talking to new EC
From root shell: ectool echash // test new host talking to new EC
You can also update just the OS and use an old EC, and verify that
'ectool echash' still works, which tests a new host talking to an old
EC.
Change-Id: I2afbb208cb16836f842ba119b74b1ab6a38ce5d5
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/27313
Saves 2 params being passed around needlessly.
BUG=chrome-os-partner:11275
TEST=mkbp hash from u-boot console should still work
Change-Id: I958e4a09f16413e4d051e278dc0384aa9b791aa4
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/27312
And retain compatibility for old requests.
BUG=chrome-os-partner:11275
TEST=from u-boot prompt, 'mkbp hash'
from root shell, 'ectool flashread 0 68084 /tmp/foo'
then compare to first 68084 bytes of ec.bin
Change-Id: Id82068773703543febde79fc820af7486502e01f
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/27226
These commands are only available when system is unlocked.
BUG=chrome-os-partner:9716
TEST=When system is unlocked, check we can read/write I2C bus.
When system is locked, check the commands return error.
Change-Id: I8c4a8a42ab13d62c7e47bf33e2a7abc6f61e43fa
Reviewed-on: https://gerrit.chromium.org/gerrit/27254
Reviewed-by: Rong Chang <rongchang@chromium.org>
Commit-Ready: Vic Yang <victoryang@chromium.org>
Tested-by: Vic Yang <victoryang@chromium.org>
This is necessary for an imminent change which passes version data
from the host bus (LPC/I2C/SPI) into the host command handler.
BUG=chrome-os-partner:11275
TEST=from u-boot prompt, 'mkbp hash'
Change-Id: If34d0d7c6dc320ad5632becf512c30900fd61aca
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/27190
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
Added version mask field to DECLARE_HOST_COMMAND() because it's
convenient to do so when I'm touching all host command
implementations, but all commands simply declare version 0 and nothing
checks it yet. Will add version support in a followup CL.
This change is internal to the EC; it does not change the data sent
over the host interface.
BUG=chrome-os-partner:11275
TEST=manual
ectool version && ectool echash; should get sane data from both
ectool flashread 0x80 0x40 /tmp/foo && od -tx1 /tmp/foo
should match data from offset 0x80 of ec.bin (od -j128 -n64 -tx1 ec.bin)
Change-Id: I5699f72b8d5e1ac23929353c9a34158d76c44206
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/27172
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
Now that ACPI events are handled directly in the LPC interrupt
handler, we can simplify the host event code.
BUG=chrome-os-partner:11240
TEST=boot system; should boot
close lid; should send SMI and suspend system
Change-Id: I8c73ea31a66e94310e4460a008635a103220413e
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/27100
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
And only support it for port 62/66.
Also remove 'ectool queryec', because it can't touch port 62/66 once
the kernel/ACPI owns it, and query-event isn't supported on the user
command port.
BUG=chrome-os-partner:11240
TEST=boot system and check EC console output; should see event clears between
host commands 0x23, 0x8e, but no hostcmd 0x84.
[0.396780 LPC RESET# deasserted]
[0.486953 Port 80: 0x29]
[0.487415 hostcmd1 0x23]
[0.764407 Port 80: 0x88]
[0.764579 event clear 0x00000008 -> 00002080]
[0.764928 event clear 0x00000080 -> 00002000]
[0.765224 event clear 0x00002000 -> 00000000]
[0.765578 hostcmd1 0x8e]
[0.765868 hostcmd1 0x06]
Change-Id: I8ed161dbccd396d685ddf6829a27dfef87d919fb
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/27095
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
BUG=chrome-os-partner:9922
TEST=manual
Press power+refresh+d.
From ec console, 'optget'. No reference to fake dev switch
From host, 'ectool vboot'. Should see either 'fake_dev=0' or no mention of fake dev switch at all.
Change-Id: I66bc5e926d6e639b206563e764bcc730cce9227c
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/27061
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
This allows the console or AP to keep the EC in its RO code.
Previously, the EC could jump from RO to RW even if the system was
locked in pre-init.
Also, sysjump console command doesn't need to check if system is
disabled before calling system_run_image_copy(), because that function
also checks. This now matches how the host command works.
BUG=chrome-os-partner:11147
TEST=manual
syslock
sysjump A -> works
reboot
syslock
sysjump disable
sysjump A -> fails
Repeat, using 'ectool reboot_ec disable-jump' at root shell instead of
'sysjump disable' at EC console.
Change-Id: I0b168a93e97802ba30e7c225b01d70ea66e8db58
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/26898
Also add new 'invalid' host event bit; if the host reads this, it
knows the memory-mapped data for current events is invalid.
BUG=chrome-os-partner:11146
TEST=manual
On host, ectool eventget -> should print events = 0
On EC, hostevent set 0x80000000
On host, ectool eventget -> should print events = invalid
Reboot EC; should see debug output where event mask 0x2000 is set
during the boot process.
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Change-Id: I8d3f161eec25db50ac06e3642a1a1fb8edb9590e
Reviewed-on: https://gerrit.chromium.org/gerrit/26876
BUG=chrome-os-partner:11090
TEST=suspend laptop, then press power button; should resume from suspend
Change-Id: I36b7c62b2e115bb97d37defcd3c783af0f91d5f8
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/26730
And fix returning memory-mapped string length on LPC as well.
BUG=chrome-os-partner:11090
TEST=manual
from EC, 'hostevent set 0x40000'
from host, 'ectool eventget' --> should print 0x40000
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Change-Id: I9edbd0a1468b5d4160ce67c471332226e51fa868
Reviewed-on: https://gerrit.chromium.org/gerrit/26719
Reviewed-by: Simon Glass <sjg@chromium.org>
If flash starts at zero, then flash_dataptr() will return NULL for a valid
region. Change the function around so that it can be used in this case.
BUG=chrome-os-partner:10146
TEST=manual:
Modify code it print out parameters and problems, then:
Writing 256 bytes to 0x0...
0 256 64
ok 131072
Command returned error 1
> flashwrite 0 256
Writing 256 bytes to 0x0...
0 256 64
ok 131072
Command returned error 1
> flashwrite 0 255
Writing 255 bytes to 0x0...
0 255 64
Command usage/param invalid.
Usage: flashwrite offset [size]
Change-Id: I5683fc181ef780310ceff50f120735659e973784
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/26749
Reviewed-by: David Hendricks <dhendrix@chromium.org>
Reviewed-by: Rong Chang <rongchang@chromium.org>
Rather than go through the task queue, host_command_process() processes
the command immediately, has all of its required state passed in,
allowing the caller complete control of the buffers.
BUG=chrome-os-partner:10533
TEST=manual:
build and boot on link, see that messages are stil processed
build and boot on snow, which uses this new command
See that the SPI keyboard works now
Change-Id: Ib7587de10c42caf01bc95bb4d515fd0afc3da7d8
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/25983
Reviewed-by: David Hendricks <dhendrix@chromium.org>
The current gpio_get_level() is pretty slow because it looks things up each
time. Add a new function to find out the register address and mask to use
to check the value for a particular GPIO.
Time-critical code can then use this to check a GPIO.
BUG=chrome-os-partner:10146
TEST=manual:
build and boot on snow;
Power on the board, hold power button for 10s and see that it powers off
Power control still works, thus GPIOs are functional
Change-Id: Ifc6c56f5cb811e0243e7712725a51948eabd42ab
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/26175
Sometimes it is useful to get access to the flash directly, without using
flash_read(). Add a function to do this.
Since the range checking is done in every function in flash_common,
use the new function to do it for us. That way we get a slight (64 byte)
code size reduction.
BUG=chrome-os-partner:10146
TEST=manual:
build and boot on snow with SPI flash emulation, in U-Boot:
See that the 32KB of flash has been provided correctly.
Change-Id: I6622a24234edaed371dd5b9bf43d1f3974d55e39
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/26174
The WWDG is not ideal for this purpose, since if we fail to handle its
interrupt withint 60ms or so, we get a reset. This can be a problem when we
are reporting a panic, since the uart output takes a long time.
Change to using timer 9, which is free, and make it print a watchdog warning
after one second.
BUG=chrome-os-partner:10146
TEST=manual:
build and boot on snow; waitms 1200 and see that a watchdog timeout is
reported correctly.
See that the panic message is displayed in full without a reset happening
before the end.
Change-Id: Ifc3671098e1f3a7ef409b8d1fb919d22eaa90358
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/26172
This seems to be a hangover from the LPC protocol. We can send a result
just by sending a response with no data.
Drop this function and remove all uses of it.
Also use 'enum ec_status' instead of int, since this is the correct
response type.
BUG=chrome-os-partner:10533
TEST=manual:
build for all boards
build and boot on daisy
Change-Id: I93a029bd6ba8cec567b61af3b410bcead015b5c0
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/25980
This drives the power LED for Snow (PB3) using TIM2 in PWM mode.
Since timer setup and manipulation is STM32-specific, the power LED
logic moved to to chip/stm32/power_led.c.
This also adds a "powerled" console command for testing.
Signed-off-by: David Hendricks <dhendrix@chromium.org>
BUG=chrome-os-partner:10647
TEST=Tested on Snow with powerled command, compiled for Daisy
Change-Id: I5a7dc20d201ea058767e3e76d54e7c8567a3b83c
Reviewed-on: https://gerrit.chromium.org/gerrit/26267
Commit-Ready: David Hendricks <dhendrix@chromium.org>
Reviewed-by: David Hendricks <dhendrix@chromium.org>
Tested-by: David Hendricks <dhendrix@chromium.org>
This change fixes mutiple snow charging issues. Including:
- disable i2c host auto selection
- i2c_read8 got wrong output value
- pmu CHARGE_EN control workaround
Signed-off-by: Rong Chang <rongchang@chromium.org>
BUG=chrome-os-partner:11010
TEST=Only test on snow dvt with AP turned off
plug/unplug ac adapter and check charging led
check console command 'battery'
Change-Id: I29d554b3daa4cfc538bd5bf5ba5233976d381861
Reviewed-on: https://gerrit.chromium.org/gerrit/26529
Tested-by: Rong Chang <rongchang@chromium.org>
Commit-Ready: Rong Chang <rongchang@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
This is now superseded by the hash command, which uses a more robust
SHA-256 check.
BUG=none
TEST=if it compiles it's fine
Change-Id: I5ad9256e7af346464301252d62b47bd37852d24a
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/26452
In preparation for being able to copy ec_commands.h to u-boot, which
is itself in preparation for u-boot picking it up from /usr/src/ec/
BUG=none
TEST=make link, snow, bds
Change-Id: If256434b6722ff0787ce21a8ed4c7035c28024a8
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/26451
Reviewed-by: Stefan Reinauer <reinauer@chromium.org>
Add a way for boards to permit or deny access to the I2C port. This
works in a board-specific manner.
All I2C master traffic requires that board_i2c_claim() be called
first. A dummy function is provided for boards which do not require
this.
BUG=chrome-os-partner:10888
TEST=manual:
build for all boards
boot on snow (cannot test i2c as it is broken)
Change-Id: I786d4ae17f1d798faf13b303b5389679fb6720cb
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/26141
This ensures they get included everywhere, and fixes a common bug
where we forget one of them and then code which is supposed to be
BUG=none
TEST=build the code
Change-Id: Ic9208f946a3aea4b0b08f546f1919602befa76d4
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/26365
It is useful to implement timeouts like this:
start = get_time();
while (time_since32(start) < 1000)
...
Add a function to make this easy. Note that for efficiency we only
support a 32-bit return value which limits the timeouts to about an
hour.
BUG=chrome-os-partner:10888
TEST=manual:
build for all boards
boot on snow
Change-Id: I200cb04f5a76b4c76a9bc314d927e4bab1f08a56
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/26289
Reviewed-by: Randall Spangler <rspangler@chromium.org>
This change contains a basic charging loop that follows Chromium
battery charging flow. The temperature range constants, loop delay
time will be move to battery pack later.
Signed-off-by: Rong Chang <rongchang@chromium.org>
BUG=chrome-os-partner:9724,9757,9759
TEST=manual, uart console
Plug AC adapter:
> pmu event: 0000000000001110
[batt] state discharging -> idle
[batt] state idle -> charging
> battery
I: 0x04fd = 1277 mA(CHG)a
Unplug AC adapter:
> pmu event: 0000000000000110
[batt] state charging -> idle
[batt] state idle -> discharging
> battery
I: 0xffcb = -53 mA(DISCHG)
Change-Id: Ifed594d78c0ed08c5e4821a9c8581c1a87526729
Reviewed-on: https://gerrit.chromium.org/gerrit/25618
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Commit-Ready: Vincent Palatin <vpalatin@chromium.org>
Keyboard scan module now owns the recovery key state on all platforms.
And clean up a few comments to linux kernel style
BUG=chrome-os-partner:10890
TEST=manual
- Power on system. Should boot normally.
- Power+Refresh+D. Should turn dev switch on.
- Power+Refresh+F. Should turn dev switch off.
- Power+Esc. Should reboot system. Power button should power on normally.
- Power+Refresh+Esc. Should power on into recovery mode.
- Then press power to shut system down.
- Power button should power on normally (not back into recovery mode).
Change-Id: I4d16e1e8b039efeacbd41e8acec115844bc8457d
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/26147
Reviewed-by: Simon Glass <sjg@chromium.org>
EC computes a SHA-256 hash of its RW code on boot. Also adds host and
console commands to tell the EC to recompute the hash, or hash a
different section of flash memory.
BUG=chrome-os-partner:10777
TEST=manual
1) ectool echash -> should match what the EC precomputed
2a) ectool echash recalc 0 0x10000 5
2b) on EC console, 'hash 0 0x10000 5'
2c) results should agree
3a) on ec console, 'hash 0 0x3e000' then quickly 'hash abort'
3b) ectool echash -> status should be unavailable
4) ectool echash start 0 0x3e000 6 && ectool echash && ectool echash abort && sleep 2 && ectool echash
status should be busy, then unavailable
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Change-Id: I6806d7b4d4dca3a74f476092551b4dba875d558e
Reviewed-on: https://gerrit.chromium.org/gerrit/26023
This forces the fan PWM duty cycle to a fixed percentage (0-100). It's only
used for airflow testing.
BUG=chrome-os-partner:10747
TEST=manual
Using this ectool, try
ectool fanduty 0
ectool pwmgetfanrpm
ectool fanduty 50
ectool pwmgetfanrpm
ectool fanduty 100
ectool pwmgetfanrpm
You should see (and hear) the fan speed up. If you have an EC console, you
can run
faninfo
and it should show that the 'Target:' is unrelated to the 'Actual:' value.
Change-Id: Iac332fb3ba63f96726cf7f64061b3ce22d2e76fd
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/25965
Reviewed-by: Randall Spangler <rspangler@chromium.org>
This sensor doesn't provide accurate case temperature. Let's
disable thermal thresholds for the object tempearture reading from this
sensor.
BUG=chrome-os-partner:9599
TEST=Build success. System works fine.
Change-Id: I9408de59a3349f944c5e215085da93f23965ebc9
Reviewed-on: https://gerrit.chromium.org/gerrit/25824
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Commit-Ready: Vic Yang <victoryang@chromium.org>
Tested-by: Vic Yang <victoryang@chromium.org>
