5 Commits

Author	SHA1	Message	Date
Marc Jones	8127dc41d1	Update the FAM10 microcode to current versions. ... In addition, AP microcode is now updated in early initialization to support errata settings that require it. Signed-off-by: Marc Jones <marc.jones@amd.com> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3250 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1	2008-04-22 23:20:07 +00:00
Stefan Reinauer	7e61e45402	Please bear with me - another rename checkin. This qualifies as trivial, no ... code is changed. Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3052 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1	2008-01-18 10:35:56 +00:00
Marc Jones	8ae8c88220	Initial AMD Barcelona support for rev Bx. ... These are the core files for HyperTransport, DDR2 Memory, and multi-core initialization. Signed-off-by: Marc Jones <marc.jones@amd.com> Reviewed-by: Jordan Crouse <jordan.crouse@amd.com> Acked-by: Myles Watson <myles@pel.cs.byu.edu> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3014 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1	2007-12-19 01:32:08 +00:00
Marc Jones	2006b38fed	Whitespace and other code cleanup in peperation for AMD Barcelona support. ... Signed-off-by: Marc Jones <marc.jones@amd.com> Reviewed-by: Jordan Crouse <jordan.crouse@amd.com> Acked-by: Myles Watson <myles@pel.cs.byu.edu> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3013 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1	2007-12-19 00:47:09 +00:00
Ronald G. Minnich	9b6b3d22a2	issue 25, various AMD patches ... Signed-off-by: Ronald G. Minnich git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2092 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1	2005-11-23 04:56:36 +00:00