Full panel initialization can take about 1.6 seconds. If this is
called by hook_call_deferred, it will block other HOOKS. Replace the
'while loop + sleep' by re-calling deferred every 100ms.
BRANCH=whiskers
BUG=b:109714732
TEST=sudo ./extra/usb_updater/usb_updater2 -d 18d1:5030 --tp_update <fw>
TEST=sudo extra/usb_updater/usb_updater2 -d 18d1:5030 --tp_debug=01
TEST=(EC console) touchpad_st calibrate
Signed-off-by: Wei-Han Chen <stimim@chromium.org>
Change-Id: I665169524a06a7c359303a4a3dceced4a141f9ae
Reviewed-on: https://chromium-review.googlesource.com/1086895
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
Tested-by: Wei-Han Chen <stimim@chromium.org>
Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
sn5s330_init() will turn off the PP1 (source) FET, but
sn5s330_is_sourcing_vbus() can be called before PPC init: by
usb_charger_init() and pd_power_supply_reset() from pd_task().
Keep track of the PP1 (source) FET state locally, and use this for
sn5s330_is_sourcing_vbus(), instead of reading the state from the PPC chip
over I2C every time.
This solves the problem of sn5s330_is_sourcing_vbus() being called before
sn5s330_init(), and also avoids other problems caused by
sn5s330_is_sourcing_vbus() doing I2C communication:
crrev.com/c/969701/7/board/cheza/board.c#85
BUG=b:80203727
BRANCH=none
TEST=Reboot Grunt EC while one USB-C port is VBUS source.
Change-Id: Ie0fdd3d672bc747fcdbb746586149e194165fdac
Signed-off-by: Edward Hill <ecgh@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1086115
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
Reviewed-by: Jett Rink <jettrink@chromium.org>
In st_tp_reset, we should exit the function when we received a
controller ready event. The "break" statement only breaks inner for
loop, not while loop. Fix this bug.
BRANCH=whiskers
BUG=b:70482333
TEST=sudo ./extra/usb_updater/usb_updater2 -d 18d1:5030 --tp_update <fw>
TEST=sudo extra/usb_updater/usb_updater2 -d 18d1:5030 --tp_debug=01
TEST=(EC console) touchpad_st calibrate
Signed-off-by: Wei-Han Chen <stimim@chromium.org>
Change-Id: I92f94cce33c32ab26924fb91b50cd192d179ba90
Reviewed-on: https://chromium-review.googlesource.com/1086894
Commit-Ready: Wei-Han Chen <stimim@chromium.org>
Tested-by: Wei-Han Chen <stimim@chromium.org>
Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
IIN_DPM register reflects the actual input current limit programmed
in the register, either from host or from ICO. After ICO, the current
limit used by DPM regulation may differ from the IIN_HOST register
settings.
BUG=b:80279932
BRANCH=none
TEST=Manually tested on BIP
Used BC1.2 DCP charger 'charger' command yield 900mA while
charge ramp set to 2.4A.
Change-Id: I6389205bd70d7729e9dd810fef3dfbf83a7d8c65
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/1080343
Commit-Ready: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Tested-by: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
An ADC conversion requires ~10 msec. However, if the bq25703 is in low
power mode, then this conversion time jumps to ~55 msec. This CL adds
a method to exit/enter low power mode and adds a call to exit low
power mode prior to starting the ADC conversion. Following the
conversion, low power mode is entered again.
BRANCH=none
BUG=b:79771760
TEST=Connected AC power and verified that EC console error message
'Could not read input current limit ADC' is no longer shown. In
addition, had instrumented this the ADC conversion with GPIO signals
and verified the conversion times before/after exiting low power mode.
Change-Id: I13f36e6261e219adbc8624f71bf7916bbc631b10
Signed-off-by: Scott Collyer <scollyer@google.com>
Reviewed-on: https://chromium-review.googlesource.com/1069768
Commit-Ready: Scott Collyer <scollyer@chromium.org>
Tested-by: Scott Collyer <scollyer@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
Use a queue now for sync events, this will allow multiple interrupts to be
called before the motion sense task executes. The events (including
timestamps) get stored in a small queue. 8 events for the queue size should
be plenty, most applications will have latency concerns anyway once we
get a couple of queued up events.
Also changed the init function to be a little bit more robust to race
conditions. Added count argument to the "sync" simulation command to test
the queue behavior.
BRANCH=master
BUG=b:73551961, b:67743747
TEST="sync 4" yields 4 events on the AP, whereas before it would only
give the AP the last event.
Change-Id: I9fcb1fb8b35eb5f8ffcc21afbfcb0f0d9bc33804
Signed-off-by: Alexandru M Stan <amstan@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1065149
Reviewed-by: Gwendal Grignou <gwendal@chromium.org>
This will be called after touchpad firmware is updated. "Full
initialization" will trigger auto tuning.
This function can also be called by console command `touchpad_st
calibrate`.
BRANCH=none
BUG=b:70482333
BUG=b:78483107
TEST=manual
Signed-off-by: Wei-Han Chen <stimim@chromium.org>
Change-Id: I336dfa79ae5133750dc90ba07cbe9fc81318e84e
Reviewed-on: https://chromium-review.googlesource.com/1049765
Commit-Ready: Wei-Han Chen <stimim@chromium.org>
Tested-by: Wei-Han Chen <stimim@chromium.org>
Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
We need to disable under voltage protection because it prevents us from
enabling the sink path when there is not Vbus on the connector side. We
need to enable the sink path before we hibernate otherwise there is no
power power to get to the charger which will then assert ACOK. Without
this we won't wake up with the ACOK wake when USB power is inserted.
BRANCH=none
BUG=b:79948623
TEST=bip wakes with USB power insertion
Change-Id: Idf16a92dacde63cf943ef68b0258b320d11de44c
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1070867
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
PS8751 supports the TCPCI spec for controlling the power source and sink
path, which is done through GPIO0 and GPIO1, respectively, by default.
BRANCH=none
BUG=b:78896495,b:78021059
TEST=verified TCPC drives PPC via reworked yorp board.
Change-Id: Ie1de67495947b787ad9cd5aee0db3ca21bec5a10
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1047796
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
The BMI160 driver's init function generates a divide by 0 error
by calling config_interrupt before initializing the range defined
in struct accelgyro_saved_data_t. The explicit error is
generated by macro BMI160_TAP_TH that's called in config_interrupt.
BUG=b:80237518
BRANCH=None
TEST=`make -j buildall`
EVE boots from TOT
Signed-off-by: Sam Hurst <shurst@chromium.org>
Change-Id: I8b7a4a7c63c973bcc639779ee54958f3702f1b36
Reviewed-on: https://chromium-review.googlesource.com/1071847
Commit-Ready: Sam Hurst <shurst@google.com>
Tested-by: Sam Hurst <shurst@google.com>
Reviewed-by: Duncan Laurie <dlaurie@google.com>
When using larger block sizes (e.g. 4096 bytes), the write operations
take too long, which often causes a watchdog reset.
Fix this by reloading the watchdog after programming
every 64 bytes page.
BRANCH=poppy
BUG=b:80167548
TEST=Copy old touchpad FW to soraka, build staff, make sure FW
can be updated.
Change-Id: Ic6e7a3e3ef63877a4f2d5011e1fb0d49c04177a6
Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1070952
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
bip also need to enable the sink path when going into hibernate
BRANCH=none
BUG=b:79948623
TEST=on bip, verfied that AC_OK, LID_OPEN, and POWER_BTN all wake the EC
up.
Change-Id: I2c1168f856cc45635b5c76f7ca409007fcf141cc
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1065203
I noticed data was getting dropped from my console output on
bip. Adding the cflush fixes it.
BRANCH=none
BUG=none
TEST=ppc_dump 0 on bip works
Change-Id: Ib71cb37c4c8728a7ab958905d3b2627b8c163faa
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1070626
This patch will output an error message during compiling if we
try to enable an unsupported config option for it83xx PD driver.
This avoids the issue of an unknown EC reset caused by calling
function at address 0x00000000.
This change also remove empty definitions.
BUG=b:79700229,b:79706847,b:79637786
BRANCH=none
TEST=make buildall -j
Change-Id: I08accb88ae7c6d574dfcd115a5122acd2dfe46b4
Signed-off-by: Dino Li <Dino.Li@ite.com.tw>
Reviewed-on: https://chromium-review.googlesource.com/1059095
Reviewed-by: Jett Rink <jettrink@chromium.org>
They're only used within the same file and should always be inlined.
It also helps gcc 8.1's lto linking which seems to not inline it (since
inline is just a hint) but then drops the function (presumably because
it's small, marked inline, and comes with no prototype).
BUG=b:65441143
BRANCH=none
TEST=builds with gcc 8.1
Change-Id: I881a5b9f13192dd11748d8a3060788f95a84dec0
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: https://chromium-review.googlesource.com/1061075
Commit-Ready: Patrick Georgi <pgeorgi@chromium.org>
Tested-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-by: Stefan Reinauer <reinauer@google.com>
This CL adds the port number to the error messages for the TI sn5330
PPC driver. It also adds 'ppc' so that its clear where the messages
are coming from.
BRANCH=none
BUG=b:79640678
TEST=Tested on Bip MLB and verfied that PPC EC console log errors
display the port number.
Change-Id: I7988e5e4008c005bb1ef9a78331d4a2597fdcb62
Signed-off-by: Scott Collyer <scollyer@google.com>
Reviewed-on: https://chromium-review.googlesource.com/1060105
Commit-Ready: Scott Collyer <scollyer@chromium.org>
Tested-by: Scott Collyer <scollyer@chromium.org>
Reviewed-by: Justin TerAvest <teravest@chromium.org>
Processing of TCPC alerts takes place in the PDCMD task and the result
of processing alerts is to wake the PD task. When the PD task runs,
it's possible that it may attempt to put the TCPC into low power mode
prior to the remainder of the alert processing function completing. So
there may be pending TCPC accesses in the alert handler function which
called subsequent to the PD task putting the TCPC into low power
mode. The TCPC access in the PDCMD task will cause the TCPC to exit
low power mode. With the ANX7447 TCPC, this process will repeat
indefinitely.
This CL replaces the calls to task_set_event and task_wake with
indications stored in a local variable. Then at the end of the
function the task_set_event is made if necessary. This change in order
removes one guaranteed source of pending TCPC accesses from causing
the TCPC to exit low power mode.
BRANCH=none
BUG=b:77544959
TEST=Was using Salea logic analyzer and testing in conjunction with
low power mode. Verified that prior to this change I2C accesses were
attempted and NAKd after the command I2CIDLE was sent on the bus. Also
tested basic type C operation as both SNK/SRC.
Change-Id: I8879c655a48a2b16e0445522497002482dc9ca33
Signed-off-by: Scott Collyer <scollyer@google.com>
Reviewed-on: https://chromium-review.googlesource.com/1044868
Commit-Ready: Scott Collyer <scollyer@chromium.org>
Tested-by: Scott Collyer <scollyer@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
After we set TE (CL:958295), rt946x terminates charging when
the charge current is below IEOC in constant-voltage mode.
Let's add an interface to check charge termination status.
BUG=b:77870927
BRANCH=scarlet
TEST=charge scarlet, confirm rt946x_is_charge_done() returns 0 when
battery is charging and returns 1 when charge terminates (battery is
full). Then keep AC plugged and wait, confirm rt946x_is_charge_done()
returns 0 when rt946x restarts charging.
Change-Id: I559d328aa0d7c5c4cd5bf7178370ea039aa80204
Signed-off-by: Philip Chen <philipchen@google.com>
Reviewed-on: https://chromium-review.googlesource.com/1044768
Commit-Ready: Philip Chen <philipchen@chromium.org>
Tested-by: Philip Chen <philipchen@chromium.org>
Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
This patch makes lm3509 avoid setting the LED brightness to 100% on
power-up. It removes brighness control from lm3509_power entirely.
The brightness is controlled by the OS.
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
BUG=b:78360907
BRANCH=none
TEST=Verify keyboard backlight turn on off on Nami as expected. No
flashing on start-up or resume is observed.
Change-Id: Ife82c83501d57aeb540acb1cccb95597fd1d19a0
Reviewed-on: https://chromium-review.googlesource.com/1054408
Commit-Ready: Daisuke Nojiri <dnojiri@chromium.org>
Tested-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
This patch promotes board/nami/keyboard_backlight.c to common
directory.
Board customization is done via board_kblight_init callback.
It currently supports two drivers: direct PWM control and lm3509.
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
BUG=b:78360907,b:78141647
BRANCH=none
TEST=On Nami (for lm3509) and Sona (pwm), verify the followings:
1. Alt + brightness up/down works
2. After suspend-resume, brightness is restored
3. Lid close/open
4. After screen is off, keyboard backlight is turned off
Change-Id: I584c06e8702fe7b289999698f277311cfd3400bd
Reviewed-on: https://chromium-review.googlesource.com/1051027
Commit-Ready: Daisuke Nojiri <dnojiri@chromium.org>
Tested-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
When we write a 0 to the register it actually prevents
future calls from correctly determining if the OCM is
present.
BRANCH=none
BUG=b:79123179
TEST=board with OCM still reports ocm after multiple anx_ocm 0 calls
Change-Id: I3899e8999483518fb42ddbd044d29e32fc3380f3
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1047830
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
Rename raw_read8 to st_raw_read8 and statically inline in the header
file. Removing the extern removes linker warnings when including this
header file without the driver, which happens in baseboard files.
BRANCH=none
BUG=none
TEST=including "driver/accelgyro_lsm6dsm.h" in c files that
do not link the actual driver will now compile.
Change-Id: I43f799a3b05b2343e012d43bdc9459d138ecf1b5
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1042727
Reviewed-by: Randall Spangler <rspangler@chromium.org>
We do not want to erase the OCM flash automatically so we
can ensure that we fix our supply chain issues. Add a command
that will erase the OCM if needed.
BRANCH=none
BUG=b:77658388
TEST=verified command works on yorp
Change-Id: Iaf6ada3b1e223d15ae0d9624bdcc54b90cb33b64
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1035428
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
This implements keyboard backlight control for Nami, Vayne, Pantheon,
and Sona. On Sona, GPIOC4 is directly connected to the LED strings.
Thus, we use PWM to control the brightness. On the other variants,
the LED strings are connected to LM3509. Thus, we control the brightness
through I2C.
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
BUG=b:76182445,b:78141647
BRANCH=none
TEST=Verify keyboard backlight brightness changes on Nami.
Verify keyboard backlight turns on/off on lid close/open, sleep/suspend.
on Nami. Verify 'kblight' returns x set by 'kblight x' on Sona.
Change-Id: I400ea2bc7a58a3cc57eb959179d2139a99ac176c
Reviewed-on: https://chromium-review.googlesource.com/1022833
Commit-Ready: Daisuke Nojiri <dnojiri@chromium.org>
Tested-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Aaron Durbin <adurbin@google.com>
The PS8751 TCPC expresses that it has been reset by resetting the
alert mask. Handle its re-init case.
BRANCH=none
BUG=b:77551454,b:77639399
TEST=Verify that TCPC is reset on yorp C1 after reinsertion
Change-Id: Ie1a819a3627a1225c3fad65a60a4aca126a69f53
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1014355
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
We need to use the PS8751 as the USB mux without configuring
it as the TCPC. Add mode that allows passing in i2c port
and address instead using tcpc_config_t values.
BRANCH=none
BUG=b:78341944
TEST=build using bip
Change-Id: I45b420ef890dfa8c5e5052864b7a2bb66d8734d6
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1024486
Once the PS8751 has new firmware, it will be able to detect VBus
at the appropriate time. After that, we can go back to using the
cached version of Vbus detection.
BRANCH=none
BUG=b:77639399
TEST=none
Change-Id: I691919f3bd2479a131aa58763c7906cb4f6919ff
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1024531
After a successfully PD packet transmit, a PD_EVENT_RX is issued
which could trigger a premature reading of a PD Packet before
the entire packet is received.
BUG=b:71620429
BRANCH=NONE
TEST=manual
Tested on Scarlet with the following three dongles:
ASUS 3-1, (HDMI, USB, TYPEC): Tested with USB-Keyboard, TypeC power
adapter, and HP monitor.
Cable Matter 6-1, (DP, HDMI, USB, SVGA, ETHERNET, TYPEC): Tested with
USB-Keyboard, TypeC power adapter, Ethernet and HP monitor
(DP and HDMI). SVGA was not tested.
Cable Matters 6-1, (DP, DP, USB, USB, ETHERNET, TYPEC): Tested with
USB-Keyboard, USB-Mouse, Ethernet, and two HP monitors
(Scarlet was mirrored on both monitors)
Signed-off-by: Sam Hurst <shurst@chromium.org>
Change-Id: Ib07182201d954cf4b9616277f9c14bbbb337197e
Reviewed-on: https://chromium-review.googlesource.com/1015417
Commit-Ready: Sam Hurst <shurst@google.com>
Tested-by: Sam Hurst <shurst@google.com>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
This commit adds an optional console command that will dump the contents
of the battery charger IC registers. Currently, the only chargers
supported are the BD9995x as well as the ISL923x.
BUG=None
BRANCH=None
TEST=Enable on meowth; Flash; Verify that the command works without any
issues.
Change-Id: I2221efe0ed6e0f6063c97547e0da2d775bf4da45
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Reviewed-on: https://chromium-review.googlesource.com/1016004
Commit-Ready: Aseda Aboagye <aaboagye@chromium.org>
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
The BQ24392 driver controls power on the PP5000_A rail so that BC1.2
detection can be performed when the AP is off. However, that rail is
also controlled by the chipset task, so CONFIG_POWER_PP5000_CONTROL
needs to be defined to keep 5V rail up when necessary.
Calls to power_5v_enable() must only be done when the build has a
chipset task (otherwise, that function is not defined).
BRANCH=none
BUG=b:77874283
TEST=Booted Yorp with software sync enabled
Signed-off-by: Justin TerAvest <teravest@chromium.org>
Change-Id: Ib75655944aa05e381da922da8e916dc5d4dd9f85
Reviewed-on: https://chromium-review.googlesource.com/1014397
Commit-Ready: Furquan Shaikh <furquan@chromium.org>
Tested-by: Divya S Sasidharan <divya.s.sasidharan@intel.com>
Reviewed-by: Divya S Sasidharan <divya.s.sasidharan@intel.com>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
This CL adds support to check if the OCM flash is erased and if not,
will erase it at initialization time. These changes are encapsulated
in a new config option CONFIG_USB_PD_TCPM_ANX7447_OCM_ERASE and this
option is enabled for Yorp boards.
BUG=b:77658388
BRANCH=NONE
TEST=make -j buildall. Tested on a board that hadn't yet been
erased. Verifed the message
"anx7447: OCM flash checked and successfully erased"
was in the EC log, but did not show up on subsequent reboots.
Change-Id: I660e76a9498d3dc1ba821a04317b324f716c5089
Signed-off-by: Scott Collyer <scollyer@google.com>
Reviewed-on: https://chromium-review.googlesource.com/988414
Commit-Ready: Jett Rink <jettrink@chromium.org>
Tested-by: Jett Rink <jettrink@chromium.org>
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
In tcpci_tcpc_drp_toggle the role control is being set to
TYPEC_CC_OPEN. This works for the parade tcpci compliant tcpc, but
does not work the anx7447. The tcpci spec has this description for the
role control requirement (4.4.5.2):
If DRP=1b, the only allowed values for CC1/CC2 are Rp/Rp or Rd/Rd.
COMMAND.Look4Connection shall do nothing if CC1/CC2 are not Rp/Rp or
Rd/Rd.
This CL changes the role control setting associated with starting
auto-toggle to be TYPEC_CC_RD.
BUG=b:77544959
BRANCH=NONE
TEST=Verfied that anx7447 does auto toggle between Rd and
Rp. Previously, the TCPC_REG_COMMAND_LOOK4CONNECTION command was being
ignored.
Change-Id: Iea7ce963ebf57c0f3d43005385484913d97774fd
Signed-off-by: Scott Collyer <scollyer@google.com>
Reviewed-on: https://chromium-review.googlesource.com/1005795
Commit-Ready: Scott Collyer <scollyer@chromium.org>
Tested-by: Scott Collyer <scollyer@chromium.org>
Reviewed-by: S Wang <swang@analogix.corp-partner.google.com>
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
If the board is not powered until VBUS is connected, then that port
will trigger dead battery mode in the PPC. This mode must be exited by
the host (EC) writing to the control register. Until dead battery mode
is exited, VBUS OVLO is fixed at 6.8V. Therefore the regular setting
of this value must be done after exiting dead battery mode.
This CL also changes the check for dead battery mode to use the mode
value in the device status register. The bit in the control register
does not reflect the status, but rather, if dead battery mode exit has
been written by the host. The current check will result in the dead
battery mode section being executed for both ports after every power
up. However, only the port that has VBUS active would succeed because
the HV_SNK mode can't be enabled unless VBUS is present.
Lastly, this CL changes the verification check for the
sink/source_enable functions to rely on the mode in the device status
register instead of the switch state. The reason for this is that the
switch state requires ~15 msec delay before it gets updated following
SNK_EN to the nx20p3484 being set high. However, the mode reports the
correct state without reqiuring a msleep.
BUG=b:77561535
BRANCH=NONE
TEST=Tested both port 0 and 1 and verified that Yorp can power up
without a battery. In addition verified that
nx20p3483_vbus_sink_enable returns EC_SUCCESS for both enable/disable
cases.
Change-Id: I2c993b592cd30e34a39d1c1b7e3c54be9f505844
Signed-off-by: Scott Collyer <scollyer@google.com>
Reviewed-on: https://chromium-review.googlesource.com/1005621
Commit-Ready: Scott Collyer <scollyer@chromium.org>
Tested-by: Scott Collyer <scollyer@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
The ANX7447 has a sink/source control lines which can be connected to
a PPC. The NX20P3483 PPC requires this control to set it's sink/source
switch control. The ANX7447 contols these lines via the tcpci COMMAND
register. This CL adds new tcpm_set functions to set either SNK or SRC
control via the COMMAND register.
BUG=b:77583452
BRANCH=NONE
TEST=Tested on port 0 of Yorp with an external charger. Prior to this
CL the PPC would remain in standby state because both snk/src control
remained low. With these changes, verifed that snk_ctrl is driven high
and vbus_sink_enable() function no longer returns an error.
Change-Id: Icbea0d3edb63ad19f3d2c76636208497b6939a72
Signed-off-by: Scott Collyer <scollyer@google.com>
Reviewed-on: https://chromium-review.googlesource.com/996239
Commit-Ready: Scott Collyer <scollyer@chromium.org>
Tested-by: Scott Collyer <scollyer@chromium.org>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
