In S0, allow the host to enable/disable double tap.
Set S0 accel frequency to 100Hz to track double tap event.
BRANCH=smaug
BUG=chrome-os-partner:44754
TEST=check CTS results are identical to previous runs.
Check we can enable/disable double tap from the host.
Change-Id: Ic36bdd77005a1152fd413fb3869c8a77ef680117
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/298685
The current largest task size is not big enough,
we get stack overflow after one or several calibration requests.
BRANCH=smaug
BUG=chrome-os-partner:45570
TEST=After the change a loop of calibrate does not crash the EC.
Change-Id: I9681a890eddf274ab496e8ca6249c7ebca5edab5
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/301215
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
The board-specific build.mk is included twice (by design). This
change moves the "+=" terms inside the guard so that the variables
are only extended on the second pass.
BUG=none
BRANCH=none
TEST=make buildall V=1
By inspection, notice that CFLAGS and dirs-y don't have duplicate
terms anymore.
Change-Id: I4a5d05df5a7f9516d7379a627bee034bcb396582
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/300655
Commit-Ready: Bill Richardson <wfrichar@google.com>
Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
If other i2c traffic happens around the time the light bar is
initialized, the i2c bus is wedged.
Instead of waiting 500ms in the motion task loop for the tap sequence to
complete, set under i2c lock the lp power and init sequence.
BRANCH=smaug, samus
BUG=chrome-os-partner:45223
TEST=With msleep(500) removed and With lb_power + lb_init + 100ms, I don't see the wedge at TAP
sequence.
Change-Id: I931eb25bcc5e3237b6c569f2330f72f9fc415964
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/299543
Reviewed-by: Bill Richardson <wfrichar@google.com>
This commit adds the base accelerometer as well as the gyroscope to the
list of motion sensors on the board. They are currently wrapped behind an
ifdef for HAS_TASK_MOTIONSENSE due to space constraints.
BUG=chrome-os-partner:43494
BRANCH=None
TEST=Build GLaDOS EC with driver enabled and verify that we can calcuate
a valid lid angle.
TEST=Verify that signs of accelerometer conform to those shown in the
Chrome/Android/HTML5 doc/spec. See description in accelerometer_types.h
TEST=Verify that signs of gyroscope conform to those shown in the
"Sysfs interface to EC accelerometers" document.
TEST=make buildall tests
CQ-DEPEND=CL:299504
CQ-DEPEND=CL:300510
Change-Id: I34026813431f0df6211f9c781ab5b8c7b4dd8403
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Reviewed-on: https://chromium-review.googlesource.com/299886
Commit-Ready: Aseda Aboagye <aaboagye@chromium.org>
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Gwendal Grignou <gwendal@chromium.org>
Set USB communications capable flag in source/sink
capabilities PDO on boards that support USB. This
signals to other side that we are capable of
communication over D+/D- or SS Tx/Rx.
BUG=chrome-os-partner:34982
BRANCH=samus,smaug
TEST=load on samus, use twinkie to sniff traffic,
verify that USB comms capable bit is set in source
cap packet
Change-Id: I0f49cf19eb141512298c3439a4708c53101d674f
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/300637
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
The dock hub upstream port is wired to the type-C captive cable, so we
can only be a data UFP :
- ensure we reject data swap request to become a DFP
(e.g. from dual role devices preferring to be a UFP such as Ryu)
- swap to data UFP at startup (we will start as data DFP since we are a
power source only).
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=none
BUG=none
TEST=connect Honeybuns to Ryu and see Ryu becoming a power sink and a
data DFP all the time.
Change-Id: I876536451a327e04df0a81d8217ef19963d204b6
Reviewed-on: https://chromium-review.googlesource.com/300952
Commit-Ready: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Reviewed-by: Scott Collyer <scollyer@chromium.org>
Change the IRQ interface to allow adding events.
Move code to send the lightbar sequence from gesture.c to motion task.
TEST=compile, works on Ryu.
BRANCH=smaug
BUG=chrome-os-partner:44754
Change-Id: I981ea123ebef0e8e3d6aa320eade89f10e83b6fc
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/296822
Reviewed-by: Alec Berg <alecaberg@chromium.org>
1. Host access to the PNPCFG registers is disabled.
2. UART2 for host if necessary.
Signed-off-by: Dino Li <dino.li@ite.com.tw>
BRANCH=none
BUG=none
TEST=1. host can't access the PNPCFG registers.
2. out I/O port 0x2f8 '0x30, 0x31, 0x32, 0x33, and 0x34'
will have console message '01234'.
Change-Id: If07bdc129105f5248661d929e6858d4063c452ee
Reviewed-on: https://chromium-review.googlesource.com/300266
Commit-Ready: Dino Li <dino.li@ite.com.tw>
Tested-by: Dino Li <dino.li@ite.com.tw>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
This commit adds the lid accelerometer to the list of motion sensors on
the board. It currently wrapped behind an ifdef for
HAS_TASK_MOTIONSENSE due to space contraints.
BUG=chrome-os-partner:43494
BRANCH=None
TEST=Build GLaDOS EC with driver enabled and verify that valid
accelerometer data is read, and that range, resolution, and odr can all
be modified.
TEST=Verified that signs of accelerometer data conform to those shown in
the doc.
TEST=make buildall tests
CQ-DEPEND=CL:299013
CQ-DEPEND=CL:300510
Change-Id: Ib566f8eb2818c0694bf673af244aedbc91eac80f
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Reviewed-on: https://chromium-review.googlesource.com/299504
Commit-Ready: Aseda Aboagye <aaboagye@chromium.org>
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Add config option to use the old accelerometer reference frame,
which is used on samus and products using 3.14 or earlier kernel.
This fixes samus so that the lid angle calculation is correct
again.
This also moves the accel_orientation structure out of the board
directory and into common code, since it purely is a function of
the reference frame being used.
BUG=chrome-os-partner:43494
BRANCH=none
TEST=test on samus, verify lid angle calculation is correct once
again. also, enable the motion_lid test and verify that it passes.
Change-Id: I948a74a71964b54c68be66e828a030ddd0418947
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/300510
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Gwendal Grignou <gwendal@chromium.org>
1. Fix fan turns on during sysjump if fan is disabled.
2. Remove unused board function.
Signed-off-by: Dino Li <dino.li@ite.com.tw>
BRANCH=none
BUG=none
TEST=1-1. Console 'sysjump RW' and fan keeps off.
1-2. Console 'fanset 4000' or 'fanset 0' and 'sysjump',
it dose maintain the fan RPM.
Change-Id: I531d49c2a8a9fea68af4507339c7be97367c504c
Reviewed-on: https://chromium-review.googlesource.com/299650
Commit-Ready: Dino Li <dino.li@ite.com.tw>
Tested-by: Dino Li <dino.li@ite.com.tw>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
1. add lpc_keyboard_clear_buffer() function.
2. Enable P80L function, that LPC I/O port 80h data can be mapped
to BRAM bank1 (offset 0x80 ~ 0xBF).
Signed-off-by: Dino Li <dino.li@ite.com.tw>
BRANCH=none
BUG=none
TEST=1. The lpc_keyboard_clear_buffer() function can clear OBF.
2. 80h port, console command port80.
3. 62h/66h port.
3-a. out 66h 80h, out 62h 00h, in 62h 02h
3-b. out 66h 81h, out 62h 01h, out 62h 55h
3-c. out 66h 80h, out 62h 01h, in 62h 55h
3-d. out 66h 80h, out 62h 02h, in 62h aah
4. Host command "version".
Change-Id: Id2b5a5813cbe8edfc4ecc7b153874b819d460f43
Reviewed-on: https://chromium-review.googlesource.com/298421
Commit-Ready: Dino Li <dino.li@ite.com.tw>
Tested-by: Dino Li <dino.li@ite.com.tw>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Instead of mocking i2c_read8/16/32, mock i2c_xfer.
We can now test code that call i2c_xfer directly and
test common/i2c.c
BRANCH=samus, ryu
BUG=chrome-os-partner:45223
TEST=Unit tests pass.
Change-Id: Iaa772515c40cf55d2050d0019e2062d63278adc0
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/299768
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Since there is no more concept of a flash region belonging only to the
EC, we only need one FLASH_SIZE config, which represents the actual
physical size of flash.
BRANCH=None
BUG=chrome-os-partner:23796
TEST=With entire patch series, on both Samus and Glados:
- Verify 'version' EC console command is correct
- Verify 'flashrom -p ec -r read.bin' reads back EC image
- Verify software sync correctly flashes both EC and PD RW images
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Change-Id: I18a34a943e02c8a029f330f213a8634a2ca418b6
Reviewed-on: https://chromium-review.googlesource.com/297824
Commit-Ready: Shawn N <shawnn@chromium.org>
Tested-by: Mulin Chao <mlchao@nuvoton.com>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
CDRAM / CODERAM configs were previously used for chips which copied code
from external SPI to program memory prior to execution, and were used
inconsistently between npcx and mec1322.
These CONFIGs are now completely redundant given new configs like
CONFIG_MAPPED_STORAGE_BASE and CONFIG_EXTERNAL_STORAGE.
BRANCH=None
BUG=chrome-os-partner:23796
TEST=With entire patch series, on both Samus and Glados:
- Verify 'version' EC console command is correct
- Verify 'flashrom -p ec -r read.bin' reads back EC image
- Verify software sync correctly flashes both EC and PD RW images
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Change-Id: I0e054ab4c939f9dcf54abee8e5ebd9b2e42fe9c4
Reviewed-on: https://chromium-review.googlesource.com/297804
Commit-Ready: Shawn N <shawnn@chromium.org>
Tested-by: Shawn N <shawnn@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
This commit fixes two issues:
- When we transition from S3 to S0, we enable the sensor rail. Very
shortly thereafter, we attempt to initialize the motion sensors.
They fail on the very first i2c transaction due to the fact that the
senors are not ready. Therefore, this commit adds a small 3ms delay
to the end of the board_chipset_resume() hook. This allows both the
motion sensors to initialize successfully when the motion sense hook
is called.
- In order for the delay to be effective, it must be called prior to
the motion sense hook. Therefore, the priority of
board_chipset_resume() is increased.
BUG=chrome-os-partner:43494
BRANCH=None
TEST=Build and flash GLaDOS EC, reboot several times verifying that both
sensors are initialized.
TEST=make buildall tests
Change-Id: I86ee87955f0750cac1960be147c2b39c7d922f0a
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Reviewed-on: https://chromium-review.googlesource.com/299769
Commit-Ready: Aseda Aboagye <aaboagye@chromium.org>
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Alec Berg <alecaberg@chromium.org>
This commit adds a new basic driver for the Kionix KX022 Accelerometer.
Currently, the driver is capable of reading the sensor data and
manipulating its ODR, resolution, and range.
This sensor also has integrated support for Directional
Tap/Double-Tap(TM), however that functionality is not yet implemented in
the driver.
Lastly, since this accelerometer is very similar to the previous KXCJ9,
this commit tries to combine the drivers.
Note, the variant of the Kionix accelerometer MUST be specified in the
private data structure.
BUG=chrome-os-partner:43494
BRANCH=None
TEST=Build GLaDOS EC with driver enabled and verify that valid
accelerometer data is read, and that range, resolution, and odr can all
be modified.
TEST=Build samus EC image and verify that the lid still
works. Additionally, verify that I can change the odr, rate, and
resolution.
TEST=make buildall tests
Change-Id: I238ff1dc13f5342a93f8f701a0da85c52f25d214
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Reviewed-on: https://chromium-review.googlesource.com/299013
Commit-Ready: Aseda Aboagye <aaboagye@chromium.org>
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Gwendal Grignou <gwendal@chromium.org>
Given it is in the chip as the accelerometer, it is on all the time.
Put it in suspend by setting its ODR to 0 is S3 and S5.
BRANCH=smaug
BUG=none
TEST=gyro still works in S0 and after S3/S5 transitions.
Change-Id: Ibbf51eb555e2c513a6561a1d22e231796b3da4b4
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/299542
Reviewed-by: Alec Berg <alecaberg@chromium.org>
This change picks CL:298067 into oak. Removes workaround for initial
board version. Also cleanup unnecessary TODO in usb_pd_policy.
BUG=none
BRANCH=none
TEST=tested on oak, plug low power charge to one port, then plug in
zinger. check charge port becomes the high power one.
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Signed-off-by: Rong Chang <rongchang@chromium.org>
Change-Id: I134be07d89fefad124eb6cceebf862a83e8bd3b4
Reviewed-on: https://chromium-review.googlesource.com/299150
Gesture recognition can be done in software (by the EC) or in
hardware, by the sensor itself.
Add variable to compile gesture.c only in the software case.
BRANCH=smaug
TEST=compile.
BUG=b:23570481
Change-Id: I22bef0bf744516df267020d9458e0299a4da3d72
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/296211
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Save .2mA during S3 by de-powering PP1800_DX_AUDIO.
BUG=chrome-os-partner:45091
TEST=Boot glados, go to S3 and verify PP1800_DX_AUDIO_EN is low. Go to
S0 and verify PP1800_DX_AUDIO_EN is high. Boot with locked descriptor
and try to overwrite descriptor region, verify that flashrom errors out.
BRANCH=None
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Change-Id: If05142ad7c39847a8e94e26d047daa2bc71f0ca5
Reviewed-on: https://chromium-review.googlesource.com/299003
Commit-Ready: Shawn N <shawnn@chromium.org>
Tested-by: Shawn N <shawnn@chromium.org>
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Separate the bd99992gw ADC interface from the NCP15WB thermistor
adc-to-temp maths so that the thermistor can be used with various
other interfaces.
BUG=chrome-os-partner:44764
TEST=make buildall -j
Manual on Glados. Boot to S0, run "temps".
Verify that temperatures start around 28C and begin to increase after
system is powered-on for a long duration.
BRANCH=None
Change-Id: I3e72e9f390feebaac2440dbe722485f8d1cf8c56
Signed-off-by: Wonjoon Lee <woojoo.lee@samsung.com>
Reviewed-on: https://chromium-review.googlesource.com/296871
Reviewed-by: Shawn N <shawnn@chromium.org>
Enable the light sensor driver for glados so it can be exported
to the host via ACPI.
BUG=chrome-os-partner:43493
BRANCH=none
TEST=enable ACPI ALS interface on glados in BIOS and kernel and
check that light sensor values can be read by the OS.
Change-Id: I813e8cae830832a1ef582b2821f1338e3c1b289b
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/298158
Reviewed-by: Shawn N <shawnn@chromium.org>
Enabled the trickle charging mode by setting the MinSystemVoltage
register[0x3EH] to board specific battery voltage minimum value.
When the battery voltage drops below the battery voltage minimum
value, trickle charging enabled.
BUG=none
TEST=Manually tested on Kunimitsu FAB4 prototype.
Drained the battery below voltage minimum value. Using the
i2cxfer command observed Trickle charging mode is active in
the information register[0x3AH].
BRANCH=none
Change-Id: Id6416f2b0b74fda8cf3eafb95e044586f90b8a8e
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/298143
Commit-Ready: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Tested-by: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Reviewed-by: Rong Chang <rongchang@chromium.org>
Initialise the ALTERNATE GPIO level flags along with rest of the flags
to prevent GPIO toggling during I2C initialization.
BUG=chrome-os-partner:44821
BRANCH=none
TEST=Manually tested on Kunimitsu FAB3.
I2C SDA & SCL lines do not toggle during I2C initialization.
Soon after the I2C init is done, read/write to PMIC is success.
Change-Id: I70f728017b00f407a0422fd4aa4dbfd8590d74de
Signed-off-by: Kevin K Wong <kevin.k.wong@intel.com>
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/298242
Commit-Ready: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Tested-by: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Reviewed-by: Shawn N <shawnn@chromium.org>
If the ALS is not enabled in S3/S5 states then it will generate
errors when trying to read so should be gated.
This could be done with a check for chipset_state or adding a
new CONFIG_ALS_POWER_GPIO to check. However the ALS is also not
needed when the host is in S3/S5 yet the task continues to run
in the background every 1 second.
This commit adds a new task enable/disable hook to disable the
task when the system is suspended and enable the task when it
is resumed.
In order to fit this new task in glados the als console command
is guarded by a new config option. Since this is not a very
frequently used/needed console command it is disabled by default.
And finally the kunimitsu and strago boards try to enable ALS
but they never actually enabled the ALS task so this new code was
failing to build because TASK_ID_ALS did not exist. Also samus
was enabling it but as TASK_NOTEST so tests will fail, though
they are disabled globally on samus.
BUG=chrome-os-partner:43493
BRANCH=none
TEST=enable ALS on glados and successfully build and use it,
also successfully build EC and tests for kunimitsu, strago,
and samus which are the other boards that use the ALS task.
Change-Id: I192940d7f306a1663c7cb789c313151bbb5f2b90
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/298156
Reviewed-by: Shawn N <shawnn@chromium.org>
Remove workaround for initial versions of boards in which we could
not detect VBUS presence unless CHARGE_EN was active. With this
change we can now properly charge from the port providing more
power.
Also cleanup unnecessary TODO in usb_pd_policy which isn't needed
anymore.
BUG=none
BRANCH=none
TEST=tested on glados. plug in a low power charger to one port,
then plug in zinger to the other port and make sure the second
port becomes the active charge port.
Change-Id: I1a39db6570f3469ae79dc36e1205a1b872c67152
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/298067
Reviewed-by: Shawn N <shawnn@chromium.org>
Enable charging from other dual-role devices by default.
BUG=chrome-os-partner:44958
BRANCH=smaug
TEST=tested on ryu with samus and a third party true dual-role
device.
Change-Id: I6540d00c33394eb66185bc4b5c27cf7c6b405ae8
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/297807
Reviewed-by: Shawn N <shawnn@chromium.org>
When a debug accessory is connected to the type-C port while the write
protection is enabled, put the case closed debugging in "partial" mode
rather than "full".
Update the "partial" mode to provide read-only access to the AP and EC
consoles.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=smaug
BUG=chrome-os-partner:44700
TEST=check the EC console input/output over USB is still working with SuzyQ
on a write-protected system, verify that the console input is disabled.
Change-Id: I5baa03d6e738d06437c45469f46b286e76a755a4
Reviewed-on: https://chromium-review.googlesource.com/297141
Commit-Ready: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Anton Staaf <robotboy@chromium.org>
Reviewed-by: Alec Berg <alecaberg@chromium.org>
To reduce the power consumption in non-S0 AP power state,
Shut tmp432 down if external power isn't present.
BRANCH=none
BUG=chrome-os-partner:43118
TEST=manual
1. make BOARD=oak -j
2. shutdown AP by EC console command:
> apshutdown
3. plug external power
4. check whether tmp432 is still running:
> tmp432
5. unplug external power
6. check whether tmp432 is shutdown:
> tmp432
Change-Id: I4726a18c8754dbe60070d878dff143c76d586dcc
Signed-off-by: Ben Lok <ben.lok@mediatek.com>
Reviewed-on: https://chromium-review.googlesource.com/295059
Reviewed-by: Shawn N <shawnn@chromium.org>
Enable the support for limiting the inrush current by routing the PCH_SLP_SUS
through EC gpio PMIC_SLP_SUS which allows the DUT to boot on charger without
the battery / dead battery. This is applicable to Kunimitsu FAB4 only.
Enabling the Glados patch for Kunimitsu FAB4.
Change-Id: I55de857f7006777640f7853b7bde98ba97e8bd13
Reviewed-on: https://chromium-review.googlesource.com/287378
BUG=chrome-os-partner:44706
TEST=FAB4 prototype boots to UI without battery / dead battery.
BRANCH=none
Change-Id: Ie81cdf3c59fc02d6d59dd06ca321705ca06e7b88
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/296521
Commit-Ready: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Tested-by: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Reviewed-by: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Reviewed-by: Shawn N <shawnn@chromium.org>
When the DUT enters to SOC G3 or rebooted, SLP_SUS assertion turns off the
A-rails which is causing the PMIC emergency shutdown. As a workaround this
patch disables the power fault in the PMIC register.
BUG=chrome-os-partner:44693
BRANCH=none
TEST=Manually tested on Kunimitsu FAB3.
- "reboot" from the EC console command works
- "ectool reboot_ec" from the Kernel terminal works
- "shutdown -h now" command from the Kernel terminal puts the device
in SoC G3 / PG3.
- cold reset from the servo board works
Change-Id: Id5e091ace876d7655f64e61cca4a9f0303b69604
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/297045
Commit-Ready: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Tested-by: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Reviewed-by: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Reviewed-by: Shawn N <shawnn@chromium.org>
