With the RO region being added to software sync, up to two hashes will
be requested during boot. Currently if vboot_hash has a valid hash when
the EC gets an EC_VBOOT_HASH_GET host command then it will return that
hash. When the EC gets a request for the RO hash after it has calculated
the RW hash it returns the RW hash in the response.
This change will add a check that the EC not only has a valid hash, but
that it is for the correct region.
BRANCH=none
BUG=none
TEST=Try to get the RO and RW hashes from depthcharge and make sure they
match the values gotten using ectool
Change-Id: I2449c8d79b4a74f4865dd1234fb253bcdac66a31
Signed-off-by: Mary Ruthven <mruthven@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/318861
Reviewed-by: Randall Spangler <rspangler@chromium.org>
After commit 98ab7484d331 ("keyboard: prevent races enabling/disabling
kb scanning") kbpress was totally broken, which wasn't so good for
FAFT. Fix it by making sure we go into polling mode for simulated
keyboard presses.
BUG=chrome-os-partner:48849
TEST=kbpress works
Change-Id: Icd663c2ee7a184e6af4438368595087b35724a4f
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/319586
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Add support for continuously writing ADC samples to a circular buffer.
CONFIG_ADC_PROFILE_FAST_CONTINUOUS should be defined and an
appropriate sized buffer must be passed to adc_read_all_channels().
BUG=chromium:569994
TEST=Manual on snoball. Verify 'adc' continues to function (single
mode). With pending commit, verify that continuous conversion interrupt
is called at appropriate frequency and values look consistent.
BRANCH=None
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Change-Id: I025825d72a698f8f1f4f95a89477df791bd5e67e
Reviewed-on: https://chromium-review.googlesource.com/318505
Commit-Ready: Shawn N <shawnn@chromium.org>
Tested-by: Shawn N <shawnn@chromium.org>
Reviewed-by: Shawn N <shawnn@chromium.org>
keyboard_scan_enable() is called from several contexts. From a skim of
the code I found:
* keyboard_lid_change(), which is called from HOOK_LID_CHANGE
* enable_keyboard(), which is called from HOOK_CHIPSET_RESUME
* lidangle_keyscan_update(), which is called from motion_sense_task.
* check_for_power_off_event() which is called from power_handle_state()
which is called from chipset_task.
* power_button_interrupt(), which is an interrupt
* power_button_change_deferred(), which is a deferred function
So, ummm, it's probably not a good idea to do a read-modify-write of a
variable without any locking. ...and then to act on the resultant state
in various different contexts.
It's presumed that's just what happened to poor Julius. Julius found
himself in the unfortunate situation where he resumed his device (with
the power button, I believe) and that everything worked (including
reading the battery state and including the accelerometer) but the
keyboard didn't work. Now, it should be noted that Julius is a little
strange. Well, maybe he's not strange and maybe just the way he uses
his laptop is strange. He uses his veyron_minnie device as a smart
keyboard/trackpad. Said another way: it is in tablet mode but is docked
to an HDMI monitor, the screen is face flat on his table, and he uses
the builtin keyboard and trackpad. Nobody else that I know does this.
It's pretty darn cool, but I just don't think anyone else would think of
it. Anyway, that might have something to do with how he reproduced
this. ...or it might not. He does that a lot and hasn't seen the
problem before now.
Anyway, I managed to reproduce a number of problems similar to what poor
Julius saw by adding a 200ms sleep in keyboard_scan_enable() after we
read disable_scanning_mask but before we did anything to it (I skipped
the sleep if this happened to be one of those people who was calling
from interrupt).
Since there appears to be no spin_lock_irqsave() in the EC, let's just
have the EC use atomic operations to mess with its masks. Then we'll
leave all heavy lifting to the task.
This requires thinking through the task code a bit.
Conflicts:
common/keyboard_scan.c
...due to commit 6112f20679 ("common: keyboard_scan: Add items to
.bss.slow.") in ToT.
BRANCH=ToT
BUG=chrome-os-partner:48470
TEST=Poke a lot with power button and lid; NTF.
Change-Id: I61b906505100186b0ca2c48e7b1a7ffaaa8a7d3e
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/317896
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
(cherry picked from commit 98ab7484d331a78fced870b58b4d82e79e2e0f4e)
Reviewed-on: https://chromium-review.googlesource.com/318292
Enabling of ALS is done during resume hook.
During EC sw sync, resume hook is not called
and hence ALS task wont run.
Adding init hook to wake up the ALS task.
BUG=chrome-os-partner:48418
BRANCH=none
TEST= On Kunimitsu board, ensure sw sync is enabled.
In OS, cat /sys/bus/iio/devices/iio:devicesx/in_illuminace_input
should output valid value and not zero.
Change-Id: Iba1a3ab2cf7bfc2d8aa36cf9bb9b762f398882c3
Signed-off-by: Jagadish Krishnamoorthy <jagadish.krishnamoorthy@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/317030
Commit-Ready: Freddy Paul <freddy.paul@intel.com>
Reviewed-by: Freddy Paul <freddy.paul@intel.com>
Reviewed-by: Shawn N <shawnn@chromium.org>
A typical EC image includes two similar in their functionality
subsections, RO and RW. CR50 has a small RO subsection, all it does -
detects a proper RW image to run and starts it up. To provide for
reliable firmware updates, the CR50 image needs to include two RW
sections, while the code is running from one RW subsection, the other
one can be upgraded.
This patch adds the ability to generate two identical RW sections,
mapped half flash size apart, and include them into the resulting EC
image.
To keep things simple the previously existing RW section's name is not
being changed, while the new (identical) RW section is named RW_B.
Two configuration options need to be defined to enable building of the
new image type: CONFIG_RW_B to enable the feature and
CONFIG_RW_B_MEM_OFF to define where RW_B should be mapped into the
flash.
A new rule added to Makefile.rules allows to generate a different lds
file from the same source (core/cortex-m/ec.lds.S) by defining a
compile time variable to pick a different base address for the
rewritable section, when RW_B is built.
BRANCH=none
BUG=chromium:43025
TEST=as follows:
- make buildall -j still succeeds
- verified that regular CR50 image starts successfully
- modified chip/g/loader/main.c to launch RW_B first, re-built and
re-run the image, observed on the console:
vvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvv
cr50 bootloader, 20151118_11218@80881, no USB, full crypto
Valid image found at 0x00084000, jumping
--- UART initialized after reboot ---
[Reset cause: power-on]
[Image: unknown, cr50_v1.1.4160-4c8a789-dirty 2015-12-07 18:54:27 vbendeb@eskimo.mtv.corp.google.com]
[0.001148 Inits done]
This FPGA image has no USB support
Console is enabled; type HELP for help.
> [0.002212 task 2 waiting for events...]
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
(note that the image base address is 0x840000, which is RW_B).
Change-Id: Ia2f90d5e5b7a9f252ea3ecf3ff5babfad8a97444
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/316703
Commit-Ready: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
When AP is suspended, only predefined events could wakeup AP.
Check EC_MKBP_EVENT_KEY_MATRIX event when we use embedded keyboard to make AP
wakeup from S3 power state.
BRANCH=none
BUG=chrome-os-partner:47554
TEST=Enter "powerd_dbus_suspend" in AP console to make system
suspend and then press embedded keyboard to wakeup AP.
Change-Id: I79f91776c39554a4e488e50841d3537fe85fea13
Signed-off-by: YH Huang <yh.huang@mediatek.com>
Reviewed-on: https://chromium-review.googlesource.com/312156
Tested-by: Wei-Ning Huang <wnhuang@chromium.org>
Reviewed-by: Wei-Ning Huang <wnhuang@chromium.org>
Reviewed-by: Rong Chang <rongchang@chromium.org>
Add 2 bytes into the TX byte count register used in
TCPC interface.
BUG=chrome-os-partner:48256
BRANCH=none
TEST=load on glados and attach zinger, make sure
PD negotiation successful.
Change-Id: Ie57d79f20def861c22f6e2e023545a65825ab3b4
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/315879
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Rather than having various PWM module groups initialized from various
HOOK_INIT functions, group them all into a single module and initialize
them all from a common function in pwm.c.
BUG=chromium:563708
TEST=Manual on samus / samus_pd (with CONFIG_ADC enabled). Verify that
samus fan + KB backlight control is functional and samus_pd correctly
sets PWM output.
BRANCH=None
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Change-Id: I9f9b09bfa544cd9bc6b7a867e77757dff0505941
Reviewed-on: https://chromium-review.googlesource.com/314882
Commit-Ready: Shawn N <shawnn@chromium.org>
Tested-by: Shawn N <shawnn@chromium.org>
Reviewed-by: Alec Berg <alecaberg@chromium.org>
If we're still in DISCONNECTED or DISCONNECTED_DEBOUNCE state, don't check
CC lines to detect a disconnect since CC polarity has not yet been
established.
BUG=chrome-os-partner:48220
BRANCH=None
TEST=Verify PD contact can be negotiated on Snoball with either polarity.
Change-Id: Iacde14446c0ff5d2170936b650f56668038f613e
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/315780
Commit-Ready: Shawn N <shawnn@chromium.org>
Tested-by: Shawn N <shawnn@chromium.org>
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Reviewed-by: Shawn N <shawnn@chromium.org>
When none of temp sensors' temp/fan speed profile is not set(zero),
thermal control will set 0% duty over initial fan speed setting.
This patch allows fan under EC control at inital max speed
till host's DPTF sets proper fan speed.
BRANCH=master
BUG=none
TEST=1. check if fan is running at max speed until ChromeOS UI comes up.
2. check if fan is running when system is in recovery mode.
Change-Id: I1b3e69b003ba1045779e263b25ac35b103fe457e
Signed-off-by: Kyoung Kim <kyoung.il.kim@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/314363
Commit-Ready: Kyoung Il Kim <kyoung.il.kim@intel.com>
Tested-by: Kyoung Il Kim <kyoung.il.kim@intel.com>
Reviewed-by: Shawn N <shawnn@chromium.org>
cl/301134 has a bug. If the AP wants a forced sensor (i.e. light) at
100Hz but a sampling frequency at 1s, we would still wake it up every
.1s instead of 1s.
Take in account force mode only when calculating the sampling frequency
not the interrupt interval.
BRANCH=smaug
BUG=b:25425420
TEST=Check the device goes to suspend even with 40Hz light sampling
rate:
echo 0 > /sys/bus/iio/devices/iio:device0/frequency
echo 40000 > /sys/bus/iio/devices/iio:device3/frequency
echo mem >/sys/power/state
Before it would resume just after suspend/while suspending.
Change-Id: Ie4fe36268cb1b04bc8f01ec885af84fad9e8b282
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/314315
Reviewed-by: Alec Berg <alecaberg@chromium.org>
When sensor_shutdown() is called, the sensors may already been powered
off, or will be soon.
In that case, do not attempts to access them.
Check their state before setting range or disabling activities.
BRANCH=smaug
BUG=chromium:557966
TEST=compile
Change-Id: I60640b120a23f9aab393a93c4c67ef17222ced4e
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/314382
Reviewed-by: Alec Berg <alecaberg@chromium.org>
The EC-3PO console and interpreter could be used to talk to EC images
which do not have the necessary changes to support the new enhancements.
If this was the case, the interpreter would be very confused and the
user wouldn't be able to use the console. This commit adds
compatibility support for talking to both non-enhanced and enhanced EC
images.
When the console and interpreter are instantiated, they assume by
default that the EC image they are talking to is non-enhanced. When the
user presses the carriage return key, the console initiates an
interrogation with the EC image. The interrogation is a simple
EC_SYN(0xEC) and waits EC_INTERROGATION_TIMEOUT for the correct
EC_ACK(0xC0). Enhanced EC images will try to reply immediately to a
EC_SYN. Non-enhanced EC images will just ignore the EC_SYN as it's not a
printable character. Once the interrogation is complete, the console
will either simply pass everything forwards to the EC or provide the
console interface itself.
BUG=chrome-os-partner:46063
BRANCH=None
TEST=Enabled CONFIG_EXPERIMENTAL_CONSOLE on GLaDOS. Entered some
commands and verified console was working. Disabled
CONFIG_EXPERIMENTAL_CONSOLE on GLaDOS, reflashed, and verified console
was still working without restarting the EC-3PO console.
TEST=./util/ec3po/console_unittest.py -b
TEST=./util/ec3po/interpreter_unittest.py -b
TEST=cros lint --debug util/ec3po/console.py
TEST=cros lint --debug util/ec3po/console_unittest.py
TEST=cros lint --debug util/ec3po/interpreter.py
TEST=cros lint --debug util/ec3po/interpreter_unittest.py
Change-Id: I4f472afbdd7e898bee308c239b68ace0f4049842
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Reviewed-on: https://chromium-review.googlesource.com/313002
Commit-Ready: Aseda Aboagye <aaboagye@chromium.org>
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Added new host command to support returning lid angle.
New output from ectool:
System with lid angle support:
------------------------------------------
localhost ~ # ectool motionsense lid_angle
Lid angle: 72
System without lid angle support:
------------------------------------------
localhost ~ # ectool motionsense lid_angle
EC result 3 (INVALID_PARAM)
BUG=none
BRANCH=none
TEST=run "ectool motionsense lid_angle"
verify the value matches the physical lid angle position
Change-Id: I4179172c778f643640561e819216f7adfee679d2
Signed-off-by: Kevin K Wong <kevin.k.wong@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/313345
Reviewed-by: Shawn N <shawnn@chromium.org>
If multiple TCPCs are present on a system then we may have multiple
alert signals, each of which alerts us to the status of a different
TCPC. Make boards with external non cros-ec TCPCs define
tcpc_get_alert_status, which returns alert status based upon any alert
GPIOs present, and then service only ports which are alerting.
BUG=chromium:551683,chrome-os-partner:47851
TEST=Verify snoball PDCMD task sleeps appropriately when no devices are
inserted, and verify ports go to PD_DISCOVERY state when we attach
samus. Also verify that glados / glados_pd can still negotiate PD.
BRANCH=None
Change-Id: Iae6c4e1ef4d6685cb5bf7feef713505925a07c8c
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/313209
Commit-Ready: Shawn N <shawnn@chromium.org>
Tested-by: Shawn N <shawnn@chromium.org>
Reviewed-by: Alec Berg <alecaberg@chromium.org>
This change includes hardware and software support for SHA1/256 on
CR50. When running in the RO image, only hardware sha256 support is
included. When running in the RW image, the code auto-selects between
the software and hardware implementation. Software implementation path
is taken if the hardware is currently in use by some other context.
Refactor the CR50 loader to use this abstraction.
The existing software implementation for SHA1 and SHA256 is used for
the software path.
CQ-DEPEND=CL:*239385
BRANCH=none
TEST=EC shell boots fine (implies that SHA256 works)
BUG=chrome-os-partner:43025
Change-Id: I7bcefc12fcef869dac2e48793bd0cb5ce8e80d5b
Signed-off-by: nagendra modadugu <ngm@google.com>
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/313011
In case the actual ODR rate is way higher that the AP asked for,
we don't have to settle to a slower EC rate if
EC rate == AP requested ODR rate.
BRANCH=smaug
BUG=none
TEST=Run android.hardware.cts.SingleSensorTests
Change-Id: I437f47bd942a16694c7efcdbc00201352f0480a6
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/313641
Reviewed-by: Alec Berg <alecaberg@chromium.org>
AP could collect samples while motion task was still adding timestamp.
A data stream not ending with a timestamp can lead to timestamp error in
the kernel.
This is espcially true if the motion task interrupt the AP back to back,
when sensor ODR changes for instance.
BRANCH=smaug
BUG=b:24367625
TEST=Run android.hardware.cts.SingleSensorTests
Change-Id: I5820216a2cfc0a869db7dc5ef75d4be126a53b4f
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/313640
Reviewed-by: Alec Berg <alecaberg@chromium.org>
When task creating, input_current will be set as condition.
But there is no more handling for this value. so it will remain
even if condition is changed.
This will put input current decision int the loop so that we can
proper input current as battery existence.
BUG=chrome-os-partner:47546
TEST=make buildall, command 'charger' with/without battery.
and see it is changed dynamically
BRANCH=None
(cherry picked from commit d2ac89d58c34d7cc0a2a3fb591fcdcddbe2e9feb)
Change-Id: Ib72e20faf7c7f302a4e39d43b23176247e5176fa
Signed-off-by: Wonjoon Lee <woojoo.lee@samsung.com>
Reviewed-on: https://chromium-review.googlesource.com/312950
Commit-Ready: Shawn N <shawnn@chromium.org>
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Throughout the code, there are comparison between frequency (in mHz) and
period (in us). To improve readability, append units (_mhz, _us) after
variable names.
BRANCH=smaug
BUG=none
TEST=compile.
Change-Id: Icc9c66d9f06c526fc3b74fd85ca9759b702ee416
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/313221
Reviewed-by: Alec Berg <alecaberg@chromium.org>
We need to wake up the main task, even if we disable a sensor. It will
force sending the sensors samples in the FIFO and put a timestamp behind
them.
Also, reduce the interrupt period by 10us to be sure we fire interrupt
to the AP even if there are some variation in the timing calculation.
BUG=b:24367625
BRANCH=smaug
TEST=Run ts.SingleSensorTests overnight.
Change-Id: I6d966d52b5cbb72ba5eb936bc2fad6c06c7d8605
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/312986
Reviewed-by: Alec Berg <alecaberg@chromium.org>
If EC sampling rate is close to sensor rate, decrease sampling frequency
by 5% to prevent samples by the EC without data.
It can happen when the clocks are slightly different and get
unsynchronized.
BRANCH=smaug
BUG=b:24367625
TEST=Ran cts.SingleSensorTests overnight without error.
Change-Id: Iab5e578763171411eb474e1e717167c8e1ef7ecf
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/312985
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Some SPI slave devices need a delay to digest write commands. (BMI160).
Add a 1ms delay in the write command.
BRANCH=smaug
BUG=none
TEST=Check on the logic analyzer that there is ~1.5ms delay between back
to back spixfer w ... commands.
Change-Id: I7cc6ed0da9ae39550e58457b9431eb01b5ab36d8
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/305379
Reviewed-by: Alec Berg <alecaberg@chromium.org>
To ease finer calculation of ec rate change units from
ms to us.
BRANCH=smaug
BUG=b:24367625
TEST=compile
Change-Id: I52057c8ca1b1180a64b58d1ba0af9ec53f40b026
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/312984
The receive buffer needs to be able to accommodate the largest
commands. Even though the spec sets the size limit at 4096, let's keep
it at 2K for now and see if this needs to be increased.
BRANCH=none
BUG=chrome-os-partner:43025
TEST=with the rest of the patches applied, the AES test vectors pass
through without a problem.
Change-Id: I1cd6979fdaa343f0ddfddb58c552368b3f54db95
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/312588
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
This code allows to send extension commands over TPM protocol, no
callbacks have been registered yet.
The same buffer is used as input and output data. The header is
stripped off before the callback is called and then re-added after
processing.
This could be used for testing, for proprietary firmware update
protocol, etc.
BRANCH=none
BUG=chrome-os-partner:47524
TEST=none yet
Change-Id: I91f692cc6e20abe774ee4ef001be28e5af102b2a
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/312587
Always initialize TCPC when TCPM boots. This guarantees
that our TCPM driver is synced up with the TCPC reg values.
BUG=chrome-os-partner:47608
BRANCH=none
TEST=test on glados. reboot EC and PD MCUs independently
with and without external power.
Change-Id: I2d989e8a85ba8a72fe1a8edaef8da9c51651d240
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/312951
Reviewed-by: Shawn N <shawnn@chromium.org>
This patch introduces a facility which would allow to compile in
callbacks for arbitrary commands passed over various communication
protocols.
Typically this will be used for testing, when various test commands
are multiplexed over an existing protocol.
The callbacks are associated with 16 bit command codes. On input the
callback receives a buffer, containing the command's argument, the
size of the command argument and the maximum size of the buffer. On
output the callback stores processing result in the same buffer and
updates the size to the actual amount of returned data.
Callback descriptors are stored in a dedicated read only section which
is scanned by extension_route_command() to find a callback associated
with a certain command code.
A console channel is also being introduced to allow controlling
console output generated by extension commands handlers.
BRANCH=none
BUG=chrome-os-partner:47524
TEST=none yet
Change-Id: I8ae16a78ca7d72176a5e7f74dd7a232078e7c06c
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/312586
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Use the previously introduced endian conversion routines in the driver
and the TPM2 library.
Use packed TPM message header structure to make it easy to access
unaligned header fields.
BRANCH=none
BUG=chrome-os-partner:43025
TEST=the tpm startup command still succeeds.
Change-Id: I03078481664858a19617e248f98cb20013c27445
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/312585
Overly complex previous formula could lead the EC to throw all samples
between 2 timestamps and put 2 event within one timestamp.
That would confuse the kernel. If the motion sense task is delayed while
this happen, the delta between the 2 samples could be so long that
CTS test cts.SingleSensorTests would fail.
BRANCH=smaug
BUG=b:24367625
TEST=Loops of cts.SingleSensorTests pass.
Change-Id: I29e6bf354ccb7ecf741a91116854d6abe07558dc
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/312364
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
In S0 state, update leds only when needed:
add a variable in get_battery_level to indicate the colors need
to be changed.
BRANCH=smaug
BUG=b:25510300
TEST=Check the traffic on the i2c bus notice less traffic
coming from lightbar task in S0.
Change-Id: I22dce35edd794424f6fbb607a0dbb495eb308897
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/311756
Reviewed-by: Alec Berg <alecaberg@chromium.org>
On Ryu EVT2, where sensors share a 100kb i2c bus with other device,
when the sensors set to their maximal frequency and sampling interval
set to 5ms, the power management task would wait forever for the i2c
lock.
Increase the minimal amount of time the task can wait from 3ms to 8ms in
that case.
This is not an issue for Ryu PVT where the sensors are on a separate SPI
bus. However, on EVT, when setting the accelerometer/gyro over 125Hz, EC
won't be able to deliver the data in non-batched mode.
BRANCH=smaug
BUG=b:25510300
TEST=Without this change, an evt2 board would crash when plugging/unplugging
the charger while the sensors are set with:
echo 200000 > iio:device0/frequency # Accel
echo 5 > iio:device0/sampling_frequency
echo 200000 > iio:device1/frequency # Gyro
echo 25000 > iio:device2/frequency # Mag
Change-Id: Idb30da9ab8da61284388db73365c37be3a250dec
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/311755
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Use test_export_static for static variable/function that needs to by
used by tests/motion_lid.c
BRANCH=smaug
BUG=none
TEST=Compile, make buildall -j
Change-Id: I2f3eb72ce319622842885be9125b91e58f47133a
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/311754
Reviewed-by: Alec Berg <alecaberg@chromium.org>
BUG=chrome-os-partner:46056
BUG=chrome-os-partner:46063
BRANCH=None
TEST=Enable CONFIG_REPLACE_LOADER_WITH_BSS_SLOW on GLaDOS. Build,
flash, and verify AP and EC boot. Suspend/Resume and verify that port80
data is in the history.
TEST='sysjump rw' suspend/resume nad verify that new port80 writes are
present in the history.
TEST=make -j buildall tests.
CQ-DEPEND=CL:311209
Change-Id: Idebb3247b55465f1fbf35a33dff2f00968b8f4ce
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Reviewed-on: https://chromium-review.googlesource.com/311365
Commit-Ready: Aseda Aboagye <aaboagye@chromium.org>
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
This commit introduces a new CONFIG_* option. To utilise the
experimental console, simply define the following config option in the
board's board.h file.
#define CONFIG_EXPERIMENTAL_CONSOLE
This is a temporary option which allows the EC console to be work with
the EC-3PO interactive console interface. When this option is enabled,
the EC expects commands to packed in a particular format. This is for
command integrity and allows the interpreter to perform automatic
command retrying in the event that a character is dropped from the sent
command.
It also removes a lot of the console editing methods since they are now
being served by EC-3PO.
Once the EC-3PO interpreter is pulled into servod, we can enable this
feature by default and the config option can go away.
BUG=chrome-os-partner:46054
BRANCH=None
TEST=make -j buildall tests
TEST=Enable CONFIG_EXPERIMENTAL_CONSOLE on GLaDOS; Flash EC and verify
that console works via the EC-3PO interactive console interface.
TEST=Build and flash on GLaDOS and verify normal console operation on
standard EC UART.
CQ-DEPEND=CL:308615
Change-Id: I5e66eb94e31299b27ce029b7f7ce6ba0a7fb6816
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Reviewed-on: https://chromium-review.googlesource.com/309991
Commit-Ready: Aseda Aboagye <aaboagye@chromium.org>
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
BUG=chrome-os-partner:46056
BUG=chrome-os-partner:46063
BRANCH=None
TEST=Enable CONFIG_REPLACE_LOADER_WITH_BSS_SLOW on GLaDOS. Build,
flash, and verify that AP and EC boot. Perform typing test with no jank
or other oddities.
TEST='sysjump rw' and repeat the typing test.
TEST=Hold down arrow down and issue 'reboot' command.
TEST=make -j buildall tests
CQ-DEPEND=CL:311209
Change-Id: I35911862af2a4e9feb795b2a9a2aafa97687e2f2
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Reviewed-on: https://chromium-review.googlesource.com/311411
Commit-Ready: Aseda Aboagye <aaboagye@chromium.org>
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Fix bug with the new VBUS_NEVER_LOW flag in which if a BC1.2 charger
is attached on boot, we will not set the charger as a dedicated
charger and therefore not charge from it, until the charger is
disconnected and reconnected. This happens because in SNK_DISCOVERY
we will send soft reset first, and then when the charger doesn't
respond, we send hard reset. But, registering the charger as a
dedicated charger previously only happened when we send hard reset
directly after SNK_DISCOVERY state.
BUG=none
BRANCH=none
TEST=tested on glados. sysjump with bc1.2 charger plugged in and make
sure we charge from it.
Change-Id: Ida89304092a2186bcb2aa885917d706231490288
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/311364
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Shawn N <shawnn@chromium.org>
Re-order logic in BC1.2 detection task so that we open the
USB switches immediately upon detecting a connection, then
debounce the connection, then reset the pericom and determine
BC1.2 charger type.
This fixes two problems:
- Problem where host could enumerate dut, detect disconnect,
and then re-enumerate.
- Problem where sometimes dut would detect a host workstation
as a proprietary charger because we weren't delaying long
enough after opening USB switches before triggering pericom
reset.
BUG=chrome-os-partner:47219
BRANCH=smaug
TEST=tested by connecting workstation to ryu (tested both
pluggin in A side first and C side first). Without this patch,
my workstation often see's disconnect and reconnect. With
this change we only get one connect.
Change-Id: I07cc3473ff32953fad3cc6d1db01b86b44969c4e
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/311804
Reviewed-by: Shawn N <shawnn@chromium.org>
Most of the pd ECs have CONFIG_LTO enabled which turns on GCC
Link-Time Optimizations. Unless protected, this removes the
FMAP data from the generated EC images.
BUG=chrome-os-partner:46442
TEST=Manually tested pd programming on Kunimitsu.
flashrom -p ec:dev=1 -w ec.bin is successful
BRANCH=none
Change-Id: I3badd1b245ab7490d75331be8074a0557f7b4d4b
Signed-off-by: Shamile Khan <shamile.khan@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/310879
Reviewed-by: Shawn N <shawnn@chromium.org>
BUG=chrome-os-partner:46056
BUG=chrome-os-partner:46063
BRANCH=None
TEST=Enabled CONFIG_REPLACE_LOADER_WITH_BSS_SLOW on GLaDOS; Build and
flash; Verify that AP and EC boot. Verify that AC notifications are sent
to the AP. Verify that I can set temperature thresholds.
TEST='sysjump rw' and repeat above tests.
TEST=make -j buildall tests
CQ-DEPEND=CL:311209
Change-Id: If2a7b0ce08b37e30362ab77eee1317c8a86b90dd
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Reviewed-on: https://chromium-review.googlesource.com/311344
Commit-Ready: Aseda Aboagye <aaboagye@chromium.org>
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Add HW charge ramping option and enable on glados.
Modify charge_manager to enable/disable HW charge ramping
when option is defined.
Unfortunately, the isl9237 doesn't have a way to determine
what the input current limit has settled on, so the EC will
always report the max input current for that supplier.
BUG=chrome-os-partner:47335
BRANCH=none
TEST=plug in CDP, SDP, DCP, type-C, and PD charger. Make sure
we ramp to a reasonable value for the correct suppliers.
Make sure we don't ramp for type-C and PD chargers.
Change-Id: Ib541fa0be48d8f4d261c71b853b0ee72b2adbf6b
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/311301
Reviewed-by: Shawn N <shawnn@chromium.org>
