3 Commits

Author	SHA1	Message	Date
Nick Sanders	fd528684dd	mn50: fix usb_update ... Add support for update related vendor commands in mn50 by relocating relevant code from board/cr50 to chip/g. BUG=b:36910757 BRANCH=None TEST=./extra/usb_updater/usb_updater -d 18d1:502a build/mn50/ec.bin Change-Id: Iec0fe5585b5b6eb099f9254dfb0e5b02d5106abc Reviewed-on: https://chromium-review.googlesource.com/537999 Commit-Ready: Nick Sanders <nsanders@chromium.org> Tested-by: Nick Sanders <nsanders@chromium.org> Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>	2017-06-16 17:24:28 -07:00
Nick Sanders	81b2654dc9	mn50: socket controls ... Add console and usb_spi commands to enable or disable IOs to the socket, so that it will not be powered if a chip is inserted, and control reset and boot_cfg. BUG=b:36910757 BRANCH=None TEST=Check no voltage when socket is disabled. Full spiflash compatibility. Change-Id: Ie4ce0613a868030833abfdccd827acce2753dc6f Reviewed-on: https://chromium-review.googlesource.com/509072 Commit-Ready: Nick Sanders <nsanders@chromium.org> Tested-by: Nick Sanders <nsanders@chromium.org> Reviewed-by: Mary Ruthven <mruthven@chromium.org>	2017-05-25 00:14:07 -07:00
Nick Sanders	8df3b161e9	mn50: initial checkin ... This firmware supports a board used to initialize firmware on new cr50 parts. BUG=b:36910757 BRANCH=None TEST=boots on scribe board, spi/usb/uart/i2c functionality works. TEST=cr50 boots on reef, CCD EC+AP SPI/UARTS work Change-Id: I48818225393a6fc0db0c30bc79ad9787de608361 Reviewed-on: https://chromium-review.googlesource.com/437627 Commit-Ready: Nick Sanders <nsanders@chromium.org> Tested-by: Nick Sanders <nsanders@chromium.org> Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>	2017-05-12 03:25:39 -07:00