This patch adds wait between DSW_PWROK and PWRBTN assert. It is
required to be 95 msec or longer for Kaby Lake and Sky Lake.
Refer to the timing diagram for G3 to S0 on Sky Lake or Kaby Lake
platform design guide for details.
BUG=b:62584658
BRANCH=none
TEST=On Fizz, measured time between DSW_PWROK high and PWRBTN assert
for 1:AC plug-in, 2:recovery+power press, 3: reboot ec command.
Change-Id: I89a14ac9a49e20a332bd662d90be62f8ea23b003
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/534901
This change ensures that the power button pulse setting is saved and
restored across a sysjump. It uses the SYSJUMP_TAG "PB" (0x5042).
BUG=b:62445190
BRANCH=None
TEST=The condition mentioned in the bug could be reproduced using
following steps:
1. reboot on EC console
2. Use Vup/Vdn to select any option other than Power off.
3. Press power button
After step #3 above, device would shut down instead of selecting the
option. Verified that with this change, the device does not power off
anymore at step #3.
Change-Id: Icebe9c17d39a82fc3854dd75cc3a1dea032a234a
Signed-off-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/533921
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
This patch sets the initial power button state to on if recovery
mode is requested.
BUG=b:37274183
BRANCH=none
TEST=Verify EC boots AP immediately in recovery mode on Fizz.
Verify EC doesn't boot AP immediately in normal mode.
Change-Id: Ib24eb6c6b7e9200cf7ba6af3e486337da3c68355
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/514209
Reviewed-by: Randall Spangler <rspangler@chromium.org>
This change sets the initial power button state to init-on
if the power button is pressed.
BUG=b:37274183
BRANCH=none
TEST=Enter recovery mode by power+recovery button press.
Change-Id: I6ed849bc303e7cdbcb975ae2a6ff278093c86088
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/486946
Reviewed-by: Duncan Laurie <dlaurie@google.com>
This change adds CONFIG_POWER_BUTTON_INIT_IDLE. When it's set,
the system starts with the power button state idle. It means
when the board boots from power-off, it stays at G3.
BUG=b:37536389
BRANCH=none
TEST=Power on Fizz. Verify it stays at G3. Verify it boots
by pressing power button.
Change-Id: I09a62a69d9f201b2dc261838cc9b4425fe3a8dc1
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/486945
Reviewed-by: Duncan Laurie <dlaurie@google.com>
power_button_x86.c and switch.c assume there is a lid switch. This
patch separate them so that a board with power button but with no
lid can be configured properly.
This patch also moves backlight control to the board directory
so that only the boards with a backlight turn it on/off when power
state changes.
BUG=none
BRANCH=none
TEST=boot fizz. make buildall.
Change-Id: If4070cdc4b1221fae68b35ec3497335d81f192fd
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/489602
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Power button pulse is disabled by the host whenever it wants to treat
the power button as an input and not trigger SMI. Clear this setting
whenever there is a chipset state transition to default pulse
enabled.
BUG=b:37277943
BRANCH=None
TEST=make -j buildall
Change-Id: Id0cb3748bf7e25ad9111170116113151d9bed69e
Signed-off-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/476090
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
All boards have been transitioned to charge_state_v2.c
So charge_state_v1.c, HOOK_CHARGE_STATE_CHANGE, and
CONFIG_CHARGER_TIMEOUT_HOURS can be removed
BUG=chrome-os-partner:36272
TEST=make -j buildall
BRANCH=none
Change-Id: I3f20c5198ea75185f9894deb792575a1be31432a
Reviewed-on: https://chromium-review.googlesource.com/435467
Commit-Ready: Sam Hurst <shurst@google.com>
Tested-by: Sam Hurst <shurst@google.com>
Reviewed-by: Shawn N <shawnn@chromium.org>
Updating variable name from smi_enabled to
power_button_pulse_enabled, which is a more accurate
description of the intended functionality.
BUG=chrome-os-partner:61275
BRANCH=None
TEST=reboot reef and try using power button for selection
during the detachable menus and ensure that the
DUT doesn't turn off.
Change-Id: Ia04e032818c73439d2aeacdb8fcabbe3bce7c151
Signed-off-by: Shelley Chen <shchen@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/429070
Reviewed-by: Duncan Laurie <dlaurie@google.com>
Specifically, we are using a bit to disable the
SMI pulse on x86 systems so that we can use the
power button for menu selection.
BUG=chrome-os-partner:61275
BRANCH=None
TEST=Try running with depthcharge sending the host command
during detachable FW menus and making sure power
button select doesn't turn off device on reef.
Change-Id: I4a68cf514d514a4abe98beb99e7934d6fb0f44bd
Signed-off-by: Shelley Chen <shchen@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/427413
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
This adds new key combination (Left_Shift+Esc+Refresh+Power) that triggers
recovery mode by setting a new host event
EC_HOST_EVENT_KEYBOARD_RECOVERY_HW_REINIT. This host event can be used
whenever user wants to request entry into recovery mode by
reinitializing all the hardware state (e.g. memory retraining).
BUG=chrome-os-partner:56643,chrome-os-partner:59352
BRANCH=None
TEST=Verified that device retrains memory in recovery mode
with (Left_Shift+Esc+Refresh+Power) on reef.
Change-Id: I2e08997acfd9e22270b8ce7a5b589cd5630645f8
Signed-off-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/407827
Reviewed-by: Randall Spangler <rspangler@chromium.org>
x86 systems will auto-power-on when power is applied to the EC. When
the battery level is critically low, power-on is prevented, except when
the system is unlocked. So, when unlocked, some systems will
auto-power-on regardless of battery level, overcurrent the charger /
battery, and then repeat forever.
Prevent this reboot loop by ignoring auto-power-up when the battery is
critically low, regardless of system unlocked status.
BUG=chrome-os-partner:48339
TEST=Verify power-up is prevented on no-battery chell w/ donette. Then,
run 'powerbtn' on EC console and verify system powers on (and
overcurrents).
BRANCH=None
Change-Id: Ia631b5a8c45b42ec805e4a0c3f827929a0efd236
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/319187
Commit-Ready: Shawn N <shawnn@chromium.org>
Tested-by: Shawn N <shawnn@chromium.org>
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Holding the power button is currently the best known way to bring the AP
back to a state where it is shutdown and not powered.
BUG=chrome-os-partner:40826, chrome-os-partner:40677
TEST=Run `apshutdown` on glados, verify that power state machine transitions
to G3 after several seconds. Run `powerbtn`, verify that state machine
transitions back to S0.
BRANCH=None
Change-Id: Ia799c5f199127f31bd24907b93946c6289d381f8
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/275060
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Allow power button presses which turn the AP off.
TEST=Manual on Samus. Boot system with depleted battery, hit power
button at dev screen and verify AP powers off.
BUG=None
BRANCH=Samus
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Change-Id: I68c9b6c07520992ebba9dcbeccc60ebfb41ca112
Reviewed-on: https://chromium-review.googlesource.com/243710
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Allow CONFIG_CHARGER_MIN_BAT_PCT_FOR_POWER_ON to be defined at the board
level to be the minimum battery percentage required for power-on. If the
battery level is below the threshold, or if the battery is missing,
power button presses will be ignored.
BUG=chrome-os-partner:31127
TEST=Manual on Samus with subsequent commit. Verify that AP continues
to boot normally when charge level exceeds
CONFIG_CHARGER_MIN_BAT_PCT_FOR_POWER_ON. Verify that power button
presses are ignored when the charge level is below the threshold, and
we return to G3.
BRANCH=Samus
Change-Id: I0ff3f7ddabf38080332470e172c8b2e307bf1655
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/236021
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Modules that are enabled are listed below:
- Power Sequencing
- Keyboard Scan and Protocol
- LPC to support Keyboard
- Power Button Task
ec.spi.bin has to be generated manualy using
pack_ec.py
BUG=None
BRANCH=None
TEST=Tested on Stargo-Proto board
Change-Id: Ic5d504c3d6e9c7c5f3482fb7e9e37800b6274824
Signed-off-by: Divya Jyothi <divya.jyothi@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/226303
Reviewed-by: Vic Yang <victoryang@chromium.org>
When this option is configured, two changes take place.
First, the AP doesn't power on by default when the EC reboots. To boot it,
you can run the "powerbtn" command, or poke the power button manually, or
any of the normal things.
Second, we watch for power-related signal changes (anything that's connected
to the power_signal_interrupt() function) and keep track of them as they
happen. After a second with no further changes, we print the time and value
of each change. For example:
[19.939212 Port 80: 0x29]
[19.967971 HC 0x23]
[19.976236 Port 80: 0x3a]
[19.995700 HC 0x87]
[20.567884 Port 80: 0x73]
11 signal changes:
19.638241 +0.000000 PCH_SLP_SUS_L => 1
19.654378 +0.016137 PCH_SLP_S5_L => 1
19.654457 +0.000079 PCH_SLP_A_L => 1
19.654535 +0.000078 PCH_SLP_S3_L => 1
19.654587 +0.000052 PCH_SLP_S4_L => 1
19.659630 +0.005043 PGOOD_1_5V_DDR => 1
19.663199 +0.003569 PGOOD_1_5V_PCH => 1
19.664751 +0.001552 PGOOD_1_8VS => 1
19.668735 +0.003984 PGOOD_VCCP => 1
19.671883 +0.003148 PGOOD_VCCSA => 1
19.868406 +0.196523 PGOOD_CPU_CORE => 1
[21.908551 Port 80: 0xf0]
[21.908855 HC 0x48]
BUG=none
BRANCH=ToT
TEST=manual
Build with CONFIG_BRINGUP, notice those two changes.
Change-Id: I55fd2021a0eae7dbfd1aaf5d93971f65bf2367b9
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/202574
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Our code base contains a lot of debug messages in this pattern:
CPRINTF("[%T xxx]\n") or ccprintf("[%T xxx]\n")
The strings are taking up spaces in the EC binaries, so let's refactor
this by adding cprints() and ccprints().
cprints() is just like cprintf(), except that it adds the brackets
and the timestamp. ccprints() is equivalent to cprints(CC_CONSOLE, ...)
This saves us hundreds of bytes in EC binaries.
BUG=chromium:374575
TEST=Build and check flash size
BRANCH=None
Change-Id: Ifafe8dc1b80e698b28ed42b70518c7917b49ee51
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/200490
Reviewed-by: Randall Spangler <rspangler@chromium.org>
In some cases, the system will boot to S0 from the point of view of
the EC, but PLTRST# will never deassert. Work around this by waiting
50 ms for PLTRST# to deassert. If it doesn't, force the chipset all
the way down by deasserting RSMRST#, then pulse the power button to
turn it back on.
Also add a powerfail debug command to simulate this failure event, so
that the recovery process can be tested.
Add API to the LPC module to get the state of PLTRST#, and to the
power button state machine to force it released when we shut down the
chipset and and force another power button pulse as we reset the
chipset.
BUG=chrome-os-partner:28422
BRANCH=baytrail
TEST=1. Boot system. Should boot normally. Shut system down.
2. powerfail
3. Boot system. On the EC console, should see the system come up,
go back down through G3S5, then come back up. From the user's
point of view, it just boots.
1. Boot system. Should boot normally. (That is, powerfail is not sticky)
Change-Id: Ia57f196606f79b9f2fce7d9cd109ab932c3571aa
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/197523
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
This is cleaner than having the charge state machine explicitly know
about the power button task.
BUG=chrome-os-partner:21610
BRANCH=none
TEST=reboot EC; see that power button task does not leave init-on state until
just after the charge state initializes:
[0.022646 Charge state init -> idle0 after 0.005908 sec]
[0.022956 PB task 8 = init-on]
[0.023147 PB PCH pwrbtn=LOW]
[0.023303 PB task 6 = released, wait 199996]
Change-Id: I11d70103e3ee545512efe621f53d999680a7ad56
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/64366
Reviewed-by: Vic Yang <victoryang@chromium.org>
Power button logic is common across all platforms and is not
LM4-specific, so move it to its own module. Switch.c will eventually
be moving to common/ and will common across all platforms (not just
x86), and splitting out the x86 power button logic is needed before
that too.
BUG=chrome-os-partner:18343
BRANCH=none
TEST=manual
1) power on system with both lid and power button.
2) power+refresh -> reboots
3) power+refresh+esc -> recovery mode
4) power+refresh+downarrow -> reboots, AP stays off
5) toggling recovery GPIO via servo should generate SW debug output
showing bit 0x10 toggling
Change-Id: I07714e2c035dceece66f90407983397d2697e7d5
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/61780
