we normally try to find out a few things about a battery (like charge
level) before actaully applying charging power to it. when the
battery is completely discharged, the controller on the battery can't
respond as it is not self-powered. so, we have to avoid all
operations that depend on the battery responding in the battery
discovery/initialization path.
as long as we report that a battery is present and it is not
responsive, the charger task will enter ST_PRECHARGE which means it'll
provide a "precharge" current to the battery to try to talk to it.
this allows the battery's controller to report battery parameters
allowing our charger task can do the right thing.
BUG=b:79354967
BRANCH=none
TEST=atlas now discovers the discharged battery reliably
Change-Id: I5e5a3abda07508eb791b712fb2f9b9f5fe383e07
Signed-off-by: Caveh Jalali <caveh@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1065492
Commit-Ready: Caveh Jalali <caveh@google.com>
Tested-by: Caveh Jalali <caveh@google.com>
Reviewed-by: Caveh Jalali <caveh@google.com>
Decreases verification time from 923ms to 785ms.
Optimized version do not really help in RW, as they just increase
the image size (which also increases verification time).
BRANCH=fizz
BUG=b:77608104
TEST=make BOARD=fizz -j, flash fizz, check timing.
Change-Id: Ia8c36c35c0321c1995dc1cede7b27f7636037795
Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1075908
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
Since the PS8751 is now driving the EN_SNK GPIO on the PPC, we cannot
reset without a battery otherwise we will brown out the board.
BRANCH=none
BUG=b:78896495,b:78021059
TEST=verified with reworked board.
Change-Id: Ibadf46de922c49f5fdd08c43991e71f852ff7600
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1067711
Saves another ~1300 bytes of flash size, as the touchpad
hashes can now be computed in blocks of 4K, instead of 1K.
This costs 3K of SRAM, which we would not otherwise need on
hammer.
wand can only fit 2k PDU, so let's stick to that.
Also, make sure that util/gen_touchpad_fw is regenerated when the
configuration option changes (touchpad FW size, PDU size). Sadly,
this will still break bisection from commit after this CL, to
before this CL.
BRANCH=poppy
BUG=b:80167548
TEST=make buildall -j
TEST=make BOARD=hammer/staff/wand/whiskers all tests -j
TEST=Copy new staff image with old touchpad FW to DUT, verify that
FW can be updated.
Change-Id: Ic1763684da730dc986bbbcb3312088c8208c84b5
Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1070953
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Some tests cannot be built on some boards (not enough SRAM,
unusual configuration, etc.). Instead of the long list of
exceptions in test/build.mk that we currently use, allow
each board (or chip) build.mk to set test-list-y, and
only use the default list if it is unset.
BRANCH=poppy
BUG=b:80167548
TEST=make buildalltests -j
Change-Id: I803c691f419451aad4396529302a4805cbe3f9b5
Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1074572
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
There are still more ifdef than can be added: this just takes out
the low hanging fruits.
BRANCH=poppy
BUG=b:35647963
TEST=make buildall -j, see that we gain from 0 to 64 bytes on many
boards.
Change-Id: Ibe85b8bfa5d5c22c160e4a6656104256067beee9
Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1070948
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
In rare cases, it is useful to be able to build tests for all boards:
buildall only builds the main image, but -paladin builders also builds
test cases for each board.
Also remove/fix tests for boards that currently fail.
BRANCH=none
BUG=b:35647963
TEST=make buildalltests -j, wait a long time, tests pass.
Change-Id: Id6d978705a40a2045731cb08ad2ca5d62cc12ebb
Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1072218
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Allow setting password from the AP, but not from USB. Remove the old
password control logic, which is no longer needed.
Allow open if:
- Not explicitly blocked
- Not blocked via FWMP
- One of the following is true:
- A password is set
- Battery is removed (also doesn't require physical presence)
- Dev mode is on, and request came from the AP
Reduces cr50 binary by 152 bytes.
BUG=b:79983505
BRANCH=cr50
TEST=manual, with a CR50_DEV=1 build
ccd oops
ccd lock
ccd unlock -> fails
gsctool -U -> fails from host
gsctool -t -U -> fails from AP
ccd oops
ccd password foo -> fails from console
gsctool -P -> fails from host
gsctool -t -P -> works from AP
ccd get -> confirms password set
ccd lock
ccd unlock foo -> works
ccd lock
gsctool -U -> works from host, if correct password supplied
ccd lock
gsctool -t -U -> works from AP, if correct password supplied
ccd open foo -> works
ccd lock
gsctool -O -> works from host, if correct password supplied
ccd lock
gsctool -t -O -> works from AP, if correct password supplied
ccd oops
ccd lock
(remove battery)
ccd open -> works without physical presence
(reattach battery)
ccd lock
gsctool -O -> works from host
ccd lock
gsctool -t -O -> works from AP, if dev mode is enabled
Change-Id: I364b322d03db250e7dd140767d7a22dbb3ac1eef
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1072957
Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
Move code that will be common to Grunt and Careena to baseboard
to avoid duplication when creating the Careena board.
Add Careena board files. These are currently just a copy of Grunt
and will be modified for Careena next.
BUG=b:79704826
BRANCH=none
TEST=Grunt still boots ok.
Change-Id: I6dd0035bdd62e92a7f3664120fc6ac3f23a0af4d
Signed-off-by: Edward Hill <ecgh@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1070988
Saving space in RW, even if we are not critical in terms of size,
always helps to reduce verification time.
BRANCH=poppy
BUG=b:35647963
TEST=make newsize => Hammer shrinks by ~3k, verification time
down by ~12 ms.
Change-Id: I63741106fdc56c410871fb367c29605bf37f1b77
Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1070951
Reviewed-by: Randall Spangler <rspangler@chromium.org>
With the changes made to tcpci for alert handling and low power mode
entry, the anx7447 can operate with auto toggle and low power config
options.
Signed-off-by: Todd Broch <tbroch@chromium.org>
BUG=b:77544959
BRANCH=none
TEST=Verfied that low power mode is entered when nothing is attached
and that when an adapter is attached it connects and when removed
returns to low power mode.
Change-Id: I9c683c3f86ba98e55748ac355b3d4845799d89e5
Reviewed-on: https://chromium-review.googlesource.com/1049061
Commit-Ready: Daisuke Nojiri <dnojiri@chromium.org>
Tested-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-by: YH Lin <yueherngl@chromium.org>
Enable PWM control of backlight in EC for yorp and phaser. Proto build
of bip will not have backlight control in EC.
BRANCH=none
BUG=b:79422226
TEST=none (no hardware to test with)
Change-Id: Ib6ed4af4de3145b112ed43b4ca1ec9f931f3875f
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1050785
Reviewed-by: Justin TerAvest <teravest@chromium.org>
Change prefix from CONFIG_ESPI to CONFIG_HOSTCMD_ESPI for consistency.
BRANCH=none
BUG=chromium:818804
TEST=Full stack builds and works on yorp (espi) and grunt (lpc)
Change-Id: I8b6e7eea515d14a0ba9030647cec738d95aea587
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1067513
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Break the ec chip code up with the more granular
CONFIG_HOSTCMD_(X86|LPC|ESPI) options.
BRANCH=none
BUG=chromium:818804
TEST=Full stack builds and works on yorp (espi) and grunt (lpc)
Change-Id: Ie272787b2425175fe36b06fcdeeee90ec5ccbe95
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1067502
Reviewed-by: Randall Spangler <rspangler@chromium.org>
The ITE eval board relied on the chip's define for LPC. Since the ITE
chip supports both LPC and eSPI, we want to define LPC here to be
explicit.
BRANCH=none
BUG=chromium:818804
TEST=Full stack builds and works on yorp (espi) and grunt (lpc)
Change-Id: Ic477277543c1f24999070dc408052c7266df22e6
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1067501
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Convert all boards that use both CONFIG_ESPI and CONFIG_LPC to only use
the CONFIG_HOSTCMD_ESPI option.
BRANCH=none
BUG=chromium:818804
TEST=entire stack works with lpc and espi
Change-Id: Idd1519494a4f880b7b2018d059579d50c5461fcf
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1067499
Reviewed-by: Randall Spangler <rspangler@chromium.org>
To enable device mode, set the gpio USB2_OTG_ID
in the respective boards to high.
Pull the gpio low to disable device mode.
BUG=b:79343083
BRANCH=NONE
TEST=On Yorp board, for UFP mode gpio USB2_OTG_ID should be high,
for DFP mode gpio USB2_OTG_ID should be low.
In OS console, lspci should list xdci.
(with chromiumos/third_party/coreboot/+/1064592)
Change-Id: I70f13a9705626d9bcbe989239f6826d35d8fa536
Signed-off-by: Jagadish Krishnamoorthy <jagadish.krishnamoorthy@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/1058832
Reviewed-by: Jett Rink <jettrink@chromium.org>
AP and EC consoles may generate a lot of bursty traffic, and cr50 UART
console to USB processing is very slow: when characters become
available, a hooks task callback is invoked, which retrieves received
characters one at a time and queues them up to the appropriate USB
transmit queue.
This patch speeds up things as follows:
- increases the seize of USB transmit queues for AP and EC console
channels to 512 bytes. Experiments supported by code
instrumentation has shown that even this is not enough to avoid
underruns, but this is a good compromise between memory use and
performance, these sizes could be revisited later,
- raises UART RX interrupt priority from level 1 to 0
- moving bytes from UART TX FIFO to USB queue happens on the
interrupt context when UART TX interrupt is asserted
- as many characters as possible are read from the UART first,
before queuing function is called, and the entire received batch
is passed to the queuing function.
It has to be mentioned here that presently batch processing is not
necessarily much more efficient, because queuing function becomes
more complicated when multiple objects are passed to it, this will
have to be dealt with in a separate patch.
There is still a lot of room for improvement:
- functions used to queue up data are very generic, dedicated code
could help a lot.
- UART drivers should have methods for collecting all bytes
available in receive FIFO in one invocation,
- USB side of things (dequeuing data and passing it to the
controller.
BRANCH=cr50, cr50mp
BUG=b:38448364
TEST=ran 'chargen' application on both AP and EC to flood the console
channels and observed the flow of characters on the host site, it
is pretty smooth with occasional hiccups, especially when TPM is
active, before this patch it was impossible to have both stream
up, both were garbled.
- Verified that new account can be created and user logged in on
restarts while chargen is running, i.e. TPM task gets enough
processing bandwidth.
- When EC is reset, there seem to be no lost characters on the
console (it used to cause some garbled console output before this
patch). The below output was collected on Coral:
> reboot
Rebooting!
--- UART initialized after reboot ---
[Reset cause: soft]
[Image: RO, coral_v1.1.8363+2cc945d5a 2018-05-15 17:41:57 ...
[0.003605 init buttons]
[0.003826 Inits done]
[0.004094 tablet mode disabled
]
[0.008272 found batt:SMP]
[0.022278 SW 0x01]
[0.042247 hash start 0x00040000 0x00021994]
[0.045823 Battery FET: reg 0x0018 mask 0x0018 disc 0x0000]
[0.071136 kblight registered]
[0.071544 PB init-on]
[0.071818 USB charge p0 m0]
[0.073670 ID/SKU ADC 4 = 1309 mV]
[0.075630 ID/SKU ADC 3 = 852 mV]
[0.076077 SKU ID: 71]
[0.076335 Motion Sensor Count = 3]
[0.083594 PD comm enabled]
...
- did not test bitbang programming mode, it is in line for
reworking for speeding up as well.
Change-Id: Ic9f3972f585dd1976169965c2a2422253aeac87a
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1016037
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Reviewed-by: Mary Ruthven <mruthven@chromium.org>
It is copied from the Lux board, as the rev-0 hardware uses the same
design as Lux. The LED doesn't work if AP is in G5, as the LED power
source PP5000 is disabled in G5. Will fix it later.
BRANCH=none
BUG=b:74395451
TEST=Tested several scenarios: charge, low-level battery, charge but
no battery.
Change-Id: I3803b917c6c4cba35176b75cb316b2c8ef9eb13a
Signed-off-by: Wai-Hong Tam <waihong@google.com>
Reviewed-on: https://chromium-review.googlesource.com/1060582
Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
Remove the previous hack of force increasing the adapter current.
The PP5000 rail is now turned on/off during power-on/off AP.
Add a check to ensure it has enough power to enable the 5V rail
and boot AP. If the battery is in low level or unplugged and the
charger adapter doesn't supply enough power, don't boot AP and
transition back to S5. The check may wait a while for PD
negoiation.
BRANCH=none
BUG=b:79353631
TEST=On battery plugged and unplugged cases, checked the device can
source VBUS to USB port-0 and port-1.
TEST=Unplug battery and use a low-power adapter, can't boot up AP.
See the "Not enough power to boot" message and transition to S5.
Change-Id: Ie9b8dff6e10d97dffd554b382595e5e7a70875e6
Signed-off-by: Wai-Hong Tam <waihong@google.com>
Reviewed-on: https://chromium-review.googlesource.com/1050607
This commit adds the appropriate hibernate flags to the hibernate wake
pins. It additionally, adds a board specific hibernate function which
sets up the PSL pins for wake as well as writing to the ROP PMIC to
disable all the power rails.
BUG=b:79713379
BRANCH=poppy
TEST=Enter `hibernate` on EC console, verify that system can wake from
AC insertion, power button press, and lid switch.
Change-Id: I5b197c3c4d54cfc9c0b00c19815faa019f8b8cae
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Reviewed-on: https://chromium-review.googlesource.com/1067892
Commit-Ready: Aseda Aboagye <aaboagye@chromium.org>
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-by: Mulin Chao <mlchao@nuvoton.com>
when we wake up a discharged battery using the "precharge current", it
briefly requests requests (0 vols, 0 amps) - presumably while its
controller is trying to figure out what's going on... we respect this
and stop charging, but that's probably a really bad idea since the
battery has had very little chance to accept enough charge to
self-power its controller. enabling "REQUESTS_NIL_WHEN_DEAD" gets
around that.
BUG=b:79354967
BRANCH=none
TEST=instrumented code to verify we override the 0 amps request when
battery is at 0% charge
Change-Id: I1e15e5106ae5cdda94bd1bfd02132b300c9c4665
Signed-off-by: Caveh Jalali <caveh@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1067010
Commit-Ready: Caveh Jalali <caveh@google.com>
Tested-by: Caveh Jalali <caveh@google.com>
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
the battery temperature field is only valid after we've actually
managed to read the battery temperatore parameter. so, if the temp
field is marked "BAD", don't even look at it.
this addresses a case where we were removing charge current during the
precharge phase - basically removing charge current from a battery
that we're trying to power so we can talk to its I2C controller.
BUG=b:79354967
BRANCH=none
TEST=instrumented code to verify we don't request 0 amps in ST_PRECHARGE
Change-Id: I3b40903506fa949c14ecaf577f134f31cfcf8fb7
Signed-off-by: Caveh Jalali <caveh@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1066789
Commit-Ready: Caveh Jalali <caveh@google.com>
Tested-by: Caveh Jalali <caveh@google.com>
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
ITE only supports both edge triggers for GPB0 instead
of just falling.
BRANCH=none
BUG=79942824
TEST=nothing is changing on how it configured.
We are just changing the documentation in gpio.inc
Change-Id: Ib7af54e360f4acaf410fb64b6747caf4d8729cec
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1066310
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Expose the i2c interface through usb so that we can read power rails
through servod leveraging the work being done there.
BRANCH=none
BUG=chromium:806148
TEST=manual testing
- powerlog still works
- i2c over usb using servod code works (other CLs needed)
Change-Id: I48876bc4839509a397ce77376b337c37c556ae40
Signed-off-by: Ruben Rodriguez Buchillon <coconutruben@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1051136
Reviewed-by: Nick Sanders <nsanders@chromium.org>
This patch adds KX022 as a lid accelerometer for Akali. The readings
are adjusted by rotating 180 degree on X-axis and 180 degree on Y-axis.
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
BUG=b:77496502
BRANCH=none
TEST=Verified on Akali
Change-Id: I23e8351f457255bdd743b5157053efd8edd6ca4a
Reviewed-on: https://chromium-review.googlesource.com/1038622
Commit-Ready: Daisuke Nojiri <dnojiri@chromium.org>
Tested-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-by: Gwendal Grignou <gwendal@google.com>
When any of battery cells are near the Cell Under Voltage, battery
enters shutdown mode. However, battery cells can continue to discharge
due to self discharge. Battery cell vendor defines the minimum
acceptable cell voltage. If the cell voltage falls below that value,
battery BMS does not close the C-FET and the battery is considered
permanently dead.
So, every time battery enters shutdown mode, the BMS executes SUV
status check to see whether cells are in safe range to charge.
Gauge IC turns on C-fet after a 5 sec delay. During this delay, the
gauge requests 0mA charging current and 0V charging voltage.
During SUV check, battery gauge monitors the external voltage by the
charger through "battery present through" setting.
If the external voltage is less than the threshold, the BMS goes to
shutdown mode again and this repeats.
This patch enables CONFIG_BATTERY_REQUESTS_NIL_WHEN_DEAD so that the
EC will supply voltage & current even if the battery requests 0V, 0A
at 0% soc, which only happens when the BMS is exiting shutdown mode.
Battery gauge IC: TI BQ40Z50
Battery gauge FW version: 1.06 for BYD/ 1.07 for LG and Simplo.
BUG=b:73921750
BRANCH=none
TEST=Check dead battery can be charged battery to normal mode.
Change-Id: Ib7e12a0596d53377c58eb17c980cd7e01576de7c
Signed-off-by: raymondchou <raymond_chou@compal.corp-partner.google.com>
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/910608
Commit-Ready: Raymond Chou <raymond_chou@compal.corp-partner.google.com>
sleepmask is really useful for debugging sleep issues. Add a read only
version of sleepmask to non-DBG images. It will only be accessible once
the console is unlocked.
BUG=none
BRANCH=cr50
TEST=make sure sleepmask can be modified in DBG images and can only be
read in prod images.
Change-Id: I31ef966f6302d4a7602a014cb08c9b972d13f41e
Signed-off-by: Mary Ruthven <mruthven@google.com>
Reviewed-on: https://chromium-review.googlesource.com/1062804
Commit-Ready: Mary Ruthven <mruthven@chromium.org>
Tested-by: Mary Ruthven <mruthven@chromium.org>
Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
Enable trackpad when entering S3, and display backlight when entering S0
and disable them on the opposite transition. Moving common code to
baseboard.
BRANCH=none
BUG=b:79900266
TEST=bip trackpad works in S3 as wake source. backlight turns off in
S0ix and S3.
Change-Id: I0937771093d87c020b3c0d94a482d108c5a5c180
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1064693
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
This will be used as part of the checks for when to allow CCD open.
Add check for firmware space dev mode bit, based on the similar code
which reads the FWMP. Print the state of both bits in 'ccd get'.
BUG=b:79983505
BRANCH=cr50
TEST=With dev mode off, 'ccd get' does not report TPM: dev_mode.
Turn on dev mode via the recovery screen, and it does.
Change-Id: I6af78bb104004323cd377ed996e1db94bc36fc62
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1066391
Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
there are no pullup resistors on the TCPC ALERT# pins and none on the
board, so we need to turn on internal pullups on the EC side.
BUG=b:75070158
BRANCH=none
TEST=board still boots
Change-Id: I15a7940d8b647b83c6ae304171c4a7c46b920529
Signed-off-by: Caveh Jalali <caveh@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1059870
Commit-Ready: caveh jalali <caveh@chromium.org>
Tested-by: Caveh Jalali <caveh@google.com>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
