Some devices have GPIO pins that control USB port power connected to
the EC, so they cannot be toggled by ACPI. This patch adds a memory
map between the EC and ACPI that can be used on such devices. It can
hold the power state of up to 8 USB ports. Currently, only dumb power
ports are supported.
BUG=chromium:833436
BRANCH=fizz
TEST=On a fizz that runs BIOS with EC_ACPI_MEM_USB_PORT_POWER mapped,
check that both reads and writes are propagated.
Change-Id: I413defcb9e4d234fea7f54d46b6b8a1a10efa31e
Signed-off-by: Emil Lundmark <lndmrk@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1069273
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Previously manual_mode used the current values of voltage/current to
set the desired values for each charge_request() call. Since manual
mode is entered/exited in the host command task, this can easily lead
to a race condition where the charger gets disabled in the host
command task, the reenabled by the charger task. This in turn makes
the ectool chargecontrol idle command unreliable.
This CL replaces manual mode with two variables, manual_voltage and
manual_current. The default values are -1 which means that they are
inactive. When the ectool command 'chargecontrol idle' is executed, it
sets both variables to 0. This then removes the race condition
possibility as each iteration of the charger loop will use
manual_voltage and/or manual_current if not -1.
BRANCH=coral
BUG=b:68364154
TEST=Manual
Executed 'ectool chargecontrol idle' and 'ectool chargecontrol normal'
numerous times and verified that the charging was disabled/resumed
each time as expected. Without this fix the problem could be
reproduced always in less than 10 attempts, typcially less than
5. With this CL charging is disabled reliably each time and I'm not
able to reproduce the problem.
Change-Id: I1ed9cdb42249cdf72ab34dd95b8f42c09d9a490c
Signed-off-by: Scott Collyer <scollyer@google.com>
Reviewed-on: https://chromium-review.googlesource.com/851419
Tested-by: Scott Collyer <scollyer@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Reviewed-by: Shawn N <shawnn@chromium.org>
Commit-Queue: Scott Collyer <scollyer@chromium.org>
(cherry picked from commit b7254f38979f274acc66330905399ff5ddf4129b)
Reviewed-on: https://chromium-review.googlesource.com/922069
Commit-Ready: Daisuke Nojiri <dnojiri@chromium.org>
Tested-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
Add the FP_CAPTURE_RESET_TEST capture mode to be able to perform the
reset pixel values test.
Update ectool accordingly and also remove the deprecated 'fpcheckpixels'
command.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=poppy
BUG=b:78597564
TEST=run 'ectool --name=cros_fp fpmode capture test_reset',
then 'ectool --name=cros_fp fpframe > test.pnm'
CQ-DEPEND=CL:*626747
Change-Id: I183f33b1cb9ba4db67219b8f7740d29dc0551f2d
Reviewed-on: https://chromium-review.googlesource.com/1061074
Commit-Ready: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
When the EC sends an interrupt to the AP notifying it of new
accelerometer data we need to make sure the spot we record the timestamp
of the event is virtually identical to the spot the AP records the same
point in time.
Therefore a better spot for that is right next to the gpio toggling of
the interrupt line.
BUG=b:67743747
TEST=In the kernel, fifo_info->info.timestamp still has sane values.
TEST=CTS should still pass
BRANCH=master
Change-Id: Ic77101a045123e779f576c46b401c765304976fd
Signed-off-by: Alexandru M Stan <amstan@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/802976
Reviewed-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Instead of fetching incoming CEC messages using a specific read
command, extend the standard mkbp event so the CEC message can
be delivered directly inside the event.
Signed-off-by: Stefan Adolfsson <sadolfsson@chromium.org>
BUG=b:76467407
BRANCH=none
TEST="ectool cec read" still working with a kernel that has support
for the increased mkbp size.
CQ-DEPEND=CL:1046186,CL:1051085
Change-Id: Id9d944be86ba85084b979d1df9057f7f3e7a1fd0
Reviewed-on: https://chromium-review.googlesource.com/1051105
Commit-Ready: Stefan Adolfsson <sadolfsson@chromium.org>
Tested-by: Stefan Adolfsson <sadolfsson@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
The kernel is only able to know the number of USB PD port through
EC_CMD_USB_PD_PORTS, but the kernel needs also to be able to know
that there is a dedicated port. Add a host command that will
return the total number of charge port (USB PD + BJ).
BRANCH=None
BUG=chromium:841944
TEST=Called command from kernel driver and checked that the port count
was the expected value.
Change-Id: I6ccd8a2dee35bbe8bb66dfbe09d1cc09c54b73a0
Signed-off-by: Fabien Parent <fparent@baylibre.com>
Reviewed-on: https://chromium-review.googlesource.com/1046593
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
Update the fingerprint match event to include the index of the template
which matched.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=poppy
BUG=b:77516790
TEST=on ZerbleBarn, enroll 5 fingers and do matching from the console,
see the proper finger index in the trace.
TEST=on Meowth, check unmodified biod still works for match with the
updated MCU firmware.
CQ-DEPEND=CL:*621808
Change-Id: I5be77ba65ce232989606274aba9a6c20841d533c
Reviewed-on: https://chromium-review.googlesource.com/1047267
Commit-Ready: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Nicolas Norvez <norvez@chromium.org>
This patch adds execution-in-ram, opposite of XIP: execution-in-place
(a.k.a. XIP) to the EC features. It can be currently implied by
CONFIG_EXTERNAL_STORAGE.
BUG=b:77306460
BRANCH=none
TEST=Verify ectool prints EXEC_IN_RAM on Fizz.
Change-Id: I4a7fb3b267864debe59fd211956371eceac57613
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/995968
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Add the state machine and the interfacing to the enrollment and matching
algorithm providing by the private driver part.
Implement the host commands interface for it (based on MKBP event) along
with the console debug commands to exercise it.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=none
BUG=b:72360575
TEST=On ZerbleBarn console, use 'fpenroll' then 'fpmatch' for several
fingers.
TEST=With ZerbleBarn and a servo-v2, retrieve and upload templates with
'ectool_servo fptemplate'.
TEST=On Meowth, exercise with the prototype of biod
CrosFpBiometricsManager.
CQ-DEPEND=CL:*555078
Change-Id: I10b0d76d3faa898a682cf9a2eb7fc7e212b0c20c
Reviewed-on: https://chromium-review.googlesource.com/886401
Commit-Ready: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
Currently CBI data offset and size are fixed. This patch makes them
variable. Each data item consists of <tag><size><value> where <tag>
is a numeric value assigned to each data item, <size> is the number
of bytes used for <value>.
BUG=b:70294260
BRANCH=none
TEST=Use 'ectool cbi set' to set board version, oem, sku.
Verify the contents by cbi console command and ectool cbi get.
1. ectool cbi set 0 0x202 2 2 (Init CBI and write board ver. of size 2)
2. ectool cbi set 1 1 1 (write oem id of size 1)
3. ectool cbi set 2 2 1 (write sku id of size 1)
4. ectool cbi get 0
514 (0x202)
5. ectool cbi get 1
1 (0x1)
6. ectool cbi get 2
2 (0x2)
7. Run cbi console command:
CBI_VERSION: 0x0000
TOTAL_SIZE: 18
BOARD_VERSION: 514 (0x202)
OEM_ID: 1 (0x1)
SKU_ID: 2 (0x2)
43 42 49 8c 00 00 12 00 00 02 02 02 01 01 01 02
01 02
Change-Id: I5a30a4076e3eb448f4808d2af8ec4ef4c016ae5e
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/920905
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Add support for an additional finger image capture type
used for quality testing.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=none
BUG=b:72360575, b:71770455
TEST=On Meowth, run 'ectool --name=cros_fp fpmode capture qual'
then 'ectool --name=cros_fp fpframe raw > finger_mq.bin'
Change-Id: I1b9525dc2adf0b91aef2f7124803c90d6a3bb0ca
Reviewed-on: https://chromium-review.googlesource.com/924124
Commit-Ready: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Nicolas Norvez <norvez@chromium.org>
We share the same shared memory fields for both batteries. When
the host wants to switch battery to read out:
- The host sets EC_ACPI_MEM_BATTERY_INDEX to the required index
- EC then swaps the data is the shared memory fields, then update
EC_MEMMAP_BATT_INDEX
- Host waits for EC_MEMMAP_BATT_INDEX to have the required value,
then fetches the data
BRANCH=none
BUG=b:65697620
TEST=Boot lux, both /sys/class/power_supply/BAT0 and BAT1 are
present, data is valid.
TEST=Unplug base, BAT1 goes away, replug, BAT1 comes back.
Change-Id: Icce12f9eef2f6f8cde9bae0a968a65e1703d0369
Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/888382
Reviewed-by: Gwendal Grignou <gwendal@google.com>
First version of the algorithm, some TODOs are left in the code
but this, generally, works reasonably well.
When charging, we allocate input current in this general order:
- Base system (fixed, low, number)
- Lid system (based on PSYS)
- Lid battery (estimating how much current the battery actually
requires)
- Base battery (similar estimation)
- Provide everything else to lid
When discharging, we generally:
- First discharge the base battery
- Then discharge the lid battery
BRANCH=none
BUG=b:71881017
TEST=Flash lux and wand, EC-EC communication works, adapter power
is split in a sensible way, and discharging works fine.
Change-Id: I8a4f87963962fc5466b2fedf1347eb4dadd35740
Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/659460
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Update the FP MCU interface to include a few convenient diagnostics
functions for factory testing.
It's mostly backward compatible, but overall this interface never
shipped in anything, so not a big deal regardless.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=none
BUG=b:71986991
TEST=ectool --name=cros_fp fpinfo && ectool --name=cros_fp fpcheckpixels
CQ-DEPEND=CL:*546799
Change-Id: Ic641f891ace02d79af9339cf6cb59a2960e506a7
Reviewed-on: https://chromium-review.googlesource.com/873924
Commit-Ready: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Shawn N <shawnn@chromium.org>
This patch adds CBI_GET_RELOAD flag to EC_CMD_GET_CROS_BOARD_INFO
command. When the flag is set, the command will be forced to read
data from EEPROM even, ignoring the data cached by the previous
read.
This allows ectool to verify a write was successful without reboot.
BUG=b:70294260
BRANCH=none
TEST=ectool cbi set 0 0x1234 && ectool cbi get 0 1
Change-Id: I3e7ced5be56a74c605870a4c0622c0a2f47963bb
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/874155
Reviewed-by: Randall Spangler <rspangler@chromium.org>
This patch adds host command to write board information in EERPOM.
BUG=b:70294260
BRANCH=none
TEST=Run ectool cbi set <type> <value> to write BOARD_VERSION, OEM_ID,
and SKU_ID. Enable WP and verify cbi set command fails.
Change-Id: I39536d146313408ace666f350a107d89b331bf7a
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/865570
This patch adds host command to get board info from EEPROM.
BUG=b:70294260
BRANCH=none
TEST=Run ectool cbi get <type> to get board version, OEM, SKU
Change-Id: I41a84d3eea6da9d88fa8122db36dcd1df515842d
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/865161
Reviewed-by: Randall Spangler <rspangler@chromium.org>
flags are actually _not_ BATT_FLAG_*, but EC_BATT_FLAG_*. Clarify
that in the comment, and add a new EC_BATT_FLAG_INVALID flag to
indicate that some of the data may be invalid (dual-battery master
needs to know that to make appropriate charging/discharging
decision).
BRANCH=none
BUG=b:65697962
BUG=b:65697620
TEST=Flash hammer and wand, flags make sense.
Change-Id: I3c428c850020a29b3f452504b60b52946a04c503
Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/859400
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
If a bios carries an EC image signed by a wrong key, EFS EC falls back
to the previous slot upon reboot. Vboot currently does not handle this
case and tries to update the EC with an incompatible image again.
When this happens, a user sees 'applying critical update' screen
repeatedly.
This patch adds EFS_VERIFYV host command. Vboot on AP calls it to check
whether the EC likes a newly updated image or not. If the verification
fails, it's considered as update failure and vboot displays 'broken'
screen.
BUG=b:71719323
BRANCH=none
TEST=Flash EC SPI with an image which has a different RO key. Boot DUT
and let it run software sync. EC-RO rejects the updated image and falls
back to the previous one. The update counter is incremented and vboot
shows the 'broken' screen, requesting recovery.
Change-Id: I8a107a376963baa146ff691c50d80018ec3e429c
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/858159
Reviewed-by: Randall Spangler <rspangler@chromium.org>
SYNC motion sensor are use to count event.
It sends an event to the AP each time a GPIO goes low/high, the datum
contains a 16 bit counter.
The location indicates the source of the event, as Android sensor hal
will use this information (via sysfs location attribute) to link the
sensor with other subsystem.
BUG=b:67743747
BRANCH=none
TEST=Unit tests.
Change-Id: Ia808b25730ad4100efa216c6a86b7b090197c5a3
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/848496
Reviewed-by: Alexandru M Stan <amstan@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
current is actually a reserved keyword in the Linux kernel,
replace it by actual_current. And voltage by actual_voltage for
consistency.
BRANCH=none
BUG=b:65697962
BUG=b:65697620
TEST=make buildall -j
Change-Id: I8b8115174d15a1cc4b1189a54104bfec559ed72c
Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/848460
Reviewed-by: Gwendal Grignou <gwendal@chromium.org>
This adds 3 commands to obtain static and dynamic battery
information, as well as control base charger state.
These host commands are meant to be used as part of the EC-EC
communication protocol (based on hostcmd v4 protocol), but could
be used in the future to pass information between AP and EC,
especially when more than 1 battery is present, which would be
hard to support with the current MEMMAP-based approach.
BRANCH=none
BUG=b:65697962
BUG=b:65697620
TEST=Build wand and lux boards, flash it, EC-EC communication works.
Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
Change-Id: I263454794394838918832c9e4623835ab2f3a3da
Reviewed-on: https://chromium-review.googlesource.com/670380
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
The size of empty structs (and unions) varies between C and C++. When
including in C++ code our external API in ec_commands.h header with
extern "C". clang will complain (correctly) for all empty structs:
error: empty struct has size 0 in C, size 1 in C++
[-Werror,-Wextern-c-compat]
Remove them from the ec_commands.h header file.
ectool.c has some ugly macros which assume subcommands have both
requests and responses. Change those macros so they only reference
the non-empty sub-structs. The macros are still ugly, but generate
identical output, and don't rely upon zero-length structs.
BUG=chromium:792408
BRANCH=none
TEST=manual
1) Compile the following using 'clang -Wall -Werror':
#include <stdint.h>
extern "C" {
#include "include/ec_commands.h"
}
int main(void) { return 0; }
It compiles without error.
2) Copy the lb_command_paramcount, ms_command_sizes, and
cs_paramcount globals from ectool.c to a dummy .c file and
compile with 'gcc -S' to generate assembly. Do the same
after applying this patch.
Confirm the arrays have the same contents.
Change-Id: Iad76f10315b97205b42118ce070463071fe97128
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/820649
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Shawn N <shawnn@chromium.org>
Unified Host Event Programming Interface (UHEPI) enables a unified host
command EC_CMD_PROGRAM_HOST_EVENT to set/get/clear different host events.
Old host event commands (0x87, 0x88, 0x89, 0x8A, 0x8B, 0x8C, 0x8D, 0x8E,
0x8F) is supported for backward compatibility. But newer version of
BIOS/OS is expected to use UHEPI command (EC_CMD_PROGRAM_HOST_EVENT)
The UHEPI also enables the active and lazy wake masks. Active wake mask
is the mask that is programmed in the LPC driver (i.e. the mask that is
actively used by LPC driver for waking the host during suspended state).
It is same as the current wake mask that is set by the smihandler on host
just before entering sleep state S3/S5. On the other hand, lazy wake masks
are per-sleep masks (S0ix, S3, S5) so that they can be used by EC to set
the active wake mask depending upon the type of sleep that the host has
entered. This allows the host BIOS to perform one-time programming of
the wake masks for each supported sleep type and then EC can take care
of appropriately setting the active mask when host enters a particular
sleep state.
BRANCH=none
BUG=b:63969337
TEST=make buildall -j. And verfieid following scenario
1). Verified wake masks with ec hostevent command on S0,S3,S5 and S0ix
2). suspend_stress_test with S3 and S0ix
3). Verified "mosys eventlog list" in S3 and s0ix resume to confirm
wake sources (Lid, power buttton and Mode change)
4). Verified "mosys eventlog list" in S5 resume to confirm wake sources
(Power Button)
5). Verified above scenarios with combination of Old BIOS + New EC and
New BIOS + Old EC(making get_feature_flags1() return 0)
Change-Id: Idb82ee87fffb475cd3fa9771bf7a5efda67af616
Signed-off-by: Jenny TC <jenny.tc@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/576047
Commit-Ready: Jenny Tc <jenny.tc@intel.com>
Commit-Ready: Jenny Tc <jenny.tc@intel.corp-partner.google.com>
Tested-by: Jenny Tc <jenny.tc@intel.com>
Tested-by: Jenny Tc <jenny.tc@intel.corp-partner.google.com>
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
After firmware update, cr50 toggles the EC's reset line, expecting
the system will boot. This isn't the case for Chromebox because it
sets AP_OFF flag on a clean shutdown (to restore the previous power
state after power loss & restore).
This patch adds EC_REBOOT_HIBERNATE_CLEAR_AP_OFF to EC reboot
command. It makes EC first clear AP_OFF then hibernate.
BUG=b:69721737
BRANCH=none
TEST=Verify Fizz reboot after cr50 update.
Change-Id: If3207d7284f244ca1adf0d516ef744dbc739a9c1
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/802632
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Usually, the max current and supply voltage of dedicated chargers
are not known to the EC.
This patch adds EC_CMD_OVERRIDE_DEDICATED_CHARGER_LIMIT, which
allows the host to change the max current and supply voltage of the
dedicated charge port.
BUG=b:64442692
BRANCH=none
TEST=make runtests && buildall. Boot Fizz and let coreboot set
the adapter current and voltage.
Change-Id: I29b3f5762f8b316ca363c23e230530cdf4ca207a
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/769152
This only adds the structs for V4 packets. Host command support for
them is coming in a subsequent CL. V3 packets will continue to be
supported for a while, until all sides support V4.
BUG=chromium:787159
BRANCH=none
TEST=make -j runtests
Change-Id: I7e188a063d8ed60c85f3b8359959c424e3ccd1d9
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/780452
Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
With the upcoming change to add a new command to get/set/clear host
events and masks, it seems to be the right time to bump up the host
events and masks to 64-bit. We are already out of available host
events. This change opens up at least 32 bits for new host events.
Old EC commands to operate on host events/masks will still deal with
lower 32-bits of the events/mask. On the other hand, the new command
being added will take care of the entire 64-bit events/masks. This
ensures that old BIOS and kernel versions can still work with the
newer EC versions.
BUG=b:69329196
BRANCH=None
TEST=make -j buildall. Verified:
1. hostevent set 0x4000 ==> Sets correct bit in host events
2. hostevent clear 0x4000 ==> Clears correct bit in host events
3. Kernel is able to query and read correct host event bits from
EC. Verified using evtest.
4. Coreboot is able to read correct wake reason from EC. Verified
using mosys eventlog list.
Change-Id: Idcb24ea364ac6c491efc2f8dd9e29a9df6149e07
Signed-off-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/770925
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Add a new DRP policy to "freeze" the power role of each port, never
toggling automatically, though manual role swaps may still occur.
BUG=chromium:769895
BRANCH=servo
TEST=On servo_v4, verify DUT port stays in SRC role and POWER port
stays in SNK role while disconnected.
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Change-Id: Ibff3cd1ffaf0e884b030c231003763a57acbe02e
Reviewed-on: https://chromium-review.googlesource.com/715276
Commit-Ready: Shawn N <shawnn@chromium.org>
Tested-by: Shawn N <shawnn@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Add a new mask type (ALWAYS_REPORT mask) that is set by default to
certain host events that should always be reported to the host
irrespective of the state of SCI, SMI and wake masks. This mask
includes host events like critical events resulting in shutdown or
reboot, events that are consumed by BIOS, etc.
Now that ALWAYS_REPORT mask is added, this change also updates the way
EC manages set/query operations for host events:
1. During set operation, EC will check if the host event is present in
any of the 4 masks - SCI, SMI, wake and always report. If yes, then it
is set in hostevents.
2. During query operation, EC will extract the lowest set event from
hostevents, clear it and return it back to the host.
In order to reflect the above change in EC behavior, a new feature bit
is used EC_FEATURE_UNIFIED_WAKE_MASKS. This allows the host to decide
when wake mask needs to be set before checking for host events.
BUG=None
BRANCH=None
TEST=make -j buildall. Also verified following:
1. Wake from S3 works as expected. Host is able to log correct wake
sources (Verified power button, lid open, base key press and tablet
mode change on soraka).
2. Wake from S5 works as expected. Host is able to log correct wake
sources (Verified power button, lid open on soraka).
3. Wake from S0ix works as expected (Verified power button, lid open
on soraka).
4. Software method to trigger recovery still works fine:
reboot ap-off
hostevent set 0x4000
powerb
Change-Id: I62e5c1f82247c82348cd019e082883d86ec2688f
Signed-off-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/719578
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
In EFS, EC needs to sysjump to the active copy, which is hashed
and validated by the AP.
BUG=b:67748602
BRANCH=none
TEST=Verify Depthcharge makes EC jump to RW.
Change-Id: I2ca893f7691ad776a791f2044dd7a0983d06e3c5
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/717676
Chromebox ECs performs EFS: verifying firmware before the AP boots.
This patch updates host commands which are required for the EFS.
When EC_REBOOT_FLAG_SWITCH_RW_SLOT is specified, EC_CMD_REBOOT_EC
changes the active slot before it reboots the system.
BUG=b:65264494
BRANCH=none
TEST=On Fizz, verify:
1. RW_B is old and updated by soft sync. RW_B is activated and
executed after reboot. System continues to boot to OS.
2. RW_A is old and updated by soft sync. RW_A is activated and
executed after reboot. System continues to boot to OS.
Change-Id: I08050c985ce0b27b30cb842e6b5b4660f32e5211
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/648450
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
This patch adds USB_CHG_TYPE_DEDICATED to enum usb_chg_type. It's
for dedicated AC adapters like a barrel jack adapter used for Fizz.
BUG=b:65591971
BRANCH=none
TEST=make buildall
Change-Id: Ib883c97eb5e468753c73453d7dedd228547ae025
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/665327
Reviewed-by: Shawn N <shawnn@chromium.org>
Chromebox ECs performs EFS: verifying firmware before the AP boots.
This patch updates host commands which are required for the EFS.
The change includes:
* Update EC_CMD_FLASH_REGION_INFO to accept EC_FLASH_REGION_UPDATE
* Update EC_CMD_VBOOT_HASH to accept EC_VBOOT_HASH_OFFSET_UPDATE
When EC_FLASHS_REGION_UPDATE is specified, EC_CMD_FLASH_REGION_INFO
returns the slot which currently is not hosting a running RW copy.
When EC_VBOOT_HASH_OFFSET_UPDATE is specified, EC_CMD_VBOOT_HASH
computs the hash of the update slot. This hash covers the entire
region, including the signature at the end.
This patch undefines CONFIG_CMD_USBMUX and CONFIG_CMD_TYPEC
for gru to create space.
BUG=b:65028930
BRANCH=none
CQ-DEPEND=CL:648071
TEST=On Fizz, verify:
1. RW_B is old and updated by soft sync. RW_B is activated and
executed after reboot. System continues to boot to OS.
2. RW_A is old and updated by soft sync. RW_A is activated and
executed after reboot. System continues to boot to OS.
Change-Id: I9ece907b764d07ce94054ba27996e048c665a80a
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/648448
Servo / Suzy-Q related debugging methods is a big challenge
in factory especially after servo debug header is removed.
Expose some information to OS from EC will do a great help
for massive production.
+ expose charge/battery related state to ectool
1. chg_ctl_mode
2. manual_mode
3. battery_seems_to_be_dead
4. battery_seems_to_be_disconnected
5. battery_was_removed
6. disch_on_ac (learn mode state)
BUG=b:65265543
BRANCH=master
TEST=`ectool chargestate param 0x20000~0x20006 get correct state`
Change-Id: Ic2ed38e2eb9def01be29729fa1fe1959eb73fe43
Signed-off-by: Ryan Zhang <ryan.zhang@quanta.corp-partner.google.com>
Reviewed-on: https://chromium-review.googlesource.com/646412
Reviewed-by: Shawn N <shawnn@chromium.org>
add a subcommand to the PD_CONTROL message to power up a specific
TCPC. in practice, this typically just takes the TCPC out of sleep
mode for cases where sleep mode is controlled by the EC.
under the covers, board_set_tcpc_power_mode() gets a weak function
definition so we don't need to special case this everywhere.
TEST="make buildall" passes; "make tests" passes for reef.
BRANCH=none
BUG=b:35586895
Change-Id: Ib50e265d11eca10c3714049d8cfdf2657eff48c1
Signed-off-by: Caveh Jalali <caveh@google.com>
Reviewed-on: https://chromium-review.googlesource.com/596796
Reviewed-by: Shawn N <shawnn@chromium.org>
We can re-use our pd_log FIFO for other purposes, such as TPM logging.
Carve out event_log, a generic logging module which pd_log is compatible
with.
BUG=b:63760920
TEST=On kevin, verify PD logging is still functional and entries are
seen in dmesg.
BRANCH=None
Change-Id: I8e6ad6f93e9eebc676aca64652c60f81da471a94
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/597314
Commit-Ready: Shawn N <shawnn@chromium.org>
Tested-by: Shawn N <shawnn@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
