They're only used within the same file and should always be inlined.
It also helps gcc 8.1's lto linking which seems to not inline it (since
inline is just a hint) but then drops the function (presumably because
it's small, marked inline, and comes with no prototype).
BUG=b:65441143
BRANCH=none
TEST=builds with gcc 8.1
Change-Id: I881a5b9f13192dd11748d8a3060788f95a84dec0
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: https://chromium-review.googlesource.com/1061075
Commit-Ready: Patrick Georgi <pgeorgi@chromium.org>
Tested-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-by: Stefan Reinauer <reinauer@google.com>
This CL adds the port number to the error messages for the TI sn5330
PPC driver. It also adds 'ppc' so that its clear where the messages
are coming from.
BRANCH=none
BUG=b:79640678
TEST=Tested on Bip MLB and verfied that PPC EC console log errors
display the port number.
Change-Id: I7988e5e4008c005bb1ef9a78331d4a2597fdcb62
Signed-off-by: Scott Collyer <scollyer@google.com>
Reviewed-on: https://chromium-review.googlesource.com/1060105
Commit-Ready: Scott Collyer <scollyer@chromium.org>
Tested-by: Scott Collyer <scollyer@chromium.org>
Reviewed-by: Justin TerAvest <teravest@chromium.org>
Processing of TCPC alerts takes place in the PDCMD task and the result
of processing alerts is to wake the PD task. When the PD task runs,
it's possible that it may attempt to put the TCPC into low power mode
prior to the remainder of the alert processing function completing. So
there may be pending TCPC accesses in the alert handler function which
called subsequent to the PD task putting the TCPC into low power
mode. The TCPC access in the PDCMD task will cause the TCPC to exit
low power mode. With the ANX7447 TCPC, this process will repeat
indefinitely.
This CL replaces the calls to task_set_event and task_wake with
indications stored in a local variable. Then at the end of the
function the task_set_event is made if necessary. This change in order
removes one guaranteed source of pending TCPC accesses from causing
the TCPC to exit low power mode.
BRANCH=none
BUG=b:77544959
TEST=Was using Salea logic analyzer and testing in conjunction with
low power mode. Verified that prior to this change I2C accesses were
attempted and NAKd after the command I2CIDLE was sent on the bus. Also
tested basic type C operation as both SNK/SRC.
Change-Id: I8879c655a48a2b16e0445522497002482dc9ca33
Signed-off-by: Scott Collyer <scollyer@google.com>
Reviewed-on: https://chromium-review.googlesource.com/1044868
Commit-Ready: Scott Collyer <scollyer@chromium.org>
Tested-by: Scott Collyer <scollyer@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
After we set TE (CL:958295), rt946x terminates charging when
the charge current is below IEOC in constant-voltage mode.
Let's add an interface to check charge termination status.
BUG=b:77870927
BRANCH=scarlet
TEST=charge scarlet, confirm rt946x_is_charge_done() returns 0 when
battery is charging and returns 1 when charge terminates (battery is
full). Then keep AC plugged and wait, confirm rt946x_is_charge_done()
returns 0 when rt946x restarts charging.
Change-Id: I559d328aa0d7c5c4cd5bf7178370ea039aa80204
Signed-off-by: Philip Chen <philipchen@google.com>
Reviewed-on: https://chromium-review.googlesource.com/1044768
Commit-Ready: Philip Chen <philipchen@chromium.org>
Tested-by: Philip Chen <philipchen@chromium.org>
Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
This patch makes lm3509 avoid setting the LED brightness to 100% on
power-up. It removes brighness control from lm3509_power entirely.
The brightness is controlled by the OS.
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
BUG=b:78360907
BRANCH=none
TEST=Verify keyboard backlight turn on off on Nami as expected. No
flashing on start-up or resume is observed.
Change-Id: Ife82c83501d57aeb540acb1cccb95597fd1d19a0
Reviewed-on: https://chromium-review.googlesource.com/1054408
Commit-Ready: Daisuke Nojiri <dnojiri@chromium.org>
Tested-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
This patch promotes board/nami/keyboard_backlight.c to common
directory.
Board customization is done via board_kblight_init callback.
It currently supports two drivers: direct PWM control and lm3509.
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
BUG=b:78360907,b:78141647
BRANCH=none
TEST=On Nami (for lm3509) and Sona (pwm), verify the followings:
1. Alt + brightness up/down works
2. After suspend-resume, brightness is restored
3. Lid close/open
4. After screen is off, keyboard backlight is turned off
Change-Id: I584c06e8702fe7b289999698f277311cfd3400bd
Reviewed-on: https://chromium-review.googlesource.com/1051027
Commit-Ready: Daisuke Nojiri <dnojiri@chromium.org>
Tested-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
When we write a 0 to the register it actually prevents
future calls from correctly determining if the OCM is
present.
BRANCH=none
BUG=b:79123179
TEST=board with OCM still reports ocm after multiple anx_ocm 0 calls
Change-Id: I3899e8999483518fb42ddbd044d29e32fc3380f3
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1047830
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
Rename raw_read8 to st_raw_read8 and statically inline in the header
file. Removing the extern removes linker warnings when including this
header file without the driver, which happens in baseboard files.
BRANCH=none
BUG=none
TEST=including "driver/accelgyro_lsm6dsm.h" in c files that
do not link the actual driver will now compile.
Change-Id: I43f799a3b05b2343e012d43bdc9459d138ecf1b5
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1042727
Reviewed-by: Randall Spangler <rspangler@chromium.org>
We do not want to erase the OCM flash automatically so we
can ensure that we fix our supply chain issues. Add a command
that will erase the OCM if needed.
BRANCH=none
BUG=b:77658388
TEST=verified command works on yorp
Change-Id: Iaf6ada3b1e223d15ae0d9624bdcc54b90cb33b64
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1035428
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
This implements keyboard backlight control for Nami, Vayne, Pantheon,
and Sona. On Sona, GPIOC4 is directly connected to the LED strings.
Thus, we use PWM to control the brightness. On the other variants,
the LED strings are connected to LM3509. Thus, we control the brightness
through I2C.
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
BUG=b:76182445,b:78141647
BRANCH=none
TEST=Verify keyboard backlight brightness changes on Nami.
Verify keyboard backlight turns on/off on lid close/open, sleep/suspend.
on Nami. Verify 'kblight' returns x set by 'kblight x' on Sona.
Change-Id: I400ea2bc7a58a3cc57eb959179d2139a99ac176c
Reviewed-on: https://chromium-review.googlesource.com/1022833
Commit-Ready: Daisuke Nojiri <dnojiri@chromium.org>
Tested-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Aaron Durbin <adurbin@google.com>
The PS8751 TCPC expresses that it has been reset by resetting the
alert mask. Handle its re-init case.
BRANCH=none
BUG=b:77551454,b:77639399
TEST=Verify that TCPC is reset on yorp C1 after reinsertion
Change-Id: Ie1a819a3627a1225c3fad65a60a4aca126a69f53
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1014355
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
We need to use the PS8751 as the USB mux without configuring
it as the TCPC. Add mode that allows passing in i2c port
and address instead using tcpc_config_t values.
BRANCH=none
BUG=b:78341944
TEST=build using bip
Change-Id: I45b420ef890dfa8c5e5052864b7a2bb66d8734d6
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1024486
Once the PS8751 has new firmware, it will be able to detect VBus
at the appropriate time. After that, we can go back to using the
cached version of Vbus detection.
BRANCH=none
BUG=b:77639399
TEST=none
Change-Id: I691919f3bd2479a131aa58763c7906cb4f6919ff
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1024531
After a successfully PD packet transmit, a PD_EVENT_RX is issued
which could trigger a premature reading of a PD Packet before
the entire packet is received.
BUG=b:71620429
BRANCH=NONE
TEST=manual
Tested on Scarlet with the following three dongles:
ASUS 3-1, (HDMI, USB, TYPEC): Tested with USB-Keyboard, TypeC power
adapter, and HP monitor.
Cable Matter 6-1, (DP, HDMI, USB, SVGA, ETHERNET, TYPEC): Tested with
USB-Keyboard, TypeC power adapter, Ethernet and HP monitor
(DP and HDMI). SVGA was not tested.
Cable Matters 6-1, (DP, DP, USB, USB, ETHERNET, TYPEC): Tested with
USB-Keyboard, USB-Mouse, Ethernet, and two HP monitors
(Scarlet was mirrored on both monitors)
Signed-off-by: Sam Hurst <shurst@chromium.org>
Change-Id: Ib07182201d954cf4b9616277f9c14bbbb337197e
Reviewed-on: https://chromium-review.googlesource.com/1015417
Commit-Ready: Sam Hurst <shurst@google.com>
Tested-by: Sam Hurst <shurst@google.com>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
This commit adds an optional console command that will dump the contents
of the battery charger IC registers. Currently, the only chargers
supported are the BD9995x as well as the ISL923x.
BUG=None
BRANCH=None
TEST=Enable on meowth; Flash; Verify that the command works without any
issues.
Change-Id: I2221efe0ed6e0f6063c97547e0da2d775bf4da45
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Reviewed-on: https://chromium-review.googlesource.com/1016004
Commit-Ready: Aseda Aboagye <aaboagye@chromium.org>
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
The BQ24392 driver controls power on the PP5000_A rail so that BC1.2
detection can be performed when the AP is off. However, that rail is
also controlled by the chipset task, so CONFIG_POWER_PP5000_CONTROL
needs to be defined to keep 5V rail up when necessary.
Calls to power_5v_enable() must only be done when the build has a
chipset task (otherwise, that function is not defined).
BRANCH=none
BUG=b:77874283
TEST=Booted Yorp with software sync enabled
Signed-off-by: Justin TerAvest <teravest@chromium.org>
Change-Id: Ib75655944aa05e381da922da8e916dc5d4dd9f85
Reviewed-on: https://chromium-review.googlesource.com/1014397
Commit-Ready: Furquan Shaikh <furquan@chromium.org>
Tested-by: Divya S Sasidharan <divya.s.sasidharan@intel.com>
Reviewed-by: Divya S Sasidharan <divya.s.sasidharan@intel.com>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
This CL adds support to check if the OCM flash is erased and if not,
will erase it at initialization time. These changes are encapsulated
in a new config option CONFIG_USB_PD_TCPM_ANX7447_OCM_ERASE and this
option is enabled for Yorp boards.
BUG=b:77658388
BRANCH=NONE
TEST=make -j buildall. Tested on a board that hadn't yet been
erased. Verifed the message
"anx7447: OCM flash checked and successfully erased"
was in the EC log, but did not show up on subsequent reboots.
Change-Id: I660e76a9498d3dc1ba821a04317b324f716c5089
Signed-off-by: Scott Collyer <scollyer@google.com>
Reviewed-on: https://chromium-review.googlesource.com/988414
Commit-Ready: Jett Rink <jettrink@chromium.org>
Tested-by: Jett Rink <jettrink@chromium.org>
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
In tcpci_tcpc_drp_toggle the role control is being set to
TYPEC_CC_OPEN. This works for the parade tcpci compliant tcpc, but
does not work the anx7447. The tcpci spec has this description for the
role control requirement (4.4.5.2):
If DRP=1b, the only allowed values for CC1/CC2 are Rp/Rp or Rd/Rd.
COMMAND.Look4Connection shall do nothing if CC1/CC2 are not Rp/Rp or
Rd/Rd.
This CL changes the role control setting associated with starting
auto-toggle to be TYPEC_CC_RD.
BUG=b:77544959
BRANCH=NONE
TEST=Verfied that anx7447 does auto toggle between Rd and
Rp. Previously, the TCPC_REG_COMMAND_LOOK4CONNECTION command was being
ignored.
Change-Id: Iea7ce963ebf57c0f3d43005385484913d97774fd
Signed-off-by: Scott Collyer <scollyer@google.com>
Reviewed-on: https://chromium-review.googlesource.com/1005795
Commit-Ready: Scott Collyer <scollyer@chromium.org>
Tested-by: Scott Collyer <scollyer@chromium.org>
Reviewed-by: S Wang <swang@analogix.corp-partner.google.com>
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
If the board is not powered until VBUS is connected, then that port
will trigger dead battery mode in the PPC. This mode must be exited by
the host (EC) writing to the control register. Until dead battery mode
is exited, VBUS OVLO is fixed at 6.8V. Therefore the regular setting
of this value must be done after exiting dead battery mode.
This CL also changes the check for dead battery mode to use the mode
value in the device status register. The bit in the control register
does not reflect the status, but rather, if dead battery mode exit has
been written by the host. The current check will result in the dead
battery mode section being executed for both ports after every power
up. However, only the port that has VBUS active would succeed because
the HV_SNK mode can't be enabled unless VBUS is present.
Lastly, this CL changes the verification check for the
sink/source_enable functions to rely on the mode in the device status
register instead of the switch state. The reason for this is that the
switch state requires ~15 msec delay before it gets updated following
SNK_EN to the nx20p3484 being set high. However, the mode reports the
correct state without reqiuring a msleep.
BUG=b:77561535
BRANCH=NONE
TEST=Tested both port 0 and 1 and verified that Yorp can power up
without a battery. In addition verified that
nx20p3483_vbus_sink_enable returns EC_SUCCESS for both enable/disable
cases.
Change-Id: I2c993b592cd30e34a39d1c1b7e3c54be9f505844
Signed-off-by: Scott Collyer <scollyer@google.com>
Reviewed-on: https://chromium-review.googlesource.com/1005621
Commit-Ready: Scott Collyer <scollyer@chromium.org>
Tested-by: Scott Collyer <scollyer@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
The ANX7447 has a sink/source control lines which can be connected to
a PPC. The NX20P3483 PPC requires this control to set it's sink/source
switch control. The ANX7447 contols these lines via the tcpci COMMAND
register. This CL adds new tcpm_set functions to set either SNK or SRC
control via the COMMAND register.
BUG=b:77583452
BRANCH=NONE
TEST=Tested on port 0 of Yorp with an external charger. Prior to this
CL the PPC would remain in standby state because both snk/src control
remained low. With these changes, verifed that snk_ctrl is driven high
and vbus_sink_enable() function no longer returns an error.
Change-Id: Icbea0d3edb63ad19f3d2c76636208497b6939a72
Signed-off-by: Scott Collyer <scollyer@google.com>
Reviewed-on: https://chromium-review.googlesource.com/996239
Commit-Ready: Scott Collyer <scollyer@chromium.org>
Tested-by: Scott Collyer <scollyer@chromium.org>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
Returns an error if the ODR set is less than 13Hz instead of silently
put the sensor in suspend mode.
BUG=b:77601149
BRANCH=None
TEST=Check with accelrate we get an error instead of
"Data rate for sensor 0: 0"
Change-Id: Iead740f4205bbce1cfbccf2407f2a3a0dcf0ddaf
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1000399
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
If we don't enable the SNK mode before leaving dead battery mode
(which does keep the inflow path open), then we will brown out
our only source of power.
BRANCH=none
BUG=b:77561535
TEST=yorp can boot into ec without battery
Change-Id: I095e3cb1ed466fd6497bbc9e7b6851fc92005c75
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/999024
Reviewed-by: Scott Collyer <scollyer@chromium.org>
Added FIFO support to Acc and Gyro with
watermark interrupt management.
Watermark is configurable setting macro
CONFIG_ACCEL_FIFO_THRES properly (board.h)
BUG=b:73546254
BRANCH=master
TEST=Pass CTS test cheets_CTS_N.7.1_r15.x86.CtsHardwareTestCases
on meowth.
TEST=Tested on discovery (target stmems) BOARD with LSM6DSM
connected to EC i2c master bus.
Using motion sense console commands is possible to:
- enable sensor (accelinit 0, accelinit 1 for acc and gyro)
- set ODR (accelrate 0 x, accelrate 1 y where x, y are mHz)
- show sensor data (accelinfo on <time> where time is in ms)
Using this procedure is possible to see Green Led of Discovery Board
Blinking each time an interrupt from FIFO arrives. To be sure to
generate interrupt is better to use high ODR and low time in accelinfo.
Change-Id: Icf95b0e889dc806206b8ca50e74636e6a2441a18
Signed-off-by: Mario Tesi <mario.tesi@st.com>
Reviewed-on: https://chromium-review.googlesource.com/467326
Commit-Ready: Gwendal Grignou <gwendal@chromium.org>
Tested-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-by: Gwendal Grignou <gwendal@chromium.org>
Driver implements TCPC for ANX7447 chip. Enable Type C
port for USB and DP alt mode.
BUG=b:73793947
BRANCH=NONE
TEST=tested compiled binary for pdeval-stm32f072 board with this patch.
Power contract establishment, port role swap, DP alt mode works fine.
Change-Id: Ic11e499fc5fb4aba7732c75e4cb2fee54828c616
Reviewed-on: https://chromium-review.googlesource.com/956790
Commit-Ready: Scott Collyer <scollyer@chromium.org>
Tested-by: Scott Collyer <scollyer@chromium.org>
Reviewed-by: Scott Collyer <scollyer@chromium.org>
On yorp, the PS8751 TCPC resets its event mask when it goes into low
power mode which turns off the VBUS detection event mask. Since the
first interrupts after lower power mode should contain the vbus
changed interrupt we miss it.
We have tried many different permutations of resetting the event mask
on reset without achieving 100% detection success.
The PPC Vbus detection code calls out to the PPC over i2c every time
vbus level is checked; applying that strategy for TPCPs make the
detection much more robust.
BRANCH=none
BUG=b:77458917
TEST=yorp detect vbus on insertion every time with PS8751
Change-Id: I15b5f2ee016f68bac9e4bf4d5d89bbaef323f131
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/993394
Reviewed-by: Scott Collyer <scollyer@chromium.org>
When the wrong battery profile is loaded into max17055, we need
to be able to recover it after EC POR by reloading the correct profile.
BUG=b:77491650
BRANCH=scarlet
TEST=First, unplug/replug battery many times until I see
the battery profile loaded is wrong (1/20).
Second, make sure after a hard reset the correct battery profile
is loaded.
Change-Id: Iabb24fc75d31b9ce87bfb835e03549f4726903ed
Signed-off-by: Philip Chen <philipchen@google.com>
Reviewed-on: https://chromium-review.googlesource.com/991192
Commit-Ready: Philip Chen <philipchen@chromium.org>
Tested-by: Philip Chen <philipchen@chromium.org>
Reviewed-by: Philip Chen <philipchen@chromium.org>
If we enable charge termination when booting w/o battery,
charge termination would trigger and cut the power for max17055.
BUG=b:72697658
BRANCH=scarlet
TEST=Read rt946x reg 0x02, confirm charge termination is
disabled when booting w/o battery, and enabled otherwise.
Change-Id: I5780196ad993299ddfb37621bee5e941aa9b0d14
Signed-off-by: Philip Chen <philipchen@google.com>
Reviewed-on: https://chromium-review.googlesource.com/989314
Commit-Ready: Philip Chen <philipchen@chromium.org>
Tested-by: Philip Chen <philipchen@chromium.org>
Reviewed-by: Philip Chen <philipchen@chromium.org>
After a POR, max17055 takes ~2.5 seconds to finish the detection
for battery absence.
Let's report BP_NOT_SURE instead of the default BP_YES when the battery
detection result is not settled yet.
BUG=b:72697658
BRANCH=scarlet
TEST=boot scarlet w/o battery and confirm battery_is_present()
never return BP_YES before reporting BP_NO
Change-Id: Ia549b4b78a7403ce2c82802841b78bdd514c6200
Signed-off-by: Philip Chen <philipchen@google.com>
Reviewed-on: https://chromium-review.googlesource.com/989313
Commit-Ready: Philip Chen <philipchen@chromium.org>
Tested-by: Philip Chen <philipchen@chromium.org>
Reviewed-by: Philip Chen <philipchen@chromium.org>
The default setting is to wait 1.3s from receiving the command, to
enable the OTG output: that's too long, and makes time to active
base very long when running on battery.
BRANCH=none
BUG=b:76396020
TEST=Probe POGO 1/5 and one of the USB lines, check that time from
connect to active USB is reduced to 580 ms (from 1920 ms).
Change-Id: Iee00fd27978434ccac052e60a94534919dc29f43
Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/981853
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
CL:957872 introduced "get_time().val + 400" as the deadline to perform
compensation and the comment in bma2x2.c mentioned the deadline should be
400ms. But the unit of val in timestamp_t is microsecond not milisecond
so only 400us is defined not 400ms.
BRANCH=none
BUG=b:76234078
BUG=b:76202592
TEST=test manually on the dut by performing calibrate.
Change-Id: I7a834ef6dcb0772569d2c8d6c507803deb5d2fc1
Signed-off-by: Marco Chen <marcochen@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/979512
Commit-Ready: Gwendal Grignou <gwendal@chromium.org>
Tested-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-by: Gwendal Grignou <gwendal@chromium.org>
