Commit Graph

5 Commits

Author SHA1 Message Date
Randall Spangler
1a4bb89af2 ccd_config: Change test callback to highest priority
This way, when HOOK_CCD_CHANGE triggers, the debug message is printed
before any of the effects of the change due to other hooks.

No effect on the rest of the code.

BUG=none
BRANCH=cr50
TEST=manual in CR50_DEV=1 image
	ccdlock
	ccdoops
     "CCD change hook called" should be seen before "Enabling I2C" or
     "Disabling I2C" messages.

Change-Id: I2e083b70fe8ac3938abc56e14b5e50fe9e237752
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/616179
Reviewed-by: Vadim Bendebury <vbendeb@google.com>
2017-08-15 22:22:01 -07:00
Randall Spangler
00ea73ab16 usb_i2c: Fail if board I2C bridge is disabled
Add usb_i2c_board_is_enabled().

On Cr50, this is now also connected to the I2C CCD capability.  The
USB-I2C bridge can only be used when the capability is available.

On other platforms (Servo V4, etc.) where usb_i2c_board_enable() is
a no-op, add a dummy implementation which always returns true.

See go/cr50-ccd-wp for more information.

BUG=b:62537474
BRANCH=cr50
TEST=manual with CR50_DEV=1
	Connect host PC to dev board USB port
	On host PC:
		sudo servod -c ccd_cr50.xml -c reef_r1_inas.xml
		dut-control pp3300_ec_shv_reg --> fail, error 0x8001

	ccdoops --> reset I2C config
	ccd i2c disable --> I2C disabled

	On host PC:
		sudo servod -c ccd_cr50.xml -c reef_r1_inas.xml
		dut-control pp3300_ec_shv_reg --> fail, error 0x0006

	ccd i2c enable --> I2C enabled
	ccdunlock --> I2C disabled
	ccdoops --> I2C enabled
	ccdset i2c unlesslocked
	ccdlock --> I2C disabled
	ccdunlock --> I2C enabled

Change-Id: Ia3df32e239a5f7c5915bc6c7e408ce0dc8b26c89
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/590577
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Mary Ruthven <mruthven@chromium.org>
2017-07-31 21:39:39 -07:00
Randall Spangler
424000159e cr50: Disable CCD on board ID mismatch
If there is a board ID mismatch and rollback is not possible Cr50
firmware will enter a limited mode which only support Cr50 firmware
upgrade.  All other features must be disabled, because it is not
possible to know which features should be allowed on the mismatched
board.

See go/cr50-ccd-wp for more information.

BUG=b:62537474
BRANCH=cr50
TEST=manual with CR50_DEV=1 build, define CONFIG_CMD_CCDDISABLE
     ccdinfo --> state=opened
     ccddisable --> state=locked(disabled), all capabilities disabled
     ccdunlock --> access denied
     ccdopen --> access denied
     ccdreset --> access denied
     ccdpassword --> access denied
     ccdset --> access denied
     ccdoops
     ccdinfo --> state=opened, back to defaults

Change-Id: Idb66fb1f3d5106aa0c2cb6addf2404ea9942b0d6
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/590070
Reviewed-by: Mary Ruthven <mruthven@chromium.org>
2017-07-27 19:56:22 -07:00
Randall Spangler
3be8c42996 cr50: Preserve CCD state across deep sleep
Define two bits in a long-life register to hold the current CCD state
across deep sleep.  Update the bits on CCD config change, and restore
them on init.

This is necessary because Cr50 loses RAM contents on deep sleep.  It
would be really inconvenient to open CCD, get a cup of coffee, and
come back to find CCD has locked again because Cr50 was idle too long.

See go/cr50-ccd-wp for more information.

BUG=b:62537474
BRANCH=cr50
TEST=manual with CR50_DEV=1 build
     ccdinfo --> state=opened
     idle d
     ccdunlock
     ccdinfo --> state=unlocked
     (wait for deep sleep)
     sysinfo --> reset flags = hibernate wake-pin
     ccdinfo --> state=unlocked
     reboot
     sysinfo --> reset flags = hard
     ccdinfo --> state=opened

Change-Id: I7864f374af5c159bc9691b094958fb030f3cb8ad
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/575996
Reviewed-by: Mary Ruthven <mruthven@chromium.org>
2017-07-27 19:56:22 -07:00
Randall Spangler
4809c70bbe cr50: Add case closed debugging V1 configuration
This adds the CCD configuration module, and the console commands to
control it.  It is not wired up to any of the CCD capabilities; that's
coming in the next CL.

Briefly:
* CCD configuration is persistently stored in nvmem_vars.  Use ccdinfo to
  print it.
* CCD can be Locked, Unlocked (some capabilities), or Opened
  (all capabilities), using the ccdlock / ccdunlock / ccdopen commands.
* CCD config can be restricted by setting a password via ccdpass.
* Individual config capabilities can be set via ccdset.  Some of those will
  be used to gate access to things like write protect and UARTs.  Others
  affect the requirements for ccdunlock / ccdopen (for example, is physical
  presenc required).
* The entire config can be reset via ccdreset.  If only unlocked, config
  that is restricted to Opened is not reset.
* If CR50_DEV=1, ccdoops will force-reset and open the config.

See go/cr50-ccd-wp for more information.

BUG=b:62537474
BRANCH=none
TEST=manual with CR50_DEV=1 build
	gpioget # make sure GPIO_BATT_PRES_L=0

	ccdlock # lock, because CR50_DEV=1 builds start unlocked

	ccdinfo # locked, flags=0, all capabilities default
	ccdpass # access denied (we're locked)
	ccdreset # access denied
	ccdset flashap always # access denied

	ccdunlock
	ccdinfo # unlocked
	ccdpass foo
	ccdinfo # flags=2 (password set when unlocked)
	ccdset flashap always # access denied
	ccdset uartectx unlesslocked
	ccdinfo # yes, uartectx permission changed
	ccdlock

	ccdunlock # fails without password
	ccdunlock bar # wrong password
	ccdunlock foo # busy
	(wait 3 sec)
	ccdunlock foo
	ccdreset
	ccdinfo # no password, flags 0, capabilities all default

	ccdopen # requires physical presence; tap power or use 'pp'
	ccdset uartectx unlesslocked
	ccdset batterybypasspp ifopened
	ccdpass baz
	ccdinfo # password set, flag 0, ccdset changes worked

	ccdunlock
	ccdreset
	ccdinfo # uartectx back to ifopened, password still set

	ccdopen baz # still requires physical presence
	ccdset opennolongpp always
	ccdlock
	ccdopen baz # no pp required
	ccdset unlocknoshortpp unlesslocked
	ccdlock
	ccdopen baz # short pp sequence required (3 taps)
	ccdlock
	ccdunlock baz # short pp sequence required
	ccdopen baz # pp not required
	ccdset unlocknoshortpp always
	ccdlock

	testlab open # access denied
	testlab enable # access denied
	ccdunlock baz
	testlab open # access denied
	testlab enable # access denied
	ccdopen baz
	testlab enable # requires short pp
	ccdinfo # flags 1

	ccdreset
	ccdinfo # no password, flags=1, caps all default
	ccdlock
	testlab open
	ccdinfo # opened
	testlab disable # requires short pp; let it time out
	ccdinfo # still opened, flags=1

	ccdlock
	ccdoops # backdoor in CR50_DEV images to force-reset CCD
	ccdinfo # opened, flags=0, all defaults (yes, oops wipes out testlab)

	ccdreset rma
	ccdinfo # flags = 0x400000, everything but Cr50FullConsole always
	ccdreset # back to flags=0, all default

Change-Id: I24e8d8f361874671e6e94f27492ae00db919bea9
Reviewed-on: https://chromium-review.googlesource.com/569439
Commit-Ready: Randall Spangler <rspangler@chromium.org>
Tested-by: Randall Spangler <rspangler@chromium.org>
Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
2017-07-20 15:00:40 -07:00