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This change configures the SHA engine to a) enable random stalls at 12% during regular operation through SHA API's, and b) enables random stalls at 25% when doing key-ladder operations. TCG tests continue to complete in ~20 minutes (i.e. no noticeable slowdown). BRANCH=none BUG=b:38315169 TEST=TCG tests pass Change-Id: Id4b541cdd3d51c57979a93f71a6291cca8eb1844 Signed-off-by: nagendra modadugu <ngm@google.com> Reviewed-on: https://chromium-review.googlesource.com/508172 Commit-Ready: Nagendra Modadugu <ngm@google.com> Tested-by: Nagendra Modadugu <ngm@google.com> Reviewed-by: Marius Schilder <mschilder@chromium.org> Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
196 lines
4.4 KiB
C
196 lines
4.4 KiB
C
/* Copyright 2015 The Chromium OS Authors. All rights reserved.
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* Use of this source code is governed by a BSD-style license that can be
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* found in the LICENSE file.
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*/
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#include "dcrypto.h"
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#include "internal.h"
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#include "registers.h"
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#include "util.h"
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#include "cryptoc/sha256.h"
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static void dcrypto_sha256_init(LITE_SHA256_CTX *ctx);
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static const uint8_t *dcrypto_sha256_final(LITE_SHA256_CTX *ctx);
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#ifdef SECTION_IS_RO
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/* RO is single threaded. */
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#define mutex_lock(x)
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#define mutex_unlock(x)
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static inline int dcrypto_grab_sha_hw(void)
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{
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return 1;
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}
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static inline void dcrypto_release_sha_hw(void)
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{
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}
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#else
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#include "task.h"
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static struct mutex hw_busy_mutex;
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static int hw_busy;
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int dcrypto_grab_sha_hw(void)
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{
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int rv = 0;
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mutex_lock(&hw_busy_mutex);
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if (!hw_busy) {
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rv = 1;
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hw_busy = 1;
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}
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mutex_unlock(&hw_busy_mutex);
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return rv;
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}
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void dcrypto_release_sha_hw(void)
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{
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mutex_lock(&hw_busy_mutex);
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hw_busy = 0;
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mutex_unlock(&hw_busy_mutex);
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}
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#endif /* ! SECTION_IS_RO */
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void dcrypto_sha_wait(enum sha_mode mode, uint32_t *digest)
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{
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int i;
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const int digest_len = (mode == SHA1_MODE) ?
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SHA_DIGEST_SIZE :
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SHA256_DIGEST_SIZE;
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/* Stop LIVESTREAM mode. */
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GREG32(KEYMGR, SHA_TRIG) = GC_KEYMGR_SHA_TRIG_TRIG_STOP_MASK;
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/* Wait for SHA DONE interrupt. */
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while (!GREG32(KEYMGR, SHA_ITOP))
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;
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/* Read out final digest. */
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for (i = 0; i < digest_len / 4; ++i)
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*digest++ = GR_KEYMGR_SHA_HASH(i);
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dcrypto_release_sha_hw();
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}
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/* Hardware SHA implementation. */
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static const HASH_VTAB HW_SHA256_VTAB = {
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dcrypto_sha256_init,
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dcrypto_sha_update,
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dcrypto_sha256_final,
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DCRYPTO_SHA256_hash,
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SHA256_DIGEST_SIZE
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};
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void dcrypto_sha_hash(enum sha_mode mode, const uint8_t *data, uint32_t n,
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uint8_t *digest)
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{
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dcrypto_sha_init(mode);
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dcrypto_sha_update(NULL, data, n);
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dcrypto_sha_wait(mode, (uint32_t *) digest);
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}
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void dcrypto_sha_update(struct HASH_CTX *unused,
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const void *data, uint32_t n)
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{
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const uint8_t *bp = (const uint8_t *) data;
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const uint32_t *wp;
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/* Feed unaligned start bytes. */
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while (n != 0 && ((uint32_t)bp & 3)) {
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GREG8(KEYMGR, SHA_INPUT_FIFO) = *bp++;
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n -= 1;
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}
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/* Feed groups of aligned words. */
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wp = (uint32_t *)bp;
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while (n >= 8*4) {
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GREG32(KEYMGR, SHA_INPUT_FIFO) = *wp++;
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GREG32(KEYMGR, SHA_INPUT_FIFO) = *wp++;
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GREG32(KEYMGR, SHA_INPUT_FIFO) = *wp++;
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GREG32(KEYMGR, SHA_INPUT_FIFO) = *wp++;
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GREG32(KEYMGR, SHA_INPUT_FIFO) = *wp++;
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GREG32(KEYMGR, SHA_INPUT_FIFO) = *wp++;
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GREG32(KEYMGR, SHA_INPUT_FIFO) = *wp++;
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GREG32(KEYMGR, SHA_INPUT_FIFO) = *wp++;
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n -= 8*4;
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}
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/* Feed individual aligned words. */
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while (n >= 4) {
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GREG32(KEYMGR, SHA_INPUT_FIFO) = *wp++;
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n -= 4;
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}
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/* Feed remaing bytes. */
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bp = (uint8_t *) wp;
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while (n != 0) {
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GREG8(KEYMGR, SHA_INPUT_FIFO) = *bp++;
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n -= 1;
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}
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}
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void dcrypto_sha_init(enum sha_mode mode)
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{
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int val;
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/* Stop LIVESTREAM mode, in case final() was not called. */
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GREG32(KEYMGR, SHA_TRIG) = GC_KEYMGR_SHA_TRIG_TRIG_STOP_MASK;
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/* Clear interrupt status. */
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GREG32(KEYMGR, SHA_ITOP) = 0;
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/* Enable streaming mode. */
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val = GC_KEYMGR_SHA_CFG_EN_LIVESTREAM_MASK;
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/* Enable SHA DONE interrupt. */
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val |= GC_KEYMGR_SHA_CFG_EN_INT_EN_DONE_MASK;
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/* Select SHA mode. */
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if (mode == SHA1_MODE)
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val |= GC_KEYMGR_SHA_CFG_EN_SHA1_MASK;
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GREG32(KEYMGR, SHA_CFG_EN) = val;
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/* Turn off random nops (which are enabled by default). */
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GWRITE_FIELD(KEYMGR, SHA_RAND_STALL_CTL, STALL_EN, 0);
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/* Configure random nop percentage at 12%. */
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GWRITE_FIELD(KEYMGR, SHA_RAND_STALL_CTL, FREQ, 2);
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/* Now turn on random nops. */
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GWRITE_FIELD(KEYMGR, SHA_RAND_STALL_CTL, STALL_EN, 1);
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/* Start SHA engine. */
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GREG32(KEYMGR, SHA_TRIG) = GC_KEYMGR_SHA_TRIG_TRIG_GO_MASK;
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}
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static void dcrypto_sha256_init(LITE_SHA256_CTX *ctx)
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{
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ctx->f = &HW_SHA256_VTAB;
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dcrypto_sha_init(SHA256_MODE);
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}
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/* Requires dcrypto_grab_sha_hw() to be called first. */
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void DCRYPTO_SHA256_init(LITE_SHA256_CTX *ctx, uint32_t sw_required)
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{
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if (!sw_required && dcrypto_grab_sha_hw())
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dcrypto_sha256_init(ctx);
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#ifndef SECTION_IS_RO
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else
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SHA256_init(ctx);
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#endif
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}
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static const uint8_t *dcrypto_sha256_final(LITE_SHA256_CTX *ctx)
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{
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dcrypto_sha_wait(SHA256_MODE, (uint32_t *) ctx->buf);
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return ctx->buf;
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}
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const uint8_t *DCRYPTO_SHA256_hash(const void *data, uint32_t n,
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uint8_t *digest)
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{
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if (dcrypto_grab_sha_hw())
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/* dcrypto_sha_wait() will release the hw. */
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dcrypto_sha_hash(SHA256_MODE, data, n, digest);
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#ifndef SECTION_IS_RO
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else
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SHA256_hash(data, n, digest);
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#endif
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return digest;
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}
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