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4cbf0cc358
Add a driver for the STM32 True Random Number Generator. Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BRANCH=none BUG=chrome-os-partner:62991 TEST=adhoc on STM32L, craft console command and generate/dump buffers of random numbers. Change-Id: Ie7ce890cfc36a3b9a277715b17051e3e42fdfc96 Reviewed-on: https://chromium-review.googlesource.com/445777 Commit-Ready: Vincent Palatin <vpalatin@chromium.org> Tested-by: Vincent Palatin <vpalatin@chromium.org> Reviewed-by: Shawn N <shawnn@chromium.org>
71 lines
1.7 KiB
C
71 lines
1.7 KiB
C
/* Copyright 2017 The Chromium OS Authors. All rights reserved.
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* Use of this source code is governed by a BSD-style license that can be
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* found in the LICENSE file.
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*/
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/* Hardware Random Number Generator */
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#include "common.h"
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#include "panic.h"
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#include "registers.h"
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#include "task.h"
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#include "trng.h"
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#include "util.h"
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uint32_t rand(void)
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{
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int tries = 40;
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/* Wait for a valid random number */
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while (!(STM32_RNG_SR & STM32_RNG_SR_DRDY) && --tries)
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;
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/* we cannot afford to feed the caller with a dummy number */
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if (!tries)
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software_panic(PANIC_SW_BAD_RNG, task_get_current());
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/* Finally the 32-bit of entropy */
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return STM32_RNG_DR;
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}
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void rand_bytes(void *buffer, size_t len)
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{
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while (len) {
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uint32_t number = rand();
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size_t cnt = 4;
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/* deal with the lack of alignment guarantee in the API */
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uintptr_t align = (uintptr_t)buffer & 3;
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if (len < 4 || align) {
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cnt = MIN(4 - align, len);
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memcpy(buffer, &number, cnt);
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} else {
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*(uint32_t *)buffer = number;
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}
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len -= cnt;
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buffer += cnt;
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}
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}
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void init_trng(void)
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{
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/* Enable the 48Mhz internal RC oscillator */
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STM32_RCC_CRRCR |= STM32_RCC_CRRCR_HSI48ON;
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/* no timeout: we watchdog if the oscillator doesn't start */
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while (!(STM32_RCC_CRRCR & STM32_RCC_CRRCR_HSI48RDY))
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;
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/* Clock the TRNG using the HSI48 */
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STM32_RCC_CCIPR = (STM32_RCC_CCIPR & ~STM32_RCC_CCIPR_CLK48SEL_MASK)
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| (0 << STM32_RCC_CCIPR_CLK48SEL_SHIFT);
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/* Enable the RNG logic */
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STM32_RCC_AHB2ENR |= STM32_RCC_AHB2ENR_RNGEN;
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/* Start the random number generation */
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STM32_RNG_CR |= STM32_RNG_CR_RNGEN;
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}
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void exit_trng(void)
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{
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STM32_RNG_CR &= ~STM32_RNG_CR_RNGEN;
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STM32_RCC_AHB2ENR &= ~STM32_RCC_AHB2ENR_RNGEN;
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STM32_RCC_CRRCR &= ~STM32_RCC_CRRCR_HSI48ON;
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}
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