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6959f42da6
Add the evaluation board driver of npcx7 series ec for testing. If you
received the evb which ec is 128-pins package, please notice it has
the following limitations.
a. No GPIOD7/E0 pins.
b. No I2C4_0, I2C4_1, I2C5_1 and I2C6_1 ports.
c. No ADC7, ADC8 and ADC9 channels.
d. No JTAG port 1.
e. Do not enable CONFIG_HIBERNATE_PSL since no PSL circuit on evb.
This CL also includes:
1. Modified reset config from srst to sysresetreq in openocd/npcx.cfg.
Make sure openocd driver can reset ec by using NVIC_SYSRESETREQ.
2. Add flash utilities for npcx7 ec in openocd/npcx_cmds.tcl.
3. Add npcx7_evb support in flash_ec.
BRANCH=none
BUG=none
TEST=Passed all npcx7 drivers verification on the evb no matter which
ec's package is 128 or 144 pins package.
Change-Id: I8224d97cd66ce483d70816f47b2e124308f1b69c
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
Reviewed-on: https://chromium-review.googlesource.com/505832
Reviewed-by: Randall Spangler <rspangler@chromium.org>
25 lines
991 B
Plaintext
25 lines
991 B
Plaintext
/* Copyright 2017 The Chromium OS Authors. All rights reserved.
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* Use of this source code is governed by a BSD-style license that can be
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* found in the LICENSE file.
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*/
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/**
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* List of enabled tasks in the priority order
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*
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* The first one has the lowest priority.
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*
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* For each task, use the macro TASK_ALWAYS(n, r, d, s) for base tasks and
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* TASK_NOTEST(n, r, d, s) for tasks that can be excluded in test binaries,
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* where :
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* 'n' is the name of the task
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* 'r' is the main routine of the task
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* 'd' is an opaque parameter passed to the routine at startup
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* 's' is the stack size in bytes; must be a multiple of 8
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*/
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#define CONFIG_TASK_LIST \
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TASK_ALWAYS(HOOKS, hook_task, NULL, LARGER_TASK_STACK_SIZE) \
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TASK_NOTEST(KEYPROTO, keyboard_protocol_task, NULL, TASK_STACK_SIZE) \
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TASK_ALWAYS(HOSTCMD, host_command_task, NULL, TASK_STACK_SIZE) \
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TASK_ALWAYS(CONSOLE, console_task, NULL, LARGER_TASK_STACK_SIZE) \
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TASK_NOTEST(KEYSCAN, keyboard_scan_task, NULL, TASK_STACK_SIZE)
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