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dca765004f
In order to support 256 KB ram version of npcx ec, we add CHIP_VARIANT variant to distinguish which verson ec is. In config_chip.h, we use CHIP_VARIANT to specify the size and start address of program memory. Ecst tool also needs a chip parameter to make sure the address range checking of entry pointer won't fail. Modified sources: 1. config_chip.h: Use CHIP_VARIANT to specify the different hardware spec of npcx ec. 2. config_flash_layout.h: Replace constant value with CONFIG_PROGRAM_MEMORY_SIZE for CONFIG_RO_SIZE. 3. build.mk: Add -chip parameter for ecst tool to check entry address. 4. npcx_evb\build.mk: Add CHIP_VARIANT definition (npcx5m5g). 5. npcx_evb_arm\build.mk: Add CHIP_VARIANT definition (npcx5m5g). 6. wheatley\build.mk: Add CHIP_VARIANT definition (npcx5m5g). BUG=chrome-os-partner:34346 TEST=make buildall -j; test nuvoton IC specific drivers BRANCH=none Change-Id: I1b8b9b9d0a59bdc01210f498ac67e4a342743b47 Signed-off-by: Mulin Chao <mlchao@nuvoton.com> Reviewed-on: https://chromium-review.googlesource.com/330072 Tested-by: Kevin K Wong <kevin.k.wong@intel.com> Reviewed-by: Kevin K Wong <kevin.k.wong@intel.com> Reviewed-by: Shawn N <shawnn@chromium.org>
16 lines
421 B
Makefile
16 lines
421 B
Makefile
# -*- makefile -*-
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# Copyright 2015 The Chromium OS Authors. All rights reserved.
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# Use of this source code is governed by a BSD-style license that can be
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# found in the LICENSE file.
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#
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# Board specific files build
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#
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# the IC is Nuvoton M-Series EC (npcx5m5g, npcx5m6g)
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CHIP:=npcx
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CHIP_VARIANT:=npcx5m5g
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board-y=board.o led.o
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board-$(CONFIG_BATTERY_SMART)+=battery.o
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board-$(CONFIG_USB_POWER_DELIVERY)+=usb_pd_policy.o
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