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725bef1b3b
This code is a port of the sample loader application included in the
FPGA update. Only the pieces relevant to straight verification and
boot were ported.
The loader generates a hash, inputs to which are the image body, state
of fuses and state of flash INFO region, and the output is the value,
which will unlock the region for execution, if it is correct.
Only one image load is attempted, the image is supposed to be located
in the flash at the offset of CONFIG_RW_MEM_OFF.
BRANCH=none
BUG=chrome-os-partner:43025
TEST=with the rest of the patches applied the RO image successfully
verifies and starts up the RW image.
Change-Id: I26e1fbdaeb8b23d519c1a328526a3422231bb322
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/311316
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
60 lines
1.7 KiB
C
60 lines
1.7 KiB
C
/* Copyright 2015 The Chromium OS Authors. All rights reserved.
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* Use of this source code is governed by a BSD-style license that can be
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* found in the LICENSE file.
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*/
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#ifndef __EC_CHIP_G_LOADER_ROM_FLASH_H
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#define __EC_CHIP_G_LOADER_ROM_FLASH_H
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#include "registers.h"
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#define FSH_OP_BULKERASE GC_CONST_FSH_PE_CONTROL_BULKERASE
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#define FSH_OP_ENABLE GC_CONST_FSH_PE_EN
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#define FSH_OP_ERASE GC_CONST_FSH_PE_CONTROL_ERASE
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#define FSH_OP_PROGRAM GC_CONST_FSH_PE_CONTROL_PROGRAM
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#define FSH_OP_READ GC_CONST_FSH_PE_CONTROL_READ
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#if 0
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#define num_flashes 2
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/*
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* FIX ME: words_per_row = m.get_flash_param("FlashWordsPerRow")
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* FIX ME: rows_per_page = m.get_flash_param("FlashRowsPerPage")
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* FIX ME: words_per_page = int(words_per_row)*int(rows_per_page)
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*/
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#define words_per_page 512
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/* This is BAD... This number is based on the TSMC spec Nmp=Tprog/Tsmp */
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#define _max_prog_cycles 9
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/* This is BAD... This number is based on the TSMC spec Nme=Terase/Tsme */
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#define _max_erase_cycles 45
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/* This is BAD... This number is based on the TSMC spec Nme=Terase/Tsme */
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#define _max_bulkerase_cycles 45
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#define _debug_flash 0
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/* write words to flash */
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int flash_write(uint32_t fidx, uint32_t offset,
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const uint32_t *data, uint32_t size);
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/* erase one page */
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int flash_erase(uint32_t fidx, uint32_t page);
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/* erase entire bank */
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int flash_wipe(uint32_t fidx);
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#endif
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#define E_FL_NOT_AWAKE 1
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#define E_FL_TIMEOUT 2
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#define E_FL_BAD_MAINB 3
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#define E_FL_BAD_SIZE 4
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#define E_FL_BAD_PTR 5
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#define E_FL_BAD_BANK 6
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#define E_FL_WRITE_FAIL 7
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#define E_FL_ERASE_FAIL 8
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#define E_FL_WIPE_FAIL 9
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#define E_FL_ERROR 10
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/* read single word from info block */
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int flash_info_read(uint32_t offset, uint32_t *dst);
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#endif /* __EC_CHIP_G_LOADER_ROM_FLASH_H */
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